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[deliverable/binutils-gdb.git] / gdb / csky-tdep.c
1 /* Target-dependent code for the CSKY architecture, for GDB.
2
3 Copyright (C) 2010-2019 Free Software Foundation, Inc.
4
5 Contributed by C-SKY Microsystems and Mentor Graphics.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdb_assert.h"
24 #include "frame.h"
25 #include "inferior.h"
26 #include "symtab.h"
27 #include "value.h"
28 #include "gdbcmd.h"
29 #include "language.h"
30 #include "gdbcore.h"
31 #include "symfile.h"
32 #include "objfiles.h"
33 #include "gdbtypes.h"
34 #include "target.h"
35 #include "arch-utils.h"
36 #include "regcache.h"
37 #include "osabi.h"
38 #include "block.h"
39 #include "reggroups.h"
40 #include "elf/csky.h"
41 #include "elf-bfd.h"
42 #include "symcat.h"
43 #include "sim-regno.h"
44 #include "dis-asm.h"
45 #include "frame-unwind.h"
46 #include "frame-base.h"
47 #include "trad-frame.h"
48 #include "infcall.h"
49 #include "floatformat.h"
50 #include "remote.h"
51 #include "target-descriptions.h"
52 #include "dwarf2-frame.h"
53 #include "user-regs.h"
54 #include "valprint.h"
55 #include "csky-tdep.h"
56 #include "regset.h"
57 #include "opcode/csky.h"
58 #include <algorithm>
59 #include <vector>
60
61 /* Control debugging information emitted in this file. */
62 static int csky_debug = 0;
63
64 static struct reggroup *cr_reggroup;
65 static struct reggroup *fr_reggroup;
66 static struct reggroup *vr_reggroup;
67 static struct reggroup *mmu_reggroup;
68 static struct reggroup *prof_reggroup;
69
70 /* Convenience function to print debug messages in prologue analysis. */
71
72 static void
73 print_savedreg_msg (int regno, int offsets[], bool print_continuing)
74 {
75 fprintf_unfiltered (gdb_stdlog, "csky: r%d saved at offset 0x%x\n",
76 regno, offsets[regno]);
77 if (print_continuing)
78 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
79 }
80
81 /* Check whether the instruction at ADDR is 16-bit or not. */
82
83 static int
84 csky_pc_is_csky16 (struct gdbarch *gdbarch, CORE_ADDR addr)
85 {
86 gdb_byte target_mem[2];
87 int status;
88 unsigned int insn;
89 int ret = 1;
90 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
91
92 status = target_read_memory (addr, target_mem, 2);
93 /* Assume a 16-bit instruction if we can't read memory. */
94 if (status)
95 return 1;
96
97 /* Get instruction from memory. */
98 insn = extract_unsigned_integer (target_mem, 2, byte_order);
99 if ((insn & CSKY_32_INSN_MASK) == CSKY_32_INSN_MASK)
100 ret = 0;
101 else if (insn == CSKY_BKPT_INSN)
102 {
103 /* Check for 32-bit bkpt instruction which is all 0. */
104 status = target_read_memory (addr + 2, target_mem, 2);
105 if (status)
106 return 1;
107
108 insn = extract_unsigned_integer (target_mem, 2, byte_order);
109 if (insn == CSKY_BKPT_INSN)
110 ret = 0;
111 }
112 return ret;
113 }
114
115 /* Get one instruction at ADDR and store it in INSN. Return 2 for
116 a 16-bit instruction or 4 for a 32-bit instruction. */
117
118 static int
119 csky_get_insn (struct gdbarch *gdbarch, CORE_ADDR addr, unsigned int *insn)
120 {
121 gdb_byte target_mem[2];
122 unsigned int insn_type;
123 int status;
124 int insn_len = 2;
125 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
126
127 status = target_read_memory (addr, target_mem, 2);
128 if (status)
129 memory_error (TARGET_XFER_E_IO, addr);
130
131 insn_type = extract_unsigned_integer (target_mem, 2, byte_order);
132 if (CSKY_32_INSN_MASK == (insn_type & CSKY_32_INSN_MASK))
133 {
134 status = target_read_memory (addr + 2, target_mem, 2);
135 if (status)
136 memory_error (TARGET_XFER_E_IO, addr);
137 insn_type = ((insn_type << 16)
138 | extract_unsigned_integer (target_mem, 2, byte_order));
139 insn_len = 4;
140 }
141 *insn = insn_type;
142 return insn_len;
143 }
144
145 /* Implement the read_pc gdbarch method. */
146
147 static CORE_ADDR
148 csky_read_pc (readable_regcache *regcache)
149 {
150 ULONGEST pc;
151 regcache->cooked_read (CSKY_PC_REGNUM, &pc);
152 return pc;
153 }
154
155 /* Implement the write_pc gdbarch method. */
156
157 static void
158 csky_write_pc (regcache *regcache, CORE_ADDR val)
159 {
160 regcache_cooked_write_unsigned (regcache, CSKY_PC_REGNUM, val);
161 }
162
163 /* Implement the unwind_sp gdbarch method. */
164
165 static CORE_ADDR
166 csky_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
167 {
168 return frame_unwind_register_unsigned (next_frame, CSKY_SP_REGNUM);
169 }
170
171 /* C-Sky ABI register names. */
172
173 static const char *csky_register_names[] =
174 {
175 /* General registers 0 - 31. */
176 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
177 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
178 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
179 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
180
181 /* DSP hilo registers 36 and 37. */
182 "", "", "", "", "hi", "lo", "", "",
183
184 /* FPU/VPU general registers 40 - 71. */
185 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
186 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
187 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7",
188 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15",
189
190 /* Program counter 72. */
191 "pc",
192
193 /* Optional registers (ar) 73 - 88. */
194 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
195 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
196
197 /* Control registers (cr) 89 - 119. */
198 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
199 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
200 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
201 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
202
203 /* FPU/VPU control registers 121 ~ 123. */
204 /* User sp 127. */
205 "fid", "fcr", "fesr", "", "", "", "usp",
206
207 /* MMU control registers: 128 - 136. */
208 "mcr0", "mcr2", "mcr3", "mcr4", "mcr6", "mcr8", "mcr29", "mcr30",
209 "mcr31", "", "", "",
210
211 /* Profiling control registers 140 - 143. */
212 /* Profiling software general registers 144 - 157. */
213 "profcr0", "profcr1", "profcr2", "profcr3", "profsgr0", "profsgr1",
214 "profsgr2", "profsgr3", "profsgr4", "profsgr5", "profsgr6", "profsgr7",
215 "profsgr8", "profsgr9", "profsgr10","profsgr11","profsgr12", "profsgr13",
216 "", "",
217
218 /* Profiling architecture general registers 160 - 174. */
219 "profagr0", "profagr1", "profagr2", "profagr3", "profagr4", "profagr5",
220 "profagr6", "profagr7", "profagr8", "profagr9", "profagr10","profagr11",
221 "profagr12","profagr13","profagr14", "",
222
223 /* Profiling extension general registers 176 - 188. */
224 "profxgr0", "profxgr1", "profxgr2", "profxgr3", "profxgr4", "profxgr5",
225 "profxgr6", "profxgr7", "profxgr8", "profxgr9", "profxgr10","profxgr11",
226 "profxgr12",
227
228 /* Control registers in bank1. */
229 "", "", "", "", "", "", "", "",
230 "", "", "", "", "", "", "", "",
231 "cp1cr16", "cp1cr17", "cp1cr18", "cp1cr19", "cp1cr20", "", "", "",
232 "", "", "", "", "", "", "", "",
233
234 /* Control registers in bank3 (ICE). */
235 "sepsr", "sevbr", "seepsr", "", "seepc", "", "nsssp", "seusp",
236 "sedcr", "", "", "", "", "", "", "",
237 "", "", "", "", "", "", "", "",
238 "", "", "", "", "", "", "", ""
239 };
240
241 /* Implement the register_name gdbarch method. */
242
243 static const char *
244 csky_register_name (struct gdbarch *gdbarch, int reg_nr)
245 {
246 if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
247 return tdesc_register_name (gdbarch, reg_nr);
248
249 if (reg_nr < 0)
250 return NULL;
251
252 if (reg_nr >= gdbarch_num_regs (gdbarch))
253 return NULL;
254
255 return csky_register_names[reg_nr];
256 }
257
258 /* Construct vector type for vrx registers. */
259
260 static struct type *
261 csky_vector_type (struct gdbarch *gdbarch)
262 {
263 const struct builtin_type *bt = builtin_type (gdbarch);
264
265 struct type *t;
266
267 t = arch_composite_type (gdbarch, "__gdb_builtin_type_vec128i",
268 TYPE_CODE_UNION);
269
270 append_composite_type_field (t, "u32",
271 init_vector_type (bt->builtin_int32, 4));
272 append_composite_type_field (t, "u16",
273 init_vector_type (bt->builtin_int16, 8));
274 append_composite_type_field (t, "u8",
275 init_vector_type (bt->builtin_int8, 16));
276
277 TYPE_VECTOR (t) = 1;
278 TYPE_NAME (t) = "builtin_type_vec128i";
279
280 return t;
281 }
282
283 /* Return the GDB type object for the "standard" data type
284 of data in register N. */
285
286 static struct type *
287 csky_register_type (struct gdbarch *gdbarch, int reg_nr)
288 {
289 /* PC, EPC, FPC is a text pointer. */
290 if ((reg_nr == CSKY_PC_REGNUM) || (reg_nr == CSKY_EPC_REGNUM)
291 || (reg_nr == CSKY_FPC_REGNUM))
292 return builtin_type (gdbarch)->builtin_func_ptr;
293
294 /* VBR is a data pointer. */
295 if (reg_nr == CSKY_VBR_REGNUM)
296 return builtin_type (gdbarch)->builtin_data_ptr;
297
298 /* Float register has 64 bits, and only in ck810. */
299 if ((reg_nr >=CSKY_FR0_REGNUM) && (reg_nr <= CSKY_FR0_REGNUM + 15))
300 return arch_float_type (gdbarch, 64, "builtin_type_csky_ext",
301 floatformats_ieee_double);
302
303 /* Vector register has 128 bits, and only in ck810. */
304 if ((reg_nr >= CSKY_VR0_REGNUM) && (reg_nr <= CSKY_VR0_REGNUM + 15))
305 return csky_vector_type (gdbarch);
306
307 /* Profiling general register has 48 bits, we use 64bit. */
308 if ((reg_nr >= CSKY_PROFGR_REGNUM) && (reg_nr <= CSKY_PROFGR_REGNUM + 44))
309 return builtin_type (gdbarch)->builtin_uint64;
310
311 if (reg_nr == CSKY_SP_REGNUM)
312 return builtin_type (gdbarch)->builtin_data_ptr;
313
314 /* Others are 32 bits. */
315 return builtin_type (gdbarch)->builtin_int32;
316 }
317
318 /* Data structure to marshall items in a dummy stack frame when
319 calling a function in the inferior. */
320
321 struct stack_item
322 {
323 stack_item (int len_, const gdb_byte *data_)
324 : len (len_), data (data_)
325 {}
326
327 int len;
328 const gdb_byte *data;
329 };
330
331 /* Implement the push_dummy_call gdbarch method. */
332
333 static CORE_ADDR
334 csky_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
335 struct regcache *regcache, CORE_ADDR bp_addr,
336 int nargs, struct value **args, CORE_ADDR sp,
337 function_call_return_method return_method,
338 CORE_ADDR struct_addr)
339 {
340 int argnum;
341 int argreg = CSKY_ABI_A0_REGNUM;
342 int last_arg_regnum = CSKY_ABI_LAST_ARG_REGNUM;
343 int need_dummy_stack = 0;
344 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
345 std::vector<stack_item> stack_items;
346
347 /* Set the return address. For CSKY, the return breakpoint is
348 always at BP_ADDR. */
349 regcache_cooked_write_unsigned (regcache, CSKY_LR_REGNUM, bp_addr);
350
351 /* The struct_return pointer occupies the first parameter
352 passing register. */
353 if (return_method == return_method_struct)
354 {
355 if (csky_debug)
356 {
357 fprintf_unfiltered (gdb_stdlog,
358 "csky: struct return in %s = %s\n",
359 gdbarch_register_name (gdbarch, argreg),
360 paddress (gdbarch, struct_addr));
361 }
362 regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
363 argreg++;
364 }
365
366 /* Put parameters into argument registers in REGCACHE.
367 In ABI argument registers are r0 through r3. */
368 for (argnum = 0; argnum < nargs; argnum++)
369 {
370 int len;
371 struct type *arg_type;
372 const gdb_byte *val;
373
374 arg_type = check_typedef (value_type (args[argnum]));
375 len = TYPE_LENGTH (arg_type);
376 val = value_contents (args[argnum]);
377
378 /* Copy the argument to argument registers or the dummy stack.
379 Large arguments are split between registers and stack.
380
381 If len < 4, there is no need to worry about endianness since
382 the arguments will always be stored in the low address. */
383 if (len < 4)
384 {
385 CORE_ADDR regval
386 = extract_unsigned_integer (val, len, byte_order);
387 regcache_cooked_write_unsigned (regcache, argreg, regval);
388 argreg++;
389 }
390 else
391 {
392 while (len > 0)
393 {
394 int partial_len = len < 4 ? len : 4;
395 if (argreg <= last_arg_regnum)
396 {
397 /* The argument is passed in an argument register. */
398 CORE_ADDR regval
399 = extract_unsigned_integer (val, partial_len,
400 byte_order);
401 if (byte_order == BFD_ENDIAN_BIG)
402 regval <<= (4 - partial_len) * 8;
403
404 /* Put regval into register in REGCACHE. */
405 regcache_cooked_write_unsigned (regcache, argreg,
406 regval);
407 argreg++;
408 }
409 else
410 {
411 /* The argument should be pushed onto the dummy stack. */
412 stack_items.emplace_back (4, val);
413 need_dummy_stack += 4;
414 }
415 len -= partial_len;
416 val += partial_len;
417 }
418 }
419 }
420
421 /* Transfer the dummy stack frame to the target. */
422 std::vector<stack_item>::reverse_iterator iter;
423 for (iter = stack_items.rbegin (); iter != stack_items.rend (); ++iter)
424 {
425 sp -= iter->len;
426 write_memory (sp, iter->data, iter->len);
427 }
428
429 /* Finally, update the SP register. */
430 regcache_cooked_write_unsigned (regcache, CSKY_SP_REGNUM, sp);
431 return sp;
432 }
433
434 /* Implement the return_value gdbarch method. */
435
436 static enum return_value_convention
437 csky_return_value (struct gdbarch *gdbarch, struct value *function,
438 struct type *valtype, struct regcache *regcache,
439 gdb_byte *readbuf, const gdb_byte *writebuf)
440 {
441 CORE_ADDR regval;
442 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
443 int len = TYPE_LENGTH (valtype);
444 unsigned int ret_regnum = CSKY_RET_REGNUM;
445
446 /* Csky abi specifies that return values larger than 8 bytes
447 are put on the stack. */
448 if (len > 8)
449 return RETURN_VALUE_STRUCT_CONVENTION;
450 else
451 {
452 if (readbuf != NULL)
453 {
454 ULONGEST tmp;
455 /* By using store_unsigned_integer we avoid having to do
456 anything special for small big-endian values. */
457 regcache->cooked_read (ret_regnum, &tmp);
458 store_unsigned_integer (readbuf, (len > 4 ? 4 : len),
459 byte_order, tmp);
460 if (len > 4)
461 {
462 regcache->cooked_read (ret_regnum + 1, &tmp);
463 store_unsigned_integer (readbuf + 4, 4, byte_order, tmp);
464 }
465 }
466 if (writebuf != NULL)
467 {
468 regval = extract_unsigned_integer (writebuf, len > 4 ? 4 : len,
469 byte_order);
470 regcache_cooked_write_unsigned (regcache, ret_regnum, regval);
471 if (len > 4)
472 {
473 regval = extract_unsigned_integer ((gdb_byte *) writebuf + 4,
474 4, byte_order);
475 regcache_cooked_write_unsigned (regcache, ret_regnum + 1,
476 regval);
477 }
478
479 }
480 return RETURN_VALUE_REGISTER_CONVENTION;
481 }
482 }
483
484 /* Implement the frame_align gdbarch method.
485
486 Adjust the address downward (direction of stack growth) so that it
487 is correctly aligned for a new stack frame. */
488
489 static CORE_ADDR
490 csky_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
491 {
492 return align_down (addr, 4);
493 }
494
495 /* Unwind cache used for gdbarch fallback unwinder. */
496
497 struct csky_unwind_cache
498 {
499 /* The stack pointer at the time this frame was created; i.e. the
500 caller's stack pointer when this function was called. It is used
501 to identify this frame. */
502 CORE_ADDR prev_sp;
503
504 /* The frame base for this frame is just prev_sp - frame size.
505 FRAMESIZE is the distance from the frame pointer to the
506 initial stack pointer. */
507 int framesize;
508
509 /* The register used to hold the frame pointer for this frame. */
510 int framereg;
511
512 /* Saved register offsets. */
513 struct trad_frame_saved_reg *saved_regs;
514 };
515
516 /* Do prologue analysis, returning the PC of the first instruction
517 after the function prologue. */
518
519 static CORE_ADDR
520 csky_analyze_prologue (struct gdbarch *gdbarch,
521 CORE_ADDR start_pc,
522 CORE_ADDR limit_pc,
523 CORE_ADDR end_pc,
524 struct frame_info *this_frame,
525 struct csky_unwind_cache *this_cache,
526 lr_type_t lr_type)
527 {
528 CORE_ADDR addr;
529 unsigned int insn, rn;
530 int framesize = 0;
531 int stacksize = 0;
532 int register_offsets[CSKY_NUM_GREGS_SAVED_GREGS];
533 int insn_len;
534 /* For adjusting fp. */
535 int is_fp_saved = 0;
536 int adjust_fp = 0;
537
538 /* REGISTER_OFFSETS will contain offsets from the top of the frame
539 (NOT the frame pointer) for the various saved registers, or -1
540 if the register is not saved. */
541 for (rn = 0; rn < CSKY_NUM_GREGS_SAVED_GREGS; rn++)
542 register_offsets[rn] = -1;
543
544 /* Analyze the prologue. Things we determine from analyzing the
545 prologue include the size of the frame and which registers are
546 saved (and where). */
547 if (csky_debug)
548 {
549 fprintf_unfiltered (gdb_stdlog,
550 "csky: Scanning prologue: start_pc = 0x%x,"
551 "limit_pc = 0x%x\n", (unsigned int) start_pc,
552 (unsigned int) limit_pc);
553 }
554
555 /* Default to 16 bit instruction. */
556 insn_len = 2;
557 stacksize = 0;
558 for (addr = start_pc; addr < limit_pc; addr += insn_len)
559 {
560 /* Get next insn. */
561 insn_len = csky_get_insn (gdbarch, addr, &insn);
562
563 /* Check if 32 bit. */
564 if (insn_len == 4)
565 {
566 /* subi32 sp,sp oimm12. */
567 if (CSKY_32_IS_SUBI0 (insn))
568 {
569 /* Got oimm12. */
570 int offset = CSKY_32_SUBI_IMM (insn);
571 if (csky_debug)
572 {
573 fprintf_unfiltered (gdb_stdlog,
574 "csky: got subi sp,%d; continuing\n",
575 offset);
576 }
577 stacksize += offset;
578 continue;
579 }
580 /* stm32 ry-rz,(sp). */
581 else if (CSKY_32_IS_STMx0 (insn))
582 {
583 /* Spill register(s). */
584 int start_register;
585 int reg_count;
586 int offset;
587
588 /* BIG WARNING! The CKCore ABI does not restrict functions
589 to taking only one stack allocation. Therefore, when
590 we save a register, we record the offset of where it was
591 saved relative to the current stacksize. This will
592 then give an offset from the SP upon entry to our
593 function. Remember, stacksize is NOT constant until
594 we're done scanning the prologue. */
595 start_register = CSKY_32_STM_VAL_REGNUM (insn);
596 reg_count = CSKY_32_STM_SIZE (insn);
597 if (csky_debug)
598 {
599 fprintf_unfiltered (gdb_stdlog,
600 "csky: got stm r%d-r%d,(sp)\n",
601 start_register,
602 start_register + reg_count);
603 }
604
605 for (rn = start_register, offset = 0;
606 rn <= start_register + reg_count;
607 rn++, offset += 4)
608 {
609 register_offsets[rn] = stacksize - offset;
610 if (csky_debug)
611 {
612 fprintf_unfiltered (gdb_stdlog,
613 "csky: r%d saved at 0x%x"
614 " (offset %d)\n",
615 rn, register_offsets[rn],
616 offset);
617 }
618 }
619 if (csky_debug)
620 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
621 continue;
622 }
623 /* stw ry,(sp,disp). */
624 else if (CSKY_32_IS_STWx0 (insn))
625 {
626 /* Spill register: see note for IS_STM above. */
627 int disp;
628
629 rn = CSKY_32_ST_VAL_REGNUM (insn);
630 disp = CSKY_32_ST_OFFSET (insn);
631 register_offsets[rn] = stacksize - disp;
632 if (csky_debug)
633 print_savedreg_msg (rn, register_offsets, true);
634 continue;
635 }
636 else if (CSKY_32_IS_MOV_FP_SP (insn))
637 {
638 /* SP is saved to FP reg, means code afer prologue may
639 modify SP. */
640 is_fp_saved = 1;
641 adjust_fp = stacksize;
642 continue;
643 }
644 else if (CSKY_32_IS_MFCR_EPSR (insn))
645 {
646 unsigned int insn2;
647 addr += 4;
648 int mfcr_regnum = insn & 0x1f;
649 insn_len = csky_get_insn (gdbarch, addr, &insn2);
650 if (insn_len == 2)
651 {
652 int stw_regnum = (insn2 >> 5) & 0x7;
653 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
654 {
655 int offset;
656
657 /* CSKY_EPSR_REGNUM. */
658 rn = CSKY_NUM_GREGS;
659 offset = CSKY_16_STWx0_OFFSET (insn2);
660 register_offsets[rn] = stacksize - offset;
661 if (csky_debug)
662 print_savedreg_msg (rn, register_offsets, true);
663 continue;
664 }
665 break;
666 }
667 else
668 {
669 /* INSN_LEN == 4. */
670 int stw_regnum = (insn2 >> 21) & 0x1f;
671 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
672 {
673 int offset;
674
675 /* CSKY_EPSR_REGNUM. */
676 rn = CSKY_NUM_GREGS;
677 offset = CSKY_32_ST_OFFSET (insn2);
678 register_offsets[rn] = framesize - offset;
679 if (csky_debug)
680 print_savedreg_msg (rn, register_offsets, true);
681 continue;
682 }
683 break;
684 }
685 }
686 else if (CSKY_32_IS_MFCR_FPSR (insn))
687 {
688 unsigned int insn2;
689 addr += 4;
690 int mfcr_regnum = insn & 0x1f;
691 insn_len = csky_get_insn (gdbarch, addr, &insn2);
692 if (insn_len == 2)
693 {
694 int stw_regnum = (insn2 >> 5) & 0x7;
695 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum
696 == stw_regnum))
697 {
698 int offset;
699
700 /* CSKY_FPSR_REGNUM. */
701 rn = CSKY_NUM_GREGS + 1;
702 offset = CSKY_16_STWx0_OFFSET (insn2);
703 register_offsets[rn] = stacksize - offset;
704 if (csky_debug)
705 print_savedreg_msg (rn, register_offsets, true);
706 continue;
707 }
708 break;
709 }
710 else
711 {
712 /* INSN_LEN == 4. */
713 int stw_regnum = (insn2 >> 21) & 0x1f;
714 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
715 {
716 int offset;
717
718 /* CSKY_FPSR_REGNUM. */
719 rn = CSKY_NUM_GREGS + 1;
720 offset = CSKY_32_ST_OFFSET (insn2);
721 register_offsets[rn] = framesize - offset;
722 if (csky_debug)
723 print_savedreg_msg (rn, register_offsets, true);
724 continue;
725 }
726 break;
727 }
728 }
729 else if (CSKY_32_IS_MFCR_EPC (insn))
730 {
731 unsigned int insn2;
732 addr += 4;
733 int mfcr_regnum = insn & 0x1f;
734 insn_len = csky_get_insn (gdbarch, addr, &insn2);
735 if (insn_len == 2)
736 {
737 int stw_regnum = (insn2 >> 5) & 0x7;
738 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
739 {
740 int offset;
741
742 /* CSKY_EPC_REGNUM. */
743 rn = CSKY_NUM_GREGS + 2;
744 offset = CSKY_16_STWx0_OFFSET (insn2);
745 register_offsets[rn] = stacksize - offset;
746 if (csky_debug)
747 print_savedreg_msg (rn, register_offsets, true);
748 continue;
749 }
750 break;
751 }
752 else
753 {
754 /* INSN_LEN == 4. */
755 int stw_regnum = (insn2 >> 21) & 0x1f;
756 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
757 {
758 int offset;
759
760 /* CSKY_EPC_REGNUM. */
761 rn = CSKY_NUM_GREGS + 2;
762 offset = CSKY_32_ST_OFFSET (insn2);
763 register_offsets[rn] = framesize - offset;
764 if (csky_debug)
765 print_savedreg_msg (rn, register_offsets, true);
766 continue;
767 }
768 break;
769 }
770 }
771 else if (CSKY_32_IS_MFCR_FPC (insn))
772 {
773 unsigned int insn2;
774 addr += 4;
775 int mfcr_regnum = insn & 0x1f;
776 insn_len = csky_get_insn (gdbarch, addr, &insn2);
777 if (insn_len == 2)
778 {
779 int stw_regnum = (insn2 >> 5) & 0x7;
780 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
781 {
782 int offset;
783
784 /* CSKY_FPC_REGNUM. */
785 rn = CSKY_NUM_GREGS + 3;
786 offset = CSKY_16_STWx0_OFFSET (insn2);
787 register_offsets[rn] = stacksize - offset;
788 if (csky_debug)
789 print_savedreg_msg (rn, register_offsets, true);
790 continue;
791 }
792 break;
793 }
794 else
795 {
796 /* INSN_LEN == 4. */
797 int stw_regnum = (insn2 >> 21) & 0x1f;
798 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
799 {
800 int offset;
801
802 /* CSKY_FPC_REGNUM. */
803 rn = CSKY_NUM_GREGS + 3;
804 offset = CSKY_32_ST_OFFSET (insn2);
805 register_offsets[rn] = framesize - offset;
806 if (csky_debug)
807 print_savedreg_msg (rn, register_offsets, true);
808 continue;
809 }
810 break;
811 }
812 }
813 else if (CSKY_32_IS_PUSH (insn))
814 {
815 /* Push for 32_bit. */
816 int offset = 0;
817 if (CSKY_32_IS_PUSH_R29 (insn))
818 {
819 stacksize += 4;
820 register_offsets[29] = stacksize;
821 if (csky_debug)
822 print_savedreg_msg (29, register_offsets, false);
823 offset += 4;
824 }
825 if (CSKY_32_PUSH_LIST2 (insn))
826 {
827 int num = CSKY_32_PUSH_LIST2 (insn);
828 int tmp = 0;
829 stacksize += num * 4;
830 offset += num * 4;
831 if (csky_debug)
832 {
833 fprintf_unfiltered (gdb_stdlog,
834 "csky: push regs_array: r16-r%d\n",
835 16 + num - 1);
836 }
837 for (rn = 16; rn <= 16 + num - 1; rn++)
838 {
839 register_offsets[rn] = stacksize - tmp;
840 if (csky_debug)
841 {
842 fprintf_unfiltered (gdb_stdlog,
843 "csky: r%d saved at 0x%x"
844 " (offset %d)\n", rn,
845 register_offsets[rn], tmp);
846 }
847 tmp += 4;
848 }
849 }
850 if (CSKY_32_IS_PUSH_R15 (insn))
851 {
852 stacksize += 4;
853 register_offsets[15] = stacksize;
854 if (csky_debug)
855 print_savedreg_msg (15, register_offsets, false);
856 offset += 4;
857 }
858 if (CSKY_32_PUSH_LIST1 (insn))
859 {
860 int num = CSKY_32_PUSH_LIST1 (insn);
861 int tmp = 0;
862 stacksize += num * 4;
863 offset += num * 4;
864 if (csky_debug)
865 {
866 fprintf_unfiltered (gdb_stdlog,
867 "csky: push regs_array: r4-r%d\n",
868 4 + num - 1);
869 }
870 for (rn = 4; rn <= 4 + num - 1; rn++)
871 {
872 register_offsets[rn] = stacksize - tmp;
873 if (csky_debug)
874 {
875 fprintf_unfiltered (gdb_stdlog,
876 "csky: r%d saved at 0x%x"
877 " (offset %d)\n", rn,
878 register_offsets[rn], tmp);
879 }
880 tmp += 4;
881 }
882 }
883
884 framesize = stacksize;
885 if (csky_debug)
886 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
887 continue;
888 }
889 else if (CSKY_32_IS_LRW4 (insn) || CSKY_32_IS_MOVI4 (insn)
890 || CSKY_32_IS_MOVIH4 (insn) || CSKY_32_IS_BMASKI4 (insn))
891 {
892 int adjust = 0;
893 int offset = 0;
894 unsigned int insn2;
895
896 if (csky_debug)
897 {
898 fprintf_unfiltered (gdb_stdlog,
899 "csky: looking at large frame\n");
900 }
901 if (CSKY_32_IS_LRW4 (insn))
902 {
903 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
904 int literal_addr = (addr + ((insn & 0xffff) << 2))
905 & 0xfffffffc;
906 adjust = read_memory_unsigned_integer (literal_addr, 4,
907 byte_order);
908 }
909 else if (CSKY_32_IS_MOVI4 (insn))
910 adjust = (insn & 0xffff);
911 else if (CSKY_32_IS_MOVIH4 (insn))
912 adjust = (insn & 0xffff) << 16;
913 else
914 {
915 /* CSKY_32_IS_BMASKI4 (insn). */
916 adjust = (1 << (((insn & 0x3e00000) >> 21) + 1)) - 1;
917 }
918
919 if (csky_debug)
920 {
921 fprintf_unfiltered (gdb_stdlog,
922 "csky: base stacksize=0x%x\n", adjust);
923
924 /* May have zero or more insns which modify r4. */
925 fprintf_unfiltered (gdb_stdlog,
926 "csky: looking for r4 adjusters...\n");
927 }
928
929 offset = 4;
930 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
931 while (CSKY_IS_R4_ADJUSTER (insn2))
932 {
933 if (CSKY_32_IS_ADDI4 (insn2))
934 {
935 int imm = (insn2 & 0xfff) + 1;
936 adjust += imm;
937 if (csky_debug)
938 {
939 fprintf_unfiltered (gdb_stdlog,
940 "csky: addi r4,%d\n", imm);
941 }
942 }
943 else if (CSKY_32_IS_SUBI4 (insn2))
944 {
945 int imm = (insn2 & 0xfff) + 1;
946 adjust -= imm;
947 if (csky_debug)
948 {
949 fprintf_unfiltered (gdb_stdlog,
950 "csky: subi r4,%d\n", imm);
951 }
952 }
953 else if (CSKY_32_IS_NOR4 (insn2))
954 {
955 adjust = ~adjust;
956 if (csky_debug)
957 {
958 fprintf_unfiltered (gdb_stdlog,
959 "csky: nor r4,r4,r4\n");
960 }
961 }
962 else if (CSKY_32_IS_ROTLI4 (insn2))
963 {
964 int imm = ((insn2 >> 21) & 0x1f);
965 int temp = adjust >> (32 - imm);
966 adjust <<= imm;
967 adjust |= temp;
968 if (csky_debug)
969 {
970 fprintf_unfiltered (gdb_stdlog,
971 "csky: rotli r4,r4,%d\n", imm);
972 }
973 }
974 else if (CSKY_32_IS_LISI4 (insn2))
975 {
976 int imm = ((insn2 >> 21) & 0x1f);
977 adjust <<= imm;
978 if (csky_debug)
979 {
980 fprintf_unfiltered (gdb_stdlog,
981 "csky: lsli r4,r4,%d\n", imm);
982 }
983 }
984 else if (CSKY_32_IS_BSETI4 (insn2))
985 {
986 int imm = ((insn2 >> 21) & 0x1f);
987 adjust |= (1 << imm);
988 if (csky_debug)
989 {
990 fprintf_unfiltered (gdb_stdlog,
991 "csky: bseti r4,r4 %d\n", imm);
992 }
993 }
994 else if (CSKY_32_IS_BCLRI4 (insn2))
995 {
996 int imm = ((insn2 >> 21) & 0x1f);
997 adjust &= ~(1 << imm);
998 if (csky_debug)
999 {
1000 fprintf_unfiltered (gdb_stdlog,
1001 "csky: bclri r4,r4 %d\n", imm);
1002 }
1003 }
1004 else if (CSKY_32_IS_IXH4 (insn2))
1005 {
1006 adjust *= 3;
1007 if (csky_debug)
1008 {
1009 fprintf_unfiltered (gdb_stdlog,
1010 "csky: ixh r4,r4,r4\n");
1011 }
1012 }
1013 else if (CSKY_32_IS_IXW4 (insn2))
1014 {
1015 adjust *= 5;
1016 if (csky_debug)
1017 {
1018 fprintf_unfiltered (gdb_stdlog,
1019 "csky: ixw r4,r4,r4\n");
1020 }
1021 }
1022 else if (CSKY_16_IS_ADDI4 (insn2))
1023 {
1024 int imm = (insn2 & 0xff) + 1;
1025 adjust += imm;
1026 if (csky_debug)
1027 {
1028 fprintf_unfiltered (gdb_stdlog,
1029 "csky: addi r4,%d\n", imm);
1030 }
1031 }
1032 else if (CSKY_16_IS_SUBI4 (insn2))
1033 {
1034 int imm = (insn2 & 0xff) + 1;
1035 adjust -= imm;
1036 if (csky_debug)
1037 {
1038 fprintf_unfiltered (gdb_stdlog,
1039 "csky: subi r4,%d\n", imm);
1040 }
1041 }
1042 else if (CSKY_16_IS_NOR4 (insn2))
1043 {
1044 adjust = ~adjust;
1045 if (csky_debug)
1046 {
1047 fprintf_unfiltered (gdb_stdlog,
1048 "csky: nor r4,r4\n");
1049 }
1050 }
1051 else if (CSKY_16_IS_BSETI4 (insn2))
1052 {
1053 int imm = (insn2 & 0x1f);
1054 adjust |= (1 << imm);
1055 if (csky_debug)
1056 {
1057 fprintf_unfiltered (gdb_stdlog,
1058 "csky: bseti r4, %d\n", imm);
1059 }
1060 }
1061 else if (CSKY_16_IS_BCLRI4 (insn2))
1062 {
1063 int imm = (insn2 & 0x1f);
1064 adjust &= ~(1 << imm);
1065 if (csky_debug)
1066 {
1067 fprintf_unfiltered (gdb_stdlog,
1068 "csky: bclri r4, %d\n", imm);
1069 }
1070 }
1071 else if (CSKY_16_IS_LSLI4 (insn2))
1072 {
1073 int imm = (insn2 & 0x1f);
1074 adjust <<= imm;
1075 if (csky_debug)
1076 {
1077 fprintf_unfiltered (gdb_stdlog,
1078 "csky: lsli r4,r4, %d\n", imm);
1079 }
1080 }
1081
1082 offset += insn_len;
1083 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1084 };
1085
1086 if (csky_debug)
1087 {
1088 fprintf_unfiltered (gdb_stdlog, "csky: done looking for"
1089 " r4 adjusters\n");
1090 }
1091
1092 /* If the next insn adjusts the stack pointer, we keep
1093 everything; if not, we scrap it and we've found the
1094 end of the prologue. */
1095 if (CSKY_IS_SUBU4 (insn2))
1096 {
1097 addr += offset;
1098 stacksize += adjust;
1099 if (csky_debug)
1100 {
1101 fprintf_unfiltered (gdb_stdlog,
1102 "csky: found stack adjustment of"
1103 " 0x%x bytes.\n", adjust);
1104 fprintf_unfiltered (gdb_stdlog,
1105 "csky: skipping to new address %s\n",
1106 core_addr_to_string_nz (addr));
1107 fprintf_unfiltered (gdb_stdlog,
1108 "csky: continuing\n");
1109 }
1110 continue;
1111 }
1112
1113 /* None of these instructions are prologue, so don't touch
1114 anything. */
1115 if (csky_debug)
1116 {
1117 fprintf_unfiltered (gdb_stdlog,
1118 "csky: no subu sp,sp,r4; NOT altering"
1119 " stacksize.\n");
1120 }
1121 break;
1122 }
1123 }
1124 else
1125 {
1126 /* insn_len != 4. */
1127
1128 /* subi.sp sp,disp. */
1129 if (CSKY_16_IS_SUBI0 (insn))
1130 {
1131 int offset = CSKY_16_SUBI_IMM (insn);
1132 if (csky_debug)
1133 {
1134 fprintf_unfiltered (gdb_stdlog,
1135 "csky: got subi r0,%d; continuing\n",
1136 offset);
1137 }
1138 stacksize += offset;
1139 continue;
1140 }
1141 /* stw.16 rz,(sp,disp). */
1142 else if (CSKY_16_IS_STWx0 (insn))
1143 {
1144 /* Spill register: see note for IS_STM above. */
1145 int disp;
1146
1147 rn = CSKY_16_ST_VAL_REGNUM (insn);
1148 disp = CSKY_16_ST_OFFSET (insn);
1149 register_offsets[rn] = stacksize - disp;
1150 if (csky_debug)
1151 print_savedreg_msg (rn, register_offsets, true);
1152 continue;
1153 }
1154 else if (CSKY_16_IS_MOV_FP_SP (insn))
1155 {
1156 /* SP is saved to FP reg, means prologue may modify SP. */
1157 is_fp_saved = 1;
1158 adjust_fp = stacksize;
1159 continue;
1160 }
1161 else if (CSKY_16_IS_PUSH (insn))
1162 {
1163 /* Push for 16_bit. */
1164 int offset = 0;
1165 if (CSKY_16_IS_PUSH_R15 (insn))
1166 {
1167 stacksize += 4;
1168 register_offsets[15] = stacksize;
1169 if (csky_debug)
1170 print_savedreg_msg (15, register_offsets, false);
1171 offset += 4;
1172 }
1173 if (CSKY_16_PUSH_LIST1 (insn))
1174 {
1175 int num = CSKY_16_PUSH_LIST1 (insn);
1176 int tmp = 0;
1177 stacksize += num * 4;
1178 offset += num * 4;
1179 if (csky_debug)
1180 {
1181 fprintf_unfiltered (gdb_stdlog,
1182 "csky: push regs_array: r4-r%d\n",
1183 4 + num - 1);
1184 }
1185 for (rn = 4; rn <= 4 + num - 1; rn++)
1186 {
1187 register_offsets[rn] = stacksize - tmp;
1188 if (csky_debug)
1189 {
1190 fprintf_unfiltered (gdb_stdlog,
1191 "csky: r%d saved at 0x%x"
1192 " (offset %d)\n", rn,
1193 register_offsets[rn], offset);
1194 }
1195 tmp += 4;
1196 }
1197 }
1198
1199 framesize = stacksize;
1200 if (csky_debug)
1201 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1202 continue;
1203 }
1204 else if (CSKY_16_IS_LRW4 (insn) || CSKY_16_IS_MOVI4 (insn))
1205 {
1206 int adjust = 0;
1207 unsigned int insn2;
1208
1209 if (csky_debug)
1210 {
1211 fprintf_unfiltered (gdb_stdlog,
1212 "csky: looking at large frame\n");
1213 }
1214 if (CSKY_16_IS_LRW4 (insn))
1215 {
1216 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1217 int offset = ((insn & 0x300) >> 3) | (insn & 0x1f);
1218 int literal_addr = (addr + ( offset << 2)) & 0xfffffffc;
1219 adjust = read_memory_unsigned_integer (literal_addr, 4,
1220 byte_order);
1221 }
1222 else
1223 {
1224 /* CSKY_16_IS_MOVI4 (insn). */
1225 adjust = (insn & 0xff);
1226 }
1227
1228 if (csky_debug)
1229 {
1230 fprintf_unfiltered (gdb_stdlog,
1231 "csky: base stacksize=0x%x\n", adjust);
1232 }
1233
1234 /* May have zero or more instructions which modify r4. */
1235 if (csky_debug)
1236 {
1237 fprintf_unfiltered (gdb_stdlog,
1238 "csky: looking for r4 adjusters...\n");
1239 }
1240 int offset = 2;
1241 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1242 while (CSKY_IS_R4_ADJUSTER (insn2))
1243 {
1244 if (CSKY_32_IS_ADDI4 (insn2))
1245 {
1246 int imm = (insn2 & 0xfff) + 1;
1247 adjust += imm;
1248 if (csky_debug)
1249 {
1250 fprintf_unfiltered (gdb_stdlog,
1251 "csky: addi r4,%d\n", imm);
1252 }
1253 }
1254 else if (CSKY_32_IS_SUBI4 (insn2))
1255 {
1256 int imm = (insn2 & 0xfff) + 1;
1257 adjust -= imm;
1258 if (csky_debug)
1259 {
1260 fprintf_unfiltered (gdb_stdlog,
1261 "csky: subi r4,%d\n", imm);
1262 }
1263 }
1264 else if (CSKY_32_IS_NOR4 (insn2))
1265 {
1266 adjust = ~adjust;
1267 if (csky_debug)
1268 {
1269 fprintf_unfiltered (gdb_stdlog,
1270 "csky: nor r4,r4,r4\n");
1271 }
1272 }
1273 else if (CSKY_32_IS_ROTLI4 (insn2))
1274 {
1275 int imm = ((insn2 >> 21) & 0x1f);
1276 int temp = adjust >> (32 - imm);
1277 adjust <<= imm;
1278 adjust |= temp;
1279 if (csky_debug)
1280 {
1281 fprintf_unfiltered (gdb_stdlog,
1282 "csky: rotli r4,r4,%d\n", imm);
1283 }
1284 }
1285 else if (CSKY_32_IS_LISI4 (insn2))
1286 {
1287 int imm = ((insn2 >> 21) & 0x1f);
1288 adjust <<= imm;
1289 if (csky_debug)
1290 {
1291 fprintf_unfiltered (gdb_stdlog,
1292 "csky: lsli r4,r4,%d\n", imm);
1293 }
1294 }
1295 else if (CSKY_32_IS_BSETI4 (insn2))
1296 {
1297 int imm = ((insn2 >> 21) & 0x1f);
1298 adjust |= (1 << imm);
1299 if (csky_debug)
1300 {
1301 fprintf_unfiltered (gdb_stdlog,
1302 "csky: bseti r4,r4 %d\n", imm);
1303 }
1304 }
1305 else if (CSKY_32_IS_BCLRI4 (insn2))
1306 {
1307 int imm = ((insn2 >> 21) & 0x1f);
1308 adjust &= ~(1 << imm);
1309 if (csky_debug)
1310 {
1311 fprintf_unfiltered (gdb_stdlog,
1312 "csky: bclri r4,r4 %d\n", imm);
1313 }
1314 }
1315 else if (CSKY_32_IS_IXH4 (insn2))
1316 {
1317 adjust *= 3;
1318 if (csky_debug)
1319 {
1320 fprintf_unfiltered (gdb_stdlog,
1321 "csky: ixh r4,r4,r4\n");
1322 }
1323 }
1324 else if (CSKY_32_IS_IXW4 (insn2))
1325 {
1326 adjust *= 5;
1327 if (csky_debug)
1328 {
1329 fprintf_unfiltered (gdb_stdlog,
1330 "csky: ixw r4,r4,r4\n");
1331 }
1332 }
1333 else if (CSKY_16_IS_ADDI4 (insn2))
1334 {
1335 int imm = (insn2 & 0xff) + 1;
1336 adjust += imm;
1337 if (csky_debug)
1338 {
1339 fprintf_unfiltered (gdb_stdlog,
1340 "csky: addi r4,%d\n", imm);
1341 }
1342 }
1343 else if (CSKY_16_IS_SUBI4 (insn2))
1344 {
1345 int imm = (insn2 & 0xff) + 1;
1346 adjust -= imm;
1347 if (csky_debug)
1348 {
1349 fprintf_unfiltered (gdb_stdlog,
1350 "csky: subi r4,%d\n", imm);
1351 }
1352 }
1353 else if (CSKY_16_IS_NOR4 (insn2))
1354 {
1355 adjust = ~adjust;
1356 if (csky_debug)
1357 {
1358 fprintf_unfiltered (gdb_stdlog,
1359 "csky: nor r4,r4\n");
1360 }
1361 }
1362 else if (CSKY_16_IS_BSETI4 (insn2))
1363 {
1364 int imm = (insn2 & 0x1f);
1365 adjust |= (1 << imm);
1366 if (csky_debug)
1367 {
1368 fprintf_unfiltered (gdb_stdlog,
1369 "csky: bseti r4, %d\n", imm);
1370 }
1371 }
1372 else if (CSKY_16_IS_BCLRI4 (insn2))
1373 {
1374 int imm = (insn2 & 0x1f);
1375 adjust &= ~(1 << imm);
1376 if (csky_debug)
1377 {
1378 fprintf_unfiltered (gdb_stdlog,
1379 "csky: bclri r4, %d\n", imm);
1380 }
1381 }
1382 else if (CSKY_16_IS_LSLI4 (insn2))
1383 {
1384 int imm = (insn2 & 0x1f);
1385 adjust <<= imm;
1386 if (csky_debug)
1387 {
1388 fprintf_unfiltered (gdb_stdlog,
1389 "csky: lsli r4,r4, %d\n", imm);
1390 }
1391 }
1392
1393 offset += insn_len;
1394 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1395 };
1396
1397 if (csky_debug)
1398 {
1399 fprintf_unfiltered (gdb_stdlog, "csky: "
1400 "done looking for r4 adjusters\n");
1401 }
1402
1403 /* If the next instruction adjusts the stack pointer, we keep
1404 everything; if not, we scrap it and we've found the end
1405 of the prologue. */
1406 if (CSKY_IS_SUBU4 (insn2))
1407 {
1408 addr += offset;
1409 stacksize += adjust;
1410 if (csky_debug)
1411 {
1412 fprintf_unfiltered (gdb_stdlog, "csky: "
1413 "found stack adjustment of 0x%x"
1414 " bytes.\n", adjust);
1415 fprintf_unfiltered (gdb_stdlog, "csky: "
1416 "skipping to new address %s\n",
1417 core_addr_to_string_nz (addr));
1418 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1419 }
1420 continue;
1421 }
1422
1423 /* None of these instructions are prologue, so don't touch
1424 anything. */
1425 if (csky_debug)
1426 {
1427 fprintf_unfiltered (gdb_stdlog, "csky: no subu sp,r4; "
1428 "NOT altering stacksize.\n");
1429 }
1430 break;
1431 }
1432 }
1433
1434 /* This is not a prologue instruction, so stop here. */
1435 if (csky_debug)
1436 {
1437 fprintf_unfiltered (gdb_stdlog, "csky: insn is not a prologue"
1438 " insn -- ending scan\n");
1439 }
1440 break;
1441 }
1442
1443 if (this_cache)
1444 {
1445 CORE_ADDR unwound_fp;
1446 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1447 this_cache->framesize = framesize;
1448
1449 if (is_fp_saved)
1450 {
1451 this_cache->framereg = CSKY_FP_REGNUM;
1452 unwound_fp = get_frame_register_unsigned (this_frame,
1453 this_cache->framereg);
1454 this_cache->prev_sp = unwound_fp + adjust_fp;
1455 }
1456 else
1457 {
1458 this_cache->framereg = CSKY_SP_REGNUM;
1459 unwound_fp = get_frame_register_unsigned (this_frame,
1460 this_cache->framereg);
1461 this_cache->prev_sp = unwound_fp + stacksize;
1462 }
1463
1464 /* Note where saved registers are stored. The offsets in
1465 REGISTER_OFFSETS are computed relative to the top of the frame. */
1466 for (rn = 0; rn < CSKY_NUM_GREGS; rn++)
1467 {
1468 if (register_offsets[rn] >= 0)
1469 {
1470 this_cache->saved_regs[rn].addr
1471 = this_cache->prev_sp - register_offsets[rn];
1472 if (csky_debug)
1473 {
1474 CORE_ADDR rn_value = read_memory_unsigned_integer (
1475 this_cache->saved_regs[rn].addr, 4, byte_order);
1476 fprintf_unfiltered (gdb_stdlog, "Saved register %s "
1477 "stored at 0x%08lx, value=0x%08lx\n",
1478 csky_register_names[rn],
1479 (unsigned long)
1480 this_cache->saved_regs[rn].addr,
1481 (unsigned long) rn_value);
1482 }
1483 }
1484 }
1485 if (lr_type == LR_TYPE_EPC)
1486 {
1487 /* rte || epc . */
1488 this_cache->saved_regs[CSKY_PC_REGNUM]
1489 = this_cache->saved_regs[CSKY_EPC_REGNUM];
1490 }
1491 else if (lr_type == LR_TYPE_FPC)
1492 {
1493 /* rfi || fpc . */
1494 this_cache->saved_regs[CSKY_PC_REGNUM]
1495 = this_cache->saved_regs[CSKY_FPC_REGNUM];
1496 }
1497 else
1498 {
1499 this_cache->saved_regs[CSKY_PC_REGNUM]
1500 = this_cache->saved_regs[CSKY_LR_REGNUM];
1501 }
1502 }
1503
1504 return addr;
1505 }
1506
1507 /* Detect whether PC is at a point where the stack frame has been
1508 destroyed. */
1509
1510 static int
1511 csky_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1512 {
1513 unsigned int insn;
1514 CORE_ADDR addr;
1515 CORE_ADDR func_start, func_end;
1516
1517 if (!find_pc_partial_function (pc, NULL, &func_start, &func_end))
1518 return 0;
1519
1520 bool fp_saved = false;
1521 int insn_len;
1522 for (addr = func_start; addr < func_end; addr += insn_len)
1523 {
1524 /* Get next insn. */
1525 insn_len = csky_get_insn (gdbarch, addr, &insn);
1526
1527 if (insn_len == 2)
1528 {
1529 /* Is sp is saved to fp. */
1530 if (CSKY_16_IS_MOV_FP_SP (insn))
1531 fp_saved = true;
1532 /* If sp was saved to fp and now being restored from
1533 fp then it indicates the start of epilog. */
1534 else if (fp_saved && CSKY_16_IS_MOV_SP_FP (insn))
1535 return pc >= addr;
1536 }
1537 }
1538 return 0;
1539 }
1540
1541 /* Implement the skip_prologue gdbarch hook. */
1542
1543 static CORE_ADDR
1544 csky_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1545 {
1546 CORE_ADDR func_addr, func_end;
1547 struct symtab_and_line sal;
1548 const int default_search_limit = 128;
1549
1550 /* See if we can find the end of the prologue using the symbol table. */
1551 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
1552 {
1553 CORE_ADDR post_prologue_pc
1554 = skip_prologue_using_sal (gdbarch, func_addr);
1555
1556 if (post_prologue_pc != 0)
1557 return std::max (pc, post_prologue_pc);
1558 }
1559 else
1560 func_end = pc + default_search_limit;
1561
1562 /* Find the end of prologue. Default lr_type. */
1563 return csky_analyze_prologue (gdbarch, pc, func_end, func_end,
1564 NULL, NULL, LR_TYPE_R15);
1565 }
1566
1567 /* Implement the breakpoint_kind_from_pc gdbarch method. */
1568
1569 static int
1570 csky_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
1571 {
1572 if (csky_pc_is_csky16 (gdbarch, *pcptr))
1573 return CSKY_INSN_SIZE16;
1574 else
1575 return CSKY_INSN_SIZE32;
1576 }
1577
1578 /* Implement the sw_breakpoint_from_kind gdbarch method. */
1579
1580 static const gdb_byte *
1581 csky_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
1582 {
1583 *size = kind;
1584 if (kind == CSKY_INSN_SIZE16)
1585 {
1586 static gdb_byte csky_16_breakpoint[] = { 0, 0 };
1587 return csky_16_breakpoint;
1588 }
1589 else
1590 {
1591 static gdb_byte csky_32_breakpoint[] = { 0, 0, 0, 0 };
1592 return csky_32_breakpoint;
1593 }
1594 }
1595
1596 /* Implement the memory_insert_breakpoint gdbarch method. */
1597
1598 static int
1599 csky_memory_insert_breakpoint (struct gdbarch *gdbarch,
1600 struct bp_target_info *bp_tgt)
1601 {
1602 int val;
1603 const unsigned char *bp;
1604 gdb_byte bp_write_record1[] = { 0, 0, 0, 0 };
1605 gdb_byte bp_write_record2[] = { 0, 0, 0, 0 };
1606 gdb_byte bp_record[] = { 0, 0, 0, 0 };
1607
1608 /* Sanity-check bp_address. */
1609 if (bp_tgt->reqstd_address % 2)
1610 warning (_("Invalid breakpoint address 0x%x is an odd number."),
1611 (unsigned int) bp_tgt->reqstd_address);
1612 scoped_restore restore_memory
1613 = make_scoped_restore_show_memory_breakpoints (1);
1614
1615 /* Determine appropriate breakpoint_kind for this address. */
1616 bp_tgt->kind = csky_breakpoint_kind_from_pc (gdbarch,
1617 &bp_tgt->reqstd_address);
1618
1619 /* Save the memory contents. */
1620 bp_tgt->shadow_len = bp_tgt->kind;
1621
1622 /* Fill bp_tgt->placed_address. */
1623 bp_tgt->placed_address = bp_tgt->reqstd_address;
1624
1625 if (bp_tgt->kind == CSKY_INSN_SIZE16)
1626 {
1627 if ((bp_tgt->reqstd_address % 4) == 0)
1628 {
1629 /* Read two bytes. */
1630 val = target_read_memory (bp_tgt->reqstd_address,
1631 bp_tgt->shadow_contents, 2);
1632 if (val)
1633 return val;
1634
1635 /* Read two bytes. */
1636 val = target_read_memory (bp_tgt->reqstd_address + 2,
1637 bp_record, 2);
1638 if (val)
1639 return val;
1640
1641 /* Write the breakpoint. */
1642 bp_write_record1[2] = bp_record[0];
1643 bp_write_record1[3] = bp_record[1];
1644 bp = bp_write_record1;
1645 val = target_write_raw_memory (bp_tgt->reqstd_address, bp,
1646 CSKY_WR_BKPT_MODE);
1647 }
1648 else
1649 {
1650 val = target_read_memory (bp_tgt->reqstd_address,
1651 bp_tgt->shadow_contents, 2);
1652 if (val)
1653 return val;
1654
1655 val = target_read_memory (bp_tgt->reqstd_address - 2,
1656 bp_record, 2);
1657 if (val)
1658 return val;
1659
1660 /* Write the breakpoint. */
1661 bp_write_record1[0] = bp_record[0];
1662 bp_write_record1[1] = bp_record[1];
1663 bp = bp_write_record1;
1664 val = target_write_raw_memory (bp_tgt->reqstd_address - 2,
1665 bp, CSKY_WR_BKPT_MODE);
1666 }
1667 }
1668 else
1669 {
1670 if (bp_tgt->placed_address % 4 == 0)
1671 {
1672 val = target_read_memory (bp_tgt->reqstd_address,
1673 bp_tgt->shadow_contents,
1674 CSKY_WR_BKPT_MODE);
1675 if (val)
1676 return val;
1677
1678 /* Write the breakpoint. */
1679 bp = bp_write_record1;
1680 val = target_write_raw_memory (bp_tgt->reqstd_address,
1681 bp, CSKY_WR_BKPT_MODE);
1682 }
1683 else
1684 {
1685 val = target_read_memory (bp_tgt->reqstd_address,
1686 bp_tgt->shadow_contents,
1687 CSKY_WR_BKPT_MODE);
1688 if (val)
1689 return val;
1690
1691 val = target_read_memory (bp_tgt->reqstd_address - 2,
1692 bp_record, 2);
1693 if (val)
1694 return val;
1695
1696 val = target_read_memory (bp_tgt->reqstd_address + 4,
1697 bp_record + 2, 2);
1698 if (val)
1699 return val;
1700
1701 bp_write_record1[0] = bp_record[0];
1702 bp_write_record1[1] = bp_record[1];
1703 bp_write_record2[2] = bp_record[2];
1704 bp_write_record2[3] = bp_record[3];
1705
1706 /* Write the breakpoint. */
1707 bp = bp_write_record1;
1708 val = target_write_raw_memory (bp_tgt->reqstd_address - 2, bp,
1709 CSKY_WR_BKPT_MODE);
1710 if (val)
1711 return val;
1712
1713 /* Write the breakpoint. */
1714 bp = bp_write_record2;
1715 val = target_write_raw_memory (bp_tgt->reqstd_address + 2, bp,
1716 CSKY_WR_BKPT_MODE);
1717 }
1718 }
1719 return val;
1720 }
1721
1722 /* Restore the breakpoint shadow_contents to the target. */
1723
1724 static int
1725 csky_memory_remove_breakpoint (struct gdbarch *gdbarch,
1726 struct bp_target_info *bp_tgt)
1727 {
1728 int val;
1729 gdb_byte bp_record[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
1730 /* Different for shadow_len 2 or 4. */
1731 if (bp_tgt->shadow_len == 2)
1732 {
1733 /* Do word-sized writes on word-aligned boundaries and read
1734 padding bytes as necessary. */
1735 if (bp_tgt->reqstd_address % 4 == 0)
1736 {
1737 val = target_read_memory (bp_tgt->reqstd_address + 2,
1738 bp_record + 2, 2);
1739 if (val)
1740 return val;
1741 bp_record[0] = bp_tgt->shadow_contents[0];
1742 bp_record[1] = bp_tgt->shadow_contents[1];
1743 return target_write_raw_memory (bp_tgt->reqstd_address,
1744 bp_record, CSKY_WR_BKPT_MODE);
1745 }
1746 else
1747 {
1748 val = target_read_memory (bp_tgt->reqstd_address - 2,
1749 bp_record, 2);
1750 if (val)
1751 return val;
1752 bp_record[2] = bp_tgt->shadow_contents[0];
1753 bp_record[3] = bp_tgt->shadow_contents[1];
1754 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1755 bp_record, CSKY_WR_BKPT_MODE);
1756 }
1757 }
1758 else
1759 {
1760 /* Do word-sized writes on word-aligned boundaries and read
1761 padding bytes as necessary. */
1762 if (bp_tgt->placed_address % 4 == 0)
1763 {
1764 return target_write_raw_memory (bp_tgt->reqstd_address,
1765 bp_tgt->shadow_contents,
1766 CSKY_WR_BKPT_MODE);
1767 }
1768 else
1769 {
1770 val = target_read_memory (bp_tgt->reqstd_address - 2,
1771 bp_record, 2);
1772 if (val)
1773 return val;
1774 val = target_read_memory (bp_tgt->reqstd_address + 4,
1775 bp_record+6, 2);
1776 if (val)
1777 return val;
1778
1779 bp_record[2] = bp_tgt->shadow_contents[0];
1780 bp_record[3] = bp_tgt->shadow_contents[1];
1781 bp_record[4] = bp_tgt->shadow_contents[2];
1782 bp_record[5] = bp_tgt->shadow_contents[3];
1783
1784 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1785 bp_record,
1786 CSKY_WR_BKPT_MODE * 2);
1787 }
1788 }
1789 }
1790
1791 /* Determine link register type. */
1792
1793 static lr_type_t
1794 csky_analyze_lr_type (struct gdbarch *gdbarch,
1795 CORE_ADDR start_pc, CORE_ADDR end_pc)
1796 {
1797 CORE_ADDR addr;
1798 unsigned int insn, insn_len;
1799 insn_len = 2;
1800
1801 for (addr = start_pc; addr < end_pc; addr += insn_len)
1802 {
1803 insn_len = csky_get_insn (gdbarch, addr, &insn);
1804 if (insn_len == 4)
1805 {
1806 if (CSKY_32_IS_MFCR_EPSR (insn) || CSKY_32_IS_MFCR_EPC (insn)
1807 || CSKY_32_IS_RTE (insn))
1808 return LR_TYPE_EPC;
1809 }
1810 else if (CSKY_32_IS_MFCR_FPSR (insn) || CSKY_32_IS_MFCR_FPC (insn)
1811 || CSKY_32_IS_RFI (insn))
1812 return LR_TYPE_FPC;
1813 else if (CSKY_32_IS_JMP (insn) || CSKY_32_IS_BR (insn)
1814 || CSKY_32_IS_JMPIX (insn) || CSKY_32_IS_JMPI (insn))
1815 return LR_TYPE_R15;
1816 else
1817 {
1818 /* 16 bit instruction. */
1819 if (CSKY_16_IS_JMP (insn) || CSKY_16_IS_BR (insn)
1820 || CSKY_16_IS_JMPIX (insn))
1821 return LR_TYPE_R15;
1822 }
1823 }
1824 return LR_TYPE_R15;
1825 }
1826
1827 /* Heuristic unwinder. */
1828
1829 static struct csky_unwind_cache *
1830 csky_frame_unwind_cache (struct frame_info *this_frame)
1831 {
1832 CORE_ADDR prologue_start, prologue_end, func_end, prev_pc, block_addr;
1833 struct csky_unwind_cache *cache;
1834 const struct block *bl;
1835 unsigned long func_size = 0;
1836 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1837 unsigned int sp_regnum = CSKY_SP_REGNUM;
1838
1839 /* Default lr type is r15. */
1840 lr_type_t lr_type = LR_TYPE_R15;
1841
1842 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1843 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1844
1845 /* Assume there is no frame until proven otherwise. */
1846 cache->framereg = sp_regnum;
1847
1848 cache->framesize = 0;
1849
1850 prev_pc = get_frame_pc (this_frame);
1851 block_addr = get_frame_address_in_block (this_frame);
1852 if (find_pc_partial_function (block_addr, NULL, &prologue_start,
1853 &func_end) == 0)
1854 /* We couldn't find a function containing block_addr, so bail out
1855 and hope for the best. */
1856 return cache;
1857
1858 /* Get the (function) symbol matching prologue_start. */
1859 bl = block_for_pc (prologue_start);
1860 if (bl != NULL)
1861 func_size = bl->endaddr - bl->startaddr;
1862 else
1863 {
1864 struct bound_minimal_symbol msymbol
1865 = lookup_minimal_symbol_by_pc (prologue_start);
1866 if (msymbol.minsym != NULL)
1867 func_size = MSYMBOL_SIZE (msymbol.minsym);
1868 }
1869
1870 /* If FUNC_SIZE is 0 we may have a special-case use of lr
1871 e.g. exception or interrupt. */
1872 if (func_size == 0)
1873 lr_type = csky_analyze_lr_type (gdbarch, prologue_start, func_end);
1874
1875 prologue_end = std::min (func_end, prev_pc);
1876
1877 /* Analyze the function prologue. */
1878 csky_analyze_prologue (gdbarch, prologue_start, prologue_end,
1879 func_end, this_frame, cache, lr_type);
1880
1881 /* gdbarch_sp_regnum contains the value and not the address. */
1882 trad_frame_set_value (cache->saved_regs, sp_regnum, cache->prev_sp);
1883 return cache;
1884 }
1885
1886 /* Implement the unwind_pc gdbarch method. */
1887
1888 static CORE_ADDR
1889 csky_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1890 {
1891 return frame_unwind_register_unsigned (next_frame, CSKY_PC_REGNUM);
1892 }
1893
1894 /* Implement the this_id function for the normal unwinder. */
1895
1896 static void
1897 csky_frame_this_id (struct frame_info *this_frame,
1898 void **this_prologue_cache, struct frame_id *this_id)
1899 {
1900 struct csky_unwind_cache *cache;
1901 struct frame_id id;
1902
1903 if (*this_prologue_cache == NULL)
1904 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1905 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1906
1907 /* This marks the outermost frame. */
1908 if (cache->prev_sp == 0)
1909 return;
1910
1911 id = frame_id_build (cache->prev_sp, get_frame_func (this_frame));
1912 *this_id = id;
1913 }
1914
1915 /* Implement the prev_register function for the normal unwinder. */
1916
1917 static struct value *
1918 csky_frame_prev_register (struct frame_info *this_frame,
1919 void **this_prologue_cache, int regnum)
1920 {
1921 struct csky_unwind_cache *cache;
1922
1923 if (*this_prologue_cache == NULL)
1924 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1925 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1926
1927 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1928 regnum);
1929 }
1930
1931 /* Data structures for the normal prologue-analysis-based
1932 unwinder. */
1933
1934 static const struct frame_unwind csky_unwind_cache = {
1935 NORMAL_FRAME,
1936 default_frame_unwind_stop_reason,
1937 csky_frame_this_id,
1938 csky_frame_prev_register,
1939 NULL,
1940 default_frame_sniffer,
1941 NULL,
1942 NULL
1943 };
1944
1945
1946
1947 static int
1948 csky_stub_unwind_sniffer (const struct frame_unwind *self,
1949 struct frame_info *this_frame,
1950 void **this_prologue_cache)
1951 {
1952 CORE_ADDR addr_in_block;
1953
1954 addr_in_block = get_frame_address_in_block (this_frame);
1955
1956 if (find_pc_partial_function (addr_in_block, NULL, NULL, NULL) == 0
1957 || in_plt_section (addr_in_block))
1958 return 1;
1959
1960 return 0;
1961 }
1962
1963 static struct csky_unwind_cache *
1964 csky_make_stub_cache (struct frame_info *this_frame)
1965 {
1966 struct csky_unwind_cache *cache;
1967
1968 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1969 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1970 cache->prev_sp = get_frame_register_unsigned (this_frame, CSKY_SP_REGNUM);
1971
1972 return cache;
1973 }
1974
1975 static void
1976 csky_stub_this_id (struct frame_info *this_frame,
1977 void **this_cache,
1978 struct frame_id *this_id)
1979 {
1980 struct csky_unwind_cache *cache;
1981
1982 if (*this_cache == NULL)
1983 *this_cache = csky_make_stub_cache (this_frame);
1984 cache = (struct csky_unwind_cache *) *this_cache;
1985
1986 /* Our frame ID for a stub frame is the current SP and LR. */
1987 *this_id = frame_id_build (cache->prev_sp, get_frame_pc (this_frame));
1988 }
1989
1990 static struct value *
1991 csky_stub_prev_register (struct frame_info *this_frame,
1992 void **this_cache,
1993 int prev_regnum)
1994 {
1995 struct csky_unwind_cache *cache;
1996
1997 if (*this_cache == NULL)
1998 *this_cache = csky_make_stub_cache (this_frame);
1999 cache = (struct csky_unwind_cache *) *this_cache;
2000
2001 /* If we are asked to unwind the PC, then return the LR. */
2002 if (prev_regnum == CSKY_PC_REGNUM)
2003 {
2004 CORE_ADDR lr;
2005
2006 lr = frame_unwind_register_unsigned (this_frame, CSKY_LR_REGNUM);
2007 return frame_unwind_got_constant (this_frame, prev_regnum, lr);
2008 }
2009
2010 if (prev_regnum == CSKY_SP_REGNUM)
2011 return frame_unwind_got_constant (this_frame, prev_regnum, cache->prev_sp);
2012
2013 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
2014 prev_regnum);
2015 }
2016
2017 struct frame_unwind csky_stub_unwind = {
2018 NORMAL_FRAME,
2019 default_frame_unwind_stop_reason,
2020 csky_stub_this_id,
2021 csky_stub_prev_register,
2022 NULL,
2023 csky_stub_unwind_sniffer
2024 };
2025
2026 /* Implement the this_base, this_locals, and this_args hooks
2027 for the normal unwinder. */
2028
2029 static CORE_ADDR
2030 csky_frame_base_address (struct frame_info *this_frame, void **this_cache)
2031 {
2032 struct csky_unwind_cache *cache;
2033
2034 if (*this_cache == NULL)
2035 *this_cache = csky_frame_unwind_cache (this_frame);
2036 cache = (struct csky_unwind_cache *) *this_cache;
2037
2038 return cache->prev_sp - cache->framesize;
2039 }
2040
2041 static const struct frame_base csky_frame_base = {
2042 &csky_unwind_cache,
2043 csky_frame_base_address,
2044 csky_frame_base_address,
2045 csky_frame_base_address
2046 };
2047
2048 /* Implement the dummy_id gdbarch method. The frame ID's base
2049 needs to match the TOS value saved by save_dummy_frame_tos,
2050 and the PC should match the dummy frame's breakpoint. */
2051
2052 static struct frame_id
2053 csky_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
2054 {
2055 unsigned int sp_regnum = CSKY_SP_REGNUM;
2056
2057 CORE_ADDR sp = get_frame_register_unsigned (this_frame, sp_regnum);
2058 return frame_id_build (sp, get_frame_pc (this_frame));
2059 }
2060
2061 /* Initialize register access method. */
2062
2063 static void
2064 csky_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2065 struct dwarf2_frame_state_reg *reg,
2066 struct frame_info *this_frame)
2067 {
2068 if (regnum == gdbarch_pc_regnum (gdbarch))
2069 reg->how = DWARF2_FRAME_REG_RA;
2070 else if (regnum == gdbarch_sp_regnum (gdbarch))
2071 reg->how = DWARF2_FRAME_REG_CFA;
2072 }
2073
2074 /* Create csky register groups. */
2075
2076 static void
2077 csky_init_reggroup ()
2078 {
2079 cr_reggroup = reggroup_new ("cr", USER_REGGROUP);
2080 fr_reggroup = reggroup_new ("fr", USER_REGGROUP);
2081 vr_reggroup = reggroup_new ("vr", USER_REGGROUP);
2082 mmu_reggroup = reggroup_new ("mmu", USER_REGGROUP);
2083 prof_reggroup = reggroup_new ("profiling", USER_REGGROUP);
2084 }
2085
2086 /* Add register groups into reggroup list. */
2087
2088 static void
2089 csky_add_reggroups (struct gdbarch *gdbarch)
2090 {
2091 reggroup_add (gdbarch, all_reggroup);
2092 reggroup_add (gdbarch, general_reggroup);
2093 reggroup_add (gdbarch, cr_reggroup);
2094 reggroup_add (gdbarch, fr_reggroup);
2095 reggroup_add (gdbarch, vr_reggroup);
2096 reggroup_add (gdbarch, mmu_reggroup);
2097 reggroup_add (gdbarch, prof_reggroup);
2098 }
2099
2100 /* Return the groups that a CSKY register can be categorised into. */
2101
2102 static int
2103 csky_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2104 struct reggroup *reggroup)
2105 {
2106 int raw_p;
2107
2108 if (gdbarch_register_name (gdbarch, regnum) == NULL
2109 || gdbarch_register_name (gdbarch, regnum)[0] == '\0')
2110 return 0;
2111
2112 if (reggroup == all_reggroup)
2113 return 1;
2114
2115 raw_p = regnum < gdbarch_num_regs (gdbarch);
2116 if (reggroup == save_reggroup || reggroup == restore_reggroup)
2117 return raw_p;
2118
2119 if (((regnum >= CSKY_R0_REGNUM) && (regnum <= CSKY_R0_REGNUM + 31))
2120 && (reggroup == general_reggroup))
2121 return 1;
2122
2123 if (((regnum == CSKY_PC_REGNUM)
2124 || ((regnum >= CSKY_CR0_REGNUM)
2125 && (regnum <= CSKY_CR0_REGNUM + 30)))
2126 && (reggroup == cr_reggroup))
2127 return 2;
2128
2129 if ((((regnum >= CSKY_VR0_REGNUM) && (regnum <= CSKY_VR0_REGNUM + 15))
2130 || ((regnum >= CSKY_VCR0_REGNUM)
2131 && (regnum <= CSKY_VCR0_REGNUM + 2)))
2132 && (reggroup == vr_reggroup))
2133 return 3;
2134
2135 if (((regnum >= CSKY_MMU_REGNUM) && (regnum <= CSKY_MMU_REGNUM + 8))
2136 && (reggroup == mmu_reggroup))
2137 return 4;
2138
2139 if (((regnum >= CSKY_PROFCR_REGNUM)
2140 && (regnum <= CSKY_PROFCR_REGNUM + 48))
2141 && (reggroup == prof_reggroup))
2142 return 5;
2143
2144 if ((((regnum >= CSKY_FR0_REGNUM) && (regnum <= CSKY_FR0_REGNUM + 15))
2145 || ((regnum >= CSKY_VCR0_REGNUM) && (regnum <= CSKY_VCR0_REGNUM + 2)))
2146 && (reggroup == fr_reggroup))
2147 return 6;
2148
2149 return 0;
2150 }
2151
2152 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
2153
2154 static int
2155 csky_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
2156 {
2157 if (dw_reg < 0 || dw_reg >= CSKY_NUM_REGS)
2158 return -1;
2159 return dw_reg;
2160 }
2161
2162 /* Override interface for command: info register. */
2163
2164 static void
2165 csky_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
2166 struct frame_info *frame, int regnum, int all)
2167 {
2168 /* Call default print_registers_info function. */
2169 default_print_registers_info (gdbarch, file, frame, regnum, all);
2170
2171 /* For command: info register. */
2172 if (regnum == -1 && all == 0)
2173 {
2174 default_print_registers_info (gdbarch, file, frame,
2175 CSKY_PC_REGNUM, 0);
2176 default_print_registers_info (gdbarch, file, frame,
2177 CSKY_EPC_REGNUM, 0);
2178 default_print_registers_info (gdbarch, file, frame,
2179 CSKY_CR0_REGNUM, 0);
2180 default_print_registers_info (gdbarch, file, frame,
2181 CSKY_EPSR_REGNUM, 0);
2182 }
2183 return;
2184 }
2185
2186 /* Initialize the current architecture based on INFO. If possible,
2187 re-use an architecture from ARCHES, which is a list of
2188 architectures already created during this debugging session.
2189
2190 Called at program startup, when reading a core file, and when
2191 reading a binary file. */
2192
2193 static struct gdbarch *
2194 csky_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2195 {
2196 struct gdbarch *gdbarch;
2197 struct gdbarch_tdep *tdep;
2198
2199 /* Find a candidate among the list of pre-declared architectures. */
2200 arches = gdbarch_list_lookup_by_info (arches, &info);
2201 if (arches != NULL)
2202 return arches->gdbarch;
2203
2204 /* None found, create a new architecture from the information
2205 provided. */
2206 tdep = XCNEW (struct gdbarch_tdep);
2207 gdbarch = gdbarch_alloc (&info, tdep);
2208
2209 /* Target data types. */
2210 set_gdbarch_ptr_bit (gdbarch, 32);
2211 set_gdbarch_addr_bit (gdbarch, 32);
2212 set_gdbarch_short_bit (gdbarch, 16);
2213 set_gdbarch_int_bit (gdbarch, 32);
2214 set_gdbarch_long_bit (gdbarch, 32);
2215 set_gdbarch_long_long_bit (gdbarch, 64);
2216 set_gdbarch_float_bit (gdbarch, 32);
2217 set_gdbarch_double_bit (gdbarch, 64);
2218 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
2219 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
2220
2221 /* Information about the target architecture. */
2222 set_gdbarch_return_value (gdbarch, csky_return_value);
2223 set_gdbarch_breakpoint_kind_from_pc (gdbarch, csky_breakpoint_kind_from_pc);
2224 set_gdbarch_sw_breakpoint_from_kind (gdbarch, csky_sw_breakpoint_from_kind);
2225
2226 /* Register architecture. */
2227 set_gdbarch_num_regs (gdbarch, CSKY_NUM_REGS);
2228 set_gdbarch_pc_regnum (gdbarch, CSKY_PC_REGNUM);
2229 set_gdbarch_sp_regnum (gdbarch, CSKY_SP_REGNUM);
2230 set_gdbarch_register_name (gdbarch, csky_register_name);
2231 set_gdbarch_register_type (gdbarch, csky_register_type);
2232 set_gdbarch_read_pc (gdbarch, csky_read_pc);
2233 set_gdbarch_write_pc (gdbarch, csky_write_pc);
2234 set_gdbarch_print_registers_info (gdbarch, csky_print_registers_info);
2235 csky_add_reggroups (gdbarch);
2236 set_gdbarch_register_reggroup_p (gdbarch, csky_register_reggroup_p);
2237 set_gdbarch_stab_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2238 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2239 dwarf2_frame_set_init_reg (gdbarch, csky_dwarf2_frame_init_reg);
2240
2241 /* Functions to analyze frames. */
2242 frame_base_set_default (gdbarch, &csky_frame_base);
2243 set_gdbarch_skip_prologue (gdbarch, csky_skip_prologue);
2244 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2245 set_gdbarch_frame_align (gdbarch, csky_frame_align);
2246 set_gdbarch_stack_frame_destroyed_p (gdbarch, csky_stack_frame_destroyed_p);
2247
2248 /* Functions to access frame data. */
2249 set_gdbarch_unwind_pc (gdbarch, csky_unwind_pc);
2250 set_gdbarch_unwind_sp (gdbarch, csky_unwind_sp);
2251
2252 /* Functions handling dummy frames. */
2253 set_gdbarch_push_dummy_call (gdbarch, csky_push_dummy_call);
2254 set_gdbarch_dummy_id (gdbarch, csky_dummy_id);
2255
2256 /* Frame unwinders. Use DWARF debug info if available,
2257 otherwise use our own unwinder. */
2258 dwarf2_append_unwinders (gdbarch);
2259 frame_unwind_append_unwinder (gdbarch, &csky_stub_unwind);
2260 frame_unwind_append_unwinder (gdbarch, &csky_unwind_cache);
2261
2262 /* Breakpoints. */
2263 set_gdbarch_memory_insert_breakpoint (gdbarch,
2264 csky_memory_insert_breakpoint);
2265 set_gdbarch_memory_remove_breakpoint (gdbarch,
2266 csky_memory_remove_breakpoint);
2267
2268 /* Hook in ABI-specific overrides, if they have been registered. */
2269 gdbarch_init_osabi (info, gdbarch);
2270
2271 /* Support simple overlay manager. */
2272 set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
2273 set_gdbarch_char_signed (gdbarch, 0);
2274 return gdbarch;
2275 }
2276
2277 void
2278 _initialize_csky_tdep (void)
2279 {
2280
2281 register_gdbarch_init (bfd_arch_csky, csky_gdbarch_init);
2282
2283 csky_init_reggroup ();
2284
2285 /* Allow debugging this file's internals. */
2286 add_setshow_boolean_cmd ("csky", class_maintenance, &csky_debug,
2287 _("Set C-Sky debugging."),
2288 _("Show C-Sky debugging."),
2289 _("When on, C-Sky specific debugging is enabled."),
2290 NULL,
2291 NULL,
2292 &setdebuglist, &showdebuglist);
2293 }
GDB Binutils - Deliverables
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