1 /* Target-dependent code for the Fujitsu FR-V, for GDB, the GNU Debugger.
2 Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "gdb_string.h"
25 #include "arch-utils.h"
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
32 #include "gdb_assert.h"
33 #include "sim-regno.h"
34 #include "gdb/sim-frv.h"
35 #include "opcodes/frv-desc.h" /* for the H_SPR_... enums */
42 extern void _initialize_frv_tdep (void);
44 static gdbarch_init_ftype frv_gdbarch_init
;
46 static gdbarch_register_name_ftype frv_register_name
;
47 static gdbarch_breakpoint_from_pc_ftype frv_breakpoint_from_pc
;
48 static gdbarch_adjust_breakpoint_address_ftype frv_gdbarch_adjust_breakpoint_address
;
49 static gdbarch_skip_prologue_ftype frv_skip_prologue
;
52 struct frv_unwind_cache
/* was struct frame_extra_info */
54 /* The previous frame's inner-most stack address. Used as this
55 frame ID's stack_addr. */
58 /* The frame's base, optionally used by the high-level debug info. */
61 /* Table indicating the location of each and every register. */
62 struct trad_frame_saved_reg
*saved_regs
;
65 /* A structure describing a particular variant of the FRV.
66 We allocate and initialize one of these structures when we create
67 the gdbarch object for a variant.
69 At the moment, all the FR variants we support differ only in which
70 registers are present; the portable code of GDB knows that
71 registers whose names are the empty string don't exist, so the
72 `register_names' array captures all the per-variant information we
75 in the future, if we need to have per-variant maps for raw size,
76 virtual type, etc., we should replace register_names with an array
77 of structures, each of which gives all the necessary info for one
78 register. Don't stick parallel arrays in here --- that's so
82 /* Which ABI is in use? */
85 /* How many general-purpose registers does this variant have? */
88 /* How many floating-point registers does this variant have? */
91 /* How many hardware watchpoints can it support? */
92 int num_hw_watchpoints
;
94 /* How many hardware breakpoints can it support? */
95 int num_hw_breakpoints
;
98 char **register_names
;
100 /* Given NEXT_FRAME, determine the address of register REGNO saved in
101 the calling sigtramp frame. */
102 CORE_ADDR (*sigcontext_reg_addr
) (struct frame_info
*next_frame
, int regno
,
106 #define CURRENT_VARIANT (gdbarch_tdep (current_gdbarch))
108 /* Return the FR-V ABI associated with GDBARCH. */
110 frv_abi (struct gdbarch
*gdbarch
)
112 return gdbarch_tdep (gdbarch
)->frv_abi
;
115 /* Set sigcontext_reg_addr. */
117 frv_set_sigcontext_reg_addr (struct gdbarch
*gdbarch
,
118 CORE_ADDR (*sigcontext_reg_addr
)
119 (struct frame_info
*, int, CORE_ADDR
*))
121 gdbarch_tdep (gdbarch
)->sigcontext_reg_addr
= sigcontext_reg_addr
;
124 /* Fetch the interpreter and executable loadmap addresses (for shared
125 library support) for the FDPIC ABI. Return 0 if successful, -1 if
126 not. (E.g, -1 will be returned if the ABI isn't the FDPIC ABI.) */
128 frv_fdpic_loadmap_addresses (struct gdbarch
*gdbarch
, CORE_ADDR
*interp_addr
,
129 CORE_ADDR
*exec_addr
)
131 if (frv_abi (gdbarch
) != FRV_ABI_FDPIC
)
135 if (interp_addr
!= NULL
)
138 regcache_cooked_read_unsigned (current_regcache
,
139 fdpic_loadmap_interp_regnum
, &val
);
142 if (exec_addr
!= NULL
)
145 regcache_cooked_read_unsigned (current_regcache
,
146 fdpic_loadmap_exec_regnum
, &val
);
153 /* Allocate a new variant structure, and set up default values for all
155 static struct gdbarch_tdep
*
158 struct gdbarch_tdep
*var
;
162 var
= xmalloc (sizeof (*var
));
163 memset (var
, 0, sizeof (*var
));
165 var
->frv_abi
= FRV_ABI_EABI
;
168 var
->num_hw_watchpoints
= 0;
169 var
->num_hw_breakpoints
= 0;
171 /* By default, don't supply any general-purpose or floating-point
174 = (char **) xmalloc ((frv_num_regs
+ frv_num_pseudo_regs
)
176 for (r
= 0; r
< frv_num_regs
+ frv_num_pseudo_regs
; r
++)
177 var
->register_names
[r
] = "";
179 /* Do, however, supply default names for the known special-purpose
182 var
->register_names
[pc_regnum
] = "pc";
183 var
->register_names
[lr_regnum
] = "lr";
184 var
->register_names
[lcr_regnum
] = "lcr";
186 var
->register_names
[psr_regnum
] = "psr";
187 var
->register_names
[ccr_regnum
] = "ccr";
188 var
->register_names
[cccr_regnum
] = "cccr";
189 var
->register_names
[tbr_regnum
] = "tbr";
191 /* Debug registers. */
192 var
->register_names
[brr_regnum
] = "brr";
193 var
->register_names
[dbar0_regnum
] = "dbar0";
194 var
->register_names
[dbar1_regnum
] = "dbar1";
195 var
->register_names
[dbar2_regnum
] = "dbar2";
196 var
->register_names
[dbar3_regnum
] = "dbar3";
198 /* iacc0 (Only found on MB93405.) */
199 var
->register_names
[iacc0h_regnum
] = "iacc0h";
200 var
->register_names
[iacc0l_regnum
] = "iacc0l";
201 var
->register_names
[iacc0_regnum
] = "iacc0";
207 /* Indicate that the variant VAR has NUM_GPRS general-purpose
208 registers, and fill in the names array appropriately. */
210 set_variant_num_gprs (struct gdbarch_tdep
*var
, int num_gprs
)
214 var
->num_gprs
= num_gprs
;
216 for (r
= 0; r
< num_gprs
; ++r
)
220 sprintf (buf
, "gr%d", r
);
221 var
->register_names
[first_gpr_regnum
+ r
] = xstrdup (buf
);
226 /* Indicate that the variant VAR has NUM_FPRS floating-point
227 registers, and fill in the names array appropriately. */
229 set_variant_num_fprs (struct gdbarch_tdep
*var
, int num_fprs
)
233 var
->num_fprs
= num_fprs
;
235 for (r
= 0; r
< num_fprs
; ++r
)
239 sprintf (buf
, "fr%d", r
);
240 var
->register_names
[first_fpr_regnum
+ r
] = xstrdup (buf
);
245 set_variant_abi_fdpic (struct gdbarch_tdep
*var
)
247 var
->frv_abi
= FRV_ABI_FDPIC
;
248 var
->register_names
[fdpic_loadmap_exec_regnum
] = xstrdup ("loadmap_exec");
249 var
->register_names
[fdpic_loadmap_interp_regnum
] = xstrdup ("loadmap_interp");
253 set_variant_scratch_registers (struct gdbarch_tdep
*var
)
255 var
->register_names
[scr0_regnum
] = xstrdup ("scr0");
256 var
->register_names
[scr1_regnum
] = xstrdup ("scr1");
257 var
->register_names
[scr2_regnum
] = xstrdup ("scr2");
258 var
->register_names
[scr3_regnum
] = xstrdup ("scr3");
262 frv_register_name (int reg
)
266 if (reg
>= frv_num_regs
+ frv_num_pseudo_regs
)
269 return CURRENT_VARIANT
->register_names
[reg
];
274 frv_register_type (struct gdbarch
*gdbarch
, int reg
)
276 if (reg
>= first_fpr_regnum
&& reg
<= last_fpr_regnum
)
277 return builtin_type_float
;
278 else if (reg
== iacc0_regnum
)
279 return builtin_type_int64
;
281 return builtin_type_int32
;
285 frv_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
286 int reg
, void *buffer
)
288 if (reg
== iacc0_regnum
)
290 regcache_raw_read (regcache
, iacc0h_regnum
, buffer
);
291 regcache_raw_read (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
296 frv_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
297 int reg
, const void *buffer
)
299 if (reg
== iacc0_regnum
)
301 regcache_raw_write (regcache
, iacc0h_regnum
, buffer
);
302 regcache_raw_write (regcache
, iacc0l_regnum
, (bfd_byte
*) buffer
+ 4);
307 frv_register_sim_regno (int reg
)
309 static const int spr_map
[] =
311 H_SPR_PSR
, /* psr_regnum */
312 H_SPR_CCR
, /* ccr_regnum */
313 H_SPR_CCCR
, /* cccr_regnum */
317 H_SPR_TBR
, /* tbr_regnum */
318 H_SPR_BRR
, /* brr_regnum */
319 H_SPR_DBAR0
, /* dbar0_regnum */
320 H_SPR_DBAR1
, /* dbar1_regnum */
321 H_SPR_DBAR2
, /* dbar2_regnum */
322 H_SPR_DBAR3
, /* dbar3_regnum */
327 H_SPR_LR
, /* lr_regnum */
328 H_SPR_LCR
, /* lcr_regnum */
329 H_SPR_IACC0H
, /* iacc0h_regnum */
330 H_SPR_IACC0L
/* iacc0l_regnum */
333 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
335 if (first_gpr_regnum
<= reg
&& reg
<= last_gpr_regnum
)
336 return reg
- first_gpr_regnum
+ SIM_FRV_GR0_REGNUM
;
337 else if (first_fpr_regnum
<= reg
&& reg
<= last_fpr_regnum
)
338 return reg
- first_fpr_regnum
+ SIM_FRV_FR0_REGNUM
;
339 else if (pc_regnum
== reg
)
340 return SIM_FRV_PC_REGNUM
;
341 else if (reg
>= first_spr_regnum
342 && reg
< first_spr_regnum
+ sizeof (spr_map
) / sizeof (spr_map
[0]))
344 int spr_reg_offset
= spr_map
[reg
- first_spr_regnum
];
346 if (spr_reg_offset
< 0)
347 return SIM_REGNO_DOES_NOT_EXIST
;
349 return SIM_FRV_SPR0_REGNUM
+ spr_reg_offset
;
352 internal_error (__FILE__
, __LINE__
, "Bad register number %d", reg
);
355 static const unsigned char *
356 frv_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenp
)
358 static unsigned char breakpoint
[] = {0xc0, 0x70, 0x00, 0x01};
359 *lenp
= sizeof (breakpoint
);
363 /* Define the maximum number of instructions which may be packed into a
364 bundle (VLIW instruction). */
365 static const int max_instrs_per_bundle
= 8;
367 /* Define the size (in bytes) of an FR-V instruction. */
368 static const int frv_instr_size
= 4;
370 /* Adjust a breakpoint's address to account for the FR-V architecture's
371 constraint that a break instruction must not appear as any but the
372 first instruction in the bundle. */
374 frv_gdbarch_adjust_breakpoint_address (struct gdbarch
*gdbarch
, CORE_ADDR bpaddr
)
376 int count
= max_instrs_per_bundle
;
377 CORE_ADDR addr
= bpaddr
- frv_instr_size
;
378 CORE_ADDR func_start
= get_pc_function_start (bpaddr
);
380 /* Find the end of the previous packing sequence. This will be indicated
381 by either attempting to access some inaccessible memory or by finding
382 an instruction word whose packing bit is set to one. */
383 while (count
-- > 0 && addr
>= func_start
)
385 char instr
[frv_instr_size
];
388 status
= read_memory_nobpt (addr
, instr
, sizeof instr
);
393 /* This is a big endian architecture, so byte zero will have most
394 significant byte. The most significant bit of this byte is the
399 addr
-= frv_instr_size
;
403 bpaddr
= addr
+ frv_instr_size
;
409 /* Return true if REG is a caller-saves ("scratch") register,
412 is_caller_saves_reg (int reg
)
414 return ((4 <= reg
&& reg
<= 7)
415 || (14 <= reg
&& reg
<= 15)
416 || (32 <= reg
&& reg
<= 47));
420 /* Return true if REG is a callee-saves register, false otherwise. */
422 is_callee_saves_reg (int reg
)
424 return ((16 <= reg
&& reg
<= 31)
425 || (48 <= reg
&& reg
<= 63));
429 /* Return true if REG is an argument register, false otherwise. */
431 is_argument_reg (int reg
)
433 return (8 <= reg
&& reg
<= 13);
436 /* Scan an FR-V prologue, starting at PC, until frame->PC.
437 If FRAME is non-zero, fill in its saved_regs with appropriate addresses.
438 We assume FRAME's saved_regs array has already been allocated and cleared.
439 Return the first PC value after the prologue.
441 Note that, for unoptimized code, we almost don't need this function
442 at all; all arguments and locals live on the stack, so we just need
443 the FP to find everything. The catch: structures passed by value
444 have their addresses living in registers; they're never spilled to
445 the stack. So if you ever want to be able to get to these
446 arguments in any frame but the top, you'll need to do this serious
447 prologue analysis. */
449 frv_analyze_prologue (CORE_ADDR pc
, struct frame_info
*next_frame
,
450 struct frv_unwind_cache
*info
)
452 /* When writing out instruction bitpatterns, we use the following
453 letters to label instruction fields:
454 P - The parallel bit. We don't use this.
455 J - The register number of GRj in the instruction description.
456 K - The register number of GRk in the instruction description.
457 I - The register number of GRi.
458 S - a signed imediate offset.
459 U - an unsigned immediate offset.
461 The dots below the numbers indicate where hex digit boundaries
462 fall, to make it easier to check the numbers. */
464 /* Non-zero iff we've seen the instruction that initializes the
465 frame pointer for this function's frame. */
468 /* If fp_set is non_zero, then this is the distance from
469 the stack pointer to frame pointer: fp = sp + fp_offset. */
472 /* Total size of frame prior to any alloca operations. */
475 /* Flag indicating if lr has been saved on the stack. */
476 int lr_saved_on_stack
= 0;
478 /* The number of the general-purpose register we saved the return
479 address ("link register") in, or -1 if we haven't moved it yet. */
480 int lr_save_reg
= -1;
482 /* Offset (from sp) at which lr has been saved on the stack. */
484 int lr_sp_offset
= 0;
486 /* If gr_saved[i] is non-zero, then we've noticed that general
487 register i has been saved at gr_sp_offset[i] from the stack
490 int gr_sp_offset
[64];
492 /* The address of the most recently scanned prologue instruction. */
493 CORE_ADDR last_prologue_pc
;
495 /* The address of the next instruction. */
498 /* The upper bound to of the pc values to scan. */
501 memset (gr_saved
, 0, sizeof (gr_saved
));
503 last_prologue_pc
= pc
;
505 /* Try to compute an upper limit (on how far to scan) based on the
507 lim_pc
= skip_prologue_using_sal (pc
);
508 /* If there's no line number info, lim_pc will be 0. In that case,
509 set the limit to be 100 instructions away from pc. Hopefully, this
510 will be far enough away to account for the entire prologue. Don't
511 worry about overshooting the end of the function. The scan loop
512 below contains some checks to avoid scanning unreasonably far. */
516 /* If we have a frame, we don't want to scan past the frame's pc. This
517 will catch those cases where the pc is in the prologue. */
520 CORE_ADDR frame_pc
= frame_pc_unwind (next_frame
);
521 if (frame_pc
< lim_pc
)
525 /* Scan the prologue. */
528 char buf
[frv_instr_size
];
531 if (target_read_memory (pc
, buf
, sizeof buf
) != 0)
533 op
= extract_signed_integer (buf
, sizeof buf
);
537 /* The tests in this chain of ifs should be in order of
538 decreasing selectivity, so that more particular patterns get
539 to fire before less particular patterns. */
541 /* Some sort of control transfer instruction: stop scanning prologue.
542 Integer Conditional Branch:
543 X XXXX XX 0000110 XX XXXXXXXXXXXXXXXX
544 Floating-point / media Conditional Branch:
545 X XXXX XX 0000111 XX XXXXXXXXXXXXXXXX
546 LCR Conditional Branch to LR
547 X XXXX XX 0001110 XX XX 001 X XXXXXXXXXX
548 Integer conditional Branches to LR
549 X XXXX XX 0001110 XX XX 010 X XXXXXXXXXX
550 X XXXX XX 0001110 XX XX 011 X XXXXXXXXXX
551 Floating-point/Media Branches to LR
552 X XXXX XX 0001110 XX XX 110 X XXXXXXXXXX
553 X XXXX XX 0001110 XX XX 111 X XXXXXXXXXX
555 X XXXXX X 0001100 XXXXXX XXXXXX XXXXXX
556 X XXXXX X 0001101 XXXXXX XXXXXX XXXXXX
558 X XXXXXX 0001111 XXXXXXXXXXXXXXXXXX
560 X XXXXX X 0000101 XXXXXX XXXXXX XXXXXX
561 Integer Conditional Trap
562 X XXXX XX 0000100 XXXXXX XXXX 00 XXXXXX
563 X XXXX XX 0011100 XXXXXX XXXXXXXXXXXX
564 Floating-point /media Conditional Trap
565 X XXXX XX 0000100 XXXXXX XXXX 01 XXXXXX
566 X XXXX XX 0011101 XXXXXX XXXXXXXXXXXX
568 X XXXX XX 0000100 XXXXXX XXXX 11 XXXXXX
570 X XXXX XX 0000100 XXXXXX XXXX 10 XXXXXX */
571 if ((op
& 0x01d80000) == 0x00180000 /* Conditional branches and Call */
572 || (op
& 0x01f80000) == 0x00300000 /* Jump and Link */
573 || (op
& 0x01f80000) == 0x00100000 /* Return from Trap, Trap */
574 || (op
& 0x01f80000) == 0x00700000) /* Trap immediate */
576 /* Stop scanning; not in prologue any longer. */
580 /* Loading something from memory into fp probably means that
581 we're in the epilogue. Stop scanning the prologue.
583 X 000010 0000010 XXXXXX 000100 XXXXXX
585 X 000010 0110010 XXXXXX XXXXXXXXXXXX */
586 else if ((op
& 0x7ffc0fc0) == 0x04080100
587 || (op
& 0x7ffc0000) == 0x04c80000)
592 /* Setting the FP from the SP:
594 P 000010 0100010 000001 000000000000 = 0x04881000
595 0 111111 1111111 111111 111111111111 = 0x7fffffff
597 We treat this as part of the prologue. */
598 else if ((op
& 0x7fffffff) == 0x04881000)
602 last_prologue_pc
= next_pc
;
605 /* Move the link register to the scratch register grJ, before saving:
607 P 000100 0000011 010000 000111 JJJJJJ = 0x080d01c0
608 0 111111 1111111 111111 111111 000000 = 0x7fffffc0
610 We treat this as part of the prologue. */
611 else if ((op
& 0x7fffffc0) == 0x080d01c0)
613 int gr_j
= op
& 0x3f;
615 /* If we're moving it to a scratch register, that's fine. */
616 if (is_caller_saves_reg (gr_j
))
619 last_prologue_pc
= next_pc
;
623 /* To save multiple callee-saves registers on the stack, at
627 P KKKKKK 0000011 000001 000011 000000 = 0x000c10c0
628 0 000000 1111111 111111 111111 111111 = 0x01ffffff
631 P KKKKKK 0000011 000001 000100 000000 = 0x000c1100
632 0 000000 1111111 111111 111111 111111 = 0x01ffffff
634 We treat this as part of the prologue, and record the register's
635 saved address in the frame structure. */
636 else if ((op
& 0x01ffffff) == 0x000c10c0
637 || (op
& 0x01ffffff) == 0x000c1100)
639 int gr_k
= ((op
>> 25) & 0x3f);
640 int ope
= ((op
>> 6) & 0x3f);
644 /* Is it an std or an stq? */
650 /* Is it really a callee-saves register? */
651 if (is_callee_saves_reg (gr_k
))
653 for (i
= 0; i
< count
; i
++)
655 gr_saved
[gr_k
+ i
] = 1;
656 gr_sp_offset
[gr_k
+ i
] = 4 * i
;
658 last_prologue_pc
= next_pc
;
662 /* Adjusting the stack pointer. (The stack pointer is GR1.)
664 P 000001 0010000 000001 SSSSSSSSSSSS = 0x02401000
665 0 111111 1111111 111111 000000000000 = 0x7ffff000
667 We treat this as part of the prologue. */
668 else if ((op
& 0x7ffff000) == 0x02401000)
672 /* Sign-extend the twelve-bit field.
673 (Isn't there a better way to do this?) */
674 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
677 last_prologue_pc
= pc
;
681 /* If the prologue is being adjusted again, we've
682 likely gone too far; i.e. we're probably in the
688 /* Setting the FP to a constant distance from the SP:
690 P 000010 0010000 000001 SSSSSSSSSSSS = 0x04401000
691 0 111111 1111111 111111 000000000000 = 0x7ffff000
693 We treat this as part of the prologue. */
694 else if ((op
& 0x7ffff000) == 0x04401000)
696 /* Sign-extend the twelve-bit field.
697 (Isn't there a better way to do this?) */
698 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
701 last_prologue_pc
= pc
;
704 /* To spill an argument register to a scratch register:
706 P KKKKKK 0100010 IIIIII 000000000000 = 0x00880000
707 0 000000 1111111 000000 111111111111 = 0x01fc0fff
709 For the time being, we treat this as a prologue instruction,
710 assuming that GRi is an argument register. This one's kind
711 of suspicious, because it seems like it could be part of a
712 legitimate body instruction. But we only come here when the
713 source info wasn't helpful, so we have to do the best we can.
714 Hopefully once GCC and GDB agree on how to emit line number
715 info for prologues, then this code will never come into play. */
716 else if ((op
& 0x01fc0fff) == 0x00880000)
718 int gr_i
= ((op
>> 12) & 0x3f);
720 /* Make sure that the source is an arg register; if it is, we'll
721 treat it as a prologue instruction. */
722 if (is_argument_reg (gr_i
))
723 last_prologue_pc
= next_pc
;
726 /* To spill 16-bit values to the stack:
728 P KKKKKK 1010001 000010 SSSSSSSSSSSS = 0x01442000
729 0 000000 1111111 111111 000000000000 = 0x01fff000
731 And for 8-bit values, we use STB instructions.
733 P KKKKKK 1010000 000010 SSSSSSSSSSSS = 0x01402000
734 0 000000 1111111 111111 000000000000 = 0x01fff000
736 We check that GRk is really an argument register, and treat
737 all such as part of the prologue. */
738 else if ( (op
& 0x01fff000) == 0x01442000
739 || (op
& 0x01fff000) == 0x01402000)
741 int gr_k
= ((op
>> 25) & 0x3f);
743 /* Make sure that GRk is really an argument register; treat
744 it as a prologue instruction if so. */
745 if (is_argument_reg (gr_k
))
746 last_prologue_pc
= next_pc
;
749 /* To save multiple callee-saves register on the stack, at a
753 P KKKKKK 1010011 000001 SSSSSSSSSSSS = 0x014c1000
754 0 000000 1111111 111111 000000000000 = 0x01fff000
757 P KKKKKK 1010100 000001 SSSSSSSSSSSS = 0x01501000
758 0 000000 1111111 111111 000000000000 = 0x01fff000
760 We treat this as part of the prologue, and record the register's
761 saved address in the frame structure. */
762 else if ((op
& 0x01fff000) == 0x014c1000
763 || (op
& 0x01fff000) == 0x01501000)
765 int gr_k
= ((op
>> 25) & 0x3f);
769 /* Is it a stdi or a stqi? */
770 if ((op
& 0x01fff000) == 0x014c1000)
775 /* Is it really a callee-saves register? */
776 if (is_callee_saves_reg (gr_k
))
778 /* Sign-extend the twelve-bit field.
779 (Isn't there a better way to do this?) */
780 int s
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
782 for (i
= 0; i
< count
; i
++)
784 gr_saved
[gr_k
+ i
] = 1;
785 gr_sp_offset
[gr_k
+ i
] = s
+ (4 * i
);
787 last_prologue_pc
= next_pc
;
791 /* Storing any kind of integer register at any constant offset
792 from any other register.
795 P KKKKKK 0000011 IIIIII 000010 000000 = 0x000c0080
796 0 000000 1111111 000000 111111 111111 = 0x01fc0fff
799 P KKKKKK 1010010 IIIIII SSSSSSSSSSSS = 0x01480000
800 0 000000 1111111 000000 000000000000 = 0x01fc0000
802 These could be almost anything, but a lot of prologue
803 instructions fall into this pattern, so let's decode the
804 instruction once, and then work at a higher level. */
805 else if (((op
& 0x01fc0fff) == 0x000c0080)
806 || ((op
& 0x01fc0000) == 0x01480000))
808 int gr_k
= ((op
>> 25) & 0x3f);
809 int gr_i
= ((op
>> 12) & 0x3f);
812 /* Are we storing with gr0 as an offset, or using an
814 if ((op
& 0x01fc0fff) == 0x000c0080)
817 offset
= (((op
& 0xfff) - 0x800) & 0xfff) - 0x800;
819 /* If the address isn't relative to the SP or FP, it's not a
820 prologue instruction. */
821 if (gr_i
!= sp_regnum
&& gr_i
!= fp_regnum
)
823 /* Do nothing; not a prologue instruction. */
826 /* Saving the old FP in the new frame (relative to the SP). */
827 else if (gr_k
== fp_regnum
&& gr_i
== sp_regnum
)
829 gr_saved
[fp_regnum
] = 1;
830 gr_sp_offset
[fp_regnum
] = offset
;
831 last_prologue_pc
= next_pc
;
834 /* Saving callee-saves register(s) on the stack, relative to
836 else if (gr_i
== sp_regnum
837 && is_callee_saves_reg (gr_k
))
840 if (gr_i
== sp_regnum
)
841 gr_sp_offset
[gr_k
] = offset
;
843 gr_sp_offset
[gr_k
] = offset
+ fp_offset
;
844 last_prologue_pc
= next_pc
;
847 /* Saving the scratch register holding the return address. */
848 else if (lr_save_reg
!= -1
849 && gr_k
== lr_save_reg
)
851 lr_saved_on_stack
= 1;
852 if (gr_i
== sp_regnum
)
853 lr_sp_offset
= offset
;
855 lr_sp_offset
= offset
+ fp_offset
;
856 last_prologue_pc
= next_pc
;
859 /* Spilling int-sized arguments to the stack. */
860 else if (is_argument_reg (gr_k
))
861 last_prologue_pc
= next_pc
;
866 if (next_frame
&& info
)
871 /* If we know the relationship between the stack and frame
872 pointers, record the addresses of the registers we noticed.
873 Note that we have to do this as a separate step at the end,
874 because instructions may save relative to the SP, but we need
875 their addresses relative to the FP. */
877 frame_unwind_unsigned_register (next_frame
, fp_regnum
, &this_base
);
879 frame_unwind_unsigned_register (next_frame
, sp_regnum
, &this_base
);
881 for (i
= 0; i
< 64; i
++)
883 info
->saved_regs
[i
].addr
= this_base
- fp_offset
+ gr_sp_offset
[i
];
885 info
->prev_sp
= this_base
- fp_offset
+ framesize
;
886 info
->base
= this_base
;
888 /* If LR was saved on the stack, record its location. */
889 if (lr_saved_on_stack
)
890 info
->saved_regs
[lr_regnum
].addr
= this_base
- fp_offset
+ lr_sp_offset
;
892 /* The call instruction moves the caller's PC in the callee's LR.
893 Since this is an unwind, do the reverse. Copy the location of LR
894 into PC (the address / regnum) so that a request for PC will be
895 converted into a request for the LR. */
896 info
->saved_regs
[pc_regnum
] = info
->saved_regs
[lr_regnum
];
898 /* Save the previous frame's computed SP value. */
899 trad_frame_set_value (info
->saved_regs
, sp_regnum
, info
->prev_sp
);
902 return last_prologue_pc
;
907 frv_skip_prologue (CORE_ADDR pc
)
909 CORE_ADDR func_addr
, func_end
, new_pc
;
913 /* If the line table has entry for a line *within* the function
914 (i.e., not in the prologue, and not past the end), then that's
916 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
918 struct symtab_and_line sal
;
920 sal
= find_pc_line (func_addr
, 0);
922 if (sal
.line
!= 0 && sal
.end
< func_end
)
928 /* The FR-V prologue is at least five instructions long (twenty bytes).
929 If we didn't find a real source location past that, then
930 do a full analysis of the prologue. */
931 if (new_pc
< pc
+ 20)
932 new_pc
= frv_analyze_prologue (pc
, 0, 0);
938 static struct frv_unwind_cache
*
939 frv_frame_unwind_cache (struct frame_info
*next_frame
,
940 void **this_prologue_cache
)
942 struct gdbarch
*gdbarch
= get_frame_arch (next_frame
);
945 struct frv_unwind_cache
*info
;
947 if ((*this_prologue_cache
))
948 return (*this_prologue_cache
);
950 info
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
951 (*this_prologue_cache
) = info
;
952 info
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
954 /* Prologue analysis does the rest... */
955 frv_analyze_prologue (frame_func_unwind (next_frame
), next_frame
, info
);
961 frv_extract_return_value (struct type
*type
, struct regcache
*regcache
,
964 int len
= TYPE_LENGTH (type
);
969 regcache_cooked_read_unsigned (regcache
, 8, &gpr8_val
);
970 store_unsigned_integer (valbuf
, len
, gpr8_val
);
975 regcache_cooked_read_unsigned (regcache
, 8, ®val
);
976 store_unsigned_integer (valbuf
, 4, regval
);
977 regcache_cooked_read_unsigned (regcache
, 9, ®val
);
978 store_unsigned_integer ((bfd_byte
*) valbuf
+ 4, 4, regval
);
981 internal_error (__FILE__
, __LINE__
, "Illegal return value length: %d", len
);
985 frv_extract_struct_value_address (struct regcache
*regcache
)
988 regcache_cooked_read_unsigned (regcache
, struct_return_regnum
, &addr
);
993 frv_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
995 write_register (struct_return_regnum
, addr
);
999 frv_frameless_function_invocation (struct frame_info
*frame
)
1001 return legacy_frameless_look_for_prologue (frame
);
1005 frv_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
1007 /* Require dword alignment. */
1008 return align_down (sp
, 8);
1012 find_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR entry_point
)
1017 descr
= frv_fdpic_find_canonical_descriptor (entry_point
);
1022 /* Construct a non-canonical descriptor from space allocated on
1025 descr
= value_as_long (value_allocate_space_in_inferior (8));
1026 store_unsigned_integer (valbuf
, 4, entry_point
);
1027 write_memory (descr
, valbuf
, 4);
1028 store_unsigned_integer (valbuf
, 4,
1029 frv_fdpic_find_global_pointer (entry_point
));
1030 write_memory (descr
+ 4, valbuf
, 4);
1035 frv_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
1036 struct target_ops
*targ
)
1038 CORE_ADDR entry_point
;
1039 CORE_ADDR got_address
;
1041 entry_point
= get_target_memory_unsigned (targ
, addr
, 4);
1042 got_address
= get_target_memory_unsigned (targ
, addr
+ 4, 4);
1044 if (got_address
== frv_fdpic_find_global_pointer (entry_point
))
1051 frv_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1052 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1053 int nargs
, struct value
**args
, CORE_ADDR sp
,
1054 int struct_return
, CORE_ADDR struct_addr
)
1061 struct type
*arg_type
;
1063 enum type_code typecode
;
1067 enum frv_abi abi
= frv_abi (gdbarch
);
1070 printf("Push %d args at sp = %x, struct_return=%d (%x)\n",
1071 nargs
, (int) sp
, struct_return
, struct_addr
);
1075 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1076 stack_space
+= align_up (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])), 4);
1078 stack_space
-= (6 * 4);
1079 if (stack_space
> 0)
1082 /* Make sure stack is dword aligned. */
1083 sp
= align_down (sp
, 8);
1090 regcache_cooked_write_unsigned (regcache
, struct_return_regnum
,
1093 for (argnum
= 0; argnum
< nargs
; ++argnum
)
1096 arg_type
= check_typedef (VALUE_TYPE (arg
));
1097 len
= TYPE_LENGTH (arg_type
);
1098 typecode
= TYPE_CODE (arg_type
);
1100 if (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
)
1102 store_unsigned_integer (valbuf
, 4, VALUE_ADDRESS (arg
));
1103 typecode
= TYPE_CODE_PTR
;
1107 else if (abi
== FRV_ABI_FDPIC
1109 && typecode
== TYPE_CODE_PTR
1110 && TYPE_CODE (TYPE_TARGET_TYPE (arg_type
)) == TYPE_CODE_FUNC
)
1112 /* The FDPIC ABI requires function descriptors to be passed instead
1114 store_unsigned_integer
1116 find_func_descr (gdbarch
,
1117 extract_unsigned_integer (VALUE_CONTENTS (arg
),
1119 typecode
= TYPE_CODE_PTR
;
1125 val
= (char *) VALUE_CONTENTS (arg
);
1130 int partial_len
= (len
< 4 ? len
: 4);
1134 regval
= extract_unsigned_integer (val
, partial_len
);
1136 printf(" Argnum %d data %x -> reg %d\n",
1137 argnum
, (int) regval
, argreg
);
1139 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1145 printf(" Argnum %d data %x -> offset %d (%x)\n",
1146 argnum
, *((int *)val
), stack_offset
, (int) (sp
+ stack_offset
));
1148 write_memory (sp
+ stack_offset
, val
, partial_len
);
1149 stack_offset
+= align_up (partial_len
, 4);
1156 /* Set the return address. For the frv, the return breakpoint is
1157 always at BP_ADDR. */
1158 regcache_cooked_write_unsigned (regcache
, lr_regnum
, bp_addr
);
1160 if (abi
== FRV_ABI_FDPIC
)
1162 /* Set the GOT register for the FDPIC ABI. */
1163 regcache_cooked_write_unsigned
1164 (regcache
, first_gpr_regnum
+ 15,
1165 frv_fdpic_find_global_pointer (func_addr
));
1168 /* Finally, update the SP register. */
1169 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
1175 frv_store_return_value (struct type
*type
, struct regcache
*regcache
,
1178 int len
= TYPE_LENGTH (type
);
1183 memset (val
, 0, sizeof (val
));
1184 memcpy (val
+ (4 - len
), valbuf
, len
);
1185 regcache_cooked_write (regcache
, 8, val
);
1189 regcache_cooked_write (regcache
, 8, valbuf
);
1190 regcache_cooked_write (regcache
, 9, (bfd_byte
*) valbuf
+ 4);
1193 internal_error (__FILE__
, __LINE__
,
1194 "Don't know how to return a %d-byte value.", len
);
1198 /* Hardware watchpoint / breakpoint support for the FR500
1202 frv_check_watch_resources (int type
, int cnt
, int ot
)
1204 struct gdbarch_tdep
*var
= CURRENT_VARIANT
;
1206 /* Watchpoints not supported on simulator. */
1207 if (strcmp (target_shortname
, "sim") == 0)
1210 if (type
== bp_hardware_breakpoint
)
1212 if (var
->num_hw_breakpoints
== 0)
1214 else if (cnt
<= var
->num_hw_breakpoints
)
1219 if (var
->num_hw_watchpoints
== 0)
1223 else if (cnt
<= var
->num_hw_watchpoints
)
1231 frv_stopped_data_address (void)
1233 CORE_ADDR brr
, dbar0
, dbar1
, dbar2
, dbar3
;
1235 brr
= read_register (brr_regnum
);
1236 dbar0
= read_register (dbar0_regnum
);
1237 dbar1
= read_register (dbar1_regnum
);
1238 dbar2
= read_register (dbar2_regnum
);
1239 dbar3
= read_register (dbar3_regnum
);
1243 else if (brr
& (1<<10))
1245 else if (brr
& (1<<9))
1247 else if (brr
& (1<<8))
1254 frv_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1256 return frame_unwind_register_unsigned (next_frame
, pc_regnum
);
1259 /* Given a GDB frame, determine the address of the calling function's
1260 frame. This will be used to create a new GDB frame struct. */
1263 frv_frame_this_id (struct frame_info
*next_frame
,
1264 void **this_prologue_cache
, struct frame_id
*this_id
)
1266 struct frv_unwind_cache
*info
1267 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1270 struct minimal_symbol
*msym_stack
;
1273 /* The FUNC is easy. */
1274 func
= frame_func_unwind (next_frame
);
1276 /* Check if the stack is empty. */
1277 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
1278 if (msym_stack
&& info
->base
== SYMBOL_VALUE_ADDRESS (msym_stack
))
1281 /* Hopefully the prologue analysis either correctly determined the
1282 frame's base (which is the SP from the previous frame), or set
1283 that base to "NULL". */
1284 base
= info
->prev_sp
;
1288 id
= frame_id_build (base
, func
);
1290 /* Check that we're not going round in circles with the same frame
1291 ID (but avoid applying the test to sentinel frames which do go
1292 round in circles). Can't use frame_id_eq() as that doesn't yet
1293 compare the frame's PC value. */
1294 if (frame_relative_level (next_frame
) >= 0
1295 && get_frame_type (next_frame
) != DUMMY_FRAME
1296 && frame_id_eq (get_frame_id (next_frame
), id
))
1303 frv_frame_prev_register (struct frame_info
*next_frame
,
1304 void **this_prologue_cache
,
1305 int regnum
, int *optimizedp
,
1306 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1307 int *realnump
, void *bufferp
)
1309 struct frv_unwind_cache
*info
1310 = frv_frame_unwind_cache (next_frame
, this_prologue_cache
);
1311 trad_frame_prev_register (next_frame
, info
->saved_regs
, regnum
,
1312 optimizedp
, lvalp
, addrp
, realnump
, bufferp
);
1315 static const struct frame_unwind frv_frame_unwind
= {
1318 frv_frame_prev_register
1321 static const struct frame_unwind
*
1322 frv_frame_sniffer (struct frame_info
*next_frame
)
1324 return &frv_frame_unwind
;
1328 frv_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1330 struct frv_unwind_cache
*info
1331 = frv_frame_unwind_cache (next_frame
, this_cache
);
1335 static const struct frame_base frv_frame_base
= {
1337 frv_frame_base_address
,
1338 frv_frame_base_address
,
1339 frv_frame_base_address
1343 frv_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1345 return frame_unwind_register_unsigned (next_frame
, sp_regnum
);
1349 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1350 dummy frame. The frame ID's base needs to match the TOS value
1351 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1354 static struct frame_id
1355 frv_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1357 return frame_id_build (frv_unwind_sp (gdbarch
, next_frame
),
1358 frame_pc_unwind (next_frame
));
1361 /* Signal trampolines. */
1363 static struct frv_unwind_cache
*
1364 frv_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1366 struct frv_unwind_cache
*cache
;
1367 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1371 CORE_ADDR sc_addr_cache_val
= 0;
1376 cache
= FRAME_OBSTACK_ZALLOC (struct frv_unwind_cache
);
1377 cache
->saved_regs
= trad_frame_alloc_saved_regs (next_frame
);
1379 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1380 cache
->base
= extract_unsigned_integer (buf
, sizeof buf
);
1382 for (regno
= 0; regno
< frv_num_regs
; regno
++)
1384 cache
->saved_regs
[regno
].addr
1385 = tdep
->sigcontext_reg_addr (next_frame
, regno
, &sc_addr_cache_val
);
1389 if (cache
->saved_regs
[sp_regnum
].addr
!= -1
1390 && target_read_memory (cache
->saved_regs
[sp_regnum
].addr
,
1391 buf
, sizeof buf
) == 0)
1393 cache
->prev_sp
= extract_unsigned_integer (buf
, sizeof buf
);
1395 /* Now that we've bothered to read it out of memory, save the
1396 prev frame's SP value in the cache. */
1397 trad_frame_set_value (cache
->saved_regs
, sp_regnum
, cache
->prev_sp
);
1401 warning ("Can't read SP value from sigtramp frame");
1404 *this_cache
= cache
;
1409 frv_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1410 struct frame_id
*this_id
)
1412 struct frv_unwind_cache
*cache
=
1413 frv_sigtramp_frame_cache (next_frame
, this_cache
);
1415 (*this_id
) = frame_id_build (cache
->base
, frame_pc_unwind (next_frame
));
1419 frv_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1421 int regnum
, int *optimizedp
,
1422 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1423 int *realnump
, void *valuep
)
1425 /* Make sure we've initialized the cache. */
1426 frv_sigtramp_frame_cache (next_frame
, this_cache
);
1428 frv_frame_prev_register (next_frame
, this_cache
, regnum
,
1429 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1432 static const struct frame_unwind frv_sigtramp_frame_unwind
=
1435 frv_sigtramp_frame_this_id
,
1436 frv_sigtramp_frame_prev_register
1439 static const struct frame_unwind
*
1440 frv_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1442 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1445 /* We shouldn't even bother to try if the OSABI didn't register
1446 a sigcontext_reg_addr handler. */
1447 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_reg_addr
)
1450 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1451 if (PC_IN_SIGTRAMP (pc
, name
))
1452 return &frv_sigtramp_frame_unwind
;
1457 static struct gdbarch
*
1458 frv_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1460 struct gdbarch
*gdbarch
;
1461 struct gdbarch_tdep
*var
;
1464 /* Check to see if we've already built an appropriate architecture
1465 object for this executable. */
1466 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1468 return arches
->gdbarch
;
1470 /* Select the right tdep structure for this variant. */
1471 var
= new_variant ();
1472 switch (info
.bfd_arch_info
->mach
)
1475 case bfd_mach_frvsimple
:
1476 case bfd_mach_fr500
:
1477 case bfd_mach_frvtomcat
:
1478 case bfd_mach_fr550
:
1479 set_variant_num_gprs (var
, 64);
1480 set_variant_num_fprs (var
, 64);
1483 case bfd_mach_fr400
:
1484 case bfd_mach_fr450
:
1485 set_variant_num_gprs (var
, 32);
1486 set_variant_num_fprs (var
, 32);
1490 /* Never heard of this variant. */
1494 /* Extract the ELF flags, if available. */
1495 if (info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1496 elf_flags
= elf_elfheader (info
.abfd
)->e_flags
;
1498 if (elf_flags
& EF_FRV_FDPIC
)
1499 set_variant_abi_fdpic (var
);
1501 if (elf_flags
& EF_FRV_CPU_FR450
)
1502 set_variant_scratch_registers (var
);
1504 gdbarch
= gdbarch_alloc (&info
, var
);
1506 set_gdbarch_short_bit (gdbarch
, 16);
1507 set_gdbarch_int_bit (gdbarch
, 32);
1508 set_gdbarch_long_bit (gdbarch
, 32);
1509 set_gdbarch_long_long_bit (gdbarch
, 64);
1510 set_gdbarch_float_bit (gdbarch
, 32);
1511 set_gdbarch_double_bit (gdbarch
, 64);
1512 set_gdbarch_long_double_bit (gdbarch
, 64);
1513 set_gdbarch_ptr_bit (gdbarch
, 32);
1515 set_gdbarch_num_regs (gdbarch
, frv_num_regs
);
1516 set_gdbarch_num_pseudo_regs (gdbarch
, frv_num_pseudo_regs
);
1518 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
1519 set_gdbarch_deprecated_fp_regnum (gdbarch
, fp_regnum
);
1520 set_gdbarch_pc_regnum (gdbarch
, pc_regnum
);
1522 set_gdbarch_register_name (gdbarch
, frv_register_name
);
1523 set_gdbarch_register_type (gdbarch
, frv_register_type
);
1524 set_gdbarch_register_sim_regno (gdbarch
, frv_register_sim_regno
);
1526 set_gdbarch_pseudo_register_read (gdbarch
, frv_pseudo_register_read
);
1527 set_gdbarch_pseudo_register_write (gdbarch
, frv_pseudo_register_write
);
1529 set_gdbarch_skip_prologue (gdbarch
, frv_skip_prologue
);
1530 set_gdbarch_breakpoint_from_pc (gdbarch
, frv_breakpoint_from_pc
);
1531 set_gdbarch_adjust_breakpoint_address (gdbarch
, frv_gdbarch_adjust_breakpoint_address
);
1533 set_gdbarch_deprecated_frameless_function_invocation (gdbarch
, frv_frameless_function_invocation
);
1535 set_gdbarch_use_struct_convention (gdbarch
, always_use_struct_convention
);
1536 set_gdbarch_extract_return_value (gdbarch
, frv_extract_return_value
);
1538 set_gdbarch_deprecated_store_struct_return (gdbarch
, frv_store_struct_return
);
1539 set_gdbarch_store_return_value (gdbarch
, frv_store_return_value
);
1540 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, frv_extract_struct_value_address
);
1543 set_gdbarch_unwind_pc (gdbarch
, frv_unwind_pc
);
1544 set_gdbarch_unwind_sp (gdbarch
, frv_unwind_sp
);
1545 set_gdbarch_frame_align (gdbarch
, frv_frame_align
);
1546 frame_base_set_default (gdbarch
, &frv_frame_base
);
1547 /* We set the sniffer lower down after the OSABI hooks have been
1550 /* Settings for calling functions in the inferior. */
1551 set_gdbarch_push_dummy_call (gdbarch
, frv_push_dummy_call
);
1552 set_gdbarch_unwind_dummy_id (gdbarch
, frv_unwind_dummy_id
);
1554 /* Settings that should be unnecessary. */
1555 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1557 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
1559 set_gdbarch_remote_translate_xfer_address
1560 (gdbarch
, generic_remote_translate_xfer_address
);
1562 /* Hardware watchpoint / breakpoint support. */
1563 switch (info
.bfd_arch_info
->mach
)
1566 case bfd_mach_frvsimple
:
1567 case bfd_mach_fr500
:
1568 case bfd_mach_frvtomcat
:
1569 /* fr500-style hardware debugging support. */
1570 var
->num_hw_watchpoints
= 4;
1571 var
->num_hw_breakpoints
= 4;
1574 case bfd_mach_fr400
:
1575 case bfd_mach_fr450
:
1576 /* fr400-style hardware debugging support. */
1577 var
->num_hw_watchpoints
= 2;
1578 var
->num_hw_breakpoints
= 4;
1582 /* Otherwise, assume we don't have hardware debugging support. */
1583 var
->num_hw_watchpoints
= 0;
1584 var
->num_hw_breakpoints
= 0;
1588 set_gdbarch_print_insn (gdbarch
, print_insn_frv
);
1589 if (frv_abi (gdbarch
) == FRV_ABI_FDPIC
)
1590 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
1591 frv_convert_from_func_ptr_addr
);
1593 /* Hook in ABI-specific overrides, if they have been registered. */
1594 gdbarch_init_osabi (info
, gdbarch
);
1596 /* Set the sigtramp frame sniffer. */
1597 frame_unwind_append_sniffer (gdbarch
, frv_sigtramp_frame_sniffer
);
1599 /* Set the fallback (prologue based) frame sniffer. */
1600 frame_unwind_append_sniffer (gdbarch
, frv_frame_sniffer
);
1606 _initialize_frv_tdep (void)
1608 register_gdbarch_init (bfd_arch_frv
, frv_gdbarch_init
);