gdb/i386-tdep.h

   1 /* Target-dependent code for the i386.
   2
   3    Copyright (C) 2001-2004, 2006-2012 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef I386_TDEP_H
  21 #define I386_TDEP_H
  22
  23 struct frame_info;
  24 struct gdbarch;
  25 struct reggroup;
  26 struct regset;
  27 struct regcache;
  28
  29 /* GDB's i386 target supports both the 32-bit Intel Architecture
  30    (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
  31    a similar register layout for both.
  32
  33    - General purpose registers
  34    - FPU data registers
  35    - FPU control registers
  36    - SSE data registers
  37    - SSE control register
  38
  39    The general purpose registers for the x86-64 architecture are quite
  40    different from IA-32.  Therefore, gdbarch_fp0_regnum
  41    determines the register number at which the FPU data registers
  42    start.  The number of FPU data and control registers is the same
  43    for both architectures.  The number of SSE registers however,
  44    differs and is determined by the num_xmm_regs member of `struct
  45    gdbarch_tdep'.  */
  46
  47 /* Convention for returning structures.  */
  48
  49 enum struct_return
  50 {
  51   pcc_struct_return,            /* Return "short" structures in memory.  */
  52   reg_struct_return             /* Return "short" structures in registers.  */
  53 };
  54
  55 /* Register classes as defined in the AMD x86-64 psABI.  */
  56
  57 enum amd64_reg_class
  58 {
  59   AMD64_INTEGER,
  60   AMD64_SSE,
  61   AMD64_SSEUP,
  62   AMD64_X87,
  63   AMD64_X87UP,
  64   AMD64_COMPLEX_X87,
  65   AMD64_NO_CLASS,
  66   AMD64_MEMORY
  67 };
  68
  69 /* i386 architecture specific information.  */
  70 struct gdbarch_tdep
  71 {
  72   /* General-purpose registers.  */
  73   struct regset *gregset;
  74   int *gregset_reg_offset;
  75   int gregset_num_regs;
  76   size_t sizeof_gregset;
  77
  78   /* The general-purpose registers used to pass integers when making
  79      function calls.  This only applies to amd64, as all parameters
  80      are passed through the stack on x86.  */
  81   int call_dummy_num_integer_regs;
  82   int *call_dummy_integer_regs;
  83
  84   /* Used on amd64 only.  Classify TYPE according to calling conventions,
  85      and store the result in CLASS.  */
  86   void (*classify) (struct type *type, enum amd64_reg_class class[2]);
  87
  88   /* Used on amd64 only.  Non-zero if the first few MEMORY arguments
  89      should be passed by pointer.
  90
  91      More precisely, MEMORY arguments are passed through the stack.
  92      But certain architectures require that their address be passed
  93      by register as well, if there are still some integer registers
  94      available for argument passing.  */
  95   int memory_args_by_pointer;
  96
  97   /* Used on amd64 only.
  98
  99      If non-zero, then the callers of a function are expected to reserve
 100      some space in the stack just before the area where the PC is saved
 101      so that the callee may save the integer-parameter registers there.
 102      The amount of space is dependent on the list of registers used for
 103      integer parameter passing (see component call_dummy_num_integer_regs
 104      above).  */
 105   int integer_param_regs_saved_in_caller_frame;
 106
 107   /* Floating-point registers.  */
 108   struct regset *fpregset;
 109   size_t sizeof_fpregset;
 110
 111   /* XSAVE extended state.  */
 112   struct regset *xstateregset;
 113
 114   /* Register number for %st(0).  The register numbers for the other
 115      registers follow from this one.  Set this to -1 to indicate the
 116      absence of an FPU.  */
 117   int st0_regnum;
 118
 119   /* Number of MMX registers.  */
 120   int num_mmx_regs;
 121
 122   /* Register number for %mm0.  Set this to -1 to indicate the absence
 123      of MMX support.  */
 124   int mm0_regnum;
 125
 126   /* Number of pseudo YMM registers.  */
 127   int num_ymm_regs;
 128
 129   /* Register number for %ymm0.  Set this to -1 to indicate the absence
 130      of pseudo YMM register support.  */
 131   int ymm0_regnum;
 132
 133   /* Number of byte registers.  */
 134   int num_byte_regs;
 135
 136   /* Register pseudo number for %al.  */
 137   int al_regnum;
 138
 139   /* Number of pseudo word registers.  */
 140   int num_word_regs;
 141
 142   /* Register number for %ax.  */
 143   int ax_regnum;
 144
 145   /* Number of pseudo dword registers.  */
 146   int num_dword_regs;
 147
 148   /* Register number for %eax.  Set this to -1 to indicate the absence
 149      of pseudo dword register support.  */
 150   int eax_regnum;
 151
 152   /* Register number for SP, relative to %eax.  Set this to -1 to
 153      indicate the absence of pseudo SP register support.  */
 154   int sp_regnum_from_eax;
 155
 156   /* Register number for PC, relative to %eax.  Set this to -1 to
 157      indicate the absence of pseudo PC register support.  */
 158   int pc_regnum_from_eax;
 159
 160   /* Number of core registers.  */
 161   int num_core_regs;
 162
 163   /* Number of SSE registers.  */
 164   int num_xmm_regs;
 165
 166   /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
 167      register), excluding the x87 bit, which are supported by this GDB.  */
 168
 169   uint64_t xcr0;
 170
 171   /* Offset of XCR0 in XSAVE extended state.  */
 172   int xsave_xcr0_offset;
 173
 174   /* Register names.  */
 175   const char **register_names;
 176
 177   /* Register number for %ymm0h.  Set this to -1 to indicate the absence
 178      of upper YMM register support.  */
 179   int ymm0h_regnum;
 180
 181   /* Upper YMM register names.  Only used for tdesc_numbered_register.  */
 182   const char **ymmh_register_names;
 183
 184   /* Target description.  */
 185   const struct target_desc *tdesc;
 186
 187   /* Register group function.  */
 188   const void *register_reggroup_p;
 189
 190   /* Offset of saved PC in jmp_buf.  */
 191   int jb_pc_offset;
 192
 193   /* Convention for returning structures.  */
 194   enum struct_return struct_return;
 195
 196   /* Address range where sigtramp lives.  */
 197   CORE_ADDR sigtramp_start;
 198   CORE_ADDR sigtramp_end;
 199
 200   /* Detect sigtramp.  */
 201   int (*sigtramp_p) (struct frame_info *);
 202
 203   /* Get address of sigcontext for sigtramp.  */
 204   CORE_ADDR (*sigcontext_addr) (struct frame_info *);
 205
 206   /* Offset of registers in `struct sigcontext'.  */
 207   int *sc_reg_offset;
 208   int sc_num_regs;
 209
 210   /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
 211      is deprecated, please use `sc_reg_offset' instead.  */
 212   int sc_pc_offset;
 213   int sc_sp_offset;
 214
 215   /* ISA-specific data types.  */
 216   struct type *i386_mmx_type;
 217   struct type *i386_ymm_type;
 218   struct type *i387_ext_type;
 219
 220   /* Process record/replay target.  */
 221   /* The map for registers because the AMD64's registers order
 222      in GDB is not same as I386 instructions.  */
 223   const int *record_regmap;
 224   /* Parse intx80 args.  */
 225   int (*i386_intx80_record) (struct regcache *regcache);
 226   /* Parse sysenter args.  */
 227   int (*i386_sysenter_record) (struct regcache *regcache);
 228   /* Parse syscall args.  */
 229   int (*i386_syscall_record) (struct regcache *regcache);
 230 };
 231
 232 /* Floating-point registers.  */
 233
 234 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
 235    (at most) in the FPU, but are zero-extended to 32 bits in GDB's
 236    register cache.  */
 237
 238 /* Return non-zero if REGNUM matches the FP register and the FP
 239    register set is active.  */
 240 extern int i386_fp_regnum_p (struct gdbarch *, int);
 241 extern int i386_fpc_regnum_p (struct gdbarch *, int);
 242
 243 /* Register numbers of various important registers.  */
 244
 245 enum i386_regnum
 246 {
 247   I386_EAX_REGNUM,              /* %eax */
 248   I386_ECX_REGNUM,              /* %ecx */
 249   I386_EDX_REGNUM,              /* %edx */
 250   I386_EBX_REGNUM,              /* %ebx */
 251   I386_ESP_REGNUM,              /* %esp */
 252   I386_EBP_REGNUM,              /* %ebp */
 253   I386_ESI_REGNUM,              /* %esi */
 254   I386_EDI_REGNUM,              /* %edi */
 255   I386_EIP_REGNUM,              /* %eip */
 256   I386_EFLAGS_REGNUM,           /* %eflags */
 257   I386_CS_REGNUM,               /* %cs */
 258   I386_SS_REGNUM,               /* %ss */
 259   I386_DS_REGNUM,               /* %ds */
 260   I386_ES_REGNUM,               /* %es */
 261   I386_FS_REGNUM,               /* %fs */
 262   I386_GS_REGNUM,               /* %gs */
 263   I386_ST0_REGNUM,              /* %st(0) */
 264   I386_MXCSR_REGNUM = 40,       /* %mxcsr */
 265   I386_YMM0H_REGNUM,            /* %ymm0h */
 266   I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7
 267 };
 268
 269 /* Register numbers of RECORD_REGMAP.  */
 270
 271 enum record_i386_regnum
 272 {
 273   X86_RECORD_REAX_REGNUM,
 274   X86_RECORD_RECX_REGNUM,
 275   X86_RECORD_REDX_REGNUM,
 276   X86_RECORD_REBX_REGNUM,
 277   X86_RECORD_RESP_REGNUM,
 278   X86_RECORD_REBP_REGNUM,
 279   X86_RECORD_RESI_REGNUM,
 280   X86_RECORD_REDI_REGNUM,
 281   X86_RECORD_R8_REGNUM,
 282   X86_RECORD_R9_REGNUM,
 283   X86_RECORD_R10_REGNUM,
 284   X86_RECORD_R11_REGNUM,
 285   X86_RECORD_R12_REGNUM,
 286   X86_RECORD_R13_REGNUM,
 287   X86_RECORD_R14_REGNUM,
 288   X86_RECORD_R15_REGNUM,
 289   X86_RECORD_REIP_REGNUM,
 290   X86_RECORD_EFLAGS_REGNUM,
 291   X86_RECORD_CS_REGNUM,
 292   X86_RECORD_SS_REGNUM,
 293   X86_RECORD_DS_REGNUM,
 294   X86_RECORD_ES_REGNUM,
 295   X86_RECORD_FS_REGNUM,
 296   X86_RECORD_GS_REGNUM,
 297 };
 298
 299 #define I386_NUM_GREGS  16
 300 #define I386_NUM_XREGS  9
 301
 302 #define I386_SSE_NUM_REGS       (I386_MXCSR_REGNUM + 1)
 303 #define I386_AVX_NUM_REGS       (I386_YMM7H_REGNUM + 1)
 304
 305 /* Size of the largest register.  */
 306 #define I386_MAX_REGISTER_SIZE  16
 307
 308 /* Types for i386-specific registers.  */
 309 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
 310
 311 /* Checks of different pseudo-registers.  */
 312 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
 313 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
 314 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
 315 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
 316 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
 317
 318 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
 319                                               int regnum);
 320 extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
 321                                                int regnum);
 322
 323 extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
 324                                                   struct regcache *regcache,
 325                                                   int regnum,
 326                                                   struct value *result);
 327
 328 extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
 329                                         struct regcache *regcache,
 330                                         int regnum, const gdb_byte *buf);
 331
 332 /* Segment selectors.  */
 333 #define I386_SEL_RPL    0x0003  /* Requester's Privilege Level mask.  */
 334 #define I386_SEL_UPL    0x0003  /* User Privilige Level.  */
 335 #define I386_SEL_KPL    0x0000  /* Kernel Privilige Level.  */
 336
 337 /* The length of the longest i386 instruction (according to
 338    include/asm-i386/kprobes.h in Linux 2.6.  */
 339 #define I386_MAX_INSN_LEN (16)
 340
 341 /* Functions exported from i386-tdep.c.  */
 342 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
 343                                                CORE_ADDR pc, char *name);
 344 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
 345                                           CORE_ADDR pc);
 346
 347 /* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
 348 extern int i386_sigtramp_p (struct frame_info *this_frame);
 349
 350 /* Return non-zero if REGNUM is a member of the specified group.  */
 351 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 352                                      struct reggroup *group);
 353
 354 /* Supply register REGNUM from the general-purpose register set REGSET
 355    to register cache REGCACHE.  If REGNUM is -1, do this for all
 356    registers in REGSET.  */
 357 extern void i386_supply_gregset (const struct regset *regset,
 358                                  struct regcache *regcache, int regnum,
 359                                  const void *gregs, size_t len);
 360
 361 /* Collect register REGNUM from the register cache REGCACHE and store
 362    it in the buffer specified by GREGS and LEN as described by the
 363    general-purpose register set REGSET.  If REGNUM is -1, do this for
 364    all registers in REGSET.  */
 365 extern void i386_collect_gregset (const struct regset *regset,
 366                                   const struct regcache *regcache,
 367                                   int regnum, void *gregs, size_t len);
 368
 369 /* Return the appropriate register set for the core section identified
 370    by SECT_NAME and SECT_SIZE.  */
 371 extern const struct regset *
 372   i386_regset_from_core_section (struct gdbarch *gdbarch,
 373                                  const char *sect_name, size_t sect_size);
 374
 375
 376 extern struct displaced_step_closure *i386_displaced_step_copy_insn
 377   (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
 378    struct regcache *regs);
 379 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
 380                                        struct displaced_step_closure *closure,
 381                                        CORE_ADDR from, CORE_ADDR to,
 382                                        struct regcache *regs);
 383
 384 /* Initialize a basic ELF architecture variant.  */
 385 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
 386
 387 /* Initialize a SVR4 architecture variant.  */
 388 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
 389
 390 extern int i386_process_record (struct gdbarch *gdbarch,
 391                                 struct regcache *regcache, CORE_ADDR addr);
 392
 393 \f
 394
 395 /* Functions and variables exported from i386bsd-tdep.c.  */
 396
 397 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
 398 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
 399 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
 400 extern CORE_ADDR i386obsd_sigtramp_start_addr;
 401 extern CORE_ADDR i386obsd_sigtramp_end_addr;
 402 extern int i386fbsd4_sc_reg_offset[];
 403 extern int i386fbsd_sc_reg_offset[];
 404 extern int i386nbsd_sc_reg_offset[];
 405 extern int i386obsd_sc_reg_offset[];
 406 extern int i386bsd_sc_reg_offset[];
 407
 408 /* SystemTap related functions.  */
 409
 410 extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
 411                                         const char *s);
 412
 413 extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
 414                                           struct stap_parse_info *p);
 415
 416 #endif /* i386-tdep.h */