gdb/i386-tdep.h

   1 /* Target-dependent code for the i386.
   2
   3    Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 59 Temple Place - Suite 330,
  20    Boston, MA 02111-1307, USA.  */
  21
  22 #ifndef I386_TDEP_H
  23 #define I386_TDEP_H
  24
  25 struct frame_info;
  26 struct gdbarch;
  27 struct reggroup;
  28 struct regset;
  29 struct regcache;
  30
  31 /* GDB's i386 target supports both the 32-bit Intel Architecture
  32    (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
  33    a similar register layout for both.
  34
  35    - General purpose registers
  36    - FPU data registers
  37    - FPU control registers
  38    - SSE data registers
  39    - SSE control register
  40
  41    The general purpose registers for the x86-64 architecture are quite
  42    different from IA-32.  Therefore, the FP0_REGNUM target macro
  43    determines the register number at which the FPU data registers
  44    start.  The number of FPU data and control registers is the same
  45    for both architectures.  The number of SSE registers however,
  46    differs and is determined by the num_xmm_regs member of `struct
  47    gdbarch_tdep'.  */
  48
  49 /* Convention for returning structures.  */
  50
  51 enum struct_return
  52 {
  53   pcc_struct_return,            /* Return "short" structures in memory.  */
  54   reg_struct_return             /* Return "short" structures in registers.  */
  55 };
  56
  57 /* i386 architecture specific information.  */
  58 struct gdbarch_tdep
  59 {
  60   /* General-purpose registers.  */
  61   struct regset *gregset;
  62   int *gregset_reg_offset;
  63   int gregset_num_regs;
  64   size_t sizeof_gregset;
  65
  66   /* Floating-point registers.  */
  67   struct regset *fpregset;
  68   size_t sizeof_fpregset;
  69
  70   /* Register number for %st(0).  The register numbers for the other
  71      registers follow from this one.  Set this to -1 to indicate the
  72      absence of an FPU.  */
  73   int st0_regnum;
  74
  75   /* Register number for %mm0.  Set this to -1 to indicate the absence
  76      of MMX support.  */
  77   int mm0_regnum;
  78
  79   /* Number of SSE registers.  */
  80   int num_xmm_regs;
  81
  82   /* Offset of saved PC in jmp_buf.  */
  83   int jb_pc_offset;
  84
  85   /* Convention for returning structures.  */
  86   enum struct_return struct_return;
  87
  88   /* Address range where sigtramp lives.  */
  89   CORE_ADDR sigtramp_start;
  90   CORE_ADDR sigtramp_end;
  91
  92   /* Detect sigtramp.  */
  93   int (*sigtramp_p) (struct frame_info *);
  94
  95   /* Get address of sigcontext for sigtramp.  */
  96   CORE_ADDR (*sigcontext_addr) (struct frame_info *);
  97
  98   /* Offset of registers in `struct sigcontext'.  */
  99   int *sc_reg_offset;
 100   int sc_num_regs;
 101
 102   /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
 103      is deprecated, please use `sc_reg_offset' instead.  */
 104   int sc_pc_offset;
 105   int sc_sp_offset;
 106 };
 107
 108 /* Floating-point registers.  */
 109
 110 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
 111    (at most) in the FPU, but are zero-extended to 32 bits in GDB's
 112    register cache.  */
 113
 114 /* "Generic" floating point control register.  */
 115 #define FPC_REGNUM      (FP0_REGNUM + 8)
 116
 117 /* FPU control word.  */
 118 #define FCTRL_REGNUM    FPC_REGNUM
 119
 120 /* FPU status word.  */
 121 #define FSTAT_REGNUM    (FPC_REGNUM + 1)
 122
 123 /* FPU register tag word.  */
 124 #define FTAG_REGNUM     (FPC_REGNUM + 2)
 125
 126 /* FPU instruction's code segment selector, called "FPU Instruction
 127    Pointer Selector" in the IA-32 manuals.  */
 128 #define FISEG_REGNUM    (FPC_REGNUM + 3)
 129
 130 /* FPU instruction's offset within segment.  */
 131 #define FIOFF_REGNUM    (FPC_REGNUM + 4)
 132
 133 /* FPU operand's data segment.  */
 134 #define FOSEG_REGNUM    (FPC_REGNUM + 5)
 135
 136 /* FPU operand's offset within segment */
 137 #define FOOFF_REGNUM    (FPC_REGNUM + 6)
 138
 139 /* FPU opcode, bottom eleven bits.  */
 140 #define FOP_REGNUM      (FPC_REGNUM + 7)
 141
 142 /* Return non-zero if REGNUM matches the FP register and the FP
 143    register set is active.  */
 144 extern int i386_fp_regnum_p (int regnum);
 145 extern int i386_fpc_regnum_p (int regnum);
 146
 147 /* SSE registers.  */
 148
 149 /* First SSE data register.  */
 150 #define XMM0_REGNUM     (FPC_REGNUM + 8)
 151
 152 /* SSE control/status register.  */
 153 #define MXCSR_REGNUM \
 154   (XMM0_REGNUM + gdbarch_tdep (current_gdbarch)->num_xmm_regs)
 155
 156 /* Register numbers of various important registers.  */
 157
 158 enum i386_regnum
 159 {
 160   I386_EAX_REGNUM,              /* %eax */
 161   I386_ECX_REGNUM,              /* %ecx */
 162   I386_EDX_REGNUM,              /* %edx */
 163   I386_EBX_REGNUM,              /* %ebx */
 164   I386_ESP_REGNUM,              /* %esp */
 165   I386_EBP_REGNUM,              /* %ebp */
 166   I386_ESI_REGNUM,              /* %esi */
 167   I386_EDI_REGNUM,              /* %edi */
 168   I386_EIP_REGNUM,              /* %eip */
 169   I386_EFLAGS_REGNUM,           /* %eflags */
 170   I386_CS_REGNUM,               /* %cs */
 171   I386_SS_REGNUM,               /* %ss */
 172   I386_DS_REGNUM,               /* %ds */
 173   I386_ES_REGNUM,               /* %es */
 174   I386_FS_REGNUM,               /* %fs */
 175   I386_GS_REGNUM,               /* %gs */
 176   I386_ST0_REGNUM               /* %st(0) */
 177 };
 178
 179 #define I386_NUM_GREGS  16
 180 #define I386_NUM_FREGS  16
 181 #define I386_NUM_XREGS  9
 182
 183 #define I386_SSE_NUM_REGS       (I386_NUM_GREGS + I386_NUM_FREGS \
 184                                  + I386_NUM_XREGS)
 185
 186 /* Size of the largest register.  */
 187 #define I386_MAX_REGISTER_SIZE  16
 188
 189 /* Functions exported from i386-tdep.c.  */
 190 extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name);
 191 extern int i386_frameless_signal_p (struct frame_info *frame);
 192
 193 /* Return the name of register REG.  */
 194 extern char const *i386_register_name (int reg);
 195
 196 /* Return non-zero if REGNUM is a member of the specified group.  */
 197 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 198                                      struct reggroup *group);
 199
 200 /* Supply register REGNUM from the general-purpose register set REGSET
 201    to register cache REGCACHE.  If REGNUM is -1, do this for all
 202    registers in REGSET.  */
 203 extern void i386_supply_gregset (const struct regset *regset,
 204                                  struct regcache *regcache, int regnum,
 205                                  const void *gregs, size_t len);
 206
 207 /* Return the appropriate register set for the core section identified
 208    by SECT_NAME and SECT_SIZE.  */
 209 extern const struct regset *
 210   i386_regset_from_core_section (struct gdbarch *gdbarch,
 211                                  const char *sect_name, size_t sect_size);
 212
 213 /* Initialize a basic COFF architecture variant.  */
 214 extern void i386_coff_init_abi (struct gdbarch_info, struct gdbarch *);
 215
 216 /* Initialize a basic ELF architecture variant.  */
 217 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
 218
 219 /* Initialize a SVR4 architecture variant.  */
 220 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
 221 \f
 222
 223 /* Functions and variables exported from i386bsd-tdep.c.  */
 224
 225 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
 226 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
 227 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
 228 extern CORE_ADDR i386obsd_sigtramp_start_addr;
 229 extern CORE_ADDR i386obsd_sigtramp_end_addr;
 230 extern int i386fbsd4_sc_reg_offset[];
 231 extern int i386fbsd_sc_reg_offset[];
 232 extern int i386nbsd_sc_reg_offset[];
 233 extern int i386obsd_sc_reg_offset[];
 234 extern int i386bsd_sc_reg_offset[];
 235
 236 #endif /* i386-tdep.h */