gdb/i386-tdep.h

   1 /* Target-dependent code for the i386.
   2
   3    Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008, 2009, 2010
   4    Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef I386_TDEP_H
  22 #define I386_TDEP_H
  23
  24 struct frame_info;
  25 struct gdbarch;
  26 struct reggroup;
  27 struct regset;
  28 struct regcache;
  29
  30 /* GDB's i386 target supports both the 32-bit Intel Architecture
  31    (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
  32    a similar register layout for both.
  33
  34    - General purpose registers
  35    - FPU data registers
  36    - FPU control registers
  37    - SSE data registers
  38    - SSE control register
  39
  40    The general purpose registers for the x86-64 architecture are quite
  41    different from IA-32.  Therefore, gdbarch_fp0_regnum
  42    determines the register number at which the FPU data registers
  43    start.  The number of FPU data and control registers is the same
  44    for both architectures.  The number of SSE registers however,
  45    differs and is determined by the num_xmm_regs member of `struct
  46    gdbarch_tdep'.  */
  47
  48 /* Convention for returning structures.  */
  49
  50 enum struct_return
  51 {
  52   pcc_struct_return,            /* Return "short" structures in memory.  */
  53   reg_struct_return             /* Return "short" structures in registers.  */
  54 };
  55
  56 /* Register classes as defined in the AMD x86-64 psABI.  */
  57
  58 enum amd64_reg_class
  59 {
  60   AMD64_INTEGER,
  61   AMD64_SSE,
  62   AMD64_SSEUP,
  63   AMD64_X87,
  64   AMD64_X87UP,
  65   AMD64_COMPLEX_X87,
  66   AMD64_NO_CLASS,
  67   AMD64_MEMORY
  68 };
  69
  70 /* i386 architecture specific information.  */
  71 struct gdbarch_tdep
  72 {
  73   /* General-purpose registers.  */
  74   struct regset *gregset;
  75   int *gregset_reg_offset;
  76   int gregset_num_regs;
  77   size_t sizeof_gregset;
  78
  79   /* The general-purpose registers used to pass integers when making
  80      function calls.  This only applies to amd64, as all parameters
  81      are passed through the stack on x86.  */
  82   int call_dummy_num_integer_regs;
  83   int *call_dummy_integer_regs;
  84
  85   /* Classify TYPE according to calling conventions, and store
  86      the result in CLASS.  Used on amd64 only.  */
  87   void (*classify) (struct type *type, enum amd64_reg_class class[2]);
  88
  89   /* Non-zero if the first few MEMORY arguments should be passed by
  90      pointer.
  91
  92      More precisely, MEMORY arguments are passed through the stack.
  93      But certain architectures require that their address be passed
  94      by register as well, if there are still some integer registers
  95      available for argument passing.  */
  96   int memory_args_by_pointer;
  97
  98   /* Floating-point registers.  */
  99   struct regset *fpregset;
 100   size_t sizeof_fpregset;
 101
 102   /* Register number for %st(0).  The register numbers for the other
 103      registers follow from this one.  Set this to -1 to indicate the
 104      absence of an FPU.  */
 105   int st0_regnum;
 106
 107   /* Register number for %mm0.  Set this to -1 to indicate the absence
 108      of MMX support.  */
 109   int mm0_regnum;
 110
 111   /* Number of SSE registers.  */
 112   int num_xmm_regs;
 113
 114   /* Offset of saved PC in jmp_buf.  */
 115   int jb_pc_offset;
 116
 117   /* Convention for returning structures.  */
 118   enum struct_return struct_return;
 119
 120   /* Address range where sigtramp lives.  */
 121   CORE_ADDR sigtramp_start;
 122   CORE_ADDR sigtramp_end;
 123
 124   /* Detect sigtramp.  */
 125   int (*sigtramp_p) (struct frame_info *);
 126
 127   /* Get address of sigcontext for sigtramp.  */
 128   CORE_ADDR (*sigcontext_addr) (struct frame_info *);
 129
 130   /* Offset of registers in `struct sigcontext'.  */
 131   int *sc_reg_offset;
 132   int sc_num_regs;
 133
 134   /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
 135      is deprecated, please use `sc_reg_offset' instead.  */
 136   int sc_pc_offset;
 137   int sc_sp_offset;
 138
 139   /* ISA-specific data types.  */
 140   struct type *i386_eflags_type;
 141   struct type *i386_mxcsr_type;
 142   struct type *i386_mmx_type;
 143   struct type *i386_sse_type;
 144   struct type *i387_ext_type;
 145
 146   /* Process record/replay target.  */
 147   /* The map for registers because the AMD64's registers order
 148      in GDB is not same as I386 instructions.  */
 149   const int *record_regmap;
 150   /* Parse intx80 args.  */
 151   int (*i386_intx80_record) (struct regcache *regcache);
 152   /* Parse sysenter args.  */
 153   int (*i386_sysenter_record) (struct regcache *regcache);
 154   /* Parse syscall args.  */
 155   int (*i386_syscall_record) (struct regcache *regcache);
 156 };
 157
 158 /* Floating-point registers.  */
 159
 160 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
 161    (at most) in the FPU, but are zero-extended to 32 bits in GDB's
 162    register cache.  */
 163
 164 /* Return non-zero if REGNUM matches the FP register and the FP
 165    register set is active.  */
 166 extern int i386_fp_regnum_p (struct gdbarch *, int);
 167 extern int i386_fpc_regnum_p (struct gdbarch *, int);
 168
 169 /* Register numbers of various important registers.  */
 170
 171 enum i386_regnum
 172 {
 173   I386_EAX_REGNUM,              /* %eax */
 174   I386_ECX_REGNUM,              /* %ecx */
 175   I386_EDX_REGNUM,              /* %edx */
 176   I386_EBX_REGNUM,              /* %ebx */
 177   I386_ESP_REGNUM,              /* %esp */
 178   I386_EBP_REGNUM,              /* %ebp */
 179   I386_ESI_REGNUM,              /* %esi */
 180   I386_EDI_REGNUM,              /* %edi */
 181   I386_EIP_REGNUM,              /* %eip */
 182   I386_EFLAGS_REGNUM,           /* %eflags */
 183   I386_CS_REGNUM,               /* %cs */
 184   I386_SS_REGNUM,               /* %ss */
 185   I386_DS_REGNUM,               /* %ds */
 186   I386_ES_REGNUM,               /* %es */
 187   I386_FS_REGNUM,               /* %fs */
 188   I386_GS_REGNUM,               /* %gs */
 189   I386_ST0_REGNUM               /* %st(0) */
 190 };
 191
 192 /* Register numbers of RECORD_REGMAP.  */
 193
 194 enum record_i386_regnum
 195 {
 196   X86_RECORD_REAX_REGNUM,
 197   X86_RECORD_RECX_REGNUM,
 198   X86_RECORD_REDX_REGNUM,
 199   X86_RECORD_REBX_REGNUM,
 200   X86_RECORD_RESP_REGNUM,
 201   X86_RECORD_REBP_REGNUM,
 202   X86_RECORD_RESI_REGNUM,
 203   X86_RECORD_REDI_REGNUM,
 204   X86_RECORD_R8_REGNUM,
 205   X86_RECORD_R9_REGNUM,
 206   X86_RECORD_R10_REGNUM,
 207   X86_RECORD_R11_REGNUM,
 208   X86_RECORD_R12_REGNUM,
 209   X86_RECORD_R13_REGNUM,
 210   X86_RECORD_R14_REGNUM,
 211   X86_RECORD_R15_REGNUM,
 212   X86_RECORD_REIP_REGNUM,
 213   X86_RECORD_EFLAGS_REGNUM,
 214   X86_RECORD_CS_REGNUM,
 215   X86_RECORD_SS_REGNUM,
 216   X86_RECORD_DS_REGNUM,
 217   X86_RECORD_ES_REGNUM,
 218   X86_RECORD_FS_REGNUM,
 219   X86_RECORD_GS_REGNUM,
 220 };
 221
 222 #define I386_NUM_GREGS  16
 223 #define I386_NUM_FREGS  16
 224 #define I386_NUM_XREGS  9
 225
 226 #define I386_SSE_NUM_REGS       (I386_NUM_GREGS + I386_NUM_FREGS \
 227                                  + I386_NUM_XREGS)
 228
 229 /* Size of the largest register.  */
 230 #define I386_MAX_REGISTER_SIZE  16
 231
 232 /* Types for i386-specific registers.  */
 233 extern struct type *i386_eflags_type (struct gdbarch *gdbarch);
 234 extern struct type *i386_mxcsr_type (struct gdbarch *gdbarch);
 235 extern struct type *i386_mmx_type (struct gdbarch *gdbarch);
 236 extern struct type *i386_sse_type (struct gdbarch *gdbarch);
 237 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
 238
 239 /* Segment selectors.  */
 240 #define I386_SEL_RPL    0x0003  /* Requester's Privilege Level mask.  */
 241 #define I386_SEL_UPL    0x0003  /* User Privilige Level. */
 242 #define I386_SEL_KPL    0x0000  /* Kernel Privilige Level. */
 243
 244 /* The length of the longest i386 instruction (according to
 245    include/asm-i386/kprobes.h in Linux 2.6.  */
 246 #define I386_MAX_INSN_LEN (16)
 247
 248 /* Functions exported from i386-tdep.c.  */
 249 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
 250                                                CORE_ADDR pc, char *name);
 251 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc);
 252
 253 /* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
 254 extern int i386_sigtramp_p (struct frame_info *this_frame);
 255
 256 /* Return the name of register REGNUM.  */
 257 extern char const *i386_register_name (struct gdbarch * gdbarch, int regnum);
 258
 259 /* Return non-zero if REGNUM is a member of the specified group.  */
 260 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 261                                      struct reggroup *group);
 262
 263 /* Supply register REGNUM from the general-purpose register set REGSET
 264    to register cache REGCACHE.  If REGNUM is -1, do this for all
 265    registers in REGSET.  */
 266 extern void i386_supply_gregset (const struct regset *regset,
 267                                  struct regcache *regcache, int regnum,
 268                                  const void *gregs, size_t len);
 269
 270 /* Collect register REGNUM from the register cache REGCACHE and store
 271    it in the buffer specified by GREGS and LEN as described by the
 272    general-purpose register set REGSET.  If REGNUM is -1, do this for
 273    all registers in REGSET.  */
 274 extern void i386_collect_gregset (const struct regset *regset,
 275                                   const struct regcache *regcache,
 276                                   int regnum, void *gregs, size_t len);
 277
 278 /* Return the appropriate register set for the core section identified
 279    by SECT_NAME and SECT_SIZE.  */
 280 extern const struct regset *
 281   i386_regset_from_core_section (struct gdbarch *gdbarch,
 282                                  const char *sect_name, size_t sect_size);
 283
 284
 285 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
 286                                        struct displaced_step_closure *closure,
 287                                        CORE_ADDR from, CORE_ADDR to,
 288                                        struct regcache *regs);
 289
 290 /* Initialize a basic ELF architecture variant.  */
 291 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
 292
 293 /* Initialize a SVR4 architecture variant.  */
 294 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
 295
 296 extern int i386_process_record (struct gdbarch *gdbarch,
 297                                 struct regcache *regcache, CORE_ADDR addr);
 298 \f
 299
 300 /* Functions and variables exported from i386bsd-tdep.c.  */
 301
 302 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
 303 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
 304 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
 305 extern CORE_ADDR i386obsd_sigtramp_start_addr;
 306 extern CORE_ADDR i386obsd_sigtramp_end_addr;
 307 extern int i386fbsd4_sc_reg_offset[];
 308 extern int i386fbsd_sc_reg_offset[];
 309 extern int i386nbsd_sc_reg_offset[];
 310 extern int i386obsd_sc_reg_offset[];
 311 extern int i386bsd_sc_reg_offset[];
 312
 313 #endif /* i386-tdep.h */