1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "arch-utils.h"
25 #include "floatformat.h"
28 #include "reggroups.h"
30 #include "frame-base.h"
31 #include "frame-unwind.h"
34 #include "gdb_assert.h"
36 #include "elf/common.h" /* for DT_PLTGOT value */
41 #include "ia64-tdep.h"
44 #ifdef HAVE_LIBUNWIND_IA64_H
45 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
46 #include "libunwind-frame.h"
47 #include "libunwind-ia64.h"
49 /* Note: KERNEL_START is supposed to be an address which is not going
50 to ever contain any valid unwind info. For ia64 linux, the choice
51 of 0xc000000000000000 is fairly safe since that's uncached space.
53 We use KERNEL_START as follows: after obtaining the kernel's
54 unwind table via getunwind(), we project its unwind data into
55 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
56 when ia64_access_mem() sees a memory access to this
57 address-range, we redirect it to ktab instead.
59 None of this hackery is needed with a modern kernel/libcs
60 which uses the kernel virtual DSO to provide access to the
61 kernel's unwind info. In that case, ktab_size remains 0 and
62 hence the value of KERNEL_START doesn't matter. */
64 #define KERNEL_START 0xc000000000000000ULL
66 static size_t ktab_size
= 0;
67 struct ia64_table_entry
69 uint64_t start_offset
;
74 static struct ia64_table_entry
*ktab
= NULL
;
78 /* An enumeration of the different IA-64 instruction types. */
80 typedef enum instruction_type
82 A
, /* Integer ALU ; I-unit or M-unit */
83 I
, /* Non-ALU integer; I-unit */
84 M
, /* Memory ; M-unit */
85 F
, /* Floating-point ; F-unit */
86 B
, /* Branch ; B-unit */
87 L
, /* Extended (L+X) ; I-unit */
88 X
, /* Extended (L+X) ; I-unit */
89 undefined
/* undefined or reserved */
92 /* We represent IA-64 PC addresses as the value of the instruction
93 pointer or'd with some bit combination in the low nibble which
94 represents the slot number in the bundle addressed by the
95 instruction pointer. The problem is that the Linux kernel
96 multiplies its slot numbers (for exceptions) by one while the
97 disassembler multiplies its slot numbers by 6. In addition, I've
98 heard it said that the simulator uses 1 as the multiplier.
100 I've fixed the disassembler so that the bytes_per_line field will
101 be the slot multiplier. If bytes_per_line comes in as zero, it
102 is set to six (which is how it was set up initially). -- objdump
103 displays pretty disassembly dumps with this value. For our purposes,
104 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
105 never want to also display the raw bytes the way objdump does. */
107 #define SLOT_MULTIPLIER 1
109 /* Length in bytes of an instruction bundle */
111 #define BUNDLE_LEN 16
113 static gdbarch_init_ftype ia64_gdbarch_init
;
115 static gdbarch_register_name_ftype ia64_register_name
;
116 static gdbarch_register_type_ftype ia64_register_type
;
117 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
118 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
119 static struct type
*is_float_or_hfa_type (struct type
*t
);
120 static CORE_ADDR
ia64_find_global_pointer (CORE_ADDR faddr
);
122 static struct type
*builtin_type_ia64_ext
;
124 #define NUM_IA64_RAW_REGS 462
126 static int sp_regnum
= IA64_GR12_REGNUM
;
127 static int fp_regnum
= IA64_VFP_REGNUM
;
128 static int lr_regnum
= IA64_VRAP_REGNUM
;
130 /* NOTE: we treat the register stack registers r32-r127 as pseudo-registers because
131 they may not be accessible via the ptrace register get/set interfaces. */
132 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
, VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
133 V127_REGNUM
= V32_REGNUM
+ 95,
134 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16, VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
136 /* Array of register names; There should be ia64_num_regs strings in
139 static char *ia64_register_names
[] =
140 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
141 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
142 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
143 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
144 "", "", "", "", "", "", "", "",
145 "", "", "", "", "", "", "", "",
146 "", "", "", "", "", "", "", "",
147 "", "", "", "", "", "", "", "",
148 "", "", "", "", "", "", "", "",
149 "", "", "", "", "", "", "", "",
150 "", "", "", "", "", "", "", "",
151 "", "", "", "", "", "", "", "",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
157 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
158 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
159 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
160 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
161 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
162 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
163 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
164 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
165 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
166 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
167 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
168 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
169 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
170 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
171 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
172 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
174 "", "", "", "", "", "", "", "",
175 "", "", "", "", "", "", "", "",
176 "", "", "", "", "", "", "", "",
177 "", "", "", "", "", "", "", "",
178 "", "", "", "", "", "", "", "",
179 "", "", "", "", "", "", "", "",
180 "", "", "", "", "", "", "", "",
181 "", "", "", "", "", "", "", "",
183 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
187 "pr", "ip", "psr", "cfm",
189 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
190 "", "", "", "", "", "", "", "",
191 "rsc", "bsp", "bspstore", "rnat",
193 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
194 "ccv", "", "", "", "unat", "", "", "",
195 "fpsr", "", "", "", "itc",
196 "", "", "", "", "", "", "", "", "", "",
197 "", "", "", "", "", "", "", "", "",
199 "", "", "", "", "", "", "", "", "", "",
200 "", "", "", "", "", "", "", "", "", "",
201 "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "",
203 "", "", "", "", "", "", "", "", "", "",
204 "", "", "", "", "", "", "", "", "", "",
206 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
207 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
208 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
209 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
210 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
211 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
212 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
213 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
214 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
215 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
216 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
217 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
218 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
219 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
220 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
221 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
225 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
226 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
227 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
228 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
229 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
230 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
231 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
232 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
233 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
234 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
235 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
236 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
238 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
239 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
240 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
241 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
242 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
243 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
244 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
245 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
248 struct ia64_frame_cache
250 CORE_ADDR base
; /* frame pointer base for frame */
251 CORE_ADDR pc
; /* function start pc for frame */
252 CORE_ADDR saved_sp
; /* stack pointer for frame */
253 CORE_ADDR bsp
; /* points at r32 for the current frame */
254 CORE_ADDR cfm
; /* cfm value for current frame */
255 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
257 int sof
; /* Size of frame (decoded from cfm value) */
258 int sol
; /* Size of locals (decoded from cfm value) */
259 int sor
; /* Number of rotating registers. (decoded from cfm value) */
260 CORE_ADDR after_prologue
;
261 /* Address of first instruction after the last
262 prologue instruction; Note that there may
263 be instructions from the function's body
264 intermingled with the prologue. */
265 int mem_stack_frame_size
;
266 /* Size of the memory stack frame (may be zero),
267 or -1 if it has not been determined yet. */
268 int fp_reg
; /* Register number (if any) used a frame pointer
269 for this frame. 0 if no register is being used
270 as the frame pointer. */
272 /* Saved registers. */
273 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
277 #define SIGCONTEXT_REGISTER_ADDRESS \
278 (gdbarch_tdep (current_gdbarch)->sigcontext_register_address)
281 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
282 struct reggroup
*group
)
287 if (group
== all_reggroup
)
289 vector_p
= TYPE_VECTOR (register_type (gdbarch
, regnum
));
290 float_p
= TYPE_CODE (register_type (gdbarch
, regnum
)) == TYPE_CODE_FLT
;
291 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
292 if (group
== float_reggroup
)
294 if (group
== vector_reggroup
)
296 if (group
== general_reggroup
)
297 return (!vector_p
&& !float_p
);
298 if (group
== save_reggroup
|| group
== restore_reggroup
)
304 ia64_register_name (int reg
)
306 return ia64_register_names
[reg
];
310 ia64_register_type (struct gdbarch
*arch
, int reg
)
312 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
313 return builtin_type_ia64_ext
;
315 return builtin_type_long
;
319 ia64_dwarf_reg_to_regnum (int reg
)
321 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
322 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
327 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
332 const struct floatformat floatformat_ia64_ext
=
334 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
335 floatformat_intbit_yes
, "floatformat_ia64_ext", floatformat_valid
338 const struct floatformat
*floatformats_ia64_ext
[2] =
340 &floatformat_ia64_ext
,
341 &floatformat_ia64_ext
345 /* Extract ``len'' bits from an instruction bundle starting at
349 extract_bit_field (char *bundle
, int from
, int len
)
351 long long result
= 0LL;
353 int from_byte
= from
/ 8;
354 int to_byte
= to
/ 8;
355 unsigned char *b
= (unsigned char *) bundle
;
361 if (from_byte
== to_byte
)
362 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
363 result
= c
>> (from
% 8);
364 lshift
= 8 - (from
% 8);
366 for (i
= from_byte
+1; i
< to_byte
; i
++)
368 result
|= ((long long) b
[i
]) << lshift
;
372 if (from_byte
< to_byte
&& (to
% 8 != 0))
375 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
376 result
|= ((long long) c
) << lshift
;
382 /* Replace the specified bits in an instruction bundle */
385 replace_bit_field (char *bundle
, long long val
, int from
, int len
)
388 int from_byte
= from
/ 8;
389 int to_byte
= to
/ 8;
390 unsigned char *b
= (unsigned char *) bundle
;
393 if (from_byte
== to_byte
)
395 unsigned char left
, right
;
397 left
= (c
>> (to
% 8)) << (to
% 8);
398 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
399 c
= (unsigned char) (val
& 0xff);
400 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
408 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
409 c
= c
| (val
<< (from
% 8));
411 val
>>= 8 - from
% 8;
413 for (i
= from_byte
+1; i
< to_byte
; i
++)
422 unsigned char cv
= (unsigned char) val
;
424 c
= c
>> (to
% 8) << (to
% 8);
425 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
431 /* Return the contents of slot N (for N = 0, 1, or 2) in
432 and instruction bundle */
435 slotN_contents (char *bundle
, int slotnum
)
437 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
440 /* Store an instruction in an instruction bundle */
443 replace_slotN_contents (char *bundle
, long long instr
, int slotnum
)
445 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
448 static enum instruction_type template_encoding_table
[32][3] =
450 { M
, I
, I
}, /* 00 */
451 { M
, I
, I
}, /* 01 */
452 { M
, I
, I
}, /* 02 */
453 { M
, I
, I
}, /* 03 */
454 { M
, L
, X
}, /* 04 */
455 { M
, L
, X
}, /* 05 */
456 { undefined
, undefined
, undefined
}, /* 06 */
457 { undefined
, undefined
, undefined
}, /* 07 */
458 { M
, M
, I
}, /* 08 */
459 { M
, M
, I
}, /* 09 */
460 { M
, M
, I
}, /* 0A */
461 { M
, M
, I
}, /* 0B */
462 { M
, F
, I
}, /* 0C */
463 { M
, F
, I
}, /* 0D */
464 { M
, M
, F
}, /* 0E */
465 { M
, M
, F
}, /* 0F */
466 { M
, I
, B
}, /* 10 */
467 { M
, I
, B
}, /* 11 */
468 { M
, B
, B
}, /* 12 */
469 { M
, B
, B
}, /* 13 */
470 { undefined
, undefined
, undefined
}, /* 14 */
471 { undefined
, undefined
, undefined
}, /* 15 */
472 { B
, B
, B
}, /* 16 */
473 { B
, B
, B
}, /* 17 */
474 { M
, M
, B
}, /* 18 */
475 { M
, M
, B
}, /* 19 */
476 { undefined
, undefined
, undefined
}, /* 1A */
477 { undefined
, undefined
, undefined
}, /* 1B */
478 { M
, F
, B
}, /* 1C */
479 { M
, F
, B
}, /* 1D */
480 { undefined
, undefined
, undefined
}, /* 1E */
481 { undefined
, undefined
, undefined
}, /* 1F */
484 /* Fetch and (partially) decode an instruction at ADDR and return the
485 address of the next instruction to fetch. */
488 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
490 char bundle
[BUNDLE_LEN
];
491 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
495 /* Warn about slot numbers greater than 2. We used to generate
496 an error here on the assumption that the user entered an invalid
497 address. But, sometimes GDB itself requests an invalid address.
498 This can (easily) happen when execution stops in a function for
499 which there are no symbols. The prologue scanner will attempt to
500 find the beginning of the function - if the nearest symbol
501 happens to not be aligned on a bundle boundary (16 bytes), the
502 resulting starting address will cause GDB to think that the slot
505 So we warn about it and set the slot number to zero. It is
506 not necessarily a fatal condition, particularly if debugging
507 at the assembly language level. */
510 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
511 "Using slot 0 instead"));
517 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
522 *instr
= slotN_contents (bundle
, slotnum
);
523 template = extract_bit_field (bundle
, 0, 5);
524 *it
= template_encoding_table
[(int)template][slotnum
];
526 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
529 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
534 /* There are 5 different break instructions (break.i, break.b,
535 break.m, break.f, and break.x), but they all have the same
536 encoding. (The five bit template in the low five bits of the
537 instruction bundle distinguishes one from another.)
539 The runtime architecture manual specifies that break instructions
540 used for debugging purposes must have the upper two bits of the 21
541 bit immediate set to a 0 and a 1 respectively. A breakpoint
542 instruction encodes the most significant bit of its 21 bit
543 immediate at bit 36 of the 41 bit instruction. The penultimate msb
544 is at bit 25 which leads to the pattern below.
546 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
547 it turns out that 0x80000 was used as the syscall break in the early
548 simulators. So I changed the pattern slightly to do "break.i 0x080001"
549 instead. But that didn't work either (I later found out that this
550 pattern was used by the simulator that I was using.) So I ended up
551 using the pattern seen below. */
554 #define IA64_BREAKPOINT 0x00002000040LL
556 #define IA64_BREAKPOINT 0x00003333300LL
559 ia64_memory_insert_breakpoint (struct bp_target_info
*bp_tgt
)
561 CORE_ADDR addr
= bp_tgt
->placed_address
;
562 char bundle
[BUNDLE_LEN
];
563 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
569 error (_("Can't insert breakpoint for slot numbers greater than 2."));
573 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
575 /* Check for L type instruction in 2nd slot, if present then
576 bump up the slot number to the 3rd slot */
577 template = extract_bit_field (bundle
, 0, 5);
578 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
583 instr
= slotN_contents (bundle
, slotnum
);
584 memcpy (bp_tgt
->shadow_contents
, &instr
, sizeof (instr
));
585 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= sizeof (instr
);
586 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
588 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
594 ia64_memory_remove_breakpoint (struct bp_target_info
*bp_tgt
)
596 CORE_ADDR addr
= bp_tgt
->placed_address
;
597 char bundle
[BUNDLE_LEN
];
598 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
;
605 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
607 /* Check for L type instruction in 2nd slot, if present then
608 bump up the slot number to the 3rd slot */
609 template = extract_bit_field (bundle
, 0, 5);
610 if (slotnum
== 1 && template_encoding_table
[template][1] == L
)
615 memcpy (&instr
, bp_tgt
->shadow_contents
, sizeof instr
);
616 replace_slotN_contents (bundle
, instr
, slotnum
);
618 target_write_memory (addr
, bundle
, BUNDLE_LEN
);
623 /* We don't really want to use this, but remote.c needs to call it in order
624 to figure out if Z-packets are supported or not. Oh, well. */
625 const unsigned char *
626 ia64_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
628 static unsigned char breakpoint
[] =
629 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
630 *lenptr
= sizeof (breakpoint
);
638 ia64_read_pc (struct regcache
*regcache
)
640 ULONGEST psr_value
, pc_value
;
643 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
644 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &pc_value
);
645 slot_num
= (psr_value
>> 41) & 3;
647 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
651 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
653 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
656 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
657 psr_value
&= ~(3LL << 41);
658 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
662 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
663 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
666 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
668 /* Returns the address of the slot that's NSLOTS slots away from
669 the address ADDR. NSLOTS may be positive or negative. */
671 rse_address_add(CORE_ADDR addr
, int nslots
)
674 int mandatory_nat_slots
= nslots
/ 63;
675 int direction
= nslots
< 0 ? -1 : 1;
677 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
679 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
680 new_addr
+= 8 * direction
;
682 if (IS_NaT_COLLECTION_ADDR(new_addr
))
683 new_addr
+= 8 * direction
;
689 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
690 int regnum
, gdb_byte
*buf
)
692 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
694 #ifdef HAVE_LIBUNWIND_IA64_H
695 /* First try and use the libunwind special reg accessor, otherwise fallback to
697 if (!libunwind_is_initialized ()
698 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
701 /* The fallback position is to assume that r32-r127 are found sequentially
702 in memory starting at $bof. This isn't always true, but without libunwind,
703 this is the best we can do. */
707 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
708 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
710 /* The bsp points at the end of the register frame so we
711 subtract the size of frame from it to get start of register frame. */
712 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
714 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
716 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
717 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8);
718 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), reg
);
721 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), 0);
724 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
728 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
729 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
730 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), unatN_val
);
732 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
734 ULONGEST natN_val
= 0;
737 CORE_ADDR gr_addr
= 0;
738 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
739 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
741 /* The bsp points at the end of the register frame so we
742 subtract the size of frame from it to get start of register frame. */
743 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
745 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
746 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
750 /* Compute address of nat collection bits. */
751 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
752 CORE_ADDR nat_collection
;
754 /* If our nat collection address is bigger than bsp, we have to get
755 the nat collection from rnat. Otherwise, we fetch the nat
756 collection from the computed address. */
758 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
760 nat_collection
= read_memory_integer (nat_addr
, 8);
761 nat_bit
= (gr_addr
>> 3) & 0x3f;
762 natN_val
= (nat_collection
>> nat_bit
) & 1;
765 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), natN_val
);
767 else if (regnum
== VBOF_REGNUM
)
769 /* A virtual register frame start is provided for user convenience.
770 It can be calculated as the bsp - sof (sizeof frame). */
774 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
775 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
777 /* The bsp points at the end of the register frame so we
778 subtract the size of frame from it to get beginning of frame. */
779 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
780 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), vbsp
);
782 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
788 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
789 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
791 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
793 /* Fetch predicate register rename base from current frame
794 marker for this frame. */
795 int rrb_pr
= (cfm
>> 32) & 0x3f;
797 /* Adjust the register number to account for register rotation. */
799 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
801 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
802 store_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
), prN_val
);
805 memset (buf
, 0, register_size (current_gdbarch
, regnum
));
809 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
810 int regnum
, const gdb_byte
*buf
)
812 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
817 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
818 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
820 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
822 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
824 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
825 write_memory (reg_addr
, (void *)buf
, 8);
828 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
830 ULONGEST unatN_val
, unat
, unatN_mask
;
831 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
832 unatN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
833 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
836 else if (unatN_val
== 1)
838 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
840 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
845 CORE_ADDR gr_addr
= 0;
846 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
847 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
849 /* The bsp points at the end of the register frame so we
850 subtract the size of frame from it to get start of register frame. */
851 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
853 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
854 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
856 natN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
858 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
860 /* Compute address of nat collection bits. */
861 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
862 CORE_ADDR nat_collection
;
863 int natN_bit
= (gr_addr
>> 3) & 0x3f;
864 ULONGEST natN_mask
= (1LL << natN_bit
);
865 /* If our nat collection address is bigger than bsp, we have to get
866 the nat collection from rnat. Otherwise, we fetch the nat
867 collection from the computed address. */
870 regcache_cooked_read_unsigned (regcache
, IA64_RNAT_REGNUM
, &nat_collection
);
872 nat_collection
|= natN_mask
;
874 nat_collection
&= ~natN_mask
;
875 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
, nat_collection
);
880 nat_collection
= read_memory_integer (nat_addr
, 8);
882 nat_collection
|= natN_mask
;
884 nat_collection
&= ~natN_mask
;
885 store_unsigned_integer (nat_buf
, register_size (current_gdbarch
, regnum
), nat_collection
);
886 write_memory (nat_addr
, nat_buf
, 8);
890 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
897 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
898 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
900 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
902 /* Fetch predicate register rename base from current frame
903 marker for this frame. */
904 int rrb_pr
= (cfm
>> 32) & 0x3f;
906 /* Adjust the register number to account for register rotation. */
908 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
910 prN_val
= extract_unsigned_integer (buf
, register_size (current_gdbarch
, regnum
));
911 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
914 else if (prN_val
== 1)
916 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
920 /* The ia64 needs to convert between various ieee floating-point formats
921 and the special ia64 floating point register format. */
924 ia64_convert_register_p (int regno
, struct type
*type
)
926 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
);
930 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
931 struct type
*valtype
, gdb_byte
*out
)
933 char in
[MAX_REGISTER_SIZE
];
934 frame_register_read (frame
, regnum
, in
);
935 convert_typed_floating (in
, builtin_type_ia64_ext
, out
, valtype
);
939 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
940 struct type
*valtype
, const gdb_byte
*in
)
942 char out
[MAX_REGISTER_SIZE
];
943 convert_typed_floating (in
, valtype
, out
, builtin_type_ia64_ext
);
944 put_frame_register (frame
, regnum
, out
);
948 /* Limit the number of skipped non-prologue instructions since examining
949 of the prologue is expensive. */
950 static int max_skip_non_prologue_insns
= 40;
952 /* Given PC representing the starting address of a function, and
953 LIM_PC which is the (sloppy) limit to which to scan when looking
954 for a prologue, attempt to further refine this limit by using
955 the line data in the symbol table. If successful, a better guess
956 on where the prologue ends is returned, otherwise the previous
957 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
958 which will be set to indicate whether the returned limit may be
959 used with no further scanning in the event that the function is
962 /* FIXME: cagney/2004-02-14: This function and logic have largely been
963 superseded by skip_prologue_using_sal. */
966 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
968 struct symtab_and_line prologue_sal
;
969 CORE_ADDR start_pc
= pc
;
971 /* Start off not trusting the limit. */
974 prologue_sal
= find_pc_line (pc
, 0);
975 if (prologue_sal
.line
!= 0)
978 CORE_ADDR addr
= prologue_sal
.end
;
980 /* Handle the case in which compiler's optimizer/scheduler
981 has moved instructions into the prologue. We scan ahead
982 in the function looking for address ranges whose corresponding
983 line number is less than or equal to the first one that we
984 found for the function. (It can be less than when the
985 scheduler puts a body instruction before the first prologue
987 for (i
= 2 * max_skip_non_prologue_insns
;
988 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
991 struct symtab_and_line sal
;
993 sal
= find_pc_line (addr
, 0);
996 if (sal
.line
<= prologue_sal
.line
997 && sal
.symtab
== prologue_sal
.symtab
)
1004 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1006 lim_pc
= prologue_sal
.end
;
1007 if (start_pc
== get_pc_function_start (lim_pc
))
1014 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1015 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1016 || (14 <= (_regnum_) && (_regnum_) <= 31))
1017 #define imm9(_instr_) \
1018 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1019 | (((_instr_) & 0x00008000000LL) >> 20) \
1020 | (((_instr_) & 0x00000001fc0LL) >> 6))
1022 /* Allocate and initialize a frame cache. */
1024 static struct ia64_frame_cache
*
1025 ia64_alloc_frame_cache (void)
1027 struct ia64_frame_cache
*cache
;
1030 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1036 cache
->prev_cfm
= 0;
1042 cache
->frameless
= 1;
1044 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1045 cache
->saved_regs
[i
] = 0;
1051 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct frame_info
*next_frame
, struct ia64_frame_cache
*cache
)
1054 CORE_ADDR last_prologue_pc
= pc
;
1055 instruction_type it
;
1060 int unat_save_reg
= 0;
1061 int pr_save_reg
= 0;
1062 int mem_stack_frame_size
= 0;
1064 CORE_ADDR spill_addr
= 0;
1067 char reg_contents
[256];
1073 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1075 memset (instores
, 0, sizeof instores
);
1076 memset (infpstores
, 0, sizeof infpstores
);
1077 memset (reg_contents
, 0, sizeof reg_contents
);
1079 if (cache
->after_prologue
!= 0
1080 && cache
->after_prologue
<= lim_pc
)
1081 return cache
->after_prologue
;
1083 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1084 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1086 /* We want to check if we have a recognizable function start before we
1087 look ahead for a prologue. */
1088 if (pc
< lim_pc
&& next_pc
1089 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1091 /* alloc - start of a regular function. */
1092 int sor
= (int) ((instr
& 0x00078000000LL
) >> 27);
1093 int sol
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1094 int sof
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1095 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1097 /* Verify that the current cfm matches what we think is the
1098 function start. If we have somehow jumped within a function,
1099 we do not want to interpret the prologue and calculate the
1100 addresses of various registers such as the return address.
1101 We will instead treat the frame as frameless. */
1103 (sof
== (cache
->cfm
& 0x7f) &&
1104 sol
== ((cache
->cfm
>> 7) & 0x7f)))
1108 last_prologue_pc
= next_pc
;
1113 /* Look for a leaf routine. */
1114 if (pc
< lim_pc
&& next_pc
1115 && (it
== I
|| it
== M
)
1116 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1118 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1119 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1120 | ((instr
& 0x001f8000000LL
) >> 20)
1121 | ((instr
& 0x000000fe000LL
) >> 13));
1122 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1123 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1124 int qp
= (int) (instr
& 0x0000000003fLL
);
1125 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1127 /* mov r2, r12 - beginning of leaf routine */
1129 last_prologue_pc
= next_pc
;
1133 /* If we don't recognize a regular function or leaf routine, we are
1139 last_prologue_pc
= lim_pc
;
1143 /* Loop, looking for prologue instructions, keeping track of
1144 where preserved registers were spilled. */
1147 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1151 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1153 /* Exit loop upon hitting a non-nop branch instruction. */
1158 else if (((instr
& 0x3fLL
) != 0LL) &&
1159 (frameless
|| ret_reg
!= 0))
1161 /* Exit loop upon hitting a predicated instruction if
1162 we already have the return register or if we are frameless. */
1167 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1170 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1171 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1172 int qp
= (int) (instr
& 0x0000000003f);
1174 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1177 last_prologue_pc
= next_pc
;
1180 else if ((it
== I
|| it
== M
)
1181 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1183 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1184 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1185 | ((instr
& 0x001f8000000LL
) >> 20)
1186 | ((instr
& 0x000000fe000LL
) >> 13));
1187 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1188 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1189 int qp
= (int) (instr
& 0x0000000003fLL
);
1191 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1195 last_prologue_pc
= next_pc
;
1197 else if (qp
== 0 && rN
== 12 && rM
== 12)
1199 /* adds r12, -mem_stack_frame_size, r12 */
1200 mem_stack_frame_size
-= imm
;
1201 last_prologue_pc
= next_pc
;
1203 else if (qp
== 0 && rN
== 2
1204 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1206 char buf
[MAX_REGISTER_SIZE
];
1207 CORE_ADDR saved_sp
= 0;
1208 /* adds r2, spilloffset, rFramePointer
1210 adds r2, spilloffset, r12
1212 Get ready for stf.spill or st8.spill instructions.
1213 The address to start spilling at is loaded into r2.
1214 FIXME: Why r2? That's what gcc currently uses; it
1215 could well be different for other compilers. */
1217 /* Hmm... whether or not this will work will depend on
1218 where the pc is. If it's still early in the prologue
1219 this'll be wrong. FIXME */
1222 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1223 saved_sp
= extract_unsigned_integer (buf
, 8);
1225 spill_addr
= saved_sp
1226 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1229 last_prologue_pc
= next_pc
;
1231 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
] &&
1232 rN
< 256 && imm
== 0)
1234 /* mov rN, rM where rM is an input register */
1235 reg_contents
[rN
] = rM
;
1236 last_prologue_pc
= next_pc
;
1238 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1242 last_prologue_pc
= next_pc
;
1247 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1248 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1250 /* stf.spill [rN] = fM, imm9
1252 stf.spill [rN] = fM */
1254 int imm
= imm9(instr
);
1255 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1256 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1257 int qp
= (int) (instr
& 0x0000000003fLL
);
1258 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1259 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1261 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1263 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1266 spill_addr
= 0; /* last one; must be done */
1267 last_prologue_pc
= next_pc
;
1270 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1271 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1277 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1278 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1279 int qp
= (int) (instr
& 0x0000000003fLL
);
1280 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1282 /* We have something like "mov.m r3 = ar.unat". Remember the
1283 r3 (or whatever) and watch for a store of this register... */
1285 last_prologue_pc
= next_pc
;
1288 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1291 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1292 int qp
= (int) (instr
& 0x0000000003fLL
);
1293 if (qp
== 0 && isScratch (rN
))
1296 last_prologue_pc
= next_pc
;
1300 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1301 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1305 st8 [rN] = rM, imm9 */
1306 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1307 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1308 int qp
= (int) (instr
& 0x0000000003fLL
);
1309 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1310 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1311 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1313 /* We've found a spill of either the UNAT register or the PR
1314 register. (Well, not exactly; what we've actually found is
1315 a spill of the register that UNAT or PR was moved to).
1316 Record that fact and move on... */
1317 if (rM
== unat_save_reg
)
1319 /* Track UNAT register */
1320 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1325 /* Track PR register */
1326 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1329 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1330 /* st8 [rN] = rM, imm9 */
1331 spill_addr
+= imm9(instr
);
1333 spill_addr
= 0; /* must be done spilling */
1334 last_prologue_pc
= next_pc
;
1336 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1338 /* Allow up to one store of each input register. */
1339 instores
[rM
-32] = 1;
1340 last_prologue_pc
= next_pc
;
1342 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1343 !instores
[indirect
-32])
1345 /* Allow an indirect store of an input register. */
1346 instores
[indirect
-32] = 1;
1347 last_prologue_pc
= next_pc
;
1350 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1357 Note that the st8 case is handled in the clause above.
1359 Advance over stores of input registers. One store per input
1360 register is permitted. */
1361 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1362 int qp
= (int) (instr
& 0x0000000003fLL
);
1363 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1364 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1366 instores
[rM
-32] = 1;
1367 last_prologue_pc
= next_pc
;
1369 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1370 !instores
[indirect
-32])
1372 /* Allow an indirect store of an input register. */
1373 instores
[indirect
-32] = 1;
1374 last_prologue_pc
= next_pc
;
1377 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1384 Advance over stores of floating point input registers. Again
1385 one store per register is permitted */
1386 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1387 int qp
= (int) (instr
& 0x0000000003fLL
);
1388 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1390 infpstores
[fM
-8] = 1;
1391 last_prologue_pc
= next_pc
;
1395 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1396 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1398 /* st8.spill [rN] = rM
1400 st8.spill [rN] = rM, imm9 */
1401 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1402 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1403 int qp
= (int) (instr
& 0x0000000003fLL
);
1404 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1406 /* We've found a spill of one of the preserved general purpose
1407 regs. Record the spill address and advance the spill
1408 register if appropriate. */
1409 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1410 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1411 /* st8.spill [rN] = rM, imm9 */
1412 spill_addr
+= imm9(instr
);
1414 spill_addr
= 0; /* Done spilling */
1415 last_prologue_pc
= next_pc
;
1422 /* If not frameless and we aren't called by skip_prologue, then we need to calculate
1423 registers for the previous frame which will be needed later. */
1425 if (!frameless
&& next_frame
)
1427 /* Extract the size of the rotating portion of the stack
1428 frame and the register rename base from the current
1434 rrb_gr
= (cfm
>> 18) & 0x7f;
1436 /* Find the bof (beginning of frame). */
1437 bof
= rse_address_add (cache
->bsp
, -sof
);
1439 for (i
= 0, addr
= bof
;
1443 if (IS_NaT_COLLECTION_ADDR (addr
))
1447 if (i
+32 == cfm_reg
)
1448 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1449 if (i
+32 == ret_reg
)
1450 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1452 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1455 /* For the previous argument registers we require the previous bof.
1456 If we can't find the previous cfm, then we can do nothing. */
1458 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1460 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
], 8);
1462 else if (cfm_reg
!= 0)
1464 frame_unwind_register (next_frame
, cfm_reg
, buf
);
1465 cfm
= extract_unsigned_integer (buf
, 8);
1467 cache
->prev_cfm
= cfm
;
1471 sor
= ((cfm
>> 14) & 0xf) * 8;
1473 sol
= (cfm
>> 7) & 0x7f;
1474 rrb_gr
= (cfm
>> 18) & 0x7f;
1476 /* The previous bof only requires subtraction of the sol (size of locals)
1477 due to the overlap between output and input of subsequent frames. */
1478 bof
= rse_address_add (bof
, -sol
);
1480 for (i
= 0, addr
= bof
;
1484 if (IS_NaT_COLLECTION_ADDR (addr
))
1489 cache
->saved_regs
[IA64_GR32_REGNUM
+ ((i
+ (sor
- rrb_gr
)) % sor
)]
1492 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1498 /* Try and trust the lim_pc value whenever possible. */
1499 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1500 last_prologue_pc
= lim_pc
;
1502 cache
->frameless
= frameless
;
1503 cache
->after_prologue
= last_prologue_pc
;
1504 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1505 cache
->fp_reg
= fp_reg
;
1507 return last_prologue_pc
;
1511 ia64_skip_prologue (CORE_ADDR pc
)
1513 struct ia64_frame_cache cache
;
1515 cache
.after_prologue
= 0;
1519 /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */
1520 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1524 /* Normal frames. */
1526 static struct ia64_frame_cache
*
1527 ia64_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1529 struct ia64_frame_cache
*cache
;
1531 CORE_ADDR cfm
, sof
, sol
, bsp
, psr
;
1537 cache
= ia64_alloc_frame_cache ();
1538 *this_cache
= cache
;
1540 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1541 cache
->saved_sp
= extract_unsigned_integer (buf
, 8);
1543 /* We always want the bsp to point to the end of frame.
1544 This way, we can always get the beginning of frame (bof)
1545 by subtracting frame size. */
1546 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1547 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1549 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1550 psr
= extract_unsigned_integer (buf
, 8);
1552 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1553 cfm
= extract_unsigned_integer (buf
, 8);
1555 cache
->sof
= (cfm
& 0x7f);
1556 cache
->sol
= (cfm
>> 7) & 0x7f;
1557 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1561 cache
->pc
= frame_func_unwind (next_frame
, NORMAL_FRAME
);
1564 examine_prologue (cache
->pc
, frame_pc_unwind (next_frame
), next_frame
, cache
);
1566 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1572 ia64_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1573 struct frame_id
*this_id
)
1575 struct ia64_frame_cache
*cache
=
1576 ia64_frame_cache (next_frame
, this_cache
);
1578 /* If outermost frame, mark with null frame id. */
1579 if (cache
->base
== 0)
1580 (*this_id
) = null_frame_id
;
1582 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1583 if (gdbarch_debug
>= 1)
1584 fprintf_unfiltered (gdb_stdlog
,
1585 "regular frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1586 paddr_nz (this_id
->code_addr
),
1587 paddr_nz (this_id
->stack_addr
),
1588 paddr_nz (cache
->bsp
), next_frame
);
1592 ia64_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
1593 int regnum
, int *optimizedp
,
1594 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1595 int *realnump
, gdb_byte
*valuep
)
1597 struct ia64_frame_cache
*cache
=
1598 ia64_frame_cache (next_frame
, this_cache
);
1599 char dummy_valp
[MAX_REGISTER_SIZE
];
1602 gdb_assert (regnum
>= 0);
1604 if (!target_has_registers
)
1605 error (_("No registers."));
1612 /* Rather than check each time if valuep is non-null, supply a dummy buffer
1613 when valuep is not supplied. */
1615 valuep
= dummy_valp
;
1617 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
1619 if (regnum
== gdbarch_sp_regnum (current_gdbarch
))
1621 /* Handle SP values for all frames but the topmost. */
1622 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1625 else if (regnum
== IA64_BSP_REGNUM
)
1627 char cfm_valuep
[MAX_REGISTER_SIZE
];
1630 enum lval_type cfm_lval
;
1632 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
1634 /* We want to calculate the previous bsp as the end of the previous register stack frame.
1635 This corresponds to what the hardware bsp register will be if we pop the frame
1636 back which is why we might have been called. We know the beginning of the current
1637 frame is cache->bsp - cache->sof. This value in the previous frame points to
1638 the start of the output registers. We can calculate the end of that frame by adding
1639 the size of output (sof (size of frame) - sol (size of locals)). */
1640 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1641 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
1642 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
1644 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1645 prev_bsp
= rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1647 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1650 else if (regnum
== IA64_CFM_REGNUM
)
1652 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1656 *lvalp
= lval_memory
;
1658 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1660 else if (cache
->prev_cfm
)
1661 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), cache
->prev_cfm
);
1662 else if (cache
->frameless
)
1665 frame_unwind_register (next_frame
, IA64_PFS_REGNUM
, valuep
);
1668 else if (regnum
== IA64_VFP_REGNUM
)
1670 /* If the function in question uses an automatic register (r32-r127)
1671 for the frame pointer, it'll be found by ia64_find_saved_register()
1672 above. If the function lacks one of these frame pointers, we can
1673 still provide a value since we know the size of the frame. */
1674 CORE_ADDR vfp
= cache
->base
;
1675 store_unsigned_integer (valuep
, register_size (current_gdbarch
, IA64_VFP_REGNUM
), vfp
);
1677 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1679 char pr_valuep
[MAX_REGISTER_SIZE
];
1682 enum lval_type pr_lval
;
1685 ia64_frame_prev_register (next_frame
, this_cache
, IA64_PR_REGNUM
,
1686 &pr_optim
, &pr_lval
, &pr_addr
, &pr_realnum
, pr_valuep
);
1687 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1689 /* Fetch predicate register rename base from current frame
1690 marker for this frame. */
1691 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1693 /* Adjust the register number to account for register rotation. */
1694 regnum
= VP16_REGNUM
1695 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1697 prN_val
= extract_bit_field ((unsigned char *) pr_valuep
,
1698 regnum
- VP0_REGNUM
, 1);
1699 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
1701 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1703 char unat_valuep
[MAX_REGISTER_SIZE
];
1706 enum lval_type unat_lval
;
1707 CORE_ADDR unat_addr
;
1709 ia64_frame_prev_register (next_frame
, this_cache
, IA64_UNAT_REGNUM
,
1710 &unat_optim
, &unat_lval
, &unat_addr
, &unat_realnum
, unat_valuep
);
1711 unatN_val
= extract_bit_field ((unsigned char *) unat_valuep
,
1712 regnum
- IA64_NAT0_REGNUM
, 1);
1713 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
1716 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1719 /* Find address of general register corresponding to nat bit we're
1723 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
1727 /* Compute address of nat collection bits. */
1728 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1730 CORE_ADDR nat_collection
;
1732 /* If our nat collection address is bigger than bsp, we have to get
1733 the nat collection from rnat. Otherwise, we fetch the nat
1734 collection from the computed address. */
1735 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1736 bsp
= extract_unsigned_integer (buf
, 8);
1737 if (nat_addr
>= bsp
)
1739 frame_unwind_register (next_frame
, IA64_RNAT_REGNUM
, buf
);
1740 nat_collection
= extract_unsigned_integer (buf
, 8);
1743 nat_collection
= read_memory_integer (nat_addr
, 8);
1744 nat_bit
= (gr_addr
>> 3) & 0x3f;
1745 natval
= (nat_collection
>> nat_bit
) & 1;
1748 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), natval
);
1750 else if (regnum
== IA64_IP_REGNUM
)
1753 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1757 *lvalp
= lval_memory
;
1759 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1760 pc
= extract_unsigned_integer (buf
, 8);
1762 else if (cache
->frameless
)
1764 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1765 pc
= extract_unsigned_integer (buf
, 8);
1768 store_unsigned_integer (valuep
, 8, pc
);
1770 else if (regnum
== IA64_PSR_REGNUM
)
1772 /* We don't know how to get the complete previous PSR, but we need it for
1773 the slot information when we unwind the pc (pc is formed of IP register
1774 plus slot information from PSR). To get the previous slot information,
1775 we mask it off the return address. */
1776 ULONGEST slot_num
= 0;
1779 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
1781 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
1782 psr
= extract_unsigned_integer (buf
, 8);
1786 *lvalp
= lval_memory
;
1788 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
1789 pc
= extract_unsigned_integer (buf
, 8);
1791 else if (cache
->frameless
)
1794 frame_unwind_register (next_frame
, IA64_BR0_REGNUM
, buf
);
1795 pc
= extract_unsigned_integer (buf
, 8);
1797 psr
&= ~(3LL << 41);
1798 slot_num
= pc
& 0x3LL
;
1799 psr
|= (CORE_ADDR
)slot_num
<< 41;
1800 store_unsigned_integer (valuep
, 8, psr
);
1802 else if (regnum
== IA64_BR0_REGNUM
)
1805 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
1808 *lvalp
= lval_memory
;
1810 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_BR0_REGNUM
));
1811 br0
= extract_unsigned_integer (buf
, 8);
1813 store_unsigned_integer (valuep
, 8, br0
);
1815 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
1816 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
1819 if (regnum
>= V32_REGNUM
)
1820 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1821 addr
= cache
->saved_regs
[regnum
];
1824 *lvalp
= lval_memory
;
1826 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1828 else if (cache
->frameless
)
1830 char r_valuep
[MAX_REGISTER_SIZE
];
1833 enum lval_type r_lval
;
1835 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
1837 if (regnum
>= V32_REGNUM
)
1838 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
1839 ia64_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
1840 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1841 prev_cfm
= extract_unsigned_integer (r_valuep
, 8);
1842 ia64_frame_prev_register (next_frame
, this_cache
, IA64_BSP_REGNUM
,
1843 &r_optim
, &r_lval
, &r_addr
, &r_realnum
, r_valuep
);
1844 prev_bsp
= extract_unsigned_integer (r_valuep
, 8);
1845 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
1847 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
1848 *lvalp
= lval_memory
;
1850 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1856 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
1858 /* Fetch floating point register rename base from current
1859 frame marker for this frame. */
1860 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
1862 /* Adjust the floating point register number to account for
1863 register rotation. */
1864 regnum
= IA64_FR32_REGNUM
1865 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
1868 /* If we have stored a memory address, access the register. */
1869 addr
= cache
->saved_regs
[regnum
];
1872 *lvalp
= lval_memory
;
1874 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
1876 /* Otherwise, punt and get the current value of the register. */
1878 frame_unwind_register (next_frame
, regnum
, valuep
);
1881 if (gdbarch_debug
>= 1)
1882 fprintf_unfiltered (gdb_stdlog
,
1883 "regular prev register <%d> <%s> is 0x%s\n", regnum
,
1884 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
1885 ? ia64_register_names
[regnum
] : "r??"),
1886 paddr_nz (extract_unsigned_integer (valuep
, 8)));
1889 static const struct frame_unwind ia64_frame_unwind
=
1892 &ia64_frame_this_id
,
1893 &ia64_frame_prev_register
1896 static const struct frame_unwind
*
1897 ia64_frame_sniffer (struct frame_info
*next_frame
)
1899 return &ia64_frame_unwind
;
1902 /* Signal trampolines. */
1905 ia64_sigtramp_frame_init_saved_regs (struct ia64_frame_cache
*cache
)
1907 if (SIGCONTEXT_REGISTER_ADDRESS
)
1911 cache
->saved_regs
[IA64_VRAP_REGNUM
] =
1912 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_IP_REGNUM
);
1913 cache
->saved_regs
[IA64_CFM_REGNUM
] =
1914 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CFM_REGNUM
);
1915 cache
->saved_regs
[IA64_PSR_REGNUM
] =
1916 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PSR_REGNUM
);
1917 cache
->saved_regs
[IA64_BSP_REGNUM
] =
1918 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_BSP_REGNUM
);
1919 cache
->saved_regs
[IA64_RNAT_REGNUM
] =
1920 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_RNAT_REGNUM
);
1921 cache
->saved_regs
[IA64_CCV_REGNUM
] =
1922 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_CCV_REGNUM
);
1923 cache
->saved_regs
[IA64_UNAT_REGNUM
] =
1924 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_UNAT_REGNUM
);
1925 cache
->saved_regs
[IA64_FPSR_REGNUM
] =
1926 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_FPSR_REGNUM
);
1927 cache
->saved_regs
[IA64_PFS_REGNUM
] =
1928 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_PFS_REGNUM
);
1929 cache
->saved_regs
[IA64_LC_REGNUM
] =
1930 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, IA64_LC_REGNUM
);
1931 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
1932 cache
->saved_regs
[regno
] =
1933 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1934 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
1935 cache
->saved_regs
[regno
] =
1936 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1937 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
1938 cache
->saved_regs
[regno
] =
1939 SIGCONTEXT_REGISTER_ADDRESS (cache
->base
, regno
);
1943 static struct ia64_frame_cache
*
1944 ia64_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
1946 struct ia64_frame_cache
*cache
;
1954 cache
= ia64_alloc_frame_cache ();
1956 frame_unwind_register (next_frame
, sp_regnum
, buf
);
1957 /* Note that frame size is hard-coded below. We cannot calculate it
1958 via prologue examination. */
1959 cache
->base
= extract_unsigned_integer (buf
, 8) + 16;
1961 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
1962 cache
->bsp
= extract_unsigned_integer (buf
, 8);
1964 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
1965 cache
->cfm
= extract_unsigned_integer (buf
, 8);
1966 cache
->sof
= cache
->cfm
& 0x7f;
1968 ia64_sigtramp_frame_init_saved_regs (cache
);
1970 *this_cache
= cache
;
1975 ia64_sigtramp_frame_this_id (struct frame_info
*next_frame
,
1976 void **this_cache
, struct frame_id
*this_id
)
1978 struct ia64_frame_cache
*cache
=
1979 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
1981 (*this_id
) = frame_id_build_special (cache
->base
, frame_pc_unwind (next_frame
), cache
->bsp
);
1982 if (gdbarch_debug
>= 1)
1983 fprintf_unfiltered (gdb_stdlog
,
1984 "sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
1985 paddr_nz (this_id
->code_addr
),
1986 paddr_nz (this_id
->stack_addr
),
1987 paddr_nz (cache
->bsp
), next_frame
);
1991 ia64_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1993 int regnum
, int *optimizedp
,
1994 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1995 int *realnump
, gdb_byte
*valuep
)
1997 char dummy_valp
[MAX_REGISTER_SIZE
];
1998 char buf
[MAX_REGISTER_SIZE
];
2000 struct ia64_frame_cache
*cache
=
2001 ia64_sigtramp_frame_cache (next_frame
, this_cache
);
2003 gdb_assert (regnum
>= 0);
2005 if (!target_has_registers
)
2006 error (_("No registers."));
2013 /* Rather than check each time if valuep is non-null, supply a dummy buffer
2014 when valuep is not supplied. */
2016 valuep
= dummy_valp
;
2018 memset (valuep
, 0, register_size (current_gdbarch
, regnum
));
2020 if (regnum
== IA64_IP_REGNUM
)
2023 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2027 *lvalp
= lval_memory
;
2029 read_memory (addr
, buf
, register_size (current_gdbarch
, IA64_IP_REGNUM
));
2030 pc
= extract_unsigned_integer (buf
, 8);
2033 store_unsigned_integer (valuep
, 8, pc
);
2035 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
) ||
2036 (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2039 if (regnum
>= V32_REGNUM
)
2040 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2041 addr
= cache
->saved_regs
[regnum
];
2044 *lvalp
= lval_memory
;
2046 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2051 /* All other registers not listed above. */
2052 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2055 *lvalp
= lval_memory
;
2057 read_memory (addr
, valuep
, register_size (current_gdbarch
, regnum
));
2061 if (gdbarch_debug
>= 1)
2062 fprintf_unfiltered (gdb_stdlog
,
2063 "sigtramp prev register <%s> is 0x%s\n",
2064 (regnum
< IA64_GR32_REGNUM
2065 || (regnum
> IA64_GR127_REGNUM
2066 && regnum
< LAST_PSEUDO_REGNUM
))
2067 ? ia64_register_names
[regnum
]
2068 : (regnum
< LAST_PSEUDO_REGNUM
2069 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2071 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2074 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2077 ia64_sigtramp_frame_this_id
,
2078 ia64_sigtramp_frame_prev_register
2081 static const struct frame_unwind
*
2082 ia64_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2084 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
2085 if (tdep
->pc_in_sigtramp
)
2087 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
2089 if (tdep
->pc_in_sigtramp (pc
))
2090 return &ia64_sigtramp_frame_unwind
;
2098 ia64_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
2100 struct ia64_frame_cache
*cache
=
2101 ia64_frame_cache (next_frame
, this_cache
);
2106 static const struct frame_base ia64_frame_base
=
2109 ia64_frame_base_address
,
2110 ia64_frame_base_address
,
2111 ia64_frame_base_address
2114 #ifdef HAVE_LIBUNWIND_IA64_H
2116 struct ia64_unwind_table_entry
2118 unw_word_t start_offset
;
2119 unw_word_t end_offset
;
2120 unw_word_t info_offset
;
2123 static __inline__
uint64_t
2124 ia64_rse_slot_num (uint64_t addr
)
2126 return (addr
>> 3) & 0x3f;
2129 /* Skip over a designated number of registers in the backing
2130 store, remembering every 64th position is for NAT. */
2131 static __inline__
uint64_t
2132 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2134 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2138 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2141 /* Gdb libunwind-frame callback function to convert from an ia64 gdb register
2142 number to a libunwind register number. */
2144 ia64_gdb2uw_regnum (int regnum
)
2146 if (regnum
== sp_regnum
)
2148 else if (regnum
== IA64_BSP_REGNUM
)
2149 return UNW_IA64_BSP
;
2150 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2151 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2152 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2153 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2154 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2155 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2156 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2158 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2159 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2160 else if (regnum
== IA64_PR_REGNUM
)
2162 else if (regnum
== IA64_IP_REGNUM
)
2164 else if (regnum
== IA64_CFM_REGNUM
)
2165 return UNW_IA64_CFM
;
2166 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2167 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2168 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2169 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2174 /* Gdb libunwind-frame callback function to convert from a libunwind register
2175 number to a ia64 gdb register number. */
2177 ia64_uw2gdb_regnum (int uw_regnum
)
2179 if (uw_regnum
== UNW_IA64_SP
)
2181 else if (uw_regnum
== UNW_IA64_BSP
)
2182 return IA64_BSP_REGNUM
;
2183 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2184 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2185 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2186 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2187 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2188 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2189 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2190 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2191 else if (uw_regnum
== UNW_IA64_PR
)
2192 return IA64_PR_REGNUM
;
2193 else if (uw_regnum
== UNW_REG_IP
)
2194 return IA64_IP_REGNUM
;
2195 else if (uw_regnum
== UNW_IA64_CFM
)
2196 return IA64_CFM_REGNUM
;
2197 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2198 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2199 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2200 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2205 /* Gdb libunwind-frame callback function to reveal if register is a float
2208 ia64_is_fpreg (int uw_regnum
)
2210 return unw_is_fpreg (uw_regnum
);
2213 /* Libunwind callback accessor function for general registers. */
2215 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2216 int write
, void *arg
)
2218 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2219 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2220 struct frame_info
*next_frame
= arg
;
2221 long new_sof
, old_sof
;
2222 char buf
[MAX_REGISTER_SIZE
];
2224 /* We never call any libunwind routines that need to write registers. */
2225 gdb_assert (!write
);
2230 /* Libunwind expects to see the pc value which means the slot number
2231 from the psr must be merged with the ip word address. */
2232 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
2233 ip
= extract_unsigned_integer (buf
, 8);
2234 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
2235 psr
= extract_unsigned_integer (buf
, 8);
2236 *val
= ip
| ((psr
>> 41) & 0x3);
2239 case UNW_IA64_AR_BSP
:
2240 /* Libunwind expects to see the beginning of the current register
2241 frame so we must account for the fact that ptrace() will return a value
2242 for bsp that points *after* the current register frame. */
2243 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2244 bsp
= extract_unsigned_integer (buf
, 8);
2245 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2246 cfm
= extract_unsigned_integer (buf
, 8);
2248 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2251 case UNW_IA64_AR_BSPSTORE
:
2252 /* Libunwind wants bspstore to be after the current register frame.
2253 This is what ptrace() and gdb treats as the regular bsp value. */
2254 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2255 *val
= extract_unsigned_integer (buf
, 8);
2259 /* For all other registers, just unwind the value directly. */
2260 frame_unwind_register (next_frame
, regnum
, buf
);
2261 *val
= extract_unsigned_integer (buf
, 8);
2265 if (gdbarch_debug
>= 1)
2266 fprintf_unfiltered (gdb_stdlog
,
2267 " access_reg: from cache: %4s=0x%s\n",
2268 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2269 ? ia64_register_names
[regnum
] : "r??"),
2274 /* Libunwind callback accessor function for floating-point registers. */
2276 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_fpreg_t
*val
,
2277 int write
, void *arg
)
2279 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2280 struct frame_info
*next_frame
= arg
;
2282 /* We never call any libunwind routines that need to write registers. */
2283 gdb_assert (!write
);
2285 frame_unwind_register (next_frame
, regnum
, (char *) val
);
2290 /* Libunwind callback accessor function for top-level rse registers. */
2292 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2293 int write
, void *arg
)
2295 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2296 unw_word_t bsp
, sof
, sol
, cfm
, psr
, ip
;
2297 struct regcache
*regcache
= arg
;
2298 long new_sof
, old_sof
;
2299 char buf
[MAX_REGISTER_SIZE
];
2301 /* We never call any libunwind routines that need to write registers. */
2302 gdb_assert (!write
);
2307 /* Libunwind expects to see the pc value which means the slot number
2308 from the psr must be merged with the ip word address. */
2309 regcache_cooked_read (regcache
, IA64_IP_REGNUM
, buf
);
2310 ip
= extract_unsigned_integer (buf
, 8);
2311 regcache_cooked_read (regcache
, IA64_PSR_REGNUM
, buf
);
2312 psr
= extract_unsigned_integer (buf
, 8);
2313 *val
= ip
| ((psr
>> 41) & 0x3);
2316 case UNW_IA64_AR_BSP
:
2317 /* Libunwind expects to see the beginning of the current register
2318 frame so we must account for the fact that ptrace() will return a value
2319 for bsp that points *after* the current register frame. */
2320 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2321 bsp
= extract_unsigned_integer (buf
, 8);
2322 regcache_cooked_read (regcache
, IA64_CFM_REGNUM
, buf
);
2323 cfm
= extract_unsigned_integer (buf
, 8);
2325 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2328 case UNW_IA64_AR_BSPSTORE
:
2329 /* Libunwind wants bspstore to be after the current register frame.
2330 This is what ptrace() and gdb treats as the regular bsp value. */
2331 regcache_cooked_read (regcache
, IA64_BSP_REGNUM
, buf
);
2332 *val
= extract_unsigned_integer (buf
, 8);
2336 /* For all other registers, just unwind the value directly. */
2337 regcache_cooked_read (regcache
, regnum
, buf
);
2338 *val
= extract_unsigned_integer (buf
, 8);
2342 if (gdbarch_debug
>= 1)
2343 fprintf_unfiltered (gdb_stdlog
,
2344 " access_rse_reg: from cache: %4s=0x%s\n",
2345 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2346 ? ia64_register_names
[regnum
] : "r??"),
2352 /* Libunwind callback accessor function for top-level fp registers. */
2354 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2355 unw_fpreg_t
*val
, int write
, void *arg
)
2357 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2358 struct regcache
*regcache
= arg
;
2360 /* We never call any libunwind routines that need to write registers. */
2361 gdb_assert (!write
);
2363 regcache_cooked_read (regcache
, regnum
, (char *) val
);
2368 /* Libunwind callback accessor function for accessing memory. */
2370 ia64_access_mem (unw_addr_space_t as
,
2371 unw_word_t addr
, unw_word_t
*val
,
2372 int write
, void *arg
)
2374 if (addr
- KERNEL_START
< ktab_size
)
2376 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2377 + (addr
- KERNEL_START
));
2386 /* XXX do we need to normalize byte-order here? */
2388 return target_write_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2390 return target_read_memory (addr
, (char *) val
, sizeof (unw_word_t
));
2393 /* Call low-level function to access the kernel unwind table. */
2395 getunwind_table (gdb_byte
**buf_p
)
2399 /* FIXME drow/2005-09-10: This code used to call
2400 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2401 for the currently running ia64-linux kernel. That data should
2402 come from the core file and be accessed via the auxv vector; if
2403 we want to preserve fall back to the running kernel's table, then
2404 we should find a way to override the corefile layer's
2405 xfer_partial method. */
2407 x
= target_read_alloc (¤t_target
, TARGET_OBJECT_UNWIND_TABLE
,
2413 /* Get the kernel unwind table. */
2415 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2417 static struct ia64_table_entry
*etab
;
2424 size
= getunwind_table (&ktab_buf
);
2426 return -UNW_ENOINFO
;
2428 ktab
= (struct ia64_table_entry
*) ktab_buf
;
2431 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2432 etab
->info_offset
+= KERNEL_START
;
2435 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2436 return -UNW_ENOINFO
;
2438 di
->format
= UNW_INFO_FORMAT_TABLE
;
2440 di
->start_ip
= ktab
[0].start_offset
;
2441 di
->end_ip
= etab
[-1].end_offset
;
2442 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2443 di
->u
.ti
.segbase
= 0;
2444 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2445 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2447 if (gdbarch_debug
>= 1)
2448 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2449 "segbase=0x%s, length=%s, gp=0x%s\n",
2450 (char *) di
->u
.ti
.name_ptr
,
2451 paddr_nz (di
->u
.ti
.segbase
),
2452 paddr_u (di
->u
.ti
.table_len
),
2457 /* Find the unwind table entry for a specified address. */
2459 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2460 unw_dyn_info_t
*dip
, void **buf
)
2462 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2463 Elf_Internal_Ehdr
*ehdr
;
2464 unw_word_t segbase
= 0;
2465 CORE_ADDR load_base
;
2469 bfd
= objfile
->obfd
;
2471 ehdr
= elf_tdata (bfd
)->elf_header
;
2472 phdr
= elf_tdata (bfd
)->phdr
;
2474 load_base
= ANOFFSET (objfile
->section_offsets
, SECT_OFF_TEXT (objfile
));
2476 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2478 switch (phdr
[i
].p_type
)
2481 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2486 case PT_IA_64_UNWIND
:
2487 p_unwind
= phdr
+ i
;
2495 if (!p_text
|| !p_unwind
)
2496 return -UNW_ENOINFO
;
2498 /* Verify that the segment that contains the IP also contains
2499 the static unwind table. If not, we may be in the Linux kernel's
2500 DSO gate page in which case the unwind table is another segment.
2501 Otherwise, we are dealing with runtime-generated code, for which we
2502 have no info here. */
2503 segbase
= p_text
->p_vaddr
+ load_base
;
2505 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2508 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2510 if (phdr
[i
].p_type
== PT_LOAD
2511 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2514 /* Get the segbase from the section containing the
2516 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2520 return -UNW_ENOINFO
;
2523 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2524 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2525 dip
->gp
= ia64_find_global_pointer (ip
);
2526 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2527 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2528 dip
->u
.rti
.segbase
= segbase
;
2529 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2530 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2535 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2537 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2538 int need_unwind_info
, void *arg
)
2540 struct obj_section
*sec
= find_pc_section (ip
);
2547 /* XXX This only works if the host and the target architecture are
2548 both ia64 and if the have (more or less) the same kernel
2550 if (get_kernel_table (ip
, &di
) < 0)
2551 return -UNW_ENOINFO
;
2553 if (gdbarch_debug
>= 1)
2554 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2555 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2556 "length=%s,data=0x%s)\n",
2557 paddr_nz (ip
), (char *)di
.u
.ti
.name_ptr
,
2558 paddr_nz (di
.u
.ti
.segbase
),
2559 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2561 paddr_u (di
.u
.ti
.table_len
),
2562 paddr_nz ((CORE_ADDR
)di
.u
.ti
.table_data
));
2566 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2570 if (gdbarch_debug
>= 1)
2571 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: 0x%s -> "
2572 "(name=`%s',segbase=0x%s,start=0x%s,end=0x%s,gp=0x%s,"
2573 "length=%s,data=0x%s)\n",
2574 paddr_nz (ip
), (char *)di
.u
.rti
.name_ptr
,
2575 paddr_nz (di
.u
.rti
.segbase
),
2576 paddr_nz (di
.start_ip
), paddr_nz (di
.end_ip
),
2578 paddr_u (di
.u
.rti
.table_len
),
2579 paddr_nz (di
.u
.rti
.table_data
));
2582 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2585 /* We no longer need the dyn info storage so free it. */
2591 /* Libunwind callback accessor function for cleanup. */
2593 ia64_put_unwind_info (unw_addr_space_t as
,
2594 unw_proc_info_t
*pip
, void *arg
)
2596 /* Nothing required for now. */
2599 /* Libunwind callback accessor function to get head of the dynamic
2600 unwind-info registration list. */
2602 ia64_get_dyn_info_list (unw_addr_space_t as
,
2603 unw_word_t
*dilap
, void *arg
)
2605 struct obj_section
*text_sec
;
2606 struct objfile
*objfile
;
2607 unw_word_t ip
, addr
;
2611 if (!libunwind_is_initialized ())
2612 return -UNW_ENOINFO
;
2614 for (objfile
= object_files
; objfile
; objfile
= objfile
->next
)
2618 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2619 ip
= text_sec
->addr
;
2620 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2623 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2624 /* We no longer need the dyn info storage so free it. */
2629 if (gdbarch_debug
>= 1)
2630 fprintf_unfiltered (gdb_stdlog
,
2631 "dynamic unwind table in objfile %s "
2632 "at 0x%s (gp=0x%s)\n",
2633 bfd_get_filename (objfile
->obfd
),
2634 paddr_nz (addr
), paddr_nz (di
.gp
));
2640 return -UNW_ENOINFO
;
2644 /* Frame interface functions for libunwind. */
2647 ia64_libunwind_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2648 struct frame_id
*this_id
)
2653 CORE_ADDR prev_ip
, addr
;
2654 int realnum
, optimized
;
2655 enum lval_type lval
;
2658 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2659 if (frame_id_eq (id
, null_frame_id
))
2661 (*this_id
) = null_frame_id
;
2665 /* We must add the bsp as the special address for frame comparison
2667 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2668 bsp
= extract_unsigned_integer (buf
, 8);
2670 /* If the previous frame pc value is 0, then we are at the end of the stack
2671 and don't want to unwind past this frame. We return a null frame_id to
2673 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2674 &optimized
, &lval
, &addr
, &realnum
, buf
);
2675 prev_ip
= extract_unsigned_integer (buf
, 8);
2678 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2680 (*this_id
) = null_frame_id
;
2682 if (gdbarch_debug
>= 1)
2683 fprintf_unfiltered (gdb_stdlog
,
2684 "libunwind frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2685 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2686 paddr_nz (bsp
), next_frame
);
2690 ia64_libunwind_frame_prev_register (struct frame_info
*next_frame
,
2692 int regnum
, int *optimizedp
,
2693 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2694 int *realnump
, gdb_byte
*valuep
)
2698 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2699 reg
= IA64_PR_REGNUM
;
2700 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2701 reg
= IA64_UNAT_REGNUM
;
2703 /* Let libunwind do most of the work. */
2704 libunwind_frame_prev_register (next_frame
, this_cache
, reg
,
2705 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
2707 /* No more to do if the value is not supposed to be supplied. */
2711 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2715 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2719 unsigned char buf
[MAX_REGISTER_SIZE
];
2721 /* Fetch predicate register rename base from current frame
2722 marker for this frame. */
2723 frame_unwind_register (next_frame
, IA64_CFM_REGNUM
, buf
);
2724 cfm
= extract_unsigned_integer (buf
, 8);
2725 rrb_pr
= (cfm
>> 32) & 0x3f;
2727 /* Adjust the register number to account for register rotation. */
2728 regnum
= VP16_REGNUM
2729 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2731 prN_val
= extract_bit_field ((unsigned char *) valuep
,
2732 regnum
- VP0_REGNUM
, 1);
2733 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
), prN_val
);
2735 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2739 unatN_val
= extract_bit_field ((unsigned char *) valuep
,
2740 regnum
- IA64_NAT0_REGNUM
, 1);
2741 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2744 else if (regnum
== IA64_BSP_REGNUM
)
2746 char cfm_valuep
[MAX_REGISTER_SIZE
];
2749 enum lval_type cfm_lval
;
2751 CORE_ADDR bsp
, prev_cfm
, prev_bsp
;
2753 /* We want to calculate the previous bsp as the end of the previous register stack frame.
2754 This corresponds to what the hardware bsp register will be if we pop the frame
2755 back which is why we might have been called. We know that libunwind will pass us back
2756 the beginning of the current frame so we should just add sof to it. */
2757 prev_bsp
= extract_unsigned_integer (valuep
, 8);
2758 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_CFM_REGNUM
,
2759 &cfm_optim
, &cfm_lval
, &cfm_addr
, &cfm_realnum
, cfm_valuep
);
2760 prev_cfm
= extract_unsigned_integer (cfm_valuep
, 8);
2761 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2763 store_unsigned_integer (valuep
, register_size (current_gdbarch
, regnum
),
2767 if (gdbarch_debug
>= 1)
2768 fprintf_unfiltered (gdb_stdlog
,
2769 "libunwind prev register <%s> is 0x%s\n",
2770 (regnum
< IA64_GR32_REGNUM
2771 || (regnum
> IA64_GR127_REGNUM
2772 && regnum
< LAST_PSEUDO_REGNUM
))
2773 ? ia64_register_names
[regnum
]
2774 : (regnum
< LAST_PSEUDO_REGNUM
2775 ? ia64_register_names
[regnum
-IA64_GR32_REGNUM
+V32_REGNUM
]
2777 paddr_nz (extract_unsigned_integer (valuep
, 8)));
2780 static const struct frame_unwind ia64_libunwind_frame_unwind
=
2783 ia64_libunwind_frame_this_id
,
2784 ia64_libunwind_frame_prev_register
,
2788 libunwind_frame_dealloc_cache
2791 static const struct frame_unwind
*
2792 ia64_libunwind_frame_sniffer (struct frame_info
*next_frame
)
2794 if (libunwind_is_initialized () && libunwind_frame_sniffer (next_frame
))
2795 return &ia64_libunwind_frame_unwind
;
2801 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
2802 struct frame_id
*this_id
)
2809 libunwind_frame_this_id (next_frame
, this_cache
, &id
);
2810 if (frame_id_eq (id
, null_frame_id
))
2812 (*this_id
) = null_frame_id
;
2816 /* We must add the bsp as the special address for frame comparison
2818 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
2819 bsp
= extract_unsigned_integer (buf
, 8);
2821 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
2822 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2824 if (gdbarch_debug
>= 1)
2825 fprintf_unfiltered (gdb_stdlog
,
2826 "libunwind sigtramp frame id: code 0x%s, stack 0x%s, special 0x%s, next_frame %p\n",
2827 paddr_nz (id
.code_addr
), paddr_nz (id
.stack_addr
),
2828 paddr_nz (bsp
), next_frame
);
2832 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
2834 int regnum
, int *optimizedp
,
2835 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
2836 int *realnump
, gdb_byte
*valuep
)
2840 CORE_ADDR prev_ip
, addr
;
2841 int realnum
, optimized
;
2842 enum lval_type lval
;
2845 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
2846 method of getting previous registers. */
2847 libunwind_frame_prev_register (next_frame
, this_cache
, IA64_IP_REGNUM
,
2848 &optimized
, &lval
, &addr
, &realnum
, buf
);
2849 prev_ip
= extract_unsigned_integer (buf
, 8);
2853 void *tmp_cache
= NULL
;
2854 ia64_sigtramp_frame_prev_register (next_frame
, &tmp_cache
, regnum
, optimizedp
, lvalp
,
2855 addrp
, realnump
, valuep
);
2858 ia64_libunwind_frame_prev_register (next_frame
, this_cache
, regnum
, optimizedp
, lvalp
,
2859 addrp
, realnump
, valuep
);
2862 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
2865 ia64_libunwind_sigtramp_frame_this_id
,
2866 ia64_libunwind_sigtramp_frame_prev_register
2869 static const struct frame_unwind
*
2870 ia64_libunwind_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
2872 if (libunwind_is_initialized ())
2874 if (libunwind_sigtramp_frame_sniffer (next_frame
))
2875 return &ia64_libunwind_sigtramp_frame_unwind
;
2879 return ia64_sigtramp_frame_sniffer (next_frame
);
2882 /* Set of libunwind callback acccessor functions. */
2883 static unw_accessors_t ia64_unw_accessors
=
2885 ia64_find_proc_info_x
,
2886 ia64_put_unwind_info
,
2887 ia64_get_dyn_info_list
,
2895 /* Set of special libunwind callback acccessor functions specific for accessing
2896 the rse registers. At the top of the stack, we want libunwind to figure out
2897 how to read r32 - r127. Though usually they are found sequentially in memory
2898 starting from $bof, this is not always true. */
2899 static unw_accessors_t ia64_unw_rse_accessors
=
2901 ia64_find_proc_info_x
,
2902 ia64_put_unwind_info
,
2903 ia64_get_dyn_info_list
,
2905 ia64_access_rse_reg
,
2906 ia64_access_rse_fpreg
,
2911 /* Set of ia64 gdb libunwind-frame callbacks and data for generic libunwind-frame code to use. */
2912 static struct libunwind_descr ia64_libunwind_descr
=
2917 &ia64_unw_accessors
,
2918 &ia64_unw_rse_accessors
,
2921 #endif /* HAVE_LIBUNWIND_IA64_H */
2923 /* Should we use DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS instead of
2924 gdbarch_extract_return_value? GCC_P is true if compiled with gcc and TYPE
2925 is the type (which is known to be struct, union or array). */
2927 ia64_use_struct_convention (int gcc_p
, struct type
*type
)
2929 struct type
*float_elt_type
;
2931 /* HFAs are structures (or arrays) consisting entirely of floating
2932 point values of the same length. Up to 8 of these are returned
2933 in registers. Don't use the struct convention when this is the
2935 float_elt_type
= is_float_or_hfa_type (type
);
2936 if (float_elt_type
!= NULL
2937 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
2940 /* Other structs of length 32 or less are returned in r8-r11.
2941 Don't use the struct convention for those either. */
2942 return TYPE_LENGTH (type
) > 32;
2946 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
2949 struct type
*float_elt_type
;
2951 float_elt_type
= is_float_or_hfa_type (type
);
2952 if (float_elt_type
!= NULL
)
2954 char from
[MAX_REGISTER_SIZE
];
2956 int regnum
= IA64_FR8_REGNUM
;
2957 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
2961 regcache_cooked_read (regcache
, regnum
, from
);
2962 convert_typed_floating (from
, builtin_type_ia64_ext
,
2963 (char *)valbuf
+ offset
, float_elt_type
);
2964 offset
+= TYPE_LENGTH (float_elt_type
);
2972 int regnum
= IA64_GR8_REGNUM
;
2973 int reglen
= TYPE_LENGTH (register_type (get_regcache_arch (regcache
),
2975 int n
= TYPE_LENGTH (type
) / reglen
;
2976 int m
= TYPE_LENGTH (type
) % reglen
;
2981 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2982 memcpy ((char *)valbuf
+ offset
, &val
, reglen
);
2989 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
2990 memcpy ((char *)valbuf
+ offset
, &val
, m
);
2997 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
2999 switch (TYPE_CODE (t
))
3003 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3010 case TYPE_CODE_ARRAY
:
3012 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3015 case TYPE_CODE_STRUCT
:
3019 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3020 if (!is_float_or_hfa_type_recurse
3021 (check_typedef (TYPE_FIELD_TYPE (t
, i
)), etp
))
3032 /* Determine if the given type is one of the floating point types or
3033 and HFA (which is a struct, array, or combination thereof whose
3034 bottom-most elements are all of the same floating point type). */
3036 static struct type
*
3037 is_float_or_hfa_type (struct type
*t
)
3039 struct type
*et
= 0;
3041 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3045 /* Return 1 if the alignment of T is such that the next even slot
3046 should be used. Return 0, if the next available slot should
3047 be used. (See section 8.5.1 of the IA-64 Software Conventions
3048 and Runtime manual). */
3051 slot_alignment_is_next_even (struct type
*t
)
3053 switch (TYPE_CODE (t
))
3057 if (TYPE_LENGTH (t
) > 8)
3061 case TYPE_CODE_ARRAY
:
3063 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3064 case TYPE_CODE_STRUCT
:
3068 for (i
= 0; i
< TYPE_NFIELDS (t
); i
++)
3069 if (slot_alignment_is_next_even
3070 (check_typedef (TYPE_FIELD_TYPE (t
, i
))))
3079 /* Attempt to find (and return) the global pointer for the given
3082 This is a rather nasty bit of code searchs for the .dynamic section
3083 in the objfile corresponding to the pc of the function we're trying
3084 to call. Once it finds the addresses at which the .dynamic section
3085 lives in the child process, it scans the Elf64_Dyn entries for a
3086 DT_PLTGOT tag. If it finds one of these, the corresponding
3087 d_un.d_ptr value is the global pointer. */
3090 ia64_find_global_pointer (CORE_ADDR faddr
)
3092 struct obj_section
*faddr_sect
;
3094 faddr_sect
= find_pc_section (faddr
);
3095 if (faddr_sect
!= NULL
)
3097 struct obj_section
*osect
;
3099 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3101 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3105 if (osect
< faddr_sect
->objfile
->sections_end
)
3110 while (addr
< osect
->endaddr
)
3116 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3119 tag
= extract_signed_integer (buf
, sizeof (buf
));
3121 if (tag
== DT_PLTGOT
)
3123 CORE_ADDR global_pointer
;
3125 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3128 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
));
3131 return global_pointer
;
3144 /* Given a function's address, attempt to find (and return) the
3145 corresponding (canonical) function descriptor. Return 0 if
3148 find_extant_func_descr (CORE_ADDR faddr
)
3150 struct obj_section
*faddr_sect
;
3152 /* Return early if faddr is already a function descriptor. */
3153 faddr_sect
= find_pc_section (faddr
);
3154 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3157 if (faddr_sect
!= NULL
)
3159 struct obj_section
*osect
;
3160 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3162 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3166 if (osect
< faddr_sect
->objfile
->sections_end
)
3171 while (addr
< osect
->endaddr
)
3177 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3180 faddr2
= extract_signed_integer (buf
, sizeof (buf
));
3182 if (faddr
== faddr2
)
3192 /* Attempt to find a function descriptor corresponding to the
3193 given address. If none is found, construct one on the
3194 stack using the address at fdaptr. */
3197 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3201 fdesc
= find_extant_func_descr (faddr
);
3205 ULONGEST global_pointer
;
3211 global_pointer
= ia64_find_global_pointer (faddr
);
3213 if (global_pointer
== 0)
3214 regcache_cooked_read_unsigned (regcache
,
3215 IA64_GR1_REGNUM
, &global_pointer
);
3217 store_unsigned_integer (buf
, 8, faddr
);
3218 store_unsigned_integer (buf
+ 8, 8, global_pointer
);
3220 write_memory (fdesc
, buf
, 16);
3226 /* Use the following routine when printing out function pointers
3227 so the user can see the function address rather than just the
3228 function descriptor. */
3230 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3231 struct target_ops
*targ
)
3233 struct obj_section
*s
;
3235 s
= find_pc_section (addr
);
3237 /* check if ADDR points to a function descriptor. */
3238 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3239 return read_memory_unsigned_integer (addr
, 8);
3241 /* There are also descriptors embedded in vtables. */
3244 struct minimal_symbol
*minsym
;
3246 minsym
= lookup_minimal_symbol_by_pc (addr
);
3248 if (minsym
&& is_vtable_name (SYMBOL_LINKAGE_NAME (minsym
)))
3249 return read_memory_unsigned_integer (addr
, 8);
3256 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3262 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3263 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3264 int nargs
, struct value
**args
, CORE_ADDR sp
,
3265 int struct_return
, CORE_ADDR struct_addr
)
3271 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3273 ULONGEST bsp
, cfm
, pfs
, new_bsp
;
3274 CORE_ADDR funcdescaddr
, pc
, global_pointer
;
3275 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3279 /* Count the number of slots needed for the arguments. */
3280 for (argno
= 0; argno
< nargs
; argno
++)
3283 type
= check_typedef (value_type (arg
));
3284 len
= TYPE_LENGTH (type
);
3286 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3289 if (TYPE_CODE (type
) == TYPE_CODE_FUNC
)
3292 nslots
+= (len
+ 7) / 8;
3295 /* Divvy up the slots between the RSE and the memory stack. */
3296 rseslots
= (nslots
> 8) ? 8 : nslots
;
3297 memslots
= nslots
- rseslots
;
3299 /* Allocate a new RSE frame. */
3300 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3302 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3303 new_bsp
= rse_address_add (bsp
, rseslots
);
3304 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3306 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3307 pfs
&= 0xc000000000000000LL
;
3308 pfs
|= (cfm
& 0xffffffffffffLL
);
3309 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3311 cfm
&= 0xc000000000000000LL
;
3313 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3315 /* We will attempt to find function descriptors in the .opd segment,
3316 but if we can't we'll construct them ourselves. That being the
3317 case, we'll need to reserve space on the stack for them. */
3318 funcdescaddr
= sp
- nfuncargs
* 16;
3319 funcdescaddr
&= ~0xfLL
;
3321 /* Adjust the stack pointer to it's new value. The calling conventions
3322 require us to have 16 bytes of scratch, plus whatever space is
3323 necessary for the memory slots and our function descriptors. */
3324 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3325 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3327 /* Place the arguments where they belong. The arguments will be
3328 either placed in the RSE backing store or on the memory stack.
3329 In addition, floating point arguments or HFAs are placed in
3330 floating point registers. */
3332 floatreg
= IA64_FR8_REGNUM
;
3333 for (argno
= 0; argno
< nargs
; argno
++)
3335 struct type
*float_elt_type
;
3338 type
= check_typedef (value_type (arg
));
3339 len
= TYPE_LENGTH (type
);
3341 /* Special handling for function parameters. */
3343 && TYPE_CODE (type
) == TYPE_CODE_PTR
3344 && TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
)
3347 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
), 8);
3348 store_unsigned_integer (val_buf
, 8,
3349 find_func_descr (regcache
, faddr
,
3351 if (slotnum
< rseslots
)
3352 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3354 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3361 /* Skip odd slot if necessary... */
3362 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3370 memset (val_buf
, 0, 8);
3371 memcpy (val_buf
, value_contents (arg
) + argoffset
, (len
> 8) ? 8 : len
);
3373 if (slotnum
< rseslots
)
3374 write_memory (rse_address_add (bsp
, slotnum
), val_buf
, 8);
3376 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3383 /* Handle floating point types (including HFAs). */
3384 float_elt_type
= is_float_or_hfa_type (type
);
3385 if (float_elt_type
!= NULL
)
3388 len
= TYPE_LENGTH (type
);
3389 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3391 char to
[MAX_REGISTER_SIZE
];
3392 convert_typed_floating (value_contents (arg
) + argoffset
, float_elt_type
,
3393 to
, builtin_type_ia64_ext
);
3394 regcache_cooked_write (regcache
, floatreg
, (void *)to
);
3396 argoffset
+= TYPE_LENGTH (float_elt_type
);
3397 len
-= TYPE_LENGTH (float_elt_type
);
3402 /* Store the struct return value in r8 if necessary. */
3405 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
, (ULONGEST
)struct_addr
);
3408 global_pointer
= ia64_find_global_pointer (func_addr
);
3410 if (global_pointer
!= 0)
3411 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3413 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3415 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3420 static struct frame_id
3421 ia64_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3426 frame_unwind_register (next_frame
, sp_regnum
, buf
);
3427 sp
= extract_unsigned_integer (buf
, 8);
3429 frame_unwind_register (next_frame
, IA64_BSP_REGNUM
, buf
);
3430 bsp
= extract_unsigned_integer (buf
, 8);
3432 if (gdbarch_debug
>= 1)
3433 fprintf_unfiltered (gdb_stdlog
,
3434 "dummy frame id: code 0x%s, stack 0x%s, special 0x%s\n",
3435 paddr_nz (frame_pc_unwind (next_frame
)),
3436 paddr_nz (sp
), paddr_nz (bsp
));
3438 return frame_id_build_special (sp
, frame_pc_unwind (next_frame
), bsp
);
3442 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3445 CORE_ADDR ip
, psr
, pc
;
3447 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3448 ip
= extract_unsigned_integer (buf
, 8);
3449 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3450 psr
= extract_unsigned_integer (buf
, 8);
3452 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3457 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3458 const gdb_byte
*valbuf
)
3460 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
3462 char to
[MAX_REGISTER_SIZE
];
3463 convert_typed_floating (valbuf
, type
, to
, builtin_type_ia64_ext
);
3464 regcache_cooked_write (regcache
, IA64_FR8_REGNUM
, (void *)to
);
3465 target_store_registers (regcache
, IA64_FR8_REGNUM
);
3468 regcache_cooked_write (regcache
, IA64_GR8_REGNUM
, valbuf
);
3472 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3474 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3475 return print_insn_ia64 (memaddr
, info
);
3478 static struct gdbarch
*
3479 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3481 struct gdbarch
*gdbarch
;
3482 struct gdbarch_tdep
*tdep
;
3484 /* If there is already a candidate, use it. */
3485 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3487 return arches
->gdbarch
;
3489 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
3490 gdbarch
= gdbarch_alloc (&info
, tdep
);
3492 tdep
->sigcontext_register_address
= 0;
3493 tdep
->pc_in_sigtramp
= 0;
3495 /* Define the ia64 floating-point format to gdb. */
3496 builtin_type_ia64_ext
=
3497 init_type (TYPE_CODE_FLT
, 128 / 8,
3498 0, "builtin_type_ia64_ext", NULL
);
3499 TYPE_FLOATFORMAT (builtin_type_ia64_ext
) = floatformats_ia64_ext
;
3501 /* According to the ia64 specs, instructions that store long double
3502 floats in memory use a long-double format different than that
3503 used in the floating registers. The memory format matches the
3504 x86 extended float format which is 80 bits. An OS may choose to
3505 use this format (e.g. GNU/Linux) or choose to use a different
3506 format for storing long doubles (e.g. HPUX). In the latter case,
3507 the setting of the format may be moved/overridden in an
3508 OS-specific tdep file. */
3509 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3511 set_gdbarch_short_bit (gdbarch
, 16);
3512 set_gdbarch_int_bit (gdbarch
, 32);
3513 set_gdbarch_long_bit (gdbarch
, 64);
3514 set_gdbarch_long_long_bit (gdbarch
, 64);
3515 set_gdbarch_float_bit (gdbarch
, 32);
3516 set_gdbarch_double_bit (gdbarch
, 64);
3517 set_gdbarch_long_double_bit (gdbarch
, 128);
3518 set_gdbarch_ptr_bit (gdbarch
, 64);
3520 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3521 set_gdbarch_num_pseudo_regs (gdbarch
, LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3522 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3523 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3525 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3526 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3528 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3529 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3530 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3531 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3532 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3533 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3534 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3536 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3538 set_gdbarch_deprecated_use_struct_convention (gdbarch
, ia64_use_struct_convention
);
3539 set_gdbarch_extract_return_value (gdbarch
, ia64_extract_return_value
);
3541 set_gdbarch_store_return_value (gdbarch
, ia64_store_return_value
);
3543 set_gdbarch_memory_insert_breakpoint (gdbarch
, ia64_memory_insert_breakpoint
);
3544 set_gdbarch_memory_remove_breakpoint (gdbarch
, ia64_memory_remove_breakpoint
);
3545 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3546 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3547 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3549 /* Settings for calling functions in the inferior. */
3550 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3551 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3552 set_gdbarch_unwind_dummy_id (gdbarch
, ia64_unwind_dummy_id
);
3554 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3555 #ifdef HAVE_LIBUNWIND_IA64_H
3556 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_sigtramp_frame_sniffer
);
3557 frame_unwind_append_sniffer (gdbarch
, ia64_libunwind_frame_sniffer
);
3558 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3560 frame_unwind_append_sniffer (gdbarch
, ia64_sigtramp_frame_sniffer
);
3562 frame_unwind_append_sniffer (gdbarch
, ia64_frame_sniffer
);
3563 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3565 /* Settings that should be unnecessary. */
3566 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3568 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
3569 set_gdbarch_convert_from_func_ptr_addr (gdbarch
, ia64_convert_from_func_ptr_addr
);
3571 /* The virtual table contains 16-byte descriptors, not pointers to
3573 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
3575 /* Hook in ABI-specific overrides, if they have been registered. */
3576 gdbarch_init_osabi (info
, gdbarch
);
3581 extern initialize_file_ftype _initialize_ia64_tdep
; /* -Wmissing-prototypes */
3584 _initialize_ia64_tdep (void)
3586 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);