* m68hc11-tdep.c (m68hc11_analyze_instruction): Don't advance the pc.
[deliverable/binutils-gdb.git] / gdb / m68hc11-tdep.c
1 /* Target-dependent code for Motorola 68HC11 & 68HC12
2 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Stephane Carrez, stcarrez@nerim.fr
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21
22 #include "defs.h"
23 #include "frame.h"
24 #include "symtab.h"
25 #include "gdbtypes.h"
26 #include "gdbcmd.h"
27 #include "gdbcore.h"
28 #include "gdb_string.h"
29 #include "value.h"
30 #include "inferior.h"
31 #include "dis-asm.h"
32 #include "symfile.h"
33 #include "objfiles.h"
34 #include "arch-utils.h"
35 #include "regcache.h"
36 #include "reggroups.h"
37
38 #include "target.h"
39 #include "opcode/m68hc11.h"
40 #include "elf/m68hc11.h"
41 #include "elf-bfd.h"
42
43 /* Macros for setting and testing a bit in a minimal symbol.
44 For 68HC11/68HC12 we have two flags that tell which return
45 type the function is using. This is used for prologue and frame
46 analysis to compute correct stack frame layout.
47
48 The MSB of the minimal symbol's "info" field is used for this purpose.
49 This field is already being used to store the symbol size, so the
50 assumption is that the symbol size cannot exceed 2^30.
51
52 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
53 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
54 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
55 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol.
56 MSYMBOL_SIZE Returns the size of the minimal symbol,
57 i.e. the "info" field with the "special" bit
58 masked out. */
59
60 #define MSYMBOL_SET_RTC(msym) \
61 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
62 | 0x80000000)
63
64 #define MSYMBOL_SET_RTI(msym) \
65 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
66 | 0x40000000)
67
68 #define MSYMBOL_IS_RTC(msym) \
69 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
70
71 #define MSYMBOL_IS_RTI(msym) \
72 (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0)
73
74 #define MSYMBOL_SIZE(msym) \
75 ((long) MSYMBOL_INFO (msym) & 0x3fffffff)
76
77 enum insn_return_kind {
78 RETURN_RTS,
79 RETURN_RTC,
80 RETURN_RTI
81 };
82
83
84 /* Register numbers of various important registers.
85 Note that some of these values are "real" register numbers,
86 and correspond to the general registers of the machine,
87 and some are "phony" register numbers which are too large
88 to be actual register numbers as far as the user is concerned
89 but do serve to get the desired values when passed to read_register. */
90
91 #define HARD_X_REGNUM 0
92 #define HARD_D_REGNUM 1
93 #define HARD_Y_REGNUM 2
94 #define HARD_SP_REGNUM 3
95 #define HARD_PC_REGNUM 4
96
97 #define HARD_A_REGNUM 5
98 #define HARD_B_REGNUM 6
99 #define HARD_CCR_REGNUM 7
100
101 /* 68HC12 page number register.
102 Note: to keep a compatibility with gcc register naming, we must
103 not have to rename FP and other soft registers. The page register
104 is a real hard register and must therefore be counted by NUM_REGS.
105 For this it has the same number as Z register (which is not used). */
106 #define HARD_PAGE_REGNUM 8
107 #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
108
109 /* Z is replaced by X or Y by gcc during machine reorg.
110 ??? There is no way to get it and even know whether
111 it's in X or Y or in ZS. */
112 #define SOFT_Z_REGNUM 8
113
114 /* Soft registers. These registers are special. There are treated
115 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
116 They are physically located in memory. */
117 #define SOFT_FP_REGNUM 9
118 #define SOFT_TMP_REGNUM 10
119 #define SOFT_ZS_REGNUM 11
120 #define SOFT_XY_REGNUM 12
121 #define SOFT_UNUSED_REGNUM 13
122 #define SOFT_D1_REGNUM 14
123 #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
124 #define M68HC11_MAX_SOFT_REGS 32
125
126 #define M68HC11_NUM_REGS (8)
127 #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
128 #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
129
130 #define M68HC11_REG_SIZE (2)
131
132 #define M68HC12_NUM_REGS (9)
133 #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
134 #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
135
136 struct insn_sequence;
137 struct gdbarch_tdep
138 {
139 /* Stack pointer correction value. For 68hc11, the stack pointer points
140 to the next push location. An offset of 1 must be applied to obtain
141 the address where the last value is saved. For 68hc12, the stack
142 pointer points to the last value pushed. No offset is necessary. */
143 int stack_correction;
144
145 /* Description of instructions in the prologue. */
146 struct insn_sequence *prologue;
147
148 /* True if the page memory bank register is available
149 and must be used. */
150 int use_page_register;
151
152 /* ELF flags for ABI. */
153 int elf_flags;
154 };
155
156 #define M6811_TDEP gdbarch_tdep (current_gdbarch)
157 #define STACK_CORRECTION (M6811_TDEP->stack_correction)
158 #define USE_PAGE_REGISTER (M6811_TDEP->use_page_register)
159
160 struct frame_extra_info
161 {
162 CORE_ADDR return_pc;
163 int frameless;
164 int size;
165 enum insn_return_kind return_kind;
166 };
167
168 /* Table of registers for 68HC11. This includes the hard registers
169 and the soft registers used by GCC. */
170 static char *
171 m68hc11_register_names[] =
172 {
173 "x", "d", "y", "sp", "pc", "a", "b",
174 "ccr", "page", "frame","tmp", "zs", "xy", 0,
175 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
176 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
177 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
178 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
179 "d29", "d30", "d31", "d32"
180 };
181
182 struct m68hc11_soft_reg
183 {
184 const char *name;
185 CORE_ADDR addr;
186 };
187
188 static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
189
190 #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
191
192 static int soft_min_addr;
193 static int soft_max_addr;
194 static int soft_reg_initialized = 0;
195
196 /* Look in the symbol table for the address of a pseudo register
197 in memory. If we don't find it, pretend the register is not used
198 and not available. */
199 static void
200 m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
201 {
202 struct minimal_symbol *msymbol;
203
204 msymbol = lookup_minimal_symbol (name, NULL, NULL);
205 if (msymbol)
206 {
207 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
208 reg->name = xstrdup (name);
209
210 /* Keep track of the address range for soft registers. */
211 if (reg->addr < (CORE_ADDR) soft_min_addr)
212 soft_min_addr = reg->addr;
213 if (reg->addr > (CORE_ADDR) soft_max_addr)
214 soft_max_addr = reg->addr;
215 }
216 else
217 {
218 reg->name = 0;
219 reg->addr = 0;
220 }
221 }
222
223 /* Initialize the table of soft register addresses according
224 to the symbol table. */
225 static void
226 m68hc11_initialize_register_info (void)
227 {
228 int i;
229
230 if (soft_reg_initialized)
231 return;
232
233 soft_min_addr = INT_MAX;
234 soft_max_addr = 0;
235 for (i = 0; i < M68HC11_ALL_REGS; i++)
236 {
237 soft_regs[i].name = 0;
238 }
239
240 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
241 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
242 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
243 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
244 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
245
246 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
247 {
248 char buf[10];
249
250 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
251 m68hc11_get_register_info (&soft_regs[i], buf);
252 }
253
254 if (soft_regs[SOFT_FP_REGNUM].name == 0)
255 {
256 warning ("No frame soft register found in the symbol table.\n");
257 warning ("Stack backtrace will not work.\n");
258 }
259 soft_reg_initialized = 1;
260 }
261
262 /* Given an address in memory, return the soft register number if
263 that address corresponds to a soft register. Returns -1 if not. */
264 static int
265 m68hc11_which_soft_register (CORE_ADDR addr)
266 {
267 int i;
268
269 if (addr < soft_min_addr || addr > soft_max_addr)
270 return -1;
271
272 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
273 {
274 if (soft_regs[i].name && soft_regs[i].addr == addr)
275 return i;
276 }
277 return -1;
278 }
279
280 /* Fetch a pseudo register. The 68hc11 soft registers are treated like
281 pseudo registers. They are located in memory. Translate the register
282 fetch into a memory read. */
283 static void
284 m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
285 struct regcache *regcache,
286 int regno, void *buf)
287 {
288 /* The PC is a pseudo reg only for 68HC12 with the memory bank
289 addressing mode. */
290 if (regno == M68HC12_HARD_PC_REGNUM)
291 {
292 ULONGEST pc;
293 const int regsize = TYPE_LENGTH (builtin_type_uint32);
294
295 regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc);
296 if (pc >= 0x8000 && pc < 0xc000)
297 {
298 ULONGEST page;
299
300 regcache_cooked_read_unsigned (regcache, HARD_PAGE_REGNUM, &page);
301 pc -= 0x8000;
302 pc += (page << 14);
303 pc += 0x1000000;
304 }
305 store_unsigned_integer (buf, regsize, pc);
306 return;
307 }
308
309 m68hc11_initialize_register_info ();
310
311 /* Fetch a soft register: translate into a memory read. */
312 if (soft_regs[regno].name)
313 {
314 target_read_memory (soft_regs[regno].addr, buf, 2);
315 }
316 else
317 {
318 memset (buf, 0, 2);
319 }
320 }
321
322 /* Store a pseudo register. Translate the register store
323 into a memory write. */
324 static void
325 m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
326 struct regcache *regcache,
327 int regno, const void *buf)
328 {
329 /* The PC is a pseudo reg only for 68HC12 with the memory bank
330 addressing mode. */
331 if (regno == M68HC12_HARD_PC_REGNUM)
332 {
333 const int regsize = TYPE_LENGTH (builtin_type_uint32);
334 char *tmp = alloca (regsize);
335 CORE_ADDR pc;
336
337 memcpy (tmp, buf, regsize);
338 pc = extract_unsigned_integer (tmp, regsize);
339 if (pc >= 0x1000000)
340 {
341 pc -= 0x1000000;
342 regcache_cooked_write_unsigned (regcache, HARD_PAGE_REGNUM,
343 (pc >> 14) & 0x0ff);
344 pc &= 0x03fff;
345 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM,
346 pc + 0x8000);
347 }
348 else
349 regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, pc);
350 return;
351 }
352
353 m68hc11_initialize_register_info ();
354
355 /* Store a soft register: translate into a memory write. */
356 if (soft_regs[regno].name)
357 {
358 const int regsize = 2;
359 char *tmp = alloca (regsize);
360 memcpy (tmp, buf, regsize);
361 target_write_memory (soft_regs[regno].addr, tmp, regsize);
362 }
363 }
364
365 static const char *
366 m68hc11_register_name (int reg_nr)
367 {
368 if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER)
369 return "pc";
370 if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER)
371 return "ppc";
372
373 if (reg_nr < 0)
374 return NULL;
375 if (reg_nr >= M68HC11_ALL_REGS)
376 return NULL;
377
378 /* If we don't know the address of a soft register, pretend it
379 does not exist. */
380 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
381 return NULL;
382 return m68hc11_register_names[reg_nr];
383 }
384
385 static const unsigned char *
386 m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
387 {
388 static unsigned char breakpoint[] = {0x0};
389
390 *lenptr = sizeof (breakpoint);
391 return breakpoint;
392 }
393
394 /* Immediately after a function call, return the saved pc before the frame
395 is setup. */
396
397 static CORE_ADDR
398 m68hc11_saved_pc_after_call (struct frame_info *frame)
399 {
400 CORE_ADDR addr;
401 ULONGEST sp;
402
403 regcache_cooked_read_unsigned (current_regcache, HARD_SP_REGNUM, &sp);
404 sp += STACK_CORRECTION;
405 addr = sp & 0x0ffff;
406 return read_memory_integer (addr, 2) & 0x0FFFF;
407 }
408
409 static CORE_ADDR
410 m68hc11_frame_saved_pc (struct frame_info *frame)
411 {
412 return get_frame_extra_info (frame)->return_pc;
413 }
414
415 static CORE_ADDR
416 m68hc11_frame_args_address (struct frame_info *frame)
417 {
418 CORE_ADDR addr;
419
420 addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION + 2;
421 if (get_frame_extra_info (frame)->return_kind == RETURN_RTC)
422 addr += 1;
423 else if (get_frame_extra_info (frame)->return_kind == RETURN_RTI)
424 addr += 7;
425
426 return addr;
427 }
428
429 /* Discard from the stack the innermost frame, restoring all saved
430 registers. */
431
432 static void
433 m68hc11_pop_frame (void)
434 {
435 register struct frame_info *frame = get_current_frame ();
436 register CORE_ADDR fp, sp;
437 register int regnum;
438
439 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
440 get_frame_base (frame),
441 get_frame_base (frame)))
442 generic_pop_dummy_frame ();
443 else
444 {
445 fp = get_frame_base (frame);
446 DEPRECATED_FRAME_INIT_SAVED_REGS (frame);
447
448 /* Copy regs from where they were saved in the frame. */
449 for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++)
450 if (get_frame_saved_regs (frame)[regnum])
451 write_register (regnum,
452 read_memory_integer (get_frame_saved_regs (frame)[regnum], 2));
453
454 write_register (HARD_PC_REGNUM, get_frame_extra_info (frame)->return_pc);
455 sp = (fp + get_frame_extra_info (frame)->size + 2) & 0x0ffff;
456 write_register (HARD_SP_REGNUM, sp);
457 }
458 flush_cached_frames ();
459 }
460
461 \f
462 /* 68HC11 & 68HC12 prologue analysis.
463
464 */
465 #define MAX_CODES 12
466
467 /* 68HC11 opcodes. */
468 #undef M6811_OP_PAGE2
469 #define M6811_OP_PAGE2 (0x18)
470 #define M6811_OP_LDX (0xde)
471 #define M6811_OP_LDX_EXT (0xfe)
472 #define M6811_OP_PSHX (0x3c)
473 #define M6811_OP_STS (0x9f)
474 #define M6811_OP_STS_EXT (0xbf)
475 #define M6811_OP_TSX (0x30)
476 #define M6811_OP_XGDX (0x8f)
477 #define M6811_OP_ADDD (0xc3)
478 #define M6811_OP_TXS (0x35)
479 #define M6811_OP_DES (0x34)
480
481 /* 68HC12 opcodes. */
482 #define M6812_OP_PAGE2 (0x18)
483 #define M6812_OP_MOVW (0x01)
484 #define M6812_PB_PSHW (0xae)
485 #define M6812_OP_STS (0x5f)
486 #define M6812_OP_STS_EXT (0x7f)
487 #define M6812_OP_LEAS (0x1b)
488 #define M6812_OP_PSHX (0x34)
489 #define M6812_OP_PSHY (0x35)
490
491 /* Operand extraction. */
492 #define OP_DIRECT (0x100) /* 8-byte direct addressing. */
493 #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
494 #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
495 #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
496
497 /* Identification of the sequence. */
498 enum m6811_seq_type
499 {
500 P_LAST = 0,
501 P_SAVE_REG, /* Save a register on the stack. */
502 P_SET_FRAME, /* Setup the frame pointer. */
503 P_LOCAL_1, /* Allocate 1 byte for locals. */
504 P_LOCAL_2, /* Allocate 2 bytes for locals. */
505 P_LOCAL_N /* Allocate N bytes for locals. */
506 };
507
508 struct insn_sequence {
509 enum m6811_seq_type type;
510 unsigned length;
511 unsigned short code[MAX_CODES];
512 };
513
514 /* Sequence of instructions in the 68HC11 function prologue. */
515 static struct insn_sequence m6811_prologue[] = {
516 /* Sequences to save a soft-register. */
517 { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
518 M6811_OP_PSHX } },
519 { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
520 M6811_OP_PAGE2, M6811_OP_PSHX } },
521 { P_SAVE_REG, 4, { M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
522 M6811_OP_PSHX } },
523 { P_SAVE_REG, 6, { M6811_OP_PAGE2, M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW,
524 M6811_OP_PAGE2, M6811_OP_PSHX } },
525
526 /* Sequences to allocate local variables. */
527 { P_LOCAL_N, 7, { M6811_OP_TSX,
528 M6811_OP_XGDX,
529 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
530 M6811_OP_XGDX,
531 M6811_OP_TXS } },
532 { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
533 M6811_OP_PAGE2, M6811_OP_XGDX,
534 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
535 M6811_OP_PAGE2, M6811_OP_XGDX,
536 M6811_OP_PAGE2, M6811_OP_TXS } },
537 { P_LOCAL_1, 1, { M6811_OP_DES } },
538 { P_LOCAL_2, 1, { M6811_OP_PSHX } },
539 { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
540
541 /* Initialize the frame pointer. */
542 { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
543 { P_SET_FRAME, 3, { M6811_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
544 { P_LAST, 0, { 0 } }
545 };
546
547
548 /* Sequence of instructions in the 68HC12 function prologue. */
549 static struct insn_sequence m6812_prologue[] = {
550 { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
551 OP_IMM_HIGH, OP_IMM_LOW } },
552 { P_SET_FRAME, 2, { M6812_OP_STS, OP_DIRECT } },
553 { P_SET_FRAME, 3, { M6812_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } },
554 { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
555 { P_LOCAL_2, 1, { M6812_OP_PSHX } },
556 { P_LOCAL_2, 1, { M6812_OP_PSHY } },
557 { P_LAST, 0 }
558 };
559
560
561 /* Analyze the sequence of instructions starting at the given address.
562 Returns a pointer to the sequence when it is recognized and
563 the optional value (constant/address) associated with it. */
564 static struct insn_sequence *
565 m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR pc,
566 CORE_ADDR *val)
567 {
568 unsigned char buffer[MAX_CODES];
569 unsigned bufsize;
570 unsigned j;
571 CORE_ADDR cur_val;
572 short v = 0;
573
574 bufsize = 0;
575 for (; seq->type != P_LAST; seq++)
576 {
577 cur_val = 0;
578 for (j = 0; j < seq->length; j++)
579 {
580 if (bufsize < j + 1)
581 {
582 buffer[bufsize] = read_memory_unsigned_integer (pc + bufsize,
583 1);
584 bufsize++;
585 }
586 /* Continue while we match the opcode. */
587 if (seq->code[j] == buffer[j])
588 continue;
589
590 if ((seq->code[j] & 0xf00) == 0)
591 break;
592
593 /* Extract a sequence parameter (address or constant). */
594 switch (seq->code[j])
595 {
596 case OP_DIRECT:
597 cur_val = (CORE_ADDR) buffer[j];
598 break;
599
600 case OP_IMM_HIGH:
601 cur_val = cur_val & 0x0ff;
602 cur_val |= (buffer[j] << 8);
603 break;
604
605 case OP_IMM_LOW:
606 cur_val &= 0x0ff00;
607 cur_val |= buffer[j];
608 break;
609
610 case OP_PBYTE:
611 if ((buffer[j] & 0xE0) == 0x80)
612 {
613 v = buffer[j] & 0x1f;
614 if (v & 0x10)
615 v |= 0xfff0;
616 }
617 else if ((buffer[j] & 0xfe) == 0xf0)
618 {
619 v = read_memory_unsigned_integer (pc + j + 1, 1);
620 if (buffer[j] & 1)
621 v |= 0xff00;
622 }
623 else if (buffer[j] == 0xf2)
624 {
625 v = read_memory_unsigned_integer (pc + j + 1, 2);
626 }
627 cur_val = v;
628 break;
629 }
630 }
631
632 /* We have a full match. */
633 if (j == seq->length)
634 {
635 *val = cur_val;
636 return seq;
637 }
638 }
639 return 0;
640 }
641
642 /* Return the instruction that the function at the PC is using. */
643 static enum insn_return_kind
644 m68hc11_get_return_insn (CORE_ADDR pc)
645 {
646 struct minimal_symbol *sym;
647
648 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
649 function is stored by elfread.c in the high bit of the info field.
650 Use this to decide which instruction the function uses to return. */
651 sym = lookup_minimal_symbol_by_pc (pc);
652 if (sym == 0)
653 return RETURN_RTS;
654
655 if (MSYMBOL_IS_RTC (sym))
656 return RETURN_RTC;
657 else if (MSYMBOL_IS_RTI (sym))
658 return RETURN_RTI;
659 else
660 return RETURN_RTS;
661 }
662
663
664 /* Analyze the function prologue to find some information
665 about the function:
666 - the PC of the first line (for m68hc11_skip_prologue)
667 - the offset of the previous frame saved address (from current frame)
668 - the soft registers which are pushed. */
669 static void
670 m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR current_pc, CORE_ADDR fp,
671 CORE_ADDR *first_line,
672 int *frame_offset, CORE_ADDR *pushed_regs)
673 {
674 CORE_ADDR save_addr;
675 CORE_ADDR func_end;
676 int size;
677 int found_frame_point;
678 int saved_reg;
679 CORE_ADDR first_pc;
680 int done = 0;
681 struct insn_sequence *seq_table;
682
683 first_pc = get_pc_function_start (pc);
684 size = 0;
685
686 m68hc11_initialize_register_info ();
687 if (first_pc == 0)
688 {
689 *frame_offset = 0;
690 *first_line = pc;
691 return;
692 }
693
694 seq_table = gdbarch_tdep (current_gdbarch)->prologue;
695
696 /* The 68hc11 stack is as follows:
697
698
699 | |
700 +-----------+
701 | |
702 | args |
703 | |
704 +-----------+
705 | PC-return |
706 +-----------+
707 | Old frame |
708 +-----------+
709 | |
710 | Locals |
711 | |
712 +-----------+ <--- current frame
713 | |
714
715 With most processors (like 68K) the previous frame can be computed
716 easily because it is always at a fixed offset (see link/unlink).
717 That is, locals are accessed with negative offsets, arguments are
718 accessed with positive ones. Since 68hc11 only supports offsets
719 in the range [0..255], the frame is defined at the bottom of
720 locals (see picture).
721
722 The purpose of the analysis made here is to find out the size
723 of locals in this function. An alternative to this is to use
724 DWARF2 info. This would be better but I don't know how to
725 access dwarf2 debug from this function.
726
727 Walk from the function entry point to the point where we save
728 the frame. While walking instructions, compute the size of bytes
729 which are pushed. This gives us the index to access the previous
730 frame.
731
732 We limit the search to 128 bytes so that the algorithm is bounded
733 in case of random and wrong code. We also stop and abort if
734 we find an instruction which is not supposed to appear in the
735 prologue (as generated by gcc 2.95, 2.96).
736 */
737 pc = first_pc;
738 func_end = pc + 128;
739 found_frame_point = 0;
740 *frame_offset = 0;
741 save_addr = fp + STACK_CORRECTION;
742 while (!done && pc + 2 < func_end)
743 {
744 struct insn_sequence *seq;
745 CORE_ADDR val;
746
747 seq = m68hc11_analyze_instruction (seq_table, pc, &val);
748 if (seq == 0)
749 break;
750
751 /* If we are within the instruction group, we can't advance the
752 pc nor the stack offset. Otherwise the caller's stack computed
753 from the current stack can be wrong. */
754 if (pc + seq->length > current_pc)
755 break;
756
757 pc = pc + seq->length;
758 if (seq->type == P_SAVE_REG)
759 {
760 if (found_frame_point)
761 {
762 saved_reg = m68hc11_which_soft_register (val);
763 if (saved_reg < 0)
764 break;
765
766 save_addr -= 2;
767 if (pushed_regs)
768 pushed_regs[saved_reg] = save_addr;
769 }
770 else
771 {
772 size += 2;
773 }
774 }
775 else if (seq->type == P_SET_FRAME)
776 {
777 found_frame_point = 1;
778 *frame_offset = size;
779 }
780 else if (seq->type == P_LOCAL_1)
781 {
782 size += 1;
783 }
784 else if (seq->type == P_LOCAL_2)
785 {
786 size += 2;
787 }
788 else if (seq->type == P_LOCAL_N)
789 {
790 /* Stack pointer is decremented for the allocation. */
791 if (val & 0x8000)
792 size -= (int) (val) | 0xffff0000;
793 else
794 size -= val;
795 }
796 }
797 *first_line = pc;
798 }
799
800 static CORE_ADDR
801 m68hc11_skip_prologue (CORE_ADDR pc)
802 {
803 CORE_ADDR func_addr, func_end;
804 struct symtab_and_line sal;
805 int frame_offset;
806
807 /* If we have line debugging information, then the end of the
808 prologue should be the first assembly instruction of the
809 first source line. */
810 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
811 {
812 sal = find_pc_line (func_addr, 0);
813 if (sal.end && sal.end < func_end)
814 return sal.end;
815 }
816
817 m68hc11_guess_from_prologue (pc, pc, 0, &pc, &frame_offset, 0);
818 return pc;
819 }
820
821 /* Given a GDB frame, determine the address of the calling function's
822 frame. This will be used to create a new GDB frame struct, and
823 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
824 will be called for the new frame. */
825
826 static CORE_ADDR
827 m68hc11_frame_chain (struct frame_info *frame)
828 {
829 CORE_ADDR addr;
830
831 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame),
832 get_frame_base (frame),
833 get_frame_base (frame)))
834 return get_frame_base (frame); /* dummy frame same as caller's frame */
835
836 if (get_frame_extra_info (frame)->return_pc == 0
837 || inside_entry_file (get_frame_extra_info (frame)->return_pc))
838 return (CORE_ADDR) 0;
839
840 if (get_frame_base (frame) == 0)
841 {
842 return (CORE_ADDR) 0;
843 }
844
845 addr = get_frame_base (frame) + get_frame_extra_info (frame)->size + STACK_CORRECTION - 2;
846 addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF;
847 return addr;
848 }
849
850 /* Put here the code to store, into a struct frame_saved_regs, the
851 addresses of the saved registers of frame described by FRAME_INFO.
852 This includes special registers such as pc and fp saved in special
853 ways in the stack frame. sp is even more special: the address we
854 return for it IS the sp for the next frame. */
855 static void
856 m68hc11_frame_init_saved_regs (struct frame_info *fi)
857 {
858 CORE_ADDR pc;
859 CORE_ADDR addr;
860
861 if (get_frame_saved_regs (fi) == NULL)
862 frame_saved_regs_zalloc (fi);
863 else
864 memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS);
865
866 pc = get_frame_pc (fi);
867 get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (pc);
868 m68hc11_guess_from_prologue (pc, pc, get_frame_base (fi), &pc,
869 &get_frame_extra_info (fi)->size,
870 get_frame_saved_regs (fi));
871
872 addr = get_frame_base (fi) + get_frame_extra_info (fi)->size + STACK_CORRECTION;
873 if (soft_regs[SOFT_FP_REGNUM].name)
874 get_frame_saved_regs (fi)[SOFT_FP_REGNUM] = addr - 2;
875
876 /* Take into account how the function was called/returns. */
877 if (get_frame_extra_info (fi)->return_kind == RETURN_RTC)
878 {
879 get_frame_saved_regs (fi)[HARD_PAGE_REGNUM] = addr;
880 addr++;
881 }
882 else if (get_frame_extra_info (fi)->return_kind == RETURN_RTI)
883 {
884 get_frame_saved_regs (fi)[HARD_CCR_REGNUM] = addr;
885 get_frame_saved_regs (fi)[HARD_D_REGNUM] = addr + 1;
886 get_frame_saved_regs (fi)[HARD_X_REGNUM] = addr + 3;
887 get_frame_saved_regs (fi)[HARD_Y_REGNUM] = addr + 5;
888 addr += 7;
889 }
890 get_frame_saved_regs (fi)[HARD_SP_REGNUM] = addr;
891 get_frame_saved_regs (fi)[HARD_PC_REGNUM] = get_frame_saved_regs (fi)[HARD_SP_REGNUM];
892 }
893
894 static void
895 m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi)
896 {
897 CORE_ADDR addr;
898
899 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
900
901 if (get_next_frame (fi))
902 deprecated_update_frame_pc_hack (fi, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi)));
903
904 m68hc11_frame_init_saved_regs (fi);
905
906 if (fromleaf)
907 {
908 get_frame_extra_info (fi)->return_kind = m68hc11_get_return_insn (get_frame_pc (fi));
909 get_frame_extra_info (fi)->return_pc = m68hc11_saved_pc_after_call (fi);
910 }
911 else
912 {
913 addr = get_frame_saved_regs (fi)[HARD_PC_REGNUM];
914 addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff;
915
916 /* Take into account the 68HC12 specific call (PC + page). */
917 if (get_frame_extra_info (fi)->return_kind == RETURN_RTC
918 && addr >= 0x08000 && addr < 0x0c000
919 && USE_PAGE_REGISTER)
920 {
921 CORE_ADDR page_addr = get_frame_saved_regs (fi)[HARD_PAGE_REGNUM];
922
923 unsigned page = read_memory_unsigned_integer (page_addr, 1);
924 addr -= 0x08000;
925 addr += ((page & 0x0ff) << 14);
926 addr += 0x1000000;
927 }
928 get_frame_extra_info (fi)->return_pc = addr;
929 }
930 }
931
932 \f
933 /* Get and print the register from the given frame. */
934 static void
935 m68hc11_print_register (struct gdbarch *gdbarch, struct ui_file *file,
936 struct frame_info *frame, int regno)
937 {
938 LONGEST rval;
939
940 if (regno == HARD_PC_REGNUM || regno == HARD_SP_REGNUM
941 || regno == SOFT_FP_REGNUM || regno == M68HC12_HARD_PC_REGNUM)
942 frame_read_unsigned_register (frame, regno, &rval);
943 else
944 frame_read_signed_register (frame, regno, &rval);
945
946 if (regno == HARD_A_REGNUM || regno == HARD_B_REGNUM
947 || regno == HARD_CCR_REGNUM || regno == HARD_PAGE_REGNUM)
948 {
949 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
950 if (regno != HARD_CCR_REGNUM)
951 print_longest (file, 'd', 1, rval);
952 }
953 else
954 {
955 if (regno == HARD_PC_REGNUM && gdbarch_tdep (gdbarch)->use_page_register)
956 {
957 ULONGEST page;
958
959 frame_read_unsigned_register (frame, HARD_PAGE_REGNUM, &page);
960 fprintf_filtered (file, "0x%02x:%04x ", (unsigned) page,
961 (unsigned) rval);
962 }
963 else
964 {
965 fprintf_filtered (file, "0x%04x ", (unsigned) rval);
966 if (regno != HARD_PC_REGNUM && regno != HARD_SP_REGNUM
967 && regno != SOFT_FP_REGNUM && regno != M68HC12_HARD_PC_REGNUM)
968 print_longest (file, 'd', 1, rval);
969 }
970 }
971
972 if (regno == HARD_CCR_REGNUM)
973 {
974 /* CCR register */
975 int C, Z, N, V;
976 unsigned char l = rval & 0xff;
977
978 fprintf_filtered (file, "%c%c%c%c%c%c%c%c ",
979 l & M6811_S_BIT ? 'S' : '-',
980 l & M6811_X_BIT ? 'X' : '-',
981 l & M6811_H_BIT ? 'H' : '-',
982 l & M6811_I_BIT ? 'I' : '-',
983 l & M6811_N_BIT ? 'N' : '-',
984 l & M6811_Z_BIT ? 'Z' : '-',
985 l & M6811_V_BIT ? 'V' : '-',
986 l & M6811_C_BIT ? 'C' : '-');
987 N = (l & M6811_N_BIT) != 0;
988 Z = (l & M6811_Z_BIT) != 0;
989 V = (l & M6811_V_BIT) != 0;
990 C = (l & M6811_C_BIT) != 0;
991
992 /* Print flags following the h8300 */
993 if ((C | Z) == 0)
994 fprintf_filtered (file, "u> ");
995 else if ((C | Z) == 1)
996 fprintf_filtered (file, "u<= ");
997 else if (C == 0)
998 fprintf_filtered (file, "u< ");
999
1000 if (Z == 0)
1001 fprintf_filtered (file, "!= ");
1002 else
1003 fprintf_filtered (file, "== ");
1004
1005 if ((N ^ V) == 0)
1006 fprintf_filtered (file, ">= ");
1007 else
1008 fprintf_filtered (file, "< ");
1009
1010 if ((Z | (N ^ V)) == 0)
1011 fprintf_filtered (file, "> ");
1012 else
1013 fprintf_filtered (file, "<= ");
1014 }
1015 }
1016
1017 /* Same as 'info reg' but prints the registers in a different way. */
1018 static void
1019 m68hc11_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1020 struct frame_info *frame, int regno, int cpregs)
1021 {
1022 if (regno >= 0)
1023 {
1024 const char *name = gdbarch_register_name (gdbarch, regno);
1025
1026 if (!name || !*name)
1027 return;
1028
1029 fprintf_filtered (file, "%-10s ", name);
1030 m68hc11_print_register (gdbarch, file, frame, regno);
1031 fprintf_filtered (file, "\n");
1032 }
1033 else
1034 {
1035 int i, nr;
1036
1037 fprintf_filtered (file, "PC=");
1038 m68hc11_print_register (gdbarch, file, frame, HARD_PC_REGNUM);
1039
1040 fprintf_filtered (file, " SP=");
1041 m68hc11_print_register (gdbarch, file, frame, HARD_SP_REGNUM);
1042
1043 fprintf_filtered (file, " FP=");
1044 m68hc11_print_register (gdbarch, file, frame, SOFT_FP_REGNUM);
1045
1046 fprintf_filtered (file, "\nCCR=");
1047 m68hc11_print_register (gdbarch, file, frame, HARD_CCR_REGNUM);
1048
1049 fprintf_filtered (file, "\nD=");
1050 m68hc11_print_register (gdbarch, file, frame, HARD_D_REGNUM);
1051
1052 fprintf_filtered (file, " X=");
1053 m68hc11_print_register (gdbarch, file, frame, HARD_X_REGNUM);
1054
1055 fprintf_filtered (file, " Y=");
1056 m68hc11_print_register (gdbarch, file, frame, HARD_Y_REGNUM);
1057
1058 if (gdbarch_tdep (gdbarch)->use_page_register)
1059 {
1060 fprintf_filtered (file, "\nPage=");
1061 m68hc11_print_register (gdbarch, file, frame, HARD_PAGE_REGNUM);
1062 }
1063 fprintf_filtered (file, "\n");
1064
1065 nr = 0;
1066 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
1067 {
1068 /* Skip registers which are not defined in the symbol table. */
1069 if (soft_regs[i].name == 0)
1070 continue;
1071
1072 fprintf_filtered (file, "D%d=", i - SOFT_D1_REGNUM + 1);
1073 m68hc11_print_register (gdbarch, file, frame, i);
1074 nr++;
1075 if ((nr % 8) == 7)
1076 fprintf_filtered (file, "\n");
1077 else
1078 fprintf_filtered (file, " ");
1079 }
1080 if (nr && (nr % 8) != 7)
1081 fprintf_filtered (file, "\n");
1082 }
1083 }
1084
1085 /* Same as 'info reg' but prints the registers in a different way. */
1086 static void
1087 show_regs (char *args, int from_tty)
1088 {
1089 m68hc11_print_registers_info (current_gdbarch, gdb_stdout,
1090 get_current_frame (), -1, 1);
1091 }
1092
1093 static CORE_ADDR
1094 m68hc11_stack_align (CORE_ADDR addr)
1095 {
1096 return ((addr + 1) & -2);
1097 }
1098
1099 static CORE_ADDR
1100 m68hc11_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
1101 struct regcache *regcache, CORE_ADDR bp_addr,
1102 int nargs, struct value **args, CORE_ADDR sp,
1103 int struct_return, CORE_ADDR struct_addr)
1104 {
1105 int argnum;
1106 int first_stack_argnum;
1107 struct type *type;
1108 char *val;
1109 int len;
1110 char buf[2];
1111
1112 first_stack_argnum = 0;
1113 if (struct_return)
1114 {
1115 /* The struct is allocated on the stack and gdb used the stack
1116 pointer for the address of that struct. We must apply the
1117 stack offset on the address. */
1118 regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM,
1119 struct_addr + STACK_CORRECTION);
1120 }
1121 else if (nargs > 0)
1122 {
1123 type = VALUE_TYPE (args[0]);
1124 len = TYPE_LENGTH (type);
1125
1126 /* First argument is passed in D and X registers. */
1127 if (len <= 4)
1128 {
1129 ULONGEST v;
1130
1131 v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len);
1132 first_stack_argnum = 1;
1133
1134 regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, v);
1135 if (len > 2)
1136 {
1137 v >>= 16;
1138 regcache_cooked_write_unsigned (regcache, HARD_X_REGNUM, v);
1139 }
1140 }
1141 }
1142
1143 for (argnum = nargs - 1; argnum >= first_stack_argnum; argnum--)
1144 {
1145 type = VALUE_TYPE (args[argnum]);
1146 len = TYPE_LENGTH (type);
1147
1148 if (len & 1)
1149 {
1150 static char zero = 0;
1151
1152 sp--;
1153 write_memory (sp, &zero, 1);
1154 }
1155 val = (char*) VALUE_CONTENTS (args[argnum]);
1156 sp -= len;
1157 write_memory (sp, val, len);
1158 }
1159
1160 /* Store return address. */
1161 sp -= 2;
1162 store_unsigned_integer (buf, 2, bp_addr);
1163 write_memory (sp, buf, 2);
1164
1165 /* Finally, update the stack pointer... */
1166 sp -= STACK_CORRECTION;
1167 regcache_cooked_write_unsigned (regcache, HARD_SP_REGNUM, sp);
1168
1169 /* ...and fake a frame pointer. */
1170 regcache_cooked_write_unsigned (regcache, SOFT_FP_REGNUM, sp);
1171
1172 /* DWARF2/GCC uses the stack address *before* the function call as a
1173 frame's CFA. */
1174 return sp + 2;
1175 }
1176
1177
1178 /* Return the GDB type object for the "standard" data type
1179 of data in register N. */
1180
1181 static struct type *
1182 m68hc11_register_type (struct gdbarch *gdbarch, int reg_nr)
1183 {
1184 switch (reg_nr)
1185 {
1186 case HARD_PAGE_REGNUM:
1187 case HARD_A_REGNUM:
1188 case HARD_B_REGNUM:
1189 case HARD_CCR_REGNUM:
1190 return builtin_type_uint8;
1191
1192 case M68HC12_HARD_PC_REGNUM:
1193 return builtin_type_uint32;
1194
1195 default:
1196 return builtin_type_uint16;
1197 }
1198 }
1199
1200 static void
1201 m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1202 {
1203 /* The struct address computed by gdb is on the stack.
1204 It uses the stack pointer so we must apply the stack
1205 correction offset. */
1206 write_register (HARD_D_REGNUM, addr + STACK_CORRECTION);
1207 }
1208
1209 static void
1210 m68hc11_store_return_value (struct type *type, struct regcache *regcache,
1211 const void *valbuf)
1212 {
1213 int len;
1214
1215 len = TYPE_LENGTH (type);
1216
1217 /* First argument is passed in D and X registers. */
1218 if (len <= 2)
1219 regcache_raw_write_part (regcache, HARD_D_REGNUM, 2 - len, len, valbuf);
1220 else if (len <= 4)
1221 {
1222 regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len,
1223 len - 2, valbuf);
1224 regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2));
1225 }
1226 else
1227 error ("return of value > 4 is not supported.");
1228 }
1229
1230
1231 /* Given a return value in `regcache' with a type `type',
1232 extract and copy its value into `valbuf'. */
1233
1234 static void
1235 m68hc11_extract_return_value (struct type *type, struct regcache *regcache,
1236 void *valbuf)
1237 {
1238 int len = TYPE_LENGTH (type);
1239 char buf[M68HC11_REG_SIZE];
1240
1241 regcache_raw_read (regcache, HARD_D_REGNUM, buf);
1242 switch (len)
1243 {
1244 case 1:
1245 memcpy (valbuf, buf + 1, 1);
1246 break;
1247
1248 case 2:
1249 memcpy (valbuf, buf, 2);
1250 break;
1251
1252 case 3:
1253 memcpy ((char*) valbuf + 1, buf, 2);
1254 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1255 memcpy (valbuf, buf + 1, 1);
1256 break;
1257
1258 case 4:
1259 memcpy ((char*) valbuf + 2, buf, 2);
1260 regcache_raw_read (regcache, HARD_X_REGNUM, buf);
1261 memcpy (valbuf, buf, 2);
1262 break;
1263
1264 default:
1265 error ("bad size for return value");
1266 }
1267 }
1268
1269 /* Should call_function allocate stack space for a struct return? */
1270 static int
1271 m68hc11_use_struct_convention (int gcc_p, struct type *type)
1272 {
1273 return (TYPE_CODE (type) == TYPE_CODE_STRUCT
1274 || TYPE_CODE (type) == TYPE_CODE_UNION
1275 || TYPE_LENGTH (type) > 4);
1276 }
1277
1278 static int
1279 m68hc11_return_value_on_stack (struct type *type)
1280 {
1281 return TYPE_LENGTH (type) > 4;
1282 }
1283
1284 /* Extract from an array REGBUF containing the (raw) register state
1285 the address in which a function should return its structure value,
1286 as a CORE_ADDR (or an expression that can be used as one). */
1287 static CORE_ADDR
1288 m68hc11_extract_struct_value_address (struct regcache *regcache)
1289 {
1290 char buf[M68HC11_REG_SIZE];
1291
1292 regcache_cooked_read (regcache, HARD_D_REGNUM, buf);
1293 return extract_unsigned_integer (buf, M68HC11_REG_SIZE);
1294 }
1295
1296 /* Test whether the ELF symbol corresponds to a function using rtc or
1297 rti to return. */
1298
1299 static void
1300 m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
1301 {
1302 unsigned char flags;
1303
1304 flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other;
1305 if (flags & STO_M68HC12_FAR)
1306 MSYMBOL_SET_RTC (msym);
1307 if (flags & STO_M68HC12_INTERRUPT)
1308 MSYMBOL_SET_RTI (msym);
1309 }
1310
1311 static int
1312 gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
1313 {
1314 if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
1315 return print_insn_m68hc11 (memaddr, info);
1316 else
1317 return print_insn_m68hc12 (memaddr, info);
1318 }
1319
1320 \f
1321
1322 /* 68HC11/68HC12 register groups.
1323 Identify real hard registers and soft registers used by gcc. */
1324
1325 static struct reggroup *m68hc11_soft_reggroup;
1326 static struct reggroup *m68hc11_hard_reggroup;
1327
1328 static void
1329 m68hc11_init_reggroups (void)
1330 {
1331 m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP);
1332 m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP);
1333 }
1334
1335 static void
1336 m68hc11_add_reggroups (struct gdbarch *gdbarch)
1337 {
1338 reggroup_add (gdbarch, m68hc11_hard_reggroup);
1339 reggroup_add (gdbarch, m68hc11_soft_reggroup);
1340 reggroup_add (gdbarch, general_reggroup);
1341 reggroup_add (gdbarch, float_reggroup);
1342 reggroup_add (gdbarch, all_reggroup);
1343 reggroup_add (gdbarch, save_reggroup);
1344 reggroup_add (gdbarch, restore_reggroup);
1345 reggroup_add (gdbarch, vector_reggroup);
1346 reggroup_add (gdbarch, system_reggroup);
1347 }
1348
1349 static int
1350 m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1351 struct reggroup *group)
1352 {
1353 /* We must save the real hard register as well as gcc
1354 soft registers including the frame pointer. */
1355 if (group == save_reggroup || group == restore_reggroup)
1356 {
1357 return (regnum <= gdbarch_num_regs (gdbarch)
1358 || ((regnum == SOFT_FP_REGNUM
1359 || regnum == SOFT_TMP_REGNUM
1360 || regnum == SOFT_ZS_REGNUM
1361 || regnum == SOFT_XY_REGNUM)
1362 && m68hc11_register_name (regnum)));
1363 }
1364
1365 /* Group to identify gcc soft registers (d1..dN). */
1366 if (group == m68hc11_soft_reggroup)
1367 {
1368 return regnum >= SOFT_D1_REGNUM && m68hc11_register_name (regnum);
1369 }
1370
1371 if (group == m68hc11_hard_reggroup)
1372 {
1373 return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM
1374 || regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM
1375 || regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM;
1376 }
1377 return default_register_reggroup_p (gdbarch, regnum, group);
1378 }
1379
1380 static struct gdbarch *
1381 m68hc11_gdbarch_init (struct gdbarch_info info,
1382 struct gdbarch_list *arches)
1383 {
1384 struct gdbarch *gdbarch;
1385 struct gdbarch_tdep *tdep;
1386 int elf_flags;
1387
1388 soft_reg_initialized = 0;
1389
1390 /* Extract the elf_flags if available. */
1391 if (info.abfd != NULL
1392 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1393 elf_flags = elf_elfheader (info.abfd)->e_flags;
1394 else
1395 elf_flags = 0;
1396
1397 /* try to find a pre-existing architecture */
1398 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1399 arches != NULL;
1400 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1401 {
1402 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
1403 continue;
1404
1405 return arches->gdbarch;
1406 }
1407
1408 /* Need a new architecture. Fill in a target specific vector. */
1409 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1410 gdbarch = gdbarch_alloc (&info, tdep);
1411 tdep->elf_flags = elf_flags;
1412
1413 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1414 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1415 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1416
1417 switch (info.bfd_arch_info->arch)
1418 {
1419 case bfd_arch_m68hc11:
1420 tdep->stack_correction = 1;
1421 tdep->use_page_register = 0;
1422 tdep->prologue = m6811_prologue;
1423 set_gdbarch_addr_bit (gdbarch, 16);
1424 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1425 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1426 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
1427 break;
1428
1429 case bfd_arch_m68hc12:
1430 tdep->stack_correction = 0;
1431 tdep->use_page_register = elf_flags & E_M68HC12_BANKS;
1432 tdep->prologue = m6812_prologue;
1433 set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16);
1434 set_gdbarch_num_pseudo_regs (gdbarch,
1435 elf_flags & E_M68HC12_BANKS
1436 ? M68HC12_NUM_PSEUDO_REGS
1437 : M68HC11_NUM_PSEUDO_REGS);
1438 set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS
1439 ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM);
1440 set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS
1441 ? M68HC12_NUM_REGS : M68HC11_NUM_REGS);
1442 break;
1443
1444 default:
1445 break;
1446 }
1447
1448 /* Initially set everything according to the ABI.
1449 Use 16-bit integers since it will be the case for most
1450 programs. The size of these types should normally be set
1451 according to the dwarf2 debug information. */
1452 set_gdbarch_short_bit (gdbarch, 16);
1453 set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
1454 set_gdbarch_float_bit (gdbarch, 32);
1455 set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
1456 set_gdbarch_long_double_bit (gdbarch, 64);
1457 set_gdbarch_long_bit (gdbarch, 32);
1458 set_gdbarch_ptr_bit (gdbarch, 16);
1459 set_gdbarch_long_long_bit (gdbarch, 64);
1460
1461 /* Characters are unsigned. */
1462 set_gdbarch_char_signed (gdbarch, 0);
1463
1464 /* Set register info. */
1465 set_gdbarch_fp0_regnum (gdbarch, -1);
1466 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs);
1467 set_gdbarch_frame_args_skip (gdbarch, 0);
1468
1469 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1470 set_gdbarch_deprecated_dummy_write_sp (gdbarch, deprecated_write_sp);
1471
1472 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
1473 set_gdbarch_deprecated_fp_regnum (gdbarch, SOFT_FP_REGNUM);
1474 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
1475 set_gdbarch_register_type (gdbarch, m68hc11_register_type);
1476 set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read);
1477 set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write);
1478
1479 set_gdbarch_push_dummy_call (gdbarch, m68hc11_push_dummy_call);
1480
1481 set_gdbarch_deprecated_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
1482 set_gdbarch_extract_return_value (gdbarch, m68hc11_extract_return_value);
1483 set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack);
1484
1485 set_gdbarch_deprecated_store_struct_return (gdbarch, m68hc11_store_struct_return);
1486 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1487 set_gdbarch_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address);
1488
1489 set_gdbarch_deprecated_frame_chain (gdbarch, m68hc11_frame_chain);
1490 set_gdbarch_deprecated_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc);
1491 set_gdbarch_deprecated_frame_args_address (gdbarch, m68hc11_frame_args_address);
1492 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call);
1493
1494 set_gdbarch_deprecated_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
1495
1496 set_gdbarch_deprecated_store_struct_return (gdbarch, m68hc11_store_struct_return);
1497 set_gdbarch_store_return_value (gdbarch, m68hc11_store_return_value);
1498 set_gdbarch_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address);
1499 set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention);
1500 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info);
1501 set_gdbarch_deprecated_pop_frame (gdbarch, m68hc11_pop_frame);
1502 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1503 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1504 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1505 set_gdbarch_function_start_offset (gdbarch, 0);
1506 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
1507 set_gdbarch_stack_align (gdbarch, m68hc11_stack_align);
1508 set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
1509
1510 m68hc11_add_reggroups (gdbarch);
1511 set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p);
1512 set_gdbarch_print_registers_info (gdbarch, m68hc11_print_registers_info);
1513
1514 /* Minsymbol frobbing. */
1515 set_gdbarch_elf_make_msymbol_special (gdbarch,
1516 m68hc11_elf_make_msymbol_special);
1517
1518 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1519
1520 return gdbarch;
1521 }
1522
1523 extern initialize_file_ftype _initialize_m68hc11_tdep; /* -Wmissing-prototypes */
1524
1525 void
1526 _initialize_m68hc11_tdep (void)
1527 {
1528 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
1529 register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
1530 m68hc11_init_reggroups ();
1531
1532 deprecate_cmd (add_com ("regs", class_vars, show_regs,
1533 "Print all registers"),
1534 "info registers");
1535 }
1536
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