1 /* Target-dependent code for Motorola 68HC11 & 68HC12
2 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Stephane Carrez, stcarrez@nerim.fr
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
28 #include "gdb_string.h"
34 #include "arch-utils.h"
36 #include "reggroups.h"
39 #include "opcode/m68hc11.h"
40 #include "elf/m68hc11.h"
43 /* Macros for setting and testing a bit in a minimal symbol.
44 For 68HC11/68HC12 we have two flags that tell which return
45 type the function is using. This is used for prologue and frame
46 analysis to compute correct stack frame layout.
48 The MSB of the minimal symbol's "info" field is used for this purpose.
49 This field is already being used to store the symbol size, so the
50 assumption is that the symbol size cannot exceed 2^30.
52 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
53 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
54 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
55 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol.
56 MSYMBOL_SIZE Returns the size of the minimal symbol,
57 i.e. the "info" field with the "special" bit
60 #define MSYMBOL_SET_RTC(msym) \
61 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
64 #define MSYMBOL_SET_RTI(msym) \
65 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
68 #define MSYMBOL_IS_RTC(msym) \
69 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
71 #define MSYMBOL_IS_RTI(msym) \
72 (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0)
74 #define MSYMBOL_SIZE(msym) \
75 ((long) MSYMBOL_INFO (msym) & 0x3fffffff)
77 enum insn_return_kind
{
84 /* Register numbers of various important registers.
85 Note that some of these values are "real" register numbers,
86 and correspond to the general registers of the machine,
87 and some are "phony" register numbers which are too large
88 to be actual register numbers as far as the user is concerned
89 but do serve to get the desired values when passed to read_register. */
91 #define HARD_X_REGNUM 0
92 #define HARD_D_REGNUM 1
93 #define HARD_Y_REGNUM 2
94 #define HARD_SP_REGNUM 3
95 #define HARD_PC_REGNUM 4
97 #define HARD_A_REGNUM 5
98 #define HARD_B_REGNUM 6
99 #define HARD_CCR_REGNUM 7
101 /* 68HC12 page number register.
102 Note: to keep a compatibility with gcc register naming, we must
103 not have to rename FP and other soft registers. The page register
104 is a real hard register and must therefore be counted by NUM_REGS.
105 For this it has the same number as Z register (which is not used). */
106 #define HARD_PAGE_REGNUM 8
107 #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
109 /* Z is replaced by X or Y by gcc during machine reorg.
110 ??? There is no way to get it and even know whether
111 it's in X or Y or in ZS. */
112 #define SOFT_Z_REGNUM 8
114 /* Soft registers. These registers are special. There are treated
115 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
116 They are physically located in memory. */
117 #define SOFT_FP_REGNUM 9
118 #define SOFT_TMP_REGNUM 10
119 #define SOFT_ZS_REGNUM 11
120 #define SOFT_XY_REGNUM 12
121 #define SOFT_UNUSED_REGNUM 13
122 #define SOFT_D1_REGNUM 14
123 #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
124 #define M68HC11_MAX_SOFT_REGS 32
126 #define M68HC11_NUM_REGS (8)
127 #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
128 #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
130 #define M68HC11_REG_SIZE (2)
132 #define M68HC12_NUM_REGS (9)
133 #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
134 #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
136 struct insn_sequence
;
139 /* Stack pointer correction value. For 68hc11, the stack pointer points
140 to the next push location. An offset of 1 must be applied to obtain
141 the address where the last value is saved. For 68hc12, the stack
142 pointer points to the last value pushed. No offset is necessary. */
143 int stack_correction
;
145 /* Description of instructions in the prologue. */
146 struct insn_sequence
*prologue
;
148 /* True if the page memory bank register is available
150 int use_page_register
;
152 /* ELF flags for ABI. */
156 #define M6811_TDEP gdbarch_tdep (current_gdbarch)
157 #define STACK_CORRECTION (M6811_TDEP->stack_correction)
158 #define USE_PAGE_REGISTER (M6811_TDEP->use_page_register)
160 struct frame_extra_info
165 enum insn_return_kind return_kind
;
168 /* Table of registers for 68HC11. This includes the hard registers
169 and the soft registers used by GCC. */
171 m68hc11_register_names
[] =
173 "x", "d", "y", "sp", "pc", "a", "b",
174 "ccr", "page", "frame","tmp", "zs", "xy", 0,
175 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
176 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
177 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
178 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
179 "d29", "d30", "d31", "d32"
182 struct m68hc11_soft_reg
188 static struct m68hc11_soft_reg soft_regs
[M68HC11_ALL_REGS
];
190 #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
192 static int soft_min_addr
;
193 static int soft_max_addr
;
194 static int soft_reg_initialized
= 0;
196 /* Look in the symbol table for the address of a pseudo register
197 in memory. If we don't find it, pretend the register is not used
198 and not available. */
200 m68hc11_get_register_info (struct m68hc11_soft_reg
*reg
, const char *name
)
202 struct minimal_symbol
*msymbol
;
204 msymbol
= lookup_minimal_symbol (name
, NULL
, NULL
);
207 reg
->addr
= SYMBOL_VALUE_ADDRESS (msymbol
);
208 reg
->name
= xstrdup (name
);
210 /* Keep track of the address range for soft registers. */
211 if (reg
->addr
< (CORE_ADDR
) soft_min_addr
)
212 soft_min_addr
= reg
->addr
;
213 if (reg
->addr
> (CORE_ADDR
) soft_max_addr
)
214 soft_max_addr
= reg
->addr
;
223 /* Initialize the table of soft register addresses according
224 to the symbol table. */
226 m68hc11_initialize_register_info (void)
230 if (soft_reg_initialized
)
233 soft_min_addr
= INT_MAX
;
235 for (i
= 0; i
< M68HC11_ALL_REGS
; i
++)
237 soft_regs
[i
].name
= 0;
240 m68hc11_get_register_info (&soft_regs
[SOFT_FP_REGNUM
], "_.frame");
241 m68hc11_get_register_info (&soft_regs
[SOFT_TMP_REGNUM
], "_.tmp");
242 m68hc11_get_register_info (&soft_regs
[SOFT_ZS_REGNUM
], "_.z");
243 soft_regs
[SOFT_Z_REGNUM
] = soft_regs
[SOFT_ZS_REGNUM
];
244 m68hc11_get_register_info (&soft_regs
[SOFT_XY_REGNUM
], "_.xy");
246 for (i
= SOFT_D1_REGNUM
; i
< M68HC11_MAX_SOFT_REGS
; i
++)
250 sprintf (buf
, "_.d%d", i
- SOFT_D1_REGNUM
+ 1);
251 m68hc11_get_register_info (&soft_regs
[i
], buf
);
254 if (soft_regs
[SOFT_FP_REGNUM
].name
== 0)
256 warning ("No frame soft register found in the symbol table.\n");
257 warning ("Stack backtrace will not work.\n");
259 soft_reg_initialized
= 1;
262 /* Given an address in memory, return the soft register number if
263 that address corresponds to a soft register. Returns -1 if not. */
265 m68hc11_which_soft_register (CORE_ADDR addr
)
269 if (addr
< soft_min_addr
|| addr
> soft_max_addr
)
272 for (i
= SOFT_FP_REGNUM
; i
< M68HC11_ALL_REGS
; i
++)
274 if (soft_regs
[i
].name
&& soft_regs
[i
].addr
== addr
)
280 /* Fetch a pseudo register. The 68hc11 soft registers are treated like
281 pseudo registers. They are located in memory. Translate the register
282 fetch into a memory read. */
284 m68hc11_pseudo_register_read (struct gdbarch
*gdbarch
,
285 struct regcache
*regcache
,
286 int regno
, void *buf
)
288 /* The PC is a pseudo reg only for 68HC12 with the memory bank
290 if (regno
== M68HC12_HARD_PC_REGNUM
)
293 const int regsize
= TYPE_LENGTH (builtin_type_uint32
);
295 regcache_cooked_read_unsigned (regcache
, HARD_PC_REGNUM
, &pc
);
296 if (pc
>= 0x8000 && pc
< 0xc000)
300 regcache_cooked_read_unsigned (regcache
, HARD_PAGE_REGNUM
, &page
);
305 store_unsigned_integer (buf
, regsize
, pc
);
309 m68hc11_initialize_register_info ();
311 /* Fetch a soft register: translate into a memory read. */
312 if (soft_regs
[regno
].name
)
314 target_read_memory (soft_regs
[regno
].addr
, buf
, 2);
322 /* Store a pseudo register. Translate the register store
323 into a memory write. */
325 m68hc11_pseudo_register_write (struct gdbarch
*gdbarch
,
326 struct regcache
*regcache
,
327 int regno
, const void *buf
)
329 /* The PC is a pseudo reg only for 68HC12 with the memory bank
331 if (regno
== M68HC12_HARD_PC_REGNUM
)
333 const int regsize
= TYPE_LENGTH (builtin_type_uint32
);
334 char *tmp
= alloca (regsize
);
337 memcpy (tmp
, buf
, regsize
);
338 pc
= extract_unsigned_integer (tmp
, regsize
);
342 regcache_cooked_write_unsigned (regcache
, HARD_PAGE_REGNUM
,
345 regcache_cooked_write_unsigned (regcache
, HARD_PC_REGNUM
,
349 regcache_cooked_write_unsigned (regcache
, HARD_PC_REGNUM
, pc
);
353 m68hc11_initialize_register_info ();
355 /* Store a soft register: translate into a memory write. */
356 if (soft_regs
[regno
].name
)
358 const int regsize
= 2;
359 char *tmp
= alloca (regsize
);
360 memcpy (tmp
, buf
, regsize
);
361 target_write_memory (soft_regs
[regno
].addr
, tmp
, regsize
);
366 m68hc11_register_name (int reg_nr
)
368 if (reg_nr
== M68HC12_HARD_PC_REGNUM
&& USE_PAGE_REGISTER
)
370 if (reg_nr
== HARD_PC_REGNUM
&& USE_PAGE_REGISTER
)
375 if (reg_nr
>= M68HC11_ALL_REGS
)
378 /* If we don't know the address of a soft register, pretend it
380 if (reg_nr
> M68HC11_LAST_HARD_REG
&& soft_regs
[reg_nr
].name
== 0)
382 return m68hc11_register_names
[reg_nr
];
385 static const unsigned char *
386 m68hc11_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
388 static unsigned char breakpoint
[] = {0x0};
390 *lenptr
= sizeof (breakpoint
);
394 /* Immediately after a function call, return the saved pc before the frame
398 m68hc11_saved_pc_after_call (struct frame_info
*frame
)
403 regcache_cooked_read_unsigned (current_regcache
, HARD_SP_REGNUM
, &sp
);
404 sp
+= STACK_CORRECTION
;
406 return read_memory_integer (addr
, 2) & 0x0FFFF;
410 m68hc11_frame_saved_pc (struct frame_info
*frame
)
412 return get_frame_extra_info (frame
)->return_pc
;
416 m68hc11_frame_args_address (struct frame_info
*frame
)
420 addr
= get_frame_base (frame
) + get_frame_extra_info (frame
)->size
+ STACK_CORRECTION
+ 2;
421 if (get_frame_extra_info (frame
)->return_kind
== RETURN_RTC
)
423 else if (get_frame_extra_info (frame
)->return_kind
== RETURN_RTI
)
429 /* Discard from the stack the innermost frame, restoring all saved
433 m68hc11_pop_frame (void)
435 register struct frame_info
*frame
= get_current_frame ();
436 register CORE_ADDR fp
, sp
;
439 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
440 get_frame_base (frame
),
441 get_frame_base (frame
)))
442 generic_pop_dummy_frame ();
445 fp
= get_frame_base (frame
);
446 DEPRECATED_FRAME_INIT_SAVED_REGS (frame
);
448 /* Copy regs from where they were saved in the frame. */
449 for (regnum
= 0; regnum
< M68HC11_ALL_REGS
; regnum
++)
450 if (get_frame_saved_regs (frame
)[regnum
])
451 write_register (regnum
,
452 read_memory_integer (get_frame_saved_regs (frame
)[regnum
], 2));
454 write_register (HARD_PC_REGNUM
, get_frame_extra_info (frame
)->return_pc
);
455 sp
= (fp
+ get_frame_extra_info (frame
)->size
+ 2) & 0x0ffff;
456 write_register (HARD_SP_REGNUM
, sp
);
458 flush_cached_frames ();
462 /* 68HC11 & 68HC12 prologue analysis.
467 /* 68HC11 opcodes. */
468 #undef M6811_OP_PAGE2
469 #define M6811_OP_PAGE2 (0x18)
470 #define M6811_OP_LDX (0xde)
471 #define M6811_OP_LDX_EXT (0xfe)
472 #define M6811_OP_PSHX (0x3c)
473 #define M6811_OP_STS (0x9f)
474 #define M6811_OP_STS_EXT (0xbf)
475 #define M6811_OP_TSX (0x30)
476 #define M6811_OP_XGDX (0x8f)
477 #define M6811_OP_ADDD (0xc3)
478 #define M6811_OP_TXS (0x35)
479 #define M6811_OP_DES (0x34)
481 /* 68HC12 opcodes. */
482 #define M6812_OP_PAGE2 (0x18)
483 #define M6812_OP_MOVW (0x01)
484 #define M6812_PB_PSHW (0xae)
485 #define M6812_OP_STS (0x5f)
486 #define M6812_OP_STS_EXT (0x7f)
487 #define M6812_OP_LEAS (0x1b)
488 #define M6812_OP_PSHX (0x34)
489 #define M6812_OP_PSHY (0x35)
491 /* Operand extraction. */
492 #define OP_DIRECT (0x100) /* 8-byte direct addressing. */
493 #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
494 #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
495 #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
497 /* Identification of the sequence. */
501 P_SAVE_REG
, /* Save a register on the stack. */
502 P_SET_FRAME
, /* Setup the frame pointer. */
503 P_LOCAL_1
, /* Allocate 1 byte for locals. */
504 P_LOCAL_2
, /* Allocate 2 bytes for locals. */
505 P_LOCAL_N
/* Allocate N bytes for locals. */
508 struct insn_sequence
{
509 enum m6811_seq_type type
;
511 unsigned short code
[MAX_CODES
];
514 /* Sequence of instructions in the 68HC11 function prologue. */
515 static struct insn_sequence m6811_prologue
[] = {
516 /* Sequences to save a soft-register. */
517 { P_SAVE_REG
, 3, { M6811_OP_LDX
, OP_DIRECT
,
519 { P_SAVE_REG
, 5, { M6811_OP_PAGE2
, M6811_OP_LDX
, OP_DIRECT
,
520 M6811_OP_PAGE2
, M6811_OP_PSHX
} },
521 { P_SAVE_REG
, 4, { M6811_OP_LDX_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
,
523 { P_SAVE_REG
, 6, { M6811_OP_PAGE2
, M6811_OP_LDX_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
,
524 M6811_OP_PAGE2
, M6811_OP_PSHX
} },
526 /* Sequences to allocate local variables. */
527 { P_LOCAL_N
, 7, { M6811_OP_TSX
,
529 M6811_OP_ADDD
, OP_IMM_HIGH
, OP_IMM_LOW
,
532 { P_LOCAL_N
, 11, { M6811_OP_PAGE2
, M6811_OP_TSX
,
533 M6811_OP_PAGE2
, M6811_OP_XGDX
,
534 M6811_OP_ADDD
, OP_IMM_HIGH
, OP_IMM_LOW
,
535 M6811_OP_PAGE2
, M6811_OP_XGDX
,
536 M6811_OP_PAGE2
, M6811_OP_TXS
} },
537 { P_LOCAL_1
, 1, { M6811_OP_DES
} },
538 { P_LOCAL_2
, 1, { M6811_OP_PSHX
} },
539 { P_LOCAL_2
, 2, { M6811_OP_PAGE2
, M6811_OP_PSHX
} },
541 /* Initialize the frame pointer. */
542 { P_SET_FRAME
, 2, { M6811_OP_STS
, OP_DIRECT
} },
543 { P_SET_FRAME
, 3, { M6811_OP_STS_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
} },
548 /* Sequence of instructions in the 68HC12 function prologue. */
549 static struct insn_sequence m6812_prologue
[] = {
550 { P_SAVE_REG
, 5, { M6812_OP_PAGE2
, M6812_OP_MOVW
, M6812_PB_PSHW
,
551 OP_IMM_HIGH
, OP_IMM_LOW
} },
552 { P_SET_FRAME
, 2, { M6812_OP_STS
, OP_DIRECT
} },
553 { P_SET_FRAME
, 3, { M6812_OP_STS_EXT
, OP_IMM_HIGH
, OP_IMM_LOW
} },
554 { P_LOCAL_N
, 2, { M6812_OP_LEAS
, OP_PBYTE
} },
555 { P_LOCAL_2
, 1, { M6812_OP_PSHX
} },
556 { P_LOCAL_2
, 1, { M6812_OP_PSHY
} },
561 /* Analyze the sequence of instructions starting at the given address.
562 Returns a pointer to the sequence when it is recognized and
563 the optional value (constant/address) associated with it.
564 Advance the pc for the next sequence. */
565 static struct insn_sequence
*
566 m68hc11_analyze_instruction (struct insn_sequence
*seq
, CORE_ADDR
*pc
,
569 unsigned char buffer
[MAX_CODES
];
576 for (; seq
->type
!= P_LAST
; seq
++)
579 for (j
= 0; j
< seq
->length
; j
++)
583 buffer
[bufsize
] = read_memory_unsigned_integer (*pc
+ bufsize
,
587 /* Continue while we match the opcode. */
588 if (seq
->code
[j
] == buffer
[j
])
591 if ((seq
->code
[j
] & 0xf00) == 0)
594 /* Extract a sequence parameter (address or constant). */
595 switch (seq
->code
[j
])
598 cur_val
= (CORE_ADDR
) buffer
[j
];
602 cur_val
= cur_val
& 0x0ff;
603 cur_val
|= (buffer
[j
] << 8);
608 cur_val
|= buffer
[j
];
612 if ((buffer
[j
] & 0xE0) == 0x80)
614 v
= buffer
[j
] & 0x1f;
618 else if ((buffer
[j
] & 0xfe) == 0xf0)
620 v
= read_memory_unsigned_integer (*pc
+ j
+ 1, 1);
625 else if (buffer
[j
] == 0xf2)
627 v
= read_memory_unsigned_integer (*pc
+ j
+ 1, 2);
635 /* We have a full match. */
636 if (j
== seq
->length
)
646 /* Return the instruction that the function at the PC is using. */
647 static enum insn_return_kind
648 m68hc11_get_return_insn (CORE_ADDR pc
)
650 struct minimal_symbol
*sym
;
652 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
653 function is stored by elfread.c in the high bit of the info field.
654 Use this to decide which instruction the function uses to return. */
655 sym
= lookup_minimal_symbol_by_pc (pc
);
659 if (MSYMBOL_IS_RTC (sym
))
661 else if (MSYMBOL_IS_RTI (sym
))
668 /* Analyze the function prologue to find some information
670 - the PC of the first line (for m68hc11_skip_prologue)
671 - the offset of the previous frame saved address (from current frame)
672 - the soft registers which are pushed. */
674 m68hc11_guess_from_prologue (CORE_ADDR pc
, CORE_ADDR fp
,
675 CORE_ADDR
*first_line
,
676 int *frame_offset
, CORE_ADDR
*pushed_regs
)
681 int found_frame_point
;
685 struct insn_sequence
*seq_table
;
687 first_pc
= get_pc_function_start (pc
);
690 m68hc11_initialize_register_info ();
698 seq_table
= gdbarch_tdep (current_gdbarch
)->prologue
;
700 /* The 68hc11 stack is as follows:
716 +-----------+ <--- current frame
719 With most processors (like 68K) the previous frame can be computed
720 easily because it is always at a fixed offset (see link/unlink).
721 That is, locals are accessed with negative offsets, arguments are
722 accessed with positive ones. Since 68hc11 only supports offsets
723 in the range [0..255], the frame is defined at the bottom of
724 locals (see picture).
726 The purpose of the analysis made here is to find out the size
727 of locals in this function. An alternative to this is to use
728 DWARF2 info. This would be better but I don't know how to
729 access dwarf2 debug from this function.
731 Walk from the function entry point to the point where we save
732 the frame. While walking instructions, compute the size of bytes
733 which are pushed. This gives us the index to access the previous
736 We limit the search to 128 bytes so that the algorithm is bounded
737 in case of random and wrong code. We also stop and abort if
738 we find an instruction which is not supposed to appear in the
739 prologue (as generated by gcc 2.95, 2.96).
743 found_frame_point
= 0;
745 save_addr
= fp
+ STACK_CORRECTION
;
746 while (!done
&& pc
+ 2 < func_end
)
748 struct insn_sequence
*seq
;
751 seq
= m68hc11_analyze_instruction (seq_table
, &pc
, &val
);
755 if (seq
->type
== P_SAVE_REG
)
757 if (found_frame_point
)
759 saved_reg
= m68hc11_which_soft_register (val
);
765 pushed_regs
[saved_reg
] = save_addr
;
772 else if (seq
->type
== P_SET_FRAME
)
774 found_frame_point
= 1;
775 *frame_offset
= size
;
777 else if (seq
->type
== P_LOCAL_1
)
781 else if (seq
->type
== P_LOCAL_2
)
785 else if (seq
->type
== P_LOCAL_N
)
787 /* Stack pointer is decremented for the allocation. */
789 size
-= (int) (val
) | 0xffff0000;
798 m68hc11_skip_prologue (CORE_ADDR pc
)
800 CORE_ADDR func_addr
, func_end
;
801 struct symtab_and_line sal
;
804 /* If we have line debugging information, then the end of the
805 prologue should be the first assembly instruction of the
806 first source line. */
807 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
809 sal
= find_pc_line (func_addr
, 0);
810 if (sal
.end
&& sal
.end
< func_end
)
814 m68hc11_guess_from_prologue (pc
, 0, &pc
, &frame_offset
, 0);
818 /* Given a GDB frame, determine the address of the calling function's
819 frame. This will be used to create a new GDB frame struct, and
820 then DEPRECATED_INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC
821 will be called for the new frame. */
824 m68hc11_frame_chain (struct frame_info
*frame
)
828 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
829 get_frame_base (frame
),
830 get_frame_base (frame
)))
831 return get_frame_base (frame
); /* dummy frame same as caller's frame */
833 if (get_frame_extra_info (frame
)->return_pc
== 0
834 || inside_entry_file (get_frame_extra_info (frame
)->return_pc
))
835 return (CORE_ADDR
) 0;
837 if (get_frame_base (frame
) == 0)
839 return (CORE_ADDR
) 0;
842 addr
= get_frame_base (frame
) + get_frame_extra_info (frame
)->size
+ STACK_CORRECTION
- 2;
843 addr
= read_memory_unsigned_integer (addr
, 2) & 0x0FFFF;
847 /* Put here the code to store, into a struct frame_saved_regs, the
848 addresses of the saved registers of frame described by FRAME_INFO.
849 This includes special registers such as pc and fp saved in special
850 ways in the stack frame. sp is even more special: the address we
851 return for it IS the sp for the next frame. */
853 m68hc11_frame_init_saved_regs (struct frame_info
*fi
)
858 if (get_frame_saved_regs (fi
) == NULL
)
859 frame_saved_regs_zalloc (fi
);
861 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
863 pc
= get_frame_pc (fi
);
864 get_frame_extra_info (fi
)->return_kind
= m68hc11_get_return_insn (pc
);
865 m68hc11_guess_from_prologue (pc
, get_frame_base (fi
), &pc
,
866 &get_frame_extra_info (fi
)->size
,
867 get_frame_saved_regs (fi
));
869 addr
= get_frame_base (fi
) + get_frame_extra_info (fi
)->size
+ STACK_CORRECTION
;
870 if (soft_regs
[SOFT_FP_REGNUM
].name
)
871 get_frame_saved_regs (fi
)[SOFT_FP_REGNUM
] = addr
- 2;
873 /* Take into account how the function was called/returns. */
874 if (get_frame_extra_info (fi
)->return_kind
== RETURN_RTC
)
876 get_frame_saved_regs (fi
)[HARD_PAGE_REGNUM
] = addr
;
879 else if (get_frame_extra_info (fi
)->return_kind
== RETURN_RTI
)
881 get_frame_saved_regs (fi
)[HARD_CCR_REGNUM
] = addr
;
882 get_frame_saved_regs (fi
)[HARD_D_REGNUM
] = addr
+ 1;
883 get_frame_saved_regs (fi
)[HARD_X_REGNUM
] = addr
+ 3;
884 get_frame_saved_regs (fi
)[HARD_Y_REGNUM
] = addr
+ 5;
887 get_frame_saved_regs (fi
)[HARD_SP_REGNUM
] = addr
;
888 get_frame_saved_regs (fi
)[HARD_PC_REGNUM
] = get_frame_saved_regs (fi
)[HARD_SP_REGNUM
];
892 m68hc11_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
896 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
898 if (get_next_frame (fi
))
899 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
901 m68hc11_frame_init_saved_regs (fi
);
905 get_frame_extra_info (fi
)->return_kind
= m68hc11_get_return_insn (get_frame_pc (fi
));
906 get_frame_extra_info (fi
)->return_pc
= m68hc11_saved_pc_after_call (fi
);
910 addr
= get_frame_saved_regs (fi
)[HARD_PC_REGNUM
];
911 addr
= read_memory_unsigned_integer (addr
, 2) & 0x0ffff;
913 /* Take into account the 68HC12 specific call (PC + page). */
914 if (get_frame_extra_info (fi
)->return_kind
== RETURN_RTC
915 && addr
>= 0x08000 && addr
< 0x0c000
916 && USE_PAGE_REGISTER
)
918 CORE_ADDR page_addr
= get_frame_saved_regs (fi
)[HARD_PAGE_REGNUM
];
920 unsigned page
= read_memory_unsigned_integer (page_addr
, 1);
922 addr
+= ((page
& 0x0ff) << 14);
925 get_frame_extra_info (fi
)->return_pc
= addr
;
930 /* Get and print the register from the given frame. */
932 m68hc11_print_register (struct gdbarch
*gdbarch
, struct ui_file
*file
,
933 struct frame_info
*frame
, int regno
)
937 if (regno
== HARD_PC_REGNUM
|| regno
== HARD_SP_REGNUM
938 || regno
== SOFT_FP_REGNUM
|| regno
== M68HC12_HARD_PC_REGNUM
)
939 frame_read_unsigned_register (frame
, regno
, &rval
);
941 frame_read_signed_register (frame
, regno
, &rval
);
943 if (regno
== HARD_A_REGNUM
|| regno
== HARD_B_REGNUM
944 || regno
== HARD_CCR_REGNUM
|| regno
== HARD_PAGE_REGNUM
)
946 fprintf_filtered (file
, "0x%02x ", (unsigned char) rval
);
947 if (regno
!= HARD_CCR_REGNUM
)
948 print_longest (file
, 'd', 1, rval
);
952 if (regno
== HARD_PC_REGNUM
&& gdbarch_tdep (gdbarch
)->use_page_register
)
956 frame_read_unsigned_register (frame
, HARD_PAGE_REGNUM
, &page
);
957 fprintf_filtered (file
, "0x%02x:%04x ", (unsigned) page
,
962 fprintf_filtered (file
, "0x%04x ", (unsigned) rval
);
963 if (regno
!= HARD_PC_REGNUM
&& regno
!= HARD_SP_REGNUM
964 && regno
!= SOFT_FP_REGNUM
&& regno
!= M68HC12_HARD_PC_REGNUM
)
965 print_longest (file
, 'd', 1, rval
);
969 if (regno
== HARD_CCR_REGNUM
)
973 unsigned char l
= rval
& 0xff;
975 fprintf_filtered (file
, "%c%c%c%c%c%c%c%c ",
976 l
& M6811_S_BIT
? 'S' : '-',
977 l
& M6811_X_BIT
? 'X' : '-',
978 l
& M6811_H_BIT
? 'H' : '-',
979 l
& M6811_I_BIT
? 'I' : '-',
980 l
& M6811_N_BIT
? 'N' : '-',
981 l
& M6811_Z_BIT
? 'Z' : '-',
982 l
& M6811_V_BIT
? 'V' : '-',
983 l
& M6811_C_BIT
? 'C' : '-');
984 N
= (l
& M6811_N_BIT
) != 0;
985 Z
= (l
& M6811_Z_BIT
) != 0;
986 V
= (l
& M6811_V_BIT
) != 0;
987 C
= (l
& M6811_C_BIT
) != 0;
989 /* Print flags following the h8300 */
991 fprintf_filtered (file
, "u> ");
992 else if ((C
| Z
) == 1)
993 fprintf_filtered (file
, "u<= ");
995 fprintf_filtered (file
, "u< ");
998 fprintf_filtered (file
, "!= ");
1000 fprintf_filtered (file
, "== ");
1003 fprintf_filtered (file
, ">= ");
1005 fprintf_filtered (file
, "< ");
1007 if ((Z
| (N
^ V
)) == 0)
1008 fprintf_filtered (file
, "> ");
1010 fprintf_filtered (file
, "<= ");
1014 /* Same as 'info reg' but prints the registers in a different way. */
1016 m68hc11_print_registers_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1017 struct frame_info
*frame
, int regno
, int cpregs
)
1021 const char *name
= gdbarch_register_name (gdbarch
, regno
);
1023 if (!name
|| !*name
)
1026 fprintf_filtered (file
, "%-10s ", name
);
1027 m68hc11_print_register (gdbarch
, file
, frame
, regno
);
1028 fprintf_filtered (file
, "\n");
1034 fprintf_filtered (file
, "PC=");
1035 m68hc11_print_register (gdbarch
, file
, frame
, HARD_PC_REGNUM
);
1037 fprintf_filtered (file
, " SP=");
1038 m68hc11_print_register (gdbarch
, file
, frame
, HARD_SP_REGNUM
);
1040 fprintf_filtered (file
, " FP=");
1041 m68hc11_print_register (gdbarch
, file
, frame
, SOFT_FP_REGNUM
);
1043 fprintf_filtered (file
, "\nCCR=");
1044 m68hc11_print_register (gdbarch
, file
, frame
, HARD_CCR_REGNUM
);
1046 fprintf_filtered (file
, "\nD=");
1047 m68hc11_print_register (gdbarch
, file
, frame
, HARD_D_REGNUM
);
1049 fprintf_filtered (file
, " X=");
1050 m68hc11_print_register (gdbarch
, file
, frame
, HARD_X_REGNUM
);
1052 fprintf_filtered (file
, " Y=");
1053 m68hc11_print_register (gdbarch
, file
, frame
, HARD_Y_REGNUM
);
1055 if (gdbarch_tdep (gdbarch
)->use_page_register
)
1057 fprintf_filtered (file
, "\nPage=");
1058 m68hc11_print_register (gdbarch
, file
, frame
, HARD_PAGE_REGNUM
);
1060 fprintf_filtered (file
, "\n");
1063 for (i
= SOFT_D1_REGNUM
; i
< M68HC11_ALL_REGS
; i
++)
1065 /* Skip registers which are not defined in the symbol table. */
1066 if (soft_regs
[i
].name
== 0)
1069 fprintf_filtered (file
, "D%d=", i
- SOFT_D1_REGNUM
+ 1);
1070 m68hc11_print_register (gdbarch
, file
, frame
, i
);
1073 fprintf_filtered (file
, "\n");
1075 fprintf_filtered (file
, " ");
1077 if (nr
&& (nr
% 8) != 7)
1078 fprintf_filtered (file
, "\n");
1082 /* Same as 'info reg' but prints the registers in a different way. */
1084 show_regs (char *args
, int from_tty
)
1086 m68hc11_print_registers_info (current_gdbarch
, gdb_stdout
,
1087 get_current_frame (), -1, 1);
1091 m68hc11_stack_align (CORE_ADDR addr
)
1093 return ((addr
+ 1) & -2);
1097 m68hc11_push_arguments (int nargs
,
1098 struct value
**args
,
1101 CORE_ADDR struct_addr
)
1105 int first_stack_argnum
;
1112 first_stack_argnum
= 0;
1115 /* The struct is allocated on the stack and gdb used the stack
1116 pointer for the address of that struct. We must apply the
1117 stack offset on the address. */
1118 write_register (HARD_D_REGNUM
, struct_addr
+ STACK_CORRECTION
);
1122 type
= VALUE_TYPE (args
[0]);
1123 len
= TYPE_LENGTH (type
);
1125 /* First argument is passed in D and X registers. */
1128 LONGEST v
= extract_unsigned_integer (VALUE_CONTENTS (args
[0]), len
);
1129 first_stack_argnum
= 1;
1130 write_register (HARD_D_REGNUM
, v
);
1134 write_register (HARD_X_REGNUM
, v
);
1138 for (argnum
= first_stack_argnum
; argnum
< nargs
; argnum
++)
1140 type
= VALUE_TYPE (args
[argnum
]);
1141 stack_alloc
+= (TYPE_LENGTH (type
) + 1) & -2;
1145 stack_offset
= STACK_CORRECTION
;
1146 for (argnum
= first_stack_argnum
; argnum
< nargs
; argnum
++)
1148 type
= VALUE_TYPE (args
[argnum
]);
1149 len
= TYPE_LENGTH (type
);
1151 val
= (char*) VALUE_CONTENTS (args
[argnum
]);
1152 write_memory (sp
+ stack_offset
, val
, len
);
1153 stack_offset
+= len
;
1156 static char zero
= 0;
1158 write_memory (sp
+ stack_offset
, &zero
, 1);
1166 /* Return the GDB type object for the "standard" data type
1167 of data in register N. */
1169 static struct type
*
1170 m68hc11_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
1174 case HARD_PAGE_REGNUM
:
1177 case HARD_CCR_REGNUM
:
1178 return builtin_type_uint8
;
1180 case M68HC12_HARD_PC_REGNUM
:
1181 return builtin_type_uint32
;
1184 return builtin_type_uint16
;
1189 m68hc11_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1191 /* The struct address computed by gdb is on the stack.
1192 It uses the stack pointer so we must apply the stack
1193 correction offset. */
1194 write_register (HARD_D_REGNUM
, addr
+ STACK_CORRECTION
);
1198 m68hc11_store_return_value (struct type
*type
, struct regcache
*regcache
,
1203 len
= TYPE_LENGTH (type
);
1205 /* First argument is passed in D and X registers. */
1207 regcache_raw_write_part (regcache
, HARD_D_REGNUM
, 2 - len
, len
, valbuf
);
1210 regcache_raw_write_part (regcache
, HARD_X_REGNUM
, 4 - len
,
1212 regcache_raw_write (regcache
, HARD_D_REGNUM
, (char*) valbuf
+ (len
- 2));
1215 error ("return of value > 4 is not supported.");
1219 /* Given a return value in `regcache' with a type `type',
1220 extract and copy its value into `valbuf'. */
1223 m68hc11_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1226 int len
= TYPE_LENGTH (type
);
1227 char buf
[M68HC11_REG_SIZE
];
1229 regcache_raw_read (regcache
, HARD_D_REGNUM
, buf
);
1233 memcpy (valbuf
, buf
+ 1, 1);
1237 memcpy (valbuf
, buf
, 2);
1241 memcpy ((char*) valbuf
+ 1, buf
, 2);
1242 regcache_raw_read (regcache
, HARD_X_REGNUM
, buf
);
1243 memcpy (valbuf
, buf
+ 1, 1);
1247 memcpy ((char*) valbuf
+ 2, buf
, 2);
1248 regcache_raw_read (regcache
, HARD_X_REGNUM
, buf
);
1249 memcpy (valbuf
, buf
, 2);
1253 error ("bad size for return value");
1257 /* Should call_function allocate stack space for a struct return? */
1259 m68hc11_use_struct_convention (int gcc_p
, struct type
*type
)
1261 return (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1262 || TYPE_CODE (type
) == TYPE_CODE_UNION
1263 || TYPE_LENGTH (type
) > 4);
1267 m68hc11_return_value_on_stack (struct type
*type
)
1269 return TYPE_LENGTH (type
) > 4;
1272 /* Extract from an array REGBUF containing the (raw) register state
1273 the address in which a function should return its structure value,
1274 as a CORE_ADDR (or an expression that can be used as one). */
1276 m68hc11_extract_struct_value_address (struct regcache
*regcache
)
1278 char buf
[M68HC11_REG_SIZE
];
1280 regcache_cooked_read (regcache
, HARD_D_REGNUM
, buf
);
1281 return extract_unsigned_integer (buf
, M68HC11_REG_SIZE
);
1284 /* Function: push_return_address (pc)
1285 Set up the return address for the inferior function call.
1286 Needed for targets where we don't actually execute a JSR/BSR instruction */
1289 m68hc11_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1293 pc
= CALL_DUMMY_ADDRESS ();
1295 store_unsigned_integer (valbuf
, 2, pc
);
1296 write_memory (sp
+ STACK_CORRECTION
, valbuf
, 2);
1300 /* Test whether the ELF symbol corresponds to a function using rtc or
1304 m68hc11_elf_make_msymbol_special (asymbol
*sym
, struct minimal_symbol
*msym
)
1306 unsigned char flags
;
1308 flags
= ((elf_symbol_type
*)sym
)->internal_elf_sym
.st_other
;
1309 if (flags
& STO_M68HC12_FAR
)
1310 MSYMBOL_SET_RTC (msym
);
1311 if (flags
& STO_M68HC12_INTERRUPT
)
1312 MSYMBOL_SET_RTI (msym
);
1316 gdb_print_insn_m68hc11 (bfd_vma memaddr
, disassemble_info
*info
)
1318 if (TARGET_ARCHITECTURE
->arch
== bfd_arch_m68hc11
)
1319 return print_insn_m68hc11 (memaddr
, info
);
1321 return print_insn_m68hc12 (memaddr
, info
);
1326 /* 68HC11/68HC12 register groups.
1327 Identify real hard registers and soft registers used by gcc. */
1329 static struct reggroup
*m68hc11_soft_reggroup
;
1330 static struct reggroup
*m68hc11_hard_reggroup
;
1333 m68hc11_init_reggroups (void)
1335 m68hc11_hard_reggroup
= reggroup_new ("hard", USER_REGGROUP
);
1336 m68hc11_soft_reggroup
= reggroup_new ("soft", USER_REGGROUP
);
1340 m68hc11_add_reggroups (struct gdbarch
*gdbarch
)
1342 reggroup_add (gdbarch
, m68hc11_hard_reggroup
);
1343 reggroup_add (gdbarch
, m68hc11_soft_reggroup
);
1344 reggroup_add (gdbarch
, general_reggroup
);
1345 reggroup_add (gdbarch
, float_reggroup
);
1346 reggroup_add (gdbarch
, all_reggroup
);
1347 reggroup_add (gdbarch
, save_reggroup
);
1348 reggroup_add (gdbarch
, restore_reggroup
);
1349 reggroup_add (gdbarch
, vector_reggroup
);
1350 reggroup_add (gdbarch
, system_reggroup
);
1354 m68hc11_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1355 struct reggroup
*group
)
1357 /* We must save the real hard register as well as gcc
1358 soft registers including the frame pointer. */
1359 if (group
== save_reggroup
|| group
== restore_reggroup
)
1361 return (regnum
<= gdbarch_num_regs (gdbarch
)
1362 || ((regnum
== SOFT_FP_REGNUM
1363 || regnum
== SOFT_TMP_REGNUM
1364 || regnum
== SOFT_ZS_REGNUM
1365 || regnum
== SOFT_XY_REGNUM
)
1366 && m68hc11_register_name (regnum
)));
1369 /* Group to identify gcc soft registers (d1..dN). */
1370 if (group
== m68hc11_soft_reggroup
)
1372 return regnum
>= SOFT_D1_REGNUM
&& m68hc11_register_name (regnum
);
1375 if (group
== m68hc11_hard_reggroup
)
1377 return regnum
== HARD_PC_REGNUM
|| regnum
== HARD_SP_REGNUM
1378 || regnum
== HARD_X_REGNUM
|| regnum
== HARD_D_REGNUM
1379 || regnum
== HARD_Y_REGNUM
|| regnum
== HARD_CCR_REGNUM
;
1381 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1384 static struct gdbarch
*
1385 m68hc11_gdbarch_init (struct gdbarch_info info
,
1386 struct gdbarch_list
*arches
)
1388 static LONGEST m68hc11_call_dummy_words
[] =
1390 struct gdbarch
*gdbarch
;
1391 struct gdbarch_tdep
*tdep
;
1394 soft_reg_initialized
= 0;
1396 /* Extract the elf_flags if available. */
1397 if (info
.abfd
!= NULL
1398 && bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
1399 elf_flags
= elf_elfheader (info
.abfd
)->e_flags
;
1403 /* try to find a pre-existing architecture */
1404 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1406 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
1408 if (gdbarch_tdep (arches
->gdbarch
)->elf_flags
!= elf_flags
)
1411 return arches
->gdbarch
;
1414 /* Need a new architecture. Fill in a target specific vector. */
1415 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
1416 gdbarch
= gdbarch_alloc (&info
, tdep
);
1417 tdep
->elf_flags
= elf_flags
;
1419 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1420 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1421 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
1423 switch (info
.bfd_arch_info
->arch
)
1425 case bfd_arch_m68hc11
:
1426 tdep
->stack_correction
= 1;
1427 tdep
->use_page_register
= 0;
1428 tdep
->prologue
= m6811_prologue
;
1429 set_gdbarch_addr_bit (gdbarch
, 16);
1430 set_gdbarch_num_pseudo_regs (gdbarch
, M68HC11_NUM_PSEUDO_REGS
);
1431 set_gdbarch_pc_regnum (gdbarch
, HARD_PC_REGNUM
);
1432 set_gdbarch_num_regs (gdbarch
, M68HC11_NUM_REGS
);
1435 case bfd_arch_m68hc12
:
1436 tdep
->stack_correction
= 0;
1437 tdep
->use_page_register
= elf_flags
& E_M68HC12_BANKS
;
1438 tdep
->prologue
= m6812_prologue
;
1439 set_gdbarch_addr_bit (gdbarch
, elf_flags
& E_M68HC12_BANKS
? 32 : 16);
1440 set_gdbarch_num_pseudo_regs (gdbarch
,
1441 elf_flags
& E_M68HC12_BANKS
1442 ? M68HC12_NUM_PSEUDO_REGS
1443 : M68HC11_NUM_PSEUDO_REGS
);
1444 set_gdbarch_pc_regnum (gdbarch
, elf_flags
& E_M68HC12_BANKS
1445 ? M68HC12_HARD_PC_REGNUM
: HARD_PC_REGNUM
);
1446 set_gdbarch_num_regs (gdbarch
, elf_flags
& E_M68HC12_BANKS
1447 ? M68HC12_NUM_REGS
: M68HC11_NUM_REGS
);
1454 /* Initially set everything according to the ABI.
1455 Use 16-bit integers since it will be the case for most
1456 programs. The size of these types should normally be set
1457 according to the dwarf2 debug information. */
1458 set_gdbarch_short_bit (gdbarch
, 16);
1459 set_gdbarch_int_bit (gdbarch
, elf_flags
& E_M68HC11_I32
? 32 : 16);
1460 set_gdbarch_float_bit (gdbarch
, 32);
1461 set_gdbarch_double_bit (gdbarch
, elf_flags
& E_M68HC11_F64
? 64 : 32);
1462 set_gdbarch_long_double_bit (gdbarch
, 64);
1463 set_gdbarch_long_bit (gdbarch
, 32);
1464 set_gdbarch_ptr_bit (gdbarch
, 16);
1465 set_gdbarch_long_long_bit (gdbarch
, 64);
1467 /* Characters are unsigned. */
1468 set_gdbarch_char_signed (gdbarch
, 0);
1470 /* Set register info. */
1471 set_gdbarch_fp0_regnum (gdbarch
, -1);
1472 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, m68hc11_frame_init_saved_regs
);
1473 set_gdbarch_frame_args_skip (gdbarch
, 0);
1475 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
1476 set_gdbarch_deprecated_dummy_write_sp (gdbarch
, deprecated_write_sp
);
1478 set_gdbarch_sp_regnum (gdbarch
, HARD_SP_REGNUM
);
1479 set_gdbarch_deprecated_fp_regnum (gdbarch
, SOFT_FP_REGNUM
);
1480 set_gdbarch_register_name (gdbarch
, m68hc11_register_name
);
1481 set_gdbarch_register_type (gdbarch
, m68hc11_register_type
);
1482 set_gdbarch_pseudo_register_read (gdbarch
, m68hc11_pseudo_register_read
);
1483 set_gdbarch_pseudo_register_write (gdbarch
, m68hc11_pseudo_register_write
);
1485 set_gdbarch_deprecated_call_dummy_words (gdbarch
, m68hc11_call_dummy_words
);
1486 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch
, sizeof (m68hc11_call_dummy_words
));
1487 set_gdbarch_deprecated_get_saved_register (gdbarch
, deprecated_generic_get_saved_register
);
1488 set_gdbarch_extract_return_value (gdbarch
, m68hc11_extract_return_value
);
1489 set_gdbarch_deprecated_push_arguments (gdbarch
, m68hc11_push_arguments
);
1490 set_gdbarch_deprecated_push_return_address (gdbarch
, m68hc11_push_return_address
);
1491 set_gdbarch_return_value_on_stack (gdbarch
, m68hc11_return_value_on_stack
);
1493 set_gdbarch_deprecated_store_struct_return (gdbarch
, m68hc11_store_struct_return
);
1494 set_gdbarch_store_return_value (gdbarch
, m68hc11_store_return_value
);
1495 set_gdbarch_extract_struct_value_address (gdbarch
, m68hc11_extract_struct_value_address
);
1497 set_gdbarch_deprecated_frame_chain (gdbarch
, m68hc11_frame_chain
);
1498 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, m68hc11_frame_saved_pc
);
1499 set_gdbarch_deprecated_frame_args_address (gdbarch
, m68hc11_frame_args_address
);
1500 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, m68hc11_saved_pc_after_call
);
1502 set_gdbarch_deprecated_get_saved_register (gdbarch
, deprecated_generic_get_saved_register
);
1504 set_gdbarch_deprecated_store_struct_return (gdbarch
, m68hc11_store_struct_return
);
1505 set_gdbarch_deprecated_store_return_value (gdbarch
, m68hc11_store_return_value
);
1506 set_gdbarch_deprecated_extract_struct_value_address
1507 (gdbarch
, m68hc11_extract_struct_value_address
);
1508 set_gdbarch_use_struct_convention (gdbarch
, m68hc11_use_struct_convention
);
1509 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, m68hc11_init_extra_frame_info
);
1510 set_gdbarch_deprecated_pop_frame (gdbarch
, m68hc11_pop_frame
);
1511 set_gdbarch_skip_prologue (gdbarch
, m68hc11_skip_prologue
);
1512 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1513 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
1514 set_gdbarch_function_start_offset (gdbarch
, 0);
1515 set_gdbarch_breakpoint_from_pc (gdbarch
, m68hc11_breakpoint_from_pc
);
1516 set_gdbarch_stack_align (gdbarch
, m68hc11_stack_align
);
1517 set_gdbarch_deprecated_extra_stack_alignment_needed (gdbarch
, 1);
1518 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_m68hc11
);
1520 m68hc11_add_reggroups (gdbarch
);
1521 set_gdbarch_register_reggroup_p (gdbarch
, m68hc11_register_reggroup_p
);
1522 set_gdbarch_print_registers_info (gdbarch
, m68hc11_print_registers_info
);
1524 /* Minsymbol frobbing. */
1525 set_gdbarch_elf_make_msymbol_special (gdbarch
,
1526 m68hc11_elf_make_msymbol_special
);
1528 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
1533 extern initialize_file_ftype _initialize_m68hc11_tdep
; /* -Wmissing-prototypes */
1536 _initialize_m68hc11_tdep (void)
1538 register_gdbarch_init (bfd_arch_m68hc11
, m68hc11_gdbarch_init
);
1539 register_gdbarch_init (bfd_arch_m68hc12
, m68hc11_gdbarch_init
);
1540 m68hc11_init_reggroups ();
1542 deprecate_cmd (add_com ("regs", class_vars
, show_regs
,
1543 "Print all registers"),