gdb/mips-linux-nat.c

   1 /* Native-dependent code for GNU/Linux on MIPS processors.
   2
   3    Copyright (C) 2001-2014 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "defs.h"
  21 #include "command.h"
  22 #include "gdbcmd.h"
  23 #include "inferior.h"
  24 #include "mips-tdep.h"
  25 #include "target.h"
  26 #include "regcache.h"
  27 #include "linux-nat.h"
  28 #include "mips-linux-tdep.h"
  29 #include "target-descriptions.h"
  30
  31 #include "gdb_proc_service.h"
  32 #include "gregset.h"
  33
  34 #include <sgidefs.h>
  35 #include <sys/ptrace.h>
  36 #include <asm/ptrace.h>
  37
  38 #include "nat/mips-linux-watch.h"
  39
  40 #include "features/mips-linux.c"
  41 #include "features/mips-dsp-linux.c"
  42 #include "features/mips64-linux.c"
  43 #include "features/mips64-dsp-linux.c"
  44
  45 #ifndef PTRACE_GET_THREAD_AREA
  46 #define PTRACE_GET_THREAD_AREA 25
  47 #endif
  48
  49 /* Assume that we have PTRACE_GETREGS et al. support.  If we do not,
  50    we'll clear this and use PTRACE_PEEKUSER instead.  */
  51 static int have_ptrace_regsets = 1;
  52
  53 /* Whether or not to print the mirrored debug registers.  */
  54
  55 static int maint_show_dr;
  56
  57 /* Saved function pointers to fetch and store a single register using
  58    PTRACE_PEEKUSER and PTRACE_POKEUSER.  */
  59
  60 static void (*super_fetch_registers) (struct target_ops *,
  61                                       struct regcache *, int);
  62 static void (*super_store_registers) (struct target_ops *,
  63                                       struct regcache *, int);
  64
  65 static void (*super_close) (struct target_ops *);
  66
  67 /* Map gdb internal register number to ptrace ``address''.
  68    These ``addresses'' are normally defined in <asm/ptrace.h>.
  69
  70    ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
  71    and there's no point in reading or setting MIPS_ZERO_REGNUM.
  72    We also can not set BADVADDR, CAUSE, or FCRIR via ptrace().  */
  73
  74 static CORE_ADDR
  75 mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
  76 {
  77   CORE_ADDR regaddr;
  78
  79   if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
  80     error (_("Bogon register number %d."), regno);
  81
  82   if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
  83     regaddr = regno;
  84   else if ((regno >= mips_regnum (gdbarch)->fp0)
  85            && (regno < mips_regnum (gdbarch)->fp0 + 32))
  86     regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
  87   else if (regno == mips_regnum (gdbarch)->pc)
  88     regaddr = PC;
  89   else if (regno == mips_regnum (gdbarch)->cause)
  90     regaddr = store? (CORE_ADDR) -1 : CAUSE;
  91   else if (regno == mips_regnum (gdbarch)->badvaddr)
  92     regaddr = store? (CORE_ADDR) -1 : BADVADDR;
  93   else if (regno == mips_regnum (gdbarch)->lo)
  94     regaddr = MMLO;
  95   else if (regno == mips_regnum (gdbarch)->hi)
  96     regaddr = MMHI;
  97   else if (regno == mips_regnum (gdbarch)->fp_control_status)
  98     regaddr = FPC_CSR;
  99   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
 100     regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
 101   else if (mips_regnum (gdbarch)->dspacc != -1
 102            && regno >= mips_regnum (gdbarch)->dspacc
 103            && regno < mips_regnum (gdbarch)->dspacc + 6)
 104     regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
 105   else if (regno == mips_regnum (gdbarch)->dspctl)
 106     regaddr = DSP_CONTROL;
 107   else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
 108     regaddr = 0;
 109   else
 110     regaddr = (CORE_ADDR) -1;
 111
 112   return regaddr;
 113 }
 114
 115 static CORE_ADDR
 116 mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
 117 {
 118   CORE_ADDR regaddr;
 119
 120   if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
 121     error (_("Bogon register number %d."), regno);
 122
 123   if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
 124     regaddr = regno;
 125   else if ((regno >= mips_regnum (gdbarch)->fp0)
 126            && (regno < mips_regnum (gdbarch)->fp0 + 32))
 127     regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (gdbarch));
 128   else if (regno == mips_regnum (gdbarch)->pc)
 129     regaddr = MIPS64_PC;
 130   else if (regno == mips_regnum (gdbarch)->cause)
 131     regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
 132   else if (regno == mips_regnum (gdbarch)->badvaddr)
 133     regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
 134   else if (regno == mips_regnum (gdbarch)->lo)
 135     regaddr = MIPS64_MMLO;
 136   else if (regno == mips_regnum (gdbarch)->hi)
 137     regaddr = MIPS64_MMHI;
 138   else if (regno == mips_regnum (gdbarch)->fp_control_status)
 139     regaddr = MIPS64_FPC_CSR;
 140   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
 141     regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
 142   else if (mips_regnum (gdbarch)->dspacc != -1
 143            && regno >= mips_regnum (gdbarch)->dspacc
 144            && regno < mips_regnum (gdbarch)->dspacc + 6)
 145     regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
 146   else if (regno == mips_regnum (gdbarch)->dspctl)
 147     regaddr = DSP_CONTROL;
 148   else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
 149     regaddr = 0;
 150   else
 151     regaddr = (CORE_ADDR) -1;
 152
 153   return regaddr;
 154 }
 155
 156 /* Fetch the thread-local storage pointer for libthread_db.  */
 157
 158 ps_err_e
 159 ps_get_thread_area (const struct ps_prochandle *ph,
 160                     lwpid_t lwpid, int idx, void **base)
 161 {
 162   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 163     return PS_ERR;
 164
 165   /* IDX is the bias from the thread pointer to the beginning of the
 166      thread descriptor.  It has to be subtracted due to implementation
 167      quirks in libthread_db.  */
 168   *base = (void *) ((char *)*base - idx);
 169
 170   return PS_OK;
 171 }
 172
 173 /* Wrapper functions.  These are only used by libthread_db.  */
 174
 175 void
 176 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 177 {
 178   if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
 179     mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp);
 180   else
 181     mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp);
 182 }
 183
 184 void
 185 fill_gregset (const struct regcache *regcache,
 186               gdb_gregset_t *gregsetp, int regno)
 187 {
 188   if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
 189     mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno);
 190   else
 191     mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno);
 192 }
 193
 194 void
 195 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 196 {
 197   if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
 198     mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp);
 199   else
 200     mips64_supply_fpregset (regcache,
 201                             (const mips64_elf_fpregset_t *) fpregsetp);
 202 }
 203
 204 void
 205 fill_fpregset (const struct regcache *regcache,
 206                gdb_fpregset_t *fpregsetp, int regno)
 207 {
 208   if (mips_isa_regsize (get_regcache_arch (regcache)) == 4)
 209     mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno);
 210   else
 211     mips64_fill_fpregset (regcache,
 212                           (mips64_elf_fpregset_t *) fpregsetp, regno);
 213 }
 214
 215
 216 /* Fetch REGNO (or all registers if REGNO == -1) from the target
 217    using PTRACE_GETREGS et al.  */
 218
 219 static void
 220 mips64_linux_regsets_fetch_registers (struct target_ops *ops,
 221                                       struct regcache *regcache, int regno)
 222 {
 223   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 224   int is_fp, is_dsp;
 225   int have_dsp;
 226   int regi;
 227   int tid;
 228
 229   if (regno >= mips_regnum (gdbarch)->fp0
 230       && regno <= mips_regnum (gdbarch)->fp0 + 32)
 231     is_fp = 1;
 232   else if (regno == mips_regnum (gdbarch)->fp_control_status)
 233     is_fp = 1;
 234   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
 235     is_fp = 1;
 236   else
 237     is_fp = 0;
 238
 239   /* DSP registers are optional and not a part of any set.  */
 240   have_dsp = mips_regnum (gdbarch)->dspctl != -1;
 241   if (!have_dsp)
 242     is_dsp = 0;
 243   else if (regno >= mips_regnum (gdbarch)->dspacc
 244       && regno < mips_regnum (gdbarch)->dspacc + 6)
 245     is_dsp = 1;
 246   else if (regno == mips_regnum (gdbarch)->dspctl)
 247     is_dsp = 1;
 248   else
 249     is_dsp = 0;
 250
 251   tid = ptid_get_lwp (inferior_ptid);
 252   if (tid == 0)
 253     tid = ptid_get_pid (inferior_ptid);
 254
 255   if (regno == -1 || (!is_fp && !is_dsp))
 256     {
 257       mips64_elf_gregset_t regs;
 258
 259       if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
 260         {
 261           if (errno == EIO)
 262             {
 263               have_ptrace_regsets = 0;
 264               return;
 265             }
 266           perror_with_name (_("Couldn't get registers"));
 267         }
 268
 269       mips64_supply_gregset (regcache,
 270                              (const mips64_elf_gregset_t *) &regs);
 271     }
 272
 273   if (regno == -1 || is_fp)
 274     {
 275       mips64_elf_fpregset_t fp_regs;
 276
 277       if (ptrace (PTRACE_GETFPREGS, tid, 0L,
 278                   (PTRACE_TYPE_ARG3) &fp_regs) == -1)
 279         {
 280           if (errno == EIO)
 281             {
 282               have_ptrace_regsets = 0;
 283               return;
 284             }
 285           perror_with_name (_("Couldn't get FP registers"));
 286         }
 287
 288       mips64_supply_fpregset (regcache,
 289                               (const mips64_elf_fpregset_t *) &fp_regs);
 290     }
 291
 292   if (is_dsp)
 293     super_fetch_registers (ops, regcache, regno);
 294   else if (regno == -1 && have_dsp)
 295     {
 296       for (regi = mips_regnum (gdbarch)->dspacc;
 297            regi < mips_regnum (gdbarch)->dspacc + 6;
 298            regi++)
 299         super_fetch_registers (ops, regcache, regi);
 300       super_fetch_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
 301     }
 302 }
 303
 304 /* Store REGNO (or all registers if REGNO == -1) to the target
 305    using PTRACE_SETREGS et al.  */
 306
 307 static void
 308 mips64_linux_regsets_store_registers (struct target_ops *ops,
 309                                       struct regcache *regcache, int regno)
 310 {
 311   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 312   int is_fp, is_dsp;
 313   int have_dsp;
 314   int regi;
 315   int tid;
 316
 317   if (regno >= mips_regnum (gdbarch)->fp0
 318       && regno <= mips_regnum (gdbarch)->fp0 + 32)
 319     is_fp = 1;
 320   else if (regno == mips_regnum (gdbarch)->fp_control_status)
 321     is_fp = 1;
 322   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
 323     is_fp = 1;
 324   else
 325     is_fp = 0;
 326
 327   /* DSP registers are optional and not a part of any set.  */
 328   have_dsp = mips_regnum (gdbarch)->dspctl != -1;
 329   if (!have_dsp)
 330     is_dsp = 0;
 331   else if (regno >= mips_regnum (gdbarch)->dspacc
 332       && regno < mips_regnum (gdbarch)->dspacc + 6)
 333     is_dsp = 1;
 334   else if (regno == mips_regnum (gdbarch)->dspctl)
 335     is_dsp = 1;
 336   else
 337     is_dsp = 0;
 338
 339   tid = ptid_get_lwp (inferior_ptid);
 340   if (tid == 0)
 341     tid = ptid_get_pid (inferior_ptid);
 342
 343   if (regno == -1 || (!is_fp && !is_dsp))
 344     {
 345       mips64_elf_gregset_t regs;
 346
 347       if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
 348         perror_with_name (_("Couldn't get registers"));
 349
 350       mips64_fill_gregset (regcache, &regs, regno);
 351
 352       if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
 353         perror_with_name (_("Couldn't set registers"));
 354     }
 355
 356   if (regno == -1 || is_fp)
 357     {
 358       mips64_elf_fpregset_t fp_regs;
 359
 360       if (ptrace (PTRACE_GETFPREGS, tid, 0L,
 361                   (PTRACE_TYPE_ARG3) &fp_regs) == -1)
 362         perror_with_name (_("Couldn't get FP registers"));
 363
 364       mips64_fill_fpregset (regcache, &fp_regs, regno);
 365
 366       if (ptrace (PTRACE_SETFPREGS, tid, 0L,
 367                   (PTRACE_TYPE_ARG3) &fp_regs) == -1)
 368         perror_with_name (_("Couldn't set FP registers"));
 369     }
 370
 371   if (is_dsp)
 372     super_store_registers (ops, regcache, regno);
 373   else if (regno == -1 && have_dsp)
 374     {
 375       for (regi = mips_regnum (gdbarch)->dspacc;
 376            regi < mips_regnum (gdbarch)->dspacc + 6;
 377            regi++)
 378         super_store_registers (ops, regcache, regi);
 379       super_store_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
 380     }
 381 }
 382
 383 /* Fetch REGNO (or all registers if REGNO == -1) from the target
 384    using any working method.  */
 385
 386 static void
 387 mips64_linux_fetch_registers (struct target_ops *ops,
 388                               struct regcache *regcache, int regnum)
 389 {
 390   /* Unless we already know that PTRACE_GETREGS does not work, try it.  */
 391   if (have_ptrace_regsets)
 392     mips64_linux_regsets_fetch_registers (ops, regcache, regnum);
 393
 394   /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
 395      back to PTRACE_PEEKUSER.  */
 396   if (!have_ptrace_regsets)
 397     super_fetch_registers (ops, regcache, regnum);
 398 }
 399
 400 /* Store REGNO (or all registers if REGNO == -1) to the target
 401    using any working method.  */
 402
 403 static void
 404 mips64_linux_store_registers (struct target_ops *ops,
 405                               struct regcache *regcache, int regnum)
 406 {
 407   /* Unless we already know that PTRACE_GETREGS does not work, try it.  */
 408   if (have_ptrace_regsets)
 409     mips64_linux_regsets_store_registers (ops, regcache, regnum);
 410
 411   /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
 412      back to PTRACE_PEEKUSER.  */
 413   if (!have_ptrace_regsets)
 414     super_store_registers (ops, regcache, regnum);
 415 }
 416
 417 /* Return the address in the core dump or inferior of register
 418    REGNO.  */
 419
 420 static CORE_ADDR
 421 mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
 422 {
 423   if (mips_abi_regsize (gdbarch) == 8)
 424     return mips64_linux_register_addr (gdbarch, regno, store_p);
 425   else
 426     return mips_linux_register_addr (gdbarch, regno, store_p);
 427 }
 428
 429 static const struct target_desc *
 430 mips_linux_read_description (struct target_ops *ops)
 431 {
 432   static int have_dsp = -1;
 433
 434   if (have_dsp < 0)
 435     {
 436       int tid;
 437
 438       tid = ptid_get_lwp (inferior_ptid);
 439       if (tid == 0)
 440         tid = ptid_get_pid (inferior_ptid);
 441
 442       ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0);
 443       switch (errno)
 444         {
 445         case 0:
 446           have_dsp = 1;
 447           break;
 448         case EIO:
 449           have_dsp = 0;
 450           break;
 451         default:
 452           perror_with_name (_("Couldn't check DSP support"));
 453           break;
 454         }
 455     }
 456
 457   /* Report that target registers are a size we know for sure
 458      that we can get from ptrace.  */
 459   if (_MIPS_SIM == _ABIO32)
 460     return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
 461   else
 462     return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux;
 463 }
 464
 465 /* -1 if the kernel and/or CPU do not support watch registers.
 466     1 if watch_readback is valid and we can read style, num_valid
 467       and the masks.
 468     0 if we need to read the watch_readback.  */
 469
 470 static int watch_readback_valid;
 471
 472 /* Cached watch register read values.  */
 473
 474 static struct pt_watch_regs watch_readback;
 475
 476 static struct mips_watchpoint *current_watches;
 477
 478 /*  The current set of watch register values for writing the
 479     registers.  */
 480
 481 static struct pt_watch_regs watch_mirror;
 482
 483 static void
 484 mips_show_dr (const char *func, CORE_ADDR addr,
 485               int len, enum target_hw_bp_type type)
 486 {
 487   int i;
 488
 489   puts_unfiltered (func);
 490   if (addr || len)
 491     printf_unfiltered (" (addr=%s, len=%d, type=%s)",
 492                        paddress (target_gdbarch (), addr), len,
 493                        type == hw_write ? "data-write"
 494                        : (type == hw_read ? "data-read"
 495                           : (type == hw_access ? "data-read/write"
 496                              : (type == hw_execute ? "instruction-execute"
 497                                 : "??unknown??"))));
 498   puts_unfiltered (":\n");
 499
 500   for (i = 0; i < MAX_DEBUG_REGISTER; i++)
 501     printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i,
 502                        paddress (target_gdbarch (),
 503                                  mips_linux_watch_get_watchlo (&watch_mirror,
 504                                                                i)),
 505                        paddress (target_gdbarch (),
 506                                  mips_linux_watch_get_watchhi (&watch_mirror,
 507                                                                i)));
 508 }
 509
 510 /* Target to_can_use_hw_breakpoint implementation.  Return 1 if we can
 511    handle the specified watch type.  */
 512
 513 static int
 514 mips_linux_can_use_hw_breakpoint (struct target_ops *self,
 515                                   int type, int cnt, int ot)
 516 {
 517   int i;
 518   uint32_t wanted_mask, irw_mask;
 519
 520   if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
 521                                         &watch_readback,
 522                                         &watch_readback_valid, 0))
 523     return 0;
 524
 525    switch (type)
 526     {
 527     case bp_hardware_watchpoint:
 528       wanted_mask = W_MASK;
 529       break;
 530     case bp_read_watchpoint:
 531       wanted_mask = R_MASK;
 532       break;
 533     case bp_access_watchpoint:
 534       wanted_mask = R_MASK | W_MASK;
 535       break;
 536     default:
 537       return 0;
 538     }
 539
 540   for (i = 0;
 541        i < mips_linux_watch_get_num_valid (&watch_readback) && cnt;
 542        i++)
 543     {
 544       irw_mask = mips_linux_watch_get_irw_mask (&watch_readback, i);
 545       if ((irw_mask & wanted_mask) == wanted_mask)
 546         cnt--;
 547     }
 548   return (cnt == 0) ? 1 : 0;
 549 }
 550
 551 /* Target to_stopped_by_watchpoint implementation.  Return 1 if
 552    stopped by watchpoint.  The watchhi R and W bits indicate the watch
 553    register triggered.  */
 554
 555 static int
 556 mips_linux_stopped_by_watchpoint (struct target_ops *ops)
 557 {
 558   int n;
 559   int num_valid;
 560
 561   if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
 562                                         &watch_readback,
 563                                         &watch_readback_valid, 1))
 564     return 0;
 565
 566   num_valid = mips_linux_watch_get_num_valid (&watch_readback);
 567
 568   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 569     if (mips_linux_watch_get_watchhi (&watch_readback, n) & (R_MASK | W_MASK))
 570       return 1;
 571
 572   return 0;
 573 }
 574
 575 /* Target to_stopped_data_address implementation.  Set the address
 576    where the watch triggered (if known).  Return 1 if the address was
 577    known.  */
 578
 579 static int
 580 mips_linux_stopped_data_address (struct target_ops *t, CORE_ADDR *paddr)
 581 {
 582   /* On mips we don't know the low order 3 bits of the data address,
 583      so we must return false.  */
 584   return 0;
 585 }
 586
 587 /* Target to_region_ok_for_hw_watchpoint implementation.  Return 1 if
 588    the specified region can be covered by the watch registers.  */
 589
 590 static int
 591 mips_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
 592                                         CORE_ADDR addr, int len)
 593 {
 594   struct pt_watch_regs dummy_regs;
 595   int i;
 596
 597   if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
 598                                         &watch_readback,
 599                                         &watch_readback_valid, 0))
 600     return 0;
 601
 602   dummy_regs = watch_readback;
 603   /* Clear them out.  */
 604   for (i = 0; i < mips_linux_watch_get_num_valid (&dummy_regs); i++)
 605     mips_linux_watch_set_watchlo (&dummy_regs, i, 0);
 606   return mips_linux_watch_try_one_watch (&dummy_regs, addr, len, 0);
 607 }
 608
 609 /* Write the mirrored watch register values for each thread.  */
 610
 611 static int
 612 write_watchpoint_regs (void)
 613 {
 614   struct lwp_info *lp;
 615   int tid;
 616
 617   ALL_LWPS (lp)
 618     {
 619       tid = ptid_get_lwp (lp->ptid);
 620       if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror) == -1)
 621         perror_with_name (_("Couldn't write debug register"));
 622     }
 623   return 0;
 624 }
 625
 626 /* linux_nat new_thread implementation.  Write the mirrored watch
 627  register values for the new thread.  */
 628
 629 static void
 630 mips_linux_new_thread (struct lwp_info *lp)
 631 {
 632   int tid;
 633
 634   if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
 635                                         &watch_readback,
 636                                         &watch_readback_valid, 0))
 637     return;
 638
 639   tid = ptid_get_lwp (lp->ptid);
 640   if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror) == -1)
 641     perror_with_name (_("Couldn't write debug register"));
 642 }
 643
 644 /* Target to_insert_watchpoint implementation.  Try to insert a new
 645    watch.  Return zero on success.  */
 646
 647 static int
 648 mips_linux_insert_watchpoint (struct target_ops *self,
 649                               CORE_ADDR addr, int len, int type,
 650                               struct expression *cond)
 651 {
 652   struct pt_watch_regs regs;
 653   struct mips_watchpoint *new_watch;
 654   struct mips_watchpoint **pw;
 655
 656   int i;
 657   int retval;
 658
 659   if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
 660                                         &watch_readback,
 661                                         &watch_readback_valid, 0))
 662     return -1;
 663
 664   if (len <= 0)
 665     return -1;
 666
 667   regs = watch_readback;
 668   /* Add the current watches.  */
 669   mips_linux_watch_populate_regs (current_watches, &regs);
 670
 671   /* Now try to add the new watch.  */
 672   if (!mips_linux_watch_try_one_watch (&regs, addr, len,
 673                                        mips_linux_watch_type_to_irw (type)))
 674     return -1;
 675
 676   /* It fit.  Stick it on the end of the list.  */
 677   new_watch = (struct mips_watchpoint *)
 678     xmalloc (sizeof (struct mips_watchpoint));
 679   new_watch->addr = addr;
 680   new_watch->len = len;
 681   new_watch->type = type;
 682   new_watch->next = NULL;
 683
 684   pw = &current_watches;
 685   while (*pw != NULL)
 686     pw = &(*pw)->next;
 687   *pw = new_watch;
 688
 689   watch_mirror = regs;
 690   retval = write_watchpoint_regs ();
 691
 692   if (maint_show_dr)
 693     mips_show_dr ("insert_watchpoint", addr, len, type);
 694
 695   return retval;
 696 }
 697
 698 /* Target to_remove_watchpoint implementation.  Try to remove a watch.
 699    Return zero on success.  */
 700
 701 static int
 702 mips_linux_remove_watchpoint (struct target_ops *self,
 703                               CORE_ADDR addr, int len, int type,
 704                               struct expression *cond)
 705 {
 706   int retval;
 707   int deleted_one;
 708
 709   struct mips_watchpoint **pw;
 710   struct mips_watchpoint *w;
 711
 712   /* Search for a known watch that matches.  Then unlink and free
 713      it.  */
 714   deleted_one = 0;
 715   pw = &current_watches;
 716   while ((w = *pw))
 717     {
 718       if (w->addr == addr && w->len == len && w->type == type)
 719         {
 720           *pw = w->next;
 721           xfree (w);
 722           deleted_one = 1;
 723           break;
 724         }
 725       pw = &(w->next);
 726     }
 727
 728   if (!deleted_one)
 729     return -1;  /* We don't know about it, fail doing nothing.  */
 730
 731   /* At this point watch_readback is known to be valid because we
 732      could not have added the watch without reading it.  */
 733   gdb_assert (watch_readback_valid == 1);
 734
 735   watch_mirror = watch_readback;
 736   mips_linux_watch_populate_regs (current_watches, &watch_mirror);
 737
 738   retval = write_watchpoint_regs ();
 739
 740   if (maint_show_dr)
 741     mips_show_dr ("remove_watchpoint", addr, len, type);
 742
 743   return retval;
 744 }
 745
 746 /* Target to_close implementation.  Free any watches and call the
 747    super implementation.  */
 748
 749 static void
 750 mips_linux_close (struct target_ops *self)
 751 {
 752   struct mips_watchpoint *w;
 753   struct mips_watchpoint *nw;
 754
 755   /* Clean out the current_watches list.  */
 756   w = current_watches;
 757   while (w)
 758     {
 759       nw = w->next;
 760       xfree (w);
 761       w = nw;
 762     }
 763   current_watches = NULL;
 764
 765   if (super_close)
 766     super_close (self);
 767 }
 768
 769 void _initialize_mips_linux_nat (void);
 770
 771 void
 772 _initialize_mips_linux_nat (void)
 773 {
 774   struct target_ops *t;
 775
 776   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
 777                            &maint_show_dr, _("\
 778 Set whether to show variables that mirror the mips debug registers."), _("\
 779 Show whether to show variables that mirror the mips debug registers."), _("\
 780 Use \"on\" to enable, \"off\" to disable.\n\
 781 If enabled, the debug registers values are shown when GDB inserts\n\
 782 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
 783 triggers a breakpoint or watchpoint."),
 784                            NULL,
 785                            NULL,
 786                            &maintenance_set_cmdlist,
 787                            &maintenance_show_cmdlist);
 788
 789   t = linux_trad_target (mips_linux_register_u_offset);
 790
 791   super_close = t->to_close;
 792   t->to_close = mips_linux_close;
 793
 794   super_fetch_registers = t->to_fetch_registers;
 795   super_store_registers = t->to_store_registers;
 796
 797   t->to_fetch_registers = mips64_linux_fetch_registers;
 798   t->to_store_registers = mips64_linux_store_registers;
 799
 800   t->to_can_use_hw_breakpoint = mips_linux_can_use_hw_breakpoint;
 801   t->to_remove_watchpoint = mips_linux_remove_watchpoint;
 802   t->to_insert_watchpoint = mips_linux_insert_watchpoint;
 803   t->to_stopped_by_watchpoint = mips_linux_stopped_by_watchpoint;
 804   t->to_stopped_data_address = mips_linux_stopped_data_address;
 805   t->to_region_ok_for_hw_watchpoint = mips_linux_region_ok_for_hw_watchpoint;
 806
 807   t->to_read_description = mips_linux_read_description;
 808
 809   linux_nat_add_target (t);
 810   linux_nat_set_new_thread (t, mips_linux_new_thread);
 811
 812   /* Initialize the standard target descriptions.  */
 813   initialize_tdesc_mips_linux ();
 814   initialize_tdesc_mips_dsp_linux ();
 815   initialize_tdesc_mips64_linux ();
 816   initialize_tdesc_mips64_dsp_linux ();
 817 }