gdb/mips-linux-nat.c

   1 /* Native-dependent code for GNU/Linux on MIPS processors.
   2
   3    Copyright (C) 2001-2018 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "defs.h"
  21 #include "command.h"
  22 #include "gdbcmd.h"
  23 #include "inferior.h"
  24 #include "mips-tdep.h"
  25 #include "target.h"
  26 #include "regcache.h"
  27 #include "linux-nat-trad.h"
  28 #include "mips-linux-tdep.h"
  29 #include "target-descriptions.h"
  30
  31 #include "gdb_proc_service.h"
  32 #include "gregset.h"
  33
  34 #include <sgidefs.h>
  35 #include "nat/gdb_ptrace.h"
  36 #include <asm/ptrace.h>
  37 #include "inf-ptrace.h"
  38
  39 #include "nat/mips-linux-watch.h"
  40
  41 #ifndef PTRACE_GET_THREAD_AREA
  42 #define PTRACE_GET_THREAD_AREA 25
  43 #endif
  44
  45 class mips_linux_nat_target final : public linux_nat_trad_target
  46 {
  47 public:
  48   /* Add our register access methods.  */
  49   void fetch_registers (struct regcache *, int) override;
  50   void store_registers (struct regcache *, int) override;
  51
  52   void close () override;
  53
  54   int can_use_hw_breakpoint (enum bptype, int, int) override;
  55
  56   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  57                          struct expression *) override;
  58
  59   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  60                          struct expression *) override;
  61
  62   int stopped_by_watchpoint () override;
  63
  64   int stopped_data_address (CORE_ADDR *) override;
  65
  66   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  67
  68   const struct target_desc *read_description () override;
  69
  70 protected:
  71   /* Override linux_nat_trad_target methods.  */
  72   CORE_ADDR register_u_offset (struct gdbarch *gdbarch,
  73                                int regno, int store_p) override;
  74
  75 private:
  76   /* Helpers.  See definitions.  */
  77   void mips64_regsets_store_registers (struct regcache *regcache,
  78                                        int regno);
  79   void mips64_regsets_fetch_registers (struct regcache *regcache,
  80                                        int regno);
  81 };
  82
  83 static mips_linux_nat_target the_mips_linux_nat_target;
  84
  85 /* Assume that we have PTRACE_GETREGS et al. support.  If we do not,
  86    we'll clear this and use PTRACE_PEEKUSER instead.  */
  87 static int have_ptrace_regsets = 1;
  88
  89 /* Map gdb internal register number to ptrace ``address''.
  90    These ``addresses'' are normally defined in <asm/ptrace.h>.
  91
  92    ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
  93    and there's no point in reading or setting MIPS_ZERO_REGNUM.
  94    We also can not set BADVADDR, CAUSE, or FCRIR via ptrace().  */
  95
  96 static CORE_ADDR
  97 mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
  98 {
  99   CORE_ADDR regaddr;
 100
 101   if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
 102     error (_("Bogon register number %d."), regno);
 103
 104   if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
 105     regaddr = regno;
 106   else if ((regno >= mips_regnum (gdbarch)->fp0)
 107            && (regno < mips_regnum (gdbarch)->fp0 + 32))
 108     regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
 109   else if (regno == mips_regnum (gdbarch)->pc)
 110     regaddr = PC;
 111   else if (regno == mips_regnum (gdbarch)->cause)
 112     regaddr = store? (CORE_ADDR) -1 : CAUSE;
 113   else if (regno == mips_regnum (gdbarch)->badvaddr)
 114     regaddr = store? (CORE_ADDR) -1 : BADVADDR;
 115   else if (regno == mips_regnum (gdbarch)->lo)
 116     regaddr = MMLO;
 117   else if (regno == mips_regnum (gdbarch)->hi)
 118     regaddr = MMHI;
 119   else if (regno == mips_regnum (gdbarch)->fp_control_status)
 120     regaddr = FPC_CSR;
 121   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
 122     regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
 123   else if (mips_regnum (gdbarch)->dspacc != -1
 124            && regno >= mips_regnum (gdbarch)->dspacc
 125            && regno < mips_regnum (gdbarch)->dspacc + 6)
 126     regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
 127   else if (regno == mips_regnum (gdbarch)->dspctl)
 128     regaddr = DSP_CONTROL;
 129   else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
 130     regaddr = 0;
 131   else
 132     regaddr = (CORE_ADDR) -1;
 133
 134   return regaddr;
 135 }
 136
 137 static CORE_ADDR
 138 mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
 139 {
 140   CORE_ADDR regaddr;
 141
 142   if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
 143     error (_("Bogon register number %d."), regno);
 144
 145   if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
 146     regaddr = regno;
 147   else if ((regno >= mips_regnum (gdbarch)->fp0)
 148            && (regno < mips_regnum (gdbarch)->fp0 + 32))
 149     regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (gdbarch));
 150   else if (regno == mips_regnum (gdbarch)->pc)
 151     regaddr = MIPS64_PC;
 152   else if (regno == mips_regnum (gdbarch)->cause)
 153     regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
 154   else if (regno == mips_regnum (gdbarch)->badvaddr)
 155     regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
 156   else if (regno == mips_regnum (gdbarch)->lo)
 157     regaddr = MIPS64_MMLO;
 158   else if (regno == mips_regnum (gdbarch)->hi)
 159     regaddr = MIPS64_MMHI;
 160   else if (regno == mips_regnum (gdbarch)->fp_control_status)
 161     regaddr = MIPS64_FPC_CSR;
 162   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
 163     regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
 164   else if (mips_regnum (gdbarch)->dspacc != -1
 165            && regno >= mips_regnum (gdbarch)->dspacc
 166            && regno < mips_regnum (gdbarch)->dspacc + 6)
 167     regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
 168   else if (regno == mips_regnum (gdbarch)->dspctl)
 169     regaddr = DSP_CONTROL;
 170   else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
 171     regaddr = 0;
 172   else
 173     regaddr = (CORE_ADDR) -1;
 174
 175   return regaddr;
 176 }
 177
 178 /* Fetch the thread-local storage pointer for libthread_db.  */
 179
 180 ps_err_e
 181 ps_get_thread_area (struct ps_prochandle *ph,
 182                     lwpid_t lwpid, int idx, void **base)
 183 {
 184   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 185     return PS_ERR;
 186
 187   /* IDX is the bias from the thread pointer to the beginning of the
 188      thread descriptor.  It has to be subtracted due to implementation
 189      quirks in libthread_db.  */
 190   *base = (void *) ((char *)*base - idx);
 191
 192   return PS_OK;
 193 }
 194
 195 /* Wrapper functions.  These are only used by libthread_db.  */
 196
 197 void
 198 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 199 {
 200   if (mips_isa_regsize (regcache->arch ()) == 4)
 201     mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp);
 202   else
 203     mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp);
 204 }
 205
 206 void
 207 fill_gregset (const struct regcache *regcache,
 208               gdb_gregset_t *gregsetp, int regno)
 209 {
 210   if (mips_isa_regsize (regcache->arch ()) == 4)
 211     mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno);
 212   else
 213     mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno);
 214 }
 215
 216 void
 217 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 218 {
 219   if (mips_isa_regsize (regcache->arch ()) == 4)
 220     mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp);
 221   else
 222     mips64_supply_fpregset (regcache,
 223                             (const mips64_elf_fpregset_t *) fpregsetp);
 224 }
 225
 226 void
 227 fill_fpregset (const struct regcache *regcache,
 228                gdb_fpregset_t *fpregsetp, int regno)
 229 {
 230   if (mips_isa_regsize (regcache->arch ()) == 4)
 231     mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno);
 232   else
 233     mips64_fill_fpregset (regcache,
 234                           (mips64_elf_fpregset_t *) fpregsetp, regno);
 235 }
 236
 237
 238 /* Fetch REGNO (or all registers if REGNO == -1) from the target
 239    using PTRACE_GETREGS et al.  */
 240
 241 void
 242 mips_linux_nat_target::mips64_regsets_fetch_registers
 243   (struct regcache *regcache, int regno)
 244 {
 245   struct gdbarch *gdbarch = regcache->arch ();
 246   int is_fp, is_dsp;
 247   int have_dsp;
 248   int regi;
 249   int tid;
 250
 251   if (regno >= mips_regnum (gdbarch)->fp0
 252       && regno <= mips_regnum (gdbarch)->fp0 + 32)
 253     is_fp = 1;
 254   else if (regno == mips_regnum (gdbarch)->fp_control_status)
 255     is_fp = 1;
 256   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
 257     is_fp = 1;
 258   else
 259     is_fp = 0;
 260
 261   /* DSP registers are optional and not a part of any set.  */
 262   have_dsp = mips_regnum (gdbarch)->dspctl != -1;
 263   if (!have_dsp)
 264     is_dsp = 0;
 265   else if (regno >= mips_regnum (gdbarch)->dspacc
 266       && regno < mips_regnum (gdbarch)->dspacc + 6)
 267     is_dsp = 1;
 268   else if (regno == mips_regnum (gdbarch)->dspctl)
 269     is_dsp = 1;
 270   else
 271     is_dsp = 0;
 272
 273   tid = get_ptrace_pid (regcache_get_ptid (regcache));
 274
 275   if (regno == -1 || (!is_fp && !is_dsp))
 276     {
 277       mips64_elf_gregset_t regs;
 278
 279       if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
 280         {
 281           if (errno == EIO)
 282             {
 283               have_ptrace_regsets = 0;
 284               return;
 285             }
 286           perror_with_name (_("Couldn't get registers"));
 287         }
 288
 289       mips64_supply_gregset (regcache,
 290                              (const mips64_elf_gregset_t *) &regs);
 291     }
 292
 293   if (regno == -1 || is_fp)
 294     {
 295       mips64_elf_fpregset_t fp_regs;
 296
 297       if (ptrace (PTRACE_GETFPREGS, tid, 0L,
 298                   (PTRACE_TYPE_ARG3) &fp_regs) == -1)
 299         {
 300           if (errno == EIO)
 301             {
 302               have_ptrace_regsets = 0;
 303               return;
 304             }
 305           perror_with_name (_("Couldn't get FP registers"));
 306         }
 307
 308       mips64_supply_fpregset (regcache,
 309                               (const mips64_elf_fpregset_t *) &fp_regs);
 310     }
 311
 312   if (is_dsp)
 313     linux_nat_trad_target::fetch_registers (regcache, regno);
 314   else if (regno == -1 && have_dsp)
 315     {
 316       for (regi = mips_regnum (gdbarch)->dspacc;
 317            regi < mips_regnum (gdbarch)->dspacc + 6;
 318            regi++)
 319         linux_nat_trad_target::fetch_registers (regcache, regi);
 320       linux_nat_trad_target::fetch_registers (regcache,
 321                                               mips_regnum (gdbarch)->dspctl);
 322     }
 323 }
 324
 325 /* Store REGNO (or all registers if REGNO == -1) to the target
 326    using PTRACE_SETREGS et al.  */
 327
 328 void
 329 mips_linux_nat_target::mips64_regsets_store_registers
 330   (struct regcache *regcache, int regno)
 331 {
 332   struct gdbarch *gdbarch = regcache->arch ();
 333   int is_fp, is_dsp;
 334   int have_dsp;
 335   int regi;
 336   int tid;
 337
 338   if (regno >= mips_regnum (gdbarch)->fp0
 339       && regno <= mips_regnum (gdbarch)->fp0 + 32)
 340     is_fp = 1;
 341   else if (regno == mips_regnum (gdbarch)->fp_control_status)
 342     is_fp = 1;
 343   else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
 344     is_fp = 1;
 345   else
 346     is_fp = 0;
 347
 348   /* DSP registers are optional and not a part of any set.  */
 349   have_dsp = mips_regnum (gdbarch)->dspctl != -1;
 350   if (!have_dsp)
 351     is_dsp = 0;
 352   else if (regno >= mips_regnum (gdbarch)->dspacc
 353       && regno < mips_regnum (gdbarch)->dspacc + 6)
 354     is_dsp = 1;
 355   else if (regno == mips_regnum (gdbarch)->dspctl)
 356     is_dsp = 1;
 357   else
 358     is_dsp = 0;
 359
 360   tid = get_ptrace_pid (regcache_get_ptid (regcache));
 361
 362   if (regno == -1 || (!is_fp && !is_dsp))
 363     {
 364       mips64_elf_gregset_t regs;
 365
 366       if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
 367         perror_with_name (_("Couldn't get registers"));
 368
 369       mips64_fill_gregset (regcache, &regs, regno);
 370
 371       if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
 372         perror_with_name (_("Couldn't set registers"));
 373     }
 374
 375   if (regno == -1 || is_fp)
 376     {
 377       mips64_elf_fpregset_t fp_regs;
 378
 379       if (ptrace (PTRACE_GETFPREGS, tid, 0L,
 380                   (PTRACE_TYPE_ARG3) &fp_regs) == -1)
 381         perror_with_name (_("Couldn't get FP registers"));
 382
 383       mips64_fill_fpregset (regcache, &fp_regs, regno);
 384
 385       if (ptrace (PTRACE_SETFPREGS, tid, 0L,
 386                   (PTRACE_TYPE_ARG3) &fp_regs) == -1)
 387         perror_with_name (_("Couldn't set FP registers"));
 388     }
 389
 390   if (is_dsp)
 391     linux_nat_trad_target::store_registers (regcache, regno);
 392   else if (regno == -1 && have_dsp)
 393     {
 394       for (regi = mips_regnum (gdbarch)->dspacc;
 395            regi < mips_regnum (gdbarch)->dspacc + 6;
 396            regi++)
 397         linux_nat_trad_target::store_registers (regcache, regi);
 398       linux_nat_trad_target::store_registers (regcache,
 399                                               mips_regnum (gdbarch)->dspctl);
 400     }
 401 }
 402
 403 /* Fetch REGNO (or all registers if REGNO == -1) from the target
 404    using any working method.  */
 405
 406 void
 407 mips_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
 408 {
 409   /* Unless we already know that PTRACE_GETREGS does not work, try it.  */
 410   if (have_ptrace_regsets)
 411     mips64_regsets_fetch_registers (regcache, regnum);
 412
 413   /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
 414      back to PTRACE_PEEKUSER.  */
 415   if (!have_ptrace_regsets)
 416     linux_nat_trad_target::fetch_registers (regcache, regnum);
 417 }
 418
 419 /* Store REGNO (or all registers if REGNO == -1) to the target
 420    using any working method.  */
 421
 422 void
 423 mips_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
 424 {
 425   /* Unless we already know that PTRACE_GETREGS does not work, try it.  */
 426   if (have_ptrace_regsets)
 427     mips64_regsets_store_registers (regcache, regnum);
 428
 429   /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
 430      back to PTRACE_PEEKUSER.  */
 431   if (!have_ptrace_regsets)
 432     linux_nat_trad_target::store_registers (regcache, regnum);
 433 }
 434
 435 /* Return the address in the core dump or inferior of register
 436    REGNO.  */
 437
 438 CORE_ADDR
 439 mips_linux_nat_target::register_u_offset (struct gdbarch *gdbarch,
 440                                           int regno, int store_p)
 441 {
 442   if (mips_abi_regsize (gdbarch) == 8)
 443     return mips64_linux_register_addr (gdbarch, regno, store_p);
 444   else
 445     return mips_linux_register_addr (gdbarch, regno, store_p);
 446 }
 447
 448 const struct target_desc *
 449 mips_linux_nat_target::read_description ()
 450 {
 451   static int have_dsp = -1;
 452
 453   if (have_dsp < 0)
 454     {
 455       int tid;
 456
 457       tid = ptid_get_lwp (inferior_ptid);
 458       if (tid == 0)
 459         tid = ptid_get_pid (inferior_ptid);
 460
 461       errno = 0;
 462       ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0);
 463       switch (errno)
 464         {
 465         case 0:
 466           have_dsp = 1;
 467           break;
 468         case EIO:
 469           have_dsp = 0;
 470           break;
 471         default:
 472           perror_with_name (_("Couldn't check DSP support"));
 473           break;
 474         }
 475     }
 476
 477   /* Report that target registers are a size we know for sure
 478      that we can get from ptrace.  */
 479   if (_MIPS_SIM == _ABIO32)
 480     return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
 481   else
 482     return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux;
 483 }
 484
 485 /* -1 if the kernel and/or CPU do not support watch registers.
 486     1 if watch_readback is valid and we can read style, num_valid
 487       and the masks.
 488     0 if we need to read the watch_readback.  */
 489
 490 static int watch_readback_valid;
 491
 492 /* Cached watch register read values.  */
 493
 494 static struct pt_watch_regs watch_readback;
 495
 496 static struct mips_watchpoint *current_watches;
 497
 498 /*  The current set of watch register values for writing the
 499     registers.  */
 500
 501 static struct pt_watch_regs watch_mirror;
 502
 503 static void
 504 mips_show_dr (const char *func, CORE_ADDR addr,
 505               int len, enum target_hw_bp_type type)
 506 {
 507   int i;
 508
 509   puts_unfiltered (func);
 510   if (addr || len)
 511     printf_unfiltered (" (addr=%s, len=%d, type=%s)",
 512                        paddress (target_gdbarch (), addr), len,
 513                        type == hw_write ? "data-write"
 514                        : (type == hw_read ? "data-read"
 515                           : (type == hw_access ? "data-read/write"
 516                              : (type == hw_execute ? "instruction-execute"
 517                                 : "??unknown??"))));
 518   puts_unfiltered (":\n");
 519
 520   for (i = 0; i < MAX_DEBUG_REGISTER; i++)
 521     printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i,
 522                        paddress (target_gdbarch (),
 523                                  mips_linux_watch_get_watchlo (&watch_mirror,
 524                                                                i)),
 525                        paddress (target_gdbarch (),
 526                                  mips_linux_watch_get_watchhi (&watch_mirror,
 527                                                                i)));
 528 }
 529
 530 /* Target to_can_use_hw_breakpoint implementation.  Return 1 if we can
 531    handle the specified watch type.  */
 532
 533 int
 534 mips_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 535                                               int cnt, int ot)
 536 {
 537   int i;
 538   uint32_t wanted_mask, irw_mask;
 539
 540   if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
 541                                         &watch_readback,
 542                                         &watch_readback_valid, 0))
 543     return 0;
 544
 545    switch (type)
 546     {
 547     case bp_hardware_watchpoint:
 548       wanted_mask = W_MASK;
 549       break;
 550     case bp_read_watchpoint:
 551       wanted_mask = R_MASK;
 552       break;
 553     case bp_access_watchpoint:
 554       wanted_mask = R_MASK | W_MASK;
 555       break;
 556     default:
 557       return 0;
 558     }
 559
 560   for (i = 0;
 561        i < mips_linux_watch_get_num_valid (&watch_readback) && cnt;
 562        i++)
 563     {
 564       irw_mask = mips_linux_watch_get_irw_mask (&watch_readback, i);
 565       if ((irw_mask & wanted_mask) == wanted_mask)
 566         cnt--;
 567     }
 568   return (cnt == 0) ? 1 : 0;
 569 }
 570
 571 /* Target to_stopped_by_watchpoint implementation.  Return 1 if
 572    stopped by watchpoint.  The watchhi R and W bits indicate the watch
 573    register triggered.  */
 574
 575 int
 576 mips_linux_nat_target::stopped_by_watchpoint ()
 577 {
 578   int n;
 579   int num_valid;
 580
 581   if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
 582                                         &watch_readback,
 583                                         &watch_readback_valid, 1))
 584     return 0;
 585
 586   num_valid = mips_linux_watch_get_num_valid (&watch_readback);
 587
 588   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 589     if (mips_linux_watch_get_watchhi (&watch_readback, n) & (R_MASK | W_MASK))
 590       return 1;
 591
 592   return 0;
 593 }
 594
 595 /* Target to_stopped_data_address implementation.  Set the address
 596    where the watch triggered (if known).  Return 1 if the address was
 597    known.  */
 598
 599 int
 600 mips_linux_nat_target::stopped_data_address (CORE_ADDR *paddr)
 601 {
 602   /* On mips we don't know the low order 3 bits of the data address,
 603      so we must return false.  */
 604   return 0;
 605 }
 606
 607 /* Target to_region_ok_for_hw_watchpoint implementation.  Return 1 if
 608    the specified region can be covered by the watch registers.  */
 609
 610 int
 611 mips_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
 612 {
 613   struct pt_watch_regs dummy_regs;
 614   int i;
 615
 616   if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
 617                                         &watch_readback,
 618                                         &watch_readback_valid, 0))
 619     return 0;
 620
 621   dummy_regs = watch_readback;
 622   /* Clear them out.  */
 623   for (i = 0; i < mips_linux_watch_get_num_valid (&dummy_regs); i++)
 624     mips_linux_watch_set_watchlo (&dummy_regs, i, 0);
 625   return mips_linux_watch_try_one_watch (&dummy_regs, addr, len, 0);
 626 }
 627
 628 /* Write the mirrored watch register values for each thread.  */
 629
 630 static int
 631 write_watchpoint_regs (void)
 632 {
 633   struct lwp_info *lp;
 634   int tid;
 635
 636   ALL_LWPS (lp)
 637     {
 638       tid = ptid_get_lwp (lp->ptid);
 639       if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
 640         perror_with_name (_("Couldn't write debug register"));
 641     }
 642   return 0;
 643 }
 644
 645 /* linux_nat new_thread implementation.  Write the mirrored watch
 646  register values for the new thread.  */
 647
 648 static void
 649 mips_linux_new_thread (struct lwp_info *lp)
 650 {
 651   long tid = lp->ptid.lwp ();
 652
 653   if (!mips_linux_read_watch_registers (tid,
 654                                         &watch_readback,
 655                                         &watch_readback_valid, 0))
 656     return;
 657
 658   if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
 659     perror_with_name (_("Couldn't write debug register"));
 660 }
 661
 662 /* Target to_insert_watchpoint implementation.  Try to insert a new
 663    watch.  Return zero on success.  */
 664
 665 int
 666 mips_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
 667                                           enum target_hw_bp_type type,
 668                                           struct expression *cond)
 669 {
 670   struct pt_watch_regs regs;
 671   struct mips_watchpoint *new_watch;
 672   struct mips_watchpoint **pw;
 673
 674   int i;
 675   int retval;
 676
 677   if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
 678                                         &watch_readback,
 679                                         &watch_readback_valid, 0))
 680     return -1;
 681
 682   if (len <= 0)
 683     return -1;
 684
 685   regs = watch_readback;
 686   /* Add the current watches.  */
 687   mips_linux_watch_populate_regs (current_watches, &regs);
 688
 689   /* Now try to add the new watch.  */
 690   if (!mips_linux_watch_try_one_watch (&regs, addr, len,
 691                                        mips_linux_watch_type_to_irw (type)))
 692     return -1;
 693
 694   /* It fit.  Stick it on the end of the list.  */
 695   new_watch = XNEW (struct mips_watchpoint);
 696   new_watch->addr = addr;
 697   new_watch->len = len;
 698   new_watch->type = type;
 699   new_watch->next = NULL;
 700
 701   pw = &current_watches;
 702   while (*pw != NULL)
 703     pw = &(*pw)->next;
 704   *pw = new_watch;
 705
 706   watch_mirror = regs;
 707   retval = write_watchpoint_regs ();
 708
 709   if (show_debug_regs)
 710     mips_show_dr ("insert_watchpoint", addr, len, type);
 711
 712   return retval;
 713 }
 714
 715 /* Target to_remove_watchpoint implementation.  Try to remove a watch.
 716    Return zero on success.  */
 717
 718 int
 719 mips_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
 720                                           enum target_hw_bp_type type,
 721                                           struct expression *cond)
 722 {
 723   int retval;
 724   int deleted_one;
 725
 726   struct mips_watchpoint **pw;
 727   struct mips_watchpoint *w;
 728
 729   /* Search for a known watch that matches.  Then unlink and free
 730      it.  */
 731   deleted_one = 0;
 732   pw = &current_watches;
 733   while ((w = *pw))
 734     {
 735       if (w->addr == addr && w->len == len && w->type == type)
 736         {
 737           *pw = w->next;
 738           xfree (w);
 739           deleted_one = 1;
 740           break;
 741         }
 742       pw = &(w->next);
 743     }
 744
 745   if (!deleted_one)
 746     return -1;  /* We don't know about it, fail doing nothing.  */
 747
 748   /* At this point watch_readback is known to be valid because we
 749      could not have added the watch without reading it.  */
 750   gdb_assert (watch_readback_valid == 1);
 751
 752   watch_mirror = watch_readback;
 753   mips_linux_watch_populate_regs (current_watches, &watch_mirror);
 754
 755   retval = write_watchpoint_regs ();
 756
 757   if (show_debug_regs)
 758     mips_show_dr ("remove_watchpoint", addr, len, type);
 759
 760   return retval;
 761 }
 762
 763 /* Target to_close implementation.  Free any watches and call the
 764    super implementation.  */
 765
 766 void
 767 mips_linux_nat_target::close ()
 768 {
 769   struct mips_watchpoint *w;
 770   struct mips_watchpoint *nw;
 771
 772   /* Clean out the current_watches list.  */
 773   w = current_watches;
 774   while (w)
 775     {
 776       nw = w->next;
 777       xfree (w);
 778       w = nw;
 779     }
 780   current_watches = NULL;
 781
 782   linux_nat_trad_target::close ();
 783 }
 784
 785 void
 786 _initialize_mips_linux_nat (void)
 787 {
 788   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
 789                            &show_debug_regs, _("\
 790 Set whether to show variables that mirror the mips debug registers."), _("\
 791 Show whether to show variables that mirror the mips debug registers."), _("\
 792 Use \"on\" to enable, \"off\" to disable.\n\
 793 If enabled, the debug registers values are shown when GDB inserts\n\
 794 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
 795 triggers a breakpoint or watchpoint."),
 796                            NULL,
 797                            NULL,
 798                            &maintenance_set_cmdlist,
 799                            &maintenance_show_cmdlist);
 800
 801   linux_target = &the_mips_linux_nat_target;
 802   add_target (&the_mips_linux_nat_target);
 803   linux_nat_set_new_thread (&the_mips_linux_nat_target,
 804                             mips_linux_new_thread);
 805 }