Delegate opcodes to select disassembler in GDB
[deliverable/binutils-gdb.git] / gdb / mn10300-tdep.c
1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
2
3 Copyright (C) 1996-2017 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21 #include "arch-utils.h"
22 #include "dis-asm.h"
23 #include "gdbtypes.h"
24 #include "regcache.h"
25 #include "gdbcore.h" /* For write_memory_unsigned_integer. */
26 #include "value.h"
27 #include "frame.h"
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "symtab.h"
31 #include "dwarf2-frame.h"
32 #include "osabi.h"
33 #include "infcall.h"
34 #include "prologue-value.h"
35 #include "target.h"
36
37 #include "mn10300-tdep.h"
38
39
40 /* The am33-2 has 64 registers. */
41 #define MN10300_MAX_NUM_REGS 64
42
43 /* This structure holds the results of a prologue analysis. */
44 struct mn10300_prologue
45 {
46 /* The architecture for which we generated this prologue info. */
47 struct gdbarch *gdbarch;
48
49 /* The offset from the frame base to the stack pointer --- always
50 zero or negative.
51
52 Calling this a "size" is a bit misleading, but given that the
53 stack grows downwards, using offsets for everything keeps one
54 from going completely sign-crazy: you never change anything's
55 sign for an ADD instruction; always change the second operand's
56 sign for a SUB instruction; and everything takes care of
57 itself. */
58 int frame_size;
59
60 /* Non-zero if this function has initialized the frame pointer from
61 the stack pointer, zero otherwise. */
62 int has_frame_ptr;
63
64 /* If has_frame_ptr is non-zero, this is the offset from the frame
65 base to where the frame pointer points. This is always zero or
66 negative. */
67 int frame_ptr_offset;
68
69 /* The address of the first instruction at which the frame has been
70 set up and the arguments are where the debug info says they are
71 --- as best as we can tell. */
72 CORE_ADDR prologue_end;
73
74 /* reg_offset[R] is the offset from the CFA at which register R is
75 saved, or 1 if register R has not been saved. (Real values are
76 always zero or negative.) */
77 int reg_offset[MN10300_MAX_NUM_REGS];
78 };
79
80
81 /* Compute the alignment required by a type. */
82
83 static int
84 mn10300_type_align (struct type *type)
85 {
86 int i, align = 1;
87
88 switch (TYPE_CODE (type))
89 {
90 case TYPE_CODE_INT:
91 case TYPE_CODE_ENUM:
92 case TYPE_CODE_SET:
93 case TYPE_CODE_RANGE:
94 case TYPE_CODE_CHAR:
95 case TYPE_CODE_BOOL:
96 case TYPE_CODE_FLT:
97 case TYPE_CODE_PTR:
98 case TYPE_CODE_REF:
99 case TYPE_CODE_RVALUE_REF:
100 return TYPE_LENGTH (type);
101
102 case TYPE_CODE_COMPLEX:
103 return TYPE_LENGTH (type) / 2;
104
105 case TYPE_CODE_STRUCT:
106 case TYPE_CODE_UNION:
107 for (i = 0; i < TYPE_NFIELDS (type); i++)
108 {
109 int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i));
110 while (align < falign)
111 align <<= 1;
112 }
113 return align;
114
115 case TYPE_CODE_ARRAY:
116 /* HACK! Structures containing arrays, even small ones, are not
117 elligible for returning in registers. */
118 return 256;
119
120 case TYPE_CODE_TYPEDEF:
121 return mn10300_type_align (check_typedef (type));
122
123 default:
124 internal_error (__FILE__, __LINE__, _("bad switch"));
125 }
126 }
127
128 /* Should call_function allocate stack space for a struct return? */
129 static int
130 mn10300_use_struct_convention (struct type *type)
131 {
132 /* Structures bigger than a pair of words can't be returned in
133 registers. */
134 if (TYPE_LENGTH (type) > 8)
135 return 1;
136
137 switch (TYPE_CODE (type))
138 {
139 case TYPE_CODE_STRUCT:
140 case TYPE_CODE_UNION:
141 /* Structures with a single field are handled as the field
142 itself. */
143 if (TYPE_NFIELDS (type) == 1)
144 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0));
145
146 /* Structures with word or double-word size are passed in memory, as
147 long as they require at least word alignment. */
148 if (mn10300_type_align (type) >= 4)
149 return 0;
150
151 return 1;
152
153 /* Arrays are addressable, so they're never returned in
154 registers. This condition can only hold when the array is
155 the only field of a struct or union. */
156 case TYPE_CODE_ARRAY:
157 return 1;
158
159 case TYPE_CODE_TYPEDEF:
160 return mn10300_use_struct_convention (check_typedef (type));
161
162 default:
163 return 0;
164 }
165 }
166
167 static void
168 mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type,
169 struct regcache *regcache, const gdb_byte *valbuf)
170 {
171 int len = TYPE_LENGTH (type);
172 int reg, regsz;
173
174 if (TYPE_CODE (type) == TYPE_CODE_PTR)
175 reg = 4;
176 else
177 reg = 0;
178
179 regsz = register_size (gdbarch, reg);
180
181 if (len <= regsz)
182 regcache_raw_write_part (regcache, reg, 0, len, valbuf);
183 else if (len <= 2 * regsz)
184 {
185 regcache_raw_write (regcache, reg, valbuf);
186 gdb_assert (regsz == register_size (gdbarch, reg + 1));
187 regcache_raw_write_part (regcache, reg+1, 0,
188 len - regsz, valbuf + regsz);
189 }
190 else
191 internal_error (__FILE__, __LINE__,
192 _("Cannot store return value %d bytes long."), len);
193 }
194
195 static void
196 mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
197 struct regcache *regcache, void *valbuf)
198 {
199 gdb_byte buf[MAX_REGISTER_SIZE];
200 int len = TYPE_LENGTH (type);
201 int reg, regsz;
202
203 if (TYPE_CODE (type) == TYPE_CODE_PTR)
204 reg = 4;
205 else
206 reg = 0;
207
208 regsz = register_size (gdbarch, reg);
209 if (len <= regsz)
210 {
211 regcache_raw_read (regcache, reg, buf);
212 memcpy (valbuf, buf, len);
213 }
214 else if (len <= 2 * regsz)
215 {
216 regcache_raw_read (regcache, reg, buf);
217 memcpy (valbuf, buf, regsz);
218 gdb_assert (regsz == register_size (gdbarch, reg + 1));
219 regcache_raw_read (regcache, reg + 1, buf);
220 memcpy ((char *) valbuf + regsz, buf, len - regsz);
221 }
222 else
223 internal_error (__FILE__, __LINE__,
224 _("Cannot extract return value %d bytes long."), len);
225 }
226
227 /* Determine, for architecture GDBARCH, how a return value of TYPE
228 should be returned. If it is supposed to be returned in registers,
229 and READBUF is non-zero, read the appropriate value from REGCACHE,
230 and copy it into READBUF. If WRITEBUF is non-zero, write the value
231 from WRITEBUF into REGCACHE. */
232
233 static enum return_value_convention
234 mn10300_return_value (struct gdbarch *gdbarch, struct value *function,
235 struct type *type, struct regcache *regcache,
236 gdb_byte *readbuf, const gdb_byte *writebuf)
237 {
238 if (mn10300_use_struct_convention (type))
239 return RETURN_VALUE_STRUCT_CONVENTION;
240
241 if (readbuf)
242 mn10300_extract_return_value (gdbarch, type, regcache, readbuf);
243 if (writebuf)
244 mn10300_store_return_value (gdbarch, type, regcache, writebuf);
245
246 return RETURN_VALUE_REGISTER_CONVENTION;
247 }
248
249 static const char *
250 register_name (int reg, const char **regs, long sizeof_regs)
251 {
252 if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
253 return NULL;
254 else
255 return regs[reg];
256 }
257
258 static const char *
259 mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
260 {
261 static const char *regs[] =
262 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
263 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
264 "", "", "", "", "", "", "", "",
265 "", "", "", "", "", "", "", "fp"
266 };
267 return register_name (reg, regs, sizeof regs);
268 }
269
270
271 static const char *
272 am33_register_name (struct gdbarch *gdbarch, int reg)
273 {
274 static const char *regs[] =
275 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
276 "sp", "pc", "mdr", "psw", "lir", "lar", "",
277 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
278 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
279 };
280 return register_name (reg, regs, sizeof regs);
281 }
282
283 static const char *
284 am33_2_register_name (struct gdbarch *gdbarch, int reg)
285 {
286 static const char *regs[] =
287 {
288 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
289 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
290 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
291 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
292 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
293 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
294 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
295 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
296 };
297 return register_name (reg, regs, sizeof regs);
298 }
299
300 static struct type *
301 mn10300_register_type (struct gdbarch *gdbarch, int reg)
302 {
303 return builtin_type (gdbarch)->builtin_int;
304 }
305
306 static CORE_ADDR
307 mn10300_read_pc (struct regcache *regcache)
308 {
309 ULONGEST val;
310 regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val);
311 return val;
312 }
313
314 static void
315 mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
316 {
317 regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val);
318 }
319
320 /* The breakpoint instruction must be the same size as the smallest
321 instruction in the instruction set.
322
323 The Matsushita mn10x00 processors have single byte instructions
324 so we need a single byte breakpoint. Matsushita hasn't defined
325 one, so we defined it ourselves. */
326 constexpr gdb_byte mn10300_break_insn[] = {0xff};
327
328 typedef BP_MANIPULATION (mn10300_break_insn) mn10300_breakpoint;
329
330 /* Model the semantics of pushing a register onto the stack. This
331 is a helper function for mn10300_analyze_prologue, below. */
332 static void
333 push_reg (pv_t *regs, struct pv_area *stack, int regnum)
334 {
335 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
336 pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]);
337 }
338
339 /* Translate an "r" register number extracted from an instruction encoding
340 into a GDB register number. Adapted from a simulator function
341 of the same name; see am33.igen. */
342 static int
343 translate_rreg (int rreg)
344 {
345 /* The higher register numbers actually correspond to the
346 basic machine's address and data registers. */
347 if (rreg > 7 && rreg < 12)
348 return E_A0_REGNUM + rreg - 8;
349 else if (rreg > 11 && rreg < 16)
350 return E_D0_REGNUM + rreg - 12;
351 else
352 return E_E0_REGNUM + rreg;
353 }
354
355 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
356
357 If VALUE is a saved register, ADDR says it was saved at a constant
358 offset from the frame base, and SIZE indicates that the whole
359 register was saved, record its offset in RESULT_UNTYPED. */
360 static void
361 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
362 {
363 struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped;
364
365 if (value.kind == pvk_register
366 && value.k == 0
367 && pv_is_register (addr, E_SP_REGNUM)
368 && size == register_size (result->gdbarch, value.reg))
369 result->reg_offset[value.reg] = addr.k;
370 }
371
372 /* Analyze the prologue to determine where registers are saved,
373 the end of the prologue, etc. The result of this analysis is
374 returned in RESULT. See struct mn10300_prologue above for more
375 information. */
376 static void
377 mn10300_analyze_prologue (struct gdbarch *gdbarch,
378 CORE_ADDR start_pc, CORE_ADDR limit_pc,
379 struct mn10300_prologue *result)
380 {
381 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
382 CORE_ADDR pc;
383 int rn;
384 pv_t regs[MN10300_MAX_NUM_REGS];
385 struct pv_area *stack;
386 struct cleanup *back_to;
387 CORE_ADDR after_last_frame_setup_insn = start_pc;
388 int am33_mode = AM33_MODE (gdbarch);
389
390 memset (result, 0, sizeof (*result));
391 result->gdbarch = gdbarch;
392
393 for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++)
394 {
395 regs[rn] = pv_register (rn, 0);
396 result->reg_offset[rn] = 1;
397 }
398 stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
399 back_to = make_cleanup_free_pv_area (stack);
400
401 /* The typical call instruction will have saved the return address on the
402 stack. Space for the return address has already been preallocated in
403 the caller's frame. It's possible, such as when using -mrelax with gcc
404 that other registers were saved as well. If this happens, we really
405 have no chance of deciphering the frame. DWARF info can save the day
406 when this happens. */
407 pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
408
409 pc = start_pc;
410 while (pc < limit_pc)
411 {
412 int status;
413 gdb_byte instr[2];
414
415 /* Instructions can be as small as one byte; however, we usually
416 need at least two bytes to do the decoding, so fetch that many
417 to begin with. */
418 status = target_read_memory (pc, instr, 2);
419 if (status != 0)
420 break;
421
422 /* movm [regs], sp */
423 if (instr[0] == 0xcf)
424 {
425 gdb_byte save_mask;
426
427 save_mask = instr[1];
428
429 if ((save_mask & movm_exreg0_bit) && am33_mode)
430 {
431 push_reg (regs, stack, E_E2_REGNUM);
432 push_reg (regs, stack, E_E3_REGNUM);
433 }
434 if ((save_mask & movm_exreg1_bit) && am33_mode)
435 {
436 push_reg (regs, stack, E_E4_REGNUM);
437 push_reg (regs, stack, E_E5_REGNUM);
438 push_reg (regs, stack, E_E6_REGNUM);
439 push_reg (regs, stack, E_E7_REGNUM);
440 }
441 if ((save_mask & movm_exother_bit) && am33_mode)
442 {
443 push_reg (regs, stack, E_E0_REGNUM);
444 push_reg (regs, stack, E_E1_REGNUM);
445 push_reg (regs, stack, E_MDRQ_REGNUM);
446 push_reg (regs, stack, E_MCRH_REGNUM);
447 push_reg (regs, stack, E_MCRL_REGNUM);
448 push_reg (regs, stack, E_MCVF_REGNUM);
449 }
450 if (save_mask & movm_d2_bit)
451 push_reg (regs, stack, E_D2_REGNUM);
452 if (save_mask & movm_d3_bit)
453 push_reg (regs, stack, E_D3_REGNUM);
454 if (save_mask & movm_a2_bit)
455 push_reg (regs, stack, E_A2_REGNUM);
456 if (save_mask & movm_a3_bit)
457 push_reg (regs, stack, E_A3_REGNUM);
458 if (save_mask & movm_other_bit)
459 {
460 push_reg (regs, stack, E_D0_REGNUM);
461 push_reg (regs, stack, E_D1_REGNUM);
462 push_reg (regs, stack, E_A0_REGNUM);
463 push_reg (regs, stack, E_A1_REGNUM);
464 push_reg (regs, stack, E_MDR_REGNUM);
465 push_reg (regs, stack, E_LIR_REGNUM);
466 push_reg (regs, stack, E_LAR_REGNUM);
467 /* The `other' bit leaves a blank area of four bytes at
468 the beginning of its block of saved registers, making
469 it 32 bytes long in total. */
470 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
471 }
472
473 pc += 2;
474 after_last_frame_setup_insn = pc;
475 }
476 /* mov sp, aN */
477 else if ((instr[0] & 0xfc) == 0x3c)
478 {
479 int aN = instr[0] & 0x03;
480
481 regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM];
482
483 pc += 1;
484 if (aN == 3)
485 after_last_frame_setup_insn = pc;
486 }
487 /* mov aM, aN */
488 else if ((instr[0] & 0xf0) == 0x90
489 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
490 {
491 int aN = instr[0] & 0x03;
492 int aM = (instr[0] & 0x0c) >> 2;
493
494 regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM];
495
496 pc += 1;
497 }
498 /* mov dM, dN */
499 else if ((instr[0] & 0xf0) == 0x80
500 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
501 {
502 int dN = instr[0] & 0x03;
503 int dM = (instr[0] & 0x0c) >> 2;
504
505 regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM];
506
507 pc += 1;
508 }
509 /* mov aM, dN */
510 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0)
511 {
512 int dN = instr[1] & 0x03;
513 int aM = (instr[1] & 0x0c) >> 2;
514
515 regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM];
516
517 pc += 2;
518 }
519 /* mov dM, aN */
520 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0)
521 {
522 int aN = instr[1] & 0x03;
523 int dM = (instr[1] & 0x0c) >> 2;
524
525 regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM];
526
527 pc += 2;
528 }
529 /* add imm8, SP */
530 else if (instr[0] == 0xf8 && instr[1] == 0xfe)
531 {
532 gdb_byte buf[1];
533 LONGEST imm8;
534
535
536 status = target_read_memory (pc + 2, buf, 1);
537 if (status != 0)
538 break;
539
540 imm8 = extract_signed_integer (buf, 1, byte_order);
541 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8);
542
543 pc += 3;
544 /* Stack pointer adjustments are frame related. */
545 after_last_frame_setup_insn = pc;
546 }
547 /* add imm16, SP */
548 else if (instr[0] == 0xfa && instr[1] == 0xfe)
549 {
550 gdb_byte buf[2];
551 LONGEST imm16;
552
553 status = target_read_memory (pc + 2, buf, 2);
554 if (status != 0)
555 break;
556
557 imm16 = extract_signed_integer (buf, 2, byte_order);
558 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16);
559
560 pc += 4;
561 /* Stack pointer adjustments are frame related. */
562 after_last_frame_setup_insn = pc;
563 }
564 /* add imm32, SP */
565 else if (instr[0] == 0xfc && instr[1] == 0xfe)
566 {
567 gdb_byte buf[4];
568 LONGEST imm32;
569
570 status = target_read_memory (pc + 2, buf, 4);
571 if (status != 0)
572 break;
573
574
575 imm32 = extract_signed_integer (buf, 4, byte_order);
576 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32);
577
578 pc += 6;
579 /* Stack pointer adjustments are frame related. */
580 after_last_frame_setup_insn = pc;
581 }
582 /* add imm8, aN */
583 else if ((instr[0] & 0xfc) == 0x20)
584 {
585 int aN;
586 LONGEST imm8;
587
588 aN = instr[0] & 0x03;
589 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
590
591 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
592 imm8);
593
594 pc += 2;
595 }
596 /* add imm16, aN */
597 else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0)
598 {
599 int aN;
600 LONGEST imm16;
601 gdb_byte buf[2];
602
603 aN = instr[1] & 0x03;
604
605 status = target_read_memory (pc + 2, buf, 2);
606 if (status != 0)
607 break;
608
609
610 imm16 = extract_signed_integer (buf, 2, byte_order);
611
612 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
613 imm16);
614
615 pc += 4;
616 }
617 /* add imm32, aN */
618 else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0)
619 {
620 int aN;
621 LONGEST imm32;
622 gdb_byte buf[4];
623
624 aN = instr[1] & 0x03;
625
626 status = target_read_memory (pc + 2, buf, 4);
627 if (status != 0)
628 break;
629
630 imm32 = extract_signed_integer (buf, 2, byte_order);
631
632 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
633 imm32);
634 pc += 6;
635 }
636 /* fmov fsM, (rN) */
637 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30)
638 {
639 int fsM, sM, Y, rN;
640 gdb_byte buf[1];
641
642 Y = (instr[1] & 0x02) >> 1;
643
644 status = target_read_memory (pc + 2, buf, 1);
645 if (status != 0)
646 break;
647
648 sM = (buf[0] & 0xf0) >> 4;
649 rN = buf[0] & 0x0f;
650 fsM = (Y << 4) | sM;
651
652 pv_area_store (stack, regs[translate_rreg (rN)], 4,
653 regs[E_FS0_REGNUM + fsM]);
654
655 pc += 3;
656 }
657 /* fmov fsM, (sp) */
658 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34)
659 {
660 int fsM, sM, Y;
661 gdb_byte buf[1];
662
663 Y = (instr[1] & 0x02) >> 1;
664
665 status = target_read_memory (pc + 2, buf, 1);
666 if (status != 0)
667 break;
668
669 sM = (buf[0] & 0xf0) >> 4;
670 fsM = (Y << 4) | sM;
671
672 pv_area_store (stack, regs[E_SP_REGNUM], 4,
673 regs[E_FS0_REGNUM + fsM]);
674
675 pc += 3;
676 }
677 /* fmov fsM, (rN, rI) */
678 else if (instr[0] == 0xfb && instr[1] == 0x37)
679 {
680 int fsM, sM, Z, rN, rI;
681 gdb_byte buf[2];
682
683
684 status = target_read_memory (pc + 2, buf, 2);
685 if (status != 0)
686 break;
687
688 rI = (buf[0] & 0xf0) >> 4;
689 rN = buf[0] & 0x0f;
690 sM = (buf[1] & 0xf0) >> 4;
691 Z = (buf[1] & 0x02) >> 1;
692 fsM = (Z << 4) | sM;
693
694 pv_area_store (stack,
695 pv_add (regs[translate_rreg (rN)],
696 regs[translate_rreg (rI)]),
697 4, regs[E_FS0_REGNUM + fsM]);
698
699 pc += 4;
700 }
701 /* fmov fsM, (d8, rN) */
702 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30)
703 {
704 int fsM, sM, Y, rN;
705 LONGEST d8;
706 gdb_byte buf[2];
707
708 Y = (instr[1] & 0x02) >> 1;
709
710 status = target_read_memory (pc + 2, buf, 2);
711 if (status != 0)
712 break;
713
714 sM = (buf[0] & 0xf0) >> 4;
715 rN = buf[0] & 0x0f;
716 fsM = (Y << 4) | sM;
717 d8 = extract_signed_integer (&buf[1], 1, byte_order);
718
719 pv_area_store (stack,
720 pv_add_constant (regs[translate_rreg (rN)], d8),
721 4, regs[E_FS0_REGNUM + fsM]);
722
723 pc += 4;
724 }
725 /* fmov fsM, (d24, rN) */
726 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30)
727 {
728 int fsM, sM, Y, rN;
729 LONGEST d24;
730 gdb_byte buf[4];
731
732 Y = (instr[1] & 0x02) >> 1;
733
734 status = target_read_memory (pc + 2, buf, 4);
735 if (status != 0)
736 break;
737
738 sM = (buf[0] & 0xf0) >> 4;
739 rN = buf[0] & 0x0f;
740 fsM = (Y << 4) | sM;
741 d24 = extract_signed_integer (&buf[1], 3, byte_order);
742
743 pv_area_store (stack,
744 pv_add_constant (regs[translate_rreg (rN)], d24),
745 4, regs[E_FS0_REGNUM + fsM]);
746
747 pc += 6;
748 }
749 /* fmov fsM, (d32, rN) */
750 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30)
751 {
752 int fsM, sM, Y, rN;
753 LONGEST d32;
754 gdb_byte buf[5];
755
756 Y = (instr[1] & 0x02) >> 1;
757
758 status = target_read_memory (pc + 2, buf, 5);
759 if (status != 0)
760 break;
761
762 sM = (buf[0] & 0xf0) >> 4;
763 rN = buf[0] & 0x0f;
764 fsM = (Y << 4) | sM;
765 d32 = extract_signed_integer (&buf[1], 4, byte_order);
766
767 pv_area_store (stack,
768 pv_add_constant (regs[translate_rreg (rN)], d32),
769 4, regs[E_FS0_REGNUM + fsM]);
770
771 pc += 7;
772 }
773 /* fmov fsM, (d8, SP) */
774 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34)
775 {
776 int fsM, sM, Y;
777 LONGEST d8;
778 gdb_byte buf[2];
779
780 Y = (instr[1] & 0x02) >> 1;
781
782 status = target_read_memory (pc + 2, buf, 2);
783 if (status != 0)
784 break;
785
786 sM = (buf[0] & 0xf0) >> 4;
787 fsM = (Y << 4) | sM;
788 d8 = extract_signed_integer (&buf[1], 1, byte_order);
789
790 pv_area_store (stack,
791 pv_add_constant (regs[E_SP_REGNUM], d8),
792 4, regs[E_FS0_REGNUM + fsM]);
793
794 pc += 4;
795 }
796 /* fmov fsM, (d24, SP) */
797 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34)
798 {
799 int fsM, sM, Y;
800 LONGEST d24;
801 gdb_byte buf[4];
802
803 Y = (instr[1] & 0x02) >> 1;
804
805 status = target_read_memory (pc + 2, buf, 4);
806 if (status != 0)
807 break;
808
809 sM = (buf[0] & 0xf0) >> 4;
810 fsM = (Y << 4) | sM;
811 d24 = extract_signed_integer (&buf[1], 3, byte_order);
812
813 pv_area_store (stack,
814 pv_add_constant (regs[E_SP_REGNUM], d24),
815 4, regs[E_FS0_REGNUM + fsM]);
816
817 pc += 6;
818 }
819 /* fmov fsM, (d32, SP) */
820 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34)
821 {
822 int fsM, sM, Y;
823 LONGEST d32;
824 gdb_byte buf[5];
825
826 Y = (instr[1] & 0x02) >> 1;
827
828 status = target_read_memory (pc + 2, buf, 5);
829 if (status != 0)
830 break;
831
832 sM = (buf[0] & 0xf0) >> 4;
833 fsM = (Y << 4) | sM;
834 d32 = extract_signed_integer (&buf[1], 4, byte_order);
835
836 pv_area_store (stack,
837 pv_add_constant (regs[E_SP_REGNUM], d32),
838 4, regs[E_FS0_REGNUM + fsM]);
839
840 pc += 7;
841 }
842 /* fmov fsM, (rN+) */
843 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31)
844 {
845 int fsM, sM, Y, rN, rN_regnum;
846 gdb_byte buf[1];
847
848 Y = (instr[1] & 0x02) >> 1;
849
850 status = target_read_memory (pc + 2, buf, 1);
851 if (status != 0)
852 break;
853
854 sM = (buf[0] & 0xf0) >> 4;
855 rN = buf[0] & 0x0f;
856 fsM = (Y << 4) | sM;
857
858 rN_regnum = translate_rreg (rN);
859
860 pv_area_store (stack, regs[rN_regnum], 4,
861 regs[E_FS0_REGNUM + fsM]);
862 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
863
864 pc += 3;
865 }
866 /* fmov fsM, (rN+, imm8) */
867 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31)
868 {
869 int fsM, sM, Y, rN, rN_regnum;
870 LONGEST imm8;
871 gdb_byte buf[2];
872
873 Y = (instr[1] & 0x02) >> 1;
874
875 status = target_read_memory (pc + 2, buf, 2);
876 if (status != 0)
877 break;
878
879 sM = (buf[0] & 0xf0) >> 4;
880 rN = buf[0] & 0x0f;
881 fsM = (Y << 4) | sM;
882 imm8 = extract_signed_integer (&buf[1], 1, byte_order);
883
884 rN_regnum = translate_rreg (rN);
885
886 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
887 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
888
889 pc += 4;
890 }
891 /* fmov fsM, (rN+, imm24) */
892 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31)
893 {
894 int fsM, sM, Y, rN, rN_regnum;
895 LONGEST imm24;
896 gdb_byte buf[4];
897
898 Y = (instr[1] & 0x02) >> 1;
899
900 status = target_read_memory (pc + 2, buf, 4);
901 if (status != 0)
902 break;
903
904 sM = (buf[0] & 0xf0) >> 4;
905 rN = buf[0] & 0x0f;
906 fsM = (Y << 4) | sM;
907 imm24 = extract_signed_integer (&buf[1], 3, byte_order);
908
909 rN_regnum = translate_rreg (rN);
910
911 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
912 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
913
914 pc += 6;
915 }
916 /* fmov fsM, (rN+, imm32) */
917 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31)
918 {
919 int fsM, sM, Y, rN, rN_regnum;
920 LONGEST imm32;
921 gdb_byte buf[5];
922
923 Y = (instr[1] & 0x02) >> 1;
924
925 status = target_read_memory (pc + 2, buf, 5);
926 if (status != 0)
927 break;
928
929 sM = (buf[0] & 0xf0) >> 4;
930 rN = buf[0] & 0x0f;
931 fsM = (Y << 4) | sM;
932 imm32 = extract_signed_integer (&buf[1], 4, byte_order);
933
934 rN_regnum = translate_rreg (rN);
935
936 pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
937 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
938
939 pc += 7;
940 }
941 /* mov imm8, aN */
942 else if ((instr[0] & 0xf0) == 0x90)
943 {
944 int aN = instr[0] & 0x03;
945 LONGEST imm8;
946
947 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
948
949 regs[E_A0_REGNUM + aN] = pv_constant (imm8);
950 pc += 2;
951 }
952 /* mov imm16, aN */
953 else if ((instr[0] & 0xfc) == 0x24)
954 {
955 int aN = instr[0] & 0x03;
956 gdb_byte buf[2];
957 LONGEST imm16;
958
959 status = target_read_memory (pc + 1, buf, 2);
960 if (status != 0)
961 break;
962
963 imm16 = extract_signed_integer (buf, 2, byte_order);
964 regs[E_A0_REGNUM + aN] = pv_constant (imm16);
965 pc += 3;
966 }
967 /* mov imm32, aN */
968 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc))
969 {
970 int aN = instr[1] & 0x03;
971 gdb_byte buf[4];
972 LONGEST imm32;
973
974 status = target_read_memory (pc + 2, buf, 4);
975 if (status != 0)
976 break;
977
978 imm32 = extract_signed_integer (buf, 4, byte_order);
979 regs[E_A0_REGNUM + aN] = pv_constant (imm32);
980 pc += 6;
981 }
982 /* mov imm8, dN */
983 else if ((instr[0] & 0xf0) == 0x80)
984 {
985 int dN = instr[0] & 0x03;
986 LONGEST imm8;
987
988 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
989
990 regs[E_D0_REGNUM + dN] = pv_constant (imm8);
991 pc += 2;
992 }
993 /* mov imm16, dN */
994 else if ((instr[0] & 0xfc) == 0x2c)
995 {
996 int dN = instr[0] & 0x03;
997 gdb_byte buf[2];
998 LONGEST imm16;
999
1000 status = target_read_memory (pc + 1, buf, 2);
1001 if (status != 0)
1002 break;
1003
1004 imm16 = extract_signed_integer (buf, 2, byte_order);
1005 regs[E_D0_REGNUM + dN] = pv_constant (imm16);
1006 pc += 3;
1007 }
1008 /* mov imm32, dN */
1009 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc))
1010 {
1011 int dN = instr[1] & 0x03;
1012 gdb_byte buf[4];
1013 LONGEST imm32;
1014
1015 status = target_read_memory (pc + 2, buf, 4);
1016 if (status != 0)
1017 break;
1018
1019 imm32 = extract_signed_integer (buf, 4, byte_order);
1020 regs[E_D0_REGNUM + dN] = pv_constant (imm32);
1021 pc += 6;
1022 }
1023 else
1024 {
1025 /* We've hit some instruction that we don't recognize. Hopefully,
1026 we have enough to do prologue analysis. */
1027 break;
1028 }
1029 }
1030
1031 /* Is the frame size (offset, really) a known constant? */
1032 if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM))
1033 result->frame_size = regs[E_SP_REGNUM].k;
1034
1035 /* Was the frame pointer initialized? */
1036 if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM))
1037 {
1038 result->has_frame_ptr = 1;
1039 result->frame_ptr_offset = regs[E_A3_REGNUM].k;
1040 }
1041
1042 /* Record where all the registers were saved. */
1043 pv_area_scan (stack, check_for_saved, (void *) result);
1044
1045 result->prologue_end = after_last_frame_setup_insn;
1046
1047 do_cleanups (back_to);
1048 }
1049
1050 /* Function: skip_prologue
1051 Return the address of the first inst past the prologue of the function. */
1052
1053 static CORE_ADDR
1054 mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1055 {
1056 const char *name;
1057 CORE_ADDR func_addr, func_end;
1058 struct mn10300_prologue p;
1059
1060 /* Try to find the extent of the function that contains PC. */
1061 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
1062 return pc;
1063
1064 mn10300_analyze_prologue (gdbarch, pc, func_end, &p);
1065 return p.prologue_end;
1066 }
1067
1068 /* Wrapper for mn10300_analyze_prologue: find the function start;
1069 use the current frame PC as the limit, then
1070 invoke mn10300_analyze_prologue and return its result. */
1071 static struct mn10300_prologue *
1072 mn10300_analyze_frame_prologue (struct frame_info *this_frame,
1073 void **this_prologue_cache)
1074 {
1075 if (!*this_prologue_cache)
1076 {
1077 CORE_ADDR func_start, stop_addr;
1078
1079 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue);
1080
1081 func_start = get_frame_func (this_frame);
1082 stop_addr = get_frame_pc (this_frame);
1083
1084 /* If we couldn't find any function containing the PC, then
1085 just initialize the prologue cache, but don't do anything. */
1086 if (!func_start)
1087 stop_addr = func_start;
1088
1089 mn10300_analyze_prologue (get_frame_arch (this_frame),
1090 func_start, stop_addr,
1091 ((struct mn10300_prologue *)
1092 *this_prologue_cache));
1093 }
1094
1095 return (struct mn10300_prologue *) *this_prologue_cache;
1096 }
1097
1098 /* Given the next frame and a prologue cache, return this frame's
1099 base. */
1100 static CORE_ADDR
1101 mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
1102 {
1103 struct mn10300_prologue *p
1104 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1105
1106 /* In functions that use alloca, the distance between the stack
1107 pointer and the frame base varies dynamically, so we can't use
1108 the SP plus static information like prologue analysis to find the
1109 frame base. However, such functions must have a frame pointer,
1110 to be able to restore the SP on exit. So whenever we do have a
1111 frame pointer, use that to find the base. */
1112 if (p->has_frame_ptr)
1113 {
1114 CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM);
1115 return fp - p->frame_ptr_offset;
1116 }
1117 else
1118 {
1119 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1120 return sp - p->frame_size;
1121 }
1122 }
1123
1124 /* Here is a dummy implementation. */
1125 static struct frame_id
1126 mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1127 {
1128 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1129 CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM);
1130 return frame_id_build (sp, pc);
1131 }
1132
1133 static void
1134 mn10300_frame_this_id (struct frame_info *this_frame,
1135 void **this_prologue_cache,
1136 struct frame_id *this_id)
1137 {
1138 *this_id = frame_id_build (mn10300_frame_base (this_frame,
1139 this_prologue_cache),
1140 get_frame_func (this_frame));
1141
1142 }
1143
1144 static struct value *
1145 mn10300_frame_prev_register (struct frame_info *this_frame,
1146 void **this_prologue_cache, int regnum)
1147 {
1148 struct mn10300_prologue *p
1149 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1150 CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache);
1151
1152 if (regnum == E_SP_REGNUM)
1153 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1154
1155 /* If prologue analysis says we saved this register somewhere,
1156 return a description of the stack slot holding it. */
1157 if (p->reg_offset[regnum] != 1)
1158 return frame_unwind_got_memory (this_frame, regnum,
1159 frame_base + p->reg_offset[regnum]);
1160
1161 /* Otherwise, presume we haven't changed the value of this
1162 register, and get it from the next frame. */
1163 return frame_unwind_got_register (this_frame, regnum, regnum);
1164 }
1165
1166 static const struct frame_unwind mn10300_frame_unwind = {
1167 NORMAL_FRAME,
1168 default_frame_unwind_stop_reason,
1169 mn10300_frame_this_id,
1170 mn10300_frame_prev_register,
1171 NULL,
1172 default_frame_sniffer
1173 };
1174
1175 static CORE_ADDR
1176 mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame)
1177 {
1178 ULONGEST pc;
1179
1180 pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM);
1181 return pc;
1182 }
1183
1184 static CORE_ADDR
1185 mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
1186 {
1187 ULONGEST sp;
1188
1189 sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM);
1190 return sp;
1191 }
1192
1193 static void
1194 mn10300_frame_unwind_init (struct gdbarch *gdbarch)
1195 {
1196 dwarf2_append_unwinders (gdbarch);
1197 frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind);
1198 set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id);
1199 set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc);
1200 set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp);
1201 }
1202
1203 /* Function: push_dummy_call
1204 *
1205 * Set up machine state for a target call, including
1206 * function arguments, stack, return address, etc.
1207 *
1208 */
1209
1210 static CORE_ADDR
1211 mn10300_push_dummy_call (struct gdbarch *gdbarch,
1212 struct value *target_func,
1213 struct regcache *regcache,
1214 CORE_ADDR bp_addr,
1215 int nargs, struct value **args,
1216 CORE_ADDR sp,
1217 int struct_return,
1218 CORE_ADDR struct_addr)
1219 {
1220 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1221 const int push_size = register_size (gdbarch, E_PC_REGNUM);
1222 int regs_used;
1223 int len, arg_len;
1224 int stack_offset = 0;
1225 int argnum;
1226 const gdb_byte *val;
1227 gdb_byte valbuf[MAX_REGISTER_SIZE];
1228
1229 /* This should be a nop, but align the stack just in case something
1230 went wrong. Stacks are four byte aligned on the mn10300. */
1231 sp &= ~3;
1232
1233 /* Now make space on the stack for the args.
1234
1235 XXX This doesn't appear to handle pass-by-invisible reference
1236 arguments. */
1237 regs_used = struct_return ? 1 : 0;
1238 for (len = 0, argnum = 0; argnum < nargs; argnum++)
1239 {
1240 arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
1241 while (regs_used < 2 && arg_len > 0)
1242 {
1243 regs_used++;
1244 arg_len -= push_size;
1245 }
1246 len += arg_len;
1247 }
1248
1249 /* Allocate stack space. */
1250 sp -= len;
1251
1252 if (struct_return)
1253 {
1254 regs_used = 1;
1255 regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
1256 }
1257 else
1258 regs_used = 0;
1259
1260 /* Push all arguments onto the stack. */
1261 for (argnum = 0; argnum < nargs; argnum++)
1262 {
1263 /* FIXME what about structs? Unions? */
1264 if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
1265 && TYPE_LENGTH (value_type (*args)) > 8)
1266 {
1267 /* Change to pointer-to-type. */
1268 arg_len = push_size;
1269 store_unsigned_integer (valbuf, push_size, byte_order,
1270 value_address (*args));
1271 val = &valbuf[0];
1272 }
1273 else
1274 {
1275 arg_len = TYPE_LENGTH (value_type (*args));
1276 val = value_contents (*args);
1277 }
1278
1279 while (regs_used < 2 && arg_len > 0)
1280 {
1281 regcache_cooked_write_unsigned (regcache, regs_used,
1282 extract_unsigned_integer (val, push_size, byte_order));
1283 val += push_size;
1284 arg_len -= push_size;
1285 regs_used++;
1286 }
1287
1288 while (arg_len > 0)
1289 {
1290 write_memory (sp + stack_offset, val, push_size);
1291 arg_len -= push_size;
1292 val += push_size;
1293 stack_offset += push_size;
1294 }
1295
1296 args++;
1297 }
1298
1299 /* Make space for the flushback area. */
1300 sp -= 8;
1301
1302 /* Push the return address that contains the magic breakpoint. */
1303 sp -= 4;
1304 write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr);
1305
1306 /* The CPU also writes the return address always into the
1307 MDR register on "call". */
1308 regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr);
1309
1310 /* Update $sp. */
1311 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
1312
1313 /* On the mn10300, it's possible to move some of the stack adjustment
1314 and saving of the caller-save registers out of the prologue and
1315 into the call sites. (When using gcc, this optimization can
1316 occur when using the -mrelax switch.) If this occurs, the dwarf2
1317 info will reflect this fact. We can test to see if this is the
1318 case by creating a new frame using the current stack pointer and
1319 the address of the function that we're about to call. We then
1320 unwind SP and see if it's different than the SP of our newly
1321 created frame. If the SP values are the same, the caller is not
1322 expected to allocate any additional stack. On the other hand, if
1323 the SP values are different, the difference determines the
1324 additional stack that must be allocated.
1325
1326 Note that we don't update the return value though because that's
1327 the value of the stack just after pushing the arguments, but prior
1328 to performing the call. This value is needed in order to
1329 construct the frame ID of the dummy call. */
1330 {
1331 CORE_ADDR func_addr = find_function_addr (target_func, NULL);
1332 CORE_ADDR unwound_sp
1333 = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
1334 if (sp != unwound_sp)
1335 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM,
1336 sp - (unwound_sp - sp));
1337 }
1338
1339 return sp;
1340 }
1341
1342 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1343 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1344 register number. Why don't Dwarf2 and GDB use the same numbering?
1345 Who knows? But since people have object files lying around with
1346 the existing Dwarf2 numbering, and other people have written stubs
1347 to work with the existing GDB, neither of them can change. So we
1348 just have to cope. */
1349 static int
1350 mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2)
1351 {
1352 /* This table is supposed to be shaped like the gdbarch_register_name
1353 initializer in gcc/config/mn10300/mn10300.h. Registers which
1354 appear in GCC's numbering, but have no counterpart in GDB's
1355 world, are marked with a -1. */
1356 static int dwarf2_to_gdb[] = {
1357 E_D0_REGNUM, E_D1_REGNUM, E_D2_REGNUM, E_D3_REGNUM,
1358 E_A0_REGNUM, E_A1_REGNUM, E_A2_REGNUM, E_A3_REGNUM,
1359 -1, E_SP_REGNUM,
1360
1361 E_E0_REGNUM, E_E1_REGNUM, E_E2_REGNUM, E_E3_REGNUM,
1362 E_E4_REGNUM, E_E5_REGNUM, E_E6_REGNUM, E_E7_REGNUM,
1363
1364 E_FS0_REGNUM + 0, E_FS0_REGNUM + 1, E_FS0_REGNUM + 2, E_FS0_REGNUM + 3,
1365 E_FS0_REGNUM + 4, E_FS0_REGNUM + 5, E_FS0_REGNUM + 6, E_FS0_REGNUM + 7,
1366
1367 E_FS0_REGNUM + 8, E_FS0_REGNUM + 9, E_FS0_REGNUM + 10, E_FS0_REGNUM + 11,
1368 E_FS0_REGNUM + 12, E_FS0_REGNUM + 13, E_FS0_REGNUM + 14, E_FS0_REGNUM + 15,
1369
1370 E_FS0_REGNUM + 16, E_FS0_REGNUM + 17, E_FS0_REGNUM + 18, E_FS0_REGNUM + 19,
1371 E_FS0_REGNUM + 20, E_FS0_REGNUM + 21, E_FS0_REGNUM + 22, E_FS0_REGNUM + 23,
1372
1373 E_FS0_REGNUM + 24, E_FS0_REGNUM + 25, E_FS0_REGNUM + 26, E_FS0_REGNUM + 27,
1374 E_FS0_REGNUM + 28, E_FS0_REGNUM + 29, E_FS0_REGNUM + 30, E_FS0_REGNUM + 31,
1375
1376 E_MDR_REGNUM, E_PSW_REGNUM, E_PC_REGNUM
1377 };
1378
1379 if (dwarf2 < 0
1380 || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb))
1381 return -1;
1382
1383 return dwarf2_to_gdb[dwarf2];
1384 }
1385
1386 static struct gdbarch *
1387 mn10300_gdbarch_init (struct gdbarch_info info,
1388 struct gdbarch_list *arches)
1389 {
1390 struct gdbarch *gdbarch;
1391 struct gdbarch_tdep *tdep;
1392 int num_regs;
1393
1394 arches = gdbarch_list_lookup_by_info (arches, &info);
1395 if (arches != NULL)
1396 return arches->gdbarch;
1397
1398 tdep = XNEW (struct gdbarch_tdep);
1399 gdbarch = gdbarch_alloc (&info, tdep);
1400
1401 switch (info.bfd_arch_info->mach)
1402 {
1403 case 0:
1404 case bfd_mach_mn10300:
1405 set_gdbarch_register_name (gdbarch, mn10300_generic_register_name);
1406 tdep->am33_mode = 0;
1407 num_regs = 32;
1408 break;
1409 case bfd_mach_am33:
1410 set_gdbarch_register_name (gdbarch, am33_register_name);
1411 tdep->am33_mode = 1;
1412 num_regs = 32;
1413 break;
1414 case bfd_mach_am33_2:
1415 set_gdbarch_register_name (gdbarch, am33_2_register_name);
1416 tdep->am33_mode = 2;
1417 num_regs = 64;
1418 set_gdbarch_fp0_regnum (gdbarch, 32);
1419 break;
1420 default:
1421 internal_error (__FILE__, __LINE__,
1422 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1423 break;
1424 }
1425
1426 /* By default, chars are unsigned. */
1427 set_gdbarch_char_signed (gdbarch, 0);
1428
1429 /* Registers. */
1430 set_gdbarch_num_regs (gdbarch, num_regs);
1431 set_gdbarch_register_type (gdbarch, mn10300_register_type);
1432 set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
1433 set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
1434 set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
1435 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1436 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1437 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
1438
1439 /* Stack unwinding. */
1440 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1441 /* Breakpoints. */
1442 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
1443 mn10300_breakpoint::kind_from_pc);
1444 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
1445 mn10300_breakpoint::bp_from_kind);
1446 /* decr_pc_after_break? */
1447
1448 /* Stage 2 */
1449 set_gdbarch_return_value (gdbarch, mn10300_return_value);
1450
1451 /* Stage 3 -- get target calls working. */
1452 set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call);
1453 /* set_gdbarch_return_value (store, extract) */
1454
1455
1456 mn10300_frame_unwind_init (gdbarch);
1457
1458 /* Hook in ABI-specific overrides, if they have been registered. */
1459 gdbarch_init_osabi (info, gdbarch);
1460
1461 return gdbarch;
1462 }
1463
1464 /* Dump out the mn10300 specific architecture information. */
1465
1466 static void
1467 mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
1468 {
1469 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1470 fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
1471 tdep->am33_mode);
1472 }
1473
1474 /* Provide a prototype to silence -Wmissing-prototypes. */
1475 extern initialize_file_ftype _initialize_mn10300_tdep;
1476
1477 void
1478 _initialize_mn10300_tdep (void)
1479 {
1480 gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep);
1481 }
1482
This page took 0.060761 seconds and 5 git commands to generate.