gdb/moxie-tdep.c

   1 /* Target-dependent code for Moxie.
   2
   3    Copyright (C) 2009-2013 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "defs.h"
  21 #include "frame.h"
  22 #include "frame-unwind.h"
  23 #include "frame-base.h"
  24 #include "symtab.h"
  25 #include "gdbtypes.h"
  26 #include "gdbcmd.h"
  27 #include "gdbcore.h"
  28 #include "gdb_string.h"
  29 #include "value.h"
  30 #include "inferior.h"
  31 #include "symfile.h"
  32 #include "objfiles.h"
  33 #include "osabi.h"
  34 #include "language.h"
  35 #include "arch-utils.h"
  36 #include "regcache.h"
  37 #include "trad-frame.h"
  38 #include "dis-asm.h"
  39 #include "record.h"
  40 #include "record-full.h"
  41
  42 #include "gdb_assert.h"
  43
  44 #include "moxie-tdep.h"
  45
  46 /* Local functions.  */
  47
  48 extern void _initialize_moxie_tdep (void);
  49
  50 /* Use an invalid address value as 'not available' marker.  */
  51 enum { REG_UNAVAIL = (CORE_ADDR) -1 };
  52
  53 struct moxie_frame_cache
  54 {
  55   /* Base address.  */
  56   CORE_ADDR base;
  57   CORE_ADDR pc;
  58   LONGEST framesize;
  59   CORE_ADDR saved_regs[MOXIE_NUM_REGS];
  60   CORE_ADDR saved_sp;
  61 };
  62
  63 /* Implement the "frame_align" gdbarch method.  */
  64
  65 static CORE_ADDR
  66 moxie_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
  67 {
  68   /* Align to the size of an instruction (so that they can safely be
  69      pushed onto the stack.  */
  70   return sp & ~1;
  71 }
  72
  73 /* Implement the "breakpoint_from_pc" gdbarch method.  */
  74
  75 static const unsigned char *
  76 moxie_breakpoint_from_pc (struct gdbarch *gdbarch,
  77                           CORE_ADDR *pcptr, int *lenptr)
  78 {
  79   static unsigned char breakpoint[] = { 0x35, 0x00 };
  80
  81   *lenptr = sizeof (breakpoint);
  82   return breakpoint;
  83 }
  84
  85 /* Moxie register names.  */
  86
  87 char *moxie_register_names[] = {
  88   "$fp",  "$sp",  "$r0",  "$r1",  "$r2",
  89   "$r3",  "$r4",  "$r5", "$r6", "$r7",
  90   "$r8", "$r9", "$r10", "$r11", "$r12",
  91   "$r13", "$pc", "$cc" };
  92
  93 /* Implement the "register_name" gdbarch method.  */
  94
  95 static const char *
  96 moxie_register_name (struct gdbarch *gdbarch, int reg_nr)
  97 {
  98   if (reg_nr < 0)
  99     return NULL;
 100   if (reg_nr >= MOXIE_NUM_REGS)
 101     return NULL;
 102   return moxie_register_names[reg_nr];
 103 }
 104
 105 /* Implement the "register_type" gdbarch method.  */
 106
 107 static struct type *
 108 moxie_register_type (struct gdbarch *gdbarch, int reg_nr)
 109 {
 110   if (reg_nr == MOXIE_PC_REGNUM)
 111     return  builtin_type (gdbarch)->builtin_func_ptr;
 112   else if (reg_nr == MOXIE_SP_REGNUM || reg_nr == MOXIE_FP_REGNUM)
 113     return builtin_type (gdbarch)->builtin_data_ptr;
 114   else
 115     return builtin_type (gdbarch)->builtin_int32;
 116 }
 117
 118 /* Write into appropriate registers a function return value
 119    of type TYPE, given in virtual format.  */
 120
 121 static void
 122 moxie_store_return_value (struct type *type, struct regcache *regcache,
 123                          const void *valbuf)
 124 {
 125   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 126   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 127   CORE_ADDR regval;
 128   int len = TYPE_LENGTH (type);
 129
 130   /* Things always get returned in RET1_REGNUM, RET2_REGNUM.  */
 131   regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order);
 132   regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval);
 133   if (len > 4)
 134     {
 135       regval = extract_unsigned_integer ((gdb_byte *) valbuf + 4,
 136                                          len - 4, byte_order);
 137       regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval);
 138     }
 139 }
 140
 141 /* Decode the instructions within the given address range.  Decide
 142    when we must have reached the end of the function prologue.  If a
 143    frame_info pointer is provided, fill in its saved_regs etc.
 144
 145    Returns the address of the first instruction after the prologue.  */
 146
 147 static CORE_ADDR
 148 moxie_analyze_prologue (CORE_ADDR start_addr, CORE_ADDR end_addr,
 149                         struct moxie_frame_cache *cache,
 150                         struct gdbarch *gdbarch)
 151 {
 152   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 153   CORE_ADDR next_addr;
 154   ULONGEST inst, inst2;
 155   LONGEST offset;
 156   int regnum;
 157
 158   /* Record where the jsra instruction saves the PC and FP.  */
 159   cache->saved_regs[MOXIE_PC_REGNUM] = -4;
 160   cache->saved_regs[MOXIE_FP_REGNUM] = 0;
 161   cache->framesize = 0;
 162
 163   if (start_addr >= end_addr)
 164     return end_addr;
 165
 166   for (next_addr = start_addr; next_addr < end_addr; )
 167     {
 168       inst = read_memory_unsigned_integer (next_addr, 2, byte_order);
 169
 170       /* Match "push $sp $rN" where N is between 0 and 13 inclusive.  */
 171       if (inst >= 0x0612 && inst <= 0x061f)
 172         {
 173           regnum = inst & 0x000f;
 174           cache->framesize += 4;
 175           cache->saved_regs[regnum] = cache->framesize;
 176           next_addr += 2;
 177         }
 178       else
 179         break;
 180     }
 181
 182   inst = read_memory_unsigned_integer (next_addr, 2, byte_order);
 183
 184   /* Optional stack allocation for args and local vars <= 4
 185      byte.  */
 186   if (inst == 0x01e0)          /* ldi.l $r12, X */
 187     {
 188       offset = read_memory_integer (next_addr + 2, 4, byte_order);
 189       inst2 = read_memory_unsigned_integer (next_addr + 6, 2, byte_order);
 190
 191       if (inst2 == 0x291e)     /* sub.l $sp, $r12 */
 192         {
 193           cache->framesize += offset;
 194         }
 195
 196       return (next_addr + 8);
 197     }
 198   else if ((inst & 0xff00) == 0x9100)   /* dec $sp, X */
 199     {
 200       cache->framesize += (inst & 0x00ff);
 201       next_addr += 2;
 202
 203       while (next_addr < end_addr)
 204         {
 205           inst = read_memory_unsigned_integer (next_addr, 2, byte_order);
 206           if ((inst & 0xff00) != 0x9100) /* no more dec $sp, X */
 207             break;
 208           cache->framesize += (inst & 0x00ff);
 209           next_addr += 2;
 210         }
 211     }
 212
 213   return next_addr;
 214 }
 215
 216 /* Find the end of function prologue.  */
 217
 218 static CORE_ADDR
 219 moxie_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
 220 {
 221   CORE_ADDR func_addr = 0, func_end = 0;
 222   const char *func_name;
 223
 224   /* See if we can determine the end of the prologue via the symbol table.
 225      If so, then return either PC, or the PC after the prologue, whichever
 226      is greater.  */
 227   if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end))
 228     {
 229       CORE_ADDR post_prologue_pc
 230         = skip_prologue_using_sal (gdbarch, func_addr);
 231       if (post_prologue_pc != 0)
 232         return max (pc, post_prologue_pc);
 233       else
 234         {
 235           /* Can't determine prologue from the symbol table, need to examine
 236              instructions.  */
 237           struct symtab_and_line sal;
 238           struct symbol *sym;
 239           struct moxie_frame_cache cache;
 240           CORE_ADDR plg_end;
 241
 242           memset (&cache, 0, sizeof cache);
 243
 244           plg_end = moxie_analyze_prologue (func_addr,
 245                                             func_end, &cache, gdbarch);
 246           /* Found a function.  */
 247           sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL);
 248           /* Don't use line number debug info for assembly source
 249              files.  */
 250           if (sym && SYMBOL_LANGUAGE (sym) != language_asm)
 251             {
 252               sal = find_pc_line (func_addr, 0);
 253               if (sal.end && sal.end < func_end)
 254                 {
 255                   /* Found a line number, use it as end of
 256                      prologue.  */
 257                   return sal.end;
 258                 }
 259             }
 260           /* No useable line symbol.  Use result of prologue parsing
 261              method.  */
 262           return plg_end;
 263         }
 264     }
 265
 266   /* No function symbol -- just return the PC.  */
 267   return (CORE_ADDR) pc;
 268 }
 269
 270 struct moxie_unwind_cache
 271 {
 272   /* The previous frame's inner most stack address.  Used as this
 273      frame ID's stack_addr.  */
 274   CORE_ADDR prev_sp;
 275   /* The frame's base, optionally used by the high-level debug info.  */
 276   CORE_ADDR base;
 277   int size;
 278   /* How far the SP and r13 (FP) have been offset from the start of
 279      the stack frame (as defined by the previous frame's stack
 280      pointer).  */
 281   LONGEST sp_offset;
 282   LONGEST r13_offset;
 283   int uses_frame;
 284   /* Table indicating the location of each and every register.  */
 285   struct trad_frame_saved_reg *saved_regs;
 286 };
 287
 288 /* Implement the "read_pc" gdbarch method.  */
 289
 290 static CORE_ADDR
 291 moxie_read_pc (struct regcache *regcache)
 292 {
 293   ULONGEST pc;
 294
 295   regcache_cooked_read_unsigned (regcache, MOXIE_PC_REGNUM, &pc);
 296   return pc;
 297 }
 298
 299 /* Implement the "write_pc" gdbarch method.  */
 300
 301 static void
 302 moxie_write_pc (struct regcache *regcache, CORE_ADDR val)
 303 {
 304   regcache_cooked_write_unsigned (regcache, MOXIE_PC_REGNUM, val);
 305 }
 306
 307 /* Implement the "unwind_sp" gdbarch method.  */
 308
 309 static CORE_ADDR
 310 moxie_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
 311 {
 312   return frame_unwind_register_unsigned (next_frame, MOXIE_SP_REGNUM);
 313 }
 314
 315 /* Given a return value in `regbuf' with a type `valtype',
 316    extract and copy its value into `valbuf'.  */
 317
 318 static void
 319 moxie_extract_return_value (struct type *type, struct regcache *regcache,
 320                            void *dst)
 321 {
 322   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 323   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 324   bfd_byte *valbuf = dst;
 325   int len = TYPE_LENGTH (type);
 326   ULONGEST tmp;
 327
 328   /* By using store_unsigned_integer we avoid having to do
 329      anything special for small big-endian values.  */
 330   regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp);
 331   store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), byte_order, tmp);
 332
 333   /* Ignore return values more than 8 bytes in size because the moxie
 334      returns anything more than 8 bytes in the stack.  */
 335   if (len > 4)
 336     {
 337       regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp);
 338       store_unsigned_integer (valbuf + len - 4, 4, byte_order, tmp);
 339     }
 340 }
 341
 342 /* Implement the "return_value" gdbarch method.  */
 343
 344 static enum return_value_convention
 345 moxie_return_value (struct gdbarch *gdbarch, struct value *function,
 346                    struct type *valtype, struct regcache *regcache,
 347                    gdb_byte *readbuf, const gdb_byte *writebuf)
 348 {
 349   if (TYPE_LENGTH (valtype) > 8)
 350     return RETURN_VALUE_STRUCT_CONVENTION;
 351   else
 352     {
 353       if (readbuf != NULL)
 354         moxie_extract_return_value (valtype, regcache, readbuf);
 355       if (writebuf != NULL)
 356         moxie_store_return_value (valtype, regcache, writebuf);
 357       return RETURN_VALUE_REGISTER_CONVENTION;
 358     }
 359 }
 360
 361 /* Allocate and initialize a moxie_frame_cache object.  */
 362
 363 static struct moxie_frame_cache *
 364 moxie_alloc_frame_cache (void)
 365 {
 366   struct moxie_frame_cache *cache;
 367   int i;
 368
 369   cache = FRAME_OBSTACK_ZALLOC (struct moxie_frame_cache);
 370
 371   cache->base = 0;
 372   cache->saved_sp = 0;
 373   cache->pc = 0;
 374   cache->framesize = 0;
 375   for (i = 0; i < MOXIE_NUM_REGS; ++i)
 376     cache->saved_regs[i] = REG_UNAVAIL;
 377
 378   return cache;
 379 }
 380
 381 /* Populate a moxie_frame_cache object for this_frame.  */
 382
 383 static struct moxie_frame_cache *
 384 moxie_frame_cache (struct frame_info *this_frame, void **this_cache)
 385 {
 386   struct moxie_frame_cache *cache;
 387   CORE_ADDR current_pc;
 388   int i;
 389
 390   if (*this_cache)
 391     return *this_cache;
 392
 393   cache = moxie_alloc_frame_cache ();
 394   *this_cache = cache;
 395
 396   cache->base = get_frame_register_unsigned (this_frame, MOXIE_FP_REGNUM);
 397   if (cache->base == 0)
 398     return cache;
 399
 400   cache->pc = get_frame_func (this_frame);
 401   current_pc = get_frame_pc (this_frame);
 402   if (cache->pc)
 403     {
 404       struct gdbarch *gdbarch = get_frame_arch (this_frame);
 405       moxie_analyze_prologue (cache->pc, current_pc, cache, gdbarch);
 406     }
 407
 408   cache->saved_sp = cache->base - cache->framesize;
 409
 410   for (i = 0; i < MOXIE_NUM_REGS; ++i)
 411     if (cache->saved_regs[i] != REG_UNAVAIL)
 412       cache->saved_regs[i] = cache->base - cache->saved_regs[i];
 413
 414   return cache;
 415 }
 416
 417 /* Implement the "unwind_pc" gdbarch method.  */
 418
 419 static CORE_ADDR
 420 moxie_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
 421 {
 422   return frame_unwind_register_unsigned (next_frame, MOXIE_PC_REGNUM);
 423 }
 424
 425 /* Given a GDB frame, determine the address of the calling function's
 426    frame.  This will be used to create a new GDB frame struct.  */
 427
 428 static void
 429 moxie_frame_this_id (struct frame_info *this_frame,
 430                     void **this_prologue_cache, struct frame_id *this_id)
 431 {
 432   struct moxie_frame_cache *cache = moxie_frame_cache (this_frame,
 433                                                    this_prologue_cache);
 434
 435   /* This marks the outermost frame.  */
 436   if (cache->base == 0)
 437     return;
 438
 439   *this_id = frame_id_build (cache->saved_sp, cache->pc);
 440 }
 441
 442 /* Get the value of register regnum in the previous stack frame.  */
 443
 444 static struct value *
 445 moxie_frame_prev_register (struct frame_info *this_frame,
 446                           void **this_prologue_cache, int regnum)
 447 {
 448   struct moxie_frame_cache *cache = moxie_frame_cache (this_frame,
 449                                                    this_prologue_cache);
 450
 451   gdb_assert (regnum >= 0);
 452
 453   if (regnum == MOXIE_SP_REGNUM && cache->saved_sp)
 454     return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
 455
 456   if (regnum < MOXIE_NUM_REGS && cache->saved_regs[regnum] != REG_UNAVAIL)
 457     return frame_unwind_got_memory (this_frame, regnum,
 458                                     cache->saved_regs[regnum]);
 459
 460   return frame_unwind_got_register (this_frame, regnum, regnum);
 461 }
 462
 463 static const struct frame_unwind moxie_frame_unwind = {
 464   NORMAL_FRAME,
 465   default_frame_unwind_stop_reason,
 466   moxie_frame_this_id,
 467   moxie_frame_prev_register,
 468   NULL,
 469   default_frame_sniffer
 470 };
 471
 472 /* Return the base address of this_frame.  */
 473
 474 static CORE_ADDR
 475 moxie_frame_base_address (struct frame_info *this_frame, void **this_cache)
 476 {
 477   struct moxie_frame_cache *cache = moxie_frame_cache (this_frame,
 478                                                        this_cache);
 479
 480   return cache->base;
 481 }
 482
 483 static const struct frame_base moxie_frame_base = {
 484   &moxie_frame_unwind,
 485   moxie_frame_base_address,
 486   moxie_frame_base_address,
 487   moxie_frame_base_address
 488 };
 489
 490 static struct frame_id
 491 moxie_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
 492 {
 493   CORE_ADDR sp = get_frame_register_unsigned (this_frame, MOXIE_SP_REGNUM);
 494
 495   return frame_id_build (sp, get_frame_pc (this_frame));
 496 }
 497
 498 /* Read an unsigned integer from the inferior, and adjust
 499    endianess.  */
 500 static ULONGEST
 501 moxie_process_readu (CORE_ADDR addr, gdb_byte *buf,
 502                      int length, enum bfd_endian byte_order)
 503 {
 504   if (target_read_memory (addr, buf, length))
 505     {
 506       if (record_debug)
 507         printf_unfiltered (_("Process record: error reading memory at "
 508                              "addr 0x%s len = %d.\n"),
 509                            paddress (target_gdbarch (), addr), length);
 510       return -1;
 511     }
 512
 513   return extract_unsigned_integer (buf, length, byte_order);
 514 }
 515
 516 /* Parse the current instruction and record the values of the registers and
 517    memory that will be changed in current instruction to "record_arch_list".
 518    Return -1 if something wrong.  */
 519
 520 static int
 521 moxie_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
 522                       CORE_ADDR addr)
 523 {
 524   gdb_byte buf[4];
 525   uint16_t inst;
 526   uint32_t tmpu32;
 527   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 528
 529   if (record_debug > 1)
 530     fprintf_unfiltered (gdb_stdlog, "Process record: moxie_process_record "
 531                                     "addr = 0x%s\n",
 532                         paddress (target_gdbarch (), addr));
 533
 534   inst = (uint16_t) moxie_process_readu (addr, buf, 2, byte_order);
 535
 536   /* Decode instruction.  */
 537   if (inst & (1 << 15))
 538     {
 539       if (inst & (1 << 14))
 540         {
 541           /* This is a Form 3 instruction.  */
 542           int opcode = (inst >> 10 & 0xf);
 543
 544           switch (opcode)
 545             {
 546             case 0x00: /* beq */
 547             case 0x01: /* bne */
 548             case 0x02: /* blt */
 549             case 0x03: /* bgt */
 550             case 0x04: /* bltu */
 551             case 0x05: /* bgtu */
 552             case 0x06: /* bge */
 553             case 0x07: /* ble */
 554             case 0x08: /* bgeu */
 555             case 0x09: /* bleu */
 556               /* Do nothing.  */
 557               break;
 558             default:
 559               {
 560                 /* Do nothing.  */
 561                 break;
 562               }
 563             }
 564         }
 565       else
 566         {
 567           /* This is a Form 2 instruction.  */
 568           int opcode = (inst >> 12 & 0x3);
 569           switch (opcode)
 570             {
 571             case 0x00: /* inc */
 572             case 0x01: /* dec */
 573             case 0x02: /* gsr */
 574               {
 575                 int reg = (inst >> 8) & 0xf;
 576                 if (record_full_arch_list_add_reg (regcache, reg))
 577                   return -1;
 578               }
 579               break;
 580             case 0x03: /* ssr */
 581               {
 582                 /* Do nothing until GDB learns about moxie's special
 583                    registers.  */
 584               }
 585               break;
 586             default:
 587               /* Do nothing.  */
 588               break;
 589             }
 590         }
 591     }
 592   else
 593     {
 594       /* This is a Form 1 instruction.  */
 595       int opcode = inst >> 8;
 596
 597       switch (opcode)
 598         {
 599         case 0x00: /* nop */
 600           /* Do nothing.  */
 601           break;
 602         case 0x01: /* ldi.l (immediate) */
 603         case 0x02: /* mov (register-to-register) */
 604           {
 605             int reg = (inst >> 4) & 0xf;
 606             if (record_full_arch_list_add_reg (regcache, reg))
 607               return -1;
 608           }
 609           break;
 610         case 0x03: /* jsra */
 611           {
 612             regcache_raw_read (regcache,
 613                                MOXIE_SP_REGNUM, (gdb_byte *) & tmpu32);
 614             tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
 615                                                4, byte_order);
 616             if (record_full_arch_list_add_reg (regcache, MOXIE_FP_REGNUM)
 617                 || (record_full_arch_list_add_reg (regcache,
 618                                                    MOXIE_SP_REGNUM))
 619                 || record_full_arch_list_add_mem (tmpu32 - 12, 12))
 620               return -1;
 621           }
 622           break;
 623         case 0x04: /* ret */
 624           {
 625             if (record_full_arch_list_add_reg (regcache, MOXIE_FP_REGNUM)
 626                 || (record_full_arch_list_add_reg (regcache,
 627                                                    MOXIE_SP_REGNUM)))
 628               return -1;
 629           }
 630           break;
 631         case 0x05: /* add.l */
 632           {
 633             int reg = (inst >> 4) & 0xf;
 634             if (record_full_arch_list_add_reg (regcache, reg))
 635               return -1;
 636           }
 637           break;
 638         case 0x06: /* push */
 639           {
 640             int reg = (inst >> 4) & 0xf;
 641             regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
 642             tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
 643                                                4, byte_order);
 644             if (record_full_arch_list_add_reg (regcache, reg)
 645                 || record_full_arch_list_add_mem (tmpu32 - 4, 4))
 646               return -1;
 647           }
 648           break;
 649         case 0x07: /* pop */
 650           {
 651             int a = (inst >> 4) & 0xf;
 652             int b = inst & 0xf;
 653             if (record_full_arch_list_add_reg (regcache, a)
 654                 || record_full_arch_list_add_reg (regcache, b))
 655               return -1;
 656           }
 657           break;
 658         case 0x08: /* lda.l */
 659           {
 660             int reg = (inst >> 4) & 0xf;
 661             if (record_full_arch_list_add_reg (regcache, reg))
 662               return -1;
 663           }
 664           break;
 665         case 0x09: /* sta.l */
 666           {
 667             tmpu32 = (uint32_t) moxie_process_readu (addr+2, buf,
 668                                                      4, byte_order);
 669             if (record_full_arch_list_add_mem (tmpu32, 4))
 670               return -1;
 671           }
 672           break;
 673         case 0x0a: /* ld.l (register indirect) */
 674           {
 675             int reg = (inst >> 4) & 0xf;
 676             if (record_full_arch_list_add_reg (regcache, reg))
 677               return -1;
 678           }
 679           break;
 680         case 0x0b: /* st.l */
 681           {
 682             int reg = (inst >> 4) & 0xf;
 683             regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
 684             tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
 685                                                4, byte_order);
 686             if (record_full_arch_list_add_mem (tmpu32, 4))
 687               return -1;
 688           }
 689           break;
 690         case 0x0c: /* ldo.l */
 691           {
 692             int reg = (inst >> 4) & 0xf;
 693             if (record_full_arch_list_add_reg (regcache, reg))
 694               return -1;
 695           }
 696           break;
 697         case 0x0d: /* sto.l */
 698           {
 699             int reg = (inst >> 4) & 0xf;
 700             uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
 701                                                               byte_order);
 702             regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
 703             tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
 704                                                4, byte_order);
 705             tmpu32 += offset;
 706             if (record_full_arch_list_add_mem (tmpu32, 4))
 707               return -1;
 708           }
 709           break;
 710         case 0x0e: /* cmp */
 711           {
 712             if (record_full_arch_list_add_reg (regcache, MOXIE_CC_REGNUM))
 713               return -1;
 714           }
 715           break;
 716         case 0x0f:
 717         case 0x10:
 718         case 0x11:
 719         case 0x12:
 720         case 0x13:
 721         case 0x14:
 722         case 0x15:
 723         case 0x16:
 724         case 0x17:
 725         case 0x18:
 726           {
 727             /* Do nothing.  */
 728             break;
 729           }
 730         case 0x19: /* jsr */
 731           {
 732             regcache_raw_read (regcache,
 733                                MOXIE_SP_REGNUM, (gdb_byte *) & tmpu32);
 734             tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
 735                                                4, byte_order);
 736             if (record_full_arch_list_add_reg (regcache, MOXIE_FP_REGNUM)
 737                 || (record_full_arch_list_add_reg (regcache,
 738                                                    MOXIE_SP_REGNUM))
 739                 || record_full_arch_list_add_mem (tmpu32 - 12, 12))
 740               return -1;
 741           }
 742           break;
 743         case 0x1a: /* jmpa */
 744           {
 745             /* Do nothing.  */
 746           }
 747           break;
 748         case 0x1b: /* ldi.b (immediate) */
 749         case 0x1c: /* ld.b (register indirect) */
 750         case 0x1d: /* lda.b */
 751           {
 752             int reg = (inst >> 4) & 0xf;
 753             if (record_full_arch_list_add_reg (regcache, reg))
 754               return -1;
 755           }
 756           break;
 757         case 0x1e: /* st.b */
 758           {
 759             int reg = (inst >> 4) & 0xf;
 760             regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
 761             tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
 762                                                4, byte_order);
 763             if (record_full_arch_list_add_mem (tmpu32, 1))
 764               return -1;
 765           }
 766           break;
 767         case 0x1f: /* sta.b */
 768           {
 769             tmpu32 = moxie_process_readu (addr+2, buf, 4, byte_order);
 770             if (record_full_arch_list_add_mem (tmpu32, 1))
 771               return -1;
 772           }
 773           break;
 774         case 0x20: /* ldi.s (immediate) */
 775         case 0x21: /* ld.s (register indirect) */
 776         case 0x22: /* lda.s */
 777           {
 778             int reg = (inst >> 4) & 0xf;
 779             if (record_full_arch_list_add_reg (regcache, reg))
 780               return -1;
 781           }
 782           break;
 783         case 0x23: /* st.s */
 784           {
 785             int reg = (inst >> 4) & 0xf;
 786             regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
 787             tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
 788                                                4, byte_order);
 789             if (record_full_arch_list_add_mem (tmpu32, 2))
 790               return -1;
 791           }
 792           break;
 793         case 0x24: /* sta.s */
 794           {
 795             tmpu32 = moxie_process_readu (addr+2, buf, 4, byte_order);
 796             if (record_full_arch_list_add_mem (tmpu32, 2))
 797               return -1;
 798           }
 799           break;
 800         case 0x25: /* jmp */
 801           {
 802             /* Do nothing.  */
 803           }
 804           break;
 805         case 0x26: /* and */
 806         case 0x27: /* lshr */
 807         case 0x28: /* ashl */
 808         case 0x29: /* sub.l */
 809         case 0x2a: /* neg */
 810         case 0x2b: /* or */
 811         case 0x2c: /* not */
 812         case 0x2d: /* ashr */
 813         case 0x2e: /* xor */
 814         case 0x2f: /* mul.l */
 815           {
 816             int reg = (inst >> 4) & 0xf;
 817             if (record_full_arch_list_add_reg (regcache, reg))
 818               return -1;
 819           }
 820           break;
 821         case 0x30: /* swi */
 822           {
 823             /* We currently implement support for libgloss'
 824                system calls.  */
 825
 826             int inum = moxie_process_readu (addr+2, buf, 4, byte_order);
 827
 828             switch (inum)
 829               {
 830               case 0x1: /* SYS_exit */
 831                 {
 832                   /* Do nothing.  */
 833                 }
 834                 break;
 835               case 0x2: /* SYS_open */
 836                 {
 837                   if (record_full_arch_list_add_reg (regcache, RET1_REGNUM))
 838                     return -1;
 839                 }
 840                 break;
 841               case 0x4: /* SYS_read */
 842                 {
 843                   uint32_t length, ptr;
 844
 845                   /* Read buffer pointer is in $r1.  */
 846                   regcache_raw_read (regcache, 3, (gdb_byte *) & ptr);
 847                   ptr = extract_unsigned_integer ((gdb_byte *) & ptr,
 848                                                   4, byte_order);
 849
 850                   /* String length is at 0x12($fp).  */
 851                   regcache_raw_read (regcache,
 852                                      MOXIE_FP_REGNUM, (gdb_byte *) & tmpu32);
 853                   tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
 854                                                      4, byte_order);
 855                   length = moxie_process_readu (tmpu32+20, buf, 4, byte_order);
 856
 857                   if (record_full_arch_list_add_mem (ptr, length))
 858                     return -1;
 859                 }
 860                 break;
 861               case 0x5: /* SYS_write */
 862                 {
 863                   if (record_full_arch_list_add_reg (regcache, RET1_REGNUM))
 864                     return -1;
 865                 }
 866                 break;
 867               default:
 868                 break;
 869               }
 870           }
 871           break;
 872         case 0x31: /* div.l */
 873         case 0x32: /* udiv.l */
 874         case 0x33: /* mod.l */
 875         case 0x34: /* umod.l */
 876           {
 877             int reg = (inst >> 4) & 0xf;
 878             if (record_full_arch_list_add_reg (regcache, reg))
 879               return -1;
 880           }
 881           break;
 882         case 0x35: /* brk */
 883           /* Do nothing.  */
 884           break;
 885         case 0x36: /* ldo.b */
 886           {
 887             int reg = (inst >> 4) & 0xf;
 888             if (record_full_arch_list_add_reg (regcache, reg))
 889               return -1;
 890           }
 891           break;
 892         case 0x37: /* sto.b */
 893           {
 894             int reg = (inst >> 4) & 0xf;
 895             uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
 896                                                               byte_order);
 897             regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
 898             tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
 899                                                4, byte_order);
 900             tmpu32 += offset;
 901             if (record_full_arch_list_add_mem (tmpu32, 1))
 902               return -1;
 903           }
 904           break;
 905         case 0x38: /* ldo.s */
 906           {
 907             int reg = (inst >> 4) & 0xf;
 908             if (record_full_arch_list_add_reg (regcache, reg))
 909               return -1;
 910           }
 911           break;
 912         case 0x39: /* sto.s */
 913           {
 914             int reg = (inst >> 4) & 0xf;
 915             uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4,
 916                                                               byte_order);
 917             regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32);
 918             tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32,
 919                                                4, byte_order);
 920             tmpu32 += offset;
 921             if (record_full_arch_list_add_mem (tmpu32, 2))
 922               return -1;
 923           }
 924           break;
 925         default:
 926           /* Do nothing.  */
 927           break;
 928         }
 929     }
 930
 931   if (record_full_arch_list_add_reg (regcache, MOXIE_PC_REGNUM))
 932     return -1;
 933   if (record_full_arch_list_add_end ())
 934     return -1;
 935   return 0;
 936 }
 937
 938 /* Allocate and initialize the moxie gdbarch object.  */
 939
 940 static struct gdbarch *
 941 moxie_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 942 {
 943   struct gdbarch *gdbarch;
 944   struct gdbarch_tdep *tdep;
 945
 946   /* If there is already a candidate, use it.  */
 947   arches = gdbarch_list_lookup_by_info (arches, &info);
 948   if (arches != NULL)
 949     return arches->gdbarch;
 950
 951   /* Allocate space for the new architecture.  */
 952   tdep = XMALLOC (struct gdbarch_tdep);
 953   gdbarch = gdbarch_alloc (&info, tdep);
 954
 955   set_gdbarch_read_pc (gdbarch, moxie_read_pc);
 956   set_gdbarch_write_pc (gdbarch, moxie_write_pc);
 957   set_gdbarch_unwind_sp (gdbarch, moxie_unwind_sp);
 958
 959   set_gdbarch_num_regs (gdbarch, MOXIE_NUM_REGS);
 960   set_gdbarch_sp_regnum (gdbarch, MOXIE_SP_REGNUM);
 961   set_gdbarch_pc_regnum (gdbarch, MOXIE_PC_REGNUM);
 962   set_gdbarch_register_name (gdbarch, moxie_register_name);
 963   set_gdbarch_register_type (gdbarch, moxie_register_type);
 964
 965   set_gdbarch_return_value (gdbarch, moxie_return_value);
 966
 967   set_gdbarch_skip_prologue (gdbarch, moxie_skip_prologue);
 968   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
 969   set_gdbarch_breakpoint_from_pc (gdbarch, moxie_breakpoint_from_pc);
 970   set_gdbarch_frame_align (gdbarch, moxie_frame_align);
 971
 972   frame_base_set_default (gdbarch, &moxie_frame_base);
 973
 974   /* Methods for saving / extracting a dummy frame's ID.  The ID's
 975      stack address must match the SP value returned by
 976      PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos.  */
 977   set_gdbarch_dummy_id (gdbarch, moxie_dummy_id);
 978
 979   set_gdbarch_unwind_pc (gdbarch, moxie_unwind_pc);
 980
 981   set_gdbarch_print_insn (gdbarch, print_insn_moxie);
 982
 983   /* Hook in ABI-specific overrides, if they have been registered.  */
 984   gdbarch_init_osabi (info, gdbarch);
 985
 986   /* Hook in the default unwinders.  */
 987   frame_unwind_append_unwinder (gdbarch, &moxie_frame_unwind);
 988
 989   /* Support simple overlay manager.  */
 990   set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
 991
 992   /* Support reverse debugging.  */
 993   set_gdbarch_process_record (gdbarch, moxie_process_record);
 994
 995   return gdbarch;
 996 }
 997
 998 /* Register this machine's init routine.  */
 999
1000 void
1001 _initialize_moxie_tdep (void)
1002 {
1003   register_gdbarch_init (bfd_arch_moxie, moxie_gdbarch_init);
1004 }