gdb/ppc-sysv-tdep.c

   1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
   2    for GDB, the GNU debugger.
   3
   4    Copyright 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 59 Temple Place - Suite 330,
  21    Boston, MA 02111-1307, USA.  */
  22
  23 #include "defs.h"
  24 #include "gdbcore.h"
  25 #include "inferior.h"
  26 #include "regcache.h"
  27 #include "value.h"
  28 #include "gdb_string.h"
  29 #include "gdb_assert.h"
  30 #include "ppc-tdep.h"
  31 #include "target.h"
  32
  33 /* Pass the arguments in either registers, or in the stack. Using the
  34    ppc sysv ABI, the first eight words of the argument list (that might
  35    be less than eight parameters if some parameters occupy more than one
  36    word) are passed in r3..r10 registers.  float and double parameters are
  37    passed in fpr's, in addition to that. Rest of the parameters if any
  38    are passed in user stack.
  39
  40    If the function is returning a structure, then the return address is passed
  41    in r3, then the first 7 words of the parametes can be passed in registers,
  42    starting from r4. */
  43
  44 CORE_ADDR
  45 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
  46                               struct regcache *regcache, CORE_ADDR bp_addr,
  47                               int nargs, struct value **args, CORE_ADDR sp,
  48                               int struct_return, CORE_ADDR struct_addr)
  49 {
  50   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
  51   const CORE_ADDR saved_sp = read_sp ();
  52   int argspace = 0;             /* 0 is an initial wrong guess.  */
  53   int write_pass;
  54
  55   /* Go through the argument list twice.
  56
  57      Pass 1: Figure out how much new stack space is required for
  58      arguments and pushed values.  Unlike the PowerOpen ABI, the SysV
  59      ABI doesn't reserve any extra space for parameters which are put
  60      in registers, but does always push structures and then pass their
  61      address.
  62
  63      Pass 2: Replay the same computation but this time also write the
  64      values out to the target.  */
  65
  66   for (write_pass = 0; write_pass < 2; write_pass++)
  67     {
  68       int argno;
  69       /* Next available floating point register for float and double
  70          arguments.  */
  71       int freg = 1;
  72       /* Next available general register for non-float, non-vector
  73          arguments.  */
  74       int greg = 3;
  75       /* Next available vector register for vector arguments.  */
  76       int vreg = 2;
  77       /* Arguments start above the "LR save word" and "Back chain".  */
  78       int argoffset = 2 * tdep->wordsize;
  79       /* Structures start after the arguments.  */
  80       int structoffset = argoffset + argspace;
  81
  82       /* If the function is returning a `struct', then the first word
  83          (which will be passed in r3) is used for struct return
  84          address.  In that case we should advance one word and start
  85          from r4 register to copy parameters.  */
  86       if (struct_return)
  87         {
  88           if (write_pass)
  89             regcache_cooked_write_signed (regcache,
  90                                           tdep->ppc_gp0_regnum + greg,
  91                                           struct_addr);
  92           greg++;
  93         }
  94
  95       for (argno = 0; argno < nargs; argno++)
  96         {
  97           struct value *arg = args[argno];
  98           struct type *type = check_typedef (VALUE_TYPE (arg));
  99           int len = TYPE_LENGTH (type);
 100           char *val = VALUE_CONTENTS (arg);
 101
 102           if (TYPE_CODE (type) == TYPE_CODE_FLT
 103               && ppc_floating_point_unit_p (current_gdbarch) && len <= 8)
 104             {
 105               /* Floating point value converted to "double" then
 106                  passed in an FP register, when the registers run out,
 107                  8 byte aligned stack is used.  */
 108               if (freg <= 8)
 109                 {
 110                   if (write_pass)
 111                     {
 112                       /* Always store the floating point value using
 113                          the register's floating-point format.  */
 114                       char regval[MAX_REGISTER_SIZE];
 115                       struct type *regtype
 116                         = register_type (gdbarch, FP0_REGNUM + freg);
 117                       convert_typed_floating (val, type, regval, regtype);
 118                       regcache_cooked_write (regcache, FP0_REGNUM + freg,
 119                                              regval);
 120                     }
 121                   freg++;
 122                 }
 123               else
 124                 {
 125                   /* SysV ABI converts floats to doubles before
 126                      writing them to an 8 byte aligned stack location.  */
 127                   argoffset = align_up (argoffset, 8);
 128                   if (write_pass)
 129                     {
 130                       char memval[8];
 131                       struct type *memtype;
 132                       switch (TARGET_BYTE_ORDER)
 133                         {
 134                         case BFD_ENDIAN_BIG:
 135                           memtype = builtin_type_ieee_double_big;
 136                           break;
 137                         case BFD_ENDIAN_LITTLE:
 138                           memtype = builtin_type_ieee_double_little;
 139                           break;
 140                         default:
 141                           internal_error (__FILE__, __LINE__, "bad switch");
 142                         }
 143                       convert_typed_floating (val, type, memval, memtype);
 144                       write_memory (sp + argoffset, val, len);
 145                     }
 146                   argoffset += 8;
 147                 }
 148             }
 149           else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT       /* long long */
 150                                 || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT)))        /* double */
 151             {
 152               /* "long long" or "double" passed in an odd/even
 153                  register pair with the low addressed word in the odd
 154                  register and the high addressed word in the even
 155                  register, or when the registers run out an 8 byte
 156                  aligned stack location.  */
 157               if (greg > 9)
 158                 {
 159                   /* Just in case GREG was 10.  */
 160                   greg = 11;
 161                   argoffset = align_up (argoffset, 8);
 162                   if (write_pass)
 163                     write_memory (sp + argoffset, val, len);
 164                   argoffset += 8;
 165                 }
 166               else if (tdep->wordsize == 8)
 167                 {
 168                   if (write_pass)
 169                     regcache_cooked_write (regcache,
 170                                            tdep->ppc_gp0_regnum + greg, val);
 171                   greg += 1;
 172                 }
 173               else
 174                 {
 175                   /* Must start on an odd register - r3/r4 etc.  */
 176                   if ((greg & 1) == 0)
 177                     greg++;
 178                   if (write_pass)
 179                     {
 180                       regcache_cooked_write (regcache,
 181                                              tdep->ppc_gp0_regnum + greg + 0,
 182                                              val + 0);
 183                       regcache_cooked_write (regcache,
 184                                              tdep->ppc_gp0_regnum + greg + 1,
 185                                              val + 4);
 186                     }
 187                   greg += 2;
 188                 }
 189             }
 190           else if (len == 16
 191                    && TYPE_CODE (type) == TYPE_CODE_ARRAY
 192                    && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
 193             {
 194               /* Vector parameter passed in an Altivec register, or
 195                  when that runs out, 16 byte aligned stack location.  */
 196               if (vreg <= 13)
 197                 {
 198                   if (write_pass)
 199                     regcache_cooked_write (current_regcache,
 200                                            tdep->ppc_vr0_regnum + vreg, val);
 201                   vreg++;
 202                 }
 203               else
 204                 {
 205                   argoffset = align_up (argoffset, 16);
 206                   if (write_pass)
 207                     write_memory (sp + argoffset, val, 16);
 208                   argoffset += 16;
 209                 }
 210             }
 211           else if (len == 8
 212                    && TYPE_CODE (type) == TYPE_CODE_ARRAY
 213                    && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
 214             {
 215               /* Vector parameter passed in an e500 register, or when
 216                  that runs out, 8 byte aligned stack location.  Note
 217                  that since e500 vector and general purpose registers
 218                  both map onto the same underlying register set, a
 219                  "greg" and not a "vreg" is consumed here.  A cooked
 220                  write stores the value in the correct locations
 221                  within the raw register cache.  */
 222               if (greg <= 10)
 223                 {
 224                   if (write_pass)
 225                     regcache_cooked_write (current_regcache,
 226                                            tdep->ppc_ev0_regnum + greg, val);
 227                   greg++;
 228                 }
 229               else
 230                 {
 231                   argoffset = align_up (argoffset, 8);
 232                   if (write_pass)
 233                     write_memory (sp + argoffset, val, 8);
 234                   argoffset += 8;
 235                 }
 236             }
 237           else
 238             {
 239               /* Reduce the parameter down to something that fits in a
 240                  "word".  */
 241               char word[MAX_REGISTER_SIZE];
 242               memset (word, 0, MAX_REGISTER_SIZE);
 243               if (len > tdep->wordsize
 244                   || TYPE_CODE (type) == TYPE_CODE_STRUCT
 245                   || TYPE_CODE (type) == TYPE_CODE_UNION)
 246                 {
 247                   /* Structs and large values are put on an 8 byte
 248                      aligned stack ... */
 249                   structoffset = align_up (structoffset, 8);
 250                   if (write_pass)
 251                     write_memory (sp + structoffset, val, len);
 252                   /* ... and then a "word" pointing to that address is
 253                      passed as the parameter.  */
 254                   store_unsigned_integer (word, tdep->wordsize,
 255                                           sp + structoffset);
 256                   structoffset += len;
 257                 }
 258               else if (TYPE_CODE (type) == TYPE_CODE_INT)
 259                 /* Sign or zero extend the "int" into a "word".  */
 260                 store_unsigned_integer (word, tdep->wordsize,
 261                                         unpack_long (type, val));
 262               else
 263                 /* Always goes in the low address.  */
 264                 memcpy (word, val, len);
 265               /* Store that "word" in a register, or on the stack.
 266                  The words have "4" byte alignment.  */
 267               if (greg <= 10)
 268                 {
 269                   if (write_pass)
 270                     regcache_cooked_write (regcache,
 271                                            tdep->ppc_gp0_regnum + greg, word);
 272                   greg++;
 273                 }
 274               else
 275                 {
 276                   argoffset = align_up (argoffset, tdep->wordsize);
 277                   if (write_pass)
 278                     write_memory (sp + argoffset, word, tdep->wordsize);
 279                   argoffset += tdep->wordsize;
 280                 }
 281             }
 282         }
 283
 284       /* Compute the actual stack space requirements.  */
 285       if (!write_pass)
 286         {
 287           /* Remember the amount of space needed by the arguments.  */
 288           argspace = argoffset;
 289           /* Allocate space for both the arguments and the structures.  */
 290           sp -= (argoffset + structoffset);
 291           /* Ensure that the stack is still 16 byte aligned.  */
 292           sp = align_down (sp, 16);
 293         }
 294     }
 295
 296   /* Update %sp.   */
 297   regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
 298
 299   /* Write the backchain (it occupies WORDSIZED bytes).  */
 300   write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
 301
 302   /* Point the inferior function call's return address at the dummy's
 303      breakpoint.  */
 304   regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
 305
 306   return sp;
 307 }
 308
 309 /* Handle the return-value conventions specified by the SysV 32-bit
 310    PowerPC ABI (including all the supplements):
 311
 312    no floating-point: floating-point values returned using 32-bit
 313    general-purpose registers.
 314
 315    Altivec: 128-bit vectors returned using vector registers.
 316
 317    e500: 64-bit vectors returned using the full full 64 bit EV
 318    register, floating-point values returned using 32-bit
 319    general-purpose registers.
 320
 321    GCC (broken): Small struct values right (instead of left) aligned
 322    when returned in general-purpose registers.  */
 323
 324 static enum return_value_convention
 325 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
 326                           struct regcache *regcache, const void *inval,
 327                           void *outval, int broken_gcc)
 328 {
 329   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 330   gdb_assert (tdep->wordsize == 4);
 331   if (TYPE_CODE (type) == TYPE_CODE_FLT
 332       && TYPE_LENGTH (type) <= 8
 333       && ppc_floating_point_unit_p (gdbarch))
 334     {
 335       if (outval)
 336         {
 337           /* Floats and doubles stored in "f1".  Convert the value to
 338              the required type.  */
 339           char regval[MAX_REGISTER_SIZE];
 340           struct type *regtype = register_type (gdbarch, FP0_REGNUM + 1);
 341           regcache_cooked_read (regcache, FP0_REGNUM + 1, regval);
 342           convert_typed_floating (regval, regtype, outval, type);
 343         }
 344       if (inval)
 345         {
 346           /* Floats and doubles stored in "f1".  Convert the value to
 347              the register's "double" type.  */
 348           char regval[MAX_REGISTER_SIZE];
 349           struct type *regtype = register_type (gdbarch, FP0_REGNUM);
 350           convert_typed_floating (inval, type, regval, regtype);
 351           regcache_cooked_write (regcache, FP0_REGNUM + 1, regval);
 352         }
 353       return RETURN_VALUE_REGISTER_CONVENTION;
 354     }
 355   if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
 356       || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
 357     {
 358       if (outval)
 359         {
 360           /* A long long, or a double stored in the 32 bit r3/r4.  */
 361           regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
 362                                 (bfd_byte *) outval + 0);
 363           regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
 364                                 (bfd_byte *) outval + 4);
 365         }
 366       if (inval)
 367         {
 368           /* A long long, or a double stored in the 32 bit r3/r4.  */
 369           regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
 370                                  (bfd_byte *) inval + 0);
 371           regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
 372                                  (bfd_byte *) inval + 4);
 373         }
 374       return RETURN_VALUE_REGISTER_CONVENTION;
 375     }
 376   if (TYPE_CODE (type) == TYPE_CODE_INT
 377       && TYPE_LENGTH (type) <= tdep->wordsize)
 378     {
 379       if (outval)
 380         {
 381           /* Some sort of integer stored in r3.  Since TYPE isn't
 382              bigger than the register, sign extension isn't a problem
 383              - just do everything unsigned.  */
 384           ULONGEST regval;
 385           regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
 386                                          &regval);
 387           store_unsigned_integer (outval, TYPE_LENGTH (type), regval);
 388         }
 389       if (inval)
 390         {
 391           /* Some sort of integer stored in r3.  Use unpack_long since
 392              that should handle any required sign extension.  */
 393           regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
 394                                           unpack_long (type, inval));
 395         }
 396       return RETURN_VALUE_REGISTER_CONVENTION;
 397     }
 398   if (TYPE_LENGTH (type) == 16
 399       && TYPE_CODE (type) == TYPE_CODE_ARRAY
 400       && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
 401     {
 402       if (outval)
 403         {
 404           /* Altivec places the return value in "v2".  */
 405           regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, outval);
 406         }
 407       if (inval)
 408         {
 409           /* Altivec places the return value in "v2".  */
 410           regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, inval);
 411         }
 412       return RETURN_VALUE_REGISTER_CONVENTION;
 413     }
 414   if (TYPE_LENGTH (type) == 8
 415       && TYPE_CODE (type) == TYPE_CODE_ARRAY
 416       && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
 417     {
 418       /* The e500 ABI places return values for the 64-bit DSP types
 419          (__ev64_opaque__) in r3.  However, in GDB-speak, ev3
 420          corresponds to the entire r3 value for e500, whereas GDB's r3
 421          only corresponds to the least significant 32-bits.  So place
 422          the 64-bit DSP type's value in ev3.  */
 423       if (outval)
 424         regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, outval);
 425       if (inval)
 426         regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, inval);
 427       return RETURN_VALUE_REGISTER_CONVENTION;
 428     }
 429   if (broken_gcc && TYPE_LENGTH (type) <= 8)
 430     {
 431       if (outval)
 432         {
 433           /* GCC screwed up.  The last register isn't "left" aligned.
 434              Need to extract the least significant part of each
 435              register and then store that.  */
 436           /* Transfer any full words.  */
 437           int word = 0;
 438           while (1)
 439             {
 440               ULONGEST reg;
 441               int len = TYPE_LENGTH (type) - word * tdep->wordsize;
 442               if (len <= 0)
 443                 break;
 444               if (len > tdep->wordsize)
 445                 len = tdep->wordsize;
 446               regcache_cooked_read_unsigned (regcache,
 447                                              tdep->ppc_gp0_regnum + 3 + word,
 448                                              &reg);
 449               store_unsigned_integer (((bfd_byte *) outval
 450                                        + word * tdep->wordsize), len, reg);
 451               word++;
 452             }
 453         }
 454       if (inval)
 455         {
 456           /* GCC screwed up.  The last register isn't "left" aligned.
 457              Need to extract the least significant part of each
 458              register and then store that.  */
 459           /* Transfer any full words.  */
 460           int word = 0;
 461           while (1)
 462             {
 463               ULONGEST reg;
 464               int len = TYPE_LENGTH (type) - word * tdep->wordsize;
 465               if (len <= 0)
 466                 break;
 467               if (len > tdep->wordsize)
 468                 len = tdep->wordsize;
 469               reg = extract_unsigned_integer (((bfd_byte *) inval
 470                                                + word * tdep->wordsize), len);
 471               regcache_cooked_write_unsigned (regcache,
 472                                               tdep->ppc_gp0_regnum + 3 + word,
 473                                               reg);
 474               word++;
 475             }
 476         }
 477       return RETURN_VALUE_REGISTER_CONVENTION;
 478     }
 479   if (TYPE_LENGTH (type) <= 8)
 480     {
 481       if (outval)
 482         {
 483           /* This matches SVr4 PPC, it does not match GCC.  */
 484           /* The value is right-padded to 8 bytes and then loaded, as
 485              two "words", into r3/r4.  */
 486           char regvals[MAX_REGISTER_SIZE * 2];
 487           regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
 488                                 regvals + 0 * tdep->wordsize);
 489           if (TYPE_LENGTH (type) > tdep->wordsize)
 490             regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
 491                                   regvals + 1 * tdep->wordsize);
 492           memcpy (outval, regvals, TYPE_LENGTH (type));
 493         }
 494       if (inval)
 495         {
 496           /* This matches SVr4 PPC, it does not match GCC.  */
 497           /* The value is padded out to 8 bytes and then loaded, as
 498              two "words" into r3/r4.  */
 499           char regvals[MAX_REGISTER_SIZE * 2];
 500           memset (regvals, 0, sizeof regvals);
 501           memcpy (regvals, inval, TYPE_LENGTH (type));
 502           regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
 503                                  regvals + 0 * tdep->wordsize);
 504           if (TYPE_LENGTH (type) > tdep->wordsize)
 505             regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
 506                                    regvals + 1 * tdep->wordsize);
 507         }
 508       return RETURN_VALUE_REGISTER_CONVENTION;
 509     }
 510   return RETURN_VALUE_STRUCT_CONVENTION;
 511 }
 512
 513 enum return_value_convention
 514 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
 515                            struct regcache *regcache, const void *inval, void *outval)
 516 {
 517   return do_ppc_sysv_return_value (gdbarch, valtype, regcache, inval, outval, 0);
 518 }
 519
 520 enum return_value_convention
 521 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch, struct type *valtype,
 522                                   struct regcache *regcache, const void *inval,
 523                                   void *outval)
 524 {
 525   return do_ppc_sysv_return_value (gdbarch, valtype, regcache, inval, outval, 1);
 526 }
 527
 528 /* Pass the arguments in either registers, or in the stack. Using the
 529    ppc 64 bit SysV ABI.
 530
 531    This implements a dumbed down version of the ABI.  It always writes
 532    values to memory, GPR and FPR, even when not necessary.  Doing this
 533    greatly simplifies the logic. */
 534
 535 CORE_ADDR
 536 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
 537                                 struct regcache *regcache, CORE_ADDR bp_addr,
 538                                 int nargs, struct value **args, CORE_ADDR sp,
 539                                 int struct_return, CORE_ADDR struct_addr)
 540 {
 541   struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
 542   /* By this stage in the proceedings, SP has been decremented by "red
 543      zone size" + "struct return size".  Fetch the stack-pointer from
 544      before this and use that as the BACK_CHAIN.  */
 545   const CORE_ADDR back_chain = read_sp ();
 546   /* See for-loop comment below.  */
 547   int write_pass;
 548   /* Size of the Altivec's vector parameter region, the final value is
 549      computed in the for-loop below.  */
 550   LONGEST vparam_size = 0;
 551   /* Size of the general parameter region, the final value is computed
 552      in the for-loop below.  */
 553   LONGEST gparam_size = 0;
 554   /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
 555      calls to align_up(), align_down(), etc.  because this makes it
 556      easier to reuse this code (in a copy/paste sense) in the future,
 557      but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
 558      at some point makes it easier to verify that this function is
 559      correct without having to do a non-local analysis to figure out
 560      the possible values of tdep->wordsize.  */
 561   gdb_assert (tdep->wordsize == 8);
 562
 563   /* Go through the argument list twice.
 564
 565      Pass 1: Compute the function call's stack space and register
 566      requirements.
 567
 568      Pass 2: Replay the same computation but this time also write the
 569      values out to the target.  */
 570
 571   for (write_pass = 0; write_pass < 2; write_pass++)
 572     {
 573       int argno;
 574       /* Next available floating point register for float and double
 575          arguments.  */
 576       int freg = 1;
 577       /* Next available general register for non-vector (but possibly
 578          float) arguments.  */
 579       int greg = 3;
 580       /* Next available vector register for vector arguments.  */
 581       int vreg = 2;
 582       /* The address, at which the next general purpose parameter
 583          (integer, struct, float, ...) should be saved.  */
 584       CORE_ADDR gparam;
 585       /* Address, at which the next Altivec vector parameter should be
 586          saved.  */
 587       CORE_ADDR vparam;
 588
 589       if (!write_pass)
 590         {
 591           /* During the first pass, GPARAM and VPARAM are more like
 592              offsets (start address zero) than addresses.  That way
 593              the accumulate the total stack space each region
 594              requires.  */
 595           gparam = 0;
 596           vparam = 0;
 597         }
 598       else
 599         {
 600           /* Decrement the stack pointer making space for the Altivec
 601              and general on-stack parameters.  Set vparam and gparam
 602              to their corresponding regions.  */
 603           vparam = align_down (sp - vparam_size, 16);
 604           gparam = align_down (vparam - gparam_size, 16);
 605           /* Add in space for the TOC, link editor double word,
 606              compiler double word, LR save area, CR save area.  */
 607           sp = align_down (gparam - 48, 16);
 608         }
 609
 610       /* If the function is returning a `struct', then there is an
 611          extra hidden parameter (which will be passed in r3)
 612          containing the address of that struct..  In that case we
 613          should advance one word and start from r4 register to copy
 614          parameters.  This also consumes one on-stack parameter slot.  */
 615       if (struct_return)
 616         {
 617           if (write_pass)
 618             regcache_cooked_write_signed (regcache,
 619                                           tdep->ppc_gp0_regnum + greg,
 620                                           struct_addr);
 621           greg++;
 622           gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
 623         }
 624
 625       for (argno = 0; argno < nargs; argno++)
 626         {
 627           struct value *arg = args[argno];
 628           struct type *type = check_typedef (VALUE_TYPE (arg));
 629           char *val = VALUE_CONTENTS (arg);
 630           if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
 631             {
 632               /* Floats and Doubles go in f1 .. f13.  They also
 633                  consume a left aligned GREG,, and can end up in
 634                  memory.  */
 635               if (write_pass)
 636                 {
 637                   if (ppc_floating_point_unit_p (current_gdbarch)
 638                       && freg <= 13)
 639                     {
 640                       char regval[MAX_REGISTER_SIZE];
 641                       struct type *regtype = register_type (gdbarch,
 642                                                             FP0_REGNUM);
 643                       convert_typed_floating (val, type, regval, regtype);
 644                       regcache_cooked_write (regcache, FP0_REGNUM + freg,
 645                                              regval);
 646                     }
 647                   if (greg <= 10)
 648                     {
 649                       /* The ABI states "Single precision floating
 650                          point values are mapped to the first word in
 651                          a single doubleword" and "... floating point
 652                          values mapped to the first eight doublewords
 653                          of the parameter save area are also passed in
 654                          general registers").
 655
 656                          This code interprets that to mean: store it,
 657                          left aligned, in the general register.  */
 658                       char regval[MAX_REGISTER_SIZE];
 659                       memset (regval, 0, sizeof regval);
 660                       memcpy (regval, val, TYPE_LENGTH (type));
 661                       regcache_cooked_write (regcache,
 662                                              tdep->ppc_gp0_regnum + greg,
 663                                              regval);
 664                     }
 665                   write_memory (gparam, val, TYPE_LENGTH (type));
 666                 }
 667               /* Always consume parameter stack space.  */
 668               freg++;
 669               greg++;
 670               gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
 671             }
 672           else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
 673                    && TYPE_CODE (type) == TYPE_CODE_ARRAY
 674                    && tdep->ppc_vr0_regnum >= 0)
 675             {
 676               /* In the Altivec ABI, vectors go in the vector
 677                  registers v2 .. v13, or when that runs out, a vector
 678                  annex which goes above all the normal parameters.
 679                  NOTE: cagney/2003-09-21: This is a guess based on the
 680                  PowerOpen Altivec ABI.  */
 681               if (vreg <= 13)
 682                 {
 683                   if (write_pass)
 684                     regcache_cooked_write (regcache,
 685                                            tdep->ppc_vr0_regnum + vreg, val);
 686                   vreg++;
 687                 }
 688               else
 689                 {
 690                   if (write_pass)
 691                     write_memory (vparam, val, TYPE_LENGTH (type));
 692                   vparam = align_up (vparam + TYPE_LENGTH (type), 16);
 693                 }
 694             }
 695           else if ((TYPE_CODE (type) == TYPE_CODE_INT
 696                     || TYPE_CODE (type) == TYPE_CODE_ENUM)
 697                    && TYPE_LENGTH (type) <= 8)
 698             {
 699               /* Scalars get sign[un]extended and go in gpr3 .. gpr10.
 700                  They can also end up in memory.  */
 701               if (write_pass)
 702                 {
 703                   /* Sign extend the value, then store it unsigned.  */
 704                   ULONGEST word = unpack_long (type, val);
 705                   if (greg <= 10)
 706                     regcache_cooked_write_unsigned (regcache,
 707                                                     tdep->ppc_gp0_regnum +
 708                                                     greg, word);
 709                   write_memory_unsigned_integer (gparam, tdep->wordsize,
 710                                                  word);
 711                 }
 712               greg++;
 713               gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
 714             }
 715           else
 716             {
 717               int byte;
 718               for (byte = 0; byte < TYPE_LENGTH (type);
 719                    byte += tdep->wordsize)
 720                 {
 721                   if (write_pass && greg <= 10)
 722                     {
 723                       char regval[MAX_REGISTER_SIZE];
 724                       int len = TYPE_LENGTH (type) - byte;
 725                       if (len > tdep->wordsize)
 726                         len = tdep->wordsize;
 727                       memset (regval, 0, sizeof regval);
 728                       /* WARNING: cagney/2003-09-21: As best I can
 729                          tell, the ABI specifies that the value should
 730                          be left aligned.  Unfortunately, GCC doesn't
 731                          do this - it instead right aligns even sized
 732                          values and puts odd sized values on the
 733                          stack.  Work around that by putting both a
 734                          left and right aligned value into the
 735                          register (hopefully no one notices :-^).
 736                          Arrrgh!  */
 737                       /* Left aligned (8 byte values such as pointers
 738                          fill the buffer).  */
 739                       memcpy (regval, val + byte, len);
 740                       /* Right aligned (but only if even).  */
 741                       if (len == 1 || len == 2 || len == 4)
 742                         memcpy (regval + tdep->wordsize - len,
 743                                 val + byte, len);
 744                       regcache_cooked_write (regcache, greg, regval);
 745                     }
 746                   greg++;
 747                 }
 748               if (write_pass)
 749                 /* WARNING: cagney/2003-09-21: Strictly speaking, this
 750                    isn't necessary, unfortunately, GCC appears to get
 751                    "struct convention" parameter passing wrong putting
 752                    odd sized structures in memory instead of in a
 753                    register.  Work around this by always writing the
 754                    value to memory.  Fortunately, doing this
 755                    simplifies the code.  */
 756                 write_memory (gparam, val, TYPE_LENGTH (type));
 757               /* Always consume parameter stack space.  */
 758               gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
 759             }
 760         }
 761
 762       if (!write_pass)
 763         {
 764           /* Save the true region sizes ready for the second pass.  */
 765           vparam_size = vparam;
 766           /* Make certain that the general parameter save area is at
 767              least the minimum 8 registers (or doublewords) in size.  */
 768           if (greg < 8)
 769             gparam_size = 8 * tdep->wordsize;
 770           else
 771             gparam_size = gparam;
 772         }
 773     }
 774
 775   /* Update %sp.   */
 776   regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
 777
 778   /* Write the backchain (it occupies WORDSIZED bytes).  */
 779   write_memory_signed_integer (sp, tdep->wordsize, back_chain);
 780
 781   /* Point the inferior function call's return address at the dummy's
 782      breakpoint.  */
 783   regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
 784
 785   /* Find a value for the TOC register.  Every symbol should have both
 786      ".FN" and "FN" in the minimal symbol table.  "FN" points at the
 787      FN's descriptor, while ".FN" points at the entry point (which
 788      matches FUNC_ADDR).  Need to reverse from FUNC_ADDR back to the
 789      FN's descriptor address.  */
 790   {
 791     /* Find the minimal symbol that corresponds to FUNC_ADDR (should
 792        have the name ".FN").  */
 793     struct minimal_symbol *dot_fn = lookup_minimal_symbol_by_pc (func_addr);
 794     if (dot_fn != NULL && SYMBOL_LINKAGE_NAME (dot_fn)[0] == '.')
 795       {
 796         /* Now find the corresponding "FN" (dropping ".") minimal
 797            symbol's address.  */
 798         struct minimal_symbol *fn =
 799           lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
 800                                  NULL);
 801         if (fn != NULL)
 802           {
 803             /* Got the address of that descriptor.  The TOC is the
 804                second double word.  */
 805             CORE_ADDR toc =
 806               read_memory_unsigned_integer (SYMBOL_VALUE_ADDRESS (fn) +
 807                                             tdep->wordsize, tdep->wordsize);
 808             regcache_cooked_write_unsigned (regcache,
 809                                             tdep->ppc_gp0_regnum + 2, toc);
 810           }
 811       }
 812   }
 813
 814   return sp;
 815 }
 816
 817
 818 /* The 64 bit ABI retun value convention.
 819
 820    Return non-zero if the return-value is stored in a register, return
 821    0 if the return-value is instead stored on the stack (a.k.a.,
 822    struct return convention).
 823
 824    For a return-value stored in a register: when INVAL is non-NULL,
 825    copy the buffer to the corresponding register return-value location
 826    location; when OUTVAL is non-NULL, fill the buffer from the
 827    corresponding register return-value location.  */
 828 enum return_value_convention
 829 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
 830                              struct regcache *regcache, const void *inval,
 831                              void *outval)
 832 {
 833   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 834   /* Floats and doubles in F1.  */
 835   if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
 836     {
 837       char regval[MAX_REGISTER_SIZE];
 838       struct type *regtype = register_type (gdbarch, FP0_REGNUM);
 839       if (inval != NULL)
 840         {
 841           convert_typed_floating (inval, valtype, regval, regtype);
 842           regcache_cooked_write (regcache, FP0_REGNUM + 1, regval);
 843         }
 844       if (outval != NULL)
 845         {
 846           regcache_cooked_read (regcache, FP0_REGNUM + 1, regval);
 847           convert_typed_floating (regval, regtype, outval, valtype);
 848         }
 849       return RETURN_VALUE_REGISTER_CONVENTION;
 850     }
 851   if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 8)
 852     {
 853       /* Integers in r3.  */
 854       if (inval != NULL)
 855         {
 856           /* Be careful to sign extend the value.  */
 857           regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
 858                                           unpack_long (valtype, inval));
 859         }
 860       if (outval != NULL)
 861         {
 862           /* Extract the integer from r3.  Since this is truncating the
 863              value, there isn't a sign extension problem.  */
 864           ULONGEST regval;
 865           regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
 866                                          &regval);
 867           store_unsigned_integer (outval, TYPE_LENGTH (valtype), regval);
 868         }
 869       return RETURN_VALUE_REGISTER_CONVENTION;
 870     }
 871   /* All pointers live in r3.  */
 872   if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
 873     {
 874       /* All pointers live in r3.  */
 875       if (inval != NULL)
 876         regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, inval);
 877       if (outval != NULL)
 878         regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, outval);
 879       return RETURN_VALUE_REGISTER_CONVENTION;
 880     }
 881   if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
 882       && TYPE_LENGTH (valtype) <= 8
 883       && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
 884       && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
 885     {
 886       /* Small character arrays are returned, right justified, in r3.  */
 887       int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
 888                     - TYPE_LENGTH (valtype));
 889       if (inval != NULL)
 890         regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
 891                                     offset, TYPE_LENGTH (valtype), inval);
 892       if (outval != NULL)
 893         regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
 894                                    offset, TYPE_LENGTH (valtype), outval);
 895       return RETURN_VALUE_REGISTER_CONVENTION;
 896     }
 897   /* Big floating point values get stored in adjacent floating
 898      point registers.  */
 899   if (TYPE_CODE (valtype) == TYPE_CODE_FLT
 900       && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
 901     {
 902       if (inval || outval != NULL)
 903         {
 904           int i;
 905           for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
 906             {
 907               if (inval != NULL)
 908                 regcache_cooked_write (regcache, FP0_REGNUM + 1 + i,
 909                                        (const bfd_byte *) inval + i * 8);
 910               if (outval != NULL)
 911                 regcache_cooked_read (regcache, FP0_REGNUM + 1 + i,
 912                                       (bfd_byte *) outval + i * 8);
 913             }
 914         }
 915       return RETURN_VALUE_REGISTER_CONVENTION;
 916     }
 917   /* Complex values get returned in f1:f2, need to convert.  */
 918   if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
 919       && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
 920     {
 921       if (regcache != NULL)
 922         {
 923           int i;
 924           for (i = 0; i < 2; i++)
 925             {
 926               char regval[MAX_REGISTER_SIZE];
 927               struct type *regtype =
 928                 register_type (current_gdbarch, FP0_REGNUM);
 929               if (inval != NULL)
 930                 {
 931                   convert_typed_floating ((const bfd_byte *) inval +
 932                                           i * (TYPE_LENGTH (valtype) / 2),
 933                                           valtype, regval, regtype);
 934                   regcache_cooked_write (regcache, FP0_REGNUM + 1 + i,
 935                                          regval);
 936                 }
 937               if (outval != NULL)
 938                 {
 939                   regcache_cooked_read (regcache, FP0_REGNUM + 1 + i, regval);
 940                   convert_typed_floating (regval, regtype,
 941                                           (bfd_byte *) outval +
 942                                           i * (TYPE_LENGTH (valtype) / 2),
 943                                           valtype);
 944                 }
 945             }
 946         }
 947       return RETURN_VALUE_REGISTER_CONVENTION;
 948     }
 949   /* Big complex values get stored in f1:f4.  */
 950   if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
 951     {
 952       if (regcache != NULL)
 953         {
 954           int i;
 955           for (i = 0; i < 4; i++)
 956             {
 957               if (inval != NULL)
 958                 regcache_cooked_write (regcache, FP0_REGNUM + 1 + i,
 959                                        (const bfd_byte *) inval + i * 8);
 960               if (outval != NULL)
 961                 regcache_cooked_read (regcache, FP0_REGNUM + 1 + i,
 962                                       (bfd_byte *) outval + i * 8);
 963             }
 964         }
 965       return RETURN_VALUE_REGISTER_CONVENTION;
 966     }
 967   return RETURN_VALUE_STRUCT_CONVENTION;
 968 }
 969
 970 CORE_ADDR
 971 ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
 972                                           CORE_ADDR bpaddr)
 973 {
 974   /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
 975      a function-descriptor while the corresponding minimal-symbol
 976      ".FN" should point at the entry point.  Consequently, a command
 977      like "break FN" applied to an object file with only minimal
 978      symbols, will insert the breakpoint into the descriptor at "FN"
 979      and not the function at ".FN".  Avoid this confusion by adjusting
 980      any attempt to set a descriptor breakpoint into a corresponding
 981      function breakpoint.  Note that GDB warns the user when this
 982      adjustment is applied - that's ok as otherwise the user will have
 983      no way of knowing why their breakpoint at "FN" resulted in the
 984      program stopping at ".FN".  */
 985   return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
 986 }