* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Set condition
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright 2000, 2001, 2002, 2003, 2005
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24 #include "defs.h"
25 #include "gdbcore.h"
26 #include "inferior.h"
27 #include "regcache.h"
28 #include "value.h"
29 #include "gdb_string.h"
30 #include "gdb_assert.h"
31 #include "ppc-tdep.h"
32 #include "target.h"
33 #include "objfiles.h"
34 #include "infcall.h"
35
36 /* Pass the arguments in either registers, or in the stack. Using the
37 ppc sysv ABI, the first eight words of the argument list (that might
38 be less than eight parameters if some parameters occupy more than one
39 word) are passed in r3..r10 registers. float and double parameters are
40 passed in fpr's, in addition to that. Rest of the parameters if any
41 are passed in user stack.
42
43 If the function is returning a structure, then the return address is passed
44 in r3, then the first 7 words of the parametes can be passed in registers,
45 starting from r4. */
46
47 CORE_ADDR
48 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
49 struct regcache *regcache, CORE_ADDR bp_addr,
50 int nargs, struct value **args, CORE_ADDR sp,
51 int struct_return, CORE_ADDR struct_addr)
52 {
53 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
54 const CORE_ADDR saved_sp = read_sp ();
55 int argspace = 0; /* 0 is an initial wrong guess. */
56 int write_pass;
57
58 /* Go through the argument list twice.
59
60 Pass 1: Figure out how much new stack space is required for
61 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
62 ABI doesn't reserve any extra space for parameters which are put
63 in registers, but does always push structures and then pass their
64 address.
65
66 Pass 2: Replay the same computation but this time also write the
67 values out to the target. */
68
69 for (write_pass = 0; write_pass < 2; write_pass++)
70 {
71 int argno;
72 /* Next available floating point register for float and double
73 arguments. */
74 int freg = 1;
75 /* Next available general register for non-float, non-vector
76 arguments. */
77 int greg = 3;
78 /* Next available vector register for vector arguments. */
79 int vreg = 2;
80 /* Arguments start above the "LR save word" and "Back chain". */
81 int argoffset = 2 * tdep->wordsize;
82 /* Structures start after the arguments. */
83 int structoffset = argoffset + argspace;
84
85 /* If the function is returning a `struct', then the first word
86 (which will be passed in r3) is used for struct return
87 address. In that case we should advance one word and start
88 from r4 register to copy parameters. */
89 if (struct_return)
90 {
91 if (write_pass)
92 regcache_cooked_write_signed (regcache,
93 tdep->ppc_gp0_regnum + greg,
94 struct_addr);
95 greg++;
96 }
97
98 for (argno = 0; argno < nargs; argno++)
99 {
100 struct value *arg = args[argno];
101 struct type *type = check_typedef (value_type (arg));
102 int len = TYPE_LENGTH (type);
103 const bfd_byte *val = value_contents (arg);
104
105 if (TYPE_CODE (type) == TYPE_CODE_FLT
106 && ppc_floating_point_unit_p (current_gdbarch) && len <= 8)
107 {
108 /* Floating point value converted to "double" then
109 passed in an FP register, when the registers run out,
110 8 byte aligned stack is used. */
111 if (freg <= 8)
112 {
113 if (write_pass)
114 {
115 /* Always store the floating point value using
116 the register's floating-point format. */
117 gdb_byte regval[MAX_REGISTER_SIZE];
118 struct type *regtype
119 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
120 convert_typed_floating (val, type, regval, regtype);
121 regcache_cooked_write (regcache,
122 tdep->ppc_fp0_regnum + freg,
123 regval);
124 }
125 freg++;
126 }
127 else
128 {
129 /* SysV ABI converts floats to doubles before
130 writing them to an 8 byte aligned stack location. */
131 argoffset = align_up (argoffset, 8);
132 if (write_pass)
133 {
134 char memval[8];
135 struct type *memtype;
136 switch (TARGET_BYTE_ORDER)
137 {
138 case BFD_ENDIAN_BIG:
139 memtype = builtin_type_ieee_double_big;
140 break;
141 case BFD_ENDIAN_LITTLE:
142 memtype = builtin_type_ieee_double_little;
143 break;
144 default:
145 internal_error (__FILE__, __LINE__, _("bad switch"));
146 }
147 convert_typed_floating (val, type, memval, memtype);
148 write_memory (sp + argoffset, val, len);
149 }
150 argoffset += 8;
151 }
152 }
153 else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
154 || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */
155 {
156 /* "long long" or "double" passed in an odd/even
157 register pair with the low addressed word in the odd
158 register and the high addressed word in the even
159 register, or when the registers run out an 8 byte
160 aligned stack location. */
161 if (greg > 9)
162 {
163 /* Just in case GREG was 10. */
164 greg = 11;
165 argoffset = align_up (argoffset, 8);
166 if (write_pass)
167 write_memory (sp + argoffset, val, len);
168 argoffset += 8;
169 }
170 else if (tdep->wordsize == 8)
171 {
172 if (write_pass)
173 regcache_cooked_write (regcache,
174 tdep->ppc_gp0_regnum + greg, val);
175 greg += 1;
176 }
177 else
178 {
179 /* Must start on an odd register - r3/r4 etc. */
180 if ((greg & 1) == 0)
181 greg++;
182 if (write_pass)
183 {
184 regcache_cooked_write (regcache,
185 tdep->ppc_gp0_regnum + greg + 0,
186 val + 0);
187 regcache_cooked_write (regcache,
188 tdep->ppc_gp0_regnum + greg + 1,
189 val + 4);
190 }
191 greg += 2;
192 }
193 }
194 else if (len == 16
195 && TYPE_CODE (type) == TYPE_CODE_ARRAY
196 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
197 {
198 /* Vector parameter passed in an Altivec register, or
199 when that runs out, 16 byte aligned stack location. */
200 if (vreg <= 13)
201 {
202 if (write_pass)
203 regcache_cooked_write (current_regcache,
204 tdep->ppc_vr0_regnum + vreg, val);
205 vreg++;
206 }
207 else
208 {
209 argoffset = align_up (argoffset, 16);
210 if (write_pass)
211 write_memory (sp + argoffset, val, 16);
212 argoffset += 16;
213 }
214 }
215 else if (len == 8
216 && TYPE_CODE (type) == TYPE_CODE_ARRAY
217 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
218 {
219 /* Vector parameter passed in an e500 register, or when
220 that runs out, 8 byte aligned stack location. Note
221 that since e500 vector and general purpose registers
222 both map onto the same underlying register set, a
223 "greg" and not a "vreg" is consumed here. A cooked
224 write stores the value in the correct locations
225 within the raw register cache. */
226 if (greg <= 10)
227 {
228 if (write_pass)
229 regcache_cooked_write (current_regcache,
230 tdep->ppc_ev0_regnum + greg, val);
231 greg++;
232 }
233 else
234 {
235 argoffset = align_up (argoffset, 8);
236 if (write_pass)
237 write_memory (sp + argoffset, val, 8);
238 argoffset += 8;
239 }
240 }
241 else
242 {
243 /* Reduce the parameter down to something that fits in a
244 "word". */
245 gdb_byte word[MAX_REGISTER_SIZE];
246 memset (word, 0, MAX_REGISTER_SIZE);
247 if (len > tdep->wordsize
248 || TYPE_CODE (type) == TYPE_CODE_STRUCT
249 || TYPE_CODE (type) == TYPE_CODE_UNION)
250 {
251 /* Structs and large values are put on an 8 byte
252 aligned stack ... */
253 structoffset = align_up (structoffset, 8);
254 if (write_pass)
255 write_memory (sp + structoffset, val, len);
256 /* ... and then a "word" pointing to that address is
257 passed as the parameter. */
258 store_unsigned_integer (word, tdep->wordsize,
259 sp + structoffset);
260 structoffset += len;
261 }
262 else if (TYPE_CODE (type) == TYPE_CODE_INT)
263 /* Sign or zero extend the "int" into a "word". */
264 store_unsigned_integer (word, tdep->wordsize,
265 unpack_long (type, val));
266 else
267 /* Always goes in the low address. */
268 memcpy (word, val, len);
269 /* Store that "word" in a register, or on the stack.
270 The words have "4" byte alignment. */
271 if (greg <= 10)
272 {
273 if (write_pass)
274 regcache_cooked_write (regcache,
275 tdep->ppc_gp0_regnum + greg, word);
276 greg++;
277 }
278 else
279 {
280 argoffset = align_up (argoffset, tdep->wordsize);
281 if (write_pass)
282 write_memory (sp + argoffset, word, tdep->wordsize);
283 argoffset += tdep->wordsize;
284 }
285 }
286 }
287
288 /* Compute the actual stack space requirements. */
289 if (!write_pass)
290 {
291 /* Remember the amount of space needed by the arguments. */
292 argspace = argoffset;
293 /* Allocate space for both the arguments and the structures. */
294 sp -= (argoffset + structoffset);
295 /* Ensure that the stack is still 16 byte aligned. */
296 sp = align_down (sp, 16);
297 }
298
299 /* The psABI says that "A caller of a function that takes a
300 variable argument list shall set condition register bit 6 to
301 1 if it passes one or more arguments in the floating-point
302 registers. It is strongly recommended that the caller set the
303 bit to 0 otherwise..." Doing this for normal functions too
304 shouldn't hurt. */
305 if (write_pass)
306 {
307 ULONGEST cr;
308
309 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
310 if (freg > 1)
311 cr |= 0x02000000;
312 else
313 cr &= ~0x02000000;
314 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
315 }
316 }
317
318 /* Update %sp. */
319 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
320
321 /* Write the backchain (it occupies WORDSIZED bytes). */
322 write_memory_signed_integer (sp, tdep->wordsize, saved_sp);
323
324 /* Point the inferior function call's return address at the dummy's
325 breakpoint. */
326 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
327
328 return sp;
329 }
330
331 /* Handle the return-value conventions specified by the SysV 32-bit
332 PowerPC ABI (including all the supplements):
333
334 no floating-point: floating-point values returned using 32-bit
335 general-purpose registers.
336
337 Altivec: 128-bit vectors returned using vector registers.
338
339 e500: 64-bit vectors returned using the full full 64 bit EV
340 register, floating-point values returned using 32-bit
341 general-purpose registers.
342
343 GCC (broken): Small struct values right (instead of left) aligned
344 when returned in general-purpose registers. */
345
346 static enum return_value_convention
347 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
348 struct regcache *regcache, void *readbuf,
349 const void *writebuf, int broken_gcc)
350 {
351 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
352 gdb_assert (tdep->wordsize == 4);
353 if (TYPE_CODE (type) == TYPE_CODE_FLT
354 && TYPE_LENGTH (type) <= 8
355 && ppc_floating_point_unit_p (gdbarch))
356 {
357 if (readbuf)
358 {
359 /* Floats and doubles stored in "f1". Convert the value to
360 the required type. */
361 gdb_byte regval[MAX_REGISTER_SIZE];
362 struct type *regtype = register_type (gdbarch,
363 tdep->ppc_fp0_regnum + 1);
364 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
365 convert_typed_floating (regval, regtype, readbuf, type);
366 }
367 if (writebuf)
368 {
369 /* Floats and doubles stored in "f1". Convert the value to
370 the register's "double" type. */
371 gdb_byte regval[MAX_REGISTER_SIZE];
372 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
373 convert_typed_floating (writebuf, type, regval, regtype);
374 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
375 }
376 return RETURN_VALUE_REGISTER_CONVENTION;
377 }
378 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
379 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
380 {
381 if (readbuf)
382 {
383 /* A long long, or a double stored in the 32 bit r3/r4. */
384 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
385 (bfd_byte *) readbuf + 0);
386 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
387 (bfd_byte *) readbuf + 4);
388 }
389 if (writebuf)
390 {
391 /* A long long, or a double stored in the 32 bit r3/r4. */
392 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
393 (const bfd_byte *) writebuf + 0);
394 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
395 (const bfd_byte *) writebuf + 4);
396 }
397 return RETURN_VALUE_REGISTER_CONVENTION;
398 }
399 if (TYPE_CODE (type) == TYPE_CODE_INT
400 && TYPE_LENGTH (type) <= tdep->wordsize)
401 {
402 if (readbuf)
403 {
404 /* Some sort of integer stored in r3. Since TYPE isn't
405 bigger than the register, sign extension isn't a problem
406 - just do everything unsigned. */
407 ULONGEST regval;
408 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
409 &regval);
410 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
411 }
412 if (writebuf)
413 {
414 /* Some sort of integer stored in r3. Use unpack_long since
415 that should handle any required sign extension. */
416 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
417 unpack_long (type, writebuf));
418 }
419 return RETURN_VALUE_REGISTER_CONVENTION;
420 }
421 if (TYPE_LENGTH (type) == 16
422 && TYPE_CODE (type) == TYPE_CODE_ARRAY
423 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
424 {
425 if (readbuf)
426 {
427 /* Altivec places the return value in "v2". */
428 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
429 }
430 if (writebuf)
431 {
432 /* Altivec places the return value in "v2". */
433 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
434 }
435 return RETURN_VALUE_REGISTER_CONVENTION;
436 }
437 if (TYPE_LENGTH (type) == 8
438 && TYPE_CODE (type) == TYPE_CODE_ARRAY
439 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
440 {
441 /* The e500 ABI places return values for the 64-bit DSP types
442 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
443 corresponds to the entire r3 value for e500, whereas GDB's r3
444 only corresponds to the least significant 32-bits. So place
445 the 64-bit DSP type's value in ev3. */
446 if (readbuf)
447 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
448 if (writebuf)
449 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
450 return RETURN_VALUE_REGISTER_CONVENTION;
451 }
452 if (broken_gcc && TYPE_LENGTH (type) <= 8)
453 {
454 if (readbuf)
455 {
456 /* GCC screwed up. The last register isn't "left" aligned.
457 Need to extract the least significant part of each
458 register and then store that. */
459 /* Transfer any full words. */
460 int word = 0;
461 while (1)
462 {
463 ULONGEST reg;
464 int len = TYPE_LENGTH (type) - word * tdep->wordsize;
465 if (len <= 0)
466 break;
467 if (len > tdep->wordsize)
468 len = tdep->wordsize;
469 regcache_cooked_read_unsigned (regcache,
470 tdep->ppc_gp0_regnum + 3 + word,
471 &reg);
472 store_unsigned_integer (((bfd_byte *) readbuf
473 + word * tdep->wordsize), len, reg);
474 word++;
475 }
476 }
477 if (writebuf)
478 {
479 /* GCC screwed up. The last register isn't "left" aligned.
480 Need to extract the least significant part of each
481 register and then store that. */
482 /* Transfer any full words. */
483 int word = 0;
484 while (1)
485 {
486 ULONGEST reg;
487 int len = TYPE_LENGTH (type) - word * tdep->wordsize;
488 if (len <= 0)
489 break;
490 if (len > tdep->wordsize)
491 len = tdep->wordsize;
492 reg = extract_unsigned_integer (((const bfd_byte *) writebuf
493 + word * tdep->wordsize), len);
494 regcache_cooked_write_unsigned (regcache,
495 tdep->ppc_gp0_regnum + 3 + word,
496 reg);
497 word++;
498 }
499 }
500 return RETURN_VALUE_REGISTER_CONVENTION;
501 }
502 if (TYPE_LENGTH (type) <= 8)
503 {
504 if (readbuf)
505 {
506 /* This matches SVr4 PPC, it does not match GCC. */
507 /* The value is right-padded to 8 bytes and then loaded, as
508 two "words", into r3/r4. */
509 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
510 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
511 regvals + 0 * tdep->wordsize);
512 if (TYPE_LENGTH (type) > tdep->wordsize)
513 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
514 regvals + 1 * tdep->wordsize);
515 memcpy (readbuf, regvals, TYPE_LENGTH (type));
516 }
517 if (writebuf)
518 {
519 /* This matches SVr4 PPC, it does not match GCC. */
520 /* The value is padded out to 8 bytes and then loaded, as
521 two "words" into r3/r4. */
522 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
523 memset (regvals, 0, sizeof regvals);
524 memcpy (regvals, writebuf, TYPE_LENGTH (type));
525 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
526 regvals + 0 * tdep->wordsize);
527 if (TYPE_LENGTH (type) > tdep->wordsize)
528 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
529 regvals + 1 * tdep->wordsize);
530 }
531 return RETURN_VALUE_REGISTER_CONVENTION;
532 }
533 return RETURN_VALUE_STRUCT_CONVENTION;
534 }
535
536 enum return_value_convention
537 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
538 struct regcache *regcache, gdb_byte *readbuf,
539 const gdb_byte *writebuf)
540 {
541 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
542 writebuf, 0);
543 }
544
545 enum return_value_convention
546 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
547 struct type *valtype,
548 struct regcache *regcache,
549 gdb_byte *readbuf, const gdb_byte *writebuf)
550 {
551 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
552 writebuf, 1);
553 }
554
555 /* The helper function for 64-bit SYSV push_dummy_call. Converts the
556 function's code address back into the function's descriptor
557 address.
558
559 Find a value for the TOC register. Every symbol should have both
560 ".FN" and "FN" in the minimal symbol table. "FN" points at the
561 FN's descriptor, while ".FN" points at the entry point (which
562 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
563 FN's descriptor address (while at the same time being careful to
564 find "FN" in the same object file as ".FN"). */
565
566 static int
567 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
568 {
569 struct obj_section *dot_fn_section;
570 struct minimal_symbol *dot_fn;
571 struct minimal_symbol *fn;
572 CORE_ADDR toc;
573 /* Find the minimal symbol that corresponds to CODE_ADDR (should
574 have a name of the form ".FN"). */
575 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
576 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
577 return 0;
578 /* Get the section that contains CODE_ADDR. Need this for the
579 "objfile" that it contains. */
580 dot_fn_section = find_pc_section (code_addr);
581 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
582 return 0;
583 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
584 address. Only look for the minimal symbol in ".FN"'s object file
585 - avoids problems when two object files (i.e., shared libraries)
586 contain a minimal symbol with the same name. */
587 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
588 dot_fn_section->objfile);
589 if (fn == NULL)
590 return 0;
591 /* Found a descriptor. */
592 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
593 return 1;
594 }
595
596 /* Pass the arguments in either registers, or in the stack. Using the
597 ppc 64 bit SysV ABI.
598
599 This implements a dumbed down version of the ABI. It always writes
600 values to memory, GPR and FPR, even when not necessary. Doing this
601 greatly simplifies the logic. */
602
603 CORE_ADDR
604 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
605 struct regcache *regcache, CORE_ADDR bp_addr,
606 int nargs, struct value **args, CORE_ADDR sp,
607 int struct_return, CORE_ADDR struct_addr)
608 {
609 CORE_ADDR func_addr = find_function_addr (function, NULL);
610 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
611 /* By this stage in the proceedings, SP has been decremented by "red
612 zone size" + "struct return size". Fetch the stack-pointer from
613 before this and use that as the BACK_CHAIN. */
614 const CORE_ADDR back_chain = read_sp ();
615 /* See for-loop comment below. */
616 int write_pass;
617 /* Size of the Altivec's vector parameter region, the final value is
618 computed in the for-loop below. */
619 LONGEST vparam_size = 0;
620 /* Size of the general parameter region, the final value is computed
621 in the for-loop below. */
622 LONGEST gparam_size = 0;
623 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
624 calls to align_up(), align_down(), etc. because this makes it
625 easier to reuse this code (in a copy/paste sense) in the future,
626 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
627 at some point makes it easier to verify that this function is
628 correct without having to do a non-local analysis to figure out
629 the possible values of tdep->wordsize. */
630 gdb_assert (tdep->wordsize == 8);
631
632 /* Go through the argument list twice.
633
634 Pass 1: Compute the function call's stack space and register
635 requirements.
636
637 Pass 2: Replay the same computation but this time also write the
638 values out to the target. */
639
640 for (write_pass = 0; write_pass < 2; write_pass++)
641 {
642 int argno;
643 /* Next available floating point register for float and double
644 arguments. */
645 int freg = 1;
646 /* Next available general register for non-vector (but possibly
647 float) arguments. */
648 int greg = 3;
649 /* Next available vector register for vector arguments. */
650 int vreg = 2;
651 /* The address, at which the next general purpose parameter
652 (integer, struct, float, ...) should be saved. */
653 CORE_ADDR gparam;
654 /* Address, at which the next Altivec vector parameter should be
655 saved. */
656 CORE_ADDR vparam;
657
658 if (!write_pass)
659 {
660 /* During the first pass, GPARAM and VPARAM are more like
661 offsets (start address zero) than addresses. That way
662 the accumulate the total stack space each region
663 requires. */
664 gparam = 0;
665 vparam = 0;
666 }
667 else
668 {
669 /* Decrement the stack pointer making space for the Altivec
670 and general on-stack parameters. Set vparam and gparam
671 to their corresponding regions. */
672 vparam = align_down (sp - vparam_size, 16);
673 gparam = align_down (vparam - gparam_size, 16);
674 /* Add in space for the TOC, link editor double word,
675 compiler double word, LR save area, CR save area. */
676 sp = align_down (gparam - 48, 16);
677 }
678
679 /* If the function is returning a `struct', then there is an
680 extra hidden parameter (which will be passed in r3)
681 containing the address of that struct.. In that case we
682 should advance one word and start from r4 register to copy
683 parameters. This also consumes one on-stack parameter slot. */
684 if (struct_return)
685 {
686 if (write_pass)
687 regcache_cooked_write_signed (regcache,
688 tdep->ppc_gp0_regnum + greg,
689 struct_addr);
690 greg++;
691 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
692 }
693
694 for (argno = 0; argno < nargs; argno++)
695 {
696 struct value *arg = args[argno];
697 struct type *type = check_typedef (value_type (arg));
698 const bfd_byte *val = value_contents (arg);
699 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
700 {
701 /* Floats and Doubles go in f1 .. f13. They also
702 consume a left aligned GREG,, and can end up in
703 memory. */
704 if (write_pass)
705 {
706 if (ppc_floating_point_unit_p (current_gdbarch)
707 && freg <= 13)
708 {
709 gdb_byte regval[MAX_REGISTER_SIZE];
710 struct type *regtype
711 = register_type (gdbarch, tdep->ppc_fp0_regnum);
712 convert_typed_floating (val, type, regval, regtype);
713 regcache_cooked_write (regcache,
714 tdep->ppc_fp0_regnum + freg,
715 regval);
716 }
717 if (greg <= 10)
718 {
719 /* The ABI states "Single precision floating
720 point values are mapped to the first word in
721 a single doubleword" and "... floating point
722 values mapped to the first eight doublewords
723 of the parameter save area are also passed in
724 general registers").
725
726 This code interprets that to mean: store it,
727 left aligned, in the general register. */
728 gdb_byte regval[MAX_REGISTER_SIZE];
729 memset (regval, 0, sizeof regval);
730 memcpy (regval, val, TYPE_LENGTH (type));
731 regcache_cooked_write (regcache,
732 tdep->ppc_gp0_regnum + greg,
733 regval);
734 }
735 write_memory (gparam, val, TYPE_LENGTH (type));
736 }
737 /* Always consume parameter stack space. */
738 freg++;
739 greg++;
740 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
741 }
742 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
743 && TYPE_CODE (type) == TYPE_CODE_ARRAY
744 && tdep->ppc_vr0_regnum >= 0)
745 {
746 /* In the Altivec ABI, vectors go in the vector
747 registers v2 .. v13, or when that runs out, a vector
748 annex which goes above all the normal parameters.
749 NOTE: cagney/2003-09-21: This is a guess based on the
750 PowerOpen Altivec ABI. */
751 if (vreg <= 13)
752 {
753 if (write_pass)
754 regcache_cooked_write (regcache,
755 tdep->ppc_vr0_regnum + vreg, val);
756 vreg++;
757 }
758 else
759 {
760 if (write_pass)
761 write_memory (vparam, val, TYPE_LENGTH (type));
762 vparam = align_up (vparam + TYPE_LENGTH (type), 16);
763 }
764 }
765 else if ((TYPE_CODE (type) == TYPE_CODE_INT
766 || TYPE_CODE (type) == TYPE_CODE_ENUM
767 || TYPE_CODE (type) == TYPE_CODE_PTR)
768 && TYPE_LENGTH (type) <= 8)
769 {
770 /* Scalars and Pointers get sign[un]extended and go in
771 gpr3 .. gpr10. They can also end up in memory. */
772 if (write_pass)
773 {
774 /* Sign extend the value, then store it unsigned. */
775 ULONGEST word = unpack_long (type, val);
776 /* Convert any function code addresses into
777 descriptors. */
778 if (TYPE_CODE (type) == TYPE_CODE_PTR
779 && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
780 {
781 CORE_ADDR desc = word;
782 convert_code_addr_to_desc_addr (word, &desc);
783 word = desc;
784 }
785 if (greg <= 10)
786 regcache_cooked_write_unsigned (regcache,
787 tdep->ppc_gp0_regnum +
788 greg, word);
789 write_memory_unsigned_integer (gparam, tdep->wordsize,
790 word);
791 }
792 greg++;
793 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
794 }
795 else
796 {
797 int byte;
798 for (byte = 0; byte < TYPE_LENGTH (type);
799 byte += tdep->wordsize)
800 {
801 if (write_pass && greg <= 10)
802 {
803 gdb_byte regval[MAX_REGISTER_SIZE];
804 int len = TYPE_LENGTH (type) - byte;
805 if (len > tdep->wordsize)
806 len = tdep->wordsize;
807 memset (regval, 0, sizeof regval);
808 /* WARNING: cagney/2003-09-21: As best I can
809 tell, the ABI specifies that the value should
810 be left aligned. Unfortunately, GCC doesn't
811 do this - it instead right aligns even sized
812 values and puts odd sized values on the
813 stack. Work around that by putting both a
814 left and right aligned value into the
815 register (hopefully no one notices :-^).
816 Arrrgh! */
817 /* Left aligned (8 byte values such as pointers
818 fill the buffer). */
819 memcpy (regval, val + byte, len);
820 /* Right aligned (but only if even). */
821 if (len == 1 || len == 2 || len == 4)
822 memcpy (regval + tdep->wordsize - len,
823 val + byte, len);
824 regcache_cooked_write (regcache, greg, regval);
825 }
826 greg++;
827 }
828 if (write_pass)
829 /* WARNING: cagney/2003-09-21: Strictly speaking, this
830 isn't necessary, unfortunately, GCC appears to get
831 "struct convention" parameter passing wrong putting
832 odd sized structures in memory instead of in a
833 register. Work around this by always writing the
834 value to memory. Fortunately, doing this
835 simplifies the code. */
836 write_memory (gparam, val, TYPE_LENGTH (type));
837 if (write_pass)
838 /* WARNING: cagney/2004-06-20: It appears that GCC
839 likes to put structures containing a single
840 floating-point member in an FP register instead of
841 general general purpose. */
842 /* Always consume parameter stack space. */
843 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
844 }
845 }
846
847 if (!write_pass)
848 {
849 /* Save the true region sizes ready for the second pass. */
850 vparam_size = vparam;
851 /* Make certain that the general parameter save area is at
852 least the minimum 8 registers (or doublewords) in size. */
853 if (greg < 8)
854 gparam_size = 8 * tdep->wordsize;
855 else
856 gparam_size = gparam;
857 }
858 }
859
860 /* Update %sp. */
861 regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
862
863 /* Write the backchain (it occupies WORDSIZED bytes). */
864 write_memory_signed_integer (sp, tdep->wordsize, back_chain);
865
866 /* Point the inferior function call's return address at the dummy's
867 breakpoint. */
868 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
869
870 /* Use the func_addr to find the descriptor, and use that to find
871 the TOC. */
872 {
873 CORE_ADDR desc_addr;
874 if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
875 {
876 /* The TOC is the second double word in the descriptor. */
877 CORE_ADDR toc =
878 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
879 tdep->wordsize);
880 regcache_cooked_write_unsigned (regcache,
881 tdep->ppc_gp0_regnum + 2, toc);
882 }
883 }
884
885 return sp;
886 }
887
888
889 /* The 64 bit ABI retun value convention.
890
891 Return non-zero if the return-value is stored in a register, return
892 0 if the return-value is instead stored on the stack (a.k.a.,
893 struct return convention).
894
895 For a return-value stored in a register: when WRITEBUF is non-NULL,
896 copy the buffer to the corresponding register return-value location
897 location; when READBUF is non-NULL, fill the buffer from the
898 corresponding register return-value location. */
899 enum return_value_convention
900 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
901 struct regcache *regcache, gdb_byte *readbuf,
902 const gdb_byte *writebuf)
903 {
904 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
905
906 /* This function exists to support a calling convention that
907 requires floating-point registers. It shouldn't be used on
908 processors that lack them. */
909 gdb_assert (ppc_floating_point_unit_p (gdbarch));
910
911 /* Floats and doubles in F1. */
912 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
913 {
914 gdb_byte regval[MAX_REGISTER_SIZE];
915 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
916 if (writebuf != NULL)
917 {
918 convert_typed_floating (writebuf, valtype, regval, regtype);
919 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
920 }
921 if (readbuf != NULL)
922 {
923 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
924 convert_typed_floating (regval, regtype, readbuf, valtype);
925 }
926 return RETURN_VALUE_REGISTER_CONVENTION;
927 }
928 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
929 || TYPE_CODE (valtype) == TYPE_CODE_ENUM)
930 && TYPE_LENGTH (valtype) <= 8)
931 {
932 /* Integers in r3. */
933 if (writebuf != NULL)
934 {
935 /* Be careful to sign extend the value. */
936 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
937 unpack_long (valtype, writebuf));
938 }
939 if (readbuf != NULL)
940 {
941 /* Extract the integer from r3. Since this is truncating the
942 value, there isn't a sign extension problem. */
943 ULONGEST regval;
944 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
945 &regval);
946 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
947 }
948 return RETURN_VALUE_REGISTER_CONVENTION;
949 }
950 /* All pointers live in r3. */
951 if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
952 {
953 /* All pointers live in r3. */
954 if (writebuf != NULL)
955 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
956 if (readbuf != NULL)
957 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
958 return RETURN_VALUE_REGISTER_CONVENTION;
959 }
960 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
961 && TYPE_LENGTH (valtype) <= 8
962 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
963 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
964 {
965 /* Small character arrays are returned, right justified, in r3. */
966 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
967 - TYPE_LENGTH (valtype));
968 if (writebuf != NULL)
969 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
970 offset, TYPE_LENGTH (valtype), writebuf);
971 if (readbuf != NULL)
972 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
973 offset, TYPE_LENGTH (valtype), readbuf);
974 return RETURN_VALUE_REGISTER_CONVENTION;
975 }
976 /* Big floating point values get stored in adjacent floating
977 point registers. */
978 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
979 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
980 {
981 if (writebuf || readbuf != NULL)
982 {
983 int i;
984 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
985 {
986 if (writebuf != NULL)
987 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
988 (const bfd_byte *) writebuf + i * 8);
989 if (readbuf != NULL)
990 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
991 (bfd_byte *) readbuf + i * 8);
992 }
993 }
994 return RETURN_VALUE_REGISTER_CONVENTION;
995 }
996 /* Complex values get returned in f1:f2, need to convert. */
997 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
998 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
999 {
1000 if (regcache != NULL)
1001 {
1002 int i;
1003 for (i = 0; i < 2; i++)
1004 {
1005 gdb_byte regval[MAX_REGISTER_SIZE];
1006 struct type *regtype =
1007 register_type (current_gdbarch, tdep->ppc_fp0_regnum);
1008 if (writebuf != NULL)
1009 {
1010 convert_typed_floating ((const bfd_byte *) writebuf +
1011 i * (TYPE_LENGTH (valtype) / 2),
1012 valtype, regval, regtype);
1013 regcache_cooked_write (regcache,
1014 tdep->ppc_fp0_regnum + 1 + i,
1015 regval);
1016 }
1017 if (readbuf != NULL)
1018 {
1019 regcache_cooked_read (regcache,
1020 tdep->ppc_fp0_regnum + 1 + i,
1021 regval);
1022 convert_typed_floating (regval, regtype,
1023 (bfd_byte *) readbuf +
1024 i * (TYPE_LENGTH (valtype) / 2),
1025 valtype);
1026 }
1027 }
1028 }
1029 return RETURN_VALUE_REGISTER_CONVENTION;
1030 }
1031 /* Big complex values get stored in f1:f4. */
1032 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
1033 {
1034 if (regcache != NULL)
1035 {
1036 int i;
1037 for (i = 0; i < 4; i++)
1038 {
1039 if (writebuf != NULL)
1040 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1041 (const bfd_byte *) writebuf + i * 8);
1042 if (readbuf != NULL)
1043 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1044 (bfd_byte *) readbuf + i * 8);
1045 }
1046 }
1047 return RETURN_VALUE_REGISTER_CONVENTION;
1048 }
1049 return RETURN_VALUE_STRUCT_CONVENTION;
1050 }
1051
1052 CORE_ADDR
1053 ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
1054 CORE_ADDR bpaddr)
1055 {
1056 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at
1057 a function-descriptor while the corresponding minimal-symbol
1058 ".FN" should point at the entry point. Consequently, a command
1059 like "break FN" applied to an object file with only minimal
1060 symbols, will insert the breakpoint into the descriptor at "FN"
1061 and not the function at ".FN". Avoid this confusion by adjusting
1062 any attempt to set a descriptor breakpoint into a corresponding
1063 function breakpoint. Note that GDB warns the user when this
1064 adjustment is applied - that's ok as otherwise the user will have
1065 no way of knowing why their breakpoint at "FN" resulted in the
1066 program stopping at ".FN". */
1067 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, &current_target);
1068 }
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