gdb/ppc-tdep.h

   1 /* Target-dependent code for GDB, the GNU debugger.
   2
   3    Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010
   4    Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef PPC_TDEP_H
  22 #define PPC_TDEP_H
  23
  24 struct gdbarch;
  25 struct frame_info;
  26 struct value;
  27 struct regcache;
  28 struct type;
  29
  30 /* From ppc-sysv-tdep.c ... */
  31 enum return_value_convention ppc_sysv_abi_return_value (struct gdbarch *gdbarch,
  32                                                         struct type *func_type,
  33                                                         struct type *valtype,
  34                                                         struct regcache *regcache,
  35                                                         gdb_byte *readbuf,
  36                                                         const gdb_byte *writebuf);
  37 enum return_value_convention ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
  38                                                                struct type *func_type,
  39                                                                struct type *valtype,
  40                                                                struct regcache *regcache,
  41                                                                gdb_byte *readbuf,
  42                                                                const gdb_byte *writebuf);
  43 CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
  44                                         struct value *function,
  45                                         struct regcache *regcache,
  46                                         CORE_ADDR bp_addr, int nargs,
  47                                         struct value **args, CORE_ADDR sp,
  48                                         int struct_return,
  49                                         CORE_ADDR struct_addr);
  50 CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
  51                                           struct value *function,
  52                                           struct regcache *regcache,
  53                                           CORE_ADDR bp_addr, int nargs,
  54                                           struct value **args, CORE_ADDR sp,
  55                                           int struct_return,
  56                                           CORE_ADDR struct_addr);
  57 enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch,
  58                                                           struct type *func_type,
  59                                                           struct type *valtype,
  60                                                           struct regcache *regcache,
  61                                                           gdb_byte *readbuf,
  62                                                           const gdb_byte *writebuf);
  63
  64 /* From rs6000-tdep.c... */
  65 int altivec_register_p (struct gdbarch *gdbarch, int regno);
  66 int vsx_register_p (struct gdbarch *gdbarch, int regno);
  67 int spe_register_p (struct gdbarch *gdbarch, int regno);
  68
  69 /* Return non-zero if the architecture described by GDBARCH has
  70    floating-point registers (f0 --- f31 and fpscr).  */
  71 int ppc_floating_point_unit_p (struct gdbarch *gdbarch);
  72
  73 /* Return non-zero if the architecture described by GDBARCH has
  74    Altivec registers (vr0 --- vr31, vrsave and vscr).  */
  75 int ppc_altivec_support_p (struct gdbarch *gdbarch);
  76
  77 /* Return non-zero if the architecture described by GDBARCH has
  78    VSX registers (vsr0 --- vsr63).  */
  79 int vsx_support_p (struct gdbarch *gdbarch);
  80 int ppc_deal_with_atomic_sequence (struct frame_info *frame);
  81
  82
  83 /* Register set description.  */
  84
  85 struct ppc_reg_offsets
  86 {
  87   /* General-purpose registers.  */
  88   int r0_offset;
  89   int gpr_size; /* size for r0-31, pc, ps, lr, ctr.  */
  90   int xr_size;  /* size for cr, xer, mq.  */
  91   int pc_offset;
  92   int ps_offset;
  93   int cr_offset;
  94   int lr_offset;
  95   int ctr_offset;
  96   int xer_offset;
  97   int mq_offset;
  98
  99   /* Floating-point registers.  */
 100   int f0_offset;
 101   int fpscr_offset;
 102   int fpscr_size;
 103
 104   /* AltiVec registers.  */
 105   int vr0_offset;
 106   int vscr_offset;
 107   int vrsave_offset;
 108 };
 109
 110 extern void ppc_supply_reg (struct regcache *regcache, int regnum,
 111                             const gdb_byte *regs, size_t offset, int regsize);
 112
 113 extern void ppc_collect_reg (const struct regcache *regcache, int regnum,
 114                              gdb_byte *regs, size_t offset, int regsize);
 115
 116 /* Supply register REGNUM in the general-purpose register set REGSET
 117    from the buffer specified by GREGS and LEN to register cache
 118    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */
 119
 120 extern void ppc_supply_gregset (const struct regset *regset,
 121                                 struct regcache *regcache,
 122                                 int regnum, const void *gregs, size_t len);
 123
 124 /* Supply register REGNUM in the floating-point register set REGSET
 125    from the buffer specified by FPREGS and LEN to register cache
 126    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */
 127
 128 extern void ppc_supply_fpregset (const struct regset *regset,
 129                                  struct regcache *regcache,
 130                                  int regnum, const void *fpregs, size_t len);
 131
 132 /* Supply register REGNUM in the Altivec register set REGSET
 133    from the buffer specified by VRREGS and LEN to register cache
 134    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */
 135
 136 extern void ppc_supply_vrregset (const struct regset *regset,
 137                                  struct regcache *regcache,
 138                                  int regnum, const void *vrregs, size_t len);
 139
 140 /* Supply register REGNUM in the VSX register set REGSET
 141    from the buffer specified by VSXREGS and LEN to register cache
 142    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */
 143
 144 extern void ppc_supply_vsxregset (const struct regset *regset,
 145                                  struct regcache *regcache,
 146                                  int regnum, const void *vsxregs, size_t len);
 147
 148 /* Collect register REGNUM in the general-purpose register set
 149    REGSET. from register cache REGCACHE into the buffer specified by
 150    GREGS and LEN.  If REGNUM is -1, do this for all registers in
 151    REGSET.  */
 152
 153 extern void ppc_collect_gregset (const struct regset *regset,
 154                                  const struct regcache *regcache,
 155                                  int regnum, void *gregs, size_t len);
 156
 157 /* Collect register REGNUM in the floating-point register set
 158    REGSET. from register cache REGCACHE into the buffer specified by
 159    FPREGS and LEN.  If REGNUM is -1, do this for all registers in
 160    REGSET.  */
 161
 162 extern void ppc_collect_fpregset (const struct regset *regset,
 163                                   const struct regcache *regcache,
 164                                   int regnum, void *fpregs, size_t len);
 165
 166 /* Collect register REGNUM in the Altivec register set
 167    REGSET from register cache REGCACHE into the buffer specified by
 168    VRREGS and LEN.  If REGNUM is -1, do this for all registers in
 169    REGSET.  */
 170
 171 extern void ppc_collect_vrregset (const struct regset *regset,
 172                                   const struct regcache *regcache,
 173                                   int regnum, void *vrregs, size_t len);
 174
 175 /* Collect register REGNUM in the VSX register set
 176    REGSET from register cache REGCACHE into the buffer specified by
 177    VSXREGS and LEN.  If REGNUM is -1, do this for all registers in
 178    REGSET.  */
 179
 180 extern void ppc_collect_vsxregset (const struct regset *regset,
 181                                   const struct regcache *regcache,
 182                                   int regnum, void *vsxregs, size_t len);
 183
 184 /* Private data that this module attaches to struct gdbarch. */
 185
 186 /* Vector ABI used by the inferior.  */
 187 enum powerpc_vector_abi
 188 {
 189   POWERPC_VEC_AUTO,
 190   POWERPC_VEC_GENERIC,
 191   POWERPC_VEC_ALTIVEC,
 192   POWERPC_VEC_SPE,
 193   POWERPC_VEC_LAST
 194 };
 195
 196 struct gdbarch_tdep
 197   {
 198     int wordsize;               /* Size in bytes of fixed-point word.  */
 199     int soft_float;             /* Avoid FP registers for arguments?  */
 200
 201     /* How to pass vector arguments.  Never set to AUTO or LAST.  */
 202     enum powerpc_vector_abi vector_abi;
 203
 204     int ppc_gp0_regnum;         /* GPR register 0 */
 205     int ppc_toc_regnum;         /* TOC register */
 206     int ppc_ps_regnum;          /* Processor (or machine) status (%msr) */
 207     int ppc_cr_regnum;          /* Condition register */
 208     int ppc_lr_regnum;          /* Link register */
 209     int ppc_ctr_regnum;         /* Count register */
 210     int ppc_xer_regnum;         /* Integer exception register */
 211
 212     /* Not all PPC and RS6000 variants will have the registers
 213        represented below.  A -1 is used to indicate that the register
 214        is not present in this variant.  */
 215
 216     /* Floating-point registers.  */
 217     int ppc_fp0_regnum;         /* floating-point register 0 */
 218     int ppc_fpscr_regnum;       /* fp status and condition register */
 219
 220     /* Multiplier-Quotient Register (older POWER architectures only).  */
 221     int ppc_mq_regnum;
 222
 223     /* POWER7 VSX registers.  */
 224     int ppc_vsr0_regnum;        /* First VSX register.  */
 225     int ppc_vsr0_upper_regnum;  /* First right most dword vsx register.  */
 226     int ppc_efpr0_regnum;       /* First Extended FP register.  */
 227
 228     /* Altivec registers.  */
 229     int ppc_vr0_regnum;         /* First AltiVec register */
 230     int ppc_vrsave_regnum;      /* Last AltiVec register */
 231
 232     /* SPE registers.  */
 233     int ppc_ev0_upper_regnum;   /* First GPR upper half register */
 234     int ppc_ev0_regnum;         /* First ev register */
 235     int ppc_acc_regnum;         /* SPE 'acc' register */
 236     int ppc_spefscr_regnum;     /* SPE 'spefscr' register */
 237
 238     /* Decimal 128 registers.  */
 239     int ppc_dl0_regnum;         /* First Decimal128 argument register pair.  */
 240
 241     /* Offset to ABI specific location where link register is saved.  */
 242     int lr_frame_offset;
 243
 244     /* An array of integers, such that sim_regno[I] is the simulator
 245        register number for GDB register number I, or -1 if the
 246        simulator does not implement that register.  */
 247     int *sim_regno;
 248
 249     /* ISA-specific types.  */
 250     struct type *ppc_builtin_type_vec64;
 251     struct type *ppc_builtin_type_vec128;
 252 };
 253
 254
 255 /* Constants for register set sizes.  */
 256 enum
 257   {
 258     ppc_num_gprs = 32,          /* 32 general-purpose registers.  */
 259     ppc_num_fprs = 32,          /* 32 floating-point registers.  */
 260     ppc_num_srs = 16,           /* 16 segment registers.  */
 261     ppc_num_vrs = 32,           /* 32 Altivec vector registers.  */
 262     ppc_num_vshrs = 32,         /* 32 doublewords (dword 1 of vs0~vs31).  */
 263     ppc_num_vsrs = 64,          /* 64 VSX vector registers.  */
 264     ppc_num_efprs = 32          /* 32 Extended FP registers.  */
 265   };
 266
 267
 268 /* Register number constants.  These are GDB internal register
 269    numbers; they are not used for the simulator or remote targets.
 270    Extra SPRs (those other than MQ, CTR, LR, XER, SPEFSCR) are given
 271    numbers above PPC_NUM_REGS.  So are segment registers and other
 272    target-defined registers.  */
 273 enum {
 274   PPC_R0_REGNUM = 0,
 275   PPC_F0_REGNUM = 32,
 276   PPC_PC_REGNUM = 64,
 277   PPC_MSR_REGNUM = 65,
 278   PPC_CR_REGNUM = 66,
 279   PPC_LR_REGNUM = 67,
 280   PPC_CTR_REGNUM = 68,
 281   PPC_XER_REGNUM = 69,
 282   PPC_FPSCR_REGNUM = 70,
 283   PPC_MQ_REGNUM = 71,
 284   PPC_SPE_UPPER_GP0_REGNUM = 72,
 285   PPC_SPE_ACC_REGNUM = 104,
 286   PPC_SPE_FSCR_REGNUM = 105,
 287   PPC_VR0_REGNUM = 106,
 288   PPC_VSCR_REGNUM = 138,
 289   PPC_VRSAVE_REGNUM = 139,
 290   PPC_VSR0_UPPER_REGNUM = 140,
 291   PPC_VSR31_UPPER_REGNUM = 171,
 292   PPC_NUM_REGS
 293 };
 294
 295
 296 /* Instruction size.  */
 297 #define PPC_INSN_SIZE 4
 298
 299 /* Estimate for the maximum number of instrctions in a function epilogue.  */
 300 #define PPC_MAX_EPILOGUE_INSTRUCTIONS  52
 301
 302 #endif /* ppc-tdep.h */