gdb/ppc-tdep.h

   1 /* Target-dependent code for GDB, the GNU debugger.
   2
   3    Copyright 2000, 2001, 2002, 2003, 2004 Free Software Foundation,
   4    Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 59 Temple Place - Suite 330,
  21    Boston, MA 02111-1307, USA.  */
  22
  23 #ifndef PPC_TDEP_H
  24 #define PPC_TDEP_H
  25
  26 struct gdbarch;
  27 struct frame_info;
  28 struct value;
  29 struct regcache;
  30 struct type;
  31
  32 /* From ppc-linux-tdep.c... */
  33 enum return_value_convention ppc_sysv_abi_return_value (struct gdbarch *gdbarch,
  34                                                         struct type *valtype,
  35                                                         struct regcache *regcache,
  36                                                         void *readbuf,
  37                                                         const void *writebuf);
  38 enum return_value_convention ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
  39                                                                struct type *valtype,
  40                                                                struct regcache *regcache,
  41                                                                void *readbuf,
  42                                                                const void *writebuf);
  43 CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
  44                                         struct value *function,
  45                                         struct regcache *regcache,
  46                                         CORE_ADDR bp_addr, int nargs,
  47                                         struct value **args, CORE_ADDR sp,
  48                                         int struct_return,
  49                                         CORE_ADDR struct_addr);
  50 CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
  51                                           struct value *function,
  52                                           struct regcache *regcache,
  53                                           CORE_ADDR bp_addr, int nargs,
  54                                           struct value **args, CORE_ADDR sp,
  55                                           int struct_return,
  56                                           CORE_ADDR struct_addr);
  57 CORE_ADDR ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
  58                                                     CORE_ADDR bpaddr);
  59 int ppc_linux_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache);
  60 struct link_map_offsets *ppc_linux_svr4_fetch_link_map_offsets (void);
  61 void ppc_linux_supply_gregset (struct regcache *regcache,
  62                                int regnum, const void *gregs, size_t size,
  63                                int wordsize);
  64 void ppc_linux_supply_fpregset (const struct regset *regset,
  65                                 struct regcache *regcache,
  66                                 int regnum, const void *gregs, size_t size);
  67
  68 enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch,
  69                                                           struct type *valtype,
  70                                                           struct regcache *regcache,
  71                                                           void *readbuf,
  72                                                           const void *writebuf);
  73
  74 /* From rs6000-tdep.c... */
  75 int altivec_register_p (int regno);
  76 int spe_register_p (int regno);
  77
  78 /* Return non-zero if the architecture described by GDBARCH has
  79    floating-point registers (f0 --- f31 and fpscr).  */
  80 int ppc_floating_point_unit_p (struct gdbarch *gdbarch);
  81
  82 /* Register set description.  */
  83
  84 struct ppc_reg_offsets
  85 {
  86   /* General-purpose registers.  */
  87   int r0_offset;
  88   int pc_offset;
  89   int ps_offset;
  90   int cr_offset;
  91   int lr_offset;
  92   int ctr_offset;
  93   int xer_offset;
  94   int mq_offset;
  95
  96   /* Floating-point registers.  */
  97   int f0_offset;
  98   int fpscr_offset;
  99
 100   /* AltiVec registers.  */
 101   int vr0_offset;
 102   int vscr_offset;
 103   int vrsave_offset;
 104 };
 105
 106 /* Supply register REGNUM in the general-purpose register set REGSET
 107    from the buffer specified by GREGS and LEN to register cache
 108    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */
 109
 110 extern void ppc_supply_gregset (const struct regset *regset,
 111                                 struct regcache *regcache,
 112                                 int regnum, const void *gregs, size_t len);
 113
 114 /* Supply register REGNUM in the floating-point register set REGSET
 115    from the buffer specified by FPREGS and LEN to register cache
 116    REGCACHE.  If REGNUM is -1, do this for all registers in REGSET.  */
 117
 118 extern void ppc_supply_fpregset (const struct regset *regset,
 119                                  struct regcache *regcache,
 120                                  int regnum, const void *fpregs, size_t len);
 121
 122 /* Collect register REGNUM in the general-purpose register set
 123    REGSET. from register cache REGCACHE into the buffer specified by
 124    GREGS and LEN.  If REGNUM is -1, do this for all registers in
 125    REGSET.  */
 126
 127 extern void ppc_collect_gregset (const struct regset *regset,
 128                                  const struct regcache *regcache,
 129                                  int regnum, void *gregs, size_t len);
 130
 131 /* Collect register REGNUM in the floating-point register set
 132    REGSET. from register cache REGCACHE into the buffer specified by
 133    FPREGS and LEN.  If REGNUM is -1, do this for all registers in
 134    REGSET.  */
 135
 136 extern void ppc_collect_fpregset (const struct regset *regset,
 137                                   const struct regcache *regcache,
 138                                   int regnum, void *fpregs, size_t len);
 139
 140 /* Private data that this module attaches to struct gdbarch. */
 141
 142 struct gdbarch_tdep
 143   {
 144     int wordsize;              /* size in bytes of fixed-point word */
 145     const struct reg *regs;    /* from current variant */
 146     int ppc_gp0_regnum;         /* GPR register 0 */
 147     int ppc_gprs_pseudo_p;      /* non-zero if GPRs are pseudo-registers */
 148     int ppc_toc_regnum;         /* TOC register */
 149     int ppc_ps_regnum;          /* Processor (or machine) status (%msr) */
 150     int ppc_cr_regnum;          /* Condition register */
 151     int ppc_lr_regnum;          /* Link register */
 152     int ppc_ctr_regnum;         /* Count register */
 153     int ppc_xer_regnum;         /* Integer exception register */
 154
 155     /* On PPC and RS6000 variants that have no floating-point
 156        registers, the next two members will be -1.  */
 157     int ppc_fp0_regnum;         /* floating-point register 0 */
 158     int ppc_fpscr_regnum;       /* Floating point status and condition
 159                                    register */
 160
 161     int ppc_mq_regnum;          /* Multiply/Divide extension register */
 162     int ppc_vr0_regnum;         /* First AltiVec register */
 163     int ppc_vrsave_regnum;      /* Last AltiVec register */
 164     int ppc_ev0_regnum;         /* First ev register */
 165     int ppc_ev31_regnum;        /* Last ev register */
 166     int ppc_acc_regnum;         /* SPE 'acc' register */
 167     int ppc_spefscr_regnum;     /* SPE 'spefscr' register */
 168     int lr_frame_offset;        /* Offset to ABI specific location where
 169                                    link register is saved.  */
 170 };
 171
 172
 173 /* Constants for register set sizes.  */
 174 enum
 175   {
 176     ppc_num_gprs = 32,          /* 32 general-purpose registers */
 177     ppc_num_fprs = 32           /* 32 floating-point registers */
 178     ppc_num_srs = 16,           /* 16 segment registers */
 179   };
 180
 181
 182 /* Constants for SPR register numbers.  These are *not* GDB register
 183    numbers: they are the numbers used in the PowerPC ISA itself to
 184    refer to these registers.
 185
 186    This table includes all the SPRs from all the variants I could find
 187    documentation for.
 188
 189    There may be registers from different PowerPC variants assigned the
 190    same number, but that's fine: GDB and the SIM always use the
 191    numbers in the context of a particular variant, so it's not
 192    ambiguous.
 193
 194    We need to deviate from the naming pattern when variants have
 195    special-purpose registers of the same name, but with different
 196    numbers.  Fortunately, this is rare: look below to see how we
 197    handle the 'tcr' registers on the 403/403GX and 602.  */
 198
 199 enum
 200   {
 201     ppc_spr_mq        =    0,
 202     ppc_spr_xer       =    1,
 203     ppc_spr_rtcu      =    4,
 204     ppc_spr_rtcl      =    5,
 205     ppc_spr_lr        =    8,
 206     ppc_spr_ctr       =    9,
 207     ppc_spr_cnt       =    9,
 208     ppc_spr_dsisr     =   18,
 209     ppc_spr_dar       =   19,
 210     ppc_spr_dec       =   22,
 211     ppc_spr_sdr1      =   25,
 212     ppc_spr_srr0      =   26,
 213     ppc_spr_srr1      =   27,
 214     ppc_spr_eie       =   80,
 215     ppc_spr_eid       =   81,
 216     ppc_spr_nri       =   82,
 217     ppc_spr_sp        =  102,
 218     ppc_spr_cmpa      =  144,
 219     ppc_spr_cmpb      =  145,
 220     ppc_spr_cmpc      =  146,
 221     ppc_spr_cmpd      =  147,
 222     ppc_spr_icr       =  148,
 223     ppc_spr_der       =  149,
 224     ppc_spr_counta    =  150,
 225     ppc_spr_countb    =  151,
 226     ppc_spr_cmpe      =  152,
 227     ppc_spr_cmpf      =  153,
 228     ppc_spr_cmpg      =  154,
 229     ppc_spr_cmph      =  155,
 230     ppc_spr_lctrl1    =  156,
 231     ppc_spr_lctrl2    =  157,
 232     ppc_spr_ictrl     =  158,
 233     ppc_spr_bar       =  159,
 234     ppc_spr_vrsave    =  256,
 235     ppc_spr_sprg0     =  272,
 236     ppc_spr_sprg1     =  273,
 237     ppc_spr_sprg2     =  274,
 238     ppc_spr_sprg3     =  275,
 239     ppc_spr_ear       =  282,
 240     ppc_spr_tbl       =  284,
 241     ppc_spr_tbu       =  285,
 242     ppc_spr_pvr       =  287,
 243     ppc_spr_spefscr   =  512,
 244     ppc_spr_ibat0u    =  528,
 245     ppc_spr_ibat0l    =  529,
 246     ppc_spr_ibat1u    =  530,
 247     ppc_spr_ibat1l    =  531,
 248     ppc_spr_ibat2u    =  532,
 249     ppc_spr_ibat2l    =  533,
 250     ppc_spr_ibat3u    =  534,
 251     ppc_spr_ibat3l    =  535,
 252     ppc_spr_dbat0u    =  536,
 253     ppc_spr_dbat0l    =  537,
 254     ppc_spr_dbat1u    =  538,
 255     ppc_spr_dbat1l    =  539,
 256     ppc_spr_dbat2u    =  540,
 257     ppc_spr_dbat2l    =  541,
 258     ppc_spr_dbat3u    =  542,
 259     ppc_spr_dbat3l    =  543,
 260     ppc_spr_ic_cst    =  560,
 261     ppc_spr_ic_adr    =  561,
 262     ppc_spr_ic_dat    =  562,
 263     ppc_spr_dc_cst    =  568,
 264     ppc_spr_dc_adr    =  569,
 265     ppc_spr_dc_dat    =  570,
 266     ppc_spr_dpdr      =  630,
 267     ppc_spr_dpir      =  631,
 268     ppc_spr_immr      =  638,
 269     ppc_spr_mi_ctr    =  784,
 270     ppc_spr_mi_ap     =  786,
 271     ppc_spr_mi_epn    =  787,
 272     ppc_spr_mi_twc    =  789,
 273     ppc_spr_mi_rpn    =  790,
 274     ppc_spr_mi_cam    =  816,
 275     ppc_spr_mi_ram0   =  817,
 276     ppc_spr_mi_ram1   =  818,
 277     ppc_spr_md_ctr    =  792,
 278     ppc_spr_m_casid   =  793,
 279     ppc_spr_md_ap     =  794,
 280     ppc_spr_md_epn    =  795,
 281     ppc_spr_md_twb    =  796,
 282     ppc_spr_md_twc    =  797,
 283     ppc_spr_md_rpn    =  798,
 284     ppc_spr_m_tw      =  799,
 285     ppc_spr_md_dbcam  =  824,
 286     ppc_spr_md_dbram0 =  825,
 287     ppc_spr_md_dbram1 =  826,
 288     ppc_spr_ummcr0    =  936,
 289     ppc_spr_upmc1     =  937,
 290     ppc_spr_upmc2     =  938,
 291     ppc_spr_usia      =  939,
 292     ppc_spr_ummcr1    =  940,
 293     ppc_spr_upmc3     =  941,
 294     ppc_spr_upmc4     =  942,
 295     ppc_spr_zpr       =  944,
 296     ppc_spr_pid       =  945,
 297     ppc_spr_mmcr0     =  952,
 298     ppc_spr_pmc1      =  953,
 299     ppc_spr_sgr       =  953,
 300     ppc_spr_pmc2      =  954,
 301     ppc_spr_dcwr      =  954,
 302     ppc_spr_sia       =  955,
 303     ppc_spr_mmcr1     =  956,
 304     ppc_spr_pmc3      =  957,
 305     ppc_spr_pmc4      =  958,
 306     ppc_spr_sda       =  959,
 307     ppc_spr_tbhu      =  972,
 308     ppc_spr_tblu      =  973,
 309     ppc_spr_dmiss     =  976,
 310     ppc_spr_dcmp      =  977,
 311     ppc_spr_hash1     =  978,
 312     ppc_spr_hash2     =  979,
 313     ppc_spr_icdbdr    =  979,
 314     ppc_spr_imiss     =  980,
 315     ppc_spr_esr       =  980,
 316     ppc_spr_icmp      =  981,
 317     ppc_spr_dear      =  981,
 318     ppc_spr_rpa       =  982,
 319     ppc_spr_evpr      =  982,
 320     ppc_spr_cdbcr     =  983,
 321     ppc_spr_tsr       =  984,
 322     ppc_spr_602_tcr   =  984,
 323     ppc_spr_403_tcr   =  986,
 324     ppc_spr_ibr       =  986,
 325     ppc_spr_pit       =  987,
 326     ppc_spr_esasrr    =  988,
 327     ppc_spr_tbhi      =  988,
 328     ppc_spr_tblo      =  989,
 329     ppc_spr_srr2      =  990,
 330     ppc_spr_sebr      =  990,
 331     ppc_spr_srr3      =  991,
 332     ppc_spr_ser       =  991,
 333     ppc_spr_hid0      = 1008,
 334     ppc_spr_dbsr      = 1008,
 335     ppc_spr_hid1      = 1009,
 336     ppc_spr_iabr      = 1010,
 337     ppc_spr_dbcr      = 1010,
 338     ppc_spr_iac1      = 1012,
 339     ppc_spr_dabr      = 1013,
 340     ppc_spr_iac2      = 1013,
 341     ppc_spr_dac1      = 1014,
 342     ppc_spr_dac2      = 1015,
 343     ppc_spr_l2cr      = 1017,
 344     ppc_spr_dccr      = 1018,
 345     ppc_spr_ictc      = 1019,
 346     ppc_spr_iccr      = 1019,
 347     ppc_spr_thrm1     = 1020,
 348     ppc_spr_pbl1      = 1020,
 349     ppc_spr_thrm2     = 1021,
 350     ppc_spr_pbu1      = 1021,
 351     ppc_spr_thrm3     = 1022,
 352     ppc_spr_pbl2      = 1022,
 353     ppc_spr_fpecr     = 1022,
 354     ppc_spr_lt        = 1022,
 355     ppc_spr_pir       = 1023,
 356     ppc_spr_pbu2      = 1023
 357   };
 358
 359 #endif