Updated copyright notices for most files.
[deliverable/binutils-gdb.git] / gdb / ppc-tdep.h
1 /* Target-dependent code for GDB, the GNU debugger.
2
3 Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008
4 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #ifndef PPC_TDEP_H
22 #define PPC_TDEP_H
23
24 struct gdbarch;
25 struct frame_info;
26 struct value;
27 struct regcache;
28 struct type;
29
30 /* From ppc-linux-tdep.c... */
31 enum return_value_convention ppc_sysv_abi_return_value (struct gdbarch *gdbarch,
32 struct type *valtype,
33 struct regcache *regcache,
34 gdb_byte *readbuf,
35 const gdb_byte *writebuf);
36 enum return_value_convention ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
37 struct type *valtype,
38 struct regcache *regcache,
39 gdb_byte *readbuf,
40 const gdb_byte *writebuf);
41 CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
42 struct value *function,
43 struct regcache *regcache,
44 CORE_ADDR bp_addr, int nargs,
45 struct value **args, CORE_ADDR sp,
46 int struct_return,
47 CORE_ADDR struct_addr);
48 CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
49 struct value *function,
50 struct regcache *regcache,
51 CORE_ADDR bp_addr, int nargs,
52 struct value **args, CORE_ADDR sp,
53 int struct_return,
54 CORE_ADDR struct_addr);
55 CORE_ADDR ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch,
56 CORE_ADDR bpaddr);
57 int ppc_linux_memory_remove_breakpoint (struct bp_target_info *bp_tgt);
58 struct link_map_offsets *ppc_linux_svr4_fetch_link_map_offsets (void);
59 const struct regset *ppc_linux_gregset (int);
60 const struct regset *ppc_linux_fpregset (void);
61
62 enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch,
63 struct type *valtype,
64 struct regcache *regcache,
65 gdb_byte *readbuf,
66 const gdb_byte *writebuf);
67
68 /* From rs6000-tdep.c... */
69 int altivec_register_p (int regno);
70 int spe_register_p (int regno);
71
72 /* Return non-zero if the architecture described by GDBARCH has
73 floating-point registers (f0 --- f31 and fpscr). */
74 int ppc_floating_point_unit_p (struct gdbarch *gdbarch);
75
76 /* Return non-zero if the architecture described by GDBARCH has
77 Altivec registers (vr0 --- vr31, vrsave and vscr). */
78 int ppc_altivec_support_p (struct gdbarch *gdbarch);
79
80 /* Register set description. */
81
82 struct ppc_reg_offsets
83 {
84 /* General-purpose registers. */
85 int r0_offset;
86 int gpr_size; /* size for r0-31, pc, ps, lr, ctr. */
87 int xr_size; /* size for cr, xer, mq. */
88 int pc_offset;
89 int ps_offset;
90 int cr_offset;
91 int lr_offset;
92 int ctr_offset;
93 int xer_offset;
94 int mq_offset;
95
96 /* Floating-point registers. */
97 int f0_offset;
98 int fpscr_offset;
99 int fpscr_size;
100
101 /* AltiVec registers. */
102 int vr0_offset;
103 int vscr_offset;
104 int vrsave_offset;
105 };
106
107 /* Supply register REGNUM in the general-purpose register set REGSET
108 from the buffer specified by GREGS and LEN to register cache
109 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
110
111 extern void ppc_supply_gregset (const struct regset *regset,
112 struct regcache *regcache,
113 int regnum, const void *gregs, size_t len);
114
115 /* Supply register REGNUM in the floating-point register set REGSET
116 from the buffer specified by FPREGS and LEN to register cache
117 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
118
119 extern void ppc_supply_fpregset (const struct regset *regset,
120 struct regcache *regcache,
121 int regnum, const void *fpregs, size_t len);
122
123 /* Supply register REGNUM in the Altivec register set REGSET
124 from the buffer specified by VRREGS and LEN to register cache
125 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
126
127 extern void ppc_supply_vrregset (const struct regset *regset,
128 struct regcache *regcache,
129 int regnum, const void *vrregs, size_t len);
130
131 /* Collect register REGNUM in the general-purpose register set
132 REGSET. from register cache REGCACHE into the buffer specified by
133 GREGS and LEN. If REGNUM is -1, do this for all registers in
134 REGSET. */
135
136 extern void ppc_collect_gregset (const struct regset *regset,
137 const struct regcache *regcache,
138 int regnum, void *gregs, size_t len);
139
140 /* Collect register REGNUM in the floating-point register set
141 REGSET. from register cache REGCACHE into the buffer specified by
142 FPREGS and LEN. If REGNUM is -1, do this for all registers in
143 REGSET. */
144
145 extern void ppc_collect_fpregset (const struct regset *regset,
146 const struct regcache *regcache,
147 int regnum, void *fpregs, size_t len);
148
149 /* Collect register REGNUM in the Altivec register set
150 REGSET from register cache REGCACHE into the buffer specified by
151 VRREGS and LEN. If REGNUM is -1, do this for all registers in
152 REGSET. */
153
154 extern void ppc_collect_vrregset (const struct regset *regset,
155 const struct regcache *regcache,
156 int regnum, void *vrregs, size_t len);
157
158 /* Private data that this module attaches to struct gdbarch. */
159
160 /* Vector ABI used by the inferior. */
161 enum powerpc_vector_abi
162 {
163 POWERPC_VEC_AUTO,
164 POWERPC_VEC_GENERIC,
165 POWERPC_VEC_ALTIVEC,
166 POWERPC_VEC_SPE,
167 POWERPC_VEC_LAST
168 };
169
170 struct gdbarch_tdep
171 {
172 int wordsize; /* Size in bytes of fixed-point word. */
173 int soft_float; /* Avoid FP registers for arguments? */
174
175 /* How to pass vector arguments. Never set to AUTO or LAST. */
176 enum powerpc_vector_abi vector_abi;
177
178 int ppc_gp0_regnum; /* GPR register 0 */
179 int ppc_toc_regnum; /* TOC register */
180 int ppc_ps_regnum; /* Processor (or machine) status (%msr) */
181 int ppc_cr_regnum; /* Condition register */
182 int ppc_lr_regnum; /* Link register */
183 int ppc_ctr_regnum; /* Count register */
184 int ppc_xer_regnum; /* Integer exception register */
185
186 /* Not all PPC and RS6000 variants will have the registers
187 represented below. A -1 is used to indicate that the register
188 is not present in this variant. */
189
190 /* Floating-point registers. */
191 int ppc_fp0_regnum; /* floating-point register 0 */
192 int ppc_fpscr_regnum; /* fp status and condition register */
193
194 /* Multiplier-Quotient Register (older POWER architectures only). */
195 int ppc_mq_regnum;
196
197 /* Altivec registers. */
198 int ppc_vr0_regnum; /* First AltiVec register */
199 int ppc_vrsave_regnum; /* Last AltiVec register */
200
201 /* SPE registers. */
202 int ppc_ev0_upper_regnum; /* First GPR upper half register */
203 int ppc_ev0_regnum; /* First ev register */
204 int ppc_ev31_regnum; /* Last ev register */
205 int ppc_acc_regnum; /* SPE 'acc' register */
206 int ppc_spefscr_regnum; /* SPE 'spefscr' register */
207
208 /* Offset to ABI specific location where link register is saved. */
209 int lr_frame_offset;
210
211 /* An array of integers, such that sim_regno[I] is the simulator
212 register number for GDB register number I, or -1 if the
213 simulator does not implement that register. */
214 int *sim_regno;
215
216 /* Minimum possible text address. */
217 CORE_ADDR text_segment_base;
218
219 /* ISA-specific types. */
220 struct type *ppc_builtin_type_vec64;
221 };
222
223
224 /* Constants for register set sizes. */
225 enum
226 {
227 ppc_num_gprs = 32, /* 32 general-purpose registers */
228 ppc_num_fprs = 32, /* 32 floating-point registers */
229 ppc_num_srs = 16, /* 16 segment registers */
230 ppc_num_vrs = 32 /* 32 Altivec vector registers */
231 };
232
233
234 /* Register number constants. These are GDB internal register
235 numbers; they are not used for the simulator or remote targets.
236 Extra SPRs (those other than MQ, CTR, LR, XER, SPEFSCR) are given
237 numbers above PPC_NUM_REGS. So are segment registers and other
238 target-defined registers. */
239 enum {
240 PPC_R0_REGNUM = 0,
241 PPC_F0_REGNUM = 32,
242 PPC_PC_REGNUM = 64,
243 PPC_MSR_REGNUM = 65,
244 PPC_CR_REGNUM = 66,
245 PPC_LR_REGNUM = 67,
246 PPC_CTR_REGNUM = 68,
247 PPC_XER_REGNUM = 69,
248 PPC_FPSCR_REGNUM = 70,
249 PPC_MQ_REGNUM = 71,
250 PPC_SPE_UPPER_GP0_REGNUM = 72,
251 PPC_SPE_ACC_REGNUM = 104,
252 PPC_SPE_FSCR_REGNUM = 105,
253 PPC_VR0_REGNUM = 106,
254 PPC_VSCR_REGNUM = 138,
255 PPC_VRSAVE_REGNUM = 139,
256 PPC_NUM_REGS
257 };
258
259
260 /* Instruction size. */
261 #define PPC_INSN_SIZE 4
262
263 /* Estimate for the maximum number of instrctions in a function epilogue. */
264 #define PPC_MAX_EPILOGUE_INSTRUCTIONS 52
265
266 extern struct target_desc *tdesc_powerpc_e500;
267
268 #endif /* ppc-tdep.h */
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