b09abaec1a21182f982686525e04f2642256cf3a
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
1 /* Target-dependent code for GDB, the GNU debugger.
2
3 Copyright 2001, 2002, 2003, 2004, 2005 Free Software Foundation,
4 Inc.
5
6 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
7 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
8
9 This file is part of GDB.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
24 02111-1307, USA. */
25
26 #include "defs.h"
27 #include "arch-utils.h"
28 #include "frame.h"
29 #include "inferior.h"
30 #include "symtab.h"
31 #include "target.h"
32 #include "gdbcore.h"
33 #include "gdbcmd.h"
34 #include "objfiles.h"
35 #include "tm.h"
36 #include "../bfd/bfd.h"
37 #include "floatformat.h"
38 #include "regcache.h"
39 #include "trad-frame.h"
40 #include "frame-base.h"
41 #include "frame-unwind.h"
42 #include "dwarf2-frame.h"
43 #include "reggroups.h"
44 #include "regset.h"
45 #include "value.h"
46 #include "gdb_assert.h"
47 #include "dis-asm.h"
48 #include "solib-svr4.h" /* For struct link_map_offsets. */
49
50 #include "s390-tdep.h"
51
52
53 /* The tdep structure. */
54
55 struct gdbarch_tdep
56 {
57 /* ABI version. */
58 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
59
60 /* Core file register sets. */
61 const struct regset *gregset;
62 int sizeof_gregset;
63
64 const struct regset *fpregset;
65 int sizeof_fpregset;
66 };
67
68
69 /* Register information. */
70
71 struct s390_register_info
72 {
73 char *name;
74 struct type **type;
75 };
76
77 static struct s390_register_info s390_register_info[S390_NUM_TOTAL_REGS] =
78 {
79 /* Program Status Word. */
80 { "pswm", &builtin_type_long },
81 { "pswa", &builtin_type_long },
82
83 /* General Purpose Registers. */
84 { "r0", &builtin_type_long },
85 { "r1", &builtin_type_long },
86 { "r2", &builtin_type_long },
87 { "r3", &builtin_type_long },
88 { "r4", &builtin_type_long },
89 { "r5", &builtin_type_long },
90 { "r6", &builtin_type_long },
91 { "r7", &builtin_type_long },
92 { "r8", &builtin_type_long },
93 { "r9", &builtin_type_long },
94 { "r10", &builtin_type_long },
95 { "r11", &builtin_type_long },
96 { "r12", &builtin_type_long },
97 { "r13", &builtin_type_long },
98 { "r14", &builtin_type_long },
99 { "r15", &builtin_type_long },
100
101 /* Access Registers. */
102 { "acr0", &builtin_type_int },
103 { "acr1", &builtin_type_int },
104 { "acr2", &builtin_type_int },
105 { "acr3", &builtin_type_int },
106 { "acr4", &builtin_type_int },
107 { "acr5", &builtin_type_int },
108 { "acr6", &builtin_type_int },
109 { "acr7", &builtin_type_int },
110 { "acr8", &builtin_type_int },
111 { "acr9", &builtin_type_int },
112 { "acr10", &builtin_type_int },
113 { "acr11", &builtin_type_int },
114 { "acr12", &builtin_type_int },
115 { "acr13", &builtin_type_int },
116 { "acr14", &builtin_type_int },
117 { "acr15", &builtin_type_int },
118
119 /* Floating Point Control Word. */
120 { "fpc", &builtin_type_int },
121
122 /* Floating Point Registers. */
123 { "f0", &builtin_type_double },
124 { "f1", &builtin_type_double },
125 { "f2", &builtin_type_double },
126 { "f3", &builtin_type_double },
127 { "f4", &builtin_type_double },
128 { "f5", &builtin_type_double },
129 { "f6", &builtin_type_double },
130 { "f7", &builtin_type_double },
131 { "f8", &builtin_type_double },
132 { "f9", &builtin_type_double },
133 { "f10", &builtin_type_double },
134 { "f11", &builtin_type_double },
135 { "f12", &builtin_type_double },
136 { "f13", &builtin_type_double },
137 { "f14", &builtin_type_double },
138 { "f15", &builtin_type_double },
139
140 /* Pseudo registers. */
141 { "pc", &builtin_type_void_func_ptr },
142 { "cc", &builtin_type_int },
143 };
144
145 /* Return the name of register REGNUM. */
146 static const char *
147 s390_register_name (int regnum)
148 {
149 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
150 return s390_register_info[regnum].name;
151 }
152
153 /* Return the GDB type object for the "standard" data type of data in
154 register REGNUM. */
155 static struct type *
156 s390_register_type (struct gdbarch *gdbarch, int regnum)
157 {
158 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
159 return *s390_register_info[regnum].type;
160 }
161
162 /* DWARF Register Mapping. */
163
164 static int s390_dwarf_regmap[] =
165 {
166 /* General Purpose Registers. */
167 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
168 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
169 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
170 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
171
172 /* Floating Point Registers. */
173 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
174 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
175 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
176 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
177
178 /* Control Registers (not mapped). */
179 -1, -1, -1, -1, -1, -1, -1, -1,
180 -1, -1, -1, -1, -1, -1, -1, -1,
181
182 /* Access Registers. */
183 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
184 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
185 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
186 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
187
188 /* Program Status Word. */
189 S390_PSWM_REGNUM,
190 S390_PSWA_REGNUM
191 };
192
193 /* Convert DWARF register number REG to the appropriate register
194 number used by GDB. */
195 static int
196 s390_dwarf_reg_to_regnum (int reg)
197 {
198 int regnum = -1;
199
200 if (reg >= 0 || reg < ARRAY_SIZE (s390_dwarf_regmap))
201 regnum = s390_dwarf_regmap[reg];
202
203 if (regnum == -1)
204 warning ("Unmapped DWARF Register #%d encountered\n", reg);
205
206 return regnum;
207 }
208
209 /* Pseudo registers - PC and condition code. */
210
211 static void
212 s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
213 int regnum, void *buf)
214 {
215 ULONGEST val;
216
217 switch (regnum)
218 {
219 case S390_PC_REGNUM:
220 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
221 store_unsigned_integer (buf, 4, val & 0x7fffffff);
222 break;
223
224 case S390_CC_REGNUM:
225 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
226 store_unsigned_integer (buf, 4, (val >> 12) & 3);
227 break;
228
229 default:
230 internal_error (__FILE__, __LINE__, "invalid regnum");
231 }
232 }
233
234 static void
235 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
236 int regnum, const void *buf)
237 {
238 ULONGEST val, psw;
239
240 switch (regnum)
241 {
242 case S390_PC_REGNUM:
243 val = extract_unsigned_integer (buf, 4);
244 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
245 psw = (psw & 0x80000000) | (val & 0x7fffffff);
246 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, psw);
247 break;
248
249 case S390_CC_REGNUM:
250 val = extract_unsigned_integer (buf, 4);
251 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
252 psw = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
253 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
254 break;
255
256 default:
257 internal_error (__FILE__, __LINE__, "invalid regnum");
258 }
259 }
260
261 static void
262 s390x_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
263 int regnum, void *buf)
264 {
265 ULONGEST val;
266
267 switch (regnum)
268 {
269 case S390_PC_REGNUM:
270 regcache_raw_read (regcache, S390_PSWA_REGNUM, buf);
271 break;
272
273 case S390_CC_REGNUM:
274 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
275 store_unsigned_integer (buf, 4, (val >> 44) & 3);
276 break;
277
278 default:
279 internal_error (__FILE__, __LINE__, "invalid regnum");
280 }
281 }
282
283 static void
284 s390x_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
285 int regnum, const void *buf)
286 {
287 ULONGEST val, psw;
288
289 switch (regnum)
290 {
291 case S390_PC_REGNUM:
292 regcache_raw_write (regcache, S390_PSWA_REGNUM, buf);
293 break;
294
295 case S390_CC_REGNUM:
296 val = extract_unsigned_integer (buf, 4);
297 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
298 psw = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
299 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
300 break;
301
302 default:
303 internal_error (__FILE__, __LINE__, "invalid regnum");
304 }
305 }
306
307 /* 'float' values are stored in the upper half of floating-point
308 registers, even though we are otherwise a big-endian platform. */
309
310 static int
311 s390_convert_register_p (int regno, struct type *type)
312 {
313 return (regno >= S390_F0_REGNUM && regno <= S390_F15_REGNUM)
314 && TYPE_LENGTH (type) < 8;
315 }
316
317 static void
318 s390_register_to_value (struct frame_info *frame, int regnum,
319 struct type *valtype, void *out)
320 {
321 char in[8];
322 int len = TYPE_LENGTH (valtype);
323 gdb_assert (len < 8);
324
325 get_frame_register (frame, regnum, in);
326 memcpy (out, in, len);
327 }
328
329 static void
330 s390_value_to_register (struct frame_info *frame, int regnum,
331 struct type *valtype, const void *in)
332 {
333 char out[8];
334 int len = TYPE_LENGTH (valtype);
335 gdb_assert (len < 8);
336
337 memset (out, 0, 8);
338 memcpy (out, in, len);
339 put_frame_register (frame, regnum, out);
340 }
341
342 /* Register groups. */
343
344 static int
345 s390_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
346 struct reggroup *group)
347 {
348 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
349
350 /* Registers displayed via 'info regs'. */
351 if (group == general_reggroup)
352 return (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM)
353 || regnum == S390_PC_REGNUM
354 || regnum == S390_CC_REGNUM;
355
356 /* Registers displayed via 'info float'. */
357 if (group == float_reggroup)
358 return (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM)
359 || regnum == S390_FPC_REGNUM;
360
361 /* Registers that need to be saved/restored in order to
362 push or pop frames. */
363 if (group == save_reggroup || group == restore_reggroup)
364 return regnum != S390_PSWM_REGNUM && regnum != S390_PSWA_REGNUM;
365
366 return default_register_reggroup_p (gdbarch, regnum, group);
367 }
368
369
370 /* Core file register sets. */
371
372 int s390_regmap_gregset[S390_NUM_REGS] =
373 {
374 /* Program Status Word. */
375 0x00, 0x04,
376 /* General Purpose Registers. */
377 0x08, 0x0c, 0x10, 0x14,
378 0x18, 0x1c, 0x20, 0x24,
379 0x28, 0x2c, 0x30, 0x34,
380 0x38, 0x3c, 0x40, 0x44,
381 /* Access Registers. */
382 0x48, 0x4c, 0x50, 0x54,
383 0x58, 0x5c, 0x60, 0x64,
384 0x68, 0x6c, 0x70, 0x74,
385 0x78, 0x7c, 0x80, 0x84,
386 /* Floating Point Control Word. */
387 -1,
388 /* Floating Point Registers. */
389 -1, -1, -1, -1, -1, -1, -1, -1,
390 -1, -1, -1, -1, -1, -1, -1, -1,
391 };
392
393 int s390x_regmap_gregset[S390_NUM_REGS] =
394 {
395 0x00, 0x08,
396 /* General Purpose Registers. */
397 0x10, 0x18, 0x20, 0x28,
398 0x30, 0x38, 0x40, 0x48,
399 0x50, 0x58, 0x60, 0x68,
400 0x70, 0x78, 0x80, 0x88,
401 /* Access Registers. */
402 0x90, 0x94, 0x98, 0x9c,
403 0xa0, 0xa4, 0xa8, 0xac,
404 0xb0, 0xb4, 0xb8, 0xbc,
405 0xc0, 0xc4, 0xc8, 0xcc,
406 /* Floating Point Control Word. */
407 -1,
408 /* Floating Point Registers. */
409 -1, -1, -1, -1, -1, -1, -1, -1,
410 -1, -1, -1, -1, -1, -1, -1, -1,
411 };
412
413 int s390_regmap_fpregset[S390_NUM_REGS] =
414 {
415 /* Program Status Word. */
416 -1, -1,
417 /* General Purpose Registers. */
418 -1, -1, -1, -1, -1, -1, -1, -1,
419 -1, -1, -1, -1, -1, -1, -1, -1,
420 /* Access Registers. */
421 -1, -1, -1, -1, -1, -1, -1, -1,
422 -1, -1, -1, -1, -1, -1, -1, -1,
423 /* Floating Point Control Word. */
424 0x00,
425 /* Floating Point Registers. */
426 0x08, 0x10, 0x18, 0x20,
427 0x28, 0x30, 0x38, 0x40,
428 0x48, 0x50, 0x58, 0x60,
429 0x68, 0x70, 0x78, 0x80,
430 };
431
432 /* Supply register REGNUM from the register set REGSET to register cache
433 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
434 static void
435 s390_supply_regset (const struct regset *regset, struct regcache *regcache,
436 int regnum, const void *regs, size_t len)
437 {
438 const int *offset = regset->descr;
439 int i;
440
441 for (i = 0; i < S390_NUM_REGS; i++)
442 {
443 if ((regnum == i || regnum == -1) && offset[i] != -1)
444 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
445 }
446 }
447
448 static const struct regset s390_gregset = {
449 s390_regmap_gregset,
450 s390_supply_regset
451 };
452
453 static const struct regset s390x_gregset = {
454 s390x_regmap_gregset,
455 s390_supply_regset
456 };
457
458 static const struct regset s390_fpregset = {
459 s390_regmap_fpregset,
460 s390_supply_regset
461 };
462
463 /* Return the appropriate register set for the core section identified
464 by SECT_NAME and SECT_SIZE. */
465 const struct regset *
466 s390_regset_from_core_section (struct gdbarch *gdbarch,
467 const char *sect_name, size_t sect_size)
468 {
469 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
470
471 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
472 return tdep->gregset;
473
474 if (strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
475 return tdep->fpregset;
476
477 return NULL;
478 }
479
480
481 /* Prologue analysis. */
482
483 /* When we analyze a prologue, we're really doing 'abstract
484 interpretation' or 'pseudo-evaluation': running the function's code
485 in simulation, but using conservative approximations of the values
486 it would have when it actually runs. For example, if our function
487 starts with the instruction:
488
489 ahi r1, 42 # add halfword immediate 42 to r1
490
491 we don't know exactly what value will be in r1 after executing this
492 instruction, but we do know it'll be 42 greater than its original
493 value.
494
495 If we then see an instruction like:
496
497 ahi r1, 22 # add halfword immediate 22 to r1
498
499 we still don't know what r1's value is, but again, we can say it is
500 now 64 greater than its original value.
501
502 If the next instruction were:
503
504 lr r2, r1 # set r2 to r1's value
505
506 then we can say that r2's value is now the original value of r1
507 plus 64. And so on.
508
509 Of course, this can only go so far before it gets unreasonable. If
510 we wanted to be able to say anything about the value of r1 after
511 the instruction:
512
513 xr r1, r3 # exclusive-or r1 and r3, place result in r1
514
515 then things would get pretty complex. But remember, we're just
516 doing a conservative approximation; if exclusive-or instructions
517 aren't relevant to prologues, we can just say r1's value is now
518 'unknown'. We can ignore things that are too complex, if that loss
519 of information is acceptable for our application.
520
521 Once you've reached an instruction that you don't know how to
522 simulate, you stop. Now you examine the state of the registers and
523 stack slots you've kept track of. For example:
524
525 - To see how large your stack frame is, just check the value of sp;
526 if it's the original value of sp minus a constant, then that
527 constant is the stack frame's size. If the sp's value has been
528 marked as 'unknown', then that means the prologue has done
529 something too complex for us to track, and we don't know the
530 frame size.
531
532 - To see whether we've saved the SP in the current frame's back
533 chain slot, we just check whether the current value of the back
534 chain stack slot is the original value of the sp.
535
536 Sure, this takes some work. But prologue analyzers aren't
537 quick-and-simple pattern patching to recognize a few fixed prologue
538 forms any more; they're big, hairy functions. Along with inferior
539 function calls, prologue analysis accounts for a substantial
540 portion of the time needed to stabilize a GDB port. So I think
541 it's worthwhile to look for an approach that will be easier to
542 understand and maintain. In the approach used here:
543
544 - It's easier to see that the analyzer is correct: you just see
545 whether the analyzer properly (albiet conservatively) simulates
546 the effect of each instruction.
547
548 - It's easier to extend the analyzer: you can add support for new
549 instructions, and know that you haven't broken anything that
550 wasn't already broken before.
551
552 - It's orthogonal: to gather new information, you don't need to
553 complicate the code for each instruction. As long as your domain
554 of conservative values is already detailed enough to tell you
555 what you need, then all the existing instruction simulations are
556 already gathering the right data for you.
557
558 A 'struct prologue_value' is a conservative approximation of the
559 real value the register or stack slot will have. */
560
561 struct prologue_value {
562
563 /* What sort of value is this? This determines the interpretation
564 of subsequent fields. */
565 enum {
566
567 /* We don't know anything about the value. This is also used for
568 values we could have kept track of, when doing so would have
569 been too complex and we don't want to bother. The bottom of
570 our lattice. */
571 pv_unknown,
572
573 /* A known constant. K is its value. */
574 pv_constant,
575
576 /* The value that register REG originally had *UPON ENTRY TO THE
577 FUNCTION*, plus K. If K is zero, this means, obviously, just
578 the value REG had upon entry to the function. REG is a GDB
579 register number. Before we start interpreting, we initialize
580 every register R to { pv_register, R, 0 }. */
581 pv_register,
582
583 } kind;
584
585 /* The meanings of the following fields depend on 'kind'; see the
586 comments for the specific 'kind' values. */
587 int reg;
588 CORE_ADDR k;
589 };
590
591
592 /* Set V to be unknown. */
593 static void
594 pv_set_to_unknown (struct prologue_value *v)
595 {
596 v->kind = pv_unknown;
597 }
598
599
600 /* Set V to the constant K. */
601 static void
602 pv_set_to_constant (struct prologue_value *v, CORE_ADDR k)
603 {
604 v->kind = pv_constant;
605 v->k = k;
606 }
607
608
609 /* Set V to the original value of register REG, plus K. */
610 static void
611 pv_set_to_register (struct prologue_value *v, int reg, CORE_ADDR k)
612 {
613 v->kind = pv_register;
614 v->reg = reg;
615 v->k = k;
616 }
617
618
619 /* If one of *A and *B is a constant, and the other isn't, swap the
620 pointers as necessary to ensure that *B points to the constant.
621 This can reduce the number of cases we need to analyze in the
622 functions below. */
623 static void
624 pv_constant_last (struct prologue_value **a,
625 struct prologue_value **b)
626 {
627 if ((*a)->kind == pv_constant
628 && (*b)->kind != pv_constant)
629 {
630 struct prologue_value *temp = *a;
631 *a = *b;
632 *b = temp;
633 }
634 }
635
636
637 /* Set SUM to the sum of A and B. SUM, A, and B may point to the same
638 'struct prologue_value' object. */
639 static void
640 pv_add (struct prologue_value *sum,
641 struct prologue_value *a,
642 struct prologue_value *b)
643 {
644 pv_constant_last (&a, &b);
645
646 /* We can handle adding constants to registers, and other constants. */
647 if (b->kind == pv_constant
648 && (a->kind == pv_register
649 || a->kind == pv_constant))
650 {
651 sum->kind = a->kind;
652 sum->reg = a->reg; /* not meaningful if a is pv_constant, but
653 harmless */
654 sum->k = a->k + b->k;
655 }
656
657 /* Anything else we don't know how to add. We don't have a
658 representation for, say, the sum of two registers, or a multiple
659 of a register's value (adding a register to itself). */
660 else
661 sum->kind = pv_unknown;
662 }
663
664
665 /* Add the constant K to V. */
666 static void
667 pv_add_constant (struct prologue_value *v, CORE_ADDR k)
668 {
669 struct prologue_value pv_k;
670
671 /* Rather than thinking of all the cases we can and can't handle,
672 we'll just let pv_add take care of that for us. */
673 pv_set_to_constant (&pv_k, k);
674 pv_add (v, v, &pv_k);
675 }
676
677
678 /* Subtract B from A, and put the result in DIFF.
679
680 This isn't quite the same as negating B and adding it to A, since
681 we don't have a representation for the negation of anything but a
682 constant. For example, we can't negate { pv_register, R1, 10 },
683 but we do know that { pv_register, R1, 10 } minus { pv_register,
684 R1, 5 } is { pv_constant, <ignored>, 5 }.
685
686 This means, for example, that we can subtract two stack addresses;
687 they're both relative to the original SP. Since the frame pointer
688 is set based on the SP, its value will be the original SP plus some
689 constant (probably zero), so we can use its value just fine. */
690 static void
691 pv_subtract (struct prologue_value *diff,
692 struct prologue_value *a,
693 struct prologue_value *b)
694 {
695 pv_constant_last (&a, &b);
696
697 /* We can subtract a constant from another constant, or from a
698 register. */
699 if (b->kind == pv_constant
700 && (a->kind == pv_register
701 || a->kind == pv_constant))
702 {
703 diff->kind = a->kind;
704 diff->reg = a->reg; /* not always meaningful, but harmless */
705 diff->k = a->k - b->k;
706 }
707
708 /* We can subtract a register from itself, yielding a constant. */
709 else if (a->kind == pv_register
710 && b->kind == pv_register
711 && a->reg == b->reg)
712 {
713 diff->kind = pv_constant;
714 diff->k = a->k - b->k;
715 }
716
717 /* We don't know how to subtract anything else. */
718 else
719 diff->kind = pv_unknown;
720 }
721
722
723 /* Set AND to the logical and of A and B. */
724 static void
725 pv_logical_and (struct prologue_value *and,
726 struct prologue_value *a,
727 struct prologue_value *b)
728 {
729 pv_constant_last (&a, &b);
730
731 /* We can 'and' two constants. */
732 if (a->kind == pv_constant
733 && b->kind == pv_constant)
734 {
735 and->kind = pv_constant;
736 and->k = a->k & b->k;
737 }
738
739 /* We can 'and' anything with the constant zero. */
740 else if (b->kind == pv_constant
741 && b->k == 0)
742 {
743 and->kind = pv_constant;
744 and->k = 0;
745 }
746
747 /* We can 'and' anything with ~0. */
748 else if (b->kind == pv_constant
749 && b->k == ~ (CORE_ADDR) 0)
750 *and = *a;
751
752 /* We can 'and' a register with itself. */
753 else if (a->kind == pv_register
754 && b->kind == pv_register
755 && a->reg == b->reg
756 && a->k == b->k)
757 *and = *a;
758
759 /* Otherwise, we don't know. */
760 else
761 pv_set_to_unknown (and);
762 }
763
764
765 /* Return non-zero iff A and B are identical expressions.
766
767 This is not the same as asking if the two values are equal; the
768 result of such a comparison would have to be a pv_boolean, and
769 asking whether two 'unknown' values were equal would give you
770 pv_maybe. Same for comparing, say, { pv_register, R1, 0 } and {
771 pv_register, R2, 0}. Instead, this is asking whether the two
772 representations are the same. */
773 static int
774 pv_is_identical (struct prologue_value *a,
775 struct prologue_value *b)
776 {
777 if (a->kind != b->kind)
778 return 0;
779
780 switch (a->kind)
781 {
782 case pv_unknown:
783 return 1;
784 case pv_constant:
785 return (a->k == b->k);
786 case pv_register:
787 return (a->reg == b->reg && a->k == b->k);
788 default:
789 gdb_assert (0);
790 }
791 }
792
793
794 /* Return non-zero if A is the original value of register number R
795 plus K, zero otherwise. */
796 static int
797 pv_is_register (struct prologue_value *a, int r, CORE_ADDR k)
798 {
799 return (a->kind == pv_register
800 && a->reg == r
801 && a->k == k);
802 }
803
804
805 /* Decoding S/390 instructions. */
806
807 /* Named opcode values for the S/390 instructions we recognize. Some
808 instructions have their opcode split across two fields; those are the
809 op1_* and op2_* enums. */
810 enum
811 {
812 op1_lhi = 0xa7, op2_lhi = 0x08,
813 op1_lghi = 0xa7, op2_lghi = 0x09,
814 op_lr = 0x18,
815 op_lgr = 0xb904,
816 op_l = 0x58,
817 op1_ly = 0xe3, op2_ly = 0x58,
818 op1_lg = 0xe3, op2_lg = 0x04,
819 op_lm = 0x98,
820 op1_lmy = 0xeb, op2_lmy = 0x98,
821 op1_lmg = 0xeb, op2_lmg = 0x04,
822 op_st = 0x50,
823 op1_sty = 0xe3, op2_sty = 0x50,
824 op1_stg = 0xe3, op2_stg = 0x24,
825 op_std = 0x60,
826 op_stm = 0x90,
827 op1_stmy = 0xeb, op2_stmy = 0x90,
828 op1_stmg = 0xeb, op2_stmg = 0x24,
829 op1_aghi = 0xa7, op2_aghi = 0x0b,
830 op1_ahi = 0xa7, op2_ahi = 0x0a,
831 op_ar = 0x1a,
832 op_agr = 0xb908,
833 op_a = 0x5a,
834 op1_ay = 0xe3, op2_ay = 0x5a,
835 op1_ag = 0xe3, op2_ag = 0x08,
836 op_sr = 0x1b,
837 op_sgr = 0xb909,
838 op_s = 0x5b,
839 op1_sy = 0xe3, op2_sy = 0x5b,
840 op1_sg = 0xe3, op2_sg = 0x09,
841 op_nr = 0x14,
842 op_ngr = 0xb980,
843 op_la = 0x41,
844 op1_lay = 0xe3, op2_lay = 0x71,
845 op1_larl = 0xc0, op2_larl = 0x00,
846 op_basr = 0x0d,
847 op_bas = 0x4d,
848 op_bcr = 0x07,
849 op_bc = 0x0d,
850 op1_bras = 0xa7, op2_bras = 0x05,
851 op1_brasl= 0xc0, op2_brasl= 0x05,
852 op1_brc = 0xa7, op2_brc = 0x04,
853 op1_brcl = 0xc0, op2_brcl = 0x04,
854 };
855
856
857 /* Read a single instruction from address AT. */
858
859 #define S390_MAX_INSTR_SIZE 6
860 static int
861 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
862 {
863 static int s390_instrlen[] = { 2, 4, 4, 6 };
864 int instrlen;
865
866 if (deprecated_read_memory_nobpt (at, &instr[0], 2))
867 return -1;
868 instrlen = s390_instrlen[instr[0] >> 6];
869 if (instrlen > 2)
870 {
871 if (deprecated_read_memory_nobpt (at + 2, &instr[2], instrlen - 2))
872 return -1;
873 }
874 return instrlen;
875 }
876
877
878 /* The functions below are for recognizing and decoding S/390
879 instructions of various formats. Each of them checks whether INSN
880 is an instruction of the given format, with the specified opcodes.
881 If it is, it sets the remaining arguments to the values of the
882 instruction's fields, and returns a non-zero value; otherwise, it
883 returns zero.
884
885 These functions' arguments appear in the order they appear in the
886 instruction, not in the machine-language form. So, opcodes always
887 come first, even though they're sometimes scattered around the
888 instructions. And displacements appear before base and extension
889 registers, as they do in the assembly syntax, not at the end, as
890 they do in the machine language. */
891 static int
892 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
893 {
894 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
895 {
896 *r1 = (insn[1] >> 4) & 0xf;
897 /* i2 is a 16-bit signed quantity. */
898 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
899 return 1;
900 }
901 else
902 return 0;
903 }
904
905
906 static int
907 is_ril (bfd_byte *insn, int op1, int op2,
908 unsigned int *r1, int *i2)
909 {
910 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
911 {
912 *r1 = (insn[1] >> 4) & 0xf;
913 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
914 no sign extension is necessary, but we don't want to assume
915 that. */
916 *i2 = (((insn[2] << 24)
917 | (insn[3] << 16)
918 | (insn[4] << 8)
919 | (insn[5])) ^ 0x80000000) - 0x80000000;
920 return 1;
921 }
922 else
923 return 0;
924 }
925
926
927 static int
928 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
929 {
930 if (insn[0] == op)
931 {
932 *r1 = (insn[1] >> 4) & 0xf;
933 *r2 = insn[1] & 0xf;
934 return 1;
935 }
936 else
937 return 0;
938 }
939
940
941 static int
942 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
943 {
944 if (((insn[0] << 8) | insn[1]) == op)
945 {
946 /* Yes, insn[3]. insn[2] is unused in RRE format. */
947 *r1 = (insn[3] >> 4) & 0xf;
948 *r2 = insn[3] & 0xf;
949 return 1;
950 }
951 else
952 return 0;
953 }
954
955
956 static int
957 is_rs (bfd_byte *insn, int op,
958 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
959 {
960 if (insn[0] == op)
961 {
962 *r1 = (insn[1] >> 4) & 0xf;
963 *r3 = insn[1] & 0xf;
964 *b2 = (insn[2] >> 4) & 0xf;
965 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
966 return 1;
967 }
968 else
969 return 0;
970 }
971
972
973 static int
974 is_rsy (bfd_byte *insn, int op1, int op2,
975 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
976 {
977 if (insn[0] == op1
978 && insn[5] == op2)
979 {
980 *r1 = (insn[1] >> 4) & 0xf;
981 *r3 = insn[1] & 0xf;
982 *b2 = (insn[2] >> 4) & 0xf;
983 /* The 'long displacement' is a 20-bit signed integer. */
984 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
985 ^ 0x80000) - 0x80000;
986 return 1;
987 }
988 else
989 return 0;
990 }
991
992
993 static int
994 is_rx (bfd_byte *insn, int op,
995 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
996 {
997 if (insn[0] == op)
998 {
999 *r1 = (insn[1] >> 4) & 0xf;
1000 *x2 = insn[1] & 0xf;
1001 *b2 = (insn[2] >> 4) & 0xf;
1002 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1003 return 1;
1004 }
1005 else
1006 return 0;
1007 }
1008
1009
1010 static int
1011 is_rxy (bfd_byte *insn, int op1, int op2,
1012 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1013 {
1014 if (insn[0] == op1
1015 && insn[5] == op2)
1016 {
1017 *r1 = (insn[1] >> 4) & 0xf;
1018 *x2 = insn[1] & 0xf;
1019 *b2 = (insn[2] >> 4) & 0xf;
1020 /* The 'long displacement' is a 20-bit signed integer. */
1021 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1022 ^ 0x80000) - 0x80000;
1023 return 1;
1024 }
1025 else
1026 return 0;
1027 }
1028
1029
1030 /* Set ADDR to the effective address for an X-style instruction, like:
1031
1032 L R1, D2(X2, B2)
1033
1034 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1035 constant; the effective address is the sum of all three. If either
1036 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1037 means that r0 can't be used as either X2 or B2.
1038
1039 GPR is an array of general register values, indexed by GPR number,
1040 not GDB register number. */
1041 static void
1042 compute_x_addr (struct prologue_value *addr,
1043 struct prologue_value *gpr,
1044 int d2, unsigned int x2, unsigned int b2)
1045 {
1046 /* We can't just add stuff directly in addr; it might alias some of
1047 the registers we need to read. */
1048 struct prologue_value result;
1049
1050 pv_set_to_constant (&result, d2);
1051 if (x2)
1052 pv_add (&result, &result, &gpr[x2]);
1053 if (b2)
1054 pv_add (&result, &result, &gpr[b2]);
1055
1056 *addr = result;
1057 }
1058
1059
1060 #define S390_NUM_GPRS 16
1061 #define S390_NUM_FPRS 16
1062
1063 struct s390_prologue_data {
1064
1065 /* The size of a GPR or FPR. */
1066 int gpr_size;
1067 int fpr_size;
1068
1069 /* The general-purpose registers. */
1070 struct prologue_value gpr[S390_NUM_GPRS];
1071
1072 /* The floating-point registers. */
1073 struct prologue_value fpr[S390_NUM_FPRS];
1074
1075 /* The offset relative to the CFA where the incoming GPR N was saved
1076 by the function prologue. 0 if not saved or unknown. */
1077 int gpr_slot[S390_NUM_GPRS];
1078
1079 /* Likewise for FPRs. */
1080 int fpr_slot[S390_NUM_FPRS];
1081
1082 /* Nonzero if the backchain was saved. This is assumed to be the
1083 case when the incoming SP is saved at the current SP location. */
1084 int back_chain_saved_p;
1085 };
1086
1087 /* Do a SIZE-byte store of VALUE to ADDR. */
1088 static void
1089 s390_store (struct prologue_value *addr,
1090 CORE_ADDR size,
1091 struct prologue_value *value,
1092 struct s390_prologue_data *data)
1093 {
1094 struct prologue_value cfa, offset;
1095 int i;
1096
1097 /* Check whether we are storing the backchain. */
1098 pv_subtract (&offset, &data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
1099
1100 if (offset.kind == pv_constant && offset.k == 0)
1101 if (size == data->gpr_size
1102 && pv_is_register (value, S390_SP_REGNUM, 0))
1103 {
1104 data->back_chain_saved_p = 1;
1105 return;
1106 }
1107
1108
1109 /* Check whether we are storing a register into the stack. */
1110 pv_set_to_register (&cfa, S390_SP_REGNUM, 16 * data->gpr_size + 32);
1111 pv_subtract (&offset, &cfa, addr);
1112
1113 if (offset.kind == pv_constant
1114 && offset.k < INT_MAX && offset.k > 0
1115 && offset.k % data->gpr_size == 0)
1116 {
1117 /* If we are storing the original value of a register, we want to
1118 record the CFA offset. If the same register is stored multiple
1119 times, the stack slot with the highest address counts. */
1120
1121 for (i = 0; i < S390_NUM_GPRS; i++)
1122 if (size == data->gpr_size
1123 && pv_is_register (value, S390_R0_REGNUM + i, 0))
1124 if (data->gpr_slot[i] == 0
1125 || data->gpr_slot[i] > offset.k)
1126 {
1127 data->gpr_slot[i] = offset.k;
1128 return;
1129 }
1130
1131 for (i = 0; i < S390_NUM_FPRS; i++)
1132 if (size == data->fpr_size
1133 && pv_is_register (value, S390_F0_REGNUM + i, 0))
1134 if (data->fpr_slot[i] == 0
1135 || data->fpr_slot[i] > offset.k)
1136 {
1137 data->fpr_slot[i] = offset.k;
1138 return;
1139 }
1140 }
1141
1142
1143 /* Note: If this is some store we cannot identify, you might think we
1144 should forget our cached values, as any of those might have been hit.
1145
1146 However, we make the assumption that the register save areas are only
1147 ever stored to once in any given function, and we do recognize these
1148 stores. Thus every store we cannot recognize does not hit our data. */
1149 }
1150
1151 /* Do a SIZE-byte load from ADDR into VALUE. */
1152 static void
1153 s390_load (struct prologue_value *addr,
1154 CORE_ADDR size,
1155 struct prologue_value *value,
1156 struct s390_prologue_data *data)
1157 {
1158 struct prologue_value cfa, offset;
1159 int i;
1160
1161 /* If it's a load from an in-line constant pool, then we can
1162 simulate that, under the assumption that the code isn't
1163 going to change between the time the processor actually
1164 executed it creating the current frame, and the time when
1165 we're analyzing the code to unwind past that frame. */
1166 if (addr->kind == pv_constant)
1167 {
1168 struct section_table *secp;
1169 secp = target_section_by_addr (&current_target, addr->k);
1170 if (secp != NULL
1171 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
1172 & SEC_READONLY))
1173 {
1174 pv_set_to_constant (value, read_memory_integer (addr->k, size));
1175 return;
1176 }
1177 }
1178
1179 /* Check whether we are accessing one of our save slots. */
1180 pv_set_to_register (&cfa, S390_SP_REGNUM, 16 * data->gpr_size + 32);
1181 pv_subtract (&offset, &cfa, addr);
1182
1183 if (offset.kind == pv_constant
1184 && offset.k < INT_MAX && offset.k > 0)
1185 {
1186 for (i = 0; i < S390_NUM_GPRS; i++)
1187 if (offset.k == data->gpr_slot[i])
1188 {
1189 pv_set_to_register (value, S390_R0_REGNUM + i, 0);
1190 return;
1191 }
1192
1193 for (i = 0; i < S390_NUM_FPRS; i++)
1194 if (offset.k == data->fpr_slot[i])
1195 {
1196 pv_set_to_register (value, S390_F0_REGNUM + i, 0);
1197 return;
1198 }
1199 }
1200
1201 /* Otherwise, we don't know the value. */
1202 pv_set_to_unknown (value);
1203 }
1204
1205
1206 /* Analyze the prologue of the function starting at START_PC,
1207 continuing at most until CURRENT_PC. Initialize DATA to
1208 hold all information we find out about the state of the registers
1209 and stack slots. Return the address of the instruction after
1210 the last one that changed the SP, FP, or back chain; or zero
1211 on error. */
1212 static CORE_ADDR
1213 s390_analyze_prologue (struct gdbarch *gdbarch,
1214 CORE_ADDR start_pc,
1215 CORE_ADDR current_pc,
1216 struct s390_prologue_data *data)
1217 {
1218 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1219
1220 /* Our return value:
1221 The address of the instruction after the last one that changed
1222 the SP, FP, or back chain; zero if we got an error trying to
1223 read memory. */
1224 CORE_ADDR result = start_pc;
1225
1226 /* The current PC for our abstract interpretation. */
1227 CORE_ADDR pc;
1228
1229 /* The address of the next instruction after that. */
1230 CORE_ADDR next_pc;
1231
1232 /* Set up everything's initial value. */
1233 {
1234 int i;
1235
1236 /* For the purpose of prologue tracking, we consider the GPR size to
1237 be equal to the ABI word size, even if it is actually larger
1238 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1239 data->gpr_size = word_size;
1240 data->fpr_size = 8;
1241
1242 for (i = 0; i < S390_NUM_GPRS; i++)
1243 pv_set_to_register (&data->gpr[i], S390_R0_REGNUM + i, 0);
1244
1245 for (i = 0; i < S390_NUM_FPRS; i++)
1246 pv_set_to_register (&data->fpr[i], S390_F0_REGNUM + i, 0);
1247
1248 for (i = 0; i < S390_NUM_GPRS; i++)
1249 data->gpr_slot[i] = 0;
1250
1251 for (i = 0; i < S390_NUM_FPRS; i++)
1252 data->fpr_slot[i] = 0;
1253
1254 data->back_chain_saved_p = 0;
1255 }
1256
1257 /* Start interpreting instructions, until we hit the frame's
1258 current PC or the first branch instruction. */
1259 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
1260 {
1261 bfd_byte insn[S390_MAX_INSTR_SIZE];
1262 int insn_len = s390_readinstruction (insn, pc);
1263
1264 /* Fields for various kinds of instructions. */
1265 unsigned int b2, r1, r2, x2, r3;
1266 int i2, d2;
1267
1268 /* The values of SP and FP before this instruction,
1269 for detecting instructions that change them. */
1270 struct prologue_value pre_insn_sp, pre_insn_fp;
1271 /* Likewise for the flag whether the back chain was saved. */
1272 int pre_insn_back_chain_saved_p;
1273
1274 /* If we got an error trying to read the instruction, report it. */
1275 if (insn_len < 0)
1276 {
1277 result = 0;
1278 break;
1279 }
1280
1281 next_pc = pc + insn_len;
1282
1283 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1284 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1285 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
1286
1287 /* LHI r1, i2 --- load halfword immediate */
1288 if (word_size == 4
1289 && is_ri (insn, op1_lhi, op2_lhi, &r1, &i2))
1290 pv_set_to_constant (&data->gpr[r1], i2);
1291
1292 /* LGHI r1, i2 --- load halfword immediate (64-bit version) */
1293 else if (word_size == 8
1294 && is_ri (insn, op1_lghi, op2_lghi, &r1, &i2))
1295 pv_set_to_constant (&data->gpr[r1], i2);
1296
1297 /* LR r1, r2 --- load from register */
1298 else if (word_size == 4
1299 && is_rr (insn, op_lr, &r1, &r2))
1300 data->gpr[r1] = data->gpr[r2];
1301
1302 /* LGR r1, r2 --- load from register (64-bit version) */
1303 else if (word_size == 8
1304 && is_rre (insn, op_lgr, &r1, &r2))
1305 data->gpr[r1] = data->gpr[r2];
1306
1307 /* L r1, d2(x2, b2) --- load */
1308 else if (word_size == 4
1309 && is_rx (insn, op_l, &r1, &d2, &x2, &b2))
1310 {
1311 struct prologue_value addr;
1312
1313 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1314 s390_load (&addr, 4, &data->gpr[r1], data);
1315 }
1316
1317 /* LY r1, d2(x2, b2) --- load (long-displacement version) */
1318 else if (word_size == 4
1319 && is_rxy (insn, op1_ly, op2_ly, &r1, &d2, &x2, &b2))
1320 {
1321 struct prologue_value addr;
1322
1323 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1324 s390_load (&addr, 4, &data->gpr[r1], data);
1325 }
1326
1327 /* LG r1, d2(x2, b2) --- load (64-bit version) */
1328 else if (word_size == 8
1329 && is_rxy (insn, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1330 {
1331 struct prologue_value addr;
1332
1333 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1334 s390_load (&addr, 8, &data->gpr[r1], data);
1335 }
1336
1337 /* ST r1, d2(x2, b2) --- store */
1338 else if (word_size == 4
1339 && is_rx (insn, op_st, &r1, &d2, &x2, &b2))
1340 {
1341 struct prologue_value addr;
1342
1343 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1344 s390_store (&addr, 4, &data->gpr[r1], data);
1345 }
1346
1347 /* STY r1, d2(x2, b2) --- store (long-displacement version) */
1348 else if (word_size == 4
1349 && is_rxy (insn, op1_sty, op2_sty, &r1, &d2, &x2, &b2))
1350 {
1351 struct prologue_value addr;
1352
1353 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1354 s390_store (&addr, 4, &data->gpr[r1], data);
1355 }
1356
1357 /* STG r1, d2(x2, b2) --- store (64-bit version) */
1358 else if (word_size == 8
1359 && is_rxy (insn, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1360 {
1361 struct prologue_value addr;
1362
1363 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1364 s390_store (&addr, 8, &data->gpr[r1], data);
1365 }
1366
1367 /* STD r1, d2(x2,b2) --- store floating-point register */
1368 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
1369 {
1370 struct prologue_value addr;
1371
1372 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1373 s390_store (&addr, 8, &data->fpr[r1], data);
1374 }
1375
1376 /* STM r1, r3, d2(b2) --- store multiple */
1377 else if (word_size == 4
1378 && is_rs (insn, op_stm, &r1, &r3, &d2, &b2))
1379 {
1380 int regnum;
1381 int offset;
1382 struct prologue_value addr;
1383
1384 for (regnum = r1, offset = 0;
1385 regnum <= r3;
1386 regnum++, offset += 4)
1387 {
1388 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1389 s390_store (&addr, 4, &data->gpr[regnum], data);
1390 }
1391 }
1392
1393 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement version) */
1394 else if (word_size == 4
1395 && is_rsy (insn, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2))
1396 {
1397 int regnum;
1398 int offset;
1399 struct prologue_value addr;
1400
1401 for (regnum = r1, offset = 0;
1402 regnum <= r3;
1403 regnum++, offset += 4)
1404 {
1405 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1406 s390_store (&addr, 4, &data->gpr[regnum], data);
1407 }
1408 }
1409
1410 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version) */
1411 else if (word_size == 8
1412 && is_rsy (insn, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
1413 {
1414 int regnum;
1415 int offset;
1416 struct prologue_value addr;
1417
1418 for (regnum = r1, offset = 0;
1419 regnum <= r3;
1420 regnum++, offset += 8)
1421 {
1422 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1423 s390_store (&addr, 8, &data->gpr[regnum], data);
1424 }
1425 }
1426
1427 /* AHI r1, i2 --- add halfword immediate */
1428 else if (word_size == 4
1429 && is_ri (insn, op1_ahi, op2_ahi, &r1, &i2))
1430 pv_add_constant (&data->gpr[r1], i2);
1431
1432 /* AGHI r1, i2 --- add halfword immediate (64-bit version) */
1433 else if (word_size == 8
1434 && is_ri (insn, op1_aghi, op2_aghi, &r1, &i2))
1435 pv_add_constant (&data->gpr[r1], i2);
1436
1437 /* AR r1, r2 -- add register */
1438 else if (word_size == 4
1439 && is_rr (insn, op_ar, &r1, &r2))
1440 pv_add (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1441
1442 /* AGR r1, r2 -- add register (64-bit version) */
1443 else if (word_size == 8
1444 && is_rre (insn, op_agr, &r1, &r2))
1445 pv_add (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1446
1447 /* A r1, d2(x2, b2) -- add */
1448 else if (word_size == 4
1449 && is_rx (insn, op_a, &r1, &d2, &x2, &b2))
1450 {
1451 struct prologue_value addr;
1452 struct prologue_value value;
1453
1454 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1455 s390_load (&addr, 4, &value, data);
1456
1457 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1458 }
1459
1460 /* AY r1, d2(x2, b2) -- add (long-displacement version) */
1461 else if (word_size == 4
1462 && is_rxy (insn, op1_ay, op2_ay, &r1, &d2, &x2, &b2))
1463 {
1464 struct prologue_value addr;
1465 struct prologue_value value;
1466
1467 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1468 s390_load (&addr, 4, &value, data);
1469
1470 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1471 }
1472
1473 /* AG r1, d2(x2, b2) -- add (64-bit version) */
1474 else if (word_size == 8
1475 && is_rxy (insn, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1476 {
1477 struct prologue_value addr;
1478 struct prologue_value value;
1479
1480 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1481 s390_load (&addr, 8, &value, data);
1482
1483 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1484 }
1485
1486 /* SR r1, r2 -- subtract register */
1487 else if (word_size == 4
1488 && is_rr (insn, op_sr, &r1, &r2))
1489 pv_subtract (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1490
1491 /* SGR r1, r2 -- subtract register (64-bit version) */
1492 else if (word_size == 8
1493 && is_rre (insn, op_sgr, &r1, &r2))
1494 pv_subtract (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1495
1496 /* S r1, d2(x2, b2) -- subtract */
1497 else if (word_size == 4
1498 && is_rx (insn, op_s, &r1, &d2, &x2, &b2))
1499 {
1500 struct prologue_value addr;
1501 struct prologue_value value;
1502
1503 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1504 s390_load (&addr, 4, &value, data);
1505
1506 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1507 }
1508
1509 /* SY r1, d2(x2, b2) -- subtract (long-displacement version) */
1510 else if (word_size == 4
1511 && is_rxy (insn, op1_sy, op2_sy, &r1, &d2, &x2, &b2))
1512 {
1513 struct prologue_value addr;
1514 struct prologue_value value;
1515
1516 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1517 s390_load (&addr, 4, &value, data);
1518
1519 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1520 }
1521
1522 /* SG r1, d2(x2, b2) -- subtract (64-bit version) */
1523 else if (word_size == 8
1524 && is_rxy (insn, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1525 {
1526 struct prologue_value addr;
1527 struct prologue_value value;
1528
1529 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1530 s390_load (&addr, 8, &value, data);
1531
1532 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1533 }
1534
1535 /* NR r1, r2 --- logical and */
1536 else if (word_size == 4
1537 && is_rr (insn, op_nr, &r1, &r2))
1538 pv_logical_and (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1539
1540 /* NGR r1, r2 >--- logical and (64-bit version) */
1541 else if (word_size == 8
1542 && is_rre (insn, op_ngr, &r1, &r2))
1543 pv_logical_and (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1544
1545 /* LA r1, d2(x2, b2) --- load address */
1546 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2))
1547 compute_x_addr (&data->gpr[r1], data->gpr, d2, x2, b2);
1548
1549 /* LAY r1, d2(x2, b2) --- load address (long-displacement version) */
1550 else if (is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1551 compute_x_addr (&data->gpr[r1], data->gpr, d2, x2, b2);
1552
1553 /* LARL r1, i2 --- load address relative long */
1554 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1555 pv_set_to_constant (&data->gpr[r1], pc + i2 * 2);
1556
1557 /* BASR r1, 0 --- branch and save
1558 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1559 else if (is_rr (insn, op_basr, &r1, &r2)
1560 && r2 == 0)
1561 pv_set_to_constant (&data->gpr[r1], next_pc);
1562
1563 /* BRAS r1, i2 --- branch relative and save */
1564 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1565 {
1566 pv_set_to_constant (&data->gpr[r1], next_pc);
1567 next_pc = pc + i2 * 2;
1568
1569 /* We'd better not interpret any backward branches. We'll
1570 never terminate. */
1571 if (next_pc <= pc)
1572 break;
1573 }
1574
1575 /* Terminate search when hitting any other branch instruction. */
1576 else if (is_rr (insn, op_basr, &r1, &r2)
1577 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1578 || is_rr (insn, op_bcr, &r1, &r2)
1579 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1580 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1581 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1582 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1583 break;
1584
1585 else
1586 /* An instruction we don't know how to simulate. The only
1587 safe thing to do would be to set every value we're tracking
1588 to 'unknown'. Instead, we'll be optimistic: we assume that
1589 we *can* interpret every instruction that the compiler uses
1590 to manipulate any of the data we're interested in here --
1591 then we can just ignore anything else. */
1592 ;
1593
1594 /* Record the address after the last instruction that changed
1595 the FP, SP, or backlink. Ignore instructions that changed
1596 them back to their original values --- those are probably
1597 restore instructions. (The back chain is never restored,
1598 just popped.) */
1599 {
1600 struct prologue_value *sp = &data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1601 struct prologue_value *fp = &data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1602
1603 if ((! pv_is_identical (&pre_insn_sp, sp)
1604 && ! pv_is_register (sp, S390_SP_REGNUM, 0))
1605 || (! pv_is_identical (&pre_insn_fp, fp)
1606 && ! pv_is_register (fp, S390_FRAME_REGNUM, 0))
1607 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1608 result = next_pc;
1609 }
1610 }
1611
1612 return result;
1613 }
1614
1615 /* Advance PC across any function entry prologue instructions to reach
1616 some "real" code. */
1617 static CORE_ADDR
1618 s390_skip_prologue (CORE_ADDR pc)
1619 {
1620 struct s390_prologue_data data;
1621 CORE_ADDR skip_pc;
1622 skip_pc = s390_analyze_prologue (current_gdbarch, pc, (CORE_ADDR)-1, &data);
1623 return skip_pc ? skip_pc : pc;
1624 }
1625
1626 /* Return true if we are in the functin's epilogue, i.e. after the
1627 instruction that destroyed the function's stack frame. */
1628 static int
1629 s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1630 {
1631 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1632
1633 /* In frameless functions, there's not frame to destroy and thus
1634 we don't care about the epilogue.
1635
1636 In functions with frame, the epilogue sequence is a pair of
1637 a LM-type instruction that restores (amongst others) the
1638 return register %r14 and the stack pointer %r15, followed
1639 by a branch 'br %r14' --or equivalent-- that effects the
1640 actual return.
1641
1642 In that situation, this function needs to return 'true' in
1643 exactly one case: when pc points to that branch instruction.
1644
1645 Thus we try to disassemble the one instructions immediately
1646 preceeding pc and check whether it is an LM-type instruction
1647 modifying the stack pointer.
1648
1649 Note that disassembling backwards is not reliable, so there
1650 is a slight chance of false positives here ... */
1651
1652 bfd_byte insn[6];
1653 unsigned int r1, r3, b2;
1654 int d2;
1655
1656 if (word_size == 4
1657 && !deprecated_read_memory_nobpt (pc - 4, insn, 4)
1658 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1659 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1660 return 1;
1661
1662 if (word_size == 4
1663 && !deprecated_read_memory_nobpt (pc - 6, insn, 6)
1664 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1665 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1666 return 1;
1667
1668 if (word_size == 8
1669 && !deprecated_read_memory_nobpt (pc - 6, insn, 6)
1670 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
1671 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1672 return 1;
1673
1674 return 0;
1675 }
1676
1677
1678 /* Normal stack frames. */
1679
1680 struct s390_unwind_cache {
1681
1682 CORE_ADDR func;
1683 CORE_ADDR frame_base;
1684 CORE_ADDR local_base;
1685
1686 struct trad_frame_saved_reg *saved_regs;
1687 };
1688
1689 static int
1690 s390_prologue_frame_unwind_cache (struct frame_info *next_frame,
1691 struct s390_unwind_cache *info)
1692 {
1693 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1694 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1695 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1696 struct s390_prologue_data data;
1697 struct prologue_value *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1698 struct prologue_value *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1699 int i;
1700 CORE_ADDR cfa;
1701 CORE_ADDR func;
1702 CORE_ADDR result;
1703 ULONGEST reg;
1704 CORE_ADDR prev_sp;
1705 int frame_pointer;
1706 int size;
1707
1708 /* Try to find the function start address. If we can't find it, we don't
1709 bother searching for it -- with modern compilers this would be mostly
1710 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1711 or else a valid backchain ... */
1712 func = frame_func_unwind (next_frame);
1713 if (!func)
1714 return 0;
1715
1716 /* Try to analyze the prologue. */
1717 result = s390_analyze_prologue (gdbarch, func,
1718 frame_pc_unwind (next_frame), &data);
1719 if (!result)
1720 return 0;
1721
1722 /* If this was successful, we should have found the instruction that
1723 sets the stack pointer register to the previous value of the stack
1724 pointer minus the frame size. */
1725 if (sp->kind != pv_register || sp->reg != S390_SP_REGNUM)
1726 return 0;
1727
1728 /* A frame size of zero at this point can mean either a real
1729 frameless function, or else a failure to find the prologue.
1730 Perform some sanity checks to verify we really have a
1731 frameless function. */
1732 if (sp->k == 0)
1733 {
1734 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1735 size zero. This is only possible if the next frame is a sentinel
1736 frame, a dummy frame, or a signal trampoline frame. */
1737 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1738 needed, instead the code should simpliy rely on its
1739 analysis. */
1740 if (get_frame_type (next_frame) == NORMAL_FRAME)
1741 return 0;
1742
1743 /* If we really have a frameless function, %r14 must be valid
1744 -- in particular, it must point to a different function. */
1745 reg = frame_unwind_register_unsigned (next_frame, S390_RETADDR_REGNUM);
1746 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1747 if (get_pc_function_start (reg) == func)
1748 {
1749 /* However, there is one case where it *is* valid for %r14
1750 to point to the same function -- if this is a recursive
1751 call, and we have stopped in the prologue *before* the
1752 stack frame was allocated.
1753
1754 Recognize this case by looking ahead a bit ... */
1755
1756 struct s390_prologue_data data2;
1757 struct prologue_value *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1758
1759 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
1760 && sp->kind == pv_register
1761 && sp->reg == S390_SP_REGNUM
1762 && sp->k != 0))
1763 return 0;
1764 }
1765 }
1766
1767
1768 /* OK, we've found valid prologue data. */
1769 size = -sp->k;
1770
1771 /* If the frame pointer originally also holds the same value
1772 as the stack pointer, we're probably using it. If it holds
1773 some other value -- even a constant offset -- it is most
1774 likely used as temp register. */
1775 if (pv_is_identical (sp, fp))
1776 frame_pointer = S390_FRAME_REGNUM;
1777 else
1778 frame_pointer = S390_SP_REGNUM;
1779
1780 /* If we've detected a function with stack frame, we'll still have to
1781 treat it as frameless if we're currently within the function epilog
1782 code at a point where the frame pointer has already been restored.
1783 This can only happen in an innermost frame. */
1784 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1785 instead the code should simpliy rely on its analysis. */
1786 if (size > 0 && get_frame_type (next_frame) != NORMAL_FRAME)
1787 {
1788 /* See the comment in s390_in_function_epilogue_p on why this is
1789 not completely reliable ... */
1790 if (s390_in_function_epilogue_p (gdbarch, frame_pc_unwind (next_frame)))
1791 {
1792 memset (&data, 0, sizeof (data));
1793 size = 0;
1794 frame_pointer = S390_SP_REGNUM;
1795 }
1796 }
1797
1798 /* Once we know the frame register and the frame size, we can unwind
1799 the current value of the frame register from the next frame, and
1800 add back the frame size to arrive that the previous frame's
1801 stack pointer value. */
1802 prev_sp = frame_unwind_register_unsigned (next_frame, frame_pointer) + size;
1803 cfa = prev_sp + 16*word_size + 32;
1804
1805 /* Record the addresses of all register spill slots the prologue parser
1806 has recognized. Consider only registers defined as call-saved by the
1807 ABI; for call-clobbered registers the parser may have recognized
1808 spurious stores. */
1809
1810 for (i = 6; i <= 15; i++)
1811 if (data.gpr_slot[i] != 0)
1812 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
1813
1814 switch (tdep->abi)
1815 {
1816 case ABI_LINUX_S390:
1817 if (data.fpr_slot[4] != 0)
1818 info->saved_regs[S390_F4_REGNUM].addr = cfa - data.fpr_slot[4];
1819 if (data.fpr_slot[6] != 0)
1820 info->saved_regs[S390_F6_REGNUM].addr = cfa - data.fpr_slot[6];
1821 break;
1822
1823 case ABI_LINUX_ZSERIES:
1824 for (i = 8; i <= 15; i++)
1825 if (data.fpr_slot[i] != 0)
1826 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
1827 break;
1828 }
1829
1830 /* Function return will set PC to %r14. */
1831 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1832
1833 /* In frameless functions, we unwind simply by moving the return
1834 address to the PC. However, if we actually stored to the
1835 save area, use that -- we might only think the function frameless
1836 because we're in the middle of the prologue ... */
1837 if (size == 0
1838 && !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1839 {
1840 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
1841 }
1842
1843 /* Another sanity check: unless this is a frameless function,
1844 we should have found spill slots for SP and PC.
1845 If not, we cannot unwind further -- this happens e.g. in
1846 libc's thread_start routine. */
1847 if (size > 0)
1848 {
1849 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
1850 || !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1851 prev_sp = -1;
1852 }
1853
1854 /* We use the current value of the frame register as local_base,
1855 and the top of the register save area as frame_base. */
1856 if (prev_sp != -1)
1857 {
1858 info->frame_base = prev_sp + 16*word_size + 32;
1859 info->local_base = prev_sp - size;
1860 }
1861
1862 info->func = func;
1863 return 1;
1864 }
1865
1866 static void
1867 s390_backchain_frame_unwind_cache (struct frame_info *next_frame,
1868 struct s390_unwind_cache *info)
1869 {
1870 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1871 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1872 CORE_ADDR backchain;
1873 ULONGEST reg;
1874 LONGEST sp;
1875
1876 /* Get the backchain. */
1877 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
1878 backchain = read_memory_unsigned_integer (reg, word_size);
1879
1880 /* A zero backchain terminates the frame chain. As additional
1881 sanity check, let's verify that the spill slot for SP in the
1882 save area pointed to by the backchain in fact links back to
1883 the save area. */
1884 if (backchain != 0
1885 && safe_read_memory_integer (backchain + 15*word_size, word_size, &sp)
1886 && (CORE_ADDR)sp == backchain)
1887 {
1888 /* We don't know which registers were saved, but it will have
1889 to be at least %r14 and %r15. This will allow us to continue
1890 unwinding, but other prev-frame registers may be incorrect ... */
1891 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1892 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1893
1894 /* Function return will set PC to %r14. */
1895 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1896
1897 /* We use the current value of the frame register as local_base,
1898 and the top of the register save area as frame_base. */
1899 info->frame_base = backchain + 16*word_size + 32;
1900 info->local_base = reg;
1901 }
1902
1903 info->func = frame_pc_unwind (next_frame);
1904 }
1905
1906 static struct s390_unwind_cache *
1907 s390_frame_unwind_cache (struct frame_info *next_frame,
1908 void **this_prologue_cache)
1909 {
1910 struct s390_unwind_cache *info;
1911 if (*this_prologue_cache)
1912 return *this_prologue_cache;
1913
1914 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1915 *this_prologue_cache = info;
1916 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1917 info->func = -1;
1918 info->frame_base = -1;
1919 info->local_base = -1;
1920
1921 /* Try to use prologue analysis to fill the unwind cache.
1922 If this fails, fall back to reading the stack backchain. */
1923 if (!s390_prologue_frame_unwind_cache (next_frame, info))
1924 s390_backchain_frame_unwind_cache (next_frame, info);
1925
1926 return info;
1927 }
1928
1929 static void
1930 s390_frame_this_id (struct frame_info *next_frame,
1931 void **this_prologue_cache,
1932 struct frame_id *this_id)
1933 {
1934 struct s390_unwind_cache *info
1935 = s390_frame_unwind_cache (next_frame, this_prologue_cache);
1936
1937 if (info->frame_base == -1)
1938 return;
1939
1940 *this_id = frame_id_build (info->frame_base, info->func);
1941 }
1942
1943 static void
1944 s390_frame_prev_register (struct frame_info *next_frame,
1945 void **this_prologue_cache,
1946 int regnum, int *optimizedp,
1947 enum lval_type *lvalp, CORE_ADDR *addrp,
1948 int *realnump, void *bufferp)
1949 {
1950 struct s390_unwind_cache *info
1951 = s390_frame_unwind_cache (next_frame, this_prologue_cache);
1952 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
1953 optimizedp, lvalp, addrp, realnump, bufferp);
1954 }
1955
1956 static const struct frame_unwind s390_frame_unwind = {
1957 NORMAL_FRAME,
1958 s390_frame_this_id,
1959 s390_frame_prev_register
1960 };
1961
1962 static const struct frame_unwind *
1963 s390_frame_sniffer (struct frame_info *next_frame)
1964 {
1965 return &s390_frame_unwind;
1966 }
1967
1968
1969 /* Code stubs and their stack frames. For things like PLTs and NULL
1970 function calls (where there is no true frame and the return address
1971 is in the RETADDR register). */
1972
1973 struct s390_stub_unwind_cache
1974 {
1975 CORE_ADDR frame_base;
1976 struct trad_frame_saved_reg *saved_regs;
1977 };
1978
1979 static struct s390_stub_unwind_cache *
1980 s390_stub_frame_unwind_cache (struct frame_info *next_frame,
1981 void **this_prologue_cache)
1982 {
1983 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1984 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1985 struct s390_stub_unwind_cache *info;
1986 ULONGEST reg;
1987
1988 if (*this_prologue_cache)
1989 return *this_prologue_cache;
1990
1991 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
1992 *this_prologue_cache = info;
1993 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1994
1995 /* The return address is in register %r14. */
1996 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
1997
1998 /* Retrieve stack pointer and determine our frame base. */
1999 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2000 info->frame_base = reg + 16*word_size + 32;
2001
2002 return info;
2003 }
2004
2005 static void
2006 s390_stub_frame_this_id (struct frame_info *next_frame,
2007 void **this_prologue_cache,
2008 struct frame_id *this_id)
2009 {
2010 struct s390_stub_unwind_cache *info
2011 = s390_stub_frame_unwind_cache (next_frame, this_prologue_cache);
2012 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame));
2013 }
2014
2015 static void
2016 s390_stub_frame_prev_register (struct frame_info *next_frame,
2017 void **this_prologue_cache,
2018 int regnum, int *optimizedp,
2019 enum lval_type *lvalp, CORE_ADDR *addrp,
2020 int *realnump, void *bufferp)
2021 {
2022 struct s390_stub_unwind_cache *info
2023 = s390_stub_frame_unwind_cache (next_frame, this_prologue_cache);
2024 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
2025 optimizedp, lvalp, addrp, realnump, bufferp);
2026 }
2027
2028 static const struct frame_unwind s390_stub_frame_unwind = {
2029 NORMAL_FRAME,
2030 s390_stub_frame_this_id,
2031 s390_stub_frame_prev_register
2032 };
2033
2034 static const struct frame_unwind *
2035 s390_stub_frame_sniffer (struct frame_info *next_frame)
2036 {
2037 CORE_ADDR pc = frame_pc_unwind (next_frame);
2038 bfd_byte insn[S390_MAX_INSTR_SIZE];
2039
2040 /* If the current PC points to non-readable memory, we assume we
2041 have trapped due to an invalid function pointer call. We handle
2042 the non-existing current function like a PLT stub. */
2043 if (in_plt_section (pc, NULL)
2044 || s390_readinstruction (insn, pc) < 0)
2045 return &s390_stub_frame_unwind;
2046 return NULL;
2047 }
2048
2049
2050 /* Signal trampoline stack frames. */
2051
2052 struct s390_sigtramp_unwind_cache {
2053 CORE_ADDR frame_base;
2054 struct trad_frame_saved_reg *saved_regs;
2055 };
2056
2057 static struct s390_sigtramp_unwind_cache *
2058 s390_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
2059 void **this_prologue_cache)
2060 {
2061 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2062 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2063 struct s390_sigtramp_unwind_cache *info;
2064 ULONGEST this_sp, prev_sp;
2065 CORE_ADDR next_ra, next_cfa, sigreg_ptr;
2066 int i;
2067
2068 if (*this_prologue_cache)
2069 return *this_prologue_cache;
2070
2071 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2072 *this_prologue_cache = info;
2073 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2074
2075 this_sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2076 next_ra = frame_pc_unwind (next_frame);
2077 next_cfa = this_sp + 16*word_size + 32;
2078
2079 /* New-style RT frame:
2080 retcode + alignment (8 bytes)
2081 siginfo (128 bytes)
2082 ucontext (contains sigregs at offset 5 words) */
2083 if (next_ra == next_cfa)
2084 {
2085 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
2086 }
2087
2088 /* Old-style RT frame and all non-RT frames:
2089 old signal mask (8 bytes)
2090 pointer to sigregs */
2091 else
2092 {
2093 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, word_size);
2094 }
2095
2096 /* The sigregs structure looks like this:
2097 long psw_mask;
2098 long psw_addr;
2099 long gprs[16];
2100 int acrs[16];
2101 int fpc;
2102 int __pad;
2103 double fprs[16]; */
2104
2105 /* Let's ignore the PSW mask, it will not be restored anyway. */
2106 sigreg_ptr += word_size;
2107
2108 /* Next comes the PSW address. */
2109 info->saved_regs[S390_PC_REGNUM].addr = sigreg_ptr;
2110 sigreg_ptr += word_size;
2111
2112 /* Then the GPRs. */
2113 for (i = 0; i < 16; i++)
2114 {
2115 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2116 sigreg_ptr += word_size;
2117 }
2118
2119 /* Then the ACRs. */
2120 for (i = 0; i < 16; i++)
2121 {
2122 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2123 sigreg_ptr += 4;
2124 }
2125
2126 /* The floating-point control word. */
2127 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2128 sigreg_ptr += 8;
2129
2130 /* And finally the FPRs. */
2131 for (i = 0; i < 16; i++)
2132 {
2133 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2134 sigreg_ptr += 8;
2135 }
2136
2137 /* Restore the previous frame's SP. */
2138 prev_sp = read_memory_unsigned_integer (
2139 info->saved_regs[S390_SP_REGNUM].addr,
2140 word_size);
2141
2142 /* Determine our frame base. */
2143 info->frame_base = prev_sp + 16*word_size + 32;
2144
2145 return info;
2146 }
2147
2148 static void
2149 s390_sigtramp_frame_this_id (struct frame_info *next_frame,
2150 void **this_prologue_cache,
2151 struct frame_id *this_id)
2152 {
2153 struct s390_sigtramp_unwind_cache *info
2154 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
2155 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame));
2156 }
2157
2158 static void
2159 s390_sigtramp_frame_prev_register (struct frame_info *next_frame,
2160 void **this_prologue_cache,
2161 int regnum, int *optimizedp,
2162 enum lval_type *lvalp, CORE_ADDR *addrp,
2163 int *realnump, void *bufferp)
2164 {
2165 struct s390_sigtramp_unwind_cache *info
2166 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
2167 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
2168 optimizedp, lvalp, addrp, realnump, bufferp);
2169 }
2170
2171 static const struct frame_unwind s390_sigtramp_frame_unwind = {
2172 SIGTRAMP_FRAME,
2173 s390_sigtramp_frame_this_id,
2174 s390_sigtramp_frame_prev_register
2175 };
2176
2177 static const struct frame_unwind *
2178 s390_sigtramp_frame_sniffer (struct frame_info *next_frame)
2179 {
2180 CORE_ADDR pc = frame_pc_unwind (next_frame);
2181 bfd_byte sigreturn[2];
2182
2183 if (deprecated_read_memory_nobpt (pc, sigreturn, 2))
2184 return NULL;
2185
2186 if (sigreturn[0] != 0x0a /* svc */)
2187 return NULL;
2188
2189 if (sigreturn[1] != 119 /* sigreturn */
2190 && sigreturn[1] != 173 /* rt_sigreturn */)
2191 return NULL;
2192
2193 return &s390_sigtramp_frame_unwind;
2194 }
2195
2196
2197 /* Frame base handling. */
2198
2199 static CORE_ADDR
2200 s390_frame_base_address (struct frame_info *next_frame, void **this_cache)
2201 {
2202 struct s390_unwind_cache *info
2203 = s390_frame_unwind_cache (next_frame, this_cache);
2204 return info->frame_base;
2205 }
2206
2207 static CORE_ADDR
2208 s390_local_base_address (struct frame_info *next_frame, void **this_cache)
2209 {
2210 struct s390_unwind_cache *info
2211 = s390_frame_unwind_cache (next_frame, this_cache);
2212 return info->local_base;
2213 }
2214
2215 static const struct frame_base s390_frame_base = {
2216 &s390_frame_unwind,
2217 s390_frame_base_address,
2218 s390_local_base_address,
2219 s390_local_base_address
2220 };
2221
2222 static CORE_ADDR
2223 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2224 {
2225 ULONGEST pc;
2226 pc = frame_unwind_register_unsigned (next_frame, S390_PC_REGNUM);
2227 return gdbarch_addr_bits_remove (gdbarch, pc);
2228 }
2229
2230 static CORE_ADDR
2231 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2232 {
2233 ULONGEST sp;
2234 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2235 return gdbarch_addr_bits_remove (gdbarch, sp);
2236 }
2237
2238
2239 /* DWARF-2 frame support. */
2240
2241 static void
2242 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2243 struct dwarf2_frame_state_reg *reg)
2244 {
2245 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2246
2247 switch (tdep->abi)
2248 {
2249 case ABI_LINUX_S390:
2250 /* Call-saved registers. */
2251 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
2252 || regnum == S390_F4_REGNUM
2253 || regnum == S390_F6_REGNUM)
2254 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2255
2256 /* Call-clobbered registers. */
2257 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM)
2258 || (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
2259 && regnum != S390_F4_REGNUM && regnum != S390_F6_REGNUM))
2260 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2261
2262 /* The return address column. */
2263 else if (regnum == S390_PC_REGNUM)
2264 reg->how = DWARF2_FRAME_REG_RA;
2265 break;
2266
2267 case ABI_LINUX_ZSERIES:
2268 /* Call-saved registers. */
2269 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
2270 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM))
2271 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2272
2273 /* Call-clobbered registers. */
2274 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM)
2275 || (regnum >= S390_F0_REGNUM && regnum <= S390_F7_REGNUM))
2276 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2277
2278 /* The return address column. */
2279 else if (regnum == S390_PC_REGNUM)
2280 reg->how = DWARF2_FRAME_REG_RA;
2281 break;
2282 }
2283 }
2284
2285
2286 /* Dummy function calls. */
2287
2288 /* Return non-zero if TYPE is an integer-like type, zero otherwise.
2289 "Integer-like" types are those that should be passed the way
2290 integers are: integers, enums, ranges, characters, and booleans. */
2291 static int
2292 is_integer_like (struct type *type)
2293 {
2294 enum type_code code = TYPE_CODE (type);
2295
2296 return (code == TYPE_CODE_INT
2297 || code == TYPE_CODE_ENUM
2298 || code == TYPE_CODE_RANGE
2299 || code == TYPE_CODE_CHAR
2300 || code == TYPE_CODE_BOOL);
2301 }
2302
2303 /* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2304 "Pointer-like" types are those that should be passed the way
2305 pointers are: pointers and references. */
2306 static int
2307 is_pointer_like (struct type *type)
2308 {
2309 enum type_code code = TYPE_CODE (type);
2310
2311 return (code == TYPE_CODE_PTR
2312 || code == TYPE_CODE_REF);
2313 }
2314
2315
2316 /* Return non-zero if TYPE is a `float singleton' or `double
2317 singleton', zero otherwise.
2318
2319 A `T singleton' is a struct type with one member, whose type is
2320 either T or a `T singleton'. So, the following are all float
2321 singletons:
2322
2323 struct { float x };
2324 struct { struct { float x; } x; };
2325 struct { struct { struct { float x; } x; } x; };
2326
2327 ... and so on.
2328
2329 All such structures are passed as if they were floats or doubles,
2330 as the (revised) ABI says. */
2331 static int
2332 is_float_singleton (struct type *type)
2333 {
2334 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2335 {
2336 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2337 CHECK_TYPEDEF (singleton_type);
2338
2339 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
2340 || is_float_singleton (singleton_type));
2341 }
2342
2343 return 0;
2344 }
2345
2346
2347 /* Return non-zero if TYPE is a struct-like type, zero otherwise.
2348 "Struct-like" types are those that should be passed as structs are:
2349 structs and unions.
2350
2351 As an odd quirk, not mentioned in the ABI, GCC passes float and
2352 double singletons as if they were a plain float, double, etc. (The
2353 corresponding union types are handled normally.) So we exclude
2354 those types here. *shrug* */
2355 static int
2356 is_struct_like (struct type *type)
2357 {
2358 enum type_code code = TYPE_CODE (type);
2359
2360 return (code == TYPE_CODE_UNION
2361 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2362 }
2363
2364
2365 /* Return non-zero if TYPE is a float-like type, zero otherwise.
2366 "Float-like" types are those that should be passed as
2367 floating-point values are.
2368
2369 You'd think this would just be floats, doubles, long doubles, etc.
2370 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2371 double singletons as if they were a plain float, double, etc. (The
2372 corresponding union types are handled normally.) So we include
2373 those types here. *shrug* */
2374 static int
2375 is_float_like (struct type *type)
2376 {
2377 return (TYPE_CODE (type) == TYPE_CODE_FLT
2378 || is_float_singleton (type));
2379 }
2380
2381
2382 static int
2383 is_power_of_two (unsigned int n)
2384 {
2385 return ((n & (n - 1)) == 0);
2386 }
2387
2388 /* Return non-zero if TYPE should be passed as a pointer to a copy,
2389 zero otherwise. */
2390 static int
2391 s390_function_arg_pass_by_reference (struct type *type)
2392 {
2393 unsigned length = TYPE_LENGTH (type);
2394 if (length > 8)
2395 return 1;
2396
2397 /* FIXME: All complex and vector types are also returned by reference. */
2398 return is_struct_like (type) && !is_power_of_two (length);
2399 }
2400
2401 /* Return non-zero if TYPE should be passed in a float register
2402 if possible. */
2403 static int
2404 s390_function_arg_float (struct type *type)
2405 {
2406 unsigned length = TYPE_LENGTH (type);
2407 if (length > 8)
2408 return 0;
2409
2410 return is_float_like (type);
2411 }
2412
2413 /* Return non-zero if TYPE should be passed in an integer register
2414 (or a pair of integer registers) if possible. */
2415 static int
2416 s390_function_arg_integer (struct type *type)
2417 {
2418 unsigned length = TYPE_LENGTH (type);
2419 if (length > 8)
2420 return 0;
2421
2422 return is_integer_like (type)
2423 || is_pointer_like (type)
2424 || (is_struct_like (type) && is_power_of_two (length));
2425 }
2426
2427 /* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2428 word as required for the ABI. */
2429 static LONGEST
2430 extend_simple_arg (struct value *arg)
2431 {
2432 struct type *type = value_type (arg);
2433
2434 /* Even structs get passed in the least significant bits of the
2435 register / memory word. It's not really right to extract them as
2436 an integer, but it does take care of the extension. */
2437 if (TYPE_UNSIGNED (type))
2438 return extract_unsigned_integer (value_contents (arg),
2439 TYPE_LENGTH (type));
2440 else
2441 return extract_signed_integer (value_contents (arg),
2442 TYPE_LENGTH (type));
2443 }
2444
2445
2446 /* Return the alignment required by TYPE. */
2447 static int
2448 alignment_of (struct type *type)
2449 {
2450 int alignment;
2451
2452 if (is_integer_like (type)
2453 || is_pointer_like (type)
2454 || TYPE_CODE (type) == TYPE_CODE_FLT)
2455 alignment = TYPE_LENGTH (type);
2456 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2457 || TYPE_CODE (type) == TYPE_CODE_UNION)
2458 {
2459 int i;
2460
2461 alignment = 1;
2462 for (i = 0; i < TYPE_NFIELDS (type); i++)
2463 {
2464 int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i));
2465
2466 if (field_alignment > alignment)
2467 alignment = field_alignment;
2468 }
2469 }
2470 else
2471 alignment = 1;
2472
2473 /* Check that everything we ever return is a power of two. Lots of
2474 code doesn't want to deal with aligning things to arbitrary
2475 boundaries. */
2476 gdb_assert ((alignment & (alignment - 1)) == 0);
2477
2478 return alignment;
2479 }
2480
2481
2482 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
2483 place to be passed to a function, as specified by the "GNU/Linux
2484 for S/390 ELF Application Binary Interface Supplement".
2485
2486 SP is the current stack pointer. We must put arguments, links,
2487 padding, etc. whereever they belong, and return the new stack
2488 pointer value.
2489
2490 If STRUCT_RETURN is non-zero, then the function we're calling is
2491 going to return a structure by value; STRUCT_ADDR is the address of
2492 a block we've allocated for it on the stack.
2493
2494 Our caller has taken care of any type promotions needed to satisfy
2495 prototypes or the old K&R argument-passing rules. */
2496 static CORE_ADDR
2497 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
2498 struct regcache *regcache, CORE_ADDR bp_addr,
2499 int nargs, struct value **args, CORE_ADDR sp,
2500 int struct_return, CORE_ADDR struct_addr)
2501 {
2502 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2503 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2504 ULONGEST orig_sp;
2505 int i;
2506
2507 /* If the i'th argument is passed as a reference to a copy, then
2508 copy_addr[i] is the address of the copy we made. */
2509 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
2510
2511 /* Build the reference-to-copy area. */
2512 for (i = 0; i < nargs; i++)
2513 {
2514 struct value *arg = args[i];
2515 struct type *type = value_type (arg);
2516 unsigned length = TYPE_LENGTH (type);
2517
2518 if (s390_function_arg_pass_by_reference (type))
2519 {
2520 sp -= length;
2521 sp = align_down (sp, alignment_of (type));
2522 write_memory (sp, value_contents (arg), length);
2523 copy_addr[i] = sp;
2524 }
2525 }
2526
2527 /* Reserve space for the parameter area. As a conservative
2528 simplification, we assume that everything will be passed on the
2529 stack. Since every argument larger than 8 bytes will be
2530 passed by reference, we use this simple upper bound. */
2531 sp -= nargs * 8;
2532
2533 /* After all that, make sure it's still aligned on an eight-byte
2534 boundary. */
2535 sp = align_down (sp, 8);
2536
2537 /* Finally, place the actual parameters, working from SP towards
2538 higher addresses. The code above is supposed to reserve enough
2539 space for this. */
2540 {
2541 int fr = 0;
2542 int gr = 2;
2543 CORE_ADDR starg = sp;
2544
2545 /* A struct is returned using general register 2. */
2546 if (struct_return)
2547 {
2548 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2549 struct_addr);
2550 gr++;
2551 }
2552
2553 for (i = 0; i < nargs; i++)
2554 {
2555 struct value *arg = args[i];
2556 struct type *type = value_type (arg);
2557 unsigned length = TYPE_LENGTH (type);
2558
2559 if (s390_function_arg_pass_by_reference (type))
2560 {
2561 if (gr <= 6)
2562 {
2563 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2564 copy_addr[i]);
2565 gr++;
2566 }
2567 else
2568 {
2569 write_memory_unsigned_integer (starg, word_size, copy_addr[i]);
2570 starg += word_size;
2571 }
2572 }
2573 else if (s390_function_arg_float (type))
2574 {
2575 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2576 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2577 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2578 {
2579 /* When we store a single-precision value in an FP register,
2580 it occupies the leftmost bits. */
2581 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
2582 0, length, value_contents (arg));
2583 fr += 2;
2584 }
2585 else
2586 {
2587 /* When we store a single-precision value in a stack slot,
2588 it occupies the rightmost bits. */
2589 starg = align_up (starg + length, word_size);
2590 write_memory (starg - length, value_contents (arg), length);
2591 }
2592 }
2593 else if (s390_function_arg_integer (type) && length <= word_size)
2594 {
2595 if (gr <= 6)
2596 {
2597 /* Integer arguments are always extended to word size. */
2598 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
2599 extend_simple_arg (arg));
2600 gr++;
2601 }
2602 else
2603 {
2604 /* Integer arguments are always extended to word size. */
2605 write_memory_signed_integer (starg, word_size,
2606 extend_simple_arg (arg));
2607 starg += word_size;
2608 }
2609 }
2610 else if (s390_function_arg_integer (type) && length == 2*word_size)
2611 {
2612 if (gr <= 5)
2613 {
2614 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
2615 value_contents (arg));
2616 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
2617 value_contents (arg) + word_size);
2618 gr += 2;
2619 }
2620 else
2621 {
2622 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2623 in it, then don't go back and use it again later. */
2624 gr = 7;
2625
2626 write_memory (starg, value_contents (arg), length);
2627 starg += length;
2628 }
2629 }
2630 else
2631 internal_error (__FILE__, __LINE__, "unknown argument type");
2632 }
2633 }
2634
2635 /* Allocate the standard frame areas: the register save area, the
2636 word reserved for the compiler (which seems kind of meaningless),
2637 and the back chain pointer. */
2638 sp -= 16*word_size + 32;
2639
2640 /* Store return address. */
2641 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2642
2643 /* Store updated stack pointer. */
2644 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
2645
2646 /* We need to return the 'stack part' of the frame ID,
2647 which is actually the top of the register save area. */
2648 return sp + 16*word_size + 32;
2649 }
2650
2651 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
2652 dummy frame. The frame ID's base needs to match the TOS value
2653 returned by push_dummy_call, and the PC match the dummy frame's
2654 breakpoint. */
2655 static struct frame_id
2656 s390_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2657 {
2658 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2659 CORE_ADDR sp = s390_unwind_sp (gdbarch, next_frame);
2660
2661 return frame_id_build (sp + 16*word_size + 32,
2662 frame_pc_unwind (next_frame));
2663 }
2664
2665 static CORE_ADDR
2666 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2667 {
2668 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2669 always be aligned on an eight-byte boundary. */
2670 return (addr & -8);
2671 }
2672
2673
2674 /* Function return value access. */
2675
2676 static enum return_value_convention
2677 s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
2678 {
2679 int length = TYPE_LENGTH (type);
2680 if (length > 8)
2681 return RETURN_VALUE_STRUCT_CONVENTION;
2682
2683 switch (TYPE_CODE (type))
2684 {
2685 case TYPE_CODE_STRUCT:
2686 case TYPE_CODE_UNION:
2687 case TYPE_CODE_ARRAY:
2688 return RETURN_VALUE_STRUCT_CONVENTION;
2689
2690 default:
2691 return RETURN_VALUE_REGISTER_CONVENTION;
2692 }
2693 }
2694
2695 static enum return_value_convention
2696 s390_return_value (struct gdbarch *gdbarch, struct type *type,
2697 struct regcache *regcache, void *out, const void *in)
2698 {
2699 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2700 int length = TYPE_LENGTH (type);
2701 enum return_value_convention rvc =
2702 s390_return_value_convention (gdbarch, type);
2703 if (in)
2704 {
2705 switch (rvc)
2706 {
2707 case RETURN_VALUE_REGISTER_CONVENTION:
2708 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2709 {
2710 /* When we store a single-precision value in an FP register,
2711 it occupies the leftmost bits. */
2712 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2713 0, length, in);
2714 }
2715 else if (length <= word_size)
2716 {
2717 /* Integer arguments are always extended to word size. */
2718 if (TYPE_UNSIGNED (type))
2719 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
2720 extract_unsigned_integer (in, length));
2721 else
2722 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
2723 extract_signed_integer (in, length));
2724 }
2725 else if (length == 2*word_size)
2726 {
2727 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
2728 regcache_cooked_write (regcache, S390_R3_REGNUM,
2729 (const char *)in + word_size);
2730 }
2731 else
2732 internal_error (__FILE__, __LINE__, "invalid return type");
2733 break;
2734
2735 case RETURN_VALUE_STRUCT_CONVENTION:
2736 error ("Cannot set function return value.");
2737 break;
2738 }
2739 }
2740 else if (out)
2741 {
2742 switch (rvc)
2743 {
2744 case RETURN_VALUE_REGISTER_CONVENTION:
2745 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2746 {
2747 /* When we store a single-precision value in an FP register,
2748 it occupies the leftmost bits. */
2749 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2750 0, length, out);
2751 }
2752 else if (length <= word_size)
2753 {
2754 /* Integer arguments occupy the rightmost bits. */
2755 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2756 word_size - length, length, out);
2757 }
2758 else if (length == 2*word_size)
2759 {
2760 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
2761 regcache_cooked_read (regcache, S390_R3_REGNUM,
2762 (char *)out + word_size);
2763 }
2764 else
2765 internal_error (__FILE__, __LINE__, "invalid return type");
2766 break;
2767
2768 case RETURN_VALUE_STRUCT_CONVENTION:
2769 error ("Function return value unknown.");
2770 break;
2771 }
2772 }
2773
2774 return rvc;
2775 }
2776
2777
2778 /* Breakpoints. */
2779
2780 static const unsigned char *
2781 s390_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
2782 {
2783 static unsigned char breakpoint[] = { 0x0, 0x1 };
2784
2785 *lenptr = sizeof (breakpoint);
2786 return breakpoint;
2787 }
2788
2789
2790 /* Address handling. */
2791
2792 static CORE_ADDR
2793 s390_addr_bits_remove (CORE_ADDR addr)
2794 {
2795 return addr & 0x7fffffff;
2796 }
2797
2798 static int
2799 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2800 {
2801 if (byte_size == 4)
2802 return TYPE_FLAG_ADDRESS_CLASS_1;
2803 else
2804 return 0;
2805 }
2806
2807 static const char *
2808 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2809 {
2810 if (type_flags & TYPE_FLAG_ADDRESS_CLASS_1)
2811 return "mode32";
2812 else
2813 return NULL;
2814 }
2815
2816 static int
2817 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, const char *name,
2818 int *type_flags_ptr)
2819 {
2820 if (strcmp (name, "mode32") == 0)
2821 {
2822 *type_flags_ptr = TYPE_FLAG_ADDRESS_CLASS_1;
2823 return 1;
2824 }
2825 else
2826 return 0;
2827 }
2828
2829
2830 /* Link map offsets. */
2831
2832 static struct link_map_offsets *
2833 s390_svr4_fetch_link_map_offsets (void)
2834 {
2835 static struct link_map_offsets lmo;
2836 static struct link_map_offsets *lmp = NULL;
2837
2838 if (lmp == NULL)
2839 {
2840 lmp = &lmo;
2841
2842 lmo.r_debug_size = 8;
2843
2844 lmo.r_map_offset = 4;
2845 lmo.r_map_size = 4;
2846
2847 lmo.link_map_size = 20;
2848
2849 lmo.l_addr_offset = 0;
2850 lmo.l_addr_size = 4;
2851
2852 lmo.l_name_offset = 4;
2853 lmo.l_name_size = 4;
2854
2855 lmo.l_next_offset = 12;
2856 lmo.l_next_size = 4;
2857
2858 lmo.l_prev_offset = 16;
2859 lmo.l_prev_size = 4;
2860 }
2861
2862 return lmp;
2863 }
2864
2865 static struct link_map_offsets *
2866 s390x_svr4_fetch_link_map_offsets (void)
2867 {
2868 static struct link_map_offsets lmo;
2869 static struct link_map_offsets *lmp = NULL;
2870
2871 if (lmp == NULL)
2872 {
2873 lmp = &lmo;
2874
2875 lmo.r_debug_size = 16; /* All we need. */
2876
2877 lmo.r_map_offset = 8;
2878 lmo.r_map_size = 8;
2879
2880 lmo.link_map_size = 40; /* All we need. */
2881
2882 lmo.l_addr_offset = 0;
2883 lmo.l_addr_size = 8;
2884
2885 lmo.l_name_offset = 8;
2886 lmo.l_name_size = 8;
2887
2888 lmo.l_next_offset = 24;
2889 lmo.l_next_size = 8;
2890
2891 lmo.l_prev_offset = 32;
2892 lmo.l_prev_size = 8;
2893 }
2894
2895 return lmp;
2896 }
2897
2898
2899 /* Set up gdbarch struct. */
2900
2901 static struct gdbarch *
2902 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2903 {
2904 struct gdbarch *gdbarch;
2905 struct gdbarch_tdep *tdep;
2906
2907 /* First see if there is already a gdbarch that can satisfy the request. */
2908 arches = gdbarch_list_lookup_by_info (arches, &info);
2909 if (arches != NULL)
2910 return arches->gdbarch;
2911
2912 /* None found: is the request for a s390 architecture? */
2913 if (info.bfd_arch_info->arch != bfd_arch_s390)
2914 return NULL; /* No; then it's not for us. */
2915
2916 /* Yes: create a new gdbarch for the specified machine type. */
2917 tdep = XCALLOC (1, struct gdbarch_tdep);
2918 gdbarch = gdbarch_alloc (&info, tdep);
2919
2920 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
2921 set_gdbarch_char_signed (gdbarch, 0);
2922
2923 /* Amount PC must be decremented by after a breakpoint. This is
2924 often the number of bytes returned by BREAKPOINT_FROM_PC but not
2925 always. */
2926 set_gdbarch_decr_pc_after_break (gdbarch, 2);
2927 /* Stack grows downward. */
2928 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2929 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
2930 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
2931 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
2932
2933 set_gdbarch_pc_regnum (gdbarch, S390_PC_REGNUM);
2934 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
2935 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
2936 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
2937 set_gdbarch_num_pseudo_regs (gdbarch, S390_NUM_PSEUDO_REGS);
2938 set_gdbarch_register_name (gdbarch, s390_register_name);
2939 set_gdbarch_register_type (gdbarch, s390_register_type);
2940 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2941 set_gdbarch_dwarf_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2942 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2943 set_gdbarch_convert_register_p (gdbarch, s390_convert_register_p);
2944 set_gdbarch_register_to_value (gdbarch, s390_register_to_value);
2945 set_gdbarch_value_to_register (gdbarch, s390_value_to_register);
2946 set_gdbarch_register_reggroup_p (gdbarch, s390_register_reggroup_p);
2947 set_gdbarch_regset_from_core_section (gdbarch,
2948 s390_regset_from_core_section);
2949
2950 /* Inferior function calls. */
2951 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
2952 set_gdbarch_unwind_dummy_id (gdbarch, s390_unwind_dummy_id);
2953 set_gdbarch_frame_align (gdbarch, s390_frame_align);
2954 set_gdbarch_return_value (gdbarch, s390_return_value);
2955
2956 /* Frame handling. */
2957 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
2958 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
2959 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
2960 frame_unwind_append_sniffer (gdbarch, s390_stub_frame_sniffer);
2961 frame_unwind_append_sniffer (gdbarch, s390_sigtramp_frame_sniffer);
2962 frame_unwind_append_sniffer (gdbarch, s390_frame_sniffer);
2963 frame_base_set_default (gdbarch, &s390_frame_base);
2964 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
2965 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
2966
2967 switch (info.bfd_arch_info->mach)
2968 {
2969 case bfd_mach_s390_31:
2970 tdep->abi = ABI_LINUX_S390;
2971
2972 tdep->gregset = &s390_gregset;
2973 tdep->sizeof_gregset = s390_sizeof_gregset;
2974 tdep->fpregset = &s390_fpregset;
2975 tdep->sizeof_fpregset = s390_sizeof_fpregset;
2976
2977 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
2978 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
2979 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
2980 set_solib_svr4_fetch_link_map_offsets (gdbarch,
2981 s390_svr4_fetch_link_map_offsets);
2982
2983 break;
2984 case bfd_mach_s390_64:
2985 tdep->abi = ABI_LINUX_ZSERIES;
2986
2987 tdep->gregset = &s390x_gregset;
2988 tdep->sizeof_gregset = s390x_sizeof_gregset;
2989 tdep->fpregset = &s390_fpregset;
2990 tdep->sizeof_fpregset = s390_sizeof_fpregset;
2991
2992 set_gdbarch_long_bit (gdbarch, 64);
2993 set_gdbarch_long_long_bit (gdbarch, 64);
2994 set_gdbarch_ptr_bit (gdbarch, 64);
2995 set_gdbarch_pseudo_register_read (gdbarch, s390x_pseudo_register_read);
2996 set_gdbarch_pseudo_register_write (gdbarch, s390x_pseudo_register_write);
2997 set_solib_svr4_fetch_link_map_offsets (gdbarch,
2998 s390x_svr4_fetch_link_map_offsets);
2999 set_gdbarch_address_class_type_flags (gdbarch,
3000 s390_address_class_type_flags);
3001 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3002 s390_address_class_type_flags_to_name);
3003 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3004 s390_address_class_name_to_type_flags);
3005 break;
3006 }
3007
3008 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3009
3010 return gdbarch;
3011 }
3012
3013
3014
3015 extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3016
3017 void
3018 _initialize_s390_tdep (void)
3019 {
3020
3021 /* Hook us into the gdbarch mechanism. */
3022 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
3023 }
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