gdb/sparc-nat.c

   1 /* Functions specific to running gdb native on a SPARC running SunOS4.
   2    Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 59 Temple Place - Suite 330,
  19    Boston, MA 02111-1307, USA.  */
  20
  21 #include "defs.h"
  22 #include "inferior.h"
  23 #include "target.h"
  24 #include "gdbcore.h"
  25
  26 #include <signal.h>
  27 #include <sys/ptrace.h>
  28 #include <sys/wait.h>
  29 #ifdef __linux__
  30 #include <asm/reg.h>
  31 #else
  32 #include <machine/reg.h>
  33 #endif
  34 #include <sys/user.h>
  35
  36 /* We don't store all registers immediately when requested, since they
  37    get sent over in large chunks anyway.  Instead, we accumulate most
  38    of the changes and send them over once.  "deferred_stores" keeps
  39    track of which sets of registers we have locally-changed copies of,
  40    so we only need send the groups that have changed.  */
  41
  42 #define INT_REGS        1
  43 #define STACK_REGS      2
  44 #define FP_REGS         4
  45
  46 static void fetch_core_registers (char *, unsigned int, int, CORE_ADDR);
  47
  48 /* Fetch one or more registers from the inferior.  REGNO == -1 to get
  49    them all.  We actually fetch more than requested, when convenient,
  50    marking them as valid so we won't fetch them again.  */
  51
  52 void
  53 fetch_inferior_registers (int regno)
  54 {
  55   struct regs inferior_registers;
  56   struct fp_status inferior_fp_registers;
  57   int i;
  58
  59   /* We should never be called with deferred stores, because a prerequisite
  60      for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh.  */
  61   if (deferred_stores)
  62     abort ();
  63
  64   DO_DEFERRED_STORES;
  65
  66   /* Global and Out regs are fetched directly, as well as the control
  67      registers.  If we're getting one of the in or local regs,
  68      and the stack pointer has not yet been fetched,
  69      we have to do that first, since they're found in memory relative
  70      to the stack pointer.  */
  71   if (regno < O7_REGNUM         /* including -1 */
  72       || regno >= Y_REGNUM
  73       || (!register_valid[SP_REGNUM] && regno < I7_REGNUM))
  74     {
  75       if (0 != ptrace (PTRACE_GETREGS, inferior_pid,
  76                        (PTRACE_ARG3_TYPE) & inferior_registers, 0))
  77         perror ("ptrace_getregs");
  78
  79       registers[REGISTER_BYTE (0)] = 0;
  80       memcpy (&registers[REGISTER_BYTE (1)], &inferior_registers.r_g1,
  81               15 * REGISTER_RAW_SIZE (G0_REGNUM));
  82       *(int *) &registers[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps;
  83       *(int *) &registers[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc;
  84       *(int *) &registers[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc;
  85       *(int *) &registers[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y;
  86
  87       for (i = G0_REGNUM; i <= O7_REGNUM; i++)
  88         register_valid[i] = 1;
  89       register_valid[Y_REGNUM] = 1;
  90       register_valid[PS_REGNUM] = 1;
  91       register_valid[PC_REGNUM] = 1;
  92       register_valid[NPC_REGNUM] = 1;
  93       /* If we don't set these valid, read_register_bytes() rereads
  94          all the regs every time it is called!  FIXME.  */
  95       register_valid[WIM_REGNUM] = 1;   /* Not true yet, FIXME */
  96       register_valid[TBR_REGNUM] = 1;   /* Not true yet, FIXME */
  97       register_valid[CPS_REGNUM] = 1;   /* Not true yet, FIXME */
  98     }
  99
 100   /* Floating point registers */
 101   if (regno == -1 ||
 102       regno == FPS_REGNUM ||
 103       (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31))
 104     {
 105       if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid,
 106                        (PTRACE_ARG3_TYPE) & inferior_fp_registers,
 107                        0))
 108         perror ("ptrace_getfpregs");
 109       memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers,
 110               sizeof inferior_fp_registers.fpu_fr);
 111       memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)],
 112               &inferior_fp_registers.Fpu_fsr,
 113               sizeof (FPU_FSR_TYPE));
 114       for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
 115         register_valid[i] = 1;
 116       register_valid[FPS_REGNUM] = 1;
 117     }
 118
 119   /* These regs are saved on the stack by the kernel.  Only read them
 120      all (16 ptrace calls!) if we really need them.  */
 121   if (regno == -1)
 122     {
 123       target_read_memory (*(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)],
 124                           &registers[REGISTER_BYTE (L0_REGNUM)],
 125                           16 * REGISTER_RAW_SIZE (L0_REGNUM));
 126       for (i = L0_REGNUM; i <= I7_REGNUM; i++)
 127         register_valid[i] = 1;
 128     }
 129   else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
 130     {
 131       CORE_ADDR sp = *(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)];
 132       i = REGISTER_BYTE (regno);
 133       if (register_valid[regno])
 134         printf_unfiltered ("register %d valid and read\n", regno);
 135       target_read_memory (sp + i - REGISTER_BYTE (L0_REGNUM),
 136                           &registers[i], REGISTER_RAW_SIZE (regno));
 137       register_valid[regno] = 1;
 138     }
 139 }
 140
 141 /* Store our register values back into the inferior.
 142    If REGNO is -1, do this for all registers.
 143    Otherwise, REGNO specifies which register (so we can save time).  */
 144
 145 void
 146 store_inferior_registers (int regno)
 147 {
 148   struct regs inferior_registers;
 149   struct fp_status inferior_fp_registers;
 150   int wanna_store = INT_REGS + STACK_REGS + FP_REGS;
 151
 152   /* First decide which pieces of machine-state we need to modify.
 153      Default for regno == -1 case is all pieces.  */
 154   if (regno >= 0)
 155     if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32)
 156       {
 157         wanna_store = FP_REGS;
 158       }
 159     else
 160       {
 161         if (regno == SP_REGNUM)
 162           wanna_store = INT_REGS + STACK_REGS;
 163         else if (regno < L0_REGNUM || regno > I7_REGNUM)
 164           wanna_store = INT_REGS;
 165         else if (regno == FPS_REGNUM)
 166           wanna_store = FP_REGS;
 167         else
 168           wanna_store = STACK_REGS;
 169       }
 170
 171   /* See if we're forcing the stores to happen now, or deferring. */
 172   if (regno == -2)
 173     {
 174       wanna_store = deferred_stores;
 175       deferred_stores = 0;
 176     }
 177   else
 178     {
 179       if (wanna_store == STACK_REGS)
 180         {
 181           /* Fall through and just store one stack reg.  If we deferred
 182              it, we'd have to store them all, or remember more info.  */
 183         }
 184       else
 185         {
 186           deferred_stores |= wanna_store;
 187           return;
 188         }
 189     }
 190
 191   if (wanna_store & STACK_REGS)
 192     {
 193       CORE_ADDR sp = *(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)];
 194
 195       if (regno < 0 || regno == SP_REGNUM)
 196         {
 197           if (!register_valid[L0_REGNUM + 5])
 198             abort ();
 199           target_write_memory (sp,
 200                                &registers[REGISTER_BYTE (L0_REGNUM)],
 201                                16 * REGISTER_RAW_SIZE (L0_REGNUM));
 202         }
 203       else
 204         {
 205           if (!register_valid[regno])
 206             abort ();
 207           target_write_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM),
 208                                &registers[REGISTER_BYTE (regno)],
 209                                REGISTER_RAW_SIZE (regno));
 210         }
 211
 212     }
 213
 214   if (wanna_store & INT_REGS)
 215     {
 216       if (!register_valid[G1_REGNUM])
 217         abort ();
 218
 219       memcpy (&inferior_registers.r_g1, &registers[REGISTER_BYTE (G1_REGNUM)],
 220               15 * REGISTER_RAW_SIZE (G1_REGNUM));
 221
 222       inferior_registers.r_ps =
 223         *(int *) &registers[REGISTER_BYTE (PS_REGNUM)];
 224       inferior_registers.r_pc =
 225         *(int *) &registers[REGISTER_BYTE (PC_REGNUM)];
 226       inferior_registers.r_npc =
 227         *(int *) &registers[REGISTER_BYTE (NPC_REGNUM)];
 228       inferior_registers.r_y =
 229         *(int *) &registers[REGISTER_BYTE (Y_REGNUM)];
 230
 231       if (0 != ptrace (PTRACE_SETREGS, inferior_pid,
 232                        (PTRACE_ARG3_TYPE) & inferior_registers, 0))
 233         perror ("ptrace_setregs");
 234     }
 235
 236   if (wanna_store & FP_REGS)
 237     {
 238       if (!register_valid[FP0_REGNUM + 9])
 239         abort ();
 240       memcpy (&inferior_fp_registers, &registers[REGISTER_BYTE (FP0_REGNUM)],
 241               sizeof inferior_fp_registers.fpu_fr);
 242       memcpy (&inferior_fp_registers.Fpu_fsr,
 243               &registers[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE));
 244       if (0 !=
 245           ptrace (PTRACE_SETFPREGS, inferior_pid,
 246                   (PTRACE_ARG3_TYPE) & inferior_fp_registers, 0))
 247         perror ("ptrace_setfpregs");
 248     }
 249 }
 250
 251
 252 static void
 253 fetch_core_registers (core_reg_sect, core_reg_size, which, ignore)
 254      char *core_reg_sect;
 255      unsigned core_reg_size;
 256      int which;
 257      CORE_ADDR ignore;          /* reg addr, unused in this version */
 258 {
 259
 260   if (which == 0)
 261     {
 262
 263       /* Integer registers */
 264
 265 #define gregs ((struct regs *)core_reg_sect)
 266       /* G0 *always* holds 0.  */
 267       *(int *) &registers[REGISTER_BYTE (0)] = 0;
 268
 269       /* The globals and output registers.  */
 270       memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1,
 271               15 * REGISTER_RAW_SIZE (G1_REGNUM));
 272       *(int *) &registers[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps;
 273       *(int *) &registers[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc;
 274       *(int *) &registers[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc;
 275       *(int *) &registers[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y;
 276
 277       /* My best guess at where to get the locals and input
 278          registers is exactly where they usually are, right above
 279          the stack pointer.  If the core dump was caused by a bus error
 280          from blowing away the stack pointer (as is possible) then this
 281          won't work, but it's worth the try. */
 282       {
 283         int sp;
 284
 285         sp = *(int *) &registers[REGISTER_BYTE (SP_REGNUM)];
 286         if (0 != target_read_memory (sp, &registers[REGISTER_BYTE (L0_REGNUM)],
 287                                      16 * REGISTER_RAW_SIZE (L0_REGNUM)))
 288           {
 289             /* fprintf_unfiltered so user can still use gdb */
 290             fprintf_unfiltered (gdb_stderr,
 291                 "Couldn't read input and local registers from core file\n");
 292           }
 293       }
 294     }
 295   else if (which == 2)
 296     {
 297
 298       /* Floating point registers */
 299
 300 #define fpuregs  ((struct fpu *) core_reg_sect)
 301       if (core_reg_size >= sizeof (struct fpu))
 302         {
 303           memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs,
 304                   sizeof (fpuregs->fpu_regs));
 305           memcpy (&registers[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr,
 306                   sizeof (FPU_FSR_TYPE));
 307         }
 308       else
 309         fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n");
 310     }
 311 }
 312
 313 int
 314 kernel_u_size (void)
 315 {
 316   return (sizeof (struct user));
 317 }
 318 \f
 319
 320 /* Register that we are able to handle sparc core file formats.
 321    FIXME: is this really bfd_target_unknown_flavour? */
 322
 323 static struct core_fns sparc_core_fns =
 324 {
 325   bfd_target_unknown_flavour,           /* core_flavour */
 326   default_check_format,                 /* check_format */
 327   default_core_sniffer,                 /* core_sniffer */
 328   fetch_core_registers,                 /* core_read_registers */
 329   NULL                                  /* next */
 330 };
 331
 332 void
 333 _initialize_core_sparc (void)
 334 {
 335   add_core_fns (&sparc_core_fns);
 336 }