gdbserver/linux-low: turn 'fetch_register' into a method
[deliverable/binutils-gdb.git] / gdbserver / linux-arm-low.cc
1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2020 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19 #include "server.h"
20 #include "linux-low.h"
21 #include "arch/arm.h"
22 #include "arch/arm-linux.h"
23 #include "arch/arm-get-next-pcs.h"
24 #include "linux-aarch32-low.h"
25 #include "linux-aarch32-tdesc.h"
26 #include "linux-arm-tdesc.h"
27
28 #include <sys/uio.h>
29 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
30 On Bionic elf.h and linux/elf.h have conflicting definitions. */
31 #ifndef ELFMAG0
32 #include <elf.h>
33 #endif
34 #include "nat/gdb_ptrace.h"
35 #include <signal.h>
36 #include <sys/syscall.h>
37
38 #ifndef PTRACE_GET_THREAD_AREA
39 #define PTRACE_GET_THREAD_AREA 22
40 #endif
41
42 #ifndef PTRACE_GETWMMXREGS
43 # define PTRACE_GETWMMXREGS 18
44 # define PTRACE_SETWMMXREGS 19
45 #endif
46
47 #ifndef PTRACE_GETVFPREGS
48 # define PTRACE_GETVFPREGS 27
49 # define PTRACE_SETVFPREGS 28
50 #endif
51
52 #ifndef PTRACE_GETHBPREGS
53 #define PTRACE_GETHBPREGS 29
54 #define PTRACE_SETHBPREGS 30
55 #endif
56
57 /* Linux target op definitions for the ARM architecture. */
58
59 class arm_target : public linux_process_target
60 {
61 public:
62
63 const regs_info *get_regs_info () override;
64
65 protected:
66
67 void low_arch_setup () override;
68
69 bool low_cannot_fetch_register (int regno) override;
70
71 bool low_cannot_store_register (int regno) override;
72 };
73
74 /* The singleton target ops object. */
75
76 static arm_target the_arm_target;
77
78 /* Information describing the hardware breakpoint capabilities. */
79 static struct
80 {
81 unsigned char arch;
82 unsigned char max_wp_length;
83 unsigned char wp_count;
84 unsigned char bp_count;
85 } arm_linux_hwbp_cap;
86
87 /* Enum describing the different types of ARM hardware break-/watch-points. */
88 typedef enum
89 {
90 arm_hwbp_break = 0,
91 arm_hwbp_load = 1,
92 arm_hwbp_store = 2,
93 arm_hwbp_access = 3
94 } arm_hwbp_type;
95
96 /* Type describing an ARM Hardware Breakpoint Control register value. */
97 typedef unsigned int arm_hwbp_control_t;
98
99 /* Structure used to keep track of hardware break-/watch-points. */
100 struct arm_linux_hw_breakpoint
101 {
102 /* Address to break on, or being watched. */
103 unsigned int address;
104 /* Control register for break-/watch- point. */
105 arm_hwbp_control_t control;
106 };
107
108 /* Since we cannot dynamically allocate subfields of arch_process_info,
109 assume a maximum number of supported break-/watchpoints. */
110 #define MAX_BPTS 32
111 #define MAX_WPTS 32
112
113 /* Per-process arch-specific data we want to keep. */
114 struct arch_process_info
115 {
116 /* Hardware breakpoints for this process. */
117 struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
118 /* Hardware watchpoints for this process. */
119 struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
120 };
121
122 /* Per-thread arch-specific data we want to keep. */
123 struct arch_lwp_info
124 {
125 /* Non-zero if our copy differs from what's recorded in the thread. */
126 char bpts_changed[MAX_BPTS];
127 char wpts_changed[MAX_WPTS];
128 /* Cached stopped data address. */
129 CORE_ADDR stopped_data_address;
130 };
131
132 /* These are in <asm/elf.h> in current kernels. */
133 #define HWCAP_VFP 64
134 #define HWCAP_IWMMXT 512
135 #define HWCAP_NEON 4096
136 #define HWCAP_VFPv3 8192
137 #define HWCAP_VFPv3D16 16384
138
139 #ifdef HAVE_SYS_REG_H
140 #include <sys/reg.h>
141 #endif
142
143 #define arm_num_regs 26
144
145 static int arm_regmap[] = {
146 0, 4, 8, 12, 16, 20, 24, 28,
147 32, 36, 40, 44, 48, 52, 56, 60,
148 -1, -1, -1, -1, -1, -1, -1, -1, -1,
149 64
150 };
151
152 /* Forward declarations needed for get_next_pcs ops. */
153 static ULONGEST get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
154 int len,
155 int byte_order);
156
157 static CORE_ADDR get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self,
158 CORE_ADDR val);
159
160 static CORE_ADDR get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self);
161
162 static int get_next_pcs_is_thumb (struct arm_get_next_pcs *self);
163
164 /* get_next_pcs operations. */
165 static struct arm_get_next_pcs_ops get_next_pcs_ops = {
166 get_next_pcs_read_memory_unsigned_integer,
167 get_next_pcs_syscall_next_pc,
168 get_next_pcs_addr_bits_remove,
169 get_next_pcs_is_thumb,
170 arm_linux_get_next_pcs_fixup,
171 };
172
173 bool
174 arm_target::low_cannot_store_register (int regno)
175 {
176 return (regno >= arm_num_regs);
177 }
178
179 bool
180 arm_target::low_cannot_fetch_register (int regno)
181 {
182 return (regno >= arm_num_regs);
183 }
184
185 static void
186 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
187 {
188 if (arm_linux_get_tdesc_fp_type (regcache->tdesc) != ARM_FP_TYPE_IWMMXT)
189 return;
190
191 for (int i = 0; i < 16; i++)
192 collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
193
194 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
195 for (int i = 0; i < 6; i++)
196 collect_register (regcache, arm_num_regs + i + 16,
197 (char *) buf + 16 * 8 + i * 4);
198 }
199
200 static void
201 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
202 {
203 if (arm_linux_get_tdesc_fp_type (regcache->tdesc) != ARM_FP_TYPE_IWMMXT)
204 return;
205
206 for (int i = 0; i < 16; i++)
207 supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
208
209 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
210 for (int i = 0; i < 6; i++)
211 supply_register (regcache, arm_num_regs + i + 16,
212 (char *) buf + 16 * 8 + i * 4);
213 }
214
215 static void
216 arm_fill_vfpregset (struct regcache *regcache, void *buf)
217 {
218 int num;
219
220 if (is_aarch32_linux_description (regcache->tdesc))
221 num = 32;
222 else
223 {
224 arm_fp_type fp_type = arm_linux_get_tdesc_fp_type (regcache->tdesc);
225
226 if (fp_type == ARM_FP_TYPE_VFPV3)
227 num = 32;
228 else if (fp_type == ARM_FP_TYPE_VFPV2)
229 num = 16;
230 else
231 return;
232 }
233
234 arm_fill_vfpregset_num (regcache, buf, num);
235 }
236
237 /* Wrapper of UNMAKE_THUMB_ADDR for get_next_pcs. */
238 static CORE_ADDR
239 get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self, CORE_ADDR val)
240 {
241 return UNMAKE_THUMB_ADDR (val);
242 }
243
244 static void
245 arm_store_vfpregset (struct regcache *regcache, const void *buf)
246 {
247 int num;
248
249 if (is_aarch32_linux_description (regcache->tdesc))
250 num = 32;
251 else
252 {
253 arm_fp_type fp_type = arm_linux_get_tdesc_fp_type (regcache->tdesc);
254
255 if (fp_type == ARM_FP_TYPE_VFPV3)
256 num = 32;
257 else if (fp_type == ARM_FP_TYPE_VFPV2)
258 num = 16;
259 else
260 return;
261 }
262
263 arm_store_vfpregset_num (regcache, buf, num);
264 }
265
266 /* Wrapper of arm_is_thumb_mode for get_next_pcs. */
267 static int
268 get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
269 {
270 return arm_is_thumb_mode ();
271 }
272
273 /* Read memory from the inferior.
274 BYTE_ORDER is ignored and there to keep compatiblity with GDB's
275 read_memory_unsigned_integer. */
276 static ULONGEST
277 get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
278 int len,
279 int byte_order)
280 {
281 ULONGEST res;
282
283 res = 0;
284 target_read_memory (memaddr, (unsigned char *) &res, len);
285
286 return res;
287 }
288
289 /* Fetch the thread-local storage pointer for libthread_db. */
290
291 ps_err_e
292 ps_get_thread_area (struct ps_prochandle *ph,
293 lwpid_t lwpid, int idx, void **base)
294 {
295 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
296 return PS_ERR;
297
298 /* IDX is the bias from the thread pointer to the beginning of the
299 thread descriptor. It has to be subtracted due to implementation
300 quirks in libthread_db. */
301 *base = (void *) ((char *)*base - idx);
302
303 return PS_OK;
304 }
305
306
307 /* Query Hardware Breakpoint information for the target we are attached to
308 (using PID as ptrace argument) and set up arm_linux_hwbp_cap. */
309 static void
310 arm_linux_init_hwbp_cap (int pid)
311 {
312 unsigned int val;
313
314 if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
315 return;
316
317 arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
318 if (arm_linux_hwbp_cap.arch == 0)
319 return;
320
321 arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
322 arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
323 arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
324
325 if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
326 internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
327 if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
328 internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
329 }
330
331 /* How many hardware breakpoints are available? */
332 static int
333 arm_linux_get_hw_breakpoint_count (void)
334 {
335 return arm_linux_hwbp_cap.bp_count;
336 }
337
338 /* How many hardware watchpoints are available? */
339 static int
340 arm_linux_get_hw_watchpoint_count (void)
341 {
342 return arm_linux_hwbp_cap.wp_count;
343 }
344
345 /* Maximum length of area watched by hardware watchpoint. */
346 static int
347 arm_linux_get_hw_watchpoint_max_length (void)
348 {
349 return arm_linux_hwbp_cap.max_wp_length;
350 }
351
352 /* Initialize an ARM hardware break-/watch-point control register value.
353 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
354 type of break-/watch-point; ENABLE indicates whether the point is enabled.
355 */
356 static arm_hwbp_control_t
357 arm_hwbp_control_initialize (unsigned byte_address_select,
358 arm_hwbp_type hwbp_type,
359 int enable)
360 {
361 gdb_assert ((byte_address_select & ~0xffU) == 0);
362 gdb_assert (hwbp_type != arm_hwbp_break
363 || ((byte_address_select & 0xfU) != 0));
364
365 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
366 }
367
368 /* Does the breakpoint control value CONTROL have the enable bit set? */
369 static int
370 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
371 {
372 return control & 0x1;
373 }
374
375 /* Is the breakpoint control value CONTROL initialized? */
376 static int
377 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
378 {
379 return control != 0;
380 }
381
382 /* Change a breakpoint control word so that it is in the disabled state. */
383 static arm_hwbp_control_t
384 arm_hwbp_control_disable (arm_hwbp_control_t control)
385 {
386 return control & ~0x1;
387 }
388
389 /* Are two break-/watch-points equal? */
390 static int
391 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
392 const struct arm_linux_hw_breakpoint *p2)
393 {
394 return p1->address == p2->address && p1->control == p2->control;
395 }
396
397 /* Convert a raw breakpoint type to an enum arm_hwbp_type. */
398
399 static arm_hwbp_type
400 raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
401 {
402 switch (raw_type)
403 {
404 case raw_bkpt_type_hw:
405 return arm_hwbp_break;
406 case raw_bkpt_type_write_wp:
407 return arm_hwbp_store;
408 case raw_bkpt_type_read_wp:
409 return arm_hwbp_load;
410 case raw_bkpt_type_access_wp:
411 return arm_hwbp_access;
412 default:
413 gdb_assert_not_reached ("unhandled raw type");
414 }
415 }
416
417 /* Initialize the hardware breakpoint structure P for a breakpoint or
418 watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE.
419 Returns -1 if TYPE is unsupported, or -2 if the particular combination
420 of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE
421 represents a breakpoint and 1 if type represents a watchpoint. */
422 static int
423 arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
424 int len, struct arm_linux_hw_breakpoint *p)
425 {
426 arm_hwbp_type hwbp_type;
427 unsigned mask;
428
429 hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
430
431 if (hwbp_type == arm_hwbp_break)
432 {
433 /* For breakpoints, the length field encodes the mode. */
434 switch (len)
435 {
436 case 2: /* 16-bit Thumb mode breakpoint */
437 case 3: /* 32-bit Thumb mode breakpoint */
438 mask = 0x3;
439 addr &= ~1;
440 break;
441 case 4: /* 32-bit ARM mode breakpoint */
442 mask = 0xf;
443 addr &= ~3;
444 break;
445 default:
446 /* Unsupported. */
447 return -2;
448 }
449 }
450 else
451 {
452 CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
453 CORE_ADDR aligned_addr;
454
455 /* Can not set watchpoints for zero or negative lengths. */
456 if (len <= 0)
457 return -2;
458 /* The current ptrace interface can only handle watchpoints that are a
459 power of 2. */
460 if ((len & (len - 1)) != 0)
461 return -2;
462
463 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
464 range covered by a watchpoint. */
465 aligned_addr = addr & ~(max_wp_length - 1);
466 if (aligned_addr + max_wp_length < addr + len)
467 return -2;
468
469 mask = (1 << len) - 1;
470 }
471
472 p->address = (unsigned int) addr;
473 p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
474
475 return hwbp_type != arm_hwbp_break;
476 }
477
478 /* Callback to mark a watch-/breakpoint to be updated in all threads of
479 the current process. */
480
481 static void
482 update_registers_callback (thread_info *thread, int watch, int i)
483 {
484 struct lwp_info *lwp = get_thread_lwp (thread);
485
486 /* The actual update is done later just before resuming the lwp,
487 we just mark that the registers need updating. */
488 if (watch)
489 lwp->arch_private->wpts_changed[i] = 1;
490 else
491 lwp->arch_private->bpts_changed[i] = 1;
492
493 /* If the lwp isn't stopped, force it to momentarily pause, so
494 we can update its breakpoint registers. */
495 if (!lwp->stopped)
496 linux_stop_lwp (lwp);
497 }
498
499 static int
500 arm_supports_z_point_type (char z_type)
501 {
502 switch (z_type)
503 {
504 case Z_PACKET_SW_BP:
505 case Z_PACKET_HW_BP:
506 case Z_PACKET_WRITE_WP:
507 case Z_PACKET_READ_WP:
508 case Z_PACKET_ACCESS_WP:
509 return 1;
510 default:
511 /* Leave the handling of sw breakpoints with the gdb client. */
512 return 0;
513 }
514 }
515
516 /* Insert hardware break-/watchpoint. */
517 static int
518 arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
519 int len, struct raw_breakpoint *bp)
520 {
521 struct process_info *proc = current_process ();
522 struct arm_linux_hw_breakpoint p, *pts;
523 int watch, i, count;
524
525 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
526 if (watch < 0)
527 {
528 /* Unsupported. */
529 return watch == -1 ? 1 : -1;
530 }
531
532 if (watch)
533 {
534 count = arm_linux_get_hw_watchpoint_count ();
535 pts = proc->priv->arch_private->wpts;
536 }
537 else
538 {
539 count = arm_linux_get_hw_breakpoint_count ();
540 pts = proc->priv->arch_private->bpts;
541 }
542
543 for (i = 0; i < count; i++)
544 if (!arm_hwbp_control_is_enabled (pts[i].control))
545 {
546 pts[i] = p;
547
548 /* Only update the threads of the current process. */
549 for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
550 {
551 update_registers_callback (thread, watch, i);
552 });
553
554 return 0;
555 }
556
557 /* We're out of watchpoints. */
558 return -1;
559 }
560
561 /* Remove hardware break-/watchpoint. */
562 static int
563 arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
564 int len, struct raw_breakpoint *bp)
565 {
566 struct process_info *proc = current_process ();
567 struct arm_linux_hw_breakpoint p, *pts;
568 int watch, i, count;
569
570 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
571 if (watch < 0)
572 {
573 /* Unsupported. */
574 return -1;
575 }
576
577 if (watch)
578 {
579 count = arm_linux_get_hw_watchpoint_count ();
580 pts = proc->priv->arch_private->wpts;
581 }
582 else
583 {
584 count = arm_linux_get_hw_breakpoint_count ();
585 pts = proc->priv->arch_private->bpts;
586 }
587
588 for (i = 0; i < count; i++)
589 if (arm_linux_hw_breakpoint_equal (&p, pts + i))
590 {
591 pts[i].control = arm_hwbp_control_disable (pts[i].control);
592
593 /* Only update the threads of the current process. */
594 for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
595 {
596 update_registers_callback (thread, watch, i);
597 });
598
599 return 0;
600 }
601
602 /* No watchpoint matched. */
603 return -1;
604 }
605
606 /* Return whether current thread is stopped due to a watchpoint. */
607 static int
608 arm_stopped_by_watchpoint (void)
609 {
610 struct lwp_info *lwp = get_thread_lwp (current_thread);
611 siginfo_t siginfo;
612
613 /* We must be able to set hardware watchpoints. */
614 if (arm_linux_get_hw_watchpoint_count () == 0)
615 return 0;
616
617 /* Retrieve siginfo. */
618 errno = 0;
619 ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
620 if (errno != 0)
621 return 0;
622
623 /* This must be a hardware breakpoint. */
624 if (siginfo.si_signo != SIGTRAP
625 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
626 return 0;
627
628 /* If we are in a positive slot then we're looking at a breakpoint and not
629 a watchpoint. */
630 if (siginfo.si_errno >= 0)
631 return 0;
632
633 /* Cache stopped data address for use by arm_stopped_data_address. */
634 lwp->arch_private->stopped_data_address
635 = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
636
637 return 1;
638 }
639
640 /* Return data address that triggered watchpoint. Called only if
641 arm_stopped_by_watchpoint returned true. */
642 static CORE_ADDR
643 arm_stopped_data_address (void)
644 {
645 struct lwp_info *lwp = get_thread_lwp (current_thread);
646 return lwp->arch_private->stopped_data_address;
647 }
648
649 /* Called when a new process is created. */
650 static struct arch_process_info *
651 arm_new_process (void)
652 {
653 struct arch_process_info *info = XCNEW (struct arch_process_info);
654 return info;
655 }
656
657 /* Called when a process is being deleted. */
658
659 static void
660 arm_delete_process (struct arch_process_info *info)
661 {
662 xfree (info);
663 }
664
665 /* Called when a new thread is detected. */
666 static void
667 arm_new_thread (struct lwp_info *lwp)
668 {
669 struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
670 int i;
671
672 for (i = 0; i < MAX_BPTS; i++)
673 info->bpts_changed[i] = 1;
674 for (i = 0; i < MAX_WPTS; i++)
675 info->wpts_changed[i] = 1;
676
677 lwp->arch_private = info;
678 }
679
680 /* Function to call when a thread is being deleted. */
681
682 static void
683 arm_delete_thread (struct arch_lwp_info *arch_lwp)
684 {
685 xfree (arch_lwp);
686 }
687
688 static void
689 arm_new_fork (struct process_info *parent, struct process_info *child)
690 {
691 struct arch_process_info *parent_proc_info;
692 struct arch_process_info *child_proc_info;
693 struct lwp_info *child_lwp;
694 struct arch_lwp_info *child_lwp_info;
695 int i;
696
697 /* These are allocated by linux_add_process. */
698 gdb_assert (parent->priv != NULL
699 && parent->priv->arch_private != NULL);
700 gdb_assert (child->priv != NULL
701 && child->priv->arch_private != NULL);
702
703 parent_proc_info = parent->priv->arch_private;
704 child_proc_info = child->priv->arch_private;
705
706 /* Linux kernel before 2.6.33 commit
707 72f674d203cd230426437cdcf7dd6f681dad8b0d
708 will inherit hardware debug registers from parent
709 on fork/vfork/clone. Newer Linux kernels create such tasks with
710 zeroed debug registers.
711
712 GDB core assumes the child inherits the watchpoints/hw
713 breakpoints of the parent, and will remove them all from the
714 forked off process. Copy the debug registers mirrors into the
715 new process so that all breakpoints and watchpoints can be
716 removed together. The debug registers mirror will become zeroed
717 in the end before detaching the forked off process, thus making
718 this compatible with older Linux kernels too. */
719
720 *child_proc_info = *parent_proc_info;
721
722 /* Mark all the hardware breakpoints and watchpoints as changed to
723 make sure that the registers will be updated. */
724 child_lwp = find_lwp_pid (ptid_t (child->pid));
725 child_lwp_info = child_lwp->arch_private;
726 for (i = 0; i < MAX_BPTS; i++)
727 child_lwp_info->bpts_changed[i] = 1;
728 for (i = 0; i < MAX_WPTS; i++)
729 child_lwp_info->wpts_changed[i] = 1;
730 }
731
732 /* Called when resuming a thread.
733 If the debug regs have changed, update the thread's copies. */
734 static void
735 arm_prepare_to_resume (struct lwp_info *lwp)
736 {
737 struct thread_info *thread = get_lwp_thread (lwp);
738 int pid = lwpid_of (thread);
739 struct process_info *proc = find_process_pid (pid_of (thread));
740 struct arch_process_info *proc_info = proc->priv->arch_private;
741 struct arch_lwp_info *lwp_info = lwp->arch_private;
742 int i;
743
744 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
745 if (lwp_info->bpts_changed[i])
746 {
747 errno = 0;
748
749 if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
750 if (ptrace (PTRACE_SETHBPREGS, pid,
751 (PTRACE_TYPE_ARG3) ((i << 1) + 1),
752 &proc_info->bpts[i].address) < 0)
753 perror_with_name ("Unexpected error setting breakpoint address");
754
755 if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
756 if (ptrace (PTRACE_SETHBPREGS, pid,
757 (PTRACE_TYPE_ARG3) ((i << 1) + 2),
758 &proc_info->bpts[i].control) < 0)
759 perror_with_name ("Unexpected error setting breakpoint");
760
761 lwp_info->bpts_changed[i] = 0;
762 }
763
764 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
765 if (lwp_info->wpts_changed[i])
766 {
767 errno = 0;
768
769 if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
770 if (ptrace (PTRACE_SETHBPREGS, pid,
771 (PTRACE_TYPE_ARG3) -((i << 1) + 1),
772 &proc_info->wpts[i].address) < 0)
773 perror_with_name ("Unexpected error setting watchpoint address");
774
775 if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
776 if (ptrace (PTRACE_SETHBPREGS, pid,
777 (PTRACE_TYPE_ARG3) -((i << 1) + 2),
778 &proc_info->wpts[i].control) < 0)
779 perror_with_name ("Unexpected error setting watchpoint");
780
781 lwp_info->wpts_changed[i] = 0;
782 }
783 }
784
785 /* Find the next pc for a sigreturn or rt_sigreturn syscall. In
786 addition, set IS_THUMB depending on whether we will return to ARM
787 or Thumb code.
788 See arm-linux.h for stack layout details. */
789 static CORE_ADDR
790 arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
791 int *is_thumb)
792 {
793 unsigned long sp;
794 unsigned long sp_data;
795 /* Offset of PC register. */
796 int pc_offset = 0;
797 CORE_ADDR next_pc = 0;
798 uint32_t cpsr;
799
800 gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
801
802 collect_register_by_name (regcache, "sp", &sp);
803 the_target->read_memory (sp, (unsigned char *) &sp_data, 4);
804
805 pc_offset = arm_linux_sigreturn_next_pc_offset
806 (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
807
808 the_target->read_memory (sp + pc_offset, (unsigned char *) &next_pc, 4);
809
810 /* Set IS_THUMB according the CPSR saved on the stack. */
811 the_target->read_memory (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
812 *is_thumb = ((cpsr & CPSR_T) != 0);
813
814 return next_pc;
815 }
816
817 /* When PC is at a syscall instruction, return the PC of the next
818 instruction to be executed. */
819 static CORE_ADDR
820 get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self)
821 {
822 CORE_ADDR next_pc = 0;
823 CORE_ADDR pc = regcache_read_pc (self->regcache);
824 int is_thumb = arm_is_thumb_mode ();
825 ULONGEST svc_number = 0;
826 struct regcache *regcache = self->regcache;
827
828 if (is_thumb)
829 {
830 collect_register (regcache, 7, &svc_number);
831 next_pc = pc + 2;
832 }
833 else
834 {
835 unsigned long this_instr;
836 unsigned long svc_operand;
837
838 target_read_memory (pc, (unsigned char *) &this_instr, 4);
839 svc_operand = (0x00ffffff & this_instr);
840
841 if (svc_operand) /* OABI. */
842 {
843 svc_number = svc_operand - 0x900000;
844 }
845 else /* EABI. */
846 {
847 collect_register (regcache, 7, &svc_number);
848 }
849
850 next_pc = pc + 4;
851 }
852
853 /* This is a sigreturn or sigreturn_rt syscall. */
854 if (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn)
855 {
856 /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
857 update IS_THUMB. */
858 next_pc = arm_sigreturn_next_pc (regcache, svc_number, &is_thumb);
859 }
860
861 /* Addresses for calling Thumb functions have the bit 0 set. */
862 if (is_thumb)
863 next_pc = MAKE_THUMB_ADDR (next_pc);
864
865 return next_pc;
866 }
867
868 static const struct target_desc *
869 arm_read_description (void)
870 {
871 unsigned long arm_hwcap = linux_get_hwcap (4);
872
873 if (arm_hwcap & HWCAP_IWMMXT)
874 return arm_linux_read_description (ARM_FP_TYPE_IWMMXT);
875
876 if (arm_hwcap & HWCAP_VFP)
877 {
878 /* Make sure that the kernel supports reading VFP registers. Support was
879 added in 2.6.30. */
880 int pid = lwpid_of (current_thread);
881 errno = 0;
882 char *buf = (char *) alloca (ARM_VFP3_REGS_SIZE);
883 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO)
884 return arm_linux_read_description (ARM_FP_TYPE_NONE);
885
886 /* NEON implies either no VFP, or VFPv3-D32. We only support
887 it with VFP. */
888 if (arm_hwcap & HWCAP_NEON)
889 return aarch32_linux_read_description ();
890 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
891 return arm_linux_read_description (ARM_FP_TYPE_VFPV3);
892 else
893 return arm_linux_read_description (ARM_FP_TYPE_VFPV2);
894 }
895
896 /* The default configuration uses legacy FPA registers, probably
897 simulated. */
898 return arm_linux_read_description (ARM_FP_TYPE_NONE);
899 }
900
901 void
902 arm_target::low_arch_setup ()
903 {
904 int tid = lwpid_of (current_thread);
905 int gpregs[18];
906 struct iovec iov;
907
908 /* Query hardware watchpoint/breakpoint capabilities. */
909 arm_linux_init_hwbp_cap (tid);
910
911 current_process ()->tdesc = arm_read_description ();
912
913 iov.iov_base = gpregs;
914 iov.iov_len = sizeof (gpregs);
915
916 /* Check if PTRACE_GETREGSET works. */
917 if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0)
918 have_ptrace_getregset = 1;
919 else
920 have_ptrace_getregset = 0;
921 }
922
923 /* Fetch the next possible PCs after the current instruction executes. */
924
925 static std::vector<CORE_ADDR>
926 arm_gdbserver_get_next_pcs (struct regcache *regcache)
927 {
928 struct arm_get_next_pcs next_pcs_ctx;
929
930 arm_get_next_pcs_ctor (&next_pcs_ctx,
931 &get_next_pcs_ops,
932 /* Byte order is ignored assumed as host. */
933 0,
934 0,
935 1,
936 regcache);
937
938 return arm_get_next_pcs (&next_pcs_ctx);
939 }
940
941 /* Support for hardware single step. */
942
943 static int
944 arm_supports_hardware_single_step (void)
945 {
946 return 0;
947 }
948
949 /* Implementation of linux_target_ops method "get_syscall_trapinfo". */
950
951 static void
952 arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
953 {
954 if (arm_is_thumb_mode ())
955 collect_register_by_name (regcache, "r7", sysno);
956 else
957 {
958 unsigned long pc;
959 unsigned long insn;
960
961 collect_register_by_name (regcache, "pc", &pc);
962
963 if (the_target->read_memory (pc - 4, (unsigned char *) &insn, 4))
964 *sysno = UNKNOWN_SYSCALL;
965 else
966 {
967 unsigned long svc_operand = (0x00ffffff & insn);
968
969 if (svc_operand)
970 {
971 /* OABI */
972 *sysno = svc_operand - 0x900000;
973 }
974 else
975 {
976 /* EABI */
977 collect_register_by_name (regcache, "r7", sysno);
978 }
979 }
980 }
981 }
982
983 /* Register sets without using PTRACE_GETREGSET. */
984
985 static struct regset_info arm_regsets[] = {
986 { PTRACE_GETREGS, PTRACE_SETREGS, 0,
987 ARM_CORE_REGS_SIZE + ARM_INT_REGISTER_SIZE, GENERAL_REGS,
988 arm_fill_gregset, arm_store_gregset },
989 { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, IWMMXT_REGS_SIZE, EXTENDED_REGS,
990 arm_fill_wmmxregset, arm_store_wmmxregset },
991 { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, ARM_VFP3_REGS_SIZE, EXTENDED_REGS,
992 arm_fill_vfpregset, arm_store_vfpregset },
993 NULL_REGSET
994 };
995
996 static struct regsets_info arm_regsets_info =
997 {
998 arm_regsets, /* regsets */
999 0, /* num_regsets */
1000 NULL, /* disabled_regsets */
1001 };
1002
1003 static struct usrregs_info arm_usrregs_info =
1004 {
1005 arm_num_regs,
1006 arm_regmap,
1007 };
1008
1009 static struct regs_info regs_info_arm =
1010 {
1011 NULL, /* regset_bitmap */
1012 &arm_usrregs_info,
1013 &arm_regsets_info
1014 };
1015
1016 const regs_info *
1017 arm_target::get_regs_info ()
1018 {
1019 const struct target_desc *tdesc = current_process ()->tdesc;
1020
1021 if (have_ptrace_getregset == 1
1022 && (is_aarch32_linux_description (tdesc)
1023 || arm_linux_get_tdesc_fp_type (tdesc) == ARM_FP_TYPE_VFPV3))
1024 return &regs_info_aarch32;
1025
1026 return &regs_info_arm;
1027 }
1028
1029 struct linux_target_ops the_low_target = {
1030 linux_get_pc_32bit,
1031 linux_set_pc_32bit,
1032 arm_breakpoint_kind_from_pc,
1033 arm_sw_breakpoint_from_kind,
1034 arm_gdbserver_get_next_pcs,
1035 0,
1036 arm_breakpoint_at,
1037 arm_supports_z_point_type,
1038 arm_insert_point,
1039 arm_remove_point,
1040 arm_stopped_by_watchpoint,
1041 arm_stopped_data_address,
1042 NULL, /* collect_ptrace_register */
1043 NULL, /* supply_ptrace_register */
1044 NULL, /* siginfo_fixup */
1045 arm_new_process,
1046 arm_delete_process,
1047 arm_new_thread,
1048 arm_delete_thread,
1049 arm_new_fork,
1050 arm_prepare_to_resume,
1051 NULL, /* process_qsupported */
1052 NULL, /* supports_tracepoints */
1053 NULL, /* get_thread_area */
1054 NULL, /* install_fast_tracepoint_jump_pad */
1055 NULL, /* emit_ops */
1056 NULL, /* get_min_fast_tracepoint_insn_len */
1057 NULL, /* supports_range_stepping */
1058 arm_breakpoint_kind_from_current_state,
1059 arm_supports_hardware_single_step,
1060 arm_get_syscall_trapinfo,
1061 };
1062
1063 /* The linux target ops object. */
1064
1065 linux_process_target *the_linux_target = &the_arm_target;
1066
1067 void
1068 initialize_low_arch (void)
1069 {
1070 initialize_low_arch_aarch32 ();
1071 initialize_regsets_info (&arm_regsets_info);
1072 }
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