gdbserver/linux-low: turn 'supports_software_single_step' and 'get_next_pcs' into...
[deliverable/binutils-gdb.git] / gdbserver / linux-arm-low.cc
1 /* GNU/Linux/ARM specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2020 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19 #include "server.h"
20 #include "linux-low.h"
21 #include "arch/arm.h"
22 #include "arch/arm-linux.h"
23 #include "arch/arm-get-next-pcs.h"
24 #include "linux-aarch32-low.h"
25 #include "linux-aarch32-tdesc.h"
26 #include "linux-arm-tdesc.h"
27
28 #include <sys/uio.h>
29 /* Don't include elf.h if linux/elf.h got included by gdb_proc_service.h.
30 On Bionic elf.h and linux/elf.h have conflicting definitions. */
31 #ifndef ELFMAG0
32 #include <elf.h>
33 #endif
34 #include "nat/gdb_ptrace.h"
35 #include <signal.h>
36 #include <sys/syscall.h>
37
38 #ifndef PTRACE_GET_THREAD_AREA
39 #define PTRACE_GET_THREAD_AREA 22
40 #endif
41
42 #ifndef PTRACE_GETWMMXREGS
43 # define PTRACE_GETWMMXREGS 18
44 # define PTRACE_SETWMMXREGS 19
45 #endif
46
47 #ifndef PTRACE_GETVFPREGS
48 # define PTRACE_GETVFPREGS 27
49 # define PTRACE_SETVFPREGS 28
50 #endif
51
52 #ifndef PTRACE_GETHBPREGS
53 #define PTRACE_GETHBPREGS 29
54 #define PTRACE_SETHBPREGS 30
55 #endif
56
57 /* Linux target op definitions for the ARM architecture. */
58
59 class arm_target : public linux_process_target
60 {
61 public:
62
63 const regs_info *get_regs_info () override;
64
65 int breakpoint_kind_from_pc (CORE_ADDR *pcptr) override;
66
67 int breakpoint_kind_from_current_state (CORE_ADDR *pcptr) override;
68
69 const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
70
71 bool supports_software_single_step () override;
72
73 protected:
74
75 void low_arch_setup () override;
76
77 bool low_cannot_fetch_register (int regno) override;
78
79 bool low_cannot_store_register (int regno) override;
80
81 bool low_supports_breakpoints () override;
82
83 CORE_ADDR low_get_pc (regcache *regcache) override;
84
85 void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
86
87 std::vector<CORE_ADDR> low_get_next_pcs (regcache *regcache) override;
88 };
89
90 /* The singleton target ops object. */
91
92 static arm_target the_arm_target;
93
94 bool
95 arm_target::low_supports_breakpoints ()
96 {
97 return true;
98 }
99
100 CORE_ADDR
101 arm_target::low_get_pc (regcache *regcache)
102 {
103 return linux_get_pc_32bit (regcache);
104 }
105
106 void
107 arm_target::low_set_pc (regcache *regcache, CORE_ADDR pc)
108 {
109 linux_set_pc_32bit (regcache, pc);
110 }
111
112 int
113 arm_target::breakpoint_kind_from_pc (CORE_ADDR *pcptr)
114 {
115 return arm_breakpoint_kind_from_pc (pcptr);
116 }
117
118 int
119 arm_target::breakpoint_kind_from_current_state (CORE_ADDR *pcptr)
120 {
121 return arm_breakpoint_kind_from_current_state (pcptr);
122 }
123
124 const gdb_byte *
125 arm_target::sw_breakpoint_from_kind (int kind, int *size)
126 {
127 return arm_sw_breakpoint_from_kind (kind, size);
128 }
129
130 /* Information describing the hardware breakpoint capabilities. */
131 static struct
132 {
133 unsigned char arch;
134 unsigned char max_wp_length;
135 unsigned char wp_count;
136 unsigned char bp_count;
137 } arm_linux_hwbp_cap;
138
139 /* Enum describing the different types of ARM hardware break-/watch-points. */
140 typedef enum
141 {
142 arm_hwbp_break = 0,
143 arm_hwbp_load = 1,
144 arm_hwbp_store = 2,
145 arm_hwbp_access = 3
146 } arm_hwbp_type;
147
148 /* Type describing an ARM Hardware Breakpoint Control register value. */
149 typedef unsigned int arm_hwbp_control_t;
150
151 /* Structure used to keep track of hardware break-/watch-points. */
152 struct arm_linux_hw_breakpoint
153 {
154 /* Address to break on, or being watched. */
155 unsigned int address;
156 /* Control register for break-/watch- point. */
157 arm_hwbp_control_t control;
158 };
159
160 /* Since we cannot dynamically allocate subfields of arch_process_info,
161 assume a maximum number of supported break-/watchpoints. */
162 #define MAX_BPTS 32
163 #define MAX_WPTS 32
164
165 /* Per-process arch-specific data we want to keep. */
166 struct arch_process_info
167 {
168 /* Hardware breakpoints for this process. */
169 struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
170 /* Hardware watchpoints for this process. */
171 struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
172 };
173
174 /* Per-thread arch-specific data we want to keep. */
175 struct arch_lwp_info
176 {
177 /* Non-zero if our copy differs from what's recorded in the thread. */
178 char bpts_changed[MAX_BPTS];
179 char wpts_changed[MAX_WPTS];
180 /* Cached stopped data address. */
181 CORE_ADDR stopped_data_address;
182 };
183
184 /* These are in <asm/elf.h> in current kernels. */
185 #define HWCAP_VFP 64
186 #define HWCAP_IWMMXT 512
187 #define HWCAP_NEON 4096
188 #define HWCAP_VFPv3 8192
189 #define HWCAP_VFPv3D16 16384
190
191 #ifdef HAVE_SYS_REG_H
192 #include <sys/reg.h>
193 #endif
194
195 #define arm_num_regs 26
196
197 static int arm_regmap[] = {
198 0, 4, 8, 12, 16, 20, 24, 28,
199 32, 36, 40, 44, 48, 52, 56, 60,
200 -1, -1, -1, -1, -1, -1, -1, -1, -1,
201 64
202 };
203
204 /* Forward declarations needed for get_next_pcs ops. */
205 static ULONGEST get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
206 int len,
207 int byte_order);
208
209 static CORE_ADDR get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self,
210 CORE_ADDR val);
211
212 static CORE_ADDR get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self);
213
214 static int get_next_pcs_is_thumb (struct arm_get_next_pcs *self);
215
216 /* get_next_pcs operations. */
217 static struct arm_get_next_pcs_ops get_next_pcs_ops = {
218 get_next_pcs_read_memory_unsigned_integer,
219 get_next_pcs_syscall_next_pc,
220 get_next_pcs_addr_bits_remove,
221 get_next_pcs_is_thumb,
222 arm_linux_get_next_pcs_fixup,
223 };
224
225 bool
226 arm_target::low_cannot_store_register (int regno)
227 {
228 return (regno >= arm_num_regs);
229 }
230
231 bool
232 arm_target::low_cannot_fetch_register (int regno)
233 {
234 return (regno >= arm_num_regs);
235 }
236
237 static void
238 arm_fill_wmmxregset (struct regcache *regcache, void *buf)
239 {
240 if (arm_linux_get_tdesc_fp_type (regcache->tdesc) != ARM_FP_TYPE_IWMMXT)
241 return;
242
243 for (int i = 0; i < 16; i++)
244 collect_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
245
246 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
247 for (int i = 0; i < 6; i++)
248 collect_register (regcache, arm_num_regs + i + 16,
249 (char *) buf + 16 * 8 + i * 4);
250 }
251
252 static void
253 arm_store_wmmxregset (struct regcache *regcache, const void *buf)
254 {
255 if (arm_linux_get_tdesc_fp_type (regcache->tdesc) != ARM_FP_TYPE_IWMMXT)
256 return;
257
258 for (int i = 0; i < 16; i++)
259 supply_register (regcache, arm_num_regs + i, (char *) buf + i * 8);
260
261 /* We only have access to wcssf, wcasf, and wcgr0-wcgr3. */
262 for (int i = 0; i < 6; i++)
263 supply_register (regcache, arm_num_regs + i + 16,
264 (char *) buf + 16 * 8 + i * 4);
265 }
266
267 static void
268 arm_fill_vfpregset (struct regcache *regcache, void *buf)
269 {
270 int num;
271
272 if (is_aarch32_linux_description (regcache->tdesc))
273 num = 32;
274 else
275 {
276 arm_fp_type fp_type = arm_linux_get_tdesc_fp_type (regcache->tdesc);
277
278 if (fp_type == ARM_FP_TYPE_VFPV3)
279 num = 32;
280 else if (fp_type == ARM_FP_TYPE_VFPV2)
281 num = 16;
282 else
283 return;
284 }
285
286 arm_fill_vfpregset_num (regcache, buf, num);
287 }
288
289 /* Wrapper of UNMAKE_THUMB_ADDR for get_next_pcs. */
290 static CORE_ADDR
291 get_next_pcs_addr_bits_remove (struct arm_get_next_pcs *self, CORE_ADDR val)
292 {
293 return UNMAKE_THUMB_ADDR (val);
294 }
295
296 static void
297 arm_store_vfpregset (struct regcache *regcache, const void *buf)
298 {
299 int num;
300
301 if (is_aarch32_linux_description (regcache->tdesc))
302 num = 32;
303 else
304 {
305 arm_fp_type fp_type = arm_linux_get_tdesc_fp_type (regcache->tdesc);
306
307 if (fp_type == ARM_FP_TYPE_VFPV3)
308 num = 32;
309 else if (fp_type == ARM_FP_TYPE_VFPV2)
310 num = 16;
311 else
312 return;
313 }
314
315 arm_store_vfpregset_num (regcache, buf, num);
316 }
317
318 /* Wrapper of arm_is_thumb_mode for get_next_pcs. */
319 static int
320 get_next_pcs_is_thumb (struct arm_get_next_pcs *self)
321 {
322 return arm_is_thumb_mode ();
323 }
324
325 /* Read memory from the inferior.
326 BYTE_ORDER is ignored and there to keep compatiblity with GDB's
327 read_memory_unsigned_integer. */
328 static ULONGEST
329 get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
330 int len,
331 int byte_order)
332 {
333 ULONGEST res;
334
335 res = 0;
336 target_read_memory (memaddr, (unsigned char *) &res, len);
337
338 return res;
339 }
340
341 /* Fetch the thread-local storage pointer for libthread_db. */
342
343 ps_err_e
344 ps_get_thread_area (struct ps_prochandle *ph,
345 lwpid_t lwpid, int idx, void **base)
346 {
347 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
348 return PS_ERR;
349
350 /* IDX is the bias from the thread pointer to the beginning of the
351 thread descriptor. It has to be subtracted due to implementation
352 quirks in libthread_db. */
353 *base = (void *) ((char *)*base - idx);
354
355 return PS_OK;
356 }
357
358
359 /* Query Hardware Breakpoint information for the target we are attached to
360 (using PID as ptrace argument) and set up arm_linux_hwbp_cap. */
361 static void
362 arm_linux_init_hwbp_cap (int pid)
363 {
364 unsigned int val;
365
366 if (ptrace (PTRACE_GETHBPREGS, pid, 0, &val) < 0)
367 return;
368
369 arm_linux_hwbp_cap.arch = (unsigned char)((val >> 24) & 0xff);
370 if (arm_linux_hwbp_cap.arch == 0)
371 return;
372
373 arm_linux_hwbp_cap.max_wp_length = (unsigned char)((val >> 16) & 0xff);
374 arm_linux_hwbp_cap.wp_count = (unsigned char)((val >> 8) & 0xff);
375 arm_linux_hwbp_cap.bp_count = (unsigned char)(val & 0xff);
376
377 if (arm_linux_hwbp_cap.wp_count > MAX_WPTS)
378 internal_error (__FILE__, __LINE__, "Unsupported number of watchpoints");
379 if (arm_linux_hwbp_cap.bp_count > MAX_BPTS)
380 internal_error (__FILE__, __LINE__, "Unsupported number of breakpoints");
381 }
382
383 /* How many hardware breakpoints are available? */
384 static int
385 arm_linux_get_hw_breakpoint_count (void)
386 {
387 return arm_linux_hwbp_cap.bp_count;
388 }
389
390 /* How many hardware watchpoints are available? */
391 static int
392 arm_linux_get_hw_watchpoint_count (void)
393 {
394 return arm_linux_hwbp_cap.wp_count;
395 }
396
397 /* Maximum length of area watched by hardware watchpoint. */
398 static int
399 arm_linux_get_hw_watchpoint_max_length (void)
400 {
401 return arm_linux_hwbp_cap.max_wp_length;
402 }
403
404 /* Initialize an ARM hardware break-/watch-point control register value.
405 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
406 type of break-/watch-point; ENABLE indicates whether the point is enabled.
407 */
408 static arm_hwbp_control_t
409 arm_hwbp_control_initialize (unsigned byte_address_select,
410 arm_hwbp_type hwbp_type,
411 int enable)
412 {
413 gdb_assert ((byte_address_select & ~0xffU) == 0);
414 gdb_assert (hwbp_type != arm_hwbp_break
415 || ((byte_address_select & 0xfU) != 0));
416
417 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
418 }
419
420 /* Does the breakpoint control value CONTROL have the enable bit set? */
421 static int
422 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
423 {
424 return control & 0x1;
425 }
426
427 /* Is the breakpoint control value CONTROL initialized? */
428 static int
429 arm_hwbp_control_is_initialized (arm_hwbp_control_t control)
430 {
431 return control != 0;
432 }
433
434 /* Change a breakpoint control word so that it is in the disabled state. */
435 static arm_hwbp_control_t
436 arm_hwbp_control_disable (arm_hwbp_control_t control)
437 {
438 return control & ~0x1;
439 }
440
441 /* Are two break-/watch-points equal? */
442 static int
443 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
444 const struct arm_linux_hw_breakpoint *p2)
445 {
446 return p1->address == p2->address && p1->control == p2->control;
447 }
448
449 /* Convert a raw breakpoint type to an enum arm_hwbp_type. */
450
451 static arm_hwbp_type
452 raw_bkpt_type_to_arm_hwbp_type (enum raw_bkpt_type raw_type)
453 {
454 switch (raw_type)
455 {
456 case raw_bkpt_type_hw:
457 return arm_hwbp_break;
458 case raw_bkpt_type_write_wp:
459 return arm_hwbp_store;
460 case raw_bkpt_type_read_wp:
461 return arm_hwbp_load;
462 case raw_bkpt_type_access_wp:
463 return arm_hwbp_access;
464 default:
465 gdb_assert_not_reached ("unhandled raw type");
466 }
467 }
468
469 /* Initialize the hardware breakpoint structure P for a breakpoint or
470 watchpoint at ADDR to LEN. The type of watchpoint is given in TYPE.
471 Returns -1 if TYPE is unsupported, or -2 if the particular combination
472 of ADDR and LEN cannot be implemented. Otherwise, returns 0 if TYPE
473 represents a breakpoint and 1 if type represents a watchpoint. */
474 static int
475 arm_linux_hw_point_initialize (enum raw_bkpt_type raw_type, CORE_ADDR addr,
476 int len, struct arm_linux_hw_breakpoint *p)
477 {
478 arm_hwbp_type hwbp_type;
479 unsigned mask;
480
481 hwbp_type = raw_bkpt_type_to_arm_hwbp_type (raw_type);
482
483 if (hwbp_type == arm_hwbp_break)
484 {
485 /* For breakpoints, the length field encodes the mode. */
486 switch (len)
487 {
488 case 2: /* 16-bit Thumb mode breakpoint */
489 case 3: /* 32-bit Thumb mode breakpoint */
490 mask = 0x3;
491 addr &= ~1;
492 break;
493 case 4: /* 32-bit ARM mode breakpoint */
494 mask = 0xf;
495 addr &= ~3;
496 break;
497 default:
498 /* Unsupported. */
499 return -2;
500 }
501 }
502 else
503 {
504 CORE_ADDR max_wp_length = arm_linux_get_hw_watchpoint_max_length ();
505 CORE_ADDR aligned_addr;
506
507 /* Can not set watchpoints for zero or negative lengths. */
508 if (len <= 0)
509 return -2;
510 /* The current ptrace interface can only handle watchpoints that are a
511 power of 2. */
512 if ((len & (len - 1)) != 0)
513 return -2;
514
515 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
516 range covered by a watchpoint. */
517 aligned_addr = addr & ~(max_wp_length - 1);
518 if (aligned_addr + max_wp_length < addr + len)
519 return -2;
520
521 mask = (1 << len) - 1;
522 }
523
524 p->address = (unsigned int) addr;
525 p->control = arm_hwbp_control_initialize (mask, hwbp_type, 1);
526
527 return hwbp_type != arm_hwbp_break;
528 }
529
530 /* Callback to mark a watch-/breakpoint to be updated in all threads of
531 the current process. */
532
533 static void
534 update_registers_callback (thread_info *thread, int watch, int i)
535 {
536 struct lwp_info *lwp = get_thread_lwp (thread);
537
538 /* The actual update is done later just before resuming the lwp,
539 we just mark that the registers need updating. */
540 if (watch)
541 lwp->arch_private->wpts_changed[i] = 1;
542 else
543 lwp->arch_private->bpts_changed[i] = 1;
544
545 /* If the lwp isn't stopped, force it to momentarily pause, so
546 we can update its breakpoint registers. */
547 if (!lwp->stopped)
548 linux_stop_lwp (lwp);
549 }
550
551 static int
552 arm_supports_z_point_type (char z_type)
553 {
554 switch (z_type)
555 {
556 case Z_PACKET_SW_BP:
557 case Z_PACKET_HW_BP:
558 case Z_PACKET_WRITE_WP:
559 case Z_PACKET_READ_WP:
560 case Z_PACKET_ACCESS_WP:
561 return 1;
562 default:
563 /* Leave the handling of sw breakpoints with the gdb client. */
564 return 0;
565 }
566 }
567
568 /* Insert hardware break-/watchpoint. */
569 static int
570 arm_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
571 int len, struct raw_breakpoint *bp)
572 {
573 struct process_info *proc = current_process ();
574 struct arm_linux_hw_breakpoint p, *pts;
575 int watch, i, count;
576
577 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
578 if (watch < 0)
579 {
580 /* Unsupported. */
581 return watch == -1 ? 1 : -1;
582 }
583
584 if (watch)
585 {
586 count = arm_linux_get_hw_watchpoint_count ();
587 pts = proc->priv->arch_private->wpts;
588 }
589 else
590 {
591 count = arm_linux_get_hw_breakpoint_count ();
592 pts = proc->priv->arch_private->bpts;
593 }
594
595 for (i = 0; i < count; i++)
596 if (!arm_hwbp_control_is_enabled (pts[i].control))
597 {
598 pts[i] = p;
599
600 /* Only update the threads of the current process. */
601 for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
602 {
603 update_registers_callback (thread, watch, i);
604 });
605
606 return 0;
607 }
608
609 /* We're out of watchpoints. */
610 return -1;
611 }
612
613 /* Remove hardware break-/watchpoint. */
614 static int
615 arm_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
616 int len, struct raw_breakpoint *bp)
617 {
618 struct process_info *proc = current_process ();
619 struct arm_linux_hw_breakpoint p, *pts;
620 int watch, i, count;
621
622 watch = arm_linux_hw_point_initialize (type, addr, len, &p);
623 if (watch < 0)
624 {
625 /* Unsupported. */
626 return -1;
627 }
628
629 if (watch)
630 {
631 count = arm_linux_get_hw_watchpoint_count ();
632 pts = proc->priv->arch_private->wpts;
633 }
634 else
635 {
636 count = arm_linux_get_hw_breakpoint_count ();
637 pts = proc->priv->arch_private->bpts;
638 }
639
640 for (i = 0; i < count; i++)
641 if (arm_linux_hw_breakpoint_equal (&p, pts + i))
642 {
643 pts[i].control = arm_hwbp_control_disable (pts[i].control);
644
645 /* Only update the threads of the current process. */
646 for_each_thread (current_thread->id.pid (), [&] (thread_info *thread)
647 {
648 update_registers_callback (thread, watch, i);
649 });
650
651 return 0;
652 }
653
654 /* No watchpoint matched. */
655 return -1;
656 }
657
658 /* Return whether current thread is stopped due to a watchpoint. */
659 static int
660 arm_stopped_by_watchpoint (void)
661 {
662 struct lwp_info *lwp = get_thread_lwp (current_thread);
663 siginfo_t siginfo;
664
665 /* We must be able to set hardware watchpoints. */
666 if (arm_linux_get_hw_watchpoint_count () == 0)
667 return 0;
668
669 /* Retrieve siginfo. */
670 errno = 0;
671 ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
672 if (errno != 0)
673 return 0;
674
675 /* This must be a hardware breakpoint. */
676 if (siginfo.si_signo != SIGTRAP
677 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
678 return 0;
679
680 /* If we are in a positive slot then we're looking at a breakpoint and not
681 a watchpoint. */
682 if (siginfo.si_errno >= 0)
683 return 0;
684
685 /* Cache stopped data address for use by arm_stopped_data_address. */
686 lwp->arch_private->stopped_data_address
687 = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
688
689 return 1;
690 }
691
692 /* Return data address that triggered watchpoint. Called only if
693 arm_stopped_by_watchpoint returned true. */
694 static CORE_ADDR
695 arm_stopped_data_address (void)
696 {
697 struct lwp_info *lwp = get_thread_lwp (current_thread);
698 return lwp->arch_private->stopped_data_address;
699 }
700
701 /* Called when a new process is created. */
702 static struct arch_process_info *
703 arm_new_process (void)
704 {
705 struct arch_process_info *info = XCNEW (struct arch_process_info);
706 return info;
707 }
708
709 /* Called when a process is being deleted. */
710
711 static void
712 arm_delete_process (struct arch_process_info *info)
713 {
714 xfree (info);
715 }
716
717 /* Called when a new thread is detected. */
718 static void
719 arm_new_thread (struct lwp_info *lwp)
720 {
721 struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
722 int i;
723
724 for (i = 0; i < MAX_BPTS; i++)
725 info->bpts_changed[i] = 1;
726 for (i = 0; i < MAX_WPTS; i++)
727 info->wpts_changed[i] = 1;
728
729 lwp->arch_private = info;
730 }
731
732 /* Function to call when a thread is being deleted. */
733
734 static void
735 arm_delete_thread (struct arch_lwp_info *arch_lwp)
736 {
737 xfree (arch_lwp);
738 }
739
740 static void
741 arm_new_fork (struct process_info *parent, struct process_info *child)
742 {
743 struct arch_process_info *parent_proc_info;
744 struct arch_process_info *child_proc_info;
745 struct lwp_info *child_lwp;
746 struct arch_lwp_info *child_lwp_info;
747 int i;
748
749 /* These are allocated by linux_add_process. */
750 gdb_assert (parent->priv != NULL
751 && parent->priv->arch_private != NULL);
752 gdb_assert (child->priv != NULL
753 && child->priv->arch_private != NULL);
754
755 parent_proc_info = parent->priv->arch_private;
756 child_proc_info = child->priv->arch_private;
757
758 /* Linux kernel before 2.6.33 commit
759 72f674d203cd230426437cdcf7dd6f681dad8b0d
760 will inherit hardware debug registers from parent
761 on fork/vfork/clone. Newer Linux kernels create such tasks with
762 zeroed debug registers.
763
764 GDB core assumes the child inherits the watchpoints/hw
765 breakpoints of the parent, and will remove them all from the
766 forked off process. Copy the debug registers mirrors into the
767 new process so that all breakpoints and watchpoints can be
768 removed together. The debug registers mirror will become zeroed
769 in the end before detaching the forked off process, thus making
770 this compatible with older Linux kernels too. */
771
772 *child_proc_info = *parent_proc_info;
773
774 /* Mark all the hardware breakpoints and watchpoints as changed to
775 make sure that the registers will be updated. */
776 child_lwp = find_lwp_pid (ptid_t (child->pid));
777 child_lwp_info = child_lwp->arch_private;
778 for (i = 0; i < MAX_BPTS; i++)
779 child_lwp_info->bpts_changed[i] = 1;
780 for (i = 0; i < MAX_WPTS; i++)
781 child_lwp_info->wpts_changed[i] = 1;
782 }
783
784 /* Called when resuming a thread.
785 If the debug regs have changed, update the thread's copies. */
786 static void
787 arm_prepare_to_resume (struct lwp_info *lwp)
788 {
789 struct thread_info *thread = get_lwp_thread (lwp);
790 int pid = lwpid_of (thread);
791 struct process_info *proc = find_process_pid (pid_of (thread));
792 struct arch_process_info *proc_info = proc->priv->arch_private;
793 struct arch_lwp_info *lwp_info = lwp->arch_private;
794 int i;
795
796 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
797 if (lwp_info->bpts_changed[i])
798 {
799 errno = 0;
800
801 if (arm_hwbp_control_is_enabled (proc_info->bpts[i].control))
802 if (ptrace (PTRACE_SETHBPREGS, pid,
803 (PTRACE_TYPE_ARG3) ((i << 1) + 1),
804 &proc_info->bpts[i].address) < 0)
805 perror_with_name ("Unexpected error setting breakpoint address");
806
807 if (arm_hwbp_control_is_initialized (proc_info->bpts[i].control))
808 if (ptrace (PTRACE_SETHBPREGS, pid,
809 (PTRACE_TYPE_ARG3) ((i << 1) + 2),
810 &proc_info->bpts[i].control) < 0)
811 perror_with_name ("Unexpected error setting breakpoint");
812
813 lwp_info->bpts_changed[i] = 0;
814 }
815
816 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
817 if (lwp_info->wpts_changed[i])
818 {
819 errno = 0;
820
821 if (arm_hwbp_control_is_enabled (proc_info->wpts[i].control))
822 if (ptrace (PTRACE_SETHBPREGS, pid,
823 (PTRACE_TYPE_ARG3) -((i << 1) + 1),
824 &proc_info->wpts[i].address) < 0)
825 perror_with_name ("Unexpected error setting watchpoint address");
826
827 if (arm_hwbp_control_is_initialized (proc_info->wpts[i].control))
828 if (ptrace (PTRACE_SETHBPREGS, pid,
829 (PTRACE_TYPE_ARG3) -((i << 1) + 2),
830 &proc_info->wpts[i].control) < 0)
831 perror_with_name ("Unexpected error setting watchpoint");
832
833 lwp_info->wpts_changed[i] = 0;
834 }
835 }
836
837 /* Find the next pc for a sigreturn or rt_sigreturn syscall. In
838 addition, set IS_THUMB depending on whether we will return to ARM
839 or Thumb code.
840 See arm-linux.h for stack layout details. */
841 static CORE_ADDR
842 arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
843 int *is_thumb)
844 {
845 unsigned long sp;
846 unsigned long sp_data;
847 /* Offset of PC register. */
848 int pc_offset = 0;
849 CORE_ADDR next_pc = 0;
850 uint32_t cpsr;
851
852 gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
853
854 collect_register_by_name (regcache, "sp", &sp);
855 the_target->read_memory (sp, (unsigned char *) &sp_data, 4);
856
857 pc_offset = arm_linux_sigreturn_next_pc_offset
858 (sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
859
860 the_target->read_memory (sp + pc_offset, (unsigned char *) &next_pc, 4);
861
862 /* Set IS_THUMB according the CPSR saved on the stack. */
863 the_target->read_memory (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
864 *is_thumb = ((cpsr & CPSR_T) != 0);
865
866 return next_pc;
867 }
868
869 /* When PC is at a syscall instruction, return the PC of the next
870 instruction to be executed. */
871 static CORE_ADDR
872 get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self)
873 {
874 CORE_ADDR next_pc = 0;
875 CORE_ADDR pc = regcache_read_pc (self->regcache);
876 int is_thumb = arm_is_thumb_mode ();
877 ULONGEST svc_number = 0;
878 struct regcache *regcache = self->regcache;
879
880 if (is_thumb)
881 {
882 collect_register (regcache, 7, &svc_number);
883 next_pc = pc + 2;
884 }
885 else
886 {
887 unsigned long this_instr;
888 unsigned long svc_operand;
889
890 target_read_memory (pc, (unsigned char *) &this_instr, 4);
891 svc_operand = (0x00ffffff & this_instr);
892
893 if (svc_operand) /* OABI. */
894 {
895 svc_number = svc_operand - 0x900000;
896 }
897 else /* EABI. */
898 {
899 collect_register (regcache, 7, &svc_number);
900 }
901
902 next_pc = pc + 4;
903 }
904
905 /* This is a sigreturn or sigreturn_rt syscall. */
906 if (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn)
907 {
908 /* SIGRETURN or RT_SIGRETURN may affect the arm thumb mode, so
909 update IS_THUMB. */
910 next_pc = arm_sigreturn_next_pc (regcache, svc_number, &is_thumb);
911 }
912
913 /* Addresses for calling Thumb functions have the bit 0 set. */
914 if (is_thumb)
915 next_pc = MAKE_THUMB_ADDR (next_pc);
916
917 return next_pc;
918 }
919
920 static const struct target_desc *
921 arm_read_description (void)
922 {
923 unsigned long arm_hwcap = linux_get_hwcap (4);
924
925 if (arm_hwcap & HWCAP_IWMMXT)
926 return arm_linux_read_description (ARM_FP_TYPE_IWMMXT);
927
928 if (arm_hwcap & HWCAP_VFP)
929 {
930 /* Make sure that the kernel supports reading VFP registers. Support was
931 added in 2.6.30. */
932 int pid = lwpid_of (current_thread);
933 errno = 0;
934 char *buf = (char *) alloca (ARM_VFP3_REGS_SIZE);
935 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO)
936 return arm_linux_read_description (ARM_FP_TYPE_NONE);
937
938 /* NEON implies either no VFP, or VFPv3-D32. We only support
939 it with VFP. */
940 if (arm_hwcap & HWCAP_NEON)
941 return aarch32_linux_read_description ();
942 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
943 return arm_linux_read_description (ARM_FP_TYPE_VFPV3);
944 else
945 return arm_linux_read_description (ARM_FP_TYPE_VFPV2);
946 }
947
948 /* The default configuration uses legacy FPA registers, probably
949 simulated. */
950 return arm_linux_read_description (ARM_FP_TYPE_NONE);
951 }
952
953 void
954 arm_target::low_arch_setup ()
955 {
956 int tid = lwpid_of (current_thread);
957 int gpregs[18];
958 struct iovec iov;
959
960 /* Query hardware watchpoint/breakpoint capabilities. */
961 arm_linux_init_hwbp_cap (tid);
962
963 current_process ()->tdesc = arm_read_description ();
964
965 iov.iov_base = gpregs;
966 iov.iov_len = sizeof (gpregs);
967
968 /* Check if PTRACE_GETREGSET works. */
969 if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) == 0)
970 have_ptrace_getregset = 1;
971 else
972 have_ptrace_getregset = 0;
973 }
974
975 bool
976 arm_target::supports_software_single_step ()
977 {
978 return true;
979 }
980
981 /* Fetch the next possible PCs after the current instruction executes. */
982
983 std::vector<CORE_ADDR>
984 arm_target::low_get_next_pcs (regcache *regcache)
985 {
986 struct arm_get_next_pcs next_pcs_ctx;
987
988 arm_get_next_pcs_ctor (&next_pcs_ctx,
989 &get_next_pcs_ops,
990 /* Byte order is ignored assumed as host. */
991 0,
992 0,
993 1,
994 regcache);
995
996 return arm_get_next_pcs (&next_pcs_ctx);
997 }
998
999 /* Support for hardware single step. */
1000
1001 static int
1002 arm_supports_hardware_single_step (void)
1003 {
1004 return 0;
1005 }
1006
1007 /* Implementation of linux_target_ops method "get_syscall_trapinfo". */
1008
1009 static void
1010 arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
1011 {
1012 if (arm_is_thumb_mode ())
1013 collect_register_by_name (regcache, "r7", sysno);
1014 else
1015 {
1016 unsigned long pc;
1017 unsigned long insn;
1018
1019 collect_register_by_name (regcache, "pc", &pc);
1020
1021 if (the_target->read_memory (pc - 4, (unsigned char *) &insn, 4))
1022 *sysno = UNKNOWN_SYSCALL;
1023 else
1024 {
1025 unsigned long svc_operand = (0x00ffffff & insn);
1026
1027 if (svc_operand)
1028 {
1029 /* OABI */
1030 *sysno = svc_operand - 0x900000;
1031 }
1032 else
1033 {
1034 /* EABI */
1035 collect_register_by_name (regcache, "r7", sysno);
1036 }
1037 }
1038 }
1039 }
1040
1041 /* Register sets without using PTRACE_GETREGSET. */
1042
1043 static struct regset_info arm_regsets[] = {
1044 { PTRACE_GETREGS, PTRACE_SETREGS, 0,
1045 ARM_CORE_REGS_SIZE + ARM_INT_REGISTER_SIZE, GENERAL_REGS,
1046 arm_fill_gregset, arm_store_gregset },
1047 { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, IWMMXT_REGS_SIZE, EXTENDED_REGS,
1048 arm_fill_wmmxregset, arm_store_wmmxregset },
1049 { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, ARM_VFP3_REGS_SIZE, EXTENDED_REGS,
1050 arm_fill_vfpregset, arm_store_vfpregset },
1051 NULL_REGSET
1052 };
1053
1054 static struct regsets_info arm_regsets_info =
1055 {
1056 arm_regsets, /* regsets */
1057 0, /* num_regsets */
1058 NULL, /* disabled_regsets */
1059 };
1060
1061 static struct usrregs_info arm_usrregs_info =
1062 {
1063 arm_num_regs,
1064 arm_regmap,
1065 };
1066
1067 static struct regs_info regs_info_arm =
1068 {
1069 NULL, /* regset_bitmap */
1070 &arm_usrregs_info,
1071 &arm_regsets_info
1072 };
1073
1074 const regs_info *
1075 arm_target::get_regs_info ()
1076 {
1077 const struct target_desc *tdesc = current_process ()->tdesc;
1078
1079 if (have_ptrace_getregset == 1
1080 && (is_aarch32_linux_description (tdesc)
1081 || arm_linux_get_tdesc_fp_type (tdesc) == ARM_FP_TYPE_VFPV3))
1082 return &regs_info_aarch32;
1083
1084 return &regs_info_arm;
1085 }
1086
1087 struct linux_target_ops the_low_target = {
1088 0,
1089 arm_breakpoint_at,
1090 arm_supports_z_point_type,
1091 arm_insert_point,
1092 arm_remove_point,
1093 arm_stopped_by_watchpoint,
1094 arm_stopped_data_address,
1095 NULL, /* collect_ptrace_register */
1096 NULL, /* supply_ptrace_register */
1097 NULL, /* siginfo_fixup */
1098 arm_new_process,
1099 arm_delete_process,
1100 arm_new_thread,
1101 arm_delete_thread,
1102 arm_new_fork,
1103 arm_prepare_to_resume,
1104 NULL, /* process_qsupported */
1105 NULL, /* supports_tracepoints */
1106 NULL, /* get_thread_area */
1107 NULL, /* install_fast_tracepoint_jump_pad */
1108 NULL, /* emit_ops */
1109 NULL, /* get_min_fast_tracepoint_insn_len */
1110 NULL, /* supports_range_stepping */
1111 arm_supports_hardware_single_step,
1112 arm_get_syscall_trapinfo,
1113 };
1114
1115 /* The linux target ops object. */
1116
1117 linux_process_target *the_linux_target = &the_arm_target;
1118
1119 void
1120 initialize_low_arch (void)
1121 {
1122 initialize_low_arch_aarch32 ();
1123 initialize_regsets_info (&arm_regsets_info);
1124 }
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