471530a621bffff4c215811148c4d4eccae53bff
[deliverable/binutils-gdb.git] / gdbserver / linux-ia64-low.cc
1 /* GNU/Linux/IA64 specific low level interface, for the remote server for GDB.
2 Copyright (C) 1995-2020 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19 #include "server.h"
20 #include "linux-low.h"
21
22 #ifdef HAVE_SYS_REG_H
23 #include <sys/reg.h>
24 #endif
25
26 /* Linux target op definitions for the IA64 architecture. */
27
28 class ia64_target : public linux_process_target
29 {
30 public:
31
32 const regs_info *get_regs_info () override;
33
34 protected:
35
36 void low_arch_setup () override;
37
38 bool low_cannot_fetch_register (int regno) override;
39
40 bool low_cannot_store_register (int regno) override;
41 };
42
43 /* The singleton target ops object. */
44
45 static ia64_target the_ia64_target;
46
47 /* Defined in auto-generated file reg-ia64.c. */
48 void init_registers_ia64 (void);
49 extern const struct target_desc *tdesc_ia64;
50
51 #define ia64_num_regs 462
52
53 #include <asm/ptrace_offsets.h>
54
55 static int ia64_regmap[] =
56 {
57 /* general registers */
58 -1, /* gr0 not available; i.e, it's always zero */
59 PT_R1,
60 PT_R2,
61 PT_R3,
62 PT_R4,
63 PT_R5,
64 PT_R6,
65 PT_R7,
66 PT_R8,
67 PT_R9,
68 PT_R10,
69 PT_R11,
70 PT_R12,
71 PT_R13,
72 PT_R14,
73 PT_R15,
74 PT_R16,
75 PT_R17,
76 PT_R18,
77 PT_R19,
78 PT_R20,
79 PT_R21,
80 PT_R22,
81 PT_R23,
82 PT_R24,
83 PT_R25,
84 PT_R26,
85 PT_R27,
86 PT_R28,
87 PT_R29,
88 PT_R30,
89 PT_R31,
90 /* gr32 through gr127 not directly available via the ptrace interface */
91 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
92 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
93 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
94 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
95 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
96 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
97 /* Floating point registers */
98 -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
99 PT_F2,
100 PT_F3,
101 PT_F4,
102 PT_F5,
103 PT_F6,
104 PT_F7,
105 PT_F8,
106 PT_F9,
107 PT_F10,
108 PT_F11,
109 PT_F12,
110 PT_F13,
111 PT_F14,
112 PT_F15,
113 PT_F16,
114 PT_F17,
115 PT_F18,
116 PT_F19,
117 PT_F20,
118 PT_F21,
119 PT_F22,
120 PT_F23,
121 PT_F24,
122 PT_F25,
123 PT_F26,
124 PT_F27,
125 PT_F28,
126 PT_F29,
127 PT_F30,
128 PT_F31,
129 PT_F32,
130 PT_F33,
131 PT_F34,
132 PT_F35,
133 PT_F36,
134 PT_F37,
135 PT_F38,
136 PT_F39,
137 PT_F40,
138 PT_F41,
139 PT_F42,
140 PT_F43,
141 PT_F44,
142 PT_F45,
143 PT_F46,
144 PT_F47,
145 PT_F48,
146 PT_F49,
147 PT_F50,
148 PT_F51,
149 PT_F52,
150 PT_F53,
151 PT_F54,
152 PT_F55,
153 PT_F56,
154 PT_F57,
155 PT_F58,
156 PT_F59,
157 PT_F60,
158 PT_F61,
159 PT_F62,
160 PT_F63,
161 PT_F64,
162 PT_F65,
163 PT_F66,
164 PT_F67,
165 PT_F68,
166 PT_F69,
167 PT_F70,
168 PT_F71,
169 PT_F72,
170 PT_F73,
171 PT_F74,
172 PT_F75,
173 PT_F76,
174 PT_F77,
175 PT_F78,
176 PT_F79,
177 PT_F80,
178 PT_F81,
179 PT_F82,
180 PT_F83,
181 PT_F84,
182 PT_F85,
183 PT_F86,
184 PT_F87,
185 PT_F88,
186 PT_F89,
187 PT_F90,
188 PT_F91,
189 PT_F92,
190 PT_F93,
191 PT_F94,
192 PT_F95,
193 PT_F96,
194 PT_F97,
195 PT_F98,
196 PT_F99,
197 PT_F100,
198 PT_F101,
199 PT_F102,
200 PT_F103,
201 PT_F104,
202 PT_F105,
203 PT_F106,
204 PT_F107,
205 PT_F108,
206 PT_F109,
207 PT_F110,
208 PT_F111,
209 PT_F112,
210 PT_F113,
211 PT_F114,
212 PT_F115,
213 PT_F116,
214 PT_F117,
215 PT_F118,
216 PT_F119,
217 PT_F120,
218 PT_F121,
219 PT_F122,
220 PT_F123,
221 PT_F124,
222 PT_F125,
223 PT_F126,
224 PT_F127,
225 /* predicate registers - we don't fetch these individually */
226 -1, -1, -1, -1, -1, -1, -1, -1,
227 -1, -1, -1, -1, -1, -1, -1, -1,
228 -1, -1, -1, -1, -1, -1, -1, -1,
229 -1, -1, -1, -1, -1, -1, -1, -1,
230 -1, -1, -1, -1, -1, -1, -1, -1,
231 -1, -1, -1, -1, -1, -1, -1, -1,
232 -1, -1, -1, -1, -1, -1, -1, -1,
233 -1, -1, -1, -1, -1, -1, -1, -1,
234 /* branch registers */
235 PT_B0,
236 PT_B1,
237 PT_B2,
238 PT_B3,
239 PT_B4,
240 PT_B5,
241 PT_B6,
242 PT_B7,
243 /* virtual frame pointer and virtual return address pointer */
244 -1, -1,
245 /* other registers */
246 PT_PR,
247 PT_CR_IIP, /* ip */
248 PT_CR_IPSR, /* psr */
249 PT_CFM, /* cfm */
250 /* kernel registers not visible via ptrace interface (?) */
251 -1, -1, -1, -1, -1, -1, -1, -1,
252 /* hole */
253 -1, -1, -1, -1, -1, -1, -1, -1,
254 PT_AR_RSC,
255 PT_AR_BSP,
256 PT_AR_BSPSTORE,
257 PT_AR_RNAT,
258 -1,
259 -1, /* Not available: FCR, IA32 floating control register */
260 -1, -1,
261 -1, /* Not available: EFLAG */
262 -1, /* Not available: CSD */
263 -1, /* Not available: SSD */
264 -1, /* Not available: CFLG */
265 -1, /* Not available: FSR */
266 -1, /* Not available: FIR */
267 -1, /* Not available: FDR */
268 -1,
269 PT_AR_CCV,
270 -1, -1, -1,
271 PT_AR_UNAT,
272 -1, -1, -1,
273 PT_AR_FPSR,
274 -1, -1, -1,
275 -1, /* Not available: ITC */
276 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
277 -1, -1, -1, -1, -1, -1, -1, -1, -1,
278 PT_AR_PFS,
279 PT_AR_LC,
280 PT_AR_EC,
281 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
282 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
283 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
284 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
285 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
286 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
287 -1,
288 };
289
290 bool
291 ia64_target::low_cannot_store_register (int regno)
292 {
293 return false;
294 }
295
296 bool
297 ia64_target::low_cannot_fetch_register (int regno)
298 {
299 return false;
300 }
301
302 /* GDB register numbers. */
303 #define IA64_GR0_REGNUM 0
304 #define IA64_FR0_REGNUM 128
305 #define IA64_FR1_REGNUM 129
306
307 static int
308 ia64_fetch_register (struct regcache *regcache, int regnum)
309 {
310 /* r0 cannot be fetched but is always zero. */
311 if (regnum == IA64_GR0_REGNUM)
312 {
313 const gdb_byte zero[8] = { 0 };
314
315 gdb_assert (sizeof (zero) == register_size (regcache->tdesc, regnum));
316 supply_register (regcache, regnum, zero);
317 return 1;
318 }
319
320 /* fr0 cannot be fetched but is always zero. */
321 if (regnum == IA64_FR0_REGNUM)
322 {
323 const gdb_byte f_zero[16] = { 0 };
324
325 gdb_assert (sizeof (f_zero) == register_size (regcache->tdesc, regnum));
326 supply_register (regcache, regnum, f_zero);
327 return 1;
328 }
329
330 /* fr1 cannot be fetched but is always one (1.0). */
331 if (regnum == IA64_FR1_REGNUM)
332 {
333 const gdb_byte f_one[16] =
334 { 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
335
336 gdb_assert (sizeof (f_one) == register_size (regcache->tdesc, regnum));
337 supply_register (regcache, regnum, f_one);
338 return 1;
339 }
340
341 return 0;
342 }
343
344 static struct usrregs_info ia64_usrregs_info =
345 {
346 ia64_num_regs,
347 ia64_regmap,
348 };
349
350 static struct regs_info myregs_info =
351 {
352 NULL, /* regset_bitmap */
353 &ia64_usrregs_info
354 };
355
356 const regs_info *
357 ia64_target::get_regs_info ()
358 {
359 return &myregs_info;
360 }
361
362 void
363 ia64_target::low_arch_setup ()
364 {
365 current_process ()->tdesc = tdesc_ia64;
366 }
367
368
369 struct linux_target_ops the_low_target = {
370 ia64_fetch_register,
371 };
372
373 /* The linux target ops object. */
374
375 linux_process_target *the_linux_target = &the_ia64_target;
376
377 void
378 initialize_low_arch (void)
379 {
380 init_registers_ia64 ();
381 }
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