gdbserver/linux-mips-low.cc

   1 /* GNU/Linux/MIPS specific low level interface, for the remote server for GDB.
   2    Copyright (C) 1995-2020 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "server.h"
  20 #include "linux-low.h"
  21
  22 #include "nat/gdb_ptrace.h"
  23 #include <endian.h>
  24
  25 #include "nat/mips-linux-watch.h"
  26 #include "gdb_proc_service.h"
  27
  28 /* Linux target op definitions for the MIPS architecture.  */
  29
  30 class mips_target : public linux_process_target
  31 {
  32 public:
  33
  34 protected:
  35
  36   void low_arch_setup () override;
  37 };
  38
  39 /* The singleton target ops object.  */
  40
  41 static mips_target the_mips_target;
  42
  43 /* Defined in auto-generated file mips-linux.c.  */
  44 void init_registers_mips_linux (void);
  45 extern const struct target_desc *tdesc_mips_linux;
  46
  47 /* Defined in auto-generated file mips-dsp-linux.c.  */
  48 void init_registers_mips_dsp_linux (void);
  49 extern const struct target_desc *tdesc_mips_dsp_linux;
  50
  51 /* Defined in auto-generated file mips64-linux.c.  */
  52 void init_registers_mips64_linux (void);
  53 extern const struct target_desc *tdesc_mips64_linux;
  54
  55 /* Defined in auto-generated file mips64-dsp-linux.c.  */
  56 void init_registers_mips64_dsp_linux (void);
  57 extern const struct target_desc *tdesc_mips64_dsp_linux;
  58
  59 #ifdef __mips64
  60 #define tdesc_mips_linux tdesc_mips64_linux
  61 #define tdesc_mips_dsp_linux tdesc_mips64_dsp_linux
  62 #endif
  63
  64 #ifndef PTRACE_GET_THREAD_AREA
  65 #define PTRACE_GET_THREAD_AREA 25
  66 #endif
  67
  68 #ifdef HAVE_SYS_REG_H
  69 #include <sys/reg.h>
  70 #endif
  71
  72 #define mips_num_regs 73
  73 #define mips_dsp_num_regs 80
  74
  75 #include <asm/ptrace.h>
  76
  77 #ifndef DSP_BASE
  78 #define DSP_BASE 71
  79 #define DSP_CONTROL 77
  80 #endif
  81
  82 union mips_register
  83 {
  84   unsigned char buf[8];
  85
  86   /* Deliberately signed, for proper sign extension.  */
  87   int reg32;
  88   long long reg64;
  89 };
  90
  91 /* Return the ptrace ``address'' of register REGNO. */
  92
  93 #define mips_base_regs                                                  \
  94   -1,  1,  2,  3,  4,  5,  6,  7,                                       \
  95   8,  9,  10, 11, 12, 13, 14, 15,                                       \
  96   16, 17, 18, 19, 20, 21, 22, 23,                                       \
  97   24, 25, 26, 27, 28, 29, 30, 31,                                       \
  98                                                                         \
  99   -1, MMLO, MMHI, BADVADDR, CAUSE, PC,                                  \
 100                                                                         \
 101   FPR_BASE,      FPR_BASE + 1,  FPR_BASE + 2,  FPR_BASE + 3,            \
 102   FPR_BASE + 4,  FPR_BASE + 5,  FPR_BASE + 6,  FPR_BASE + 7,            \
 103   FPR_BASE + 8,  FPR_BASE + 9,  FPR_BASE + 10, FPR_BASE + 11,           \
 104   FPR_BASE + 12, FPR_BASE + 13, FPR_BASE + 14, FPR_BASE + 15,           \
 105   FPR_BASE + 16, FPR_BASE + 17, FPR_BASE + 18, FPR_BASE + 19,           \
 106   FPR_BASE + 20, FPR_BASE + 21, FPR_BASE + 22, FPR_BASE + 23,           \
 107   FPR_BASE + 24, FPR_BASE + 25, FPR_BASE + 26, FPR_BASE + 27,           \
 108   FPR_BASE + 28, FPR_BASE + 29, FPR_BASE + 30, FPR_BASE + 31,           \
 109   FPC_CSR, FPC_EIR
 110
 111 #define mips_dsp_regs                                                   \
 112   DSP_BASE,      DSP_BASE + 1,  DSP_BASE + 2,  DSP_BASE + 3,            \
 113   DSP_BASE + 4,  DSP_BASE + 5,                                          \
 114   DSP_CONTROL
 115
 116 static int mips_regmap[mips_num_regs] = {
 117   mips_base_regs,
 118   0
 119 };
 120
 121 static int mips_dsp_regmap[mips_dsp_num_regs] = {
 122   mips_base_regs,
 123   mips_dsp_regs,
 124   0
 125 };
 126
 127 /* DSP registers are not in any regset and can only be accessed
 128    individually.  */
 129
 130 static unsigned char mips_dsp_regset_bitmap[(mips_dsp_num_regs + 7) / 8] = {
 131   0xfe, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0x80
 132 };
 133
 134 static int have_dsp = -1;
 135
 136 /* Try peeking at an arbitrarily chosen DSP register and pick the available
 137    user register set accordingly.  */
 138
 139 static const struct target_desc *
 140 mips_read_description (void)
 141 {
 142   if (have_dsp < 0)
 143     {
 144       int pid = lwpid_of (current_thread);
 145
 146       errno = 0;
 147       ptrace (PTRACE_PEEKUSER, pid, DSP_CONTROL, 0);
 148       switch (errno)
 149         {
 150         case 0:
 151           have_dsp = 1;
 152           break;
 153         case EIO:
 154           have_dsp = 0;
 155           break;
 156         default:
 157           perror_with_name ("ptrace");
 158           break;
 159         }
 160     }
 161
 162   return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
 163 }
 164
 165 void
 166 mips_target::low_arch_setup ()
 167 {
 168   current_process ()->tdesc = mips_read_description ();
 169 }
 170
 171 static struct usrregs_info *
 172 get_usrregs_info (void)
 173 {
 174   const struct regs_info *regs_info = the_low_target.regs_info ();
 175
 176   return regs_info->usrregs;
 177 }
 178
 179 /* Per-process arch-specific data we want to keep.  */
 180
 181 struct arch_process_info
 182 {
 183   /* -1 if the kernel and/or CPU do not support watch registers.
 184       1 if watch_readback is valid and we can read style, num_valid
 185         and the masks.
 186       0 if we need to read the watch_readback.  */
 187
 188   int watch_readback_valid;
 189
 190   /* Cached watch register read values.  */
 191
 192   struct pt_watch_regs watch_readback;
 193
 194   /* Current watchpoint requests for this process.  */
 195
 196   struct mips_watchpoint *current_watches;
 197
 198   /* The current set of watch register values for writing the
 199      registers.  */
 200
 201   struct pt_watch_regs watch_mirror;
 202 };
 203
 204 /* Per-thread arch-specific data we want to keep.  */
 205
 206 struct arch_lwp_info
 207 {
 208   /* Non-zero if our copy differs from what's recorded in the thread.  */
 209   int watch_registers_changed;
 210 };
 211
 212 /* From mips-linux-nat.c.  */
 213
 214 /* Pseudo registers can not be read.  ptrace does not provide a way to
 215    read (or set) PS_REGNUM, and there's no point in reading or setting
 216    ZERO_REGNUM, it's always 0.  We also can not set BADVADDR, CAUSE,
 217    or FCRIR via ptrace().  */
 218
 219 static int
 220 mips_cannot_fetch_register (int regno)
 221 {
 222   const struct target_desc *tdesc;
 223
 224   if (get_usrregs_info ()->regmap[regno] == -1)
 225     return 1;
 226
 227   tdesc = current_process ()->tdesc;
 228
 229   /* On n32 we can't access 64-bit registers via PTRACE_PEEKUSR.  */
 230   if (register_size (tdesc, regno) > sizeof (PTRACE_XFER_TYPE))
 231     return 1;
 232
 233   if (find_regno (tdesc, "r0") == regno)
 234     return 1;
 235
 236   return 0;
 237 }
 238
 239 static int
 240 mips_cannot_store_register (int regno)
 241 {
 242   const struct target_desc *tdesc;
 243
 244   if (get_usrregs_info ()->regmap[regno] == -1)
 245     return 1;
 246
 247   tdesc = current_process ()->tdesc;
 248
 249   /* On n32 we can't access 64-bit registers via PTRACE_POKEUSR.  */
 250   if (register_size (tdesc, regno) > sizeof (PTRACE_XFER_TYPE))
 251     return 1;
 252
 253   if (find_regno (tdesc, "r0") == regno)
 254     return 1;
 255
 256   if (find_regno (tdesc, "cause") == regno)
 257     return 1;
 258
 259   if (find_regno (tdesc, "badvaddr") == regno)
 260     return 1;
 261
 262   if (find_regno (tdesc, "fir") == regno)
 263     return 1;
 264
 265   return 0;
 266 }
 267
 268 static int
 269 mips_fetch_register (struct regcache *regcache, int regno)
 270 {
 271   const struct target_desc *tdesc = current_process ()->tdesc;
 272
 273   if (find_regno (tdesc, "r0") == regno)
 274     {
 275       supply_register_zeroed (regcache, regno);
 276       return 1;
 277     }
 278
 279   return 0;
 280 }
 281
 282 static CORE_ADDR
 283 mips_get_pc (struct regcache *regcache)
 284 {
 285   union mips_register pc;
 286   collect_register_by_name (regcache, "pc", pc.buf);
 287   return register_size (regcache->tdesc, 0) == 4 ? pc.reg32 : pc.reg64;
 288 }
 289
 290 static void
 291 mips_set_pc (struct regcache *regcache, CORE_ADDR pc)
 292 {
 293   union mips_register newpc;
 294   if (register_size (regcache->tdesc, 0) == 4)
 295     newpc.reg32 = pc;
 296   else
 297     newpc.reg64 = pc;
 298
 299   supply_register_by_name (regcache, "pc", newpc.buf);
 300 }
 301
 302 /* Correct in either endianness.  */
 303 static const unsigned int mips_breakpoint = 0x0005000d;
 304 #define mips_breakpoint_len 4
 305
 306 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 307
 308 static const gdb_byte *
 309 mips_sw_breakpoint_from_kind (int kind, int *size)
 310 {
 311   *size = mips_breakpoint_len;
 312   return (const gdb_byte *) &mips_breakpoint;
 313 }
 314
 315 static int
 316 mips_breakpoint_at (CORE_ADDR where)
 317 {
 318   unsigned int insn;
 319
 320   the_target->read_memory (where, (unsigned char *) &insn, 4);
 321   if (insn == mips_breakpoint)
 322     return 1;
 323
 324   /* If necessary, recognize more trap instructions here.  GDB only uses the
 325      one.  */
 326   return 0;
 327 }
 328
 329 /* Mark the watch registers of lwp, represented by ENTRY, as changed.  */
 330
 331 static void
 332 update_watch_registers_callback (thread_info *thread)
 333 {
 334   struct lwp_info *lwp = get_thread_lwp (thread);
 335
 336   /* The actual update is done later just before resuming the lwp,
 337      we just mark that the registers need updating.  */
 338   lwp->arch_private->watch_registers_changed = 1;
 339
 340   /* If the lwp isn't stopped, force it to momentarily pause, so
 341      we can update its watch registers.  */
 342   if (!lwp->stopped)
 343     linux_stop_lwp (lwp);
 344 }
 345
 346 /* This is the implementation of linux_target_ops method
 347    new_process.  */
 348
 349 static struct arch_process_info *
 350 mips_linux_new_process (void)
 351 {
 352   struct arch_process_info *info = XCNEW (struct arch_process_info);
 353
 354   return info;
 355 }
 356
 357 /* This is the implementation of linux_target_ops method
 358    delete_process.  */
 359
 360 static void
 361 mips_linux_delete_process (struct arch_process_info *info)
 362 {
 363   xfree (info);
 364 }
 365
 366 /* This is the implementation of linux_target_ops method new_thread.
 367    Mark the watch registers as changed, so the threads' copies will
 368    be updated.  */
 369
 370 static void
 371 mips_linux_new_thread (struct lwp_info *lwp)
 372 {
 373   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
 374
 375   info->watch_registers_changed = 1;
 376
 377   lwp->arch_private = info;
 378 }
 379
 380 /* Function to call when a thread is being deleted.  */
 381
 382 static void
 383 mips_linux_delete_thread (struct arch_lwp_info *arch_lwp)
 384 {
 385   xfree (arch_lwp);
 386 }
 387
 388 /* Create a new mips_watchpoint and add it to the list.  */
 389
 390 static void
 391 mips_add_watchpoint (struct arch_process_info *priv, CORE_ADDR addr, int len,
 392                      enum target_hw_bp_type watch_type)
 393 {
 394   struct mips_watchpoint *new_watch;
 395   struct mips_watchpoint **pw;
 396
 397   new_watch = XNEW (struct mips_watchpoint);
 398   new_watch->addr = addr;
 399   new_watch->len = len;
 400   new_watch->type = watch_type;
 401   new_watch->next = NULL;
 402
 403   pw = &priv->current_watches;
 404   while (*pw != NULL)
 405     pw = &(*pw)->next;
 406   *pw = new_watch;
 407 }
 408
 409 /* Hook to call when a new fork is attached.  */
 410
 411 static void
 412 mips_linux_new_fork (struct process_info *parent,
 413                         struct process_info *child)
 414 {
 415   struct arch_process_info *parent_private;
 416   struct arch_process_info *child_private;
 417   struct mips_watchpoint *wp;
 418
 419   /* These are allocated by linux_add_process.  */
 420   gdb_assert (parent->priv != NULL
 421               && parent->priv->arch_private != NULL);
 422   gdb_assert (child->priv != NULL
 423               && child->priv->arch_private != NULL);
 424
 425   /* Linux kernel before 2.6.33 commit
 426      72f674d203cd230426437cdcf7dd6f681dad8b0d
 427      will inherit hardware debug registers from parent
 428      on fork/vfork/clone.  Newer Linux kernels create such tasks with
 429      zeroed debug registers.
 430
 431      GDB core assumes the child inherits the watchpoints/hw
 432      breakpoints of the parent, and will remove them all from the
 433      forked off process.  Copy the debug registers mirrors into the
 434      new process so that all breakpoints and watchpoints can be
 435      removed together.  The debug registers mirror will become zeroed
 436      in the end before detaching the forked off process, thus making
 437      this compatible with older Linux kernels too.  */
 438
 439   parent_private = parent->priv->arch_private;
 440   child_private = child->priv->arch_private;
 441
 442   child_private->watch_readback_valid = parent_private->watch_readback_valid;
 443   child_private->watch_readback = parent_private->watch_readback;
 444
 445   for (wp = parent_private->current_watches; wp != NULL; wp = wp->next)
 446     mips_add_watchpoint (child_private, wp->addr, wp->len, wp->type);
 447
 448   child_private->watch_mirror = parent_private->watch_mirror;
 449 }
 450 /* This is the implementation of linux_target_ops method
 451    prepare_to_resume.  If the watch regs have changed, update the
 452    thread's copies.  */
 453
 454 static void
 455 mips_linux_prepare_to_resume (struct lwp_info *lwp)
 456 {
 457   ptid_t ptid = ptid_of (get_lwp_thread (lwp));
 458   struct process_info *proc = find_process_pid (ptid.pid ());
 459   struct arch_process_info *priv = proc->priv->arch_private;
 460
 461   if (lwp->arch_private->watch_registers_changed)
 462     {
 463       /* Only update the watch registers if we have set or unset a
 464          watchpoint already.  */
 465       if (mips_linux_watch_get_num_valid (&priv->watch_mirror) > 0)
 466         {
 467           /* Write the mirrored watch register values.  */
 468           int tid = ptid.lwp ();
 469
 470           if (-1 == ptrace (PTRACE_SET_WATCH_REGS, tid,
 471                             &priv->watch_mirror, NULL))
 472             perror_with_name ("Couldn't write watch register");
 473         }
 474
 475       lwp->arch_private->watch_registers_changed = 0;
 476     }
 477 }
 478
 479 static int
 480 mips_supports_z_point_type (char z_type)
 481 {
 482   switch (z_type)
 483     {
 484     case Z_PACKET_WRITE_WP:
 485     case Z_PACKET_READ_WP:
 486     case Z_PACKET_ACCESS_WP:
 487       return 1;
 488     default:
 489       return 0;
 490     }
 491 }
 492
 493 /* This is the implementation of linux_target_ops method
 494    insert_point.  */
 495
 496 static int
 497 mips_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
 498                    int len, struct raw_breakpoint *bp)
 499 {
 500   struct process_info *proc = current_process ();
 501   struct arch_process_info *priv = proc->priv->arch_private;
 502   struct pt_watch_regs regs;
 503   long lwpid;
 504   enum target_hw_bp_type watch_type;
 505   uint32_t irw;
 506
 507   lwpid = lwpid_of (current_thread);
 508   if (!mips_linux_read_watch_registers (lwpid,
 509                                         &priv->watch_readback,
 510                                         &priv->watch_readback_valid,
 511                                         0))
 512     return -1;
 513
 514   if (len <= 0)
 515     return -1;
 516
 517   regs = priv->watch_readback;
 518   /* Add the current watches.  */
 519   mips_linux_watch_populate_regs (priv->current_watches, &regs);
 520
 521   /* Now try to add the new watch.  */
 522   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 523   irw = mips_linux_watch_type_to_irw (watch_type);
 524   if (!mips_linux_watch_try_one_watch (&regs, addr, len, irw))
 525     return -1;
 526
 527   /* It fit.  Stick it on the end of the list.  */
 528   mips_add_watchpoint (priv, addr, len, watch_type);
 529
 530   priv->watch_mirror = regs;
 531
 532   /* Only update the threads of this process.  */
 533   for_each_thread (proc->pid, update_watch_registers_callback);
 534
 535   return 0;
 536 }
 537
 538 /* This is the implementation of linux_target_ops method
 539    remove_point.  */
 540
 541 static int
 542 mips_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
 543                    int len, struct raw_breakpoint *bp)
 544 {
 545   struct process_info *proc = current_process ();
 546   struct arch_process_info *priv = proc->priv->arch_private;
 547
 548   int deleted_one;
 549   enum target_hw_bp_type watch_type;
 550
 551   struct mips_watchpoint **pw;
 552   struct mips_watchpoint *w;
 553
 554   /* Search for a known watch that matches.  Then unlink and free it.  */
 555   watch_type = raw_bkpt_type_to_target_hw_bp_type (type);
 556   deleted_one = 0;
 557   pw = &priv->current_watches;
 558   while ((w = *pw))
 559     {
 560       if (w->addr == addr && w->len == len && w->type == watch_type)
 561         {
 562           *pw = w->next;
 563           free (w);
 564           deleted_one = 1;
 565           break;
 566         }
 567       pw = &(w->next);
 568     }
 569
 570   if (!deleted_one)
 571     return -1;  /* We don't know about it, fail doing nothing.  */
 572
 573   /* At this point watch_readback is known to be valid because we
 574      could not have added the watch without reading it.  */
 575   gdb_assert (priv->watch_readback_valid == 1);
 576
 577   priv->watch_mirror = priv->watch_readback;
 578   mips_linux_watch_populate_regs (priv->current_watches,
 579                                   &priv->watch_mirror);
 580
 581   /* Only update the threads of this process.  */
 582   for_each_thread (proc->pid, update_watch_registers_callback);
 583
 584   return 0;
 585 }
 586
 587 /* This is the implementation of linux_target_ops method
 588    stopped_by_watchpoint.  The watchhi R and W bits indicate
 589    the watch register triggered. */
 590
 591 static int
 592 mips_stopped_by_watchpoint (void)
 593 {
 594   struct process_info *proc = current_process ();
 595   struct arch_process_info *priv = proc->priv->arch_private;
 596   int n;
 597   int num_valid;
 598   long lwpid = lwpid_of (current_thread);
 599
 600   if (!mips_linux_read_watch_registers (lwpid,
 601                                         &priv->watch_readback,
 602                                         &priv->watch_readback_valid,
 603                                         1))
 604     return 0;
 605
 606   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 607
 608   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 609     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 610         & (R_MASK | W_MASK))
 611       return 1;
 612
 613   return 0;
 614 }
 615
 616 /* This is the implementation of linux_target_ops method
 617    stopped_data_address.  */
 618
 619 static CORE_ADDR
 620 mips_stopped_data_address (void)
 621 {
 622   struct process_info *proc = current_process ();
 623   struct arch_process_info *priv = proc->priv->arch_private;
 624   int n;
 625   int num_valid;
 626   long lwpid = lwpid_of (current_thread);
 627
 628   /* On MIPS we don't know the low order 3 bits of the data address.
 629      GDB does not support remote targets that can't report the
 630      watchpoint address.  So, make our best guess; return the starting
 631      address of a watchpoint request which overlaps the one that
 632      triggered.  */
 633
 634   if (!mips_linux_read_watch_registers (lwpid,
 635                                         &priv->watch_readback,
 636                                         &priv->watch_readback_valid,
 637                                         0))
 638     return 0;
 639
 640   num_valid = mips_linux_watch_get_num_valid (&priv->watch_readback);
 641
 642   for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
 643     if (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 644         & (R_MASK | W_MASK))
 645       {
 646         CORE_ADDR t_low, t_hi;
 647         int t_irw;
 648         struct mips_watchpoint *watch;
 649
 650         t_low = mips_linux_watch_get_watchlo (&priv->watch_readback, n);
 651         t_irw = t_low & IRW_MASK;
 652         t_hi = (mips_linux_watch_get_watchhi (&priv->watch_readback, n)
 653                 | IRW_MASK);
 654         t_low &= ~(CORE_ADDR)t_hi;
 655
 656         for (watch = priv->current_watches;
 657              watch != NULL;
 658              watch = watch->next)
 659           {
 660             CORE_ADDR addr = watch->addr;
 661             CORE_ADDR last_byte = addr + watch->len - 1;
 662
 663             if ((t_irw & mips_linux_watch_type_to_irw (watch->type)) == 0)
 664               {
 665                 /* Different type.  */
 666                 continue;
 667               }
 668             /* Check for overlap of even a single byte.  */
 669             if (last_byte >= t_low && addr <= t_low + t_hi)
 670               return addr;
 671           }
 672       }
 673
 674   /* Shouldn't happen.  */
 675   return 0;
 676 }
 677
 678 /* Fetch the thread-local storage pointer for libthread_db.  */
 679
 680 ps_err_e
 681 ps_get_thread_area (struct ps_prochandle *ph,
 682                     lwpid_t lwpid, int idx, void **base)
 683 {
 684   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 685     return PS_ERR;
 686
 687   /* IDX is the bias from the thread pointer to the beginning of the
 688      thread descriptor.  It has to be subtracted due to implementation
 689      quirks in libthread_db.  */
 690   *base = (void *) ((char *)*base - idx);
 691
 692   return PS_OK;
 693 }
 694
 695 static void
 696 mips_collect_register (struct regcache *regcache,
 697                        int use_64bit, int regno, union mips_register *reg)
 698 {
 699   union mips_register tmp_reg;
 700
 701   if (use_64bit)
 702     {
 703       collect_register (regcache, regno, &tmp_reg.reg64);
 704       *reg = tmp_reg;
 705     }
 706   else
 707     {
 708       collect_register (regcache, regno, &tmp_reg.reg32);
 709       reg->reg64 = tmp_reg.reg32;
 710     }
 711 }
 712
 713 static void
 714 mips_supply_register (struct regcache *regcache,
 715                       int use_64bit, int regno, const union mips_register *reg)
 716 {
 717   int offset = 0;
 718
 719   /* For big-endian 32-bit targets, ignore the high four bytes of each
 720      eight-byte slot.  */
 721   if (__BYTE_ORDER == __BIG_ENDIAN && !use_64bit)
 722     offset = 4;
 723
 724   supply_register (regcache, regno, reg->buf + offset);
 725 }
 726
 727 #ifdef HAVE_PTRACE_GETREGS
 728
 729 static void
 730 mips_collect_register_32bit (struct regcache *regcache,
 731                              int use_64bit, int regno, unsigned char *buf)
 732 {
 733   union mips_register tmp_reg;
 734   int reg32;
 735
 736   mips_collect_register (regcache, use_64bit, regno, &tmp_reg);
 737   reg32 = tmp_reg.reg64;
 738   memcpy (buf, &reg32, 4);
 739 }
 740
 741 static void
 742 mips_supply_register_32bit (struct regcache *regcache,
 743                             int use_64bit, int regno, const unsigned char *buf)
 744 {
 745   union mips_register tmp_reg;
 746   int reg32;
 747
 748   memcpy (&reg32, buf, 4);
 749   tmp_reg.reg64 = reg32;
 750   mips_supply_register (regcache, use_64bit, regno, &tmp_reg);
 751 }
 752
 753 static void
 754 mips_fill_gregset (struct regcache *regcache, void *buf)
 755 {
 756   union mips_register *regset = (union mips_register *) buf;
 757   int i, use_64bit;
 758   const struct target_desc *tdesc = regcache->tdesc;
 759
 760   use_64bit = (register_size (tdesc, 0) == 8);
 761
 762   for (i = 1; i < 32; i++)
 763     mips_collect_register (regcache, use_64bit, i, regset + i);
 764
 765   mips_collect_register (regcache, use_64bit,
 766                          find_regno (tdesc, "lo"), regset + 32);
 767   mips_collect_register (regcache, use_64bit,
 768                          find_regno (tdesc, "hi"), regset + 33);
 769   mips_collect_register (regcache, use_64bit,
 770                          find_regno (tdesc, "pc"), regset + 34);
 771   mips_collect_register (regcache, use_64bit,
 772                          find_regno (tdesc, "badvaddr"), regset + 35);
 773   mips_collect_register (regcache, use_64bit,
 774                          find_regno (tdesc, "status"), regset + 36);
 775   mips_collect_register (regcache, use_64bit,
 776                          find_regno (tdesc, "cause"), regset + 37);
 777
 778   mips_collect_register (regcache, use_64bit,
 779                          find_regno (tdesc, "restart"), regset + 0);
 780 }
 781
 782 static void
 783 mips_store_gregset (struct regcache *regcache, const void *buf)
 784 {
 785   const union mips_register *regset = (const union mips_register *) buf;
 786   int i, use_64bit;
 787
 788   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 789
 790   supply_register_by_name_zeroed (regcache, "r0");
 791
 792   for (i = 1; i < 32; i++)
 793     mips_supply_register (regcache, use_64bit, i, regset + i);
 794
 795   mips_supply_register (regcache, use_64bit,
 796                         find_regno (regcache->tdesc, "lo"), regset + 32);
 797   mips_supply_register (regcache, use_64bit,
 798                         find_regno (regcache->tdesc, "hi"), regset + 33);
 799   mips_supply_register (regcache, use_64bit,
 800                         find_regno (regcache->tdesc, "pc"), regset + 34);
 801   mips_supply_register (regcache, use_64bit,
 802                         find_regno (regcache->tdesc, "badvaddr"), regset + 35);
 803   mips_supply_register (regcache, use_64bit,
 804                         find_regno (regcache->tdesc, "status"), regset + 36);
 805   mips_supply_register (regcache, use_64bit,
 806                         find_regno (regcache->tdesc, "cause"), regset + 37);
 807
 808   mips_supply_register (regcache, use_64bit,
 809                         find_regno (regcache->tdesc, "restart"), regset + 0);
 810 }
 811
 812 static void
 813 mips_fill_fpregset (struct regcache *regcache, void *buf)
 814 {
 815   union mips_register *regset = (union mips_register *) buf;
 816   int i, use_64bit, first_fp, big_endian;
 817
 818   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 819   first_fp = find_regno (regcache->tdesc, "f0");
 820   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 821
 822   /* See GDB for a discussion of this peculiar layout.  */
 823   for (i = 0; i < 32; i++)
 824     if (use_64bit)
 825       collect_register (regcache, first_fp + i, regset[i].buf);
 826     else
 827       collect_register (regcache, first_fp + i,
 828                         regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 829
 830   mips_collect_register_32bit (regcache, use_64bit,
 831                                find_regno (regcache->tdesc, "fcsr"), regset[32].buf);
 832   mips_collect_register_32bit (regcache, use_64bit,
 833                                find_regno (regcache->tdesc, "fir"),
 834                                regset[32].buf + 4);
 835 }
 836
 837 static void
 838 mips_store_fpregset (struct regcache *regcache, const void *buf)
 839 {
 840   const union mips_register *regset = (const union mips_register *) buf;
 841   int i, use_64bit, first_fp, big_endian;
 842
 843   use_64bit = (register_size (regcache->tdesc, 0) == 8);
 844   first_fp = find_regno (regcache->tdesc, "f0");
 845   big_endian = (__BYTE_ORDER == __BIG_ENDIAN);
 846
 847   /* See GDB for a discussion of this peculiar layout.  */
 848   for (i = 0; i < 32; i++)
 849     if (use_64bit)
 850       supply_register (regcache, first_fp + i, regset[i].buf);
 851     else
 852       supply_register (regcache, first_fp + i,
 853                        regset[i & ~1].buf + 4 * (big_endian != (i & 1)));
 854
 855   mips_supply_register_32bit (regcache, use_64bit,
 856                               find_regno (regcache->tdesc, "fcsr"),
 857                               regset[32].buf);
 858   mips_supply_register_32bit (regcache, use_64bit,
 859                               find_regno (regcache->tdesc, "fir"),
 860                               regset[32].buf + 4);
 861 }
 862 #endif /* HAVE_PTRACE_GETREGS */
 863
 864 /* Take care of 32-bit registers with 64-bit ptrace, POKEUSER side.  */
 865
 866 static void
 867 mips_collect_ptrace_register (struct regcache *regcache,
 868                               int regno, char *buf)
 869 {
 870   int use_64bit = sizeof (PTRACE_XFER_TYPE) == 8;
 871
 872   if (use_64bit && register_size (regcache->tdesc, regno) == 4)
 873     {
 874       union mips_register reg;
 875
 876       mips_collect_register (regcache, 0, regno, &reg);
 877       memcpy (buf, &reg, sizeof (reg));
 878     }
 879   else
 880     collect_register (regcache, regno, buf);
 881 }
 882
 883 /* Take care of 32-bit registers with 64-bit ptrace, PEEKUSER side.  */
 884
 885 static void
 886 mips_supply_ptrace_register (struct regcache *regcache,
 887                              int regno, const char *buf)
 888 {
 889   int use_64bit = sizeof (PTRACE_XFER_TYPE) == 8;
 890
 891   if (use_64bit && register_size (regcache->tdesc, regno) == 4)
 892     {
 893       union mips_register reg;
 894
 895       memcpy (&reg, buf, sizeof (reg));
 896       mips_supply_register (regcache, 0, regno, &reg);
 897     }
 898   else
 899     supply_register (regcache, regno, buf);
 900 }
 901
 902 static struct regset_info mips_regsets[] = {
 903 #ifdef HAVE_PTRACE_GETREGS
 904   { PTRACE_GETREGS, PTRACE_SETREGS, 0, 38 * 8, GENERAL_REGS,
 905     mips_fill_gregset, mips_store_gregset },
 906   { PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, 33 * 8, FP_REGS,
 907     mips_fill_fpregset, mips_store_fpregset },
 908 #endif /* HAVE_PTRACE_GETREGS */
 909   NULL_REGSET
 910 };
 911
 912 static struct regsets_info mips_regsets_info =
 913   {
 914     mips_regsets, /* regsets */
 915     0, /* num_regsets */
 916     NULL, /* disabled_regsets */
 917   };
 918
 919 static struct usrregs_info mips_dsp_usrregs_info =
 920   {
 921     mips_dsp_num_regs,
 922     mips_dsp_regmap,
 923   };
 924
 925 static struct usrregs_info mips_usrregs_info =
 926   {
 927     mips_num_regs,
 928     mips_regmap,
 929   };
 930
 931 static struct regs_info dsp_regs_info =
 932   {
 933     mips_dsp_regset_bitmap,
 934     &mips_dsp_usrregs_info,
 935     &mips_regsets_info
 936   };
 937
 938 static struct regs_info regs_info =
 939   {
 940     NULL, /* regset_bitmap */
 941     &mips_usrregs_info,
 942     &mips_regsets_info
 943   };
 944
 945 static const struct regs_info *
 946 mips_regs_info (void)
 947 {
 948   if (have_dsp)
 949     return &dsp_regs_info;
 950   else
 951     return &regs_info;
 952 }
 953
 954 struct linux_target_ops the_low_target = {
 955   mips_regs_info,
 956   mips_cannot_fetch_register,
 957   mips_cannot_store_register,
 958   mips_fetch_register,
 959   mips_get_pc,
 960   mips_set_pc,
 961   NULL, /* breakpoint_kind_from_pc */
 962   mips_sw_breakpoint_from_kind,
 963   NULL, /* get_next_pcs */
 964   0,
 965   mips_breakpoint_at,
 966   mips_supports_z_point_type,
 967   mips_insert_point,
 968   mips_remove_point,
 969   mips_stopped_by_watchpoint,
 970   mips_stopped_data_address,
 971   mips_collect_ptrace_register,
 972   mips_supply_ptrace_register,
 973   NULL, /* siginfo_fixup */
 974   mips_linux_new_process,
 975   mips_linux_delete_process,
 976   mips_linux_new_thread,
 977   mips_linux_delete_thread,
 978   mips_linux_new_fork,
 979   mips_linux_prepare_to_resume
 980 };
 981
 982 /* The linux target ops object.  */
 983
 984 linux_process_target *the_linux_target = &the_mips_target;
 985
 986 void
 987 initialize_low_arch (void)
 988 {
 989   /* Initialize the Linux target descriptions.  */
 990   init_registers_mips_linux ();
 991   init_registers_mips_dsp_linux ();
 992   init_registers_mips64_linux ();
 993   init_registers_mips64_dsp_linux ();
 994
 995   initialize_regsets_info (&mips_regsets_info);
 996 }