gdbserver/linux-low: turn 'sw_breakpoint_from_kind' into a method
[deliverable/binutils-gdb.git] / gdbserver / linux-tic6x-low.cc
1 /* Target dependent code for GDB on TI C6x systems.
2
3 Copyright (C) 2010-2020 Free Software Foundation, Inc.
4 Contributed by Andrew Jenner <andrew@codesourcery.com>
5 Contributed by Yao Qi <yao@codesourcery.com>
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "server.h"
23 #include "linux-low.h"
24 #include "arch/tic6x.h"
25 #include "tdesc.h"
26
27 #include "nat/gdb_ptrace.h"
28 #include <endian.h>
29
30 #include "gdb_proc_service.h"
31
32 #ifndef PTRACE_GET_THREAD_AREA
33 #define PTRACE_GET_THREAD_AREA 25
34 #endif
35
36 /* There are at most 69 registers accessible in ptrace. */
37 #define TIC6X_NUM_REGS 69
38
39 #include <asm/ptrace.h>
40
41 /* Linux target op definitions for the TI C6x architecture. */
42
43 class tic6x_target : public linux_process_target
44 {
45 public:
46
47 const regs_info *get_regs_info () override;
48
49 const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
50
51 protected:
52
53 void low_arch_setup () override;
54
55 bool low_cannot_fetch_register (int regno) override;
56
57 bool low_cannot_store_register (int regno) override;
58
59 bool low_supports_breakpoints () override;
60
61 CORE_ADDR low_get_pc (regcache *regcache) override;
62
63 void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
64 };
65
66 /* The singleton target ops object. */
67
68 static tic6x_target the_tic6x_target;
69
70 /* Defined in auto-generated file tic6x-c64xp-linux.c. */
71 void init_registers_tic6x_c64xp_linux (void);
72 extern const struct target_desc *tdesc_tic6x_c64xp_linux;
73
74 /* Defined in auto-generated file tic6x-c64x-linux.c. */
75 void init_registers_tic6x_c64x_linux (void);
76 extern const struct target_desc *tdesc_tic6x_c64x_linux;
77
78 /* Defined in auto-generated file tic62x-c6xp-linux.c. */
79 void init_registers_tic6x_c62x_linux (void);
80 extern const struct target_desc *tdesc_tic6x_c62x_linux;
81
82 union tic6x_register
83 {
84 unsigned char buf[4];
85
86 int reg32;
87 };
88
89 /* Return the ptrace ``address'' of register REGNO. */
90
91 #if __BYTE_ORDER == __BIG_ENDIAN
92 static int tic6x_regmap_c64xp[] = {
93 /* A0 - A15 */
94 53, 52, 55, 54, 57, 56, 59, 58,
95 61, 60, 63, 62, 65, 64, 67, 66,
96 /* B0 - B15 */
97 23, 22, 25, 24, 27, 26, 29, 28,
98 31, 30, 33, 32, 35, 34, 69, 68,
99 /* CSR PC */
100 5, 4,
101 /* A16 - A31 */
102 37, 36, 39, 38, 41, 40, 43, 42,
103 45, 44, 47, 46, 49, 48, 51, 50,
104 /* B16 - B31 */
105 7, 6, 9, 8, 11, 10, 13, 12,
106 15, 14, 17, 16, 19, 18, 21, 20,
107 /* TSR, ILC, RILC */
108 1, 2, 3
109 };
110
111 static int tic6x_regmap_c64x[] = {
112 /* A0 - A15 */
113 51, 50, 53, 52, 55, 54, 57, 56,
114 59, 58, 61, 60, 63, 62, 65, 64,
115 /* B0 - B15 */
116 21, 20, 23, 22, 25, 24, 27, 26,
117 29, 28, 31, 30, 33, 32, 67, 66,
118 /* CSR PC */
119 3, 2,
120 /* A16 - A31 */
121 35, 34, 37, 36, 39, 38, 41, 40,
122 43, 42, 45, 44, 47, 46, 49, 48,
123 /* B16 - B31 */
124 5, 4, 7, 6, 9, 8, 11, 10,
125 13, 12, 15, 14, 17, 16, 19, 18,
126 -1, -1, -1
127 };
128
129 static int tic6x_regmap_c62x[] = {
130 /* A0 - A15 */
131 19, 18, 21, 20, 23, 22, 25, 24,
132 27, 26, 29, 28, 31, 30, 33, 32,
133 /* B0 - B15 */
134 5, 4, 7, 6, 9, 8, 11, 10,
135 13, 12, 15, 14, 17, 16, 35, 34,
136 /* CSR, PC */
137 3, 2,
138 -1, -1, -1, -1, -1, -1, -1, -1,
139 -1, -1, -1, -1, -1, -1, -1, -1,
140 -1, -1, -1, -1, -1, -1, -1, -1,
141 -1, -1, -1, -1, -1, -1, -1, -1,
142 -1, -1, -1
143 };
144
145 #else
146 static int tic6x_regmap_c64xp[] = {
147 /* A0 - A15 */
148 52, 53, 54, 55, 56, 57, 58, 59,
149 60, 61, 62, 63, 64, 65, 66, 67,
150 /* B0 - B15 */
151 22, 23, 24, 25, 26, 27, 28, 29,
152 30, 31, 32, 33, 34, 35, 68, 69,
153 /* CSR PC */
154 4, 5,
155 /* A16 - A31 */
156 36, 37, 38, 39, 40, 41, 42, 43,
157 44, 45, 46, 47, 48, 49, 50, 51,
158 /* B16 -B31 */
159 6, 7, 8, 9, 10, 11, 12, 13,
160 14, 15, 16, 17, 18, 19, 20, 31,
161 /* TSR, ILC, RILC */
162 0, 3, 2
163 };
164
165 static int tic6x_regmap_c64x[] = {
166 /* A0 - A15 */
167 50, 51, 52, 53, 54, 55, 56, 57,
168 58, 59, 60, 61, 62, 63, 64, 65,
169 /* B0 - B15 */
170 20, 21, 22, 23, 24, 25, 26, 27,
171 28, 29, 30, 31, 32, 33, 66, 67,
172 /* CSR PC */
173 2, 3,
174 /* A16 - A31 */
175 34, 35, 36, 37, 38, 39, 40, 41,
176 42, 43, 44, 45, 46, 47, 48, 49,
177 /* B16 - B31 */
178 4, 5, 6, 7, 8, 9, 10, 11,
179 12, 13, 14, 15, 16, 17, 18, 19,
180 -1, -1, -1
181 };
182
183 static int tic6x_regmap_c62x[] = {
184 /* A0 - A15 */
185 18, 19, 20, 21, 22, 23, 24, 25,
186 26, 27, 28, 29, 30, 31, 32, 33,
187 /* B0 - B15 */
188 4, 5, 6, 7, 8, 9, 10, 11,
189 12, 13, 14, 15, 16, 17, 34, 35,
190 /* CSR PC */
191 2, 3,
192 -1, -1, -1, -1, -1, -1, -1, -1,
193 -1, -1, -1, -1, -1, -1, -1, -1,
194 -1, -1, -1, -1, -1, -1, -1, -1,
195 -1, -1, -1, -1, -1, -1, -1, -1,
196 -1, -1, -1
197 };
198
199 #endif
200
201 extern struct linux_target_ops the_low_target;
202
203 static int *tic6x_regmap;
204 static unsigned int tic6x_breakpoint;
205 #define tic6x_breakpoint_len 4
206
207 /* Implementation of target ops method "sw_breakpoint_from_kind". */
208
209 const gdb_byte *
210 tic6x_target::sw_breakpoint_from_kind (int kind, int *size)
211 {
212 *size = tic6x_breakpoint_len;
213 return (const gdb_byte *) &tic6x_breakpoint;
214 }
215
216 static struct usrregs_info tic6x_usrregs_info =
217 {
218 TIC6X_NUM_REGS,
219 NULL, /* Set in tic6x_read_description. */
220 };
221
222 static const struct target_desc *
223 tic6x_read_description (enum c6x_feature feature)
224 {
225 static target_desc *tdescs[C6X_LAST] = { };
226 struct target_desc **tdesc = &tdescs[feature];
227
228 if (*tdesc == NULL)
229 {
230 *tdesc = tic6x_create_target_description (feature);
231 static const char *expedite_regs[] = { "A15", "PC", NULL };
232 init_target_desc (*tdesc, expedite_regs);
233 }
234
235 return *tdesc;
236 }
237
238 bool
239 tic6x_target::low_cannot_fetch_register (int regno)
240 {
241 return (tic6x_regmap[regno] == -1);
242 }
243
244 bool
245 tic6x_target::low_cannot_store_register (int regno)
246 {
247 return (tic6x_regmap[regno] == -1);
248 }
249
250 bool
251 tic6x_target::low_supports_breakpoints ()
252 {
253 return true;
254 }
255
256 CORE_ADDR
257 tic6x_target::low_get_pc (regcache *regcache)
258 {
259 union tic6x_register pc;
260
261 collect_register_by_name (regcache, "PC", pc.buf);
262 return pc.reg32;
263 }
264
265 void
266 tic6x_target::low_set_pc (regcache *regcache, CORE_ADDR pc)
267 {
268 union tic6x_register newpc;
269
270 newpc.reg32 = pc;
271 supply_register_by_name (regcache, "PC", newpc.buf);
272 }
273
274 static int
275 tic6x_breakpoint_at (CORE_ADDR where)
276 {
277 unsigned int insn;
278
279 the_target->read_memory (where, (unsigned char *) &insn, 4);
280 if (insn == tic6x_breakpoint)
281 return 1;
282
283 /* If necessary, recognize more trap instructions here. GDB only uses the
284 one. */
285 return 0;
286 }
287
288 /* Fetch the thread-local storage pointer for libthread_db. */
289
290 ps_err_e
291 ps_get_thread_area (struct ps_prochandle *ph,
292 lwpid_t lwpid, int idx, void **base)
293 {
294 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
295 return PS_ERR;
296
297 /* IDX is the bias from the thread pointer to the beginning of the
298 thread descriptor. It has to be subtracted due to implementation
299 quirks in libthread_db. */
300 *base = (void *) ((char *) *base - idx);
301
302 return PS_OK;
303 }
304
305 static void
306 tic6x_collect_register (struct regcache *regcache, int regno,
307 union tic6x_register *reg)
308 {
309 union tic6x_register tmp_reg;
310
311 collect_register (regcache, regno, &tmp_reg.reg32);
312 reg->reg32 = tmp_reg.reg32;
313 }
314
315 static void
316 tic6x_supply_register (struct regcache *regcache, int regno,
317 const union tic6x_register *reg)
318 {
319 int offset = 0;
320
321 supply_register (regcache, regno, reg->buf + offset);
322 }
323
324 static void
325 tic6x_fill_gregset (struct regcache *regcache, void *buf)
326 {
327 auto regset = static_cast<union tic6x_register *> (buf);
328 int i;
329
330 for (i = 0; i < TIC6X_NUM_REGS; i++)
331 if (tic6x_regmap[i] != -1)
332 tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]);
333 }
334
335 static void
336 tic6x_store_gregset (struct regcache *regcache, const void *buf)
337 {
338 const auto regset = static_cast<const union tic6x_register *> (buf);
339 int i;
340
341 for (i = 0; i < TIC6X_NUM_REGS; i++)
342 if (tic6x_regmap[i] != -1)
343 tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]);
344 }
345
346 static struct regset_info tic6x_regsets[] = {
347 { PTRACE_GETREGS, PTRACE_SETREGS, 0, TIC6X_NUM_REGS * 4, GENERAL_REGS,
348 tic6x_fill_gregset, tic6x_store_gregset },
349 NULL_REGSET
350 };
351
352 void
353 tic6x_target::low_arch_setup ()
354 {
355 register unsigned int csr asm ("B2");
356 unsigned int cpuid;
357 enum c6x_feature feature = C6X_CORE;
358
359 /* Determine the CPU we're running on to find the register order. */
360 __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :);
361 cpuid = csr >> 24;
362 switch (cpuid)
363 {
364 case 0x00: /* C62x */
365 case 0x02: /* C67x */
366 tic6x_regmap = tic6x_regmap_c62x;
367 tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
368 feature = C6X_CORE;
369 break;
370 case 0x03: /* C67x+ */
371 tic6x_regmap = tic6x_regmap_c64x;
372 tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
373 feature = C6X_GP;
374 break;
375 case 0x0c: /* C64x */
376 tic6x_regmap = tic6x_regmap_c64x;
377 tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
378 feature = C6X_GP;
379 break;
380 case 0x10: /* C64x+ */
381 case 0x14: /* C674x */
382 case 0x15: /* C66x */
383 tic6x_regmap = tic6x_regmap_c64xp;
384 tic6x_breakpoint = 0x56454314; /* illegal opcode */
385 feature = C6X_C6XP;
386 break;
387 default:
388 error ("Unknown CPU ID 0x%02x", cpuid);
389 }
390 tic6x_usrregs_info.regmap = tic6x_regmap;
391
392 current_process ()->tdesc = tic6x_read_description (feature);
393 }
394
395 /* Support for hardware single step. */
396
397 static int
398 tic6x_supports_hardware_single_step (void)
399 {
400 return 1;
401 }
402
403 static struct regsets_info tic6x_regsets_info =
404 {
405 tic6x_regsets, /* regsets */
406 0, /* num_regsets */
407 NULL, /* disabled_regsets */
408 };
409
410 static struct regs_info myregs_info =
411 {
412 NULL, /* regset_bitmap */
413 &tic6x_usrregs_info,
414 &tic6x_regsets_info
415 };
416
417 const regs_info *
418 tic6x_target::get_regs_info ()
419 {
420 return &myregs_info;
421 }
422
423 struct linux_target_ops the_low_target = {
424 NULL,
425 0,
426 tic6x_breakpoint_at,
427 NULL, /* supports_z_point_type */
428 NULL, /* insert_point */
429 NULL, /* remove_point */
430 NULL, /* stopped_by_watchpoint */
431 NULL, /* stopped_data_address */
432 NULL, /* collect_ptrace_register */
433 NULL, /* supply_ptrace_register */
434 NULL, /* siginfo_fixup */
435 NULL, /* new_process */
436 NULL, /* delete_process */
437 NULL, /* new_thread */
438 NULL, /* delete_thread */
439 NULL, /* new_fork */
440 NULL, /* prepare_to_resume */
441 NULL, /* process_qsupported */
442 NULL, /* supports_tracepoints */
443 NULL, /* get_thread_area */
444 NULL, /* install_fast_tracepoint_jump_pad */
445 NULL, /* emit_ops */
446 NULL, /* get_min_fast_tracepoint_insn_len */
447 NULL, /* supports_range_stepping */
448 tic6x_supports_hardware_single_step,
449 };
450
451 #if GDB_SELF_TEST
452 #include "gdbsupport/selftest.h"
453
454 namespace selftests {
455 namespace tdesc {
456 static void
457 tic6x_tdesc_test ()
458 {
459 SELF_CHECK (*tdesc_tic6x_c62x_linux == *tic6x_read_description (C6X_CORE));
460 SELF_CHECK (*tdesc_tic6x_c64x_linux == *tic6x_read_description (C6X_GP));
461 SELF_CHECK (*tdesc_tic6x_c64xp_linux == *tic6x_read_description (C6X_C6XP));
462 }
463 }
464 }
465 #endif
466
467 /* The linux target ops object. */
468
469 linux_process_target *the_linux_target = &the_tic6x_target;
470
471 void
472 initialize_low_arch (void)
473 {
474 #if GDB_SELF_TEST
475 /* Initialize the Linux target descriptions. */
476 init_registers_tic6x_c64xp_linux ();
477 init_registers_tic6x_c64x_linux ();
478 init_registers_tic6x_c62x_linux ();
479
480 selftests::register_test ("tic6x-tdesc", selftests::tdesc::tic6x_tdesc_test);
481 #endif
482
483 initialize_regsets_info (&tic6x_regsets_info);
484 }
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