gdbserver/linux-tic6x-low.cc

   1 /* Target dependent code for GDB on TI C6x systems.
   2
   3    Copyright (C) 2010-2020 Free Software Foundation, Inc.
   4    Contributed by Andrew Jenner <andrew@codesourcery.com>
   5    Contributed by Yao Qi <yao@codesourcery.com>
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22 #include "server.h"
  23 #include "linux-low.h"
  24 #include "arch/tic6x.h"
  25 #include "tdesc.h"
  26
  27 #include "nat/gdb_ptrace.h"
  28 #include <endian.h>
  29
  30 #include "gdb_proc_service.h"
  31
  32 #ifndef PTRACE_GET_THREAD_AREA
  33 #define PTRACE_GET_THREAD_AREA 25
  34 #endif
  35
  36 /* There are at most 69 registers accessible in ptrace.  */
  37 #define TIC6X_NUM_REGS 69
  38
  39 #include <asm/ptrace.h>
  40
  41 /* Defined in auto-generated file tic6x-c64xp-linux.c.  */
  42 void init_registers_tic6x_c64xp_linux (void);
  43 extern const struct target_desc *tdesc_tic6x_c64xp_linux;
  44
  45 /* Defined in auto-generated file tic6x-c64x-linux.c.  */
  46 void init_registers_tic6x_c64x_linux (void);
  47 extern const struct target_desc *tdesc_tic6x_c64x_linux;
  48
  49 /* Defined in auto-generated file tic62x-c6xp-linux.c.  */
  50 void init_registers_tic6x_c62x_linux (void);
  51 extern const struct target_desc *tdesc_tic6x_c62x_linux;
  52
  53 union tic6x_register
  54 {
  55   unsigned char buf[4];
  56
  57   int reg32;
  58 };
  59
  60 /* Return the ptrace ``address'' of register REGNO.  */
  61
  62 #if __BYTE_ORDER == __BIG_ENDIAN
  63 static int tic6x_regmap_c64xp[] = {
  64   /* A0 - A15 */
  65   53, 52, 55, 54, 57, 56, 59, 58,
  66   61, 60, 63, 62, 65, 64, 67, 66,
  67   /* B0 - B15 */
  68   23, 22, 25, 24, 27, 26, 29, 28,
  69   31, 30, 33, 32, 35, 34, 69, 68,
  70   /* CSR PC */
  71   5, 4,
  72   /* A16 - A31 */
  73   37, 36, 39, 38, 41, 40, 43, 42,
  74   45, 44, 47, 46, 49, 48, 51, 50,
  75   /* B16 - B31 */
  76   7,  6,  9,  8,  11, 10, 13, 12,
  77   15, 14, 17, 16, 19, 18, 21, 20,
  78   /* TSR, ILC, RILC */
  79   1,  2, 3
  80 };
  81
  82 static int tic6x_regmap_c64x[] = {
  83   /* A0 - A15 */
  84   51, 50, 53, 52, 55, 54, 57, 56,
  85   59, 58, 61, 60, 63, 62, 65, 64,
  86   /* B0 - B15 */
  87   21, 20, 23, 22, 25, 24, 27, 26,
  88   29, 28, 31, 30, 33, 32, 67, 66,
  89   /* CSR PC */
  90   3,  2,
  91   /* A16 - A31 */
  92   35, 34, 37, 36, 39, 38, 41, 40,
  93   43, 42, 45, 44, 47, 46, 49, 48,
  94   /* B16 - B31 */
  95   5,  4,  7,  6,  9,  8,  11, 10,
  96   13, 12, 15, 14, 17, 16, 19, 18,
  97   -1, -1, -1
  98 };
  99
 100 static int tic6x_regmap_c62x[] = {
 101   /* A0 - A15 */
 102   19, 18, 21, 20, 23, 22, 25, 24,
 103   27, 26, 29, 28, 31, 30, 33, 32,
 104   /* B0 - B15 */
 105    5,  4,  7,  6,  9,  8, 11, 10,
 106   13, 12, 15, 14, 17, 16, 35, 34,
 107   /* CSR, PC */
 108   3, 2,
 109   -1, -1, -1, -1, -1, -1, -1, -1,
 110   -1, -1, -1, -1, -1, -1, -1, -1,
 111   -1, -1, -1, -1, -1, -1, -1, -1,
 112   -1, -1, -1, -1, -1, -1, -1, -1,
 113   -1, -1, -1
 114 };
 115
 116 #else
 117 static int tic6x_regmap_c64xp[] = {
 118   /* A0 - A15 */
 119   52, 53, 54, 55, 56, 57, 58, 59,
 120   60, 61, 62, 63, 64, 65, 66, 67,
 121   /* B0 - B15 */
 122   22, 23, 24, 25, 26, 27, 28, 29,
 123   30, 31, 32, 33, 34, 35, 68, 69,
 124   /* CSR PC */
 125    4,  5,
 126   /* A16 - A31 */
 127   36, 37, 38, 39, 40, 41, 42, 43,
 128   44, 45, 46, 47, 48, 49, 50, 51,
 129   /* B16 -B31 */
 130    6,  7,  8,  9, 10, 11, 12, 13,
 131   14, 15, 16, 17, 18, 19, 20, 31,
 132   /* TSR, ILC, RILC */
 133   0,  3, 2
 134 };
 135
 136 static int tic6x_regmap_c64x[] = {
 137   /* A0 - A15 */
 138   50, 51, 52, 53, 54, 55, 56, 57,
 139   58, 59, 60, 61, 62, 63, 64, 65,
 140   /* B0 - B15 */
 141   20, 21, 22, 23, 24, 25, 26, 27,
 142   28, 29, 30, 31, 32, 33, 66, 67,
 143   /* CSR PC */
 144   2,  3,
 145   /* A16 - A31 */
 146   34, 35, 36, 37, 38, 39, 40, 41,
 147   42, 43, 44, 45, 46, 47, 48, 49,
 148   /* B16 - B31 */
 149   4,  5,  6,  7,  8,  9,  10, 11,
 150   12, 13, 14, 15, 16, 17, 18, 19,
 151   -1, -1, -1
 152 };
 153
 154 static int tic6x_regmap_c62x[] = {
 155   /* A0 - A15 */
 156   18, 19, 20, 21, 22, 23, 24, 25,
 157   26, 27, 28, 29, 30, 31, 32, 33,
 158   /* B0 - B15 */
 159   4,  5,  6,  7,  8,  9, 10, 11,
 160   12, 13, 14, 15, 16, 17, 34, 35,
 161   /* CSR PC */
 162   2,  3,
 163   -1, -1, -1, -1, -1, -1, -1, -1,
 164   -1, -1, -1, -1, -1, -1, -1, -1,
 165   -1, -1, -1, -1, -1, -1, -1, -1,
 166   -1, -1, -1, -1, -1, -1, -1, -1,
 167   -1, -1, -1
 168 };
 169
 170 #endif
 171
 172 extern struct linux_target_ops the_low_target;
 173
 174 static int *tic6x_regmap;
 175 static unsigned int tic6x_breakpoint;
 176 #define tic6x_breakpoint_len 4
 177
 178 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 179
 180 static const gdb_byte *
 181 tic6x_sw_breakpoint_from_kind (int kind, int *size)
 182 {
 183   *size = tic6x_breakpoint_len;
 184   return (const gdb_byte *) &tic6x_breakpoint;
 185 }
 186
 187 static struct usrregs_info tic6x_usrregs_info =
 188   {
 189     TIC6X_NUM_REGS,
 190     NULL, /* Set in tic6x_read_description.  */
 191   };
 192
 193 static const struct target_desc *
 194 tic6x_read_description (enum c6x_feature feature)
 195 {
 196   static target_desc *tdescs[C6X_LAST] = { };
 197   struct target_desc **tdesc = &tdescs[feature];
 198
 199   if (*tdesc == NULL)
 200     {
 201       *tdesc = tic6x_create_target_description (feature);
 202       static const char *expedite_regs[] = { "A15", "PC", NULL };
 203       init_target_desc (*tdesc, expedite_regs);
 204     }
 205
 206   return *tdesc;
 207 }
 208
 209 static int
 210 tic6x_cannot_fetch_register (int regno)
 211 {
 212   return (tic6x_regmap[regno] == -1);
 213 }
 214
 215 static int
 216 tic6x_cannot_store_register (int regno)
 217 {
 218   return (tic6x_regmap[regno] == -1);
 219 }
 220
 221 static CORE_ADDR
 222 tic6x_get_pc (struct regcache *regcache)
 223 {
 224   union tic6x_register pc;
 225
 226   collect_register_by_name (regcache, "PC", pc.buf);
 227   return pc.reg32;
 228 }
 229
 230 static void
 231 tic6x_set_pc (struct regcache *regcache, CORE_ADDR pc)
 232 {
 233   union tic6x_register newpc;
 234
 235   newpc.reg32 = pc;
 236   supply_register_by_name (regcache, "PC", newpc.buf);
 237 }
 238
 239 static int
 240 tic6x_breakpoint_at (CORE_ADDR where)
 241 {
 242   unsigned int insn;
 243
 244   the_target->pt->read_memory (where, (unsigned char *) &insn, 4);
 245   if (insn == tic6x_breakpoint)
 246     return 1;
 247
 248   /* If necessary, recognize more trap instructions here.  GDB only uses the
 249      one.  */
 250   return 0;
 251 }
 252
 253 /* Fetch the thread-local storage pointer for libthread_db.  */
 254
 255 ps_err_e
 256 ps_get_thread_area (struct ps_prochandle *ph,
 257                     lwpid_t lwpid, int idx, void **base)
 258 {
 259   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 260     return PS_ERR;
 261
 262   /* IDX is the bias from the thread pointer to the beginning of the
 263      thread descriptor.  It has to be subtracted due to implementation
 264      quirks in libthread_db.  */
 265   *base = (void *) ((char *) *base - idx);
 266
 267   return PS_OK;
 268 }
 269
 270 static void
 271 tic6x_collect_register (struct regcache *regcache, int regno,
 272                         union tic6x_register *reg)
 273 {
 274   union tic6x_register tmp_reg;
 275
 276   collect_register (regcache, regno, &tmp_reg.reg32);
 277   reg->reg32 = tmp_reg.reg32;
 278 }
 279
 280 static void
 281 tic6x_supply_register (struct regcache *regcache, int regno,
 282                        const union tic6x_register *reg)
 283 {
 284   int offset = 0;
 285
 286   supply_register (regcache, regno, reg->buf + offset);
 287 }
 288
 289 static void
 290 tic6x_fill_gregset (struct regcache *regcache, void *buf)
 291 {
 292   auto regset = static_cast<union tic6x_register *> (buf);
 293   int i;
 294
 295   for (i = 0; i < TIC6X_NUM_REGS; i++)
 296     if (tic6x_regmap[i] != -1)
 297       tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]);
 298 }
 299
 300 static void
 301 tic6x_store_gregset (struct regcache *regcache, const void *buf)
 302 {
 303   const auto regset = static_cast<const union tic6x_register *> (buf);
 304   int i;
 305
 306   for (i = 0; i < TIC6X_NUM_REGS; i++)
 307     if (tic6x_regmap[i] != -1)
 308       tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]);
 309 }
 310
 311 static struct regset_info tic6x_regsets[] = {
 312   { PTRACE_GETREGS, PTRACE_SETREGS, 0, TIC6X_NUM_REGS * 4, GENERAL_REGS,
 313     tic6x_fill_gregset, tic6x_store_gregset },
 314   NULL_REGSET
 315 };
 316
 317 static void
 318 tic6x_arch_setup (void)
 319 {
 320   register unsigned int csr asm ("B2");
 321   unsigned int cpuid;
 322   enum c6x_feature feature = C6X_CORE;
 323
 324   /* Determine the CPU we're running on to find the register order.  */
 325   __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :);
 326   cpuid = csr >> 24;
 327   switch (cpuid)
 328     {
 329     case 0x00: /* C62x */
 330     case 0x02: /* C67x */
 331       tic6x_regmap = tic6x_regmap_c62x;
 332       tic6x_breakpoint = 0x0000a122;  /* BNOP .S2 0,5 */
 333       feature = C6X_CORE;
 334       break;
 335     case 0x03: /* C67x+ */
 336       tic6x_regmap = tic6x_regmap_c64x;
 337       tic6x_breakpoint = 0x0000a122;  /* BNOP .S2 0,5 */
 338       feature = C6X_GP;
 339       break;
 340     case 0x0c: /* C64x */
 341       tic6x_regmap = tic6x_regmap_c64x;
 342       tic6x_breakpoint = 0x0000a122;  /* BNOP .S2 0,5 */
 343       feature = C6X_GP;
 344       break;
 345     case 0x10: /* C64x+ */
 346     case 0x14: /* C674x */
 347     case 0x15: /* C66x */
 348       tic6x_regmap = tic6x_regmap_c64xp;
 349       tic6x_breakpoint = 0x56454314;  /* illegal opcode */
 350       feature = C6X_C6XP;
 351       break;
 352     default:
 353       error ("Unknown CPU ID 0x%02x", cpuid);
 354     }
 355   tic6x_usrregs_info.regmap = tic6x_regmap;
 356
 357   current_process ()->tdesc = tic6x_read_description (feature);
 358 }
 359
 360 /* Support for hardware single step.  */
 361
 362 static int
 363 tic6x_supports_hardware_single_step (void)
 364 {
 365   return 1;
 366 }
 367
 368 static struct regsets_info tic6x_regsets_info =
 369   {
 370     tic6x_regsets, /* regsets */
 371     0, /* num_regsets */
 372     NULL, /* disabled_regsets */
 373   };
 374
 375 static struct regs_info regs_info =
 376   {
 377     NULL, /* regset_bitmap */
 378     &tic6x_usrregs_info,
 379     &tic6x_regsets_info
 380   };
 381
 382 static const struct regs_info *
 383 tic6x_regs_info (void)
 384 {
 385   return &regs_info;
 386 }
 387
 388 struct linux_target_ops the_low_target = {
 389   tic6x_arch_setup,
 390   tic6x_regs_info,
 391   tic6x_cannot_fetch_register,
 392   tic6x_cannot_store_register,
 393   NULL, /* fetch_register */
 394   tic6x_get_pc,
 395   tic6x_set_pc,
 396   NULL, /* breakpoint_kind_from_pc */
 397   tic6x_sw_breakpoint_from_kind,
 398   NULL,
 399   0,
 400   tic6x_breakpoint_at,
 401   NULL, /* supports_z_point_type */
 402   NULL, /* insert_point */
 403   NULL, /* remove_point */
 404   NULL, /* stopped_by_watchpoint */
 405   NULL, /* stopped_data_address */
 406   NULL, /* collect_ptrace_register */
 407   NULL, /* supply_ptrace_register */
 408   NULL, /* siginfo_fixup */
 409   NULL, /* new_process */
 410   NULL, /* delete_process */
 411   NULL, /* new_thread */
 412   NULL, /* delete_thread */
 413   NULL, /* new_fork */
 414   NULL, /* prepare_to_resume */
 415   NULL, /* process_qsupported */
 416   NULL, /* supports_tracepoints */
 417   NULL, /* get_thread_area */
 418   NULL, /* install_fast_tracepoint_jump_pad */
 419   NULL, /* emit_ops */
 420   NULL, /* get_min_fast_tracepoint_insn_len */
 421   NULL, /* supports_range_stepping */
 422   NULL, /* breakpoint_kind_from_current_state */
 423   tic6x_supports_hardware_single_step,
 424 };
 425
 426 #if GDB_SELF_TEST
 427 #include "gdbsupport/selftest.h"
 428
 429 namespace selftests {
 430 namespace tdesc {
 431 static void
 432 tic6x_tdesc_test ()
 433 {
 434   SELF_CHECK (*tdesc_tic6x_c62x_linux == *tic6x_read_description (C6X_CORE));
 435   SELF_CHECK (*tdesc_tic6x_c64x_linux == *tic6x_read_description (C6X_GP));
 436   SELF_CHECK (*tdesc_tic6x_c64xp_linux == *tic6x_read_description (C6X_C6XP));
 437 }
 438 }
 439 }
 440 #endif
 441
 442 void
 443 initialize_low_arch (void)
 444 {
 445 #if GDB_SELF_TEST
 446   /* Initialize the Linux target descriptions.  */
 447   init_registers_tic6x_c64xp_linux ();
 448   init_registers_tic6x_c64x_linux ();
 449   init_registers_tic6x_c62x_linux ();
 450
 451   selftests::register_test ("tic6x-tdesc", selftests::tdesc::tic6x_tdesc_test);
 452 #endif
 453
 454   initialize_regsets_info (&tic6x_regsets_info);
 455 }