gdbserver/linux-xtensa-low.cc

   1 /* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB.
   2    Copyright (C) 2007-2020 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19
  20 #include "server.h"
  21 #include "linux-low.h"
  22
  23 /* Linux target op definitions for the Xtensa architecture.  */
  24
  25 class xtensa_target : public linux_process_target
  26 {
  27 public:
  28
  29   const regs_info *get_regs_info () override;
  30
  31 protected:
  32
  33   void low_arch_setup () override;
  34
  35   bool low_cannot_fetch_register (int regno) override;
  36
  37   bool low_cannot_store_register (int regno) override;
  38
  39   bool low_supports_breakpoints () override;
  40
  41   CORE_ADDR low_get_pc (regcache *regcache) override;
  42
  43   void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
  44 };
  45
  46 /* The singleton target ops object.  */
  47
  48 static xtensa_target the_xtensa_target;
  49
  50 bool
  51 xtensa_target::low_cannot_fetch_register (int regno)
  52 {
  53   gdb_assert_not_reached ("linux target op low_cannot_fetch_register "
  54                           "is not implemented by the target");
  55 }
  56
  57 bool
  58 xtensa_target::low_cannot_store_register (int regno)
  59 {
  60   gdb_assert_not_reached ("linux target op low_cannot_store_register "
  61                           "is not implemented by the target");
  62 }
  63
  64 bool
  65 xtensa_target::low_supports_breakpoints ()
  66 {
  67   return true;
  68 }
  69
  70 CORE_ADDR
  71 xtensa_target::low_get_pc (regcache *regcache)
  72 {
  73   return linux_get_pc_32bit (regcache);
  74 }
  75
  76 void
  77 xtensa_target::low_set_pc (regcache *regcache, CORE_ADDR pc)
  78 {
  79   linux_set_pc_32bit (regcache, pc);
  80 }
  81
  82 /* Defined in auto-generated file reg-xtensa.c.  */
  83 void init_registers_xtensa (void);
  84 extern const struct target_desc *tdesc_xtensa;
  85
  86 #include <asm/ptrace.h>
  87 #include <xtensa-config.h>
  88 #include "arch/xtensa.h"
  89 #include "gdb_proc_service.h"
  90
  91 #include "xtensa-xtregs.c"
  92
  93 enum regnum {
  94         R_PC=0, R_PS,
  95         R_LBEG, R_LEND, R_LCOUNT,
  96         R_SAR,
  97         R_WS, R_WB,
  98         R_THREADPTR,
  99         R_A0 = 64
 100 };
 101
 102 static void
 103 xtensa_fill_gregset (struct regcache *regcache, void *buf)
 104 {
 105   elf_greg_t* rset = (elf_greg_t*)buf;
 106   const struct target_desc *tdesc = regcache->tdesc;
 107   int ar0_regnum;
 108   char *ptr;
 109   int i;
 110
 111   /* Take care of AR registers.  */
 112
 113   ar0_regnum = find_regno (tdesc, "ar0");
 114   ptr = (char*)&rset[R_A0];
 115
 116   for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
 117     {
 118       collect_register (regcache, i, ptr);
 119       ptr += register_size (tdesc, i);
 120     }
 121
 122   if (XSHAL_ABI == XTHAL_ABI_CALL0)
 123     {
 124       int a0_regnum = find_regno (tdesc, "a0");
 125       ptr = (char *) &rset[R_A0 + 4 * rset[R_WB]];
 126
 127       for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
 128         {
 129           if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
 130             ptr = (char *) &rset[R_A0];
 131           collect_register (regcache, i, ptr);
 132           ptr += register_size (tdesc, i);
 133         }
 134     }
 135
 136   /* Loop registers, if hardware has it.  */
 137
 138 #if XCHAL_HAVE_LOOPS
 139   collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
 140   collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
 141   collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
 142 #endif
 143
 144   collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
 145   collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
 146   collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
 147   collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
 148   collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
 149
 150 #if XCHAL_HAVE_THREADPTR
 151   collect_register_by_name (regcache, "threadptr",
 152                             (char *) &rset[R_THREADPTR]);
 153 #endif
 154 }
 155
 156 static void
 157 xtensa_store_gregset (struct regcache *regcache, const void *buf)
 158 {
 159   const elf_greg_t* rset = (const elf_greg_t*)buf;
 160   const struct target_desc *tdesc = regcache->tdesc;
 161   int ar0_regnum;
 162   char *ptr;
 163   int i;
 164
 165   /* Take care of AR registers.  */
 166
 167   ar0_regnum = find_regno (tdesc, "ar0");
 168   ptr = (char *)&rset[R_A0];
 169
 170   for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
 171     {
 172       supply_register (regcache, i, ptr);
 173       ptr += register_size (tdesc, i);
 174     }
 175
 176   if (XSHAL_ABI == XTHAL_ABI_CALL0)
 177     {
 178       int a0_regnum = find_regno (tdesc, "a0");
 179       ptr = (char *) &rset[R_A0 + (4 * rset[R_WB]) % XCHAL_NUM_AREGS];
 180
 181       for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
 182         {
 183           if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
 184             ptr = (char *) &rset[R_A0];
 185           supply_register (regcache, i, ptr);
 186           ptr += register_size (tdesc, i);
 187         }
 188     }
 189
 190   /* Loop registers, if hardware has it.  */
 191
 192 #if XCHAL_HAVE_LOOPS
 193   supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
 194   supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
 195   supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
 196 #endif
 197
 198   supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
 199   supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
 200   supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
 201   supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
 202   supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
 203
 204 #if XCHAL_HAVE_THREADPTR
 205   supply_register_by_name (regcache, "threadptr",
 206                            (char *) &rset[R_THREADPTR]);
 207 #endif
 208 }
 209
 210 /* Xtensa GNU/Linux PTRACE interface includes extended register set.  */
 211
 212 static void
 213 xtensa_fill_xtregset (struct regcache *regcache, void *buf)
 214 {
 215   const xtensa_regtable_t *ptr;
 216
 217   for (ptr = xtensa_regmap_table; ptr->name; ptr++)
 218     {
 219       collect_register_by_name (regcache, ptr->name,
 220                                 (char*)buf + ptr->ptrace_offset);
 221     }
 222 }
 223
 224 static void
 225 xtensa_store_xtregset (struct regcache *regcache, const void *buf)
 226 {
 227   const xtensa_regtable_t *ptr;
 228
 229   for (ptr = xtensa_regmap_table; ptr->name; ptr++)
 230     {
 231       supply_register_by_name (regcache, ptr->name,
 232                                 (char*)buf + ptr->ptrace_offset);
 233     }
 234 }
 235
 236 static struct regset_info xtensa_regsets[] = {
 237   { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
 238     GENERAL_REGS,
 239     xtensa_fill_gregset, xtensa_store_gregset },
 240   { PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE,
 241     EXTENDED_REGS,
 242     xtensa_fill_xtregset, xtensa_store_xtregset },
 243   NULL_REGSET
 244 };
 245
 246 #if XCHAL_HAVE_BE
 247 #define XTENSA_BREAKPOINT {0xd2,0x0f}
 248 #else
 249 #define XTENSA_BREAKPOINT {0x2d,0xf0}
 250 #endif
 251
 252 static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT;
 253 #define xtensa_breakpoint_len 2
 254
 255 /* Implementation of linux_target_ops method "sw_breakpoint_from_kind".  */
 256
 257 static const gdb_byte *
 258 xtensa_sw_breakpoint_from_kind (int kind, int *size)
 259 {
 260   *size = xtensa_breakpoint_len;
 261   return xtensa_breakpoint;
 262 }
 263
 264 static int
 265 xtensa_breakpoint_at (CORE_ADDR where)
 266 {
 267     unsigned long insn;
 268
 269     the_target->read_memory (where, (unsigned char *) &insn,
 270                              xtensa_breakpoint_len);
 271     return memcmp((char *) &insn,
 272                   xtensa_breakpoint, xtensa_breakpoint_len) == 0;
 273 }
 274
 275 /* Called by libthread_db.  */
 276
 277 ps_err_e
 278 ps_get_thread_area (struct ps_prochandle *ph,
 279                     lwpid_t lwpid, int idx, void **base)
 280 {
 281   xtensa_elf_gregset_t regs;
 282
 283   if (ptrace (PTRACE_GETREGS, lwpid, NULL, &regs) != 0)
 284     return PS_ERR;
 285
 286   /* IDX is the bias from the thread pointer to the beginning of the
 287      thread descriptor.  It has to be subtracted due to implementation
 288      quirks in libthread_db.  */
 289   *base = (void *) ((char *) regs.threadptr - idx);
 290
 291   return PS_OK;
 292 }
 293
 294 static struct regsets_info xtensa_regsets_info =
 295   {
 296     xtensa_regsets, /* regsets */
 297     0, /* num_regsets */
 298     NULL, /* disabled_regsets */
 299   };
 300
 301 static struct regs_info myregs_info =
 302   {
 303     NULL, /* regset_bitmap */
 304     NULL, /* usrregs */
 305     &xtensa_regsets_info
 306   };
 307
 308 void
 309 xtensa_target::low_arch_setup ()
 310 {
 311   current_process ()->tdesc = tdesc_xtensa;
 312 }
 313
 314 /* Support for hardware single step.  */
 315
 316 static int
 317 xtensa_supports_hardware_single_step (void)
 318 {
 319   return 1;
 320 }
 321
 322 const regs_info *
 323 xtensa_target::get_regs_info ()
 324 {
 325   return &myregs_info;
 326 }
 327
 328 struct linux_target_ops the_low_target = {
 329   xtensa_sw_breakpoint_from_kind,
 330   NULL,
 331   0,
 332   xtensa_breakpoint_at,
 333   NULL, /* supports_z_point_type */
 334   NULL, /* insert_point */
 335   NULL, /* remove_point */
 336   NULL, /* stopped_by_watchpoint */
 337   NULL, /* stopped_data_address */
 338   NULL, /* collect_ptrace_register */
 339   NULL, /* supply_ptrace_register */
 340   NULL, /* siginfo_fixup */
 341   NULL, /* new_process */
 342   NULL, /* delete_process */
 343   NULL, /* new_thread */
 344   NULL, /* delete_thread */
 345   NULL, /* new_fork */
 346   NULL, /* prepare_to_resume */
 347   NULL, /* process_qsupported */
 348   NULL, /* supports_tracepoints */
 349   NULL, /* get_thread_area */
 350   NULL, /* install_fast_tracepoint_jump_pad */
 351   NULL, /* emit_ops */
 352   NULL, /* get_min_fast_tracepoint_insn_len */
 353   NULL, /* supports_range_stepping */
 354   xtensa_supports_hardware_single_step,
 355 };
 356
 357 /* The linux target ops object.  */
 358
 359 linux_process_target *the_linux_target = &the_xtensa_target;
 360
 361 void
 362 initialize_low_arch (void)
 363 {
 364   /* Initialize the Linux target descriptions.  */
 365   init_registers_xtensa ();
 366
 367   initialize_regsets_info (&xtensa_regsets_info);
 368 }