gdbserver/linux-xtensa-low.cc

   1 /* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB.
   2    Copyright (C) 2007-2020 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19
  20 #include "server.h"
  21 #include "linux-low.h"
  22
  23 /* Linux target op definitions for the Xtensa architecture.  */
  24
  25 class xtensa_target : public linux_process_target
  26 {
  27 public:
  28
  29   const regs_info *get_regs_info () override;
  30
  31   const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
  32
  33 protected:
  34
  35   void low_arch_setup () override;
  36
  37   bool low_cannot_fetch_register (int regno) override;
  38
  39   bool low_cannot_store_register (int regno) override;
  40
  41   bool low_supports_breakpoints () override;
  42
  43   CORE_ADDR low_get_pc (regcache *regcache) override;
  44
  45   void low_set_pc (regcache *regcache, CORE_ADDR newpc) override;
  46 };
  47
  48 /* The singleton target ops object.  */
  49
  50 static xtensa_target the_xtensa_target;
  51
  52 bool
  53 xtensa_target::low_cannot_fetch_register (int regno)
  54 {
  55   gdb_assert_not_reached ("linux target op low_cannot_fetch_register "
  56                           "is not implemented by the target");
  57 }
  58
  59 bool
  60 xtensa_target::low_cannot_store_register (int regno)
  61 {
  62   gdb_assert_not_reached ("linux target op low_cannot_store_register "
  63                           "is not implemented by the target");
  64 }
  65
  66 bool
  67 xtensa_target::low_supports_breakpoints ()
  68 {
  69   return true;
  70 }
  71
  72 CORE_ADDR
  73 xtensa_target::low_get_pc (regcache *regcache)
  74 {
  75   return linux_get_pc_32bit (regcache);
  76 }
  77
  78 void
  79 xtensa_target::low_set_pc (regcache *regcache, CORE_ADDR pc)
  80 {
  81   linux_set_pc_32bit (regcache, pc);
  82 }
  83
  84 /* Defined in auto-generated file reg-xtensa.c.  */
  85 void init_registers_xtensa (void);
  86 extern const struct target_desc *tdesc_xtensa;
  87
  88 #include <asm/ptrace.h>
  89 #include <xtensa-config.h>
  90 #include "arch/xtensa.h"
  91 #include "gdb_proc_service.h"
  92
  93 #include "xtensa-xtregs.c"
  94
  95 enum regnum {
  96         R_PC=0, R_PS,
  97         R_LBEG, R_LEND, R_LCOUNT,
  98         R_SAR,
  99         R_WS, R_WB,
 100         R_THREADPTR,
 101         R_A0 = 64
 102 };
 103
 104 static void
 105 xtensa_fill_gregset (struct regcache *regcache, void *buf)
 106 {
 107   elf_greg_t* rset = (elf_greg_t*)buf;
 108   const struct target_desc *tdesc = regcache->tdesc;
 109   int ar0_regnum;
 110   char *ptr;
 111   int i;
 112
 113   /* Take care of AR registers.  */
 114
 115   ar0_regnum = find_regno (tdesc, "ar0");
 116   ptr = (char*)&rset[R_A0];
 117
 118   for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
 119     {
 120       collect_register (regcache, i, ptr);
 121       ptr += register_size (tdesc, i);
 122     }
 123
 124   if (XSHAL_ABI == XTHAL_ABI_CALL0)
 125     {
 126       int a0_regnum = find_regno (tdesc, "a0");
 127       ptr = (char *) &rset[R_A0 + 4 * rset[R_WB]];
 128
 129       for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
 130         {
 131           if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
 132             ptr = (char *) &rset[R_A0];
 133           collect_register (regcache, i, ptr);
 134           ptr += register_size (tdesc, i);
 135         }
 136     }
 137
 138   /* Loop registers, if hardware has it.  */
 139
 140 #if XCHAL_HAVE_LOOPS
 141   collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
 142   collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
 143   collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
 144 #endif
 145
 146   collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
 147   collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
 148   collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
 149   collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
 150   collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
 151
 152 #if XCHAL_HAVE_THREADPTR
 153   collect_register_by_name (regcache, "threadptr",
 154                             (char *) &rset[R_THREADPTR]);
 155 #endif
 156 }
 157
 158 static void
 159 xtensa_store_gregset (struct regcache *regcache, const void *buf)
 160 {
 161   const elf_greg_t* rset = (const elf_greg_t*)buf;
 162   const struct target_desc *tdesc = regcache->tdesc;
 163   int ar0_regnum;
 164   char *ptr;
 165   int i;
 166
 167   /* Take care of AR registers.  */
 168
 169   ar0_regnum = find_regno (tdesc, "ar0");
 170   ptr = (char *)&rset[R_A0];
 171
 172   for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
 173     {
 174       supply_register (regcache, i, ptr);
 175       ptr += register_size (tdesc, i);
 176     }
 177
 178   if (XSHAL_ABI == XTHAL_ABI_CALL0)
 179     {
 180       int a0_regnum = find_regno (tdesc, "a0");
 181       ptr = (char *) &rset[R_A0 + (4 * rset[R_WB]) % XCHAL_NUM_AREGS];
 182
 183       for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
 184         {
 185           if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
 186             ptr = (char *) &rset[R_A0];
 187           supply_register (regcache, i, ptr);
 188           ptr += register_size (tdesc, i);
 189         }
 190     }
 191
 192   /* Loop registers, if hardware has it.  */
 193
 194 #if XCHAL_HAVE_LOOPS
 195   supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
 196   supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
 197   supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
 198 #endif
 199
 200   supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
 201   supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
 202   supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
 203   supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
 204   supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
 205
 206 #if XCHAL_HAVE_THREADPTR
 207   supply_register_by_name (regcache, "threadptr",
 208                            (char *) &rset[R_THREADPTR]);
 209 #endif
 210 }
 211
 212 /* Xtensa GNU/Linux PTRACE interface includes extended register set.  */
 213
 214 static void
 215 xtensa_fill_xtregset (struct regcache *regcache, void *buf)
 216 {
 217   const xtensa_regtable_t *ptr;
 218
 219   for (ptr = xtensa_regmap_table; ptr->name; ptr++)
 220     {
 221       collect_register_by_name (regcache, ptr->name,
 222                                 (char*)buf + ptr->ptrace_offset);
 223     }
 224 }
 225
 226 static void
 227 xtensa_store_xtregset (struct regcache *regcache, const void *buf)
 228 {
 229   const xtensa_regtable_t *ptr;
 230
 231   for (ptr = xtensa_regmap_table; ptr->name; ptr++)
 232     {
 233       supply_register_by_name (regcache, ptr->name,
 234                                 (char*)buf + ptr->ptrace_offset);
 235     }
 236 }
 237
 238 static struct regset_info xtensa_regsets[] = {
 239   { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
 240     GENERAL_REGS,
 241     xtensa_fill_gregset, xtensa_store_gregset },
 242   { PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE,
 243     EXTENDED_REGS,
 244     xtensa_fill_xtregset, xtensa_store_xtregset },
 245   NULL_REGSET
 246 };
 247
 248 #if XCHAL_HAVE_BE
 249 #define XTENSA_BREAKPOINT {0xd2,0x0f}
 250 #else
 251 #define XTENSA_BREAKPOINT {0x2d,0xf0}
 252 #endif
 253
 254 static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT;
 255 #define xtensa_breakpoint_len 2
 256
 257 /* Implementation of target ops method "sw_breakpoint_from_kind".  */
 258
 259 const gdb_byte *
 260 xtensa_target::sw_breakpoint_from_kind (int kind, int *size)
 261 {
 262   *size = xtensa_breakpoint_len;
 263   return xtensa_breakpoint;
 264 }
 265
 266 static int
 267 xtensa_breakpoint_at (CORE_ADDR where)
 268 {
 269     unsigned long insn;
 270
 271     the_target->read_memory (where, (unsigned char *) &insn,
 272                              xtensa_breakpoint_len);
 273     return memcmp((char *) &insn,
 274                   xtensa_breakpoint, xtensa_breakpoint_len) == 0;
 275 }
 276
 277 /* Called by libthread_db.  */
 278
 279 ps_err_e
 280 ps_get_thread_area (struct ps_prochandle *ph,
 281                     lwpid_t lwpid, int idx, void **base)
 282 {
 283   xtensa_elf_gregset_t regs;
 284
 285   if (ptrace (PTRACE_GETREGS, lwpid, NULL, &regs) != 0)
 286     return PS_ERR;
 287
 288   /* IDX is the bias from the thread pointer to the beginning of the
 289      thread descriptor.  It has to be subtracted due to implementation
 290      quirks in libthread_db.  */
 291   *base = (void *) ((char *) regs.threadptr - idx);
 292
 293   return PS_OK;
 294 }
 295
 296 static struct regsets_info xtensa_regsets_info =
 297   {
 298     xtensa_regsets, /* regsets */
 299     0, /* num_regsets */
 300     NULL, /* disabled_regsets */
 301   };
 302
 303 static struct regs_info myregs_info =
 304   {
 305     NULL, /* regset_bitmap */
 306     NULL, /* usrregs */
 307     &xtensa_regsets_info
 308   };
 309
 310 void
 311 xtensa_target::low_arch_setup ()
 312 {
 313   current_process ()->tdesc = tdesc_xtensa;
 314 }
 315
 316 /* Support for hardware single step.  */
 317
 318 static int
 319 xtensa_supports_hardware_single_step (void)
 320 {
 321   return 1;
 322 }
 323
 324 const regs_info *
 325 xtensa_target::get_regs_info ()
 326 {
 327   return &myregs_info;
 328 }
 329
 330 struct linux_target_ops the_low_target = {
 331   NULL,
 332   0,
 333   xtensa_breakpoint_at,
 334   NULL, /* supports_z_point_type */
 335   NULL, /* insert_point */
 336   NULL, /* remove_point */
 337   NULL, /* stopped_by_watchpoint */
 338   NULL, /* stopped_data_address */
 339   NULL, /* collect_ptrace_register */
 340   NULL, /* supply_ptrace_register */
 341   NULL, /* siginfo_fixup */
 342   NULL, /* new_process */
 343   NULL, /* delete_process */
 344   NULL, /* new_thread */
 345   NULL, /* delete_thread */
 346   NULL, /* new_fork */
 347   NULL, /* prepare_to_resume */
 348   NULL, /* process_qsupported */
 349   NULL, /* supports_tracepoints */
 350   NULL, /* get_thread_area */
 351   NULL, /* install_fast_tracepoint_jump_pad */
 352   NULL, /* emit_ops */
 353   NULL, /* get_min_fast_tracepoint_insn_len */
 354   NULL, /* supports_range_stepping */
 355   xtensa_supports_hardware_single_step,
 356 };
 357
 358 /* The linux target ops object.  */
 359
 360 linux_process_target *the_linux_target = &the_xtensa_target;
 361
 362 void
 363 initialize_low_arch (void)
 364 {
 365   /* Initialize the Linux target descriptions.  */
 366   init_registers_xtensa ();
 367
 368   initialize_regsets_info (&xtensa_regsets_info);
 369 }