1 // arm.cc -- arm target support for gold.
3 // Copyright (C) 2009-2016 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian
>
62 class Output_data_plt_arm
;
64 template<bool big_endian
>
65 class Output_data_plt_arm_short
;
67 template<bool big_endian
>
68 class Output_data_plt_arm_long
;
70 template<bool big_endian
>
73 template<bool big_endian
>
74 class Arm_input_section
;
76 class Arm_exidx_cantunwind
;
78 class Arm_exidx_merged_section
;
80 class Arm_exidx_fixup
;
82 template<bool big_endian
>
83 class Arm_output_section
;
85 class Arm_exidx_input_section
;
87 template<bool big_endian
>
90 template<bool big_endian
>
91 class Arm_relocate_functions
;
93 template<bool big_endian
>
94 class Arm_output_data_got
;
96 template<bool big_endian
>
100 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
102 // Maximum branch offsets for ARM, THUMB and THUMB2.
103 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
104 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
105 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
106 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
107 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
108 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
110 // Thread Control Block size.
111 const size_t ARM_TCB_SIZE
= 8;
113 // The arm target class.
115 // This is a very simple port of gold for ARM-EABI. It is intended for
116 // supporting Android only for the time being.
119 // - Implement all static relocation types documented in arm-reloc.def.
120 // - Make PLTs more flexible for different architecture features like
122 // There are probably a lot more.
124 // Ideally we would like to avoid using global variables but this is used
125 // very in many places and sometimes in loops. If we use a function
126 // returning a static instance of Arm_reloc_property_table, it will be very
127 // slow in an threaded environment since the static instance needs to be
128 // locked. The pointer is below initialized in the
129 // Target::do_select_as_default_target() hook so that we do not spend time
130 // building the table if we are not linking ARM objects.
132 // An alternative is to to process the information in arm-reloc.def in
133 // compilation time and generate a representation of it in PODs only. That
134 // way we can avoid initialization when the linker starts.
136 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
138 // Instruction template class. This class is similar to the insn_sequence
139 // struct in bfd/elf32-arm.c.
144 // Types of instruction templates.
148 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
149 // templates with class-specific semantics. Currently this is used
150 // only by the Cortex_a8_stub class for handling condition codes in
151 // conditional branches.
152 THUMB16_SPECIAL_TYPE
,
158 // Factory methods to create instruction templates in different formats.
160 static const Insn_template
161 thumb16_insn(uint32_t data
)
162 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
164 // A Thumb conditional branch, in which the proper condition is inserted
165 // when we build the stub.
166 static const Insn_template
167 thumb16_bcond_insn(uint32_t data
)
168 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
170 static const Insn_template
171 thumb32_insn(uint32_t data
)
172 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
174 static const Insn_template
175 thumb32_b_insn(uint32_t data
, int reloc_addend
)
177 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
181 static const Insn_template
182 arm_insn(uint32_t data
)
183 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
185 static const Insn_template
186 arm_rel_insn(unsigned data
, int reloc_addend
)
187 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
189 static const Insn_template
190 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
191 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
193 // Accessors. This class is used for read-only objects so no modifiers
198 { return this->data_
; }
200 // Return the instruction sequence type of this.
203 { return this->type_
; }
205 // Return the ARM relocation type of this.
208 { return this->r_type_
; }
212 { return this->reloc_addend_
; }
214 // Return size of instruction template in bytes.
218 // Return byte-alignment of instruction template.
223 // We make the constructor private to ensure that only the factory
226 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
227 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
230 // Instruction specific data. This is used to store information like
231 // some of the instruction bits.
233 // Instruction template type.
235 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
236 unsigned int r_type_
;
237 // Relocation addend.
238 int32_t reloc_addend_
;
241 // Macro for generating code to stub types. One entry per long/short
245 DEF_STUB(long_branch_any_any) \
246 DEF_STUB(long_branch_v4t_arm_thumb) \
247 DEF_STUB(long_branch_thumb_only) \
248 DEF_STUB(long_branch_v4t_thumb_thumb) \
249 DEF_STUB(long_branch_v4t_thumb_arm) \
250 DEF_STUB(short_branch_v4t_thumb_arm) \
251 DEF_STUB(long_branch_any_arm_pic) \
252 DEF_STUB(long_branch_any_thumb_pic) \
253 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
254 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
255 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
256 DEF_STUB(long_branch_thumb_only_pic) \
257 DEF_STUB(a8_veneer_b_cond) \
258 DEF_STUB(a8_veneer_b) \
259 DEF_STUB(a8_veneer_bl) \
260 DEF_STUB(a8_veneer_blx) \
261 DEF_STUB(v4_veneer_bx)
265 #define DEF_STUB(x) arm_stub_##x,
271 // First reloc stub type.
272 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
273 // Last reloc stub type.
274 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
276 // First Cortex-A8 stub type.
277 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
278 // Last Cortex-A8 stub type.
279 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
282 arm_stub_type_last
= arm_stub_v4_veneer_bx
286 // Stub template class. Templates are meant to be read-only objects.
287 // A stub template for a stub type contains all read-only attributes
288 // common to all stubs of the same type.
293 Stub_template(Stub_type
, const Insn_template
*, size_t);
301 { return this->type_
; }
303 // Return an array of instruction templates.
306 { return this->insns_
; }
308 // Return size of template in number of instructions.
311 { return this->insn_count_
; }
313 // Return size of template in bytes.
316 { return this->size_
; }
318 // Return alignment of the stub template.
321 { return this->alignment_
; }
323 // Return whether entry point is in thumb mode.
325 entry_in_thumb_mode() const
326 { return this->entry_in_thumb_mode_
; }
328 // Return number of relocations in this template.
331 { return this->relocs_
.size(); }
333 // Return index of the I-th instruction with relocation.
335 reloc_insn_index(size_t i
) const
337 gold_assert(i
< this->relocs_
.size());
338 return this->relocs_
[i
].first
;
341 // Return the offset of the I-th instruction with relocation from the
342 // beginning of the stub.
344 reloc_offset(size_t i
) const
346 gold_assert(i
< this->relocs_
.size());
347 return this->relocs_
[i
].second
;
351 // This contains information about an instruction template with a relocation
352 // and its offset from start of stub.
353 typedef std::pair
<size_t, section_size_type
> Reloc
;
355 // A Stub_template may not be copied. We want to share templates as much
357 Stub_template(const Stub_template
&);
358 Stub_template
& operator=(const Stub_template
&);
362 // Points to an array of Insn_templates.
363 const Insn_template
* insns_
;
364 // Number of Insn_templates in insns_[].
366 // Size of templated instructions in bytes.
368 // Alignment of templated instructions.
370 // Flag to indicate if entry is in thumb mode.
371 bool entry_in_thumb_mode_
;
372 // A table of reloc instruction indices and offsets. We can find these by
373 // looking at the instruction templates but we pre-compute and then stash
374 // them here for speed.
375 std::vector
<Reloc
> relocs_
;
379 // A class for code stubs. This is a base class for different type of
380 // stubs used in the ARM target.
386 static const section_offset_type invalid_offset
=
387 static_cast<section_offset_type
>(-1);
390 Stub(const Stub_template
* stub_template
)
391 : stub_template_(stub_template
), offset_(invalid_offset
)
398 // Return the stub template.
400 stub_template() const
401 { return this->stub_template_
; }
403 // Return offset of code stub from beginning of its containing stub table.
407 gold_assert(this->offset_
!= invalid_offset
);
408 return this->offset_
;
411 // Set offset of code stub from beginning of its containing stub table.
413 set_offset(section_offset_type offset
)
414 { this->offset_
= offset
; }
416 // Return the relocation target address of the i-th relocation in the
417 // stub. This must be defined in a child class.
419 reloc_target(size_t i
)
420 { return this->do_reloc_target(i
); }
422 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
424 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
425 { this->do_write(view
, view_size
, big_endian
); }
427 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
428 // for the i-th instruction.
430 thumb16_special(size_t i
)
431 { return this->do_thumb16_special(i
); }
434 // This must be defined in the child class.
436 do_reloc_target(size_t) = 0;
438 // This may be overridden in the child class.
440 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
443 this->do_fixed_endian_write
<true>(view
, view_size
);
445 this->do_fixed_endian_write
<false>(view
, view_size
);
448 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
449 // instruction template.
451 do_thumb16_special(size_t)
452 { gold_unreachable(); }
455 // A template to implement do_write.
456 template<bool big_endian
>
458 do_fixed_endian_write(unsigned char*, section_size_type
);
461 const Stub_template
* stub_template_
;
462 // Offset within the section of containing this stub.
463 section_offset_type offset_
;
466 // Reloc stub class. These are stubs we use to fix up relocation because
467 // of limited branch ranges.
469 class Reloc_stub
: public Stub
472 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
473 // We assume we never jump to this address.
474 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
476 // Return destination address.
478 destination_address() const
480 gold_assert(this->destination_address_
!= this->invalid_address
);
481 return this->destination_address_
;
484 // Set destination address.
486 set_destination_address(Arm_address address
)
488 gold_assert(address
!= this->invalid_address
);
489 this->destination_address_
= address
;
492 // Reset destination address.
494 reset_destination_address()
495 { this->destination_address_
= this->invalid_address
; }
497 // Determine stub type for a branch of a relocation of R_TYPE going
498 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
499 // the branch target is a thumb instruction. TARGET is used for look
500 // up ARM-specific linker settings.
502 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
503 Arm_address branch_target
, bool target_is_thumb
);
505 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
506 // and an addend. Since we treat global and local symbol differently, we
507 // use a Symbol object for a global symbol and a object-index pair for
512 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
513 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
514 // and R_SYM must not be invalid_index.
515 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
516 unsigned int r_sym
, int32_t addend
)
517 : stub_type_(stub_type
), addend_(addend
)
521 this->r_sym_
= Reloc_stub::invalid_index
;
522 this->u_
.symbol
= symbol
;
526 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
527 this->r_sym_
= r_sym
;
528 this->u_
.relobj
= relobj
;
535 // Accessors: Keys are meant to be read-only object so no modifiers are
541 { return this->stub_type_
; }
543 // Return the local symbol index or invalid_index.
546 { return this->r_sym_
; }
548 // Return the symbol if there is one.
551 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
553 // Return the relobj if there is one.
556 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
558 // Whether this equals to another key k.
560 eq(const Key
& k
) const
562 return ((this->stub_type_
== k
.stub_type_
)
563 && (this->r_sym_
== k
.r_sym_
)
564 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
565 ? (this->u_
.relobj
== k
.u_
.relobj
)
566 : (this->u_
.symbol
== k
.u_
.symbol
))
567 && (this->addend_
== k
.addend_
));
570 // Return a hash value.
574 return (this->stub_type_
576 ^ gold::string_hash
<char>(
577 (this->r_sym_
!= Reloc_stub::invalid_index
)
578 ? this->u_
.relobj
->name().c_str()
579 : this->u_
.symbol
->name())
583 // Functors for STL associative containers.
587 operator()(const Key
& k
) const
588 { return k
.hash_value(); }
594 operator()(const Key
& k1
, const Key
& k2
) const
595 { return k1
.eq(k2
); }
598 // Name of key. This is mainly for debugging.
604 Stub_type stub_type_
;
605 // If this is a local symbol, this is the index in the defining object.
606 // Otherwise, it is invalid_index for a global symbol.
608 // If r_sym_ is an invalid index, this points to a global symbol.
609 // Otherwise, it points to a relobj. We used the unsized and target
610 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
611 // Arm_relobj, in order to avoid making the stub class a template
612 // as most of the stub machinery is endianness-neutral. However, it
613 // may require a bit of casting done by users of this class.
616 const Symbol
* symbol
;
617 const Relobj
* relobj
;
619 // Addend associated with a reloc.
624 // Reloc_stubs are created via a stub factory. So these are protected.
625 Reloc_stub(const Stub_template
* stub_template
)
626 : Stub(stub_template
), destination_address_(invalid_address
)
632 friend class Stub_factory
;
634 // Return the relocation target address of the i-th relocation in the
637 do_reloc_target(size_t i
)
639 // All reloc stub have only one relocation.
641 return this->destination_address_
;
645 // Address of destination.
646 Arm_address destination_address_
;
649 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
650 // THUMB branch that meets the following conditions:
652 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
653 // branch address is 0xffe.
654 // 2. The branch target address is in the same page as the first word of the
656 // 3. The branch follows a 32-bit instruction which is not a branch.
658 // To do the fix up, we need to store the address of the branch instruction
659 // and its target at least. We also need to store the original branch
660 // instruction bits for the condition code in a conditional branch. The
661 // condition code is used in a special instruction template. We also want
662 // to identify input sections needing Cortex-A8 workaround quickly. We store
663 // extra information about object and section index of the code section
664 // containing a branch being fixed up. The information is used to mark
665 // the code section when we finalize the Cortex-A8 stubs.
668 class Cortex_a8_stub
: public Stub
674 // Return the object of the code section containing the branch being fixed
678 { return this->relobj_
; }
680 // Return the section index of the code section containing the branch being
684 { return this->shndx_
; }
686 // Return the source address of stub. This is the address of the original
687 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
690 source_address() const
691 { return this->source_address_
; }
693 // Return the destination address of the stub. This is the branch taken
694 // address of the original branch instruction. LSB is 1 if it is a THUMB
695 // instruction address.
697 destination_address() const
698 { return this->destination_address_
; }
700 // Return the instruction being fixed up.
702 original_insn() const
703 { return this->original_insn_
; }
706 // Cortex_a8_stubs are created via a stub factory. So these are protected.
707 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
708 unsigned int shndx
, Arm_address source_address
,
709 Arm_address destination_address
, uint32_t original_insn
)
710 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
711 source_address_(source_address
| 1U),
712 destination_address_(destination_address
),
713 original_insn_(original_insn
)
716 friend class Stub_factory
;
718 // Return the relocation target address of the i-th relocation in the
721 do_reloc_target(size_t i
)
723 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
725 // The conditional branch veneer has two relocations.
727 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
731 // All other Cortex-A8 stubs have only one relocation.
733 return this->destination_address_
;
737 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
739 do_thumb16_special(size_t);
742 // Object of the code section containing the branch being fixed up.
744 // Section index of the code section containing the branch begin fixed up.
746 // Source address of original branch.
747 Arm_address source_address_
;
748 // Destination address of the original branch.
749 Arm_address destination_address_
;
750 // Original branch instruction. This is needed for copying the condition
751 // code from a condition branch to its stub.
752 uint32_t original_insn_
;
755 // ARMv4 BX Rx branch relocation stub class.
756 class Arm_v4bx_stub
: public Stub
762 // Return the associated register.
765 { return this->reg_
; }
768 // Arm V4BX stubs are created via a stub factory. So these are protected.
769 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
770 : Stub(stub_template
), reg_(reg
)
773 friend class Stub_factory
;
775 // Return the relocation target address of the i-th relocation in the
778 do_reloc_target(size_t)
779 { gold_unreachable(); }
781 // This may be overridden in the child class.
783 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
786 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
788 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
792 // A template to implement do_write.
793 template<bool big_endian
>
795 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
797 const Insn_template
* insns
= this->stub_template()->insns();
798 elfcpp::Swap
<32, big_endian
>::writeval(view
,
800 + (this->reg_
<< 16)));
801 view
+= insns
[0].size();
802 elfcpp::Swap
<32, big_endian
>::writeval(view
,
803 (insns
[1].data() + this->reg_
));
804 view
+= insns
[1].size();
805 elfcpp::Swap
<32, big_endian
>::writeval(view
,
806 (insns
[2].data() + this->reg_
));
809 // A register index (r0-r14), which is associated with the stub.
813 // Stub factory class.
818 // Return the unique instance of this class.
819 static const Stub_factory
&
822 static Stub_factory singleton
;
826 // Make a relocation stub.
828 make_reloc_stub(Stub_type stub_type
) const
830 gold_assert(stub_type
>= arm_stub_reloc_first
831 && stub_type
<= arm_stub_reloc_last
);
832 return new Reloc_stub(this->stub_templates_
[stub_type
]);
835 // Make a Cortex-A8 stub.
837 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
838 Arm_address source
, Arm_address destination
,
839 uint32_t original_insn
) const
841 gold_assert(stub_type
>= arm_stub_cortex_a8_first
842 && stub_type
<= arm_stub_cortex_a8_last
);
843 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
844 source
, destination
, original_insn
);
847 // Make an ARM V4BX relocation stub.
848 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
850 make_arm_v4bx_stub(uint32_t reg
) const
852 gold_assert(reg
< 0xf);
853 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
858 // Constructor and destructor are protected since we only return a single
859 // instance created in Stub_factory::get_instance().
863 // A Stub_factory may not be copied since it is a singleton.
864 Stub_factory(const Stub_factory
&);
865 Stub_factory
& operator=(Stub_factory
&);
867 // Stub templates. These are initialized in the constructor.
868 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
871 // A class to hold stubs for the ARM target.
873 template<bool big_endian
>
874 class Stub_table
: public Output_data
877 Stub_table(Arm_input_section
<big_endian
>* owner
)
878 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
879 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
880 prev_data_size_(0), prev_addralign_(1)
886 // Owner of this stub table.
887 Arm_input_section
<big_endian
>*
889 { return this->owner_
; }
891 // Whether this stub table is empty.
895 return (this->reloc_stubs_
.empty()
896 && this->cortex_a8_stubs_
.empty()
897 && this->arm_v4bx_stubs_
.empty());
900 // Return the current data size.
902 current_data_size() const
903 { return this->current_data_size_for_child(); }
905 // Add a STUB using KEY. The caller is responsible for avoiding addition
906 // if a STUB with the same key has already been added.
908 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
910 const Stub_template
* stub_template
= stub
->stub_template();
911 gold_assert(stub_template
->type() == key
.stub_type());
912 this->reloc_stubs_
[key
] = stub
;
914 // Assign stub offset early. We can do this because we never remove
915 // reloc stubs and they are in the beginning of the stub table.
916 uint64_t align
= stub_template
->alignment();
917 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
918 stub
->set_offset(this->reloc_stubs_size_
);
919 this->reloc_stubs_size_
+= stub_template
->size();
920 this->reloc_stubs_addralign_
=
921 std::max(this->reloc_stubs_addralign_
, align
);
924 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
925 // The caller is responsible for avoiding addition if a STUB with the same
926 // address has already been added.
928 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
930 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
931 this->cortex_a8_stubs_
.insert(value
);
934 // Add an ARM V4BX relocation stub. A register index will be retrieved
937 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
939 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
940 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
943 // Remove all Cortex-A8 stubs.
945 remove_all_cortex_a8_stubs();
947 // Look up a relocation stub using KEY. Return NULL if there is none.
949 find_reloc_stub(const Reloc_stub::Key
& key
) const
951 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
952 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
955 // Look up an arm v4bx relocation stub using the register index.
956 // Return NULL if there is none.
958 find_arm_v4bx_stub(const uint32_t reg
) const
960 gold_assert(reg
< 0xf);
961 return this->arm_v4bx_stubs_
[reg
];
964 // Relocate stubs in this stub table.
966 relocate_stubs(const Relocate_info
<32, big_endian
>*,
967 Target_arm
<big_endian
>*, Output_section
*,
968 unsigned char*, Arm_address
, section_size_type
);
970 // Update data size and alignment at the end of a relaxation pass. Return
971 // true if either data size or alignment is different from that of the
972 // previous relaxation pass.
974 update_data_size_and_addralign();
976 // Finalize stubs. Set the offsets of all stubs and mark input sections
977 // needing the Cortex-A8 workaround.
981 // Apply Cortex-A8 workaround to an address range.
983 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
984 unsigned char*, Arm_address
,
988 // Write out section contents.
990 do_write(Output_file
*);
992 // Return the required alignment.
995 { return this->prev_addralign_
; }
997 // Reset address and file offset.
999 do_reset_address_and_file_offset()
1000 { this->set_current_data_size_for_child(this->prev_data_size_
); }
1002 // Set final data size.
1004 set_final_data_size()
1005 { this->set_data_size(this->current_data_size()); }
1008 // Relocate one stub.
1010 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1011 Target_arm
<big_endian
>*, Output_section
*,
1012 unsigned char*, Arm_address
, section_size_type
);
1014 // Unordered map of relocation stubs.
1016 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1017 Reloc_stub::Key::equal_to
>
1020 // List of Cortex-A8 stubs ordered by addresses of branches being
1021 // fixed up in output.
1022 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1023 // List of Arm V4BX relocation stubs ordered by associated registers.
1024 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1026 // Owner of this stub table.
1027 Arm_input_section
<big_endian
>* owner_
;
1028 // The relocation stubs.
1029 Reloc_stub_map reloc_stubs_
;
1030 // Size of reloc stubs.
1031 off_t reloc_stubs_size_
;
1032 // Maximum address alignment of reloc stubs.
1033 uint64_t reloc_stubs_addralign_
;
1034 // The cortex_a8_stubs.
1035 Cortex_a8_stub_list cortex_a8_stubs_
;
1036 // The Arm V4BX relocation stubs.
1037 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1038 // data size of this in the previous pass.
1039 off_t prev_data_size_
;
1040 // address alignment of this in the previous pass.
1041 uint64_t prev_addralign_
;
1044 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1045 // we add to the end of an EXIDX input section that goes into the output.
1047 class Arm_exidx_cantunwind
: public Output_section_data
1050 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1051 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1054 // Return the object containing the section pointed by this.
1057 { return this->relobj_
; }
1059 // Return the section index of the section pointed by this.
1062 { return this->shndx_
; }
1066 do_write(Output_file
* of
)
1068 if (parameters
->target().is_big_endian())
1069 this->do_fixed_endian_write
<true>(of
);
1071 this->do_fixed_endian_write
<false>(of
);
1074 // Write to a map file.
1076 do_print_to_mapfile(Mapfile
* mapfile
) const
1077 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1080 // Implement do_write for a given endianness.
1081 template<bool big_endian
>
1083 do_fixed_endian_write(Output_file
*);
1085 // The object containing the section pointed by this.
1087 // The section index of the section pointed by this.
1088 unsigned int shndx_
;
1091 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1092 // Offset map is used to map input section offset within the EXIDX section
1093 // to the output offset from the start of this EXIDX section.
1095 typedef std::map
<section_offset_type
, section_offset_type
>
1096 Arm_exidx_section_offset_map
;
1098 // Arm_exidx_merged_section class. This represents an EXIDX input section
1099 // with some of its entries merged.
1101 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1104 // Constructor for Arm_exidx_merged_section.
1105 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1106 // SECTION_OFFSET_MAP points to a section offset map describing how
1107 // parts of the input section are mapped to output. DELETED_BYTES is
1108 // the number of bytes deleted from the EXIDX input section.
1109 Arm_exidx_merged_section(
1110 const Arm_exidx_input_section
& exidx_input_section
,
1111 const Arm_exidx_section_offset_map
& section_offset_map
,
1112 uint32_t deleted_bytes
);
1114 // Build output contents.
1116 build_contents(const unsigned char*, section_size_type
);
1118 // Return the original EXIDX input section.
1119 const Arm_exidx_input_section
&
1120 exidx_input_section() const
1121 { return this->exidx_input_section_
; }
1123 // Return the section offset map.
1124 const Arm_exidx_section_offset_map
&
1125 section_offset_map() const
1126 { return this->section_offset_map_
; }
1129 // Write merged section into file OF.
1131 do_write(Output_file
* of
);
1134 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1135 section_offset_type
*) const;
1138 // Original EXIDX input section.
1139 const Arm_exidx_input_section
& exidx_input_section_
;
1140 // Section offset map.
1141 const Arm_exidx_section_offset_map
& section_offset_map_
;
1142 // Merged section contents. We need to keep build the merged section
1143 // and save it here to avoid accessing the original EXIDX section when
1144 // we cannot lock the sections' object.
1145 unsigned char* section_contents_
;
1148 // A class to wrap an ordinary input section containing executable code.
1150 template<bool big_endian
>
1151 class Arm_input_section
: public Output_relaxed_input_section
1154 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1155 : Output_relaxed_input_section(relobj
, shndx
, 1),
1156 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1157 original_contents_(NULL
)
1160 ~Arm_input_section()
1161 { delete[] this->original_contents_
; }
1167 // Whether this is a stub table owner.
1169 is_stub_table_owner() const
1170 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1172 // Return the stub table.
1173 Stub_table
<big_endian
>*
1175 { return this->stub_table_
; }
1177 // Set the stub_table.
1179 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1180 { this->stub_table_
= stub_table
; }
1182 // Downcast a base pointer to an Arm_input_section pointer. This is
1183 // not type-safe but we only use Arm_input_section not the base class.
1184 static Arm_input_section
<big_endian
>*
1185 as_arm_input_section(Output_relaxed_input_section
* poris
)
1186 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1188 // Return the original size of the section.
1190 original_size() const
1191 { return this->original_size_
; }
1194 // Write data to output file.
1196 do_write(Output_file
*);
1198 // Return required alignment of this.
1200 do_addralign() const
1202 if (this->is_stub_table_owner())
1203 return std::max(this->stub_table_
->addralign(),
1204 static_cast<uint64_t>(this->original_addralign_
));
1206 return this->original_addralign_
;
1209 // Finalize data size.
1211 set_final_data_size();
1213 // Reset address and file offset.
1215 do_reset_address_and_file_offset();
1219 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1220 section_offset_type offset
,
1221 section_offset_type
* poutput
) const
1223 if ((object
== this->relobj())
1224 && (shndx
== this->shndx())
1227 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1237 // Copying is not allowed.
1238 Arm_input_section(const Arm_input_section
&);
1239 Arm_input_section
& operator=(const Arm_input_section
&);
1241 // Address alignment of the original input section.
1242 uint32_t original_addralign_
;
1243 // Section size of the original input section.
1244 uint32_t original_size_
;
1246 Stub_table
<big_endian
>* stub_table_
;
1247 // Original section contents. We have to make a copy here since the file
1248 // containing the original section may not be locked when we need to access
1250 unsigned char* original_contents_
;
1253 // Arm_exidx_fixup class. This is used to define a number of methods
1254 // and keep states for fixing up EXIDX coverage.
1256 class Arm_exidx_fixup
1259 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1260 bool merge_exidx_entries
= true)
1261 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1262 last_inlined_entry_(0), last_input_section_(NULL
),
1263 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1264 merge_exidx_entries_(merge_exidx_entries
)
1268 { delete this->section_offset_map_
; }
1270 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1271 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1272 // number of bytes to be deleted in output. If parts of the input EXIDX
1273 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1274 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1275 // responsible for releasing it.
1276 template<bool big_endian
>
1278 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1279 const unsigned char* section_contents
,
1280 section_size_type section_size
,
1281 Arm_exidx_section_offset_map
** psection_offset_map
);
1283 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1284 // input section, if there is not one already.
1286 add_exidx_cantunwind_as_needed();
1288 // Return the output section for the text section which is linked to the
1289 // first exidx input in output.
1291 first_output_text_section() const
1292 { return this->first_output_text_section_
; }
1295 // Copying is not allowed.
1296 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1297 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1299 // Type of EXIDX unwind entry.
1304 // EXIDX_CANTUNWIND.
1305 UT_EXIDX_CANTUNWIND
,
1312 // Process an EXIDX entry. We only care about the second word of the
1313 // entry. Return true if the entry can be deleted.
1315 process_exidx_entry(uint32_t second_word
);
1317 // Update the current section offset map during EXIDX section fix-up.
1318 // If there is no map, create one. INPUT_OFFSET is the offset of a
1319 // reference point, DELETED_BYTES is the number of deleted by in the
1320 // section so far. If DELETE_ENTRY is true, the reference point and
1321 // all offsets after the previous reference point are discarded.
1323 update_offset_map(section_offset_type input_offset
,
1324 section_size_type deleted_bytes
, bool delete_entry
);
1326 // EXIDX output section.
1327 Output_section
* exidx_output_section_
;
1328 // Unwind type of the last EXIDX entry processed.
1329 Unwind_type last_unwind_type_
;
1330 // Last seen inlined EXIDX entry.
1331 uint32_t last_inlined_entry_
;
1332 // Last processed EXIDX input section.
1333 const Arm_exidx_input_section
* last_input_section_
;
1334 // Section offset map created in process_exidx_section.
1335 Arm_exidx_section_offset_map
* section_offset_map_
;
1336 // Output section for the text section which is linked to the first exidx
1338 Output_section
* first_output_text_section_
;
1340 bool merge_exidx_entries_
;
1343 // Arm output section class. This is defined mainly to add a number of
1344 // stub generation methods.
1346 template<bool big_endian
>
1347 class Arm_output_section
: public Output_section
1350 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1352 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1353 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1354 elfcpp::Elf_Xword flags
)
1355 : Output_section(name
, type
,
1356 (type
== elfcpp::SHT_ARM_EXIDX
1357 ? flags
| elfcpp::SHF_LINK_ORDER
1360 if (type
== elfcpp::SHT_ARM_EXIDX
)
1361 this->set_always_keeps_input_sections();
1364 ~Arm_output_section()
1367 // Group input sections for stub generation.
1369 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1371 // Downcast a base pointer to an Arm_output_section pointer. This is
1372 // not type-safe but we only use Arm_output_section not the base class.
1373 static Arm_output_section
<big_endian
>*
1374 as_arm_output_section(Output_section
* os
)
1375 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1377 // Append all input text sections in this into LIST.
1379 append_text_sections_to_list(Text_section_list
* list
);
1381 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1382 // is a list of text input sections sorted in ascending order of their
1383 // output addresses.
1385 fix_exidx_coverage(Layout
* layout
,
1386 const Text_section_list
& sorted_text_section
,
1387 Symbol_table
* symtab
,
1388 bool merge_exidx_entries
,
1391 // Link an EXIDX section into its corresponding text section.
1393 set_exidx_section_link();
1397 typedef Output_section::Input_section Input_section
;
1398 typedef Output_section::Input_section_list Input_section_list
;
1400 // Create a stub group.
1401 void create_stub_group(Input_section_list::const_iterator
,
1402 Input_section_list::const_iterator
,
1403 Input_section_list::const_iterator
,
1404 Target_arm
<big_endian
>*,
1405 std::vector
<Output_relaxed_input_section
*>*,
1409 // Arm_exidx_input_section class. This represents an EXIDX input section.
1411 class Arm_exidx_input_section
1414 static const section_offset_type invalid_offset
=
1415 static_cast<section_offset_type
>(-1);
1417 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1418 unsigned int link
, uint32_t size
,
1419 uint32_t addralign
, uint32_t text_size
)
1420 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1421 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1424 ~Arm_exidx_input_section()
1427 // Accessors: This is a read-only class.
1429 // Return the object containing this EXIDX input section.
1432 { return this->relobj_
; }
1434 // Return the section index of this EXIDX input section.
1437 { return this->shndx_
; }
1439 // Return the section index of linked text section in the same object.
1442 { return this->link_
; }
1444 // Return size of the EXIDX input section.
1447 { return this->size_
; }
1449 // Return address alignment of EXIDX input section.
1452 { return this->addralign_
; }
1454 // Return size of the associated text input section.
1457 { return this->text_size_
; }
1459 // Whether there are any errors in the EXIDX input section.
1462 { return this->has_errors_
; }
1464 // Set has-errors flag.
1467 { this->has_errors_
= true; }
1470 // Object containing this.
1472 // Section index of this.
1473 unsigned int shndx_
;
1474 // text section linked to this in the same object.
1476 // Size of this. For ARM 32-bit is sufficient.
1478 // Address alignment of this. For ARM 32-bit is sufficient.
1479 uint32_t addralign_
;
1480 // Size of associated text section.
1481 uint32_t text_size_
;
1482 // Whether this has any errors.
1486 // Arm_relobj class.
1488 template<bool big_endian
>
1489 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1492 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1494 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1495 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1496 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1497 stub_tables_(), local_symbol_is_thumb_function_(),
1498 attributes_section_data_(NULL
), mapping_symbols_info_(),
1499 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1500 output_local_symbol_count_needs_update_(false),
1501 merge_flags_and_attributes_(true)
1505 { delete this->attributes_section_data_
; }
1507 // Return the stub table of the SHNDX-th section if there is one.
1508 Stub_table
<big_endian
>*
1509 stub_table(unsigned int shndx
) const
1511 gold_assert(shndx
< this->stub_tables_
.size());
1512 return this->stub_tables_
[shndx
];
1515 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1517 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1519 gold_assert(shndx
< this->stub_tables_
.size());
1520 this->stub_tables_
[shndx
] = stub_table
;
1523 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1524 // index. This is only valid after do_count_local_symbol is called.
1526 local_symbol_is_thumb_function(unsigned int r_sym
) const
1528 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1529 return this->local_symbol_is_thumb_function_
[r_sym
];
1532 // Scan all relocation sections for stub generation.
1534 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1537 // Convert regular input section with index SHNDX to a relaxed section.
1539 convert_input_section_to_relaxed_section(unsigned shndx
)
1541 // The stubs have relocations and we need to process them after writing
1542 // out the stubs. So relocation now must follow section write.
1543 this->set_section_offset(shndx
, -1ULL);
1544 this->set_relocs_must_follow_section_writes();
1547 // Downcast a base pointer to an Arm_relobj pointer. This is
1548 // not type-safe but we only use Arm_relobj not the base class.
1549 static Arm_relobj
<big_endian
>*
1550 as_arm_relobj(Relobj
* relobj
)
1551 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1553 // Processor-specific flags in ELF file header. This is valid only after
1556 processor_specific_flags() const
1557 { return this->processor_specific_flags_
; }
1559 // Attribute section data This is the contents of the .ARM.attribute section
1561 const Attributes_section_data
*
1562 attributes_section_data() const
1563 { return this->attributes_section_data_
; }
1565 // Mapping symbol location.
1566 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1568 // Functor for STL container.
1569 struct Mapping_symbol_position_less
1572 operator()(const Mapping_symbol_position
& p1
,
1573 const Mapping_symbol_position
& p2
) const
1575 return (p1
.first
< p2
.first
1576 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1580 // We only care about the first character of a mapping symbol, so
1581 // we only store that instead of the whole symbol name.
1582 typedef std::map
<Mapping_symbol_position
, char,
1583 Mapping_symbol_position_less
> Mapping_symbols_info
;
1585 // Whether a section contains any Cortex-A8 workaround.
1587 section_has_cortex_a8_workaround(unsigned int shndx
) const
1589 return (this->section_has_cortex_a8_workaround_
!= NULL
1590 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1593 // Mark a section that has Cortex-A8 workaround.
1595 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1597 if (this->section_has_cortex_a8_workaround_
== NULL
)
1598 this->section_has_cortex_a8_workaround_
=
1599 new std::vector
<bool>(this->shnum(), false);
1600 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1603 // Return the EXIDX section of an text section with index SHNDX or NULL
1604 // if the text section has no associated EXIDX section.
1605 const Arm_exidx_input_section
*
1606 exidx_input_section_by_link(unsigned int shndx
) const
1608 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1609 return ((p
!= this->exidx_section_map_
.end()
1610 && p
->second
->link() == shndx
)
1615 // Return the EXIDX section with index SHNDX or NULL if there is none.
1616 const Arm_exidx_input_section
*
1617 exidx_input_section_by_shndx(unsigned shndx
) const
1619 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1620 return ((p
!= this->exidx_section_map_
.end()
1621 && p
->second
->shndx() == shndx
)
1626 // Whether output local symbol count needs updating.
1628 output_local_symbol_count_needs_update() const
1629 { return this->output_local_symbol_count_needs_update_
; }
1631 // Set output_local_symbol_count_needs_update flag to be true.
1633 set_output_local_symbol_count_needs_update()
1634 { this->output_local_symbol_count_needs_update_
= true; }
1636 // Update output local symbol count at the end of relaxation.
1638 update_output_local_symbol_count();
1640 // Whether we want to merge processor-specific flags and attributes.
1642 merge_flags_and_attributes() const
1643 { return this->merge_flags_and_attributes_
; }
1645 // Export list of EXIDX section indices.
1647 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1650 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1651 p
!= this->exidx_section_map_
.end();
1654 if (p
->second
->shndx() == p
->first
)
1655 list
->push_back(p
->first
);
1657 // Sort list to make result independent of implementation of map.
1658 std::sort(list
->begin(), list
->end());
1662 // Post constructor setup.
1666 // Call parent's setup method.
1667 Sized_relobj_file
<32, big_endian
>::do_setup();
1669 // Initialize look-up tables.
1670 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1671 this->stub_tables_
.swap(empty_stub_table_list
);
1674 // Count the local symbols.
1676 do_count_local_symbols(Stringpool_template
<char>*,
1677 Stringpool_template
<char>*);
1680 do_relocate_sections(
1681 const Symbol_table
* symtab
, const Layout
* layout
,
1682 const unsigned char* pshdrs
, Output_file
* of
,
1683 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1685 // Read the symbol information.
1687 do_read_symbols(Read_symbols_data
* sd
);
1689 // Process relocs for garbage collection.
1691 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1695 // Whether a section needs to be scanned for relocation stubs.
1697 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1698 const Relobj::Output_sections
&,
1699 const Symbol_table
*, const unsigned char*);
1701 // Whether a section is a scannable text section.
1703 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1704 const Output_section
*, const Symbol_table
*);
1706 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1708 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1709 unsigned int, Output_section
*,
1710 const Symbol_table
*);
1712 // Scan a section for the Cortex-A8 erratum.
1714 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1715 unsigned int, Output_section
*,
1716 Target_arm
<big_endian
>*);
1718 // Find the linked text section of an EXIDX section by looking at the
1719 // first relocation of the EXIDX section. PSHDR points to the section
1720 // headers of a relocation section and PSYMS points to the local symbols.
1721 // PSHNDX points to a location storing the text section index if found.
1722 // Return whether we can find the linked section.
1724 find_linked_text_section(const unsigned char* pshdr
,
1725 const unsigned char* psyms
, unsigned int* pshndx
);
1728 // Make a new Arm_exidx_input_section object for EXIDX section with
1729 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1730 // index of the linked text section.
1732 make_exidx_input_section(unsigned int shndx
,
1733 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1734 unsigned int text_shndx
,
1735 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1737 // Return the output address of either a plain input section or a
1738 // relaxed input section. SHNDX is the section index.
1740 simple_input_section_output_address(unsigned int, Output_section
*);
1742 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1743 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1746 // List of stub tables.
1747 Stub_table_list stub_tables_
;
1748 // Bit vector to tell if a local symbol is a thumb function or not.
1749 // This is only valid after do_count_local_symbol is called.
1750 std::vector
<bool> local_symbol_is_thumb_function_
;
1751 // processor-specific flags in ELF file header.
1752 elfcpp::Elf_Word processor_specific_flags_
;
1753 // Object attributes if there is an .ARM.attributes section or NULL.
1754 Attributes_section_data
* attributes_section_data_
;
1755 // Mapping symbols information.
1756 Mapping_symbols_info mapping_symbols_info_
;
1757 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1758 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1759 // Map a text section to its associated .ARM.exidx section, if there is one.
1760 Exidx_section_map exidx_section_map_
;
1761 // Whether output local symbol count needs updating.
1762 bool output_local_symbol_count_needs_update_
;
1763 // Whether we merge processor flags and attributes of this object to
1765 bool merge_flags_and_attributes_
;
1768 // Arm_dynobj class.
1770 template<bool big_endian
>
1771 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1774 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1775 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1776 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1777 processor_specific_flags_(0), attributes_section_data_(NULL
)
1781 { delete this->attributes_section_data_
; }
1783 // Downcast a base pointer to an Arm_relobj pointer. This is
1784 // not type-safe but we only use Arm_relobj not the base class.
1785 static Arm_dynobj
<big_endian
>*
1786 as_arm_dynobj(Dynobj
* dynobj
)
1787 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1789 // Processor-specific flags in ELF file header. This is valid only after
1792 processor_specific_flags() const
1793 { return this->processor_specific_flags_
; }
1795 // Attributes section data.
1796 const Attributes_section_data
*
1797 attributes_section_data() const
1798 { return this->attributes_section_data_
; }
1801 // Read the symbol information.
1803 do_read_symbols(Read_symbols_data
* sd
);
1806 // processor-specific flags in ELF file header.
1807 elfcpp::Elf_Word processor_specific_flags_
;
1808 // Object attributes if there is an .ARM.attributes section or NULL.
1809 Attributes_section_data
* attributes_section_data_
;
1812 // Functor to read reloc addends during stub generation.
1814 template<int sh_type
, bool big_endian
>
1815 struct Stub_addend_reader
1817 // Return the addend for a relocation of a particular type. Depending
1818 // on whether this is a REL or RELA relocation, read the addend from a
1819 // view or from a Reloc object.
1820 elfcpp::Elf_types
<32>::Elf_Swxword
1822 unsigned int /* r_type */,
1823 const unsigned char* /* view */,
1824 const typename Reloc_types
<sh_type
,
1825 32, big_endian
>::Reloc
& /* reloc */) const;
1828 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1830 template<bool big_endian
>
1831 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1833 elfcpp::Elf_types
<32>::Elf_Swxword
1836 const unsigned char*,
1837 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1840 // Specialized Stub_addend_reader for RELA type relocation sections.
1841 // We currently do not handle RELA type relocation sections but it is trivial
1842 // to implement the addend reader. This is provided for completeness and to
1843 // make it easier to add support for RELA relocation sections in the future.
1845 template<bool big_endian
>
1846 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1848 elfcpp::Elf_types
<32>::Elf_Swxword
1851 const unsigned char*,
1852 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1853 big_endian
>::Reloc
& reloc
) const
1854 { return reloc
.get_r_addend(); }
1857 // Cortex_a8_reloc class. We keep record of relocation that may need
1858 // the Cortex-A8 erratum workaround.
1860 class Cortex_a8_reloc
1863 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1864 Arm_address destination
)
1865 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1871 // Accessors: This is a read-only class.
1873 // Return the relocation stub associated with this relocation if there is
1877 { return this->reloc_stub_
; }
1879 // Return the relocation type.
1882 { return this->r_type_
; }
1884 // Return the destination address of the relocation. LSB stores the THUMB
1888 { return this->destination_
; }
1891 // Associated relocation stub if there is one, or NULL.
1892 const Reloc_stub
* reloc_stub_
;
1894 unsigned int r_type_
;
1895 // Destination address of this relocation. LSB is used to distinguish
1897 Arm_address destination_
;
1900 // Arm_output_data_got class. We derive this from Output_data_got to add
1901 // extra methods to handle TLS relocations in a static link.
1903 template<bool big_endian
>
1904 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1907 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1908 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1911 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1912 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1913 // applied in a static link.
1915 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1916 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1918 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1919 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1920 // relocation that needs to be applied in a static link.
1922 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1923 Sized_relobj_file
<32, big_endian
>* relobj
,
1926 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1930 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1931 // The first one is initialized to be 1, which is the module index for
1932 // the main executable and the second one 0. A reloc of the type
1933 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1934 // be applied by gold. GSYM is a global symbol.
1936 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1938 // Same as the above but for a local symbol in OBJECT with INDEX.
1940 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1941 Sized_relobj_file
<32, big_endian
>* object
,
1942 unsigned int index
);
1945 // Write out the GOT table.
1947 do_write(Output_file
*);
1950 // This class represent dynamic relocations that need to be applied by
1951 // gold because we are using TLS relocations in a static link.
1955 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1956 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1957 { this->u_
.global
.symbol
= gsym
; }
1959 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1960 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1961 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1963 this->u_
.local
.relobj
= relobj
;
1964 this->u_
.local
.index
= index
;
1967 // Return the GOT offset.
1970 { return this->got_offset_
; }
1975 { return this->r_type_
; }
1977 // Whether the symbol is global or not.
1979 symbol_is_global() const
1980 { return this->symbol_is_global_
; }
1982 // For a relocation against a global symbol, the global symbol.
1986 gold_assert(this->symbol_is_global_
);
1987 return this->u_
.global
.symbol
;
1990 // For a relocation against a local symbol, the defining object.
1991 Sized_relobj_file
<32, big_endian
>*
1994 gold_assert(!this->symbol_is_global_
);
1995 return this->u_
.local
.relobj
;
1998 // For a relocation against a local symbol, the local symbol index.
2002 gold_assert(!this->symbol_is_global_
);
2003 return this->u_
.local
.index
;
2007 // GOT offset of the entry to which this relocation is applied.
2008 unsigned int got_offset_
;
2009 // Type of relocation.
2010 unsigned int r_type_
;
2011 // Whether this relocation is against a global symbol.
2012 bool symbol_is_global_
;
2013 // A global or local symbol.
2018 // For a global symbol, the symbol itself.
2023 // For a local symbol, the object defining object.
2024 Sized_relobj_file
<32, big_endian
>* relobj
;
2025 // For a local symbol, the symbol index.
2031 // Symbol table of the output object.
2032 Symbol_table
* symbol_table_
;
2033 // Layout of the output object.
2035 // Static relocs to be applied to the GOT.
2036 std::vector
<Static_reloc
> static_relocs_
;
2039 // The ARM target has many relocation types with odd-sizes or noncontiguous
2040 // bits. The default handling of relocatable relocation cannot process these
2041 // relocations. So we have to extend the default code.
2043 template<bool big_endian
, typename Classify_reloc
>
2044 class Arm_scan_relocatable_relocs
:
2045 public Default_scan_relocatable_relocs
<Classify_reloc
>
2048 // Return the strategy to use for a local symbol which is a section
2049 // symbol, given the relocation type.
2050 inline Relocatable_relocs::Reloc_strategy
2051 local_section_strategy(unsigned int r_type
, Relobj
*)
2053 if (Classify_reloc::sh_type
== elfcpp::SHT_RELA
)
2054 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2057 if (r_type
== elfcpp::R_ARM_TARGET1
2058 || r_type
== elfcpp::R_ARM_TARGET2
)
2060 const Target_arm
<big_endian
>* arm_target
=
2061 Target_arm
<big_endian
>::default_target();
2062 r_type
= arm_target
->get_real_reloc_type(r_type
);
2067 // Relocations that write nothing. These exclude R_ARM_TARGET1
2068 // and R_ARM_TARGET2.
2069 case elfcpp::R_ARM_NONE
:
2070 case elfcpp::R_ARM_V4BX
:
2071 case elfcpp::R_ARM_TLS_GOTDESC
:
2072 case elfcpp::R_ARM_TLS_CALL
:
2073 case elfcpp::R_ARM_TLS_DESCSEQ
:
2074 case elfcpp::R_ARM_THM_TLS_CALL
:
2075 case elfcpp::R_ARM_GOTRELAX
:
2076 case elfcpp::R_ARM_GNU_VTENTRY
:
2077 case elfcpp::R_ARM_GNU_VTINHERIT
:
2078 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2079 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2080 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2081 // These should have been converted to something else above.
2082 case elfcpp::R_ARM_TARGET1
:
2083 case elfcpp::R_ARM_TARGET2
:
2085 // Relocations that write full 32 bits and
2086 // have alignment of 1.
2087 case elfcpp::R_ARM_ABS32
:
2088 case elfcpp::R_ARM_REL32
:
2089 case elfcpp::R_ARM_SBREL32
:
2090 case elfcpp::R_ARM_GOTOFF32
:
2091 case elfcpp::R_ARM_BASE_PREL
:
2092 case elfcpp::R_ARM_GOT_BREL
:
2093 case elfcpp::R_ARM_BASE_ABS
:
2094 case elfcpp::R_ARM_ABS32_NOI
:
2095 case elfcpp::R_ARM_REL32_NOI
:
2096 case elfcpp::R_ARM_PLT32_ABS
:
2097 case elfcpp::R_ARM_GOT_ABS
:
2098 case elfcpp::R_ARM_GOT_PREL
:
2099 case elfcpp::R_ARM_TLS_GD32
:
2100 case elfcpp::R_ARM_TLS_LDM32
:
2101 case elfcpp::R_ARM_TLS_LDO32
:
2102 case elfcpp::R_ARM_TLS_IE32
:
2103 case elfcpp::R_ARM_TLS_LE32
:
2104 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED
;
2106 // For all other static relocations, return RELOC_SPECIAL.
2107 return Relocatable_relocs::RELOC_SPECIAL
;
2113 template<bool big_endian
>
2114 class Target_arm
: public Sized_target
<32, big_endian
>
2117 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2120 // When were are relocating a stub, we pass this as the relocation number.
2121 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2123 Target_arm(const Target::Target_info
* info
= &arm_info
)
2124 : Sized_target
<32, big_endian
>(info
),
2125 got_(NULL
), plt_(NULL
), got_plt_(NULL
), got_irelative_(NULL
),
2126 rel_dyn_(NULL
), rel_irelative_(NULL
), copy_relocs_(elfcpp::R_ARM_COPY
),
2127 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2128 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2129 should_force_pic_veneer_(false),
2130 arm_input_section_map_(), attributes_section_data_(NULL
),
2131 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2134 // Whether we force PCI branch veneers.
2136 should_force_pic_veneer() const
2137 { return this->should_force_pic_veneer_
; }
2139 // Set PIC veneer flag.
2141 set_should_force_pic_veneer(bool value
)
2142 { this->should_force_pic_veneer_
= value
; }
2144 // Whether we use THUMB-2 instructions.
2146 using_thumb2() const
2148 Object_attribute
* attr
=
2149 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2150 int arch
= attr
->int_value();
2151 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2154 // Whether we use THUMB/THUMB-2 instructions only.
2156 using_thumb_only() const
2158 Object_attribute
* attr
=
2159 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2161 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2162 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2164 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2165 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2167 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2168 return attr
->int_value() == 'M';
2171 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2173 may_use_arm_nop() const
2175 Object_attribute
* attr
=
2176 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2177 int arch
= attr
->int_value();
2178 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2179 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2180 || arch
== elfcpp::TAG_CPU_ARCH_V7
2181 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2184 // Whether we have THUMB-2 NOP.W instruction.
2186 may_use_thumb2_nop() const
2188 Object_attribute
* attr
=
2189 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2190 int arch
= attr
->int_value();
2191 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2192 || arch
== elfcpp::TAG_CPU_ARCH_V7
2193 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2196 // Whether we have v4T interworking instructions available.
2198 may_use_v4t_interworking() const
2200 Object_attribute
* attr
=
2201 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2202 int arch
= attr
->int_value();
2203 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2204 && arch
!= elfcpp::TAG_CPU_ARCH_V4
);
2207 // Whether we have v5T interworking instructions available.
2209 may_use_v5t_interworking() const
2211 Object_attribute
* attr
=
2212 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2213 int arch
= attr
->int_value();
2214 if (parameters
->options().fix_arm1176())
2215 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2216 || arch
== elfcpp::TAG_CPU_ARCH_V7
2217 || arch
== elfcpp::TAG_CPU_ARCH_V6_M
2218 || arch
== elfcpp::TAG_CPU_ARCH_V6S_M
2219 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2221 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2222 && arch
!= elfcpp::TAG_CPU_ARCH_V4
2223 && arch
!= elfcpp::TAG_CPU_ARCH_V4T
);
2226 // Process the relocations to determine unreferenced sections for
2227 // garbage collection.
2229 gc_process_relocs(Symbol_table
* symtab
,
2231 Sized_relobj_file
<32, big_endian
>* object
,
2232 unsigned int data_shndx
,
2233 unsigned int sh_type
,
2234 const unsigned char* prelocs
,
2236 Output_section
* output_section
,
2237 bool needs_special_offset_handling
,
2238 size_t local_symbol_count
,
2239 const unsigned char* plocal_symbols
);
2241 // Scan the relocations to look for symbol adjustments.
2243 scan_relocs(Symbol_table
* symtab
,
2245 Sized_relobj_file
<32, big_endian
>* object
,
2246 unsigned int data_shndx
,
2247 unsigned int sh_type
,
2248 const unsigned char* prelocs
,
2250 Output_section
* output_section
,
2251 bool needs_special_offset_handling
,
2252 size_t local_symbol_count
,
2253 const unsigned char* plocal_symbols
);
2255 // Finalize the sections.
2257 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2259 // Return the value to use for a dynamic symbol which requires special
2262 do_dynsym_value(const Symbol
*) const;
2264 // Return the plt address for globals. Since we have irelative plt entries,
2265 // address calculation is not as straightforward as plt_address + plt_offset.
2267 do_plt_address_for_global(const Symbol
* gsym
) const
2268 { return this->plt_section()->address_for_global(gsym
); }
2270 // Return the plt address for locals. Since we have irelative plt entries,
2271 // address calculation is not as straightforward as plt_address + plt_offset.
2273 do_plt_address_for_local(const Relobj
* relobj
, unsigned int symndx
) const
2274 { return this->plt_section()->address_for_local(relobj
, symndx
); }
2276 // Relocate a section.
2278 relocate_section(const Relocate_info
<32, big_endian
>*,
2279 unsigned int sh_type
,
2280 const unsigned char* prelocs
,
2282 Output_section
* output_section
,
2283 bool needs_special_offset_handling
,
2284 unsigned char* view
,
2285 Arm_address view_address
,
2286 section_size_type view_size
,
2287 const Reloc_symbol_changes
*);
2289 // Scan the relocs during a relocatable link.
2291 scan_relocatable_relocs(Symbol_table
* symtab
,
2293 Sized_relobj_file
<32, big_endian
>* object
,
2294 unsigned int data_shndx
,
2295 unsigned int sh_type
,
2296 const unsigned char* prelocs
,
2298 Output_section
* output_section
,
2299 bool needs_special_offset_handling
,
2300 size_t local_symbol_count
,
2301 const unsigned char* plocal_symbols
,
2302 Relocatable_relocs
*);
2304 // Scan the relocs for --emit-relocs.
2306 emit_relocs_scan(Symbol_table
* symtab
,
2308 Sized_relobj_file
<32, big_endian
>* object
,
2309 unsigned int data_shndx
,
2310 unsigned int sh_type
,
2311 const unsigned char* prelocs
,
2313 Output_section
* output_section
,
2314 bool needs_special_offset_handling
,
2315 size_t local_symbol_count
,
2316 const unsigned char* plocal_syms
,
2317 Relocatable_relocs
* rr
);
2319 // Emit relocations for a section.
2321 relocate_relocs(const Relocate_info
<32, big_endian
>*,
2322 unsigned int sh_type
,
2323 const unsigned char* prelocs
,
2325 Output_section
* output_section
,
2326 typename
elfcpp::Elf_types
<32>::Elf_Off
2327 offset_in_output_section
,
2328 unsigned char* view
,
2329 Arm_address view_address
,
2330 section_size_type view_size
,
2331 unsigned char* reloc_view
,
2332 section_size_type reloc_view_size
);
2334 // Perform target-specific processing in a relocatable link. This is
2335 // only used if we use the relocation strategy RELOC_SPECIAL.
2337 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2338 unsigned int sh_type
,
2339 const unsigned char* preloc_in
,
2341 Output_section
* output_section
,
2342 typename
elfcpp::Elf_types
<32>::Elf_Off
2343 offset_in_output_section
,
2344 unsigned char* view
,
2345 typename
elfcpp::Elf_types
<32>::Elf_Addr
2347 section_size_type view_size
,
2348 unsigned char* preloc_out
);
2350 // Return whether SYM is defined by the ABI.
2352 do_is_defined_by_abi(const Symbol
* sym
) const
2353 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2355 // Return whether there is a GOT section.
2357 has_got_section() const
2358 { return this->got_
!= NULL
; }
2360 // Return the size of the GOT section.
2364 gold_assert(this->got_
!= NULL
);
2365 return this->got_
->data_size();
2368 // Return the number of entries in the GOT.
2370 got_entry_count() const
2372 if (!this->has_got_section())
2374 return this->got_size() / 4;
2377 // Return the number of entries in the PLT.
2379 plt_entry_count() const;
2381 // Return the offset of the first non-reserved PLT entry.
2383 first_plt_entry_offset() const;
2385 // Return the size of each PLT entry.
2387 plt_entry_size() const;
2389 // Get the section to use for IRELATIVE relocations, create it if necessary.
2391 rel_irelative_section(Layout
*);
2393 // Map platform-specific reloc types
2395 get_real_reloc_type(unsigned int r_type
);
2398 // Methods to support stub-generations.
2401 // Return the stub factory
2403 stub_factory() const
2404 { return this->stub_factory_
; }
2406 // Make a new Arm_input_section object.
2407 Arm_input_section
<big_endian
>*
2408 new_arm_input_section(Relobj
*, unsigned int);
2410 // Find the Arm_input_section object corresponding to the SHNDX-th input
2411 // section of RELOBJ.
2412 Arm_input_section
<big_endian
>*
2413 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2415 // Make a new Stub_table
2416 Stub_table
<big_endian
>*
2417 new_stub_table(Arm_input_section
<big_endian
>*);
2419 // Scan a section for stub generation.
2421 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2422 const unsigned char*, size_t, Output_section
*,
2423 bool, const unsigned char*, Arm_address
,
2428 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2429 Output_section
*, unsigned char*, Arm_address
,
2432 // Get the default ARM target.
2433 static Target_arm
<big_endian
>*
2436 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2437 && parameters
->target().is_big_endian() == big_endian
);
2438 return static_cast<Target_arm
<big_endian
>*>(
2439 parameters
->sized_target
<32, big_endian
>());
2442 // Whether NAME belongs to a mapping symbol.
2444 is_mapping_symbol_name(const char* name
)
2448 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2449 && (name
[2] == '\0' || name
[2] == '.'));
2452 // Whether we work around the Cortex-A8 erratum.
2454 fix_cortex_a8() const
2455 { return this->fix_cortex_a8_
; }
2457 // Whether we merge exidx entries in debuginfo.
2459 merge_exidx_entries() const
2460 { return parameters
->options().merge_exidx_entries(); }
2462 // Whether we fix R_ARM_V4BX relocation.
2464 // 1 - replace with MOV instruction (armv4 target)
2465 // 2 - make interworking veneer (>= armv4t targets only)
2466 General_options::Fix_v4bx
2468 { return parameters
->options().fix_v4bx(); }
2470 // Scan a span of THUMB code section for Cortex-A8 erratum.
2472 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2473 section_size_type
, section_size_type
,
2474 const unsigned char*, Arm_address
);
2476 // Apply Cortex-A8 workaround to a branch.
2478 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2479 unsigned char*, Arm_address
);
2482 // Make the PLT-generator object.
2483 Output_data_plt_arm
<big_endian
>*
2484 make_data_plt(Layout
* layout
,
2485 Arm_output_data_got
<big_endian
>* got
,
2486 Output_data_space
* got_plt
,
2487 Output_data_space
* got_irelative
)
2488 { return this->do_make_data_plt(layout
, got
, got_plt
, got_irelative
); }
2490 // Make an ELF object.
2492 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2493 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2496 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2497 const elfcpp::Ehdr
<32, !big_endian
>&)
2498 { gold_unreachable(); }
2501 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2502 const elfcpp::Ehdr
<64, false>&)
2503 { gold_unreachable(); }
2506 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2507 const elfcpp::Ehdr
<64, true>&)
2508 { gold_unreachable(); }
2510 // Make an output section.
2512 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2513 elfcpp::Elf_Xword flags
)
2514 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2517 do_adjust_elf_header(unsigned char* view
, int len
);
2519 // We only need to generate stubs, and hence perform relaxation if we are
2520 // not doing relocatable linking.
2522 do_may_relax() const
2523 { return !parameters
->options().relocatable(); }
2526 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2528 // Determine whether an object attribute tag takes an integer, a
2531 do_attribute_arg_type(int tag
) const;
2533 // Reorder tags during output.
2535 do_attributes_order(int num
) const;
2537 // This is called when the target is selected as the default.
2539 do_select_as_default_target()
2541 // No locking is required since there should only be one default target.
2542 // We cannot have both the big-endian and little-endian ARM targets
2544 gold_assert(arm_reloc_property_table
== NULL
);
2545 arm_reloc_property_table
= new Arm_reloc_property_table();
2548 // Virtual function which is set to return true by a target if
2549 // it can use relocation types to determine if a function's
2550 // pointer is taken.
2552 do_can_check_for_function_pointers() const
2555 // Whether a section called SECTION_NAME may have function pointers to
2556 // sections not eligible for safe ICF folding.
2558 do_section_may_have_icf_unsafe_pointers(const char* section_name
) const
2560 return (!is_prefix_of(".ARM.exidx", section_name
)
2561 && !is_prefix_of(".ARM.extab", section_name
)
2562 && Target::do_section_may_have_icf_unsafe_pointers(section_name
));
2566 do_define_standard_symbols(Symbol_table
*, Layout
*);
2568 virtual Output_data_plt_arm
<big_endian
>*
2569 do_make_data_plt(Layout
* layout
,
2570 Arm_output_data_got
<big_endian
>* got
,
2571 Output_data_space
* got_plt
,
2572 Output_data_space
* got_irelative
)
2574 gold_assert(got_plt
!= NULL
&& got_irelative
!= NULL
);
2575 if (parameters
->options().long_plt())
2576 return new Output_data_plt_arm_long
<big_endian
>(
2577 layout
, got
, got_plt
, got_irelative
);
2579 return new Output_data_plt_arm_short
<big_endian
>(
2580 layout
, got
, got_plt
, got_irelative
);
2584 // The class which scans relocations.
2589 : issued_non_pic_error_(false)
2593 get_reference_flags(unsigned int r_type
);
2596 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2597 Sized_relobj_file
<32, big_endian
>* object
,
2598 unsigned int data_shndx
,
2599 Output_section
* output_section
,
2600 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2601 const elfcpp::Sym
<32, big_endian
>& lsym
,
2605 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2606 Sized_relobj_file
<32, big_endian
>* object
,
2607 unsigned int data_shndx
,
2608 Output_section
* output_section
,
2609 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2613 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2614 Sized_relobj_file
<32, big_endian
>* ,
2617 const elfcpp::Rel
<32, big_endian
>& ,
2619 const elfcpp::Sym
<32, big_endian
>&);
2622 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2623 Sized_relobj_file
<32, big_endian
>* ,
2626 const elfcpp::Rel
<32, big_endian
>& ,
2627 unsigned int , Symbol
*);
2631 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2632 unsigned int r_type
);
2635 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2636 unsigned int r_type
, Symbol
*);
2639 check_non_pic(Relobj
*, unsigned int r_type
);
2641 // Almost identical to Symbol::needs_plt_entry except that it also
2642 // handles STT_ARM_TFUNC.
2644 symbol_needs_plt_entry(const Symbol
* sym
)
2646 // An undefined symbol from an executable does not need a PLT entry.
2647 if (sym
->is_undefined() && !parameters
->options().shared())
2650 if (sym
->type() == elfcpp::STT_GNU_IFUNC
)
2653 return (!parameters
->doing_static_link()
2654 && (sym
->type() == elfcpp::STT_FUNC
2655 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2656 && (sym
->is_from_dynobj()
2657 || sym
->is_undefined()
2658 || sym
->is_preemptible()));
2662 possible_function_pointer_reloc(unsigned int r_type
);
2664 // Whether a plt entry is needed for ifunc.
2666 reloc_needs_plt_for_ifunc(Sized_relobj_file
<32, big_endian
>*,
2667 unsigned int r_type
);
2669 // Whether we have issued an error about a non-PIC compilation.
2670 bool issued_non_pic_error_
;
2673 // The class which implements relocation.
2683 // Return whether the static relocation needs to be applied.
2685 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2686 unsigned int r_type
,
2688 Output_section
* output_section
);
2690 // Do a relocation. Return false if the caller should not issue
2691 // any warnings about this relocation.
2693 relocate(const Relocate_info
<32, big_endian
>*, unsigned int,
2694 Target_arm
*, Output_section
*, size_t, const unsigned char*,
2695 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2696 unsigned char*, Arm_address
, section_size_type
);
2698 // Return whether we want to pass flag NON_PIC_REF for this
2699 // reloc. This means the relocation type accesses a symbol not via
2702 reloc_is_non_pic(unsigned int r_type
)
2706 // These relocation types reference GOT or PLT entries explicitly.
2707 case elfcpp::R_ARM_GOT_BREL
:
2708 case elfcpp::R_ARM_GOT_ABS
:
2709 case elfcpp::R_ARM_GOT_PREL
:
2710 case elfcpp::R_ARM_GOT_BREL12
:
2711 case elfcpp::R_ARM_PLT32_ABS
:
2712 case elfcpp::R_ARM_TLS_GD32
:
2713 case elfcpp::R_ARM_TLS_LDM32
:
2714 case elfcpp::R_ARM_TLS_IE32
:
2715 case elfcpp::R_ARM_TLS_IE12GP
:
2717 // These relocate types may use PLT entries.
2718 case elfcpp::R_ARM_CALL
:
2719 case elfcpp::R_ARM_THM_CALL
:
2720 case elfcpp::R_ARM_JUMP24
:
2721 case elfcpp::R_ARM_THM_JUMP24
:
2722 case elfcpp::R_ARM_THM_JUMP19
:
2723 case elfcpp::R_ARM_PLT32
:
2724 case elfcpp::R_ARM_THM_XPC22
:
2725 case elfcpp::R_ARM_PREL31
:
2726 case elfcpp::R_ARM_SBREL31
:
2735 // Do a TLS relocation.
2736 inline typename Arm_relocate_functions
<big_endian
>::Status
2737 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2738 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2739 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2740 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2745 // A class for inquiring about properties of a relocation,
2746 // used while scanning relocs during a relocatable link and
2747 // garbage collection.
2748 class Classify_reloc
:
2749 public gold::Default_classify_reloc
<elfcpp::SHT_REL
, 32, big_endian
>
2752 // Return the size of the addend of the relocation (only used for SHT_REL).
2754 get_size_for_reloc(unsigned int, Relobj
*);
2757 // Adjust TLS relocation type based on the options and whether this
2758 // is a local symbol.
2759 static tls::Tls_optimization
2760 optimize_tls_reloc(bool is_final
, int r_type
);
2762 // Get the GOT section, creating it if necessary.
2763 Arm_output_data_got
<big_endian
>*
2764 got_section(Symbol_table
*, Layout
*);
2766 // Get the GOT PLT section.
2768 got_plt_section() const
2770 gold_assert(this->got_plt_
!= NULL
);
2771 return this->got_plt_
;
2774 // Create the PLT section.
2776 make_plt_section(Symbol_table
* symtab
, Layout
* layout
);
2778 // Create a PLT entry for a global symbol.
2780 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2782 // Create a PLT entry for a local STT_GNU_IFUNC symbol.
2784 make_local_ifunc_plt_entry(Symbol_table
*, Layout
*,
2785 Sized_relobj_file
<32, big_endian
>* relobj
,
2786 unsigned int local_sym_index
);
2788 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2790 define_tls_base_symbol(Symbol_table
*, Layout
*);
2792 // Create a GOT entry for the TLS module index.
2794 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2795 Sized_relobj_file
<32, big_endian
>* object
);
2797 // Get the PLT section.
2798 const Output_data_plt_arm
<big_endian
>*
2801 gold_assert(this->plt_
!= NULL
);
2805 // Get the dynamic reloc section, creating it if necessary.
2807 rel_dyn_section(Layout
*);
2809 // Get the section to use for TLS_DESC relocations.
2811 rel_tls_desc_section(Layout
*) const;
2813 // Return true if the symbol may need a COPY relocation.
2814 // References from an executable object to non-function symbols
2815 // defined in a dynamic object may need a COPY relocation.
2817 may_need_copy_reloc(Symbol
* gsym
)
2819 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2820 && gsym
->may_need_copy_reloc());
2823 // Add a potential copy relocation.
2825 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2826 Sized_relobj_file
<32, big_endian
>* object
,
2827 unsigned int shndx
, Output_section
* output_section
,
2828 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2830 unsigned int r_type
= elfcpp::elf_r_type
<32>(reloc
.get_r_info());
2831 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2832 symtab
->get_sized_symbol
<32>(sym
),
2833 object
, shndx
, output_section
,
2834 r_type
, reloc
.get_r_offset(), 0,
2835 this->rel_dyn_section(layout
));
2838 // Whether two EABI versions are compatible.
2840 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2842 // Merge processor-specific flags from input object and those in the ELF
2843 // header of the output.
2845 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2847 // Get the secondary compatible architecture.
2849 get_secondary_compatible_arch(const Attributes_section_data
*);
2851 // Set the secondary compatible architecture.
2853 set_secondary_compatible_arch(Attributes_section_data
*, int);
2856 tag_cpu_arch_combine(const char*, int, int*, int, int);
2858 // Helper to print AEABI enum tag value.
2860 aeabi_enum_name(unsigned int);
2862 // Return string value for TAG_CPU_name.
2864 tag_cpu_name_value(unsigned int);
2866 // Query attributes object to see if integer divide instructions may be
2867 // present in an object.
2869 attributes_accept_div(int arch
, int profile
,
2870 const Object_attribute
* div_attr
);
2872 // Query attributes object to see if integer divide instructions are
2873 // forbidden to be in the object. This is not the inverse of
2874 // attributes_accept_div.
2876 attributes_forbid_div(const Object_attribute
* div_attr
);
2878 // Merge object attributes from input object and those in the output.
2880 merge_object_attributes(const char*, const Attributes_section_data
*);
2882 // Helper to get an AEABI object attribute
2884 get_aeabi_object_attribute(int tag
) const
2886 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2887 gold_assert(pasd
!= NULL
);
2888 Object_attribute
* attr
=
2889 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2890 gold_assert(attr
!= NULL
);
2895 // Methods to support stub-generations.
2898 // Group input sections for stub generation.
2900 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2902 // Scan a relocation for stub generation.
2904 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2905 const Sized_symbol
<32>*, unsigned int,
2906 const Symbol_value
<32>*,
2907 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2909 // Scan a relocation section for stub.
2910 template<int sh_type
>
2912 scan_reloc_section_for_stubs(
2913 const Relocate_info
<32, big_endian
>* relinfo
,
2914 const unsigned char* prelocs
,
2916 Output_section
* output_section
,
2917 bool needs_special_offset_handling
,
2918 const unsigned char* view
,
2919 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2922 // Fix .ARM.exidx section coverage.
2924 fix_exidx_coverage(Layout
*, const Input_objects
*,
2925 Arm_output_section
<big_endian
>*, Symbol_table
*,
2928 // Functors for STL set.
2929 struct output_section_address_less_than
2932 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2933 { return s1
->address() < s2
->address(); }
2936 // Information about this specific target which we pass to the
2937 // general Target structure.
2938 static const Target::Target_info arm_info
;
2940 // The types of GOT entries needed for this platform.
2941 // These values are exposed to the ABI in an incremental link.
2942 // Do not renumber existing values without changing the version
2943 // number of the .gnu_incremental_inputs section.
2946 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2947 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2948 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2949 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2950 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2953 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2955 // Map input section to Arm_input_section.
2956 typedef Unordered_map
<Section_id
,
2957 Arm_input_section
<big_endian
>*,
2959 Arm_input_section_map
;
2961 // Map output addresses to relocs for Cortex-A8 erratum.
2962 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2963 Cortex_a8_relocs_info
;
2966 Arm_output_data_got
<big_endian
>* got_
;
2968 Output_data_plt_arm
<big_endian
>* plt_
;
2969 // The GOT PLT section.
2970 Output_data_space
* got_plt_
;
2971 // The GOT section for IRELATIVE relocations.
2972 Output_data_space
* got_irelative_
;
2973 // The dynamic reloc section.
2974 Reloc_section
* rel_dyn_
;
2975 // The section to use for IRELATIVE relocs.
2976 Reloc_section
* rel_irelative_
;
2977 // Relocs saved to avoid a COPY reloc.
2978 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2979 // Offset of the GOT entry for the TLS module index.
2980 unsigned int got_mod_index_offset_
;
2981 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2982 bool tls_base_symbol_defined_
;
2983 // Vector of Stub_tables created.
2984 Stub_table_list stub_tables_
;
2986 const Stub_factory
&stub_factory_
;
2987 // Whether we force PIC branch veneers.
2988 bool should_force_pic_veneer_
;
2989 // Map for locating Arm_input_sections.
2990 Arm_input_section_map arm_input_section_map_
;
2991 // Attributes section data in output.
2992 Attributes_section_data
* attributes_section_data_
;
2993 // Whether we want to fix code for Cortex-A8 erratum.
2994 bool fix_cortex_a8_
;
2995 // Map addresses to relocs for Cortex-A8 erratum.
2996 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2999 template<bool big_endian
>
3000 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
3003 big_endian
, // is_big_endian
3004 elfcpp::EM_ARM
, // machine_code
3005 false, // has_make_symbol
3006 false, // has_resolve
3007 false, // has_code_fill
3008 true, // is_default_stack_executable
3009 false, // can_icf_inline_merge_sections
3011 "/usr/lib/libc.so.1", // dynamic_linker
3012 0x8000, // default_text_segment_address
3013 0x1000, // abi_pagesize (overridable by -z max-page-size)
3014 0x1000, // common_pagesize (overridable by -z common-page-size)
3015 false, // isolate_execinstr
3017 elfcpp::SHN_UNDEF
, // small_common_shndx
3018 elfcpp::SHN_UNDEF
, // large_common_shndx
3019 0, // small_common_section_flags
3020 0, // large_common_section_flags
3021 ".ARM.attributes", // attributes_section
3022 "aeabi", // attributes_vendor
3023 "_start", // entry_symbol_name
3024 32, // hash_entry_size
3027 // Arm relocate functions class
3030 template<bool big_endian
>
3031 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
3036 STATUS_OKAY
, // No error during relocation.
3037 STATUS_OVERFLOW
, // Relocation overflow.
3038 STATUS_BAD_RELOC
// Relocation cannot be applied.
3042 typedef Relocate_functions
<32, big_endian
> Base
;
3043 typedef Arm_relocate_functions
<big_endian
> This
;
3045 // Encoding of imm16 argument for movt and movw ARM instructions
3048 // imm16 := imm4 | imm12
3050 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3051 // +-------+---------------+-------+-------+-----------------------+
3052 // | | |imm4 | |imm12 |
3053 // +-------+---------------+-------+-------+-----------------------+
3055 // Extract the relocation addend from VAL based on the ARM
3056 // instruction encoding described above.
3057 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3058 extract_arm_movw_movt_addend(
3059 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3061 // According to the Elf ABI for ARM Architecture the immediate
3062 // field is sign-extended to form the addend.
3063 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000) | (val
& 0xfff));
3066 // Insert X into VAL based on the ARM instruction encoding described
3068 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3069 insert_val_arm_movw_movt(
3070 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3071 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3075 val
|= (x
& 0xf000) << 4;
3079 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3082 // imm16 := imm4 | i | imm3 | imm8
3084 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3085 // +---------+-+-----------+-------++-+-----+-------+---------------+
3086 // | |i| |imm4 || |imm3 | |imm8 |
3087 // +---------+-+-----------+-------++-+-----+-------+---------------+
3089 // Extract the relocation addend from VAL based on the Thumb2
3090 // instruction encoding described above.
3091 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3092 extract_thumb_movw_movt_addend(
3093 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
3095 // According to the Elf ABI for ARM Architecture the immediate
3096 // field is sign-extended to form the addend.
3097 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000)
3098 | ((val
>> 15) & 0x0800)
3099 | ((val
>> 4) & 0x0700)
3103 // Insert X into VAL based on the Thumb2 instruction encoding
3105 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3106 insert_val_thumb_movw_movt(
3107 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3108 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3111 val
|= (x
& 0xf000) << 4;
3112 val
|= (x
& 0x0800) << 15;
3113 val
|= (x
& 0x0700) << 4;
3114 val
|= (x
& 0x00ff);
3118 // Calculate the smallest constant Kn for the specified residual.
3119 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3121 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3127 // Determine the most significant bit in the residual and
3128 // align the resulting value to a 2-bit boundary.
3129 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3131 // The desired shift is now (msb - 6), or zero, whichever
3133 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3136 // Calculate the final residual for the specified group index.
3137 // If the passed group index is less than zero, the method will return
3138 // the value of the specified residual without any change.
3139 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3140 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3141 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3144 for (int n
= 0; n
<= group
; n
++)
3146 // Calculate which part of the value to mask.
3147 uint32_t shift
= calc_grp_kn(residual
);
3148 // Calculate the residual for the next time around.
3149 residual
&= ~(residual
& (0xff << shift
));
3155 // Calculate the value of Gn for the specified group index.
3156 // We return it in the form of an encoded constant-and-rotation.
3157 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3158 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3159 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3162 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3165 for (int n
= 0; n
<= group
; n
++)
3167 // Calculate which part of the value to mask.
3168 shift
= calc_grp_kn(residual
);
3169 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3170 gn
= residual
& (0xff << shift
);
3171 // Calculate the residual for the next time around.
3174 // Return Gn in the form of an encoded constant-and-rotation.
3175 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3179 // Handle ARM long branches.
3180 static typename
This::Status
3181 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3182 unsigned char*, const Sized_symbol
<32>*,
3183 const Arm_relobj
<big_endian
>*, unsigned int,
3184 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3186 // Handle THUMB long branches.
3187 static typename
This::Status
3188 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3189 unsigned char*, const Sized_symbol
<32>*,
3190 const Arm_relobj
<big_endian
>*, unsigned int,
3191 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3194 // Return the branch offset of a 32-bit THUMB branch.
3195 static inline int32_t
3196 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3198 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3199 // involving the J1 and J2 bits.
3200 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3201 uint32_t upper
= upper_insn
& 0x3ffU
;
3202 uint32_t lower
= lower_insn
& 0x7ffU
;
3203 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3204 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3205 uint32_t i1
= j1
^ s
? 0 : 1;
3206 uint32_t i2
= j2
^ s
? 0 : 1;
3208 return Bits
<25>::sign_extend32((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3209 | (upper
<< 12) | (lower
<< 1));
3212 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3213 // UPPER_INSN is the original upper instruction of the branch. Caller is
3214 // responsible for overflow checking and BLX offset adjustment.
3215 static inline uint16_t
3216 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3218 uint32_t s
= offset
< 0 ? 1 : 0;
3219 uint32_t bits
= static_cast<uint32_t>(offset
);
3220 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3223 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3224 // LOWER_INSN is the original lower instruction of the branch. Caller is
3225 // responsible for overflow checking and BLX offset adjustment.
3226 static inline uint16_t
3227 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3229 uint32_t s
= offset
< 0 ? 1 : 0;
3230 uint32_t bits
= static_cast<uint32_t>(offset
);
3231 return ((lower_insn
& ~0x2fffU
)
3232 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3233 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3234 | ((bits
>> 1) & 0x7ffU
));
3237 // Return the branch offset of a 32-bit THUMB conditional branch.
3238 static inline int32_t
3239 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3241 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3242 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3243 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3244 uint32_t lower
= (lower_insn
& 0x07ffU
);
3245 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3247 return Bits
<21>::sign_extend32((upper
<< 12) | (lower
<< 1));
3250 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3251 // instruction. UPPER_INSN is the original upper instruction of the branch.
3252 // Caller is responsible for overflow checking.
3253 static inline uint16_t
3254 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3256 uint32_t s
= offset
< 0 ? 1 : 0;
3257 uint32_t bits
= static_cast<uint32_t>(offset
);
3258 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3261 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3262 // instruction. LOWER_INSN is the original lower instruction of the branch.
3263 // The caller is responsible for overflow checking.
3264 static inline uint16_t
3265 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3267 uint32_t bits
= static_cast<uint32_t>(offset
);
3268 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3269 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3270 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3272 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3275 // R_ARM_ABS8: S + A
3276 static inline typename
This::Status
3277 abs8(unsigned char* view
,
3278 const Sized_relobj_file
<32, big_endian
>* object
,
3279 const Symbol_value
<32>* psymval
)
3281 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3282 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3283 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3284 int32_t addend
= Bits
<8>::sign_extend32(val
);
3285 Arm_address x
= psymval
->value(object
, addend
);
3286 val
= Bits
<32>::bit_select32(val
, x
, 0xffU
);
3287 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3289 // R_ARM_ABS8 permits signed or unsigned results.
3290 return (Bits
<8>::has_signed_unsigned_overflow32(x
)
3291 ? This::STATUS_OVERFLOW
3292 : This::STATUS_OKAY
);
3295 // R_ARM_THM_ABS5: S + A
3296 static inline typename
This::Status
3297 thm_abs5(unsigned char* view
,
3298 const Sized_relobj_file
<32, big_endian
>* object
,
3299 const Symbol_value
<32>* psymval
)
3301 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3302 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3303 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3304 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3305 Reltype addend
= (val
& 0x7e0U
) >> 6;
3306 Reltype x
= psymval
->value(object
, addend
);
3307 val
= Bits
<32>::bit_select32(val
, x
<< 6, 0x7e0U
);
3308 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3309 return (Bits
<5>::has_overflow32(x
)
3310 ? This::STATUS_OVERFLOW
3311 : This::STATUS_OKAY
);
3314 // R_ARM_ABS12: S + A
3315 static inline typename
This::Status
3316 abs12(unsigned char* view
,
3317 const Sized_relobj_file
<32, big_endian
>* object
,
3318 const Symbol_value
<32>* psymval
)
3320 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3321 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3322 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3323 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3324 Reltype addend
= val
& 0x0fffU
;
3325 Reltype x
= psymval
->value(object
, addend
);
3326 val
= Bits
<32>::bit_select32(val
, x
, 0x0fffU
);
3327 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3328 return (Bits
<12>::has_overflow32(x
)
3329 ? This::STATUS_OVERFLOW
3330 : This::STATUS_OKAY
);
3333 // R_ARM_ABS16: S + A
3334 static inline typename
This::Status
3335 abs16(unsigned char* view
,
3336 const Sized_relobj_file
<32, big_endian
>* object
,
3337 const Symbol_value
<32>* psymval
)
3339 typedef typename
elfcpp::Swap_unaligned
<16, big_endian
>::Valtype Valtype
;
3340 Valtype val
= elfcpp::Swap_unaligned
<16, big_endian
>::readval(view
);
3341 int32_t addend
= Bits
<16>::sign_extend32(val
);
3342 Arm_address x
= psymval
->value(object
, addend
);
3343 val
= Bits
<32>::bit_select32(val
, x
, 0xffffU
);
3344 elfcpp::Swap_unaligned
<16, big_endian
>::writeval(view
, val
);
3346 // R_ARM_ABS16 permits signed or unsigned results.
3347 return (Bits
<16>::has_signed_unsigned_overflow32(x
)
3348 ? This::STATUS_OVERFLOW
3349 : This::STATUS_OKAY
);
3352 // R_ARM_ABS32: (S + A) | T
3353 static inline typename
This::Status
3354 abs32(unsigned char* view
,
3355 const Sized_relobj_file
<32, big_endian
>* object
,
3356 const Symbol_value
<32>* psymval
,
3357 Arm_address thumb_bit
)
3359 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3360 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3361 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3362 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3363 return This::STATUS_OKAY
;
3366 // R_ARM_REL32: (S + A) | T - P
3367 static inline typename
This::Status
3368 rel32(unsigned char* view
,
3369 const Sized_relobj_file
<32, big_endian
>* object
,
3370 const Symbol_value
<32>* psymval
,
3371 Arm_address address
,
3372 Arm_address thumb_bit
)
3374 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3375 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3376 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3377 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3378 return This::STATUS_OKAY
;
3381 // R_ARM_THM_JUMP24: (S + A) | T - P
3382 static typename
This::Status
3383 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3384 const Symbol_value
<32>* psymval
, Arm_address address
,
3385 Arm_address thumb_bit
);
3387 // R_ARM_THM_JUMP6: S + A – P
3388 static inline typename
This::Status
3389 thm_jump6(unsigned char* view
,
3390 const Sized_relobj_file
<32, big_endian
>* object
,
3391 const Symbol_value
<32>* psymval
,
3392 Arm_address address
)
3394 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3395 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3396 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3397 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3398 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3399 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3400 Reltype x
= (psymval
->value(object
, addend
) - address
);
3401 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3402 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3403 // CZB does only forward jumps.
3404 return ((x
> 0x007e)
3405 ? This::STATUS_OVERFLOW
3406 : This::STATUS_OKAY
);
3409 // R_ARM_THM_JUMP8: S + A – P
3410 static inline typename
This::Status
3411 thm_jump8(unsigned char* view
,
3412 const Sized_relobj_file
<32, big_endian
>* object
,
3413 const Symbol_value
<32>* psymval
,
3414 Arm_address address
)
3416 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3417 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3418 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3419 int32_t addend
= Bits
<8>::sign_extend32((val
& 0x00ff) << 1);
3420 int32_t x
= (psymval
->value(object
, addend
) - address
);
3421 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xff00)
3422 | ((x
& 0x01fe) >> 1)));
3423 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3424 return (Bits
<9>::has_overflow32(x
)
3425 ? This::STATUS_OVERFLOW
3426 : This::STATUS_OKAY
);
3429 // R_ARM_THM_JUMP11: S + A – P
3430 static inline typename
This::Status
3431 thm_jump11(unsigned char* view
,
3432 const Sized_relobj_file
<32, big_endian
>* object
,
3433 const Symbol_value
<32>* psymval
,
3434 Arm_address address
)
3436 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3437 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3438 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3439 int32_t addend
= Bits
<11>::sign_extend32((val
& 0x07ff) << 1);
3440 int32_t x
= (psymval
->value(object
, addend
) - address
);
3441 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xf800)
3442 | ((x
& 0x0ffe) >> 1)));
3443 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3444 return (Bits
<12>::has_overflow32(x
)
3445 ? This::STATUS_OVERFLOW
3446 : This::STATUS_OKAY
);
3449 // R_ARM_BASE_PREL: B(S) + A - P
3450 static inline typename
This::Status
3451 base_prel(unsigned char* view
,
3453 Arm_address address
)
3455 Base::rel32(view
, origin
- address
);
3459 // R_ARM_BASE_ABS: B(S) + A
3460 static inline typename
This::Status
3461 base_abs(unsigned char* view
,
3464 Base::rel32(view
, origin
);
3468 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3469 static inline typename
This::Status
3470 got_brel(unsigned char* view
,
3471 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3473 Base::rel32(view
, got_offset
);
3474 return This::STATUS_OKAY
;
3477 // R_ARM_GOT_PREL: GOT(S) + A - P
3478 static inline typename
This::Status
3479 got_prel(unsigned char* view
,
3480 Arm_address got_entry
,
3481 Arm_address address
)
3483 Base::rel32(view
, got_entry
- address
);
3484 return This::STATUS_OKAY
;
3487 // R_ARM_PREL: (S + A) | T - P
3488 static inline typename
This::Status
3489 prel31(unsigned char* view
,
3490 const Sized_relobj_file
<32, big_endian
>* object
,
3491 const Symbol_value
<32>* psymval
,
3492 Arm_address address
,
3493 Arm_address thumb_bit
)
3495 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3496 Valtype val
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3497 Valtype addend
= Bits
<31>::sign_extend32(val
);
3498 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3499 val
= Bits
<32>::bit_select32(val
, x
, 0x7fffffffU
);
3500 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, val
);
3501 return (Bits
<31>::has_overflow32(x
)
3502 ? This::STATUS_OVERFLOW
3503 : This::STATUS_OKAY
);
3506 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3507 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3508 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3509 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3510 static inline typename
This::Status
3511 movw(unsigned char* view
,
3512 const Sized_relobj_file
<32, big_endian
>* object
,
3513 const Symbol_value
<32>* psymval
,
3514 Arm_address relative_address_base
,
3515 Arm_address thumb_bit
,
3516 bool check_overflow
)
3518 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3519 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3520 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3521 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3522 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3523 - relative_address_base
);
3524 val
= This::insert_val_arm_movw_movt(val
, x
);
3525 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3526 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3527 ? This::STATUS_OVERFLOW
3528 : This::STATUS_OKAY
);
3531 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3532 // R_ARM_MOVT_PREL: S + A - P
3533 // R_ARM_MOVT_BREL: S + A - B(S)
3534 static inline typename
This::Status
3535 movt(unsigned char* view
,
3536 const Sized_relobj_file
<32, big_endian
>* object
,
3537 const Symbol_value
<32>* psymval
,
3538 Arm_address relative_address_base
)
3540 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3541 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3542 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3543 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3544 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3545 val
= This::insert_val_arm_movw_movt(val
, x
);
3546 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3547 // FIXME: IHI0044D says that we should check for overflow.
3548 return This::STATUS_OKAY
;
3551 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3552 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3553 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3554 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3555 static inline typename
This::Status
3556 thm_movw(unsigned char* view
,
3557 const Sized_relobj_file
<32, big_endian
>* object
,
3558 const Symbol_value
<32>* psymval
,
3559 Arm_address relative_address_base
,
3560 Arm_address thumb_bit
,
3561 bool check_overflow
)
3563 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3564 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3565 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3566 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3567 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3568 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3570 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3571 val
= This::insert_val_thumb_movw_movt(val
, x
);
3572 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3573 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3574 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3575 ? This::STATUS_OVERFLOW
3576 : This::STATUS_OKAY
);
3579 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3580 // R_ARM_THM_MOVT_PREL: S + A - P
3581 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3582 static inline typename
This::Status
3583 thm_movt(unsigned char* view
,
3584 const Sized_relobj_file
<32, big_endian
>* object
,
3585 const Symbol_value
<32>* psymval
,
3586 Arm_address relative_address_base
)
3588 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3589 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3590 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3591 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3592 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3593 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3594 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3595 val
= This::insert_val_thumb_movw_movt(val
, x
);
3596 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3597 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3598 return This::STATUS_OKAY
;
3601 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3602 static inline typename
This::Status
3603 thm_alu11(unsigned char* view
,
3604 const Sized_relobj_file
<32, big_endian
>* object
,
3605 const Symbol_value
<32>* psymval
,
3606 Arm_address address
,
3607 Arm_address thumb_bit
)
3609 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3610 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3611 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3612 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3613 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3615 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3616 // -----------------------------------------------------------------------
3617 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3618 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3619 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3620 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3621 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3622 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3624 // Determine a sign for the addend.
3625 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3626 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3627 // Thumb2 addend encoding:
3628 // imm12 := i | imm3 | imm8
3629 int32_t addend
= (insn
& 0xff)
3630 | ((insn
& 0x00007000) >> 4)
3631 | ((insn
& 0x04000000) >> 15);
3632 // Apply a sign to the added.
3635 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3636 - (address
& 0xfffffffc);
3637 Reltype val
= abs(x
);
3638 // Mask out the value and a distinct part of the ADD/SUB opcode
3639 // (bits 7:5 of opword).
3640 insn
= (insn
& 0xfb0f8f00)
3642 | ((val
& 0x700) << 4)
3643 | ((val
& 0x800) << 15);
3644 // Set the opcode according to whether the value to go in the
3645 // place is negative.
3649 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3650 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3651 return ((val
> 0xfff) ?
3652 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3655 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3656 static inline typename
This::Status
3657 thm_pc8(unsigned char* view
,
3658 const Sized_relobj_file
<32, big_endian
>* object
,
3659 const Symbol_value
<32>* psymval
,
3660 Arm_address address
)
3662 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3663 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3664 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3665 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3666 Reltype addend
= ((insn
& 0x00ff) << 2);
3667 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3668 Reltype val
= abs(x
);
3669 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3671 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3672 return ((val
> 0x03fc)
3673 ? This::STATUS_OVERFLOW
3674 : This::STATUS_OKAY
);
3677 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3678 static inline typename
This::Status
3679 thm_pc12(unsigned char* view
,
3680 const Sized_relobj_file
<32, big_endian
>* object
,
3681 const Symbol_value
<32>* psymval
,
3682 Arm_address address
)
3684 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3685 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3686 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3687 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3688 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3689 // Determine a sign for the addend (positive if the U bit is 1).
3690 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3691 int32_t addend
= (insn
& 0xfff);
3692 // Apply a sign to the added.
3695 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3696 Reltype val
= abs(x
);
3697 // Mask out and apply the value and the U bit.
3698 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3699 // Set the U bit according to whether the value to go in the
3700 // place is positive.
3704 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3705 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3706 return ((val
> 0xfff) ?
3707 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3711 static inline typename
This::Status
3712 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3713 unsigned char* view
,
3714 const Arm_relobj
<big_endian
>* object
,
3715 const Arm_address address
,
3716 const bool is_interworking
)
3719 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3720 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3721 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3723 // Ensure that we have a BX instruction.
3724 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3725 const uint32_t reg
= (val
& 0xf);
3726 if (is_interworking
&& reg
!= 0xf)
3728 Stub_table
<big_endian
>* stub_table
=
3729 object
->stub_table(relinfo
->data_shndx
);
3730 gold_assert(stub_table
!= NULL
);
3732 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3733 gold_assert(stub
!= NULL
);
3735 int32_t veneer_address
=
3736 stub_table
->address() + stub
->offset() - 8 - address
;
3737 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3738 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3739 // Replace with a branch to veneer (B <addr>)
3740 val
= (val
& 0xf0000000) | 0x0a000000
3741 | ((veneer_address
>> 2) & 0x00ffffff);
3745 // Preserve Rm (lowest four bits) and the condition code
3746 // (highest four bits). Other bits encode MOV PC,Rm.
3747 val
= (val
& 0xf000000f) | 0x01a0f000;
3749 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3750 return This::STATUS_OKAY
;
3753 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3754 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3755 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3756 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3757 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3758 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3759 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3760 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3761 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3762 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3763 static inline typename
This::Status
3764 arm_grp_alu(unsigned char* view
,
3765 const Sized_relobj_file
<32, big_endian
>* object
,
3766 const Symbol_value
<32>* psymval
,
3768 Arm_address address
,
3769 Arm_address thumb_bit
,
3770 bool check_overflow
)
3772 gold_assert(group
>= 0 && group
< 3);
3773 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3774 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3775 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3777 // ALU group relocations are allowed only for the ADD/SUB instructions.
3778 // (0x00800000 - ADD, 0x00400000 - SUB)
3779 const Valtype opcode
= insn
& 0x01e00000;
3780 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3781 return This::STATUS_BAD_RELOC
;
3783 // Determine a sign for the addend.
3784 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3785 // shifter = rotate_imm * 2
3786 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3787 // Initial addend value.
3788 int32_t addend
= insn
& 0xff;
3789 // Rotate addend right by shifter.
3790 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3791 // Apply a sign to the added.
3794 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3795 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3796 // Check for overflow if required
3798 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3799 return This::STATUS_OVERFLOW
;
3801 // Mask out the value and the ADD/SUB part of the opcode; take care
3802 // not to destroy the S bit.
3804 // Set the opcode according to whether the value to go in the
3805 // place is negative.
3806 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3807 // Encode the offset (encoded Gn).
3810 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3811 return This::STATUS_OKAY
;
3814 // R_ARM_LDR_PC_G0: S + A - P
3815 // R_ARM_LDR_PC_G1: S + A - P
3816 // R_ARM_LDR_PC_G2: S + A - P
3817 // R_ARM_LDR_SB_G0: S + A - B(S)
3818 // R_ARM_LDR_SB_G1: S + A - B(S)
3819 // R_ARM_LDR_SB_G2: S + A - B(S)
3820 static inline typename
This::Status
3821 arm_grp_ldr(unsigned char* view
,
3822 const Sized_relobj_file
<32, big_endian
>* object
,
3823 const Symbol_value
<32>* psymval
,
3825 Arm_address address
)
3827 gold_assert(group
>= 0 && group
< 3);
3828 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3829 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3830 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3832 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3833 int32_t addend
= (insn
& 0xfff) * sign
;
3834 int32_t x
= (psymval
->value(object
, addend
) - address
);
3835 // Calculate the relevant G(n-1) value to obtain this stage residual.
3837 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3838 if (residual
>= 0x1000)
3839 return This::STATUS_OVERFLOW
;
3841 // Mask out the value and U bit.
3843 // Set the U bit for non-negative values.
3848 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3849 return This::STATUS_OKAY
;
3852 // R_ARM_LDRS_PC_G0: S + A - P
3853 // R_ARM_LDRS_PC_G1: S + A - P
3854 // R_ARM_LDRS_PC_G2: S + A - P
3855 // R_ARM_LDRS_SB_G0: S + A - B(S)
3856 // R_ARM_LDRS_SB_G1: S + A - B(S)
3857 // R_ARM_LDRS_SB_G2: S + A - B(S)
3858 static inline typename
This::Status
3859 arm_grp_ldrs(unsigned char* view
,
3860 const Sized_relobj_file
<32, big_endian
>* object
,
3861 const Symbol_value
<32>* psymval
,
3863 Arm_address address
)
3865 gold_assert(group
>= 0 && group
< 3);
3866 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3867 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3868 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3870 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3871 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3872 int32_t x
= (psymval
->value(object
, addend
) - address
);
3873 // Calculate the relevant G(n-1) value to obtain this stage residual.
3875 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3876 if (residual
>= 0x100)
3877 return This::STATUS_OVERFLOW
;
3879 // Mask out the value and U bit.
3881 // Set the U bit for non-negative values.
3884 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3886 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3887 return This::STATUS_OKAY
;
3890 // R_ARM_LDC_PC_G0: S + A - P
3891 // R_ARM_LDC_PC_G1: S + A - P
3892 // R_ARM_LDC_PC_G2: S + A - P
3893 // R_ARM_LDC_SB_G0: S + A - B(S)
3894 // R_ARM_LDC_SB_G1: S + A - B(S)
3895 // R_ARM_LDC_SB_G2: S + A - B(S)
3896 static inline typename
This::Status
3897 arm_grp_ldc(unsigned char* view
,
3898 const Sized_relobj_file
<32, big_endian
>* object
,
3899 const Symbol_value
<32>* psymval
,
3901 Arm_address address
)
3903 gold_assert(group
>= 0 && group
< 3);
3904 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3905 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3906 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3908 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3909 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3910 int32_t x
= (psymval
->value(object
, addend
) - address
);
3911 // Calculate the relevant G(n-1) value to obtain this stage residual.
3913 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3914 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3915 return This::STATUS_OVERFLOW
;
3917 // Mask out the value and U bit.
3919 // Set the U bit for non-negative values.
3922 insn
|= (residual
>> 2);
3924 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3925 return This::STATUS_OKAY
;
3929 // Relocate ARM long branches. This handles relocation types
3930 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3931 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3932 // undefined and we do not use PLT in this relocation. In such a case,
3933 // the branch is converted into an NOP.
3935 template<bool big_endian
>
3936 typename Arm_relocate_functions
<big_endian
>::Status
3937 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3938 unsigned int r_type
,
3939 const Relocate_info
<32, big_endian
>* relinfo
,
3940 unsigned char* view
,
3941 const Sized_symbol
<32>* gsym
,
3942 const Arm_relobj
<big_endian
>* object
,
3944 const Symbol_value
<32>* psymval
,
3945 Arm_address address
,
3946 Arm_address thumb_bit
,
3947 bool is_weakly_undefined_without_plt
)
3949 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3950 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3951 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3953 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3954 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3955 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3956 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3957 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3958 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3959 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3961 // Check that the instruction is valid.
3962 if (r_type
== elfcpp::R_ARM_CALL
)
3964 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3965 return This::STATUS_BAD_RELOC
;
3967 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3969 if (!insn_is_b
&& !insn_is_cond_bl
)
3970 return This::STATUS_BAD_RELOC
;
3972 else if (r_type
== elfcpp::R_ARM_PLT32
)
3974 if (!insn_is_any_branch
)
3975 return This::STATUS_BAD_RELOC
;
3977 else if (r_type
== elfcpp::R_ARM_XPC25
)
3979 // FIXME: AAELF document IH0044C does not say much about it other
3980 // than it being obsolete.
3981 if (!insn_is_any_branch
)
3982 return This::STATUS_BAD_RELOC
;
3987 // A branch to an undefined weak symbol is turned into a jump to
3988 // the next instruction unless a PLT entry will be created.
3989 // Do the same for local undefined symbols.
3990 // The jump to the next instruction is optimized as a NOP depending
3991 // on the architecture.
3992 const Target_arm
<big_endian
>* arm_target
=
3993 Target_arm
<big_endian
>::default_target();
3994 if (is_weakly_undefined_without_plt
)
3996 gold_assert(!parameters
->options().relocatable());
3997 Valtype cond
= val
& 0xf0000000U
;
3998 if (arm_target
->may_use_arm_nop())
3999 val
= cond
| 0x0320f000;
4001 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
4002 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
4003 return This::STATUS_OKAY
;
4006 Valtype addend
= Bits
<26>::sign_extend32(val
<< 2);
4007 Valtype branch_target
= psymval
->value(object
, addend
);
4008 int32_t branch_offset
= branch_target
- address
;
4010 // We need a stub if the branch offset is too large or if we need
4012 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4013 Reloc_stub
* stub
= NULL
;
4015 if (!parameters
->options().relocatable()
4016 && (Bits
<26>::has_overflow32(branch_offset
)
4017 || ((thumb_bit
!= 0)
4018 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
4020 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
4022 Stub_type stub_type
=
4023 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4024 unadjusted_branch_target
,
4026 if (stub_type
!= arm_stub_none
)
4028 Stub_table
<big_endian
>* stub_table
=
4029 object
->stub_table(relinfo
->data_shndx
);
4030 gold_assert(stub_table
!= NULL
);
4032 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4033 stub
= stub_table
->find_reloc_stub(stub_key
);
4034 gold_assert(stub
!= NULL
);
4035 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4036 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4037 branch_offset
= branch_target
- address
;
4038 gold_assert(!Bits
<26>::has_overflow32(branch_offset
));
4042 // At this point, if we still need to switch mode, the instruction
4043 // must either be a BLX or a BL that can be converted to a BLX.
4047 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
4048 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
4051 val
= Bits
<32>::bit_select32(val
, (branch_offset
>> 2), 0xffffffUL
);
4052 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
4053 return (Bits
<26>::has_overflow32(branch_offset
)
4054 ? This::STATUS_OVERFLOW
4055 : This::STATUS_OKAY
);
4058 // Relocate THUMB long branches. This handles relocation types
4059 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
4060 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4061 // undefined and we do not use PLT in this relocation. In such a case,
4062 // the branch is converted into an NOP.
4064 template<bool big_endian
>
4065 typename Arm_relocate_functions
<big_endian
>::Status
4066 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
4067 unsigned int r_type
,
4068 const Relocate_info
<32, big_endian
>* relinfo
,
4069 unsigned char* view
,
4070 const Sized_symbol
<32>* gsym
,
4071 const Arm_relobj
<big_endian
>* object
,
4073 const Symbol_value
<32>* psymval
,
4074 Arm_address address
,
4075 Arm_address thumb_bit
,
4076 bool is_weakly_undefined_without_plt
)
4078 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4079 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4080 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4081 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4083 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4085 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
4086 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
4088 // Check that the instruction is valid.
4089 if (r_type
== elfcpp::R_ARM_THM_CALL
)
4091 if (!is_bl_insn
&& !is_blx_insn
)
4092 return This::STATUS_BAD_RELOC
;
4094 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
4096 // This cannot be a BLX.
4098 return This::STATUS_BAD_RELOC
;
4100 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
4102 // Check for Thumb to Thumb call.
4104 return This::STATUS_BAD_RELOC
;
4107 gold_warning(_("%s: Thumb BLX instruction targets "
4108 "thumb function '%s'."),
4109 object
->name().c_str(),
4110 (gsym
? gsym
->name() : "(local)"));
4111 // Convert BLX to BL.
4112 lower_insn
|= 0x1000U
;
4118 // A branch to an undefined weak symbol is turned into a jump to
4119 // the next instruction unless a PLT entry will be created.
4120 // The jump to the next instruction is optimized as a NOP.W for
4121 // Thumb-2 enabled architectures.
4122 const Target_arm
<big_endian
>* arm_target
=
4123 Target_arm
<big_endian
>::default_target();
4124 if (is_weakly_undefined_without_plt
)
4126 gold_assert(!parameters
->options().relocatable());
4127 if (arm_target
->may_use_thumb2_nop())
4129 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4130 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4134 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4135 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4137 return This::STATUS_OKAY
;
4140 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4141 Arm_address branch_target
= psymval
->value(object
, addend
);
4143 // For BLX, bit 1 of target address comes from bit 1 of base address.
4144 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4145 if (thumb_bit
== 0 && may_use_blx
)
4146 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4148 int32_t branch_offset
= branch_target
- address
;
4150 // We need a stub if the branch offset is too large or if we need
4152 bool thumb2
= arm_target
->using_thumb2();
4153 if (!parameters
->options().relocatable()
4154 && ((!thumb2
&& Bits
<23>::has_overflow32(branch_offset
))
4155 || (thumb2
&& Bits
<25>::has_overflow32(branch_offset
))
4156 || ((thumb_bit
== 0)
4157 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4158 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4160 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4162 Stub_type stub_type
=
4163 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4164 unadjusted_branch_target
,
4167 if (stub_type
!= arm_stub_none
)
4169 Stub_table
<big_endian
>* stub_table
=
4170 object
->stub_table(relinfo
->data_shndx
);
4171 gold_assert(stub_table
!= NULL
);
4173 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4174 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4175 gold_assert(stub
!= NULL
);
4176 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4177 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4178 if (thumb_bit
== 0 && may_use_blx
)
4179 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4180 branch_offset
= branch_target
- address
;
4184 // At this point, if we still need to switch mode, the instruction
4185 // must either be a BLX or a BL that can be converted to a BLX.
4188 gold_assert(may_use_blx
4189 && (r_type
== elfcpp::R_ARM_THM_CALL
4190 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4191 // Make sure this is a BLX.
4192 lower_insn
&= ~0x1000U
;
4196 // Make sure this is a BL.
4197 lower_insn
|= 0x1000U
;
4200 // For a BLX instruction, make sure that the relocation is rounded up
4201 // to a word boundary. This follows the semantics of the instruction
4202 // which specifies that bit 1 of the target address will come from bit
4203 // 1 of the base address.
4204 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4205 gold_assert((branch_offset
& 3) == 0);
4207 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4208 // We use the Thumb-2 encoding, which is safe even if dealing with
4209 // a Thumb-1 instruction by virtue of our overflow check above. */
4210 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4211 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4213 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4214 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4216 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
4219 ? Bits
<25>::has_overflow32(branch_offset
)
4220 : Bits
<23>::has_overflow32(branch_offset
))
4221 ? This::STATUS_OVERFLOW
4222 : This::STATUS_OKAY
);
4225 // Relocate THUMB-2 long conditional branches.
4226 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4227 // undefined and we do not use PLT in this relocation. In such a case,
4228 // the branch is converted into an NOP.
4230 template<bool big_endian
>
4231 typename Arm_relocate_functions
<big_endian
>::Status
4232 Arm_relocate_functions
<big_endian
>::thm_jump19(
4233 unsigned char* view
,
4234 const Arm_relobj
<big_endian
>* object
,
4235 const Symbol_value
<32>* psymval
,
4236 Arm_address address
,
4237 Arm_address thumb_bit
)
4239 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4240 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4241 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4242 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4243 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4245 Arm_address branch_target
= psymval
->value(object
, addend
);
4246 int32_t branch_offset
= branch_target
- address
;
4248 // ??? Should handle interworking? GCC might someday try to
4249 // use this for tail calls.
4250 // FIXME: We do support thumb entry to PLT yet.
4253 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4254 return This::STATUS_BAD_RELOC
;
4257 // Put RELOCATION back into the insn.
4258 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4259 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4261 // Put the relocated value back in the object file:
4262 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4263 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4265 return (Bits
<21>::has_overflow32(branch_offset
)
4266 ? This::STATUS_OVERFLOW
4267 : This::STATUS_OKAY
);
4270 // Get the GOT section, creating it if necessary.
4272 template<bool big_endian
>
4273 Arm_output_data_got
<big_endian
>*
4274 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4276 if (this->got_
== NULL
)
4278 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4280 // When using -z now, we can treat .got as a relro section.
4281 // Without -z now, it is modified after program startup by lazy
4283 bool is_got_relro
= parameters
->options().now();
4284 Output_section_order got_order
= (is_got_relro
4288 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4289 // .got.plt sections in output. The output .got section contains both
4290 // PLT and non-PLT GOT entries.
4291 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4293 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4294 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4295 this->got_
, got_order
, is_got_relro
);
4297 // The old GNU linker creates a .got.plt section. We just
4298 // create another set of data in the .got section. Note that we
4299 // always create a PLT if we create a GOT, although the PLT
4301 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4302 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4303 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4304 this->got_plt_
, got_order
, is_got_relro
);
4306 // The first three entries are reserved.
4307 this->got_plt_
->set_current_data_size(3 * 4);
4309 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4310 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4311 Symbol_table::PREDEFINED
,
4313 0, 0, elfcpp::STT_OBJECT
,
4315 elfcpp::STV_HIDDEN
, 0,
4318 // If there are any IRELATIVE relocations, they get GOT entries
4319 // in .got.plt after the jump slot entries.
4320 this->got_irelative_
= new Output_data_space(4, "** GOT IRELATIVE PLT");
4321 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4322 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4323 this->got_irelative_
,
4324 got_order
, is_got_relro
);
4330 // Get the dynamic reloc section, creating it if necessary.
4332 template<bool big_endian
>
4333 typename Target_arm
<big_endian
>::Reloc_section
*
4334 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4336 if (this->rel_dyn_
== NULL
)
4338 gold_assert(layout
!= NULL
);
4339 // Create both relocation sections in the same place, so as to ensure
4340 // their relative order in the output section.
4341 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4342 this->rel_irelative_
= new Reloc_section(false);
4343 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4344 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4345 ORDER_DYNAMIC_RELOCS
, false);
4346 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4347 elfcpp::SHF_ALLOC
, this->rel_irelative_
,
4348 ORDER_DYNAMIC_RELOCS
, false);
4350 return this->rel_dyn_
;
4354 // Get the section to use for IRELATIVE relocs, creating it if necessary. These
4355 // go in .rela.dyn, but only after all other dynamic relocations. They need to
4356 // follow the other dynamic relocations so that they can refer to global
4357 // variables initialized by those relocs.
4359 template<bool big_endian
>
4360 typename Target_arm
<big_endian
>::Reloc_section
*
4361 Target_arm
<big_endian
>::rel_irelative_section(Layout
* layout
)
4363 if (this->rel_irelative_
== NULL
)
4365 // Delegate the creation to rel_dyn_section so as to ensure their order in
4366 // the output section.
4367 this->rel_dyn_section(layout
);
4368 gold_assert(this->rel_irelative_
!= NULL
4369 && (this->rel_dyn_
->output_section()
4370 == this->rel_irelative_
->output_section()));
4372 return this->rel_irelative_
;
4376 // Insn_template methods.
4378 // Return byte size of an instruction template.
4381 Insn_template::size() const
4383 switch (this->type())
4386 case THUMB16_SPECIAL_TYPE
:
4397 // Return alignment of an instruction template.
4400 Insn_template::alignment() const
4402 switch (this->type())
4405 case THUMB16_SPECIAL_TYPE
:
4416 // Stub_template methods.
4418 Stub_template::Stub_template(
4419 Stub_type type
, const Insn_template
* insns
,
4421 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4422 entry_in_thumb_mode_(false), relocs_()
4426 // Compute byte size and alignment of stub template.
4427 for (size_t i
= 0; i
< insn_count
; i
++)
4429 unsigned insn_alignment
= insns
[i
].alignment();
4430 size_t insn_size
= insns
[i
].size();
4431 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4432 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4433 switch (insns
[i
].type())
4435 case Insn_template::THUMB16_TYPE
:
4436 case Insn_template::THUMB16_SPECIAL_TYPE
:
4438 this->entry_in_thumb_mode_
= true;
4441 case Insn_template::THUMB32_TYPE
:
4442 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4443 this->relocs_
.push_back(Reloc(i
, offset
));
4445 this->entry_in_thumb_mode_
= true;
4448 case Insn_template::ARM_TYPE
:
4449 // Handle cases where the target is encoded within the
4451 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4452 this->relocs_
.push_back(Reloc(i
, offset
));
4455 case Insn_template::DATA_TYPE
:
4456 // Entry point cannot be data.
4457 gold_assert(i
!= 0);
4458 this->relocs_
.push_back(Reloc(i
, offset
));
4464 offset
+= insn_size
;
4466 this->size_
= offset
;
4471 // Template to implement do_write for a specific target endianness.
4473 template<bool big_endian
>
4475 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4477 const Stub_template
* stub_template
= this->stub_template();
4478 const Insn_template
* insns
= stub_template
->insns();
4480 // FIXME: We do not handle BE8 encoding yet.
4481 unsigned char* pov
= view
;
4482 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4484 switch (insns
[i
].type())
4486 case Insn_template::THUMB16_TYPE
:
4487 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4489 case Insn_template::THUMB16_SPECIAL_TYPE
:
4490 elfcpp::Swap
<16, big_endian
>::writeval(
4492 this->thumb16_special(i
));
4494 case Insn_template::THUMB32_TYPE
:
4496 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4497 uint32_t lo
= insns
[i
].data() & 0xffff;
4498 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4499 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4502 case Insn_template::ARM_TYPE
:
4503 case Insn_template::DATA_TYPE
:
4504 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4509 pov
+= insns
[i
].size();
4511 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4514 // Reloc_stub::Key methods.
4516 // Dump a Key as a string for debugging.
4519 Reloc_stub::Key::name() const
4521 if (this->r_sym_
== invalid_index
)
4523 // Global symbol key name
4524 // <stub-type>:<symbol name>:<addend>.
4525 const std::string sym_name
= this->u_
.symbol
->name();
4526 // We need to print two hex number and two colons. So just add 100 bytes
4527 // to the symbol name size.
4528 size_t len
= sym_name
.size() + 100;
4529 char* buffer
= new char[len
];
4530 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4531 sym_name
.c_str(), this->addend_
);
4532 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4534 return std::string(buffer
);
4538 // local symbol key name
4539 // <stub-type>:<object>:<r_sym>:<addend>.
4540 const size_t len
= 200;
4542 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4543 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4544 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4545 return std::string(buffer
);
4549 // Reloc_stub methods.
4551 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4552 // LOCATION to DESTINATION.
4553 // This code is based on the arm_type_of_stub function in
4554 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4558 Reloc_stub::stub_type_for_reloc(
4559 unsigned int r_type
,
4560 Arm_address location
,
4561 Arm_address destination
,
4562 bool target_is_thumb
)
4564 Stub_type stub_type
= arm_stub_none
;
4566 // This is a bit ugly but we want to avoid using a templated class for
4567 // big and little endianities.
4569 bool should_force_pic_veneer
= parameters
->options().pic_veneer();
4572 if (parameters
->target().is_big_endian())
4574 const Target_arm
<true>* big_endian_target
=
4575 Target_arm
<true>::default_target();
4576 may_use_blx
= big_endian_target
->may_use_v5t_interworking();
4577 should_force_pic_veneer
|= big_endian_target
->should_force_pic_veneer();
4578 thumb2
= big_endian_target
->using_thumb2();
4579 thumb_only
= big_endian_target
->using_thumb_only();
4583 const Target_arm
<false>* little_endian_target
=
4584 Target_arm
<false>::default_target();
4585 may_use_blx
= little_endian_target
->may_use_v5t_interworking();
4586 should_force_pic_veneer
|=
4587 little_endian_target
->should_force_pic_veneer();
4588 thumb2
= little_endian_target
->using_thumb2();
4589 thumb_only
= little_endian_target
->using_thumb_only();
4592 int64_t branch_offset
;
4593 bool output_is_position_independent
=
4594 parameters
->options().output_is_position_independent();
4595 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4597 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4598 // base address (instruction address + 4).
4599 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4600 destination
= Bits
<32>::bit_select32(destination
, location
, 0x2);
4601 branch_offset
= static_cast<int64_t>(destination
) - location
;
4603 // Handle cases where:
4604 // - this call goes too far (different Thumb/Thumb2 max
4606 // - it's a Thumb->Arm call and blx is not available, or it's a
4607 // Thumb->Arm branch (not bl). A stub is needed in this case.
4609 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4610 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4612 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4613 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4614 || ((!target_is_thumb
)
4615 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4616 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4618 if (target_is_thumb
)
4623 stub_type
= (output_is_position_independent
4624 || should_force_pic_veneer
)
4627 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4628 // V5T and above. Stub starts with ARM code, so
4629 // we must be able to switch mode before
4630 // reaching it, which is only possible for 'bl'
4631 // (ie R_ARM_THM_CALL relocation).
4632 ? arm_stub_long_branch_any_thumb_pic
4633 // On V4T, use Thumb code only.
4634 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4638 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4639 ? arm_stub_long_branch_any_any
// V5T and above.
4640 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4644 stub_type
= (output_is_position_independent
4645 || should_force_pic_veneer
)
4646 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4647 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4654 // FIXME: We should check that the input section is from an
4655 // object that has interwork enabled.
4657 stub_type
= (output_is_position_independent
4658 || should_force_pic_veneer
)
4661 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4662 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4663 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4667 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4668 ? arm_stub_long_branch_any_any
// V5T and above.
4669 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4671 // Handle v4t short branches.
4672 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4673 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4674 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4675 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4679 else if (r_type
== elfcpp::R_ARM_CALL
4680 || r_type
== elfcpp::R_ARM_JUMP24
4681 || r_type
== elfcpp::R_ARM_PLT32
)
4683 branch_offset
= static_cast<int64_t>(destination
) - location
;
4684 if (target_is_thumb
)
4688 // FIXME: We should check that the input section is from an
4689 // object that has interwork enabled.
4691 // We have an extra 2-bytes reach because of
4692 // the mode change (bit 24 (H) of BLX encoding).
4693 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4694 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4695 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4696 || (r_type
== elfcpp::R_ARM_JUMP24
)
4697 || (r_type
== elfcpp::R_ARM_PLT32
))
4699 stub_type
= (output_is_position_independent
4700 || should_force_pic_veneer
)
4703 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4704 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4708 ? arm_stub_long_branch_any_any
// V5T and above.
4709 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4715 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4716 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4718 stub_type
= (output_is_position_independent
4719 || should_force_pic_veneer
)
4720 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4721 : arm_stub_long_branch_any_any
; /// non-PIC.
4729 // Cortex_a8_stub methods.
4731 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4732 // I is the position of the instruction template in the stub template.
4735 Cortex_a8_stub::do_thumb16_special(size_t i
)
4737 // The only use of this is to copy condition code from a conditional
4738 // branch being worked around to the corresponding conditional branch in
4740 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4742 uint16_t data
= this->stub_template()->insns()[i
].data();
4743 gold_assert((data
& 0xff00U
) == 0xd000U
);
4744 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4748 // Stub_factory methods.
4750 Stub_factory::Stub_factory()
4752 // The instruction template sequences are declared as static
4753 // objects and initialized first time the constructor runs.
4755 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4756 // to reach the stub if necessary.
4757 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4759 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4760 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4761 // dcd R_ARM_ABS32(X)
4764 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4766 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4768 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4769 Insn_template::arm_insn(0xe12fff1c), // bx ip
4770 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4771 // dcd R_ARM_ABS32(X)
4774 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4775 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4777 Insn_template::thumb16_insn(0xb401), // push {r0}
4778 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4779 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4780 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4781 Insn_template::thumb16_insn(0x4760), // bx ip
4782 Insn_template::thumb16_insn(0xbf00), // nop
4783 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4784 // dcd R_ARM_ABS32(X)
4787 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4789 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4791 Insn_template::thumb16_insn(0x4778), // bx pc
4792 Insn_template::thumb16_insn(0x46c0), // nop
4793 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4794 Insn_template::arm_insn(0xe12fff1c), // bx ip
4795 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4796 // dcd R_ARM_ABS32(X)
4799 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4801 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4803 Insn_template::thumb16_insn(0x4778), // bx pc
4804 Insn_template::thumb16_insn(0x46c0), // nop
4805 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4806 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4807 // dcd R_ARM_ABS32(X)
4810 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4811 // one, when the destination is close enough.
4812 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4814 Insn_template::thumb16_insn(0x4778), // bx pc
4815 Insn_template::thumb16_insn(0x46c0), // nop
4816 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4819 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4820 // blx to reach the stub if necessary.
4821 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4823 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4824 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4825 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4826 // dcd R_ARM_REL32(X-4)
4829 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4830 // blx to reach the stub if necessary. We can not add into pc;
4831 // it is not guaranteed to mode switch (different in ARMv6 and
4833 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4835 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4836 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4837 Insn_template::arm_insn(0xe12fff1c), // bx ip
4838 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4839 // dcd R_ARM_REL32(X)
4842 // V4T ARM -> ARM long branch stub, PIC.
4843 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4845 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4846 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4847 Insn_template::arm_insn(0xe12fff1c), // bx ip
4848 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4849 // dcd R_ARM_REL32(X)
4852 // V4T Thumb -> ARM long branch stub, PIC.
4853 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4855 Insn_template::thumb16_insn(0x4778), // bx pc
4856 Insn_template::thumb16_insn(0x46c0), // nop
4857 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4858 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4859 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4860 // dcd R_ARM_REL32(X)
4863 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4865 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4867 Insn_template::thumb16_insn(0xb401), // push {r0}
4868 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4869 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4870 Insn_template::thumb16_insn(0x4484), // add ip, r0
4871 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4872 Insn_template::thumb16_insn(0x4760), // bx ip
4873 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4874 // dcd R_ARM_REL32(X)
4877 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4879 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4881 Insn_template::thumb16_insn(0x4778), // bx pc
4882 Insn_template::thumb16_insn(0x46c0), // nop
4883 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4884 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4885 Insn_template::arm_insn(0xe12fff1c), // bx ip
4886 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4887 // dcd R_ARM_REL32(X)
4890 // Cortex-A8 erratum-workaround stubs.
4892 // Stub used for conditional branches (which may be beyond +/-1MB away,
4893 // so we can't use a conditional branch to reach this stub).
4900 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4902 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4903 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4904 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4908 // Stub used for b.w and bl.w instructions.
4910 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4912 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4915 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4917 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4920 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4921 // instruction (which switches to ARM mode) to point to this stub. Jump to
4922 // the real destination using an ARM-mode branch.
4923 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4925 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4928 // Stub used to provide an interworking for R_ARM_V4BX relocation
4929 // (bx r[n] instruction).
4930 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4932 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4933 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4934 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4937 // Fill in the stub template look-up table. Stub templates are constructed
4938 // per instance of Stub_factory for fast look-up without locking
4939 // in a thread-enabled environment.
4941 this->stub_templates_
[arm_stub_none
] =
4942 new Stub_template(arm_stub_none
, NULL
, 0);
4944 #define DEF_STUB(x) \
4948 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4949 Stub_type type = arm_stub_##x; \
4950 this->stub_templates_[type] = \
4951 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4959 // Stub_table methods.
4961 // Remove all Cortex-A8 stub.
4963 template<bool big_endian
>
4965 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4967 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4968 p
!= this->cortex_a8_stubs_
.end();
4971 this->cortex_a8_stubs_
.clear();
4974 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4976 template<bool big_endian
>
4978 Stub_table
<big_endian
>::relocate_stub(
4980 const Relocate_info
<32, big_endian
>* relinfo
,
4981 Target_arm
<big_endian
>* arm_target
,
4982 Output_section
* output_section
,
4983 unsigned char* view
,
4984 Arm_address address
,
4985 section_size_type view_size
)
4987 const Stub_template
* stub_template
= stub
->stub_template();
4988 if (stub_template
->reloc_count() != 0)
4990 // Adjust view to cover the stub only.
4991 section_size_type offset
= stub
->offset();
4992 section_size_type stub_size
= stub_template
->size();
4993 gold_assert(offset
+ stub_size
<= view_size
);
4995 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4996 address
+ offset
, stub_size
);
5000 // Relocate all stubs in this stub table.
5002 template<bool big_endian
>
5004 Stub_table
<big_endian
>::relocate_stubs(
5005 const Relocate_info
<32, big_endian
>* relinfo
,
5006 Target_arm
<big_endian
>* arm_target
,
5007 Output_section
* output_section
,
5008 unsigned char* view
,
5009 Arm_address address
,
5010 section_size_type view_size
)
5012 // If we are passed a view bigger than the stub table's. we need to
5014 gold_assert(address
== this->address()
5016 == static_cast<section_size_type
>(this->data_size())));
5018 // Relocate all relocation stubs.
5019 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
5020 p
!= this->reloc_stubs_
.end();
5022 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
5023 address
, view_size
);
5025 // Relocate all Cortex-A8 stubs.
5026 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
5027 p
!= this->cortex_a8_stubs_
.end();
5029 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
5030 address
, view_size
);
5032 // Relocate all ARM V4BX stubs.
5033 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
5034 p
!= this->arm_v4bx_stubs_
.end();
5038 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
5039 address
, view_size
);
5043 // Write out the stubs to file.
5045 template<bool big_endian
>
5047 Stub_table
<big_endian
>::do_write(Output_file
* of
)
5049 off_t offset
= this->offset();
5050 const section_size_type oview_size
=
5051 convert_to_section_size_type(this->data_size());
5052 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5054 // Write relocation stubs.
5055 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
5056 p
!= this->reloc_stubs_
.end();
5059 Reloc_stub
* stub
= p
->second
;
5060 Arm_address address
= this->address() + stub
->offset();
5062 == align_address(address
,
5063 stub
->stub_template()->alignment()));
5064 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
5068 // Write Cortex-A8 stubs.
5069 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5070 p
!= this->cortex_a8_stubs_
.end();
5073 Cortex_a8_stub
* stub
= p
->second
;
5074 Arm_address address
= this->address() + stub
->offset();
5076 == align_address(address
,
5077 stub
->stub_template()->alignment()));
5078 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
5082 // Write ARM V4BX relocation stubs.
5083 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5084 p
!= this->arm_v4bx_stubs_
.end();
5090 Arm_address address
= this->address() + (*p
)->offset();
5092 == align_address(address
,
5093 (*p
)->stub_template()->alignment()));
5094 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
5098 of
->write_output_view(this->offset(), oview_size
, oview
);
5101 // Update the data size and address alignment of the stub table at the end
5102 // of a relaxation pass. Return true if either the data size or the
5103 // alignment changed in this relaxation pass.
5105 template<bool big_endian
>
5107 Stub_table
<big_endian
>::update_data_size_and_addralign()
5109 // Go over all stubs in table to compute data size and address alignment.
5110 off_t size
= this->reloc_stubs_size_
;
5111 unsigned addralign
= this->reloc_stubs_addralign_
;
5113 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5114 p
!= this->cortex_a8_stubs_
.end();
5117 const Stub_template
* stub_template
= p
->second
->stub_template();
5118 addralign
= std::max(addralign
, stub_template
->alignment());
5119 size
= (align_address(size
, stub_template
->alignment())
5120 + stub_template
->size());
5123 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5124 p
!= this->arm_v4bx_stubs_
.end();
5130 const Stub_template
* stub_template
= (*p
)->stub_template();
5131 addralign
= std::max(addralign
, stub_template
->alignment());
5132 size
= (align_address(size
, stub_template
->alignment())
5133 + stub_template
->size());
5136 // Check if either data size or alignment changed in this pass.
5137 // Update prev_data_size_ and prev_addralign_. These will be used
5138 // as the current data size and address alignment for the next pass.
5139 bool changed
= size
!= this->prev_data_size_
;
5140 this->prev_data_size_
= size
;
5142 if (addralign
!= this->prev_addralign_
)
5144 this->prev_addralign_
= addralign
;
5149 // Finalize the stubs. This sets the offsets of the stubs within the stub
5150 // table. It also marks all input sections needing Cortex-A8 workaround.
5152 template<bool big_endian
>
5154 Stub_table
<big_endian
>::finalize_stubs()
5156 off_t off
= this->reloc_stubs_size_
;
5157 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5158 p
!= this->cortex_a8_stubs_
.end();
5161 Cortex_a8_stub
* stub
= p
->second
;
5162 const Stub_template
* stub_template
= stub
->stub_template();
5163 uint64_t stub_addralign
= stub_template
->alignment();
5164 off
= align_address(off
, stub_addralign
);
5165 stub
->set_offset(off
);
5166 off
+= stub_template
->size();
5168 // Mark input section so that we can determine later if a code section
5169 // needs the Cortex-A8 workaround quickly.
5170 Arm_relobj
<big_endian
>* arm_relobj
=
5171 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5172 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5175 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5176 p
!= this->arm_v4bx_stubs_
.end();
5182 const Stub_template
* stub_template
= (*p
)->stub_template();
5183 uint64_t stub_addralign
= stub_template
->alignment();
5184 off
= align_address(off
, stub_addralign
);
5185 (*p
)->set_offset(off
);
5186 off
+= stub_template
->size();
5189 gold_assert(off
<= this->prev_data_size_
);
5192 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5193 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5194 // of the address range seen by the linker.
5196 template<bool big_endian
>
5198 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5199 Target_arm
<big_endian
>* arm_target
,
5200 unsigned char* view
,
5201 Arm_address view_address
,
5202 section_size_type view_size
)
5204 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5205 for (Cortex_a8_stub_list::const_iterator p
=
5206 this->cortex_a8_stubs_
.lower_bound(view_address
);
5207 ((p
!= this->cortex_a8_stubs_
.end())
5208 && (p
->first
< (view_address
+ view_size
)));
5211 // We do not store the THUMB bit in the LSB of either the branch address
5212 // or the stub offset. There is no need to strip the LSB.
5213 Arm_address branch_address
= p
->first
;
5214 const Cortex_a8_stub
* stub
= p
->second
;
5215 Arm_address stub_address
= this->address() + stub
->offset();
5217 // Offset of the branch instruction relative to this view.
5218 section_size_type offset
=
5219 convert_to_section_size_type(branch_address
- view_address
);
5220 gold_assert((offset
+ 4) <= view_size
);
5222 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5223 view
+ offset
, branch_address
);
5227 // Arm_input_section methods.
5229 // Initialize an Arm_input_section.
5231 template<bool big_endian
>
5233 Arm_input_section
<big_endian
>::init()
5235 Relobj
* relobj
= this->relobj();
5236 unsigned int shndx
= this->shndx();
5238 // We have to cache original size, alignment and contents to avoid locking
5239 // the original file.
5240 this->original_addralign_
=
5241 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5243 // This is not efficient but we expect only a small number of relaxed
5244 // input sections for stubs.
5245 section_size_type section_size
;
5246 const unsigned char* section_contents
=
5247 relobj
->section_contents(shndx
, §ion_size
, false);
5248 this->original_size_
=
5249 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5251 gold_assert(this->original_contents_
== NULL
);
5252 this->original_contents_
= new unsigned char[section_size
];
5253 memcpy(this->original_contents_
, section_contents
, section_size
);
5255 // We want to make this look like the original input section after
5256 // output sections are finalized.
5257 Output_section
* os
= relobj
->output_section(shndx
);
5258 off_t offset
= relobj
->output_section_offset(shndx
);
5259 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5260 this->set_address(os
->address() + offset
);
5261 this->set_file_offset(os
->offset() + offset
);
5263 this->set_current_data_size(this->original_size_
);
5264 this->finalize_data_size();
5267 template<bool big_endian
>
5269 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5271 // We have to write out the original section content.
5272 gold_assert(this->original_contents_
!= NULL
);
5273 of
->write(this->offset(), this->original_contents_
,
5274 this->original_size_
);
5276 // If this owns a stub table and it is not empty, write it.
5277 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5278 this->stub_table_
->write(of
);
5281 // Finalize data size.
5283 template<bool big_endian
>
5285 Arm_input_section
<big_endian
>::set_final_data_size()
5287 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5289 if (this->is_stub_table_owner())
5291 this->stub_table_
->finalize_data_size();
5292 off
= align_address(off
, this->stub_table_
->addralign());
5293 off
+= this->stub_table_
->data_size();
5295 this->set_data_size(off
);
5298 // Reset address and file offset.
5300 template<bool big_endian
>
5302 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5304 // Size of the original input section contents.
5305 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5307 // If this is a stub table owner, account for the stub table size.
5308 if (this->is_stub_table_owner())
5310 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5312 // Reset the stub table's address and file offset. The
5313 // current data size for child will be updated after that.
5314 stub_table_
->reset_address_and_file_offset();
5315 off
= align_address(off
, stub_table_
->addralign());
5316 off
+= stub_table
->current_data_size();
5319 this->set_current_data_size(off
);
5322 // Arm_exidx_cantunwind methods.
5324 // Write this to Output file OF for a fixed endianness.
5326 template<bool big_endian
>
5328 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5330 off_t offset
= this->offset();
5331 const section_size_type oview_size
= 8;
5332 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5334 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5335 gold_assert(os
!= NULL
);
5337 Arm_relobj
<big_endian
>* arm_relobj
=
5338 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5339 Arm_address output_offset
=
5340 arm_relobj
->get_output_section_offset(this->shndx_
);
5341 Arm_address section_start
;
5342 section_size_type section_size
;
5344 // Find out the end of the text section referred by this.
5345 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5347 section_start
= os
->address() + output_offset
;
5348 const Arm_exidx_input_section
* exidx_input_section
=
5349 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5350 gold_assert(exidx_input_section
!= NULL
);
5352 convert_to_section_size_type(exidx_input_section
->text_size());
5356 // Currently this only happens for a relaxed section.
5357 const Output_relaxed_input_section
* poris
=
5358 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5359 gold_assert(poris
!= NULL
);
5360 section_start
= poris
->address();
5361 section_size
= convert_to_section_size_type(poris
->data_size());
5364 // We always append this to the end of an EXIDX section.
5365 Arm_address output_address
= section_start
+ section_size
;
5367 // Write out the entry. The first word either points to the beginning
5368 // or after the end of a text section. The second word is the special
5369 // EXIDX_CANTUNWIND value.
5370 uint32_t prel31_offset
= output_address
- this->address();
5371 if (Bits
<31>::has_overflow32(offset
))
5372 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5373 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
,
5374 prel31_offset
& 0x7fffffffU
);
5375 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
+ 4,
5376 elfcpp::EXIDX_CANTUNWIND
);
5378 of
->write_output_view(this->offset(), oview_size
, oview
);
5381 // Arm_exidx_merged_section methods.
5383 // Constructor for Arm_exidx_merged_section.
5384 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5385 // SECTION_OFFSET_MAP points to a section offset map describing how
5386 // parts of the input section are mapped to output. DELETED_BYTES is
5387 // the number of bytes deleted from the EXIDX input section.
5389 Arm_exidx_merged_section::Arm_exidx_merged_section(
5390 const Arm_exidx_input_section
& exidx_input_section
,
5391 const Arm_exidx_section_offset_map
& section_offset_map
,
5392 uint32_t deleted_bytes
)
5393 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5394 exidx_input_section
.shndx(),
5395 exidx_input_section
.addralign()),
5396 exidx_input_section_(exidx_input_section
),
5397 section_offset_map_(section_offset_map
)
5399 // If we retain or discard the whole EXIDX input section, we would
5401 gold_assert(deleted_bytes
!= 0
5402 && deleted_bytes
!= this->exidx_input_section_
.size());
5404 // Fix size here so that we do not need to implement set_final_data_size.
5405 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5406 this->set_data_size(size
);
5407 this->fix_data_size();
5409 // Allocate buffer for section contents and build contents.
5410 this->section_contents_
= new unsigned char[size
];
5413 // Build the contents of a merged EXIDX output section.
5416 Arm_exidx_merged_section::build_contents(
5417 const unsigned char* original_contents
,
5418 section_size_type original_size
)
5420 // Go over spans of input offsets and write only those that are not
5422 section_offset_type in_start
= 0;
5423 section_offset_type out_start
= 0;
5424 section_offset_type in_max
=
5425 convert_types
<section_offset_type
>(original_size
);
5426 section_offset_type out_max
=
5427 convert_types
<section_offset_type
>(this->data_size());
5428 for (Arm_exidx_section_offset_map::const_iterator p
=
5429 this->section_offset_map_
.begin();
5430 p
!= this->section_offset_map_
.end();
5433 section_offset_type in_end
= p
->first
;
5434 gold_assert(in_end
>= in_start
);
5435 section_offset_type out_end
= p
->second
;
5436 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5439 size_t out_chunk_size
=
5440 convert_types
<size_t>(out_end
- out_start
+ 1);
5442 gold_assert(out_chunk_size
== in_chunk_size
5443 && in_end
< in_max
&& out_end
< out_max
);
5445 memcpy(this->section_contents_
+ out_start
,
5446 original_contents
+ in_start
,
5448 out_start
+= out_chunk_size
;
5450 in_start
+= in_chunk_size
;
5454 // Given an input OBJECT, an input section index SHNDX within that
5455 // object, and an OFFSET relative to the start of that input
5456 // section, return whether or not the corresponding offset within
5457 // the output section is known. If this function returns true, it
5458 // sets *POUTPUT to the output offset. The value -1 indicates that
5459 // this input offset is being discarded.
5462 Arm_exidx_merged_section::do_output_offset(
5463 const Relobj
* relobj
,
5465 section_offset_type offset
,
5466 section_offset_type
* poutput
) const
5468 // We only handle offsets for the original EXIDX input section.
5469 if (relobj
!= this->exidx_input_section_
.relobj()
5470 || shndx
!= this->exidx_input_section_
.shndx())
5473 section_offset_type section_size
=
5474 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5475 if (offset
< 0 || offset
>= section_size
)
5476 // Input offset is out of valid range.
5480 // We need to look up the section offset map to determine the output
5481 // offset. Find the reference point in map that is first offset
5482 // bigger than or equal to this offset.
5483 Arm_exidx_section_offset_map::const_iterator p
=
5484 this->section_offset_map_
.lower_bound(offset
);
5486 // The section offset maps are build such that this should not happen if
5487 // input offset is in the valid range.
5488 gold_assert(p
!= this->section_offset_map_
.end());
5490 // We need to check if this is dropped.
5491 section_offset_type ref
= p
->first
;
5492 section_offset_type mapped_ref
= p
->second
;
5494 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5495 // Offset is present in output.
5496 *poutput
= mapped_ref
+ (offset
- ref
);
5498 // Offset is discarded owing to EXIDX entry merging.
5505 // Write this to output file OF.
5508 Arm_exidx_merged_section::do_write(Output_file
* of
)
5510 off_t offset
= this->offset();
5511 const section_size_type oview_size
= this->data_size();
5512 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5514 Output_section
* os
= this->relobj()->output_section(this->shndx());
5515 gold_assert(os
!= NULL
);
5517 memcpy(oview
, this->section_contents_
, oview_size
);
5518 of
->write_output_view(this->offset(), oview_size
, oview
);
5521 // Arm_exidx_fixup methods.
5523 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5524 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5525 // points to the end of the last seen EXIDX section.
5528 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5530 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5531 && this->last_input_section_
!= NULL
)
5533 Relobj
* relobj
= this->last_input_section_
->relobj();
5534 unsigned int text_shndx
= this->last_input_section_
->link();
5535 Arm_exidx_cantunwind
* cantunwind
=
5536 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5537 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5538 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5542 // Process an EXIDX section entry in input. Return whether this entry
5543 // can be deleted in the output. SECOND_WORD in the second word of the
5547 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5550 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5552 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5553 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5554 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5556 else if ((second_word
& 0x80000000) != 0)
5558 // Inlined unwinding data. Merge if equal to previous.
5559 delete_entry
= (merge_exidx_entries_
5560 && this->last_unwind_type_
== UT_INLINED_ENTRY
5561 && this->last_inlined_entry_
== second_word
);
5562 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5563 this->last_inlined_entry_
= second_word
;
5567 // Normal table entry. In theory we could merge these too,
5568 // but duplicate entries are likely to be much less common.
5569 delete_entry
= false;
5570 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5572 return delete_entry
;
5575 // Update the current section offset map during EXIDX section fix-up.
5576 // If there is no map, create one. INPUT_OFFSET is the offset of a
5577 // reference point, DELETED_BYTES is the number of deleted by in the
5578 // section so far. If DELETE_ENTRY is true, the reference point and
5579 // all offsets after the previous reference point are discarded.
5582 Arm_exidx_fixup::update_offset_map(
5583 section_offset_type input_offset
,
5584 section_size_type deleted_bytes
,
5587 if (this->section_offset_map_
== NULL
)
5588 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5589 section_offset_type output_offset
;
5591 output_offset
= Arm_exidx_input_section::invalid_offset
;
5593 output_offset
= input_offset
- deleted_bytes
;
5594 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5597 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5598 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5599 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5600 // If some entries are merged, also store a pointer to a newly created
5601 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5602 // owns the map and is responsible for releasing it after use.
5604 template<bool big_endian
>
5606 Arm_exidx_fixup::process_exidx_section(
5607 const Arm_exidx_input_section
* exidx_input_section
,
5608 const unsigned char* section_contents
,
5609 section_size_type section_size
,
5610 Arm_exidx_section_offset_map
** psection_offset_map
)
5612 Relobj
* relobj
= exidx_input_section
->relobj();
5613 unsigned shndx
= exidx_input_section
->shndx();
5615 if ((section_size
% 8) != 0)
5617 // Something is wrong with this section. Better not touch it.
5618 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5619 relobj
->name().c_str(), shndx
);
5620 this->last_input_section_
= exidx_input_section
;
5621 this->last_unwind_type_
= UT_NONE
;
5625 uint32_t deleted_bytes
= 0;
5626 bool prev_delete_entry
= false;
5627 gold_assert(this->section_offset_map_
== NULL
);
5629 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5631 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5633 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5634 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5636 bool delete_entry
= this->process_exidx_entry(second_word
);
5638 // Entry deletion causes changes in output offsets. We use a std::map
5639 // to record these. And entry (x, y) means input offset x
5640 // is mapped to output offset y. If y is invalid_offset, then x is
5641 // dropped in the output. Because of the way std::map::lower_bound
5642 // works, we record the last offset in a region w.r.t to keeping or
5643 // dropping. If there is no entry (x0, y0) for an input offset x0,
5644 // the output offset y0 of it is determined by the output offset y1 of
5645 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5646 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5648 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5649 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5651 // Update total deleted bytes for this entry.
5655 prev_delete_entry
= delete_entry
;
5658 // If section offset map is not NULL, make an entry for the end of
5660 if (this->section_offset_map_
!= NULL
)
5661 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5663 *psection_offset_map
= this->section_offset_map_
;
5664 this->section_offset_map_
= NULL
;
5665 this->last_input_section_
= exidx_input_section
;
5667 // Set the first output text section so that we can link the EXIDX output
5668 // section to it. Ignore any EXIDX input section that is completely merged.
5669 if (this->first_output_text_section_
== NULL
5670 && deleted_bytes
!= section_size
)
5672 unsigned int link
= exidx_input_section
->link();
5673 Output_section
* os
= relobj
->output_section(link
);
5674 gold_assert(os
!= NULL
);
5675 this->first_output_text_section_
= os
;
5678 return deleted_bytes
;
5681 // Arm_output_section methods.
5683 // Create a stub group for input sections from BEGIN to END. OWNER
5684 // points to the input section to be the owner a new stub table.
5686 template<bool big_endian
>
5688 Arm_output_section
<big_endian
>::create_stub_group(
5689 Input_section_list::const_iterator begin
,
5690 Input_section_list::const_iterator end
,
5691 Input_section_list::const_iterator owner
,
5692 Target_arm
<big_endian
>* target
,
5693 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5696 // We use a different kind of relaxed section in an EXIDX section.
5697 // The static casting from Output_relaxed_input_section to
5698 // Arm_input_section is invalid in an EXIDX section. We are okay
5699 // because we should not be calling this for an EXIDX section.
5700 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5702 // Currently we convert ordinary input sections into relaxed sections only
5703 // at this point but we may want to support creating relaxed input section
5704 // very early. So we check here to see if owner is already a relaxed
5707 Arm_input_section
<big_endian
>* arm_input_section
;
5708 if (owner
->is_relaxed_input_section())
5711 Arm_input_section
<big_endian
>::as_arm_input_section(
5712 owner
->relaxed_input_section());
5716 gold_assert(owner
->is_input_section());
5717 // Create a new relaxed input section. We need to lock the original
5719 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5721 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5722 new_relaxed_sections
->push_back(arm_input_section
);
5725 // Create a stub table.
5726 Stub_table
<big_endian
>* stub_table
=
5727 target
->new_stub_table(arm_input_section
);
5729 arm_input_section
->set_stub_table(stub_table
);
5731 Input_section_list::const_iterator p
= begin
;
5732 Input_section_list::const_iterator prev_p
;
5734 // Look for input sections or relaxed input sections in [begin ... end].
5737 if (p
->is_input_section() || p
->is_relaxed_input_section())
5739 // The stub table information for input sections live
5740 // in their objects.
5741 Arm_relobj
<big_endian
>* arm_relobj
=
5742 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5743 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5747 while (prev_p
!= end
);
5750 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5751 // of stub groups. We grow a stub group by adding input section until the
5752 // size is just below GROUP_SIZE. The last input section will be converted
5753 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5754 // input section after the stub table, effectively double the group size.
5756 // This is similar to the group_sections() function in elf32-arm.c but is
5757 // implemented differently.
5759 template<bool big_endian
>
5761 Arm_output_section
<big_endian
>::group_sections(
5762 section_size_type group_size
,
5763 bool stubs_always_after_branch
,
5764 Target_arm
<big_endian
>* target
,
5767 // States for grouping.
5770 // No group is being built.
5772 // A group is being built but the stub table is not found yet.
5773 // We keep group a stub group until the size is just under GROUP_SIZE.
5774 // The last input section in the group will be used as the stub table.
5775 FINDING_STUB_SECTION
,
5776 // A group is being built and we have already found a stub table.
5777 // We enter this state to grow a stub group by adding input section
5778 // after the stub table. This effectively doubles the group size.
5782 // Any newly created relaxed sections are stored here.
5783 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5785 State state
= NO_GROUP
;
5786 section_size_type off
= 0;
5787 section_size_type group_begin_offset
= 0;
5788 section_size_type group_end_offset
= 0;
5789 section_size_type stub_table_end_offset
= 0;
5790 Input_section_list::const_iterator group_begin
=
5791 this->input_sections().end();
5792 Input_section_list::const_iterator stub_table
=
5793 this->input_sections().end();
5794 Input_section_list::const_iterator group_end
= this->input_sections().end();
5795 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5796 p
!= this->input_sections().end();
5799 section_size_type section_begin_offset
=
5800 align_address(off
, p
->addralign());
5801 section_size_type section_end_offset
=
5802 section_begin_offset
+ p
->data_size();
5804 // Check to see if we should group the previously seen sections.
5810 case FINDING_STUB_SECTION
:
5811 // Adding this section makes the group larger than GROUP_SIZE.
5812 if (section_end_offset
- group_begin_offset
>= group_size
)
5814 if (stubs_always_after_branch
)
5816 gold_assert(group_end
!= this->input_sections().end());
5817 this->create_stub_group(group_begin
, group_end
, group_end
,
5818 target
, &new_relaxed_sections
,
5824 // But wait, there's more! Input sections up to
5825 // stub_group_size bytes after the stub table can be
5826 // handled by it too.
5827 state
= HAS_STUB_SECTION
;
5828 stub_table
= group_end
;
5829 stub_table_end_offset
= group_end_offset
;
5834 case HAS_STUB_SECTION
:
5835 // Adding this section makes the post stub-section group larger
5837 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5839 gold_assert(group_end
!= this->input_sections().end());
5840 this->create_stub_group(group_begin
, group_end
, stub_table
,
5841 target
, &new_relaxed_sections
, task
);
5850 // If we see an input section and currently there is no group, start
5851 // a new one. Skip any empty sections. We look at the data size
5852 // instead of calling p->relobj()->section_size() to avoid locking.
5853 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5854 && (p
->data_size() != 0))
5856 if (state
== NO_GROUP
)
5858 state
= FINDING_STUB_SECTION
;
5860 group_begin_offset
= section_begin_offset
;
5863 // Keep track of the last input section seen.
5865 group_end_offset
= section_end_offset
;
5868 off
= section_end_offset
;
5871 // Create a stub group for any ungrouped sections.
5872 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5874 gold_assert(group_end
!= this->input_sections().end());
5875 this->create_stub_group(group_begin
, group_end
,
5876 (state
== FINDING_STUB_SECTION
5879 target
, &new_relaxed_sections
, task
);
5882 // Convert input section into relaxed input section in a batch.
5883 if (!new_relaxed_sections
.empty())
5884 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5886 // Update the section offsets
5887 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5889 Arm_relobj
<big_endian
>* arm_relobj
=
5890 Arm_relobj
<big_endian
>::as_arm_relobj(
5891 new_relaxed_sections
[i
]->relobj());
5892 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5893 // Tell Arm_relobj that this input section is converted.
5894 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5898 // Append non empty text sections in this to LIST in ascending
5899 // order of their position in this.
5901 template<bool big_endian
>
5903 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5904 Text_section_list
* list
)
5906 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5908 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5909 p
!= this->input_sections().end();
5912 // We only care about plain or relaxed input sections. We also
5913 // ignore any merged sections.
5914 if (p
->is_input_section() || p
->is_relaxed_input_section())
5915 list
->push_back(Text_section_list::value_type(p
->relobj(),
5920 template<bool big_endian
>
5922 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5924 const Text_section_list
& sorted_text_sections
,
5925 Symbol_table
* symtab
,
5926 bool merge_exidx_entries
,
5929 // We should only do this for the EXIDX output section.
5930 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5932 // We don't want the relaxation loop to undo these changes, so we discard
5933 // the current saved states and take another one after the fix-up.
5934 this->discard_states();
5936 // Remove all input sections.
5937 uint64_t address
= this->address();
5938 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5939 Input_section_list input_sections
;
5940 this->reset_address_and_file_offset();
5941 this->get_input_sections(address
, std::string(""), &input_sections
);
5943 if (!this->input_sections().empty())
5944 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5946 // Go through all the known input sections and record them.
5947 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5948 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5949 Section_id_hash
> Text_to_exidx_map
;
5950 Text_to_exidx_map text_to_exidx_map
;
5951 for (Input_section_list::const_iterator p
= input_sections
.begin();
5952 p
!= input_sections
.end();
5955 // This should never happen. At this point, we should only see
5956 // plain EXIDX input sections.
5957 gold_assert(!p
->is_relaxed_input_section());
5958 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
5961 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
5963 // Go over the sorted text sections.
5964 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5965 Section_id_set processed_input_sections
;
5966 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5967 p
!= sorted_text_sections
.end();
5970 Relobj
* relobj
= p
->first
;
5971 unsigned int shndx
= p
->second
;
5973 Arm_relobj
<big_endian
>* arm_relobj
=
5974 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5975 const Arm_exidx_input_section
* exidx_input_section
=
5976 arm_relobj
->exidx_input_section_by_link(shndx
);
5978 // If this text section has no EXIDX section or if the EXIDX section
5979 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5980 // of the last seen EXIDX section.
5981 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
5983 exidx_fixup
.add_exidx_cantunwind_as_needed();
5987 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5988 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5989 Section_id
sid(exidx_relobj
, exidx_shndx
);
5990 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
5991 if (iter
== text_to_exidx_map
.end())
5993 // This is odd. We have not seen this EXIDX input section before.
5994 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5995 // issue a warning instead. We assume the user knows what he
5996 // or she is doing. Otherwise, this is an error.
5997 if (layout
->script_options()->saw_sections_clause())
5998 gold_warning(_("unwinding may not work because EXIDX input section"
5999 " %u of %s is not in EXIDX output section"),
6000 exidx_shndx
, exidx_relobj
->name().c_str());
6002 gold_error(_("unwinding may not work because EXIDX input section"
6003 " %u of %s is not in EXIDX output section"),
6004 exidx_shndx
, exidx_relobj
->name().c_str());
6006 exidx_fixup
.add_exidx_cantunwind_as_needed();
6010 // We need to access the contents of the EXIDX section, lock the
6012 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
6013 section_size_type exidx_size
;
6014 const unsigned char* exidx_contents
=
6015 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
6017 // Fix up coverage and append input section to output data list.
6018 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
6019 uint32_t deleted_bytes
=
6020 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
6023 §ion_offset_map
);
6025 if (deleted_bytes
== exidx_input_section
->size())
6027 // The whole EXIDX section got merged. Remove it from output.
6028 gold_assert(section_offset_map
== NULL
);
6029 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
6031 // All local symbols defined in this input section will be dropped.
6032 // We need to adjust output local symbol count.
6033 arm_relobj
->set_output_local_symbol_count_needs_update();
6035 else if (deleted_bytes
> 0)
6037 // Some entries are merged. We need to convert this EXIDX input
6038 // section into a relaxed section.
6039 gold_assert(section_offset_map
!= NULL
);
6041 Arm_exidx_merged_section
* merged_section
=
6042 new Arm_exidx_merged_section(*exidx_input_section
,
6043 *section_offset_map
, deleted_bytes
);
6044 merged_section
->build_contents(exidx_contents
, exidx_size
);
6046 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
6047 this->add_relaxed_input_section(layout
, merged_section
, secname
);
6048 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
6050 // All local symbols defined in discarded portions of this input
6051 // section will be dropped. We need to adjust output local symbol
6053 arm_relobj
->set_output_local_symbol_count_needs_update();
6057 // Just add back the EXIDX input section.
6058 gold_assert(section_offset_map
== NULL
);
6059 const Output_section::Input_section
* pis
= iter
->second
;
6060 gold_assert(pis
->is_input_section());
6061 this->add_script_input_section(*pis
);
6064 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
6067 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
6068 exidx_fixup
.add_exidx_cantunwind_as_needed();
6070 // Remove any known EXIDX input sections that are not processed.
6071 for (Input_section_list::const_iterator p
= input_sections
.begin();
6072 p
!= input_sections
.end();
6075 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
6076 == processed_input_sections
.end())
6078 // We discard a known EXIDX section because its linked
6079 // text section has been folded by ICF. We also discard an
6080 // EXIDX section with error, the output does not matter in this
6081 // case. We do this to avoid triggering asserts.
6082 Arm_relobj
<big_endian
>* arm_relobj
=
6083 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6084 const Arm_exidx_input_section
* exidx_input_section
=
6085 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
6086 gold_assert(exidx_input_section
!= NULL
);
6087 if (!exidx_input_section
->has_errors())
6089 unsigned int text_shndx
= exidx_input_section
->link();
6090 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
6093 // Remove this from link. We also need to recount the
6095 p
->relobj()->set_output_section(p
->shndx(), NULL
);
6096 arm_relobj
->set_output_local_symbol_count_needs_update();
6100 // Link exidx output section to the first seen output section and
6101 // set correct entry size.
6102 this->set_link_section(exidx_fixup
.first_output_text_section());
6103 this->set_entsize(8);
6105 // Make changes permanent.
6106 this->save_states();
6107 this->set_section_offsets_need_adjustment();
6110 // Link EXIDX output sections to text output sections.
6112 template<bool big_endian
>
6114 Arm_output_section
<big_endian
>::set_exidx_section_link()
6116 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
6117 if (!this->input_sections().empty())
6119 Input_section_list::const_iterator p
= this->input_sections().begin();
6120 Arm_relobj
<big_endian
>* arm_relobj
=
6121 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
6122 unsigned exidx_shndx
= p
->shndx();
6123 const Arm_exidx_input_section
* exidx_input_section
=
6124 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
6125 gold_assert(exidx_input_section
!= NULL
);
6126 unsigned int text_shndx
= exidx_input_section
->link();
6127 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
6128 this->set_link_section(os
);
6132 // Arm_relobj methods.
6134 // Determine if an input section is scannable for stub processing. SHDR is
6135 // the header of the section and SHNDX is the section index. OS is the output
6136 // section for the input section and SYMTAB is the global symbol table used to
6137 // look up ICF information.
6139 template<bool big_endian
>
6141 Arm_relobj
<big_endian
>::section_is_scannable(
6142 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6144 const Output_section
* os
,
6145 const Symbol_table
* symtab
)
6147 // Skip any empty sections, unallocated sections or sections whose
6148 // type are not SHT_PROGBITS.
6149 if (shdr
.get_sh_size() == 0
6150 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6151 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6154 // Skip any discarded or ICF'ed sections.
6155 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6158 // If this requires special offset handling, check to see if it is
6159 // a relaxed section. If this is not, then it is a merged section that
6160 // we cannot handle.
6161 if (this->is_output_section_offset_invalid(shndx
))
6163 const Output_relaxed_input_section
* poris
=
6164 os
->find_relaxed_input_section(this, shndx
);
6172 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6173 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6175 template<bool big_endian
>
6177 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6178 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6179 const Relobj::Output_sections
& out_sections
,
6180 const Symbol_table
* symtab
,
6181 const unsigned char* pshdrs
)
6183 unsigned int sh_type
= shdr
.get_sh_type();
6184 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6187 // Ignore empty section.
6188 off_t sh_size
= shdr
.get_sh_size();
6192 // Ignore reloc section with unexpected symbol table. The
6193 // error will be reported in the final link.
6194 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6197 unsigned int reloc_size
;
6198 if (sh_type
== elfcpp::SHT_REL
)
6199 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6201 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6203 // Ignore reloc section with unexpected entsize or uneven size.
6204 // The error will be reported in the final link.
6205 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6208 // Ignore reloc section with bad info. This error will be
6209 // reported in the final link.
6210 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6211 if (index
>= this->shnum())
6214 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6215 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6216 return this->section_is_scannable(text_shdr
, index
,
6217 out_sections
[index
], symtab
);
6220 // Return the output address of either a plain input section or a relaxed
6221 // input section. SHNDX is the section index. We define and use this
6222 // instead of calling Output_section::output_address because that is slow
6223 // for large output.
6225 template<bool big_endian
>
6227 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6231 if (this->is_output_section_offset_invalid(shndx
))
6233 const Output_relaxed_input_section
* poris
=
6234 os
->find_relaxed_input_section(this, shndx
);
6235 // We do not handle merged sections here.
6236 gold_assert(poris
!= NULL
);
6237 return poris
->address();
6240 return os
->address() + this->get_output_section_offset(shndx
);
6243 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6244 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6246 template<bool big_endian
>
6248 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6249 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6252 const Symbol_table
* symtab
)
6254 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6257 // If the section does not cross any 4K-boundaries, it does not need to
6259 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6260 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6266 // Scan a section for Cortex-A8 workaround.
6268 template<bool big_endian
>
6270 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6271 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6274 Target_arm
<big_endian
>* arm_target
)
6276 // Look for the first mapping symbol in this section. It should be
6278 Mapping_symbol_position
section_start(shndx
, 0);
6279 typename
Mapping_symbols_info::const_iterator p
=
6280 this->mapping_symbols_info_
.lower_bound(section_start
);
6282 // There are no mapping symbols for this section. Treat it as a data-only
6284 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6287 Arm_address output_address
=
6288 this->simple_input_section_output_address(shndx
, os
);
6290 // Get the section contents.
6291 section_size_type input_view_size
= 0;
6292 const unsigned char* input_view
=
6293 this->section_contents(shndx
, &input_view_size
, false);
6295 // We need to go through the mapping symbols to determine what to
6296 // scan. There are two reasons. First, we should look at THUMB code and
6297 // THUMB code only. Second, we only want to look at the 4K-page boundary
6298 // to speed up the scanning.
6300 while (p
!= this->mapping_symbols_info_
.end()
6301 && p
->first
.first
== shndx
)
6303 typename
Mapping_symbols_info::const_iterator next
=
6304 this->mapping_symbols_info_
.upper_bound(p
->first
);
6306 // Only scan part of a section with THUMB code.
6307 if (p
->second
== 't')
6309 // Determine the end of this range.
6310 section_size_type span_start
=
6311 convert_to_section_size_type(p
->first
.second
);
6312 section_size_type span_end
;
6313 if (next
!= this->mapping_symbols_info_
.end()
6314 && next
->first
.first
== shndx
)
6315 span_end
= convert_to_section_size_type(next
->first
.second
);
6317 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6319 if (((span_start
+ output_address
) & ~0xfffUL
)
6320 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6322 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6323 span_start
, span_end
,
6333 // Scan relocations for stub generation.
6335 template<bool big_endian
>
6337 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6338 Target_arm
<big_endian
>* arm_target
,
6339 const Symbol_table
* symtab
,
6340 const Layout
* layout
)
6342 unsigned int shnum
= this->shnum();
6343 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6345 // Read the section headers.
6346 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6350 // To speed up processing, we set up hash tables for fast lookup of
6351 // input offsets to output addresses.
6352 this->initialize_input_to_output_maps();
6354 const Relobj::Output_sections
& out_sections(this->output_sections());
6356 Relocate_info
<32, big_endian
> relinfo
;
6357 relinfo
.symtab
= symtab
;
6358 relinfo
.layout
= layout
;
6359 relinfo
.object
= this;
6361 // Do relocation stubs scanning.
6362 const unsigned char* p
= pshdrs
+ shdr_size
;
6363 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6365 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6366 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6369 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6370 Arm_address output_offset
= this->get_output_section_offset(index
);
6371 Arm_address output_address
;
6372 if (output_offset
!= invalid_address
)
6373 output_address
= out_sections
[index
]->address() + output_offset
;
6376 // Currently this only happens for a relaxed section.
6377 const Output_relaxed_input_section
* poris
=
6378 out_sections
[index
]->find_relaxed_input_section(this, index
);
6379 gold_assert(poris
!= NULL
);
6380 output_address
= poris
->address();
6383 // Get the relocations.
6384 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6388 // Get the section contents. This does work for the case in which
6389 // we modify the contents of an input section. We need to pass the
6390 // output view under such circumstances.
6391 section_size_type input_view_size
= 0;
6392 const unsigned char* input_view
=
6393 this->section_contents(index
, &input_view_size
, false);
6395 relinfo
.reloc_shndx
= i
;
6396 relinfo
.data_shndx
= index
;
6397 unsigned int sh_type
= shdr
.get_sh_type();
6398 unsigned int reloc_size
;
6399 if (sh_type
== elfcpp::SHT_REL
)
6400 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6402 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6404 Output_section
* os
= out_sections
[index
];
6405 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6406 shdr
.get_sh_size() / reloc_size
,
6408 output_offset
== invalid_address
,
6409 input_view
, output_address
,
6414 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6415 // after its relocation section, if there is one, is processed for
6416 // relocation stubs. Merging this loop with the one above would have been
6417 // complicated since we would have had to make sure that relocation stub
6418 // scanning is done first.
6419 if (arm_target
->fix_cortex_a8())
6421 const unsigned char* p
= pshdrs
+ shdr_size
;
6422 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6424 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6425 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6428 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6433 // After we've done the relocations, we release the hash tables,
6434 // since we no longer need them.
6435 this->free_input_to_output_maps();
6438 // Count the local symbols. The ARM backend needs to know if a symbol
6439 // is a THUMB function or not. For global symbols, it is easy because
6440 // the Symbol object keeps the ELF symbol type. For local symbol it is
6441 // harder because we cannot access this information. So we override the
6442 // do_count_local_symbol in parent and scan local symbols to mark
6443 // THUMB functions. This is not the most efficient way but I do not want to
6444 // slow down other ports by calling a per symbol target hook inside
6445 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6447 template<bool big_endian
>
6449 Arm_relobj
<big_endian
>::do_count_local_symbols(
6450 Stringpool_template
<char>* pool
,
6451 Stringpool_template
<char>* dynpool
)
6453 // We need to fix-up the values of any local symbols whose type are
6456 // Ask parent to count the local symbols.
6457 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6458 const unsigned int loccount
= this->local_symbol_count();
6462 // Initialize the thumb function bit-vector.
6463 std::vector
<bool> empty_vector(loccount
, false);
6464 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6466 // Read the symbol table section header.
6467 const unsigned int symtab_shndx
= this->symtab_shndx();
6468 elfcpp::Shdr
<32, big_endian
>
6469 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6470 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6472 // Read the local symbols.
6473 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6474 gold_assert(loccount
== symtabshdr
.get_sh_info());
6475 off_t locsize
= loccount
* sym_size
;
6476 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6477 locsize
, true, true);
6479 // For mapping symbol processing, we need to read the symbol names.
6480 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6481 if (strtab_shndx
>= this->shnum())
6483 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6487 elfcpp::Shdr
<32, big_endian
>
6488 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6489 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6491 this->error(_("symbol table name section has wrong type: %u"),
6492 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6495 const char* pnames
=
6496 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6497 strtabshdr
.get_sh_size(),
6500 // Loop over the local symbols and mark any local symbols pointing
6501 // to THUMB functions.
6503 // Skip the first dummy symbol.
6505 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6506 this->local_values();
6507 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6509 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6510 elfcpp::STT st_type
= sym
.get_st_type();
6511 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6512 Arm_address input_value
= lv
.input_value();
6514 // Check to see if this is a mapping symbol.
6515 const char* sym_name
= pnames
+ sym
.get_st_name();
6516 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6519 unsigned int input_shndx
=
6520 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6521 gold_assert(is_ordinary
);
6523 // Strip of LSB in case this is a THUMB symbol.
6524 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6525 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6528 if (st_type
== elfcpp::STT_ARM_TFUNC
6529 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6531 // This is a THUMB function. Mark this and canonicalize the
6532 // symbol value by setting LSB.
6533 this->local_symbol_is_thumb_function_
[i
] = true;
6534 if ((input_value
& 1) == 0)
6535 lv
.set_input_value(input_value
| 1);
6540 // Relocate sections.
6541 template<bool big_endian
>
6543 Arm_relobj
<big_endian
>::do_relocate_sections(
6544 const Symbol_table
* symtab
,
6545 const Layout
* layout
,
6546 const unsigned char* pshdrs
,
6548 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6550 // Call parent to relocate sections.
6551 Sized_relobj_file
<32, big_endian
>::do_relocate_sections(symtab
, layout
,
6552 pshdrs
, of
, pviews
);
6554 // We do not generate stubs if doing a relocatable link.
6555 if (parameters
->options().relocatable())
6558 // Relocate stub tables.
6559 unsigned int shnum
= this->shnum();
6561 Target_arm
<big_endian
>* arm_target
=
6562 Target_arm
<big_endian
>::default_target();
6564 Relocate_info
<32, big_endian
> relinfo
;
6565 relinfo
.symtab
= symtab
;
6566 relinfo
.layout
= layout
;
6567 relinfo
.object
= this;
6569 for (unsigned int i
= 1; i
< shnum
; ++i
)
6571 Arm_input_section
<big_endian
>* arm_input_section
=
6572 arm_target
->find_arm_input_section(this, i
);
6574 if (arm_input_section
!= NULL
6575 && arm_input_section
->is_stub_table_owner()
6576 && !arm_input_section
->stub_table()->empty())
6578 // We cannot discard a section if it owns a stub table.
6579 Output_section
* os
= this->output_section(i
);
6580 gold_assert(os
!= NULL
);
6582 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6583 relinfo
.reloc_shdr
= NULL
;
6584 relinfo
.data_shndx
= i
;
6585 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6587 gold_assert((*pviews
)[i
].view
!= NULL
);
6589 // We are passed the output section view. Adjust it to cover the
6591 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6592 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6593 && ((stub_table
->address() + stub_table
->data_size())
6594 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6596 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6597 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6598 Arm_address address
= stub_table
->address();
6599 section_size_type view_size
= stub_table
->data_size();
6601 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6605 // Apply Cortex A8 workaround if applicable.
6606 if (this->section_has_cortex_a8_workaround(i
))
6608 unsigned char* view
= (*pviews
)[i
].view
;
6609 Arm_address view_address
= (*pviews
)[i
].address
;
6610 section_size_type view_size
= (*pviews
)[i
].view_size
;
6611 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6613 // Adjust view to cover section.
6614 Output_section
* os
= this->output_section(i
);
6615 gold_assert(os
!= NULL
);
6616 Arm_address section_address
=
6617 this->simple_input_section_output_address(i
, os
);
6618 uint64_t section_size
= this->section_size(i
);
6620 gold_assert(section_address
>= view_address
6621 && ((section_address
+ section_size
)
6622 <= (view_address
+ view_size
)));
6624 unsigned char* section_view
= view
+ (section_address
- view_address
);
6626 // Apply the Cortex-A8 workaround to the output address range
6627 // corresponding to this input section.
6628 stub_table
->apply_cortex_a8_workaround_to_address_range(
6637 // Find the linked text section of an EXIDX section by looking at the first
6638 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6639 // must be linked to its associated code section via the sh_link field of
6640 // its section header. However, some tools are broken and the link is not
6641 // always set. LD just drops such an EXIDX section silently, causing the
6642 // associated code not unwindabled. Here we try a little bit harder to
6643 // discover the linked code section.
6645 // PSHDR points to the section header of a relocation section of an EXIDX
6646 // section. If we can find a linked text section, return true and
6647 // store the text section index in the location PSHNDX. Otherwise
6650 template<bool big_endian
>
6652 Arm_relobj
<big_endian
>::find_linked_text_section(
6653 const unsigned char* pshdr
,
6654 const unsigned char* psyms
,
6655 unsigned int* pshndx
)
6657 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6659 // If there is no relocation, we cannot find the linked text section.
6661 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6662 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6664 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6665 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6667 // Get the relocations.
6668 const unsigned char* prelocs
=
6669 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6671 // Find the REL31 relocation for the first word of the first EXIDX entry.
6672 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6674 Arm_address r_offset
;
6675 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6676 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6678 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6679 r_info
= reloc
.get_r_info();
6680 r_offset
= reloc
.get_r_offset();
6684 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6685 r_info
= reloc
.get_r_info();
6686 r_offset
= reloc
.get_r_offset();
6689 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6690 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6693 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6695 || r_sym
>= this->local_symbol_count()
6699 // This is the relocation for the first word of the first EXIDX entry.
6700 // We expect to see a local section symbol.
6701 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6702 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6703 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6707 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6708 gold_assert(is_ordinary
);
6718 // Make an EXIDX input section object for an EXIDX section whose index is
6719 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6720 // is the section index of the linked text section.
6722 template<bool big_endian
>
6724 Arm_relobj
<big_endian
>::make_exidx_input_section(
6726 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6727 unsigned int text_shndx
,
6728 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6730 // Create an Arm_exidx_input_section object for this EXIDX section.
6731 Arm_exidx_input_section
* exidx_input_section
=
6732 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6733 shdr
.get_sh_addralign(),
6734 text_shdr
.get_sh_size());
6736 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6737 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6739 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6741 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6742 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6743 this->name().c_str());
6744 exidx_input_section
->set_has_errors();
6746 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6748 unsigned other_exidx_shndx
=
6749 this->exidx_section_map_
[text_shndx
]->shndx();
6750 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6752 this->section_name(shndx
).c_str(), shndx
,
6753 this->section_name(other_exidx_shndx
).c_str(),
6754 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6755 text_shndx
, this->name().c_str());
6756 exidx_input_section
->set_has_errors();
6759 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6761 // Check section flags of text section.
6762 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6764 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6766 this->section_name(shndx
).c_str(), shndx
,
6767 this->section_name(text_shndx
).c_str(), text_shndx
,
6768 this->name().c_str());
6769 exidx_input_section
->set_has_errors();
6771 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6772 // I would like to make this an error but currently ld just ignores
6774 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6776 this->section_name(shndx
).c_str(), shndx
,
6777 this->section_name(text_shndx
).c_str(), text_shndx
,
6778 this->name().c_str());
6781 // Read the symbol information.
6783 template<bool big_endian
>
6785 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6787 // Call parent class to read symbol information.
6788 this->base_read_symbols(sd
);
6790 // If this input file is a binary file, it has no processor
6791 // specific flags and attributes section.
6792 Input_file::Format format
= this->input_file()->format();
6793 if (format
!= Input_file::FORMAT_ELF
)
6795 gold_assert(format
== Input_file::FORMAT_BINARY
);
6796 this->merge_flags_and_attributes_
= false;
6800 // Read processor-specific flags in ELF file header.
6801 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6802 elfcpp::Elf_sizes
<32>::ehdr_size
,
6804 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6805 this->processor_specific_flags_
= ehdr
.get_e_flags();
6807 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6809 std::vector
<unsigned int> deferred_exidx_sections
;
6810 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6811 const unsigned char* pshdrs
= sd
->section_headers
->data();
6812 const unsigned char* ps
= pshdrs
+ shdr_size
;
6813 bool must_merge_flags_and_attributes
= false;
6814 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6816 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6818 // Sometimes an object has no contents except the section name string
6819 // table and an empty symbol table with the undefined symbol. We
6820 // don't want to merge processor-specific flags from such an object.
6821 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6823 // Symbol table is not empty.
6824 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6825 elfcpp::Elf_sizes
<32>::sym_size
;
6826 if (shdr
.get_sh_size() > sym_size
)
6827 must_merge_flags_and_attributes
= true;
6829 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6830 // If this is neither an empty symbol table nor a string table,
6832 must_merge_flags_and_attributes
= true;
6834 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6836 gold_assert(this->attributes_section_data_
== NULL
);
6837 section_offset_type section_offset
= shdr
.get_sh_offset();
6838 section_size_type section_size
=
6839 convert_to_section_size_type(shdr
.get_sh_size());
6840 const unsigned char* view
=
6841 this->get_view(section_offset
, section_size
, true, false);
6842 this->attributes_section_data_
=
6843 new Attributes_section_data(view
, section_size
);
6845 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6847 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6848 if (text_shndx
== elfcpp::SHN_UNDEF
)
6849 deferred_exidx_sections
.push_back(i
);
6852 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6853 + text_shndx
* shdr_size
);
6854 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6856 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6857 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6858 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6859 this->section_name(i
).c_str(), this->name().c_str());
6864 if (!must_merge_flags_and_attributes
)
6866 gold_assert(deferred_exidx_sections
.empty());
6867 this->merge_flags_and_attributes_
= false;
6871 // Some tools are broken and they do not set the link of EXIDX sections.
6872 // We look at the first relocation to figure out the linked sections.
6873 if (!deferred_exidx_sections
.empty())
6875 // We need to go over the section headers again to find the mapping
6876 // from sections being relocated to their relocation sections. This is
6877 // a bit inefficient as we could do that in the loop above. However,
6878 // we do not expect any deferred EXIDX sections normally. So we do not
6879 // want to slow down the most common path.
6880 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6881 Reloc_map reloc_map
;
6882 ps
= pshdrs
+ shdr_size
;
6883 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6885 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6886 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
6887 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
6889 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
6890 if (info_shndx
>= this->shnum())
6891 gold_error(_("relocation section %u has invalid info %u"),
6893 Reloc_map::value_type
value(info_shndx
, i
);
6894 std::pair
<Reloc_map::iterator
, bool> result
=
6895 reloc_map
.insert(value
);
6897 gold_error(_("section %u has multiple relocation sections "
6899 info_shndx
, i
, reloc_map
[info_shndx
]);
6903 // Read the symbol table section header.
6904 const unsigned int symtab_shndx
= this->symtab_shndx();
6905 elfcpp::Shdr
<32, big_endian
>
6906 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6907 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6909 // Read the local symbols.
6910 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6911 const unsigned int loccount
= this->local_symbol_count();
6912 gold_assert(loccount
== symtabshdr
.get_sh_info());
6913 off_t locsize
= loccount
* sym_size
;
6914 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6915 locsize
, true, true);
6917 // Process the deferred EXIDX sections.
6918 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
6920 unsigned int shndx
= deferred_exidx_sections
[i
];
6921 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
6922 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
6923 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
6924 if (it
!= reloc_map
.end())
6925 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
6926 psyms
, &text_shndx
);
6927 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6928 + text_shndx
* shdr_size
);
6929 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
6934 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6935 // sections for unwinding. These sections are referenced implicitly by
6936 // text sections linked in the section headers. If we ignore these implicit
6937 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6938 // will be garbage-collected incorrectly. Hence we override the same function
6939 // in the base class to handle these implicit references.
6941 template<bool big_endian
>
6943 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6945 Read_relocs_data
* rd
)
6947 // First, call base class method to process relocations in this object.
6948 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6950 // If --gc-sections is not specified, there is nothing more to do.
6951 // This happens when --icf is used but --gc-sections is not.
6952 if (!parameters
->options().gc_sections())
6955 unsigned int shnum
= this->shnum();
6956 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6957 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6961 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6962 // to these from the linked text sections.
6963 const unsigned char* ps
= pshdrs
+ shdr_size
;
6964 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6966 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6967 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6969 // Found an .ARM.exidx section, add it to the set of reachable
6970 // sections from its linked text section.
6971 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6972 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6977 // Update output local symbol count. Owing to EXIDX entry merging, some local
6978 // symbols will be removed in output. Adjust output local symbol count
6979 // accordingly. We can only changed the static output local symbol count. It
6980 // is too late to change the dynamic symbols.
6982 template<bool big_endian
>
6984 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
6986 // Caller should check that this needs updating. We want caller checking
6987 // because output_local_symbol_count_needs_update() is most likely inlined.
6988 gold_assert(this->output_local_symbol_count_needs_update_
);
6990 gold_assert(this->symtab_shndx() != -1U);
6991 if (this->symtab_shndx() == 0)
6993 // This object has no symbols. Weird but legal.
6997 // Read the symbol table section header.
6998 const unsigned int symtab_shndx
= this->symtab_shndx();
6999 elfcpp::Shdr
<32, big_endian
>
7000 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
7001 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
7003 // Read the local symbols.
7004 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
7005 const unsigned int loccount
= this->local_symbol_count();
7006 gold_assert(loccount
== symtabshdr
.get_sh_info());
7007 off_t locsize
= loccount
* sym_size
;
7008 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
7009 locsize
, true, true);
7011 // Loop over the local symbols.
7013 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
7015 const Output_sections
& out_sections(this->output_sections());
7016 unsigned int shnum
= this->shnum();
7017 unsigned int count
= 0;
7018 // Skip the first, dummy, symbol.
7020 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
7022 elfcpp::Sym
<32, big_endian
> sym(psyms
);
7024 Symbol_value
<32>& lv((*this->local_values())[i
]);
7026 // This local symbol was already discarded by do_count_local_symbols.
7027 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
7031 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
7036 Output_section
* os
= out_sections
[shndx
];
7038 // This local symbol no longer has an output section. Discard it.
7041 lv
.set_no_output_symtab_entry();
7045 // Currently we only discard parts of EXIDX input sections.
7046 // We explicitly check for a merged EXIDX input section to avoid
7047 // calling Output_section_data::output_offset unless necessary.
7048 if ((this->get_output_section_offset(shndx
) == invalid_address
)
7049 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
7051 section_offset_type output_offset
=
7052 os
->output_offset(this, shndx
, lv
.input_value());
7053 if (output_offset
== -1)
7055 // This symbol is defined in a part of an EXIDX input section
7056 // that is discarded due to entry merging.
7057 lv
.set_no_output_symtab_entry();
7066 this->set_output_local_symbol_count(count
);
7067 this->output_local_symbol_count_needs_update_
= false;
7070 // Arm_dynobj methods.
7072 // Read the symbol information.
7074 template<bool big_endian
>
7076 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
7078 // Call parent class to read symbol information.
7079 this->base_read_symbols(sd
);
7081 // Read processor-specific flags in ELF file header.
7082 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
7083 elfcpp::Elf_sizes
<32>::ehdr_size
,
7085 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
7086 this->processor_specific_flags_
= ehdr
.get_e_flags();
7088 // Read the attributes section if there is one.
7089 // We read from the end because gas seems to put it near the end of
7090 // the section headers.
7091 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
7092 const unsigned char* ps
=
7093 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
7094 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
7096 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
7097 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
7099 section_offset_type section_offset
= shdr
.get_sh_offset();
7100 section_size_type section_size
=
7101 convert_to_section_size_type(shdr
.get_sh_size());
7102 const unsigned char* view
=
7103 this->get_view(section_offset
, section_size
, true, false);
7104 this->attributes_section_data_
=
7105 new Attributes_section_data(view
, section_size
);
7111 // Stub_addend_reader methods.
7113 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7115 template<bool big_endian
>
7116 elfcpp::Elf_types
<32>::Elf_Swxword
7117 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
7118 unsigned int r_type
,
7119 const unsigned char* view
,
7120 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
7122 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
7126 case elfcpp::R_ARM_CALL
:
7127 case elfcpp::R_ARM_JUMP24
:
7128 case elfcpp::R_ARM_PLT32
:
7130 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7131 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7132 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
7133 return Bits
<26>::sign_extend32(val
<< 2);
7136 case elfcpp::R_ARM_THM_CALL
:
7137 case elfcpp::R_ARM_THM_JUMP24
:
7138 case elfcpp::R_ARM_THM_XPC22
:
7140 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7141 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7142 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7143 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7144 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7147 case elfcpp::R_ARM_THM_JUMP19
:
7149 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7150 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7151 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7152 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7153 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7161 // Arm_output_data_got methods.
7163 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7164 // The first one is initialized to be 1, which is the module index for
7165 // the main executable and the second one 0. A reloc of the type
7166 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7167 // be applied by gold. GSYM is a global symbol.
7169 template<bool big_endian
>
7171 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7172 unsigned int got_type
,
7175 if (gsym
->has_got_offset(got_type
))
7178 // We are doing a static link. Just mark it as belong to module 1,
7180 unsigned int got_offset
= this->add_constant(1);
7181 gsym
->set_got_offset(got_type
, got_offset
);
7182 got_offset
= this->add_constant(0);
7183 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7184 elfcpp::R_ARM_TLS_DTPOFF32
,
7188 // Same as the above but for a local symbol.
7190 template<bool big_endian
>
7192 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7193 unsigned int got_type
,
7194 Sized_relobj_file
<32, big_endian
>* object
,
7197 if (object
->local_has_got_offset(index
, got_type
))
7200 // We are doing a static link. Just mark it as belong to module 1,
7202 unsigned int got_offset
= this->add_constant(1);
7203 object
->set_local_got_offset(index
, got_type
, got_offset
);
7204 got_offset
= this->add_constant(0);
7205 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7206 elfcpp::R_ARM_TLS_DTPOFF32
,
7210 template<bool big_endian
>
7212 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7214 // Call parent to write out GOT.
7215 Output_data_got
<32, big_endian
>::do_write(of
);
7217 // We are done if there is no fix up.
7218 if (this->static_relocs_
.empty())
7221 gold_assert(parameters
->doing_static_link());
7223 const off_t offset
= this->offset();
7224 const section_size_type oview_size
=
7225 convert_to_section_size_type(this->data_size());
7226 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7228 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7229 gold_assert(tls_segment
!= NULL
);
7231 // The thread pointer $tp points to the TCB, which is followed by the
7232 // TLS. So we need to adjust $tp relative addressing by this amount.
7233 Arm_address aligned_tcb_size
=
7234 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7236 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7238 Static_reloc
& reloc(this->static_relocs_
[i
]);
7241 if (!reloc
.symbol_is_global())
7243 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7244 const Symbol_value
<32>* psymval
=
7245 reloc
.relobj()->local_symbol(reloc
.index());
7247 // We are doing static linking. Issue an error and skip this
7248 // relocation if the symbol is undefined or in a discarded_section.
7250 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7251 if ((shndx
== elfcpp::SHN_UNDEF
)
7253 && shndx
!= elfcpp::SHN_UNDEF
7254 && !object
->is_section_included(shndx
)
7255 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7257 gold_error(_("undefined or discarded local symbol %u from "
7258 " object %s in GOT"),
7259 reloc
.index(), reloc
.relobj()->name().c_str());
7263 value
= psymval
->value(object
, 0);
7267 const Symbol
* gsym
= reloc
.symbol();
7268 gold_assert(gsym
!= NULL
);
7269 if (gsym
->is_forwarder())
7270 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7272 // We are doing static linking. Issue an error and skip this
7273 // relocation if the symbol is undefined or in a discarded_section
7274 // unless it is a weakly_undefined symbol.
7275 if ((gsym
->is_defined_in_discarded_section()
7276 || gsym
->is_undefined())
7277 && !gsym
->is_weak_undefined())
7279 gold_error(_("undefined or discarded symbol %s in GOT"),
7284 if (!gsym
->is_weak_undefined())
7286 const Sized_symbol
<32>* sym
=
7287 static_cast<const Sized_symbol
<32>*>(gsym
);
7288 value
= sym
->value();
7294 unsigned got_offset
= reloc
.got_offset();
7295 gold_assert(got_offset
< oview_size
);
7297 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7298 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7300 switch (reloc
.r_type())
7302 case elfcpp::R_ARM_TLS_DTPOFF32
:
7305 case elfcpp::R_ARM_TLS_TPOFF32
:
7306 x
= value
+ aligned_tcb_size
;
7311 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7314 of
->write_output_view(offset
, oview_size
, oview
);
7317 // A class to handle the PLT data.
7318 // This is an abstract base class that handles most of the linker details
7319 // but does not know the actual contents of PLT entries. The derived
7320 // classes below fill in those details.
7322 template<bool big_endian
>
7323 class Output_data_plt_arm
: public Output_section_data
7326 // Unlike aarch64, which records symbol value in "addend" field of relocations
7327 // and could be done at the same time an IRelative reloc is created for the
7328 // symbol, arm puts the symbol value into "GOT" table, which, however, is
7329 // issued later in Output_data_plt_arm::do_write(). So we have a struct here
7330 // to keep necessary symbol information for later use in do_write. We usually
7331 // have only a very limited number of ifuncs, so the extra data required here
7334 struct IRelative_data
7336 IRelative_data(Sized_symbol
<32>* sized_symbol
)
7337 : symbol_is_global_(true)
7339 u_
.global
= sized_symbol
;
7342 IRelative_data(Sized_relobj_file
<32, big_endian
>* relobj
,
7344 : symbol_is_global_(false)
7346 u_
.local
.relobj
= relobj
;
7347 u_
.local
.index
= index
;
7352 Sized_symbol
<32>* global
;
7356 Sized_relobj_file
<32, big_endian
>* relobj
;
7361 bool symbol_is_global_
;
7364 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7367 Output_data_plt_arm(Layout
* layout
, uint64_t addralign
,
7368 Arm_output_data_got
<big_endian
>* got
,
7369 Output_data_space
* got_plt
,
7370 Output_data_space
* got_irelative
);
7372 // Add an entry to the PLT.
7374 add_entry(Symbol_table
* symtab
, Layout
* layout
, Symbol
* gsym
);
7376 // Add the relocation for a plt entry.
7378 add_relocation(Symbol_table
* symtab
, Layout
* layout
,
7379 Symbol
* gsym
, unsigned int got_offset
);
7381 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.
7383 add_local_ifunc_entry(Symbol_table
* symtab
, Layout
*,
7384 Sized_relobj_file
<32, big_endian
>* relobj
,
7385 unsigned int local_sym_index
);
7387 // Return the .rel.plt section data.
7388 const Reloc_section
*
7390 { return this->rel_
; }
7392 // Return the PLT relocation container for IRELATIVE.
7394 rel_irelative(Symbol_table
*, Layout
*);
7396 // Return the number of PLT entries.
7399 { return this->count_
+ this->irelative_count_
; }
7401 // Return the offset of the first non-reserved PLT entry.
7403 first_plt_entry_offset() const
7404 { return this->do_first_plt_entry_offset(); }
7406 // Return the size of a PLT entry.
7408 get_plt_entry_size() const
7409 { return this->do_get_plt_entry_size(); }
7411 // Return the PLT address for globals.
7413 address_for_global(const Symbol
*) const;
7415 // Return the PLT address for locals.
7417 address_for_local(const Relobj
*, unsigned int symndx
) const;
7420 // Fill in the first PLT entry.
7422 fill_first_plt_entry(unsigned char* pov
,
7423 Arm_address got_address
,
7424 Arm_address plt_address
)
7425 { this->do_fill_first_plt_entry(pov
, got_address
, plt_address
); }
7428 fill_plt_entry(unsigned char* pov
,
7429 Arm_address got_address
,
7430 Arm_address plt_address
,
7431 unsigned int got_offset
,
7432 unsigned int plt_offset
)
7433 { do_fill_plt_entry(pov
, got_address
, plt_address
, got_offset
, plt_offset
); }
7435 virtual unsigned int
7436 do_first_plt_entry_offset() const = 0;
7438 virtual unsigned int
7439 do_get_plt_entry_size() const = 0;
7442 do_fill_first_plt_entry(unsigned char* pov
,
7443 Arm_address got_address
,
7444 Arm_address plt_address
) = 0;
7447 do_fill_plt_entry(unsigned char* pov
,
7448 Arm_address got_address
,
7449 Arm_address plt_address
,
7450 unsigned int got_offset
,
7451 unsigned int plt_offset
) = 0;
7454 do_adjust_output_section(Output_section
* os
);
7456 // Write to a map file.
7458 do_print_to_mapfile(Mapfile
* mapfile
) const
7459 { mapfile
->print_output_data(this, _("** PLT")); }
7462 // Set the final size.
7464 set_final_data_size()
7466 this->set_data_size(this->first_plt_entry_offset()
7467 + ((this->count_
+ this->irelative_count_
)
7468 * this->get_plt_entry_size()));
7471 // Write out the PLT data.
7473 do_write(Output_file
*);
7475 // Record irelative symbol data.
7476 void insert_irelative_data(const IRelative_data
& idata
)
7477 { irelative_data_vec_
.push_back(idata
); }
7479 // The reloc section.
7480 Reloc_section
* rel_
;
7481 // The IRELATIVE relocs, if necessary. These must follow the
7482 // regular PLT relocations.
7483 Reloc_section
* irelative_rel_
;
7484 // The .got section.
7485 Arm_output_data_got
<big_endian
>* got_
;
7486 // The .got.plt section.
7487 Output_data_space
* got_plt_
;
7488 // The part of the .got.plt section used for IRELATIVE relocs.
7489 Output_data_space
* got_irelative_
;
7490 // The number of PLT entries.
7491 unsigned int count_
;
7492 // Number of PLT entries with R_ARM_IRELATIVE relocs. These
7493 // follow the regular PLT entries.
7494 unsigned int irelative_count_
;
7495 // Vector for irelative data.
7496 typedef std::vector
<IRelative_data
> IRelative_data_vec
;
7497 IRelative_data_vec irelative_data_vec_
;
7500 // Create the PLT section. The ordinary .got section is an argument,
7501 // since we need to refer to the start. We also create our own .got
7502 // section just for PLT entries.
7504 template<bool big_endian
>
7505 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(
7506 Layout
* layout
, uint64_t addralign
,
7507 Arm_output_data_got
<big_endian
>* got
,
7508 Output_data_space
* got_plt
,
7509 Output_data_space
* got_irelative
)
7510 : Output_section_data(addralign
), irelative_rel_(NULL
),
7511 got_(got
), got_plt_(got_plt
), got_irelative_(got_irelative
),
7512 count_(0), irelative_count_(0)
7514 this->rel_
= new Reloc_section(false);
7515 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7516 elfcpp::SHF_ALLOC
, this->rel_
,
7517 ORDER_DYNAMIC_PLT_RELOCS
, false);
7520 template<bool big_endian
>
7522 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7527 // Add an entry to the PLT.
7529 template<bool big_endian
>
7531 Output_data_plt_arm
<big_endian
>::add_entry(Symbol_table
* symtab
,
7535 gold_assert(!gsym
->has_plt_offset());
7537 unsigned int* entry_count
;
7538 Output_section_data_build
* got
;
7540 // We have 2 different types of plt entry here, normal and ifunc.
7542 // For normal plt, the offset begins with first_plt_entry_offset(20), and the
7543 // 1st entry offset would be 20, the second 32, third 44 ... etc.
7545 // For ifunc plt, the offset begins with 0. So the first offset would 0,
7546 // second 12, third 24 ... etc.
7548 // IFunc plt entries *always* come after *normal* plt entries.
7550 // Notice, when computing the plt address of a certain symbol, "plt_address +
7551 // plt_offset" is no longer correct. Use target->plt_address_for_global() or
7552 // target->plt_address_for_local() instead.
7554 int begin_offset
= 0;
7555 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7556 && gsym
->can_use_relative_reloc(false))
7558 entry_count
= &this->irelative_count_
;
7559 got
= this->got_irelative_
;
7560 // For irelative plt entries, offset is relative to the end of normal plt
7561 // entries, so it starts from 0.
7563 // Record symbol information.
7564 this->insert_irelative_data(
7565 IRelative_data(symtab
->get_sized_symbol
<32>(gsym
)));
7569 entry_count
= &this->count_
;
7570 got
= this->got_plt_
;
7571 // Note that for normal plt entries, when setting the PLT offset we skip
7572 // the initial reserved PLT entry.
7573 begin_offset
= this->first_plt_entry_offset();
7576 gsym
->set_plt_offset(begin_offset
7577 + (*entry_count
) * this->get_plt_entry_size());
7581 section_offset_type got_offset
= got
->current_data_size();
7583 // Every PLT entry needs a GOT entry which points back to the PLT
7584 // entry (this will be changed by the dynamic linker, normally
7585 // lazily when the function is called).
7586 got
->set_current_data_size(got_offset
+ 4);
7588 // Every PLT entry needs a reloc.
7589 this->add_relocation(symtab
, layout
, gsym
, got_offset
);
7591 // Note that we don't need to save the symbol. The contents of the
7592 // PLT are independent of which symbols are used. The symbols only
7593 // appear in the relocations.
7596 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return
7599 template<bool big_endian
>
7601 Output_data_plt_arm
<big_endian
>::add_local_ifunc_entry(
7602 Symbol_table
* symtab
,
7604 Sized_relobj_file
<32, big_endian
>* relobj
,
7605 unsigned int local_sym_index
)
7607 this->insert_irelative_data(IRelative_data(relobj
, local_sym_index
));
7609 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is
7610 // no longer correct. Use target->plt_address_for_local() instead.
7611 unsigned int plt_offset
= this->irelative_count_
* this->get_plt_entry_size();
7612 ++this->irelative_count_
;
7614 section_offset_type got_offset
= this->got_irelative_
->current_data_size();
7616 // Every PLT entry needs a GOT entry which points back to the PLT
7618 this->got_irelative_
->set_current_data_size(got_offset
+ 4);
7621 // Every PLT entry needs a reloc.
7622 Reloc_section
* rel
= this->rel_irelative(symtab
, layout
);
7623 rel
->add_symbolless_local_addend(relobj
, local_sym_index
,
7624 elfcpp::R_ARM_IRELATIVE
,
7625 this->got_irelative_
, got_offset
);
7630 // Add the relocation for a PLT entry.
7632 template<bool big_endian
>
7634 Output_data_plt_arm
<big_endian
>::add_relocation(
7635 Symbol_table
* symtab
, Layout
* layout
, Symbol
* gsym
, unsigned int got_offset
)
7637 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7638 && gsym
->can_use_relative_reloc(false))
7640 Reloc_section
* rel
= this->rel_irelative(symtab
, layout
);
7641 rel
->add_symbolless_global_addend(gsym
, elfcpp::R_ARM_IRELATIVE
,
7642 this->got_irelative_
, got_offset
);
7646 gsym
->set_needs_dynsym_entry();
7647 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7653 // Create the irelative relocation data.
7655 template<bool big_endian
>
7656 typename Output_data_plt_arm
<big_endian
>::Reloc_section
*
7657 Output_data_plt_arm
<big_endian
>::rel_irelative(Symbol_table
* symtab
,
7660 if (this->irelative_rel_
== NULL
)
7662 // Since irelative relocations goes into 'rel.dyn', we delegate the
7663 // creation of irelative_rel_ to where rel_dyn section gets created.
7664 Target_arm
<big_endian
>* arm_target
=
7665 Target_arm
<big_endian
>::default_target();
7666 this->irelative_rel_
= arm_target
->rel_irelative_section(layout
);
7668 // Make sure we have a place for the TLSDESC relocations, in
7669 // case we see any later on.
7670 // this->rel_tlsdesc(layout);
7671 if (parameters
->doing_static_link())
7673 // A statically linked executable will only have a .rel.plt section to
7674 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library
7675 // will use these symbols to locate the IRELATIVE relocs at program
7677 symtab
->define_in_output_data("__rel_iplt_start", NULL
,
7678 Symbol_table::PREDEFINED
,
7679 this->irelative_rel_
, 0, 0,
7680 elfcpp::STT_NOTYPE
, elfcpp::STB_GLOBAL
,
7681 elfcpp::STV_HIDDEN
, 0, false, true);
7682 symtab
->define_in_output_data("__rel_iplt_end", NULL
,
7683 Symbol_table::PREDEFINED
,
7684 this->irelative_rel_
, 0, 0,
7685 elfcpp::STT_NOTYPE
, elfcpp::STB_GLOBAL
,
7686 elfcpp::STV_HIDDEN
, 0, true, true);
7689 return this->irelative_rel_
;
7693 // Return the PLT address for a global symbol.
7695 template<bool big_endian
>
7697 Output_data_plt_arm
<big_endian
>::address_for_global(const Symbol
* gsym
) const
7699 uint64_t begin_offset
= 0;
7700 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
7701 && gsym
->can_use_relative_reloc(false))
7703 begin_offset
= (this->first_plt_entry_offset() +
7704 this->count_
* this->get_plt_entry_size());
7706 return this->address() + begin_offset
+ gsym
->plt_offset();
7710 // Return the PLT address for a local symbol. These are always
7711 // IRELATIVE relocs.
7713 template<bool big_endian
>
7715 Output_data_plt_arm
<big_endian
>::address_for_local(
7716 const Relobj
* object
,
7717 unsigned int r_sym
) const
7719 return (this->address()
7720 + this->first_plt_entry_offset()
7721 + this->count_
* this->get_plt_entry_size()
7722 + object
->local_plt_offset(r_sym
));
7726 template<bool big_endian
>
7727 class Output_data_plt_arm_standard
: public Output_data_plt_arm
<big_endian
>
7730 Output_data_plt_arm_standard(Layout
* layout
,
7731 Arm_output_data_got
<big_endian
>* got
,
7732 Output_data_space
* got_plt
,
7733 Output_data_space
* got_irelative
)
7734 : Output_data_plt_arm
<big_endian
>(layout
, 4, got
, got_plt
, got_irelative
)
7738 // Return the offset of the first non-reserved PLT entry.
7739 virtual unsigned int
7740 do_first_plt_entry_offset() const
7741 { return sizeof(first_plt_entry
); }
7744 do_fill_first_plt_entry(unsigned char* pov
,
7745 Arm_address got_address
,
7746 Arm_address plt_address
);
7749 // Template for the first PLT entry.
7750 static const uint32_t first_plt_entry
[5];
7754 // FIXME: This is not very flexible. Right now this has only been tested
7755 // on armv5te. If we are to support additional architecture features like
7756 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7758 // The first entry in the PLT.
7759 template<bool big_endian
>
7760 const uint32_t Output_data_plt_arm_standard
<big_endian
>::first_plt_entry
[5] =
7762 0xe52de004, // str lr, [sp, #-4]!
7763 0xe59fe004, // ldr lr, [pc, #4]
7764 0xe08fe00e, // add lr, pc, lr
7765 0xe5bef008, // ldr pc, [lr, #8]!
7766 0x00000000, // &GOT[0] - .
7769 template<bool big_endian
>
7771 Output_data_plt_arm_standard
<big_endian
>::do_fill_first_plt_entry(
7773 Arm_address got_address
,
7774 Arm_address plt_address
)
7776 // Write first PLT entry. All but the last word are constants.
7777 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7778 / sizeof(first_plt_entry
[0]));
7779 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7780 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
7781 // Last word in first PLT entry is &GOT[0] - .
7782 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7783 got_address
- (plt_address
+ 16));
7786 // Subsequent entries in the PLT.
7787 // This class generates short (12-byte) entries, for displacements up to 2^28.
7789 template<bool big_endian
>
7790 class Output_data_plt_arm_short
: public Output_data_plt_arm_standard
<big_endian
>
7793 Output_data_plt_arm_short(Layout
* layout
,
7794 Arm_output_data_got
<big_endian
>* got
,
7795 Output_data_space
* got_plt
,
7796 Output_data_space
* got_irelative
)
7797 : Output_data_plt_arm_standard
<big_endian
>(layout
, got
, got_plt
, got_irelative
)
7801 // Return the size of a PLT entry.
7802 virtual unsigned int
7803 do_get_plt_entry_size() const
7804 { return sizeof(plt_entry
); }
7807 do_fill_plt_entry(unsigned char* pov
,
7808 Arm_address got_address
,
7809 Arm_address plt_address
,
7810 unsigned int got_offset
,
7811 unsigned int plt_offset
);
7814 // Template for subsequent PLT entries.
7815 static const uint32_t plt_entry
[3];
7818 template<bool big_endian
>
7819 const uint32_t Output_data_plt_arm_short
<big_endian
>::plt_entry
[3] =
7821 0xe28fc600, // add ip, pc, #0xNN00000
7822 0xe28cca00, // add ip, ip, #0xNN000
7823 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7826 template<bool big_endian
>
7828 Output_data_plt_arm_short
<big_endian
>::do_fill_plt_entry(
7830 Arm_address got_address
,
7831 Arm_address plt_address
,
7832 unsigned int got_offset
,
7833 unsigned int plt_offset
)
7835 int32_t offset
= ((got_address
+ got_offset
)
7836 - (plt_address
+ plt_offset
+ 8));
7837 if (offset
< 0 || offset
> 0x0fffffff)
7838 gold_error(_("PLT offset too large, try linking with --long-plt"));
7840 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7841 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7842 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7843 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7844 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7845 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7848 // This class generates long (16-byte) entries, for arbitrary displacements.
7850 template<bool big_endian
>
7851 class Output_data_plt_arm_long
: public Output_data_plt_arm_standard
<big_endian
>
7854 Output_data_plt_arm_long(Layout
* layout
,
7855 Arm_output_data_got
<big_endian
>* got
,
7856 Output_data_space
* got_plt
,
7857 Output_data_space
* got_irelative
)
7858 : Output_data_plt_arm_standard
<big_endian
>(layout
, got
, got_plt
, got_irelative
)
7862 // Return the size of a PLT entry.
7863 virtual unsigned int
7864 do_get_plt_entry_size() const
7865 { return sizeof(plt_entry
); }
7868 do_fill_plt_entry(unsigned char* pov
,
7869 Arm_address got_address
,
7870 Arm_address plt_address
,
7871 unsigned int got_offset
,
7872 unsigned int plt_offset
);
7875 // Template for subsequent PLT entries.
7876 static const uint32_t plt_entry
[4];
7879 template<bool big_endian
>
7880 const uint32_t Output_data_plt_arm_long
<big_endian
>::plt_entry
[4] =
7882 0xe28fc200, // add ip, pc, #0xN0000000
7883 0xe28cc600, // add ip, ip, #0xNN00000
7884 0xe28cca00, // add ip, ip, #0xNN000
7885 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7888 template<bool big_endian
>
7890 Output_data_plt_arm_long
<big_endian
>::do_fill_plt_entry(
7892 Arm_address got_address
,
7893 Arm_address plt_address
,
7894 unsigned int got_offset
,
7895 unsigned int plt_offset
)
7897 int32_t offset
= ((got_address
+ got_offset
)
7898 - (plt_address
+ plt_offset
+ 8));
7900 uint32_t plt_insn0
= plt_entry
[0] | (offset
>> 28);
7901 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7902 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 20) & 0xff);
7903 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7904 uint32_t plt_insn2
= plt_entry
[2] | ((offset
>> 12) & 0xff);
7905 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7906 uint32_t plt_insn3
= plt_entry
[3] | (offset
& 0xfff);
7907 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 12, plt_insn3
);
7910 // Write out the PLT. This uses the hand-coded instructions above,
7911 // and adjusts them as needed. This is all specified by the arm ELF
7912 // Processor Supplement.
7914 template<bool big_endian
>
7916 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
7918 const off_t offset
= this->offset();
7919 const section_size_type oview_size
=
7920 convert_to_section_size_type(this->data_size());
7921 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7923 const off_t got_file_offset
= this->got_plt_
->offset();
7924 gold_assert(got_file_offset
+ this->got_plt_
->data_size()
7925 == this->got_irelative_
->offset());
7926 const section_size_type got_size
=
7927 convert_to_section_size_type(this->got_plt_
->data_size()
7928 + this->got_irelative_
->data_size());
7929 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
7931 unsigned char* pov
= oview
;
7933 Arm_address plt_address
= this->address();
7934 Arm_address got_address
= this->got_plt_
->address();
7936 // Write first PLT entry.
7937 this->fill_first_plt_entry(pov
, got_address
, plt_address
);
7938 pov
+= this->first_plt_entry_offset();
7940 unsigned char* got_pov
= got_view
;
7942 memset(got_pov
, 0, 12);
7945 unsigned int plt_offset
= this->first_plt_entry_offset();
7946 unsigned int got_offset
= 12;
7947 const unsigned int count
= this->count_
+ this->irelative_count_
;
7948 gold_assert(this->irelative_count_
== this->irelative_data_vec_
.size());
7949 for (unsigned int i
= 0;
7952 pov
+= this->get_plt_entry_size(),
7954 plt_offset
+= this->get_plt_entry_size(),
7957 // Set and adjust the PLT entry itself.
7958 this->fill_plt_entry(pov
, got_address
, plt_address
,
7959 got_offset
, plt_offset
);
7962 if (i
< this->count_
)
7964 // For non-irelative got entries, the value is the beginning of plt.
7965 value
= plt_address
;
7969 // For irelative got entries, the value is the (global/local) symbol
7971 const IRelative_data
& idata
=
7972 this->irelative_data_vec_
[i
- this->count_
];
7973 if (idata
.symbol_is_global_
)
7975 // Set the entry in the GOT for irelative symbols. The content is
7976 // the address of the ifunc, not the address of plt start.
7977 const Sized_symbol
<32>* sized_symbol
= idata
.u_
.global
;
7978 gold_assert(sized_symbol
->type() == elfcpp::STT_GNU_IFUNC
);
7979 value
= sized_symbol
->value();
7983 value
= idata
.u_
.local
.relobj
->local_symbol_value(
7984 idata
.u_
.local
.index
, 0);
7987 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, value
);
7990 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
7991 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
7993 of
->write_output_view(offset
, oview_size
, oview
);
7994 of
->write_output_view(got_file_offset
, got_size
, got_view
);
7998 // Create a PLT entry for a global symbol.
8000 template<bool big_endian
>
8002 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
8005 if (gsym
->has_plt_offset())
8008 if (this->plt_
== NULL
)
8009 this->make_plt_section(symtab
, layout
);
8011 this->plt_
->add_entry(symtab
, layout
, gsym
);
8015 // Create the PLT section.
8016 template<bool big_endian
>
8018 Target_arm
<big_endian
>::make_plt_section(
8019 Symbol_table
* symtab
, Layout
* layout
)
8021 if (this->plt_
== NULL
)
8023 // Create the GOT section first.
8024 this->got_section(symtab
, layout
);
8026 // GOT for irelatives is create along with got.plt.
8027 gold_assert(this->got_
!= NULL
8028 && this->got_plt_
!= NULL
8029 && this->got_irelative_
!= NULL
);
8030 this->plt_
= this->make_data_plt(layout
, this->got_
, this->got_plt_
,
8031 this->got_irelative_
);
8033 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
8035 | elfcpp::SHF_EXECINSTR
),
8036 this->plt_
, ORDER_PLT
, false);
8037 symtab
->define_in_output_data("$a", NULL
,
8038 Symbol_table::PREDEFINED
,
8040 0, 0, elfcpp::STT_NOTYPE
,
8042 elfcpp::STV_DEFAULT
, 0,
8048 // Make a PLT entry for a local STT_GNU_IFUNC symbol.
8050 template<bool big_endian
>
8052 Target_arm
<big_endian
>::make_local_ifunc_plt_entry(
8053 Symbol_table
* symtab
, Layout
* layout
,
8054 Sized_relobj_file
<32, big_endian
>* relobj
,
8055 unsigned int local_sym_index
)
8057 if (relobj
->local_has_plt_offset(local_sym_index
))
8059 if (this->plt_
== NULL
)
8060 this->make_plt_section(symtab
, layout
);
8061 unsigned int plt_offset
= this->plt_
->add_local_ifunc_entry(symtab
, layout
,
8064 relobj
->set_local_plt_offset(local_sym_index
, plt_offset
);
8068 // Return the number of entries in the PLT.
8070 template<bool big_endian
>
8072 Target_arm
<big_endian
>::plt_entry_count() const
8074 if (this->plt_
== NULL
)
8076 return this->plt_
->entry_count();
8079 // Return the offset of the first non-reserved PLT entry.
8081 template<bool big_endian
>
8083 Target_arm
<big_endian
>::first_plt_entry_offset() const
8085 return this->plt_
->first_plt_entry_offset();
8088 // Return the size of each PLT entry.
8090 template<bool big_endian
>
8092 Target_arm
<big_endian
>::plt_entry_size() const
8094 return this->plt_
->get_plt_entry_size();
8097 // Get the section to use for TLS_DESC relocations.
8099 template<bool big_endian
>
8100 typename Target_arm
<big_endian
>::Reloc_section
*
8101 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
8103 return this->plt_section()->rel_tls_desc(layout
);
8106 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
8108 template<bool big_endian
>
8110 Target_arm
<big_endian
>::define_tls_base_symbol(
8111 Symbol_table
* symtab
,
8114 if (this->tls_base_symbol_defined_
)
8117 Output_segment
* tls_segment
= layout
->tls_segment();
8118 if (tls_segment
!= NULL
)
8120 bool is_exec
= parameters
->options().output_is_executable();
8121 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
8122 Symbol_table::PREDEFINED
,
8126 elfcpp::STV_HIDDEN
, 0,
8128 ? Symbol::SEGMENT_END
8129 : Symbol::SEGMENT_START
),
8132 this->tls_base_symbol_defined_
= true;
8135 // Create a GOT entry for the TLS module index.
8137 template<bool big_endian
>
8139 Target_arm
<big_endian
>::got_mod_index_entry(
8140 Symbol_table
* symtab
,
8142 Sized_relobj_file
<32, big_endian
>* object
)
8144 if (this->got_mod_index_offset_
== -1U)
8146 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
8147 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
8148 unsigned int got_offset
;
8149 if (!parameters
->doing_static_link())
8151 got_offset
= got
->add_constant(0);
8152 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
8153 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
8158 // We are doing a static link. Just mark it as belong to module 1,
8160 got_offset
= got
->add_constant(1);
8163 got
->add_constant(0);
8164 this->got_mod_index_offset_
= got_offset
;
8166 return this->got_mod_index_offset_
;
8169 // Optimize the TLS relocation type based on what we know about the
8170 // symbol. IS_FINAL is true if the final address of this symbol is
8171 // known at link time.
8173 template<bool big_endian
>
8174 tls::Tls_optimization
8175 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
8177 // FIXME: Currently we do not do any TLS optimization.
8178 return tls::TLSOPT_NONE
;
8181 // Get the Reference_flags for a particular relocation.
8183 template<bool big_endian
>
8185 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
8189 case elfcpp::R_ARM_NONE
:
8190 case elfcpp::R_ARM_V4BX
:
8191 case elfcpp::R_ARM_GNU_VTENTRY
:
8192 case elfcpp::R_ARM_GNU_VTINHERIT
:
8193 // No symbol reference.
8196 case elfcpp::R_ARM_ABS32
:
8197 case elfcpp::R_ARM_ABS16
:
8198 case elfcpp::R_ARM_ABS12
:
8199 case elfcpp::R_ARM_THM_ABS5
:
8200 case elfcpp::R_ARM_ABS8
:
8201 case elfcpp::R_ARM_BASE_ABS
:
8202 case elfcpp::R_ARM_MOVW_ABS_NC
:
8203 case elfcpp::R_ARM_MOVT_ABS
:
8204 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8205 case elfcpp::R_ARM_THM_MOVT_ABS
:
8206 case elfcpp::R_ARM_ABS32_NOI
:
8207 return Symbol::ABSOLUTE_REF
;
8209 case elfcpp::R_ARM_REL32
:
8210 case elfcpp::R_ARM_LDR_PC_G0
:
8211 case elfcpp::R_ARM_SBREL32
:
8212 case elfcpp::R_ARM_THM_PC8
:
8213 case elfcpp::R_ARM_BASE_PREL
:
8214 case elfcpp::R_ARM_MOVW_PREL_NC
:
8215 case elfcpp::R_ARM_MOVT_PREL
:
8216 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8217 case elfcpp::R_ARM_THM_MOVT_PREL
:
8218 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8219 case elfcpp::R_ARM_THM_PC12
:
8220 case elfcpp::R_ARM_REL32_NOI
:
8221 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8222 case elfcpp::R_ARM_ALU_PC_G0
:
8223 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8224 case elfcpp::R_ARM_ALU_PC_G1
:
8225 case elfcpp::R_ARM_ALU_PC_G2
:
8226 case elfcpp::R_ARM_LDR_PC_G1
:
8227 case elfcpp::R_ARM_LDR_PC_G2
:
8228 case elfcpp::R_ARM_LDRS_PC_G0
:
8229 case elfcpp::R_ARM_LDRS_PC_G1
:
8230 case elfcpp::R_ARM_LDRS_PC_G2
:
8231 case elfcpp::R_ARM_LDC_PC_G0
:
8232 case elfcpp::R_ARM_LDC_PC_G1
:
8233 case elfcpp::R_ARM_LDC_PC_G2
:
8234 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8235 case elfcpp::R_ARM_ALU_SB_G0
:
8236 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8237 case elfcpp::R_ARM_ALU_SB_G1
:
8238 case elfcpp::R_ARM_ALU_SB_G2
:
8239 case elfcpp::R_ARM_LDR_SB_G0
:
8240 case elfcpp::R_ARM_LDR_SB_G1
:
8241 case elfcpp::R_ARM_LDR_SB_G2
:
8242 case elfcpp::R_ARM_LDRS_SB_G0
:
8243 case elfcpp::R_ARM_LDRS_SB_G1
:
8244 case elfcpp::R_ARM_LDRS_SB_G2
:
8245 case elfcpp::R_ARM_LDC_SB_G0
:
8246 case elfcpp::R_ARM_LDC_SB_G1
:
8247 case elfcpp::R_ARM_LDC_SB_G2
:
8248 case elfcpp::R_ARM_MOVW_BREL_NC
:
8249 case elfcpp::R_ARM_MOVT_BREL
:
8250 case elfcpp::R_ARM_MOVW_BREL
:
8251 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8252 case elfcpp::R_ARM_THM_MOVT_BREL
:
8253 case elfcpp::R_ARM_THM_MOVW_BREL
:
8254 case elfcpp::R_ARM_GOTOFF32
:
8255 case elfcpp::R_ARM_GOTOFF12
:
8256 case elfcpp::R_ARM_SBREL31
:
8257 return Symbol::RELATIVE_REF
;
8259 case elfcpp::R_ARM_PLT32
:
8260 case elfcpp::R_ARM_CALL
:
8261 case elfcpp::R_ARM_JUMP24
:
8262 case elfcpp::R_ARM_THM_CALL
:
8263 case elfcpp::R_ARM_THM_JUMP24
:
8264 case elfcpp::R_ARM_THM_JUMP19
:
8265 case elfcpp::R_ARM_THM_JUMP6
:
8266 case elfcpp::R_ARM_THM_JUMP11
:
8267 case elfcpp::R_ARM_THM_JUMP8
:
8268 // R_ARM_PREL31 is not used to relocate call/jump instructions but
8269 // in unwind tables. It may point to functions via PLTs.
8270 // So we treat it like call/jump relocations above.
8271 case elfcpp::R_ARM_PREL31
:
8272 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
8274 case elfcpp::R_ARM_GOT_BREL
:
8275 case elfcpp::R_ARM_GOT_ABS
:
8276 case elfcpp::R_ARM_GOT_PREL
:
8278 return Symbol::ABSOLUTE_REF
;
8280 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8281 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8282 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8283 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8284 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8285 return Symbol::TLS_REF
;
8287 case elfcpp::R_ARM_TARGET1
:
8288 case elfcpp::R_ARM_TARGET2
:
8289 case elfcpp::R_ARM_COPY
:
8290 case elfcpp::R_ARM_GLOB_DAT
:
8291 case elfcpp::R_ARM_JUMP_SLOT
:
8292 case elfcpp::R_ARM_RELATIVE
:
8293 case elfcpp::R_ARM_PC24
:
8294 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8295 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8296 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8298 // Not expected. We will give an error later.
8303 // Report an unsupported relocation against a local symbol.
8305 template<bool big_endian
>
8307 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
8308 Sized_relobj_file
<32, big_endian
>* object
,
8309 unsigned int r_type
)
8311 gold_error(_("%s: unsupported reloc %u against local symbol"),
8312 object
->name().c_str(), r_type
);
8315 // We are about to emit a dynamic relocation of type R_TYPE. If the
8316 // dynamic linker does not support it, issue an error. The GNU linker
8317 // only issues a non-PIC error for an allocated read-only section.
8318 // Here we know the section is allocated, but we don't know that it is
8319 // read-only. But we check for all the relocation types which the
8320 // glibc dynamic linker supports, so it seems appropriate to issue an
8321 // error even if the section is not read-only.
8323 template<bool big_endian
>
8325 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
8326 unsigned int r_type
)
8330 // These are the relocation types supported by glibc for ARM.
8331 case elfcpp::R_ARM_RELATIVE
:
8332 case elfcpp::R_ARM_COPY
:
8333 case elfcpp::R_ARM_GLOB_DAT
:
8334 case elfcpp::R_ARM_JUMP_SLOT
:
8335 case elfcpp::R_ARM_ABS32
:
8336 case elfcpp::R_ARM_ABS32_NOI
:
8337 case elfcpp::R_ARM_IRELATIVE
:
8338 case elfcpp::R_ARM_PC24
:
8339 // FIXME: The following 3 types are not supported by Android's dynamic
8341 case elfcpp::R_ARM_TLS_DTPMOD32
:
8342 case elfcpp::R_ARM_TLS_DTPOFF32
:
8343 case elfcpp::R_ARM_TLS_TPOFF32
:
8348 // This prevents us from issuing more than one error per reloc
8349 // section. But we can still wind up issuing more than one
8350 // error per object file.
8351 if (this->issued_non_pic_error_
)
8353 const Arm_reloc_property
* reloc_property
=
8354 arm_reloc_property_table
->get_reloc_property(r_type
);
8355 gold_assert(reloc_property
!= NULL
);
8356 object
->error(_("requires unsupported dynamic reloc %s; "
8357 "recompile with -fPIC"),
8358 reloc_property
->name().c_str());
8359 this->issued_non_pic_error_
= true;
8363 case elfcpp::R_ARM_NONE
:
8369 // Return whether we need to make a PLT entry for a relocation of the
8370 // given type against a STT_GNU_IFUNC symbol.
8372 template<bool big_endian
>
8374 Target_arm
<big_endian
>::Scan::reloc_needs_plt_for_ifunc(
8375 Sized_relobj_file
<32, big_endian
>* object
,
8376 unsigned int r_type
)
8378 int flags
= Scan::get_reference_flags(r_type
);
8379 if (flags
& Symbol::TLS_REF
)
8381 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"),
8382 object
->name().c_str(), r_type
);
8389 // Scan a relocation for a local symbol.
8390 // FIXME: This only handles a subset of relocation types used by Android
8391 // on ARM v5te devices.
8393 template<bool big_endian
>
8395 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
8398 Sized_relobj_file
<32, big_endian
>* object
,
8399 unsigned int data_shndx
,
8400 Output_section
* output_section
,
8401 const elfcpp::Rel
<32, big_endian
>& reloc
,
8402 unsigned int r_type
,
8403 const elfcpp::Sym
<32, big_endian
>& lsym
,
8409 r_type
= get_real_reloc_type(r_type
);
8411 // A local STT_GNU_IFUNC symbol may require a PLT entry.
8412 bool is_ifunc
= lsym
.get_st_type() == elfcpp::STT_GNU_IFUNC
;
8413 if (is_ifunc
&& this->reloc_needs_plt_for_ifunc(object
, r_type
))
8415 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8416 target
->make_local_ifunc_plt_entry(symtab
, layout
, object
, r_sym
);
8421 case elfcpp::R_ARM_NONE
:
8422 case elfcpp::R_ARM_V4BX
:
8423 case elfcpp::R_ARM_GNU_VTENTRY
:
8424 case elfcpp::R_ARM_GNU_VTINHERIT
:
8427 case elfcpp::R_ARM_ABS32
:
8428 case elfcpp::R_ARM_ABS32_NOI
:
8429 // If building a shared library (or a position-independent
8430 // executable), we need to create a dynamic relocation for
8431 // this location. The relocation applied at link time will
8432 // apply the link-time value, so we flag the location with
8433 // an R_ARM_RELATIVE relocation so the dynamic loader can
8434 // relocate it easily.
8435 if (parameters
->options().output_is_position_independent())
8437 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8438 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8439 // If we are to add more other reloc types than R_ARM_ABS32,
8440 // we need to add check_non_pic(object, r_type) here.
8441 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
8442 output_section
, data_shndx
,
8443 reloc
.get_r_offset(), is_ifunc
);
8447 case elfcpp::R_ARM_ABS16
:
8448 case elfcpp::R_ARM_ABS12
:
8449 case elfcpp::R_ARM_THM_ABS5
:
8450 case elfcpp::R_ARM_ABS8
:
8451 case elfcpp::R_ARM_BASE_ABS
:
8452 case elfcpp::R_ARM_MOVW_ABS_NC
:
8453 case elfcpp::R_ARM_MOVT_ABS
:
8454 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8455 case elfcpp::R_ARM_THM_MOVT_ABS
:
8456 // If building a shared library (or a position-independent
8457 // executable), we need to create a dynamic relocation for
8458 // this location. Because the addend needs to remain in the
8459 // data section, we need to be careful not to apply this
8460 // relocation statically.
8461 if (parameters
->options().output_is_position_independent())
8463 check_non_pic(object
, r_type
);
8464 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8465 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8466 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
8467 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
8468 data_shndx
, reloc
.get_r_offset());
8471 gold_assert(lsym
.get_st_value() == 0);
8472 unsigned int shndx
= lsym
.get_st_shndx();
8474 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
8477 object
->error(_("section symbol %u has bad shndx %u"),
8480 rel_dyn
->add_local_section(object
, shndx
,
8481 r_type
, output_section
,
8482 data_shndx
, reloc
.get_r_offset());
8487 case elfcpp::R_ARM_REL32
:
8488 case elfcpp::R_ARM_LDR_PC_G0
:
8489 case elfcpp::R_ARM_SBREL32
:
8490 case elfcpp::R_ARM_THM_CALL
:
8491 case elfcpp::R_ARM_THM_PC8
:
8492 case elfcpp::R_ARM_BASE_PREL
:
8493 case elfcpp::R_ARM_PLT32
:
8494 case elfcpp::R_ARM_CALL
:
8495 case elfcpp::R_ARM_JUMP24
:
8496 case elfcpp::R_ARM_THM_JUMP24
:
8497 case elfcpp::R_ARM_SBREL31
:
8498 case elfcpp::R_ARM_PREL31
:
8499 case elfcpp::R_ARM_MOVW_PREL_NC
:
8500 case elfcpp::R_ARM_MOVT_PREL
:
8501 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8502 case elfcpp::R_ARM_THM_MOVT_PREL
:
8503 case elfcpp::R_ARM_THM_JUMP19
:
8504 case elfcpp::R_ARM_THM_JUMP6
:
8505 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8506 case elfcpp::R_ARM_THM_PC12
:
8507 case elfcpp::R_ARM_REL32_NOI
:
8508 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8509 case elfcpp::R_ARM_ALU_PC_G0
:
8510 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8511 case elfcpp::R_ARM_ALU_PC_G1
:
8512 case elfcpp::R_ARM_ALU_PC_G2
:
8513 case elfcpp::R_ARM_LDR_PC_G1
:
8514 case elfcpp::R_ARM_LDR_PC_G2
:
8515 case elfcpp::R_ARM_LDRS_PC_G0
:
8516 case elfcpp::R_ARM_LDRS_PC_G1
:
8517 case elfcpp::R_ARM_LDRS_PC_G2
:
8518 case elfcpp::R_ARM_LDC_PC_G0
:
8519 case elfcpp::R_ARM_LDC_PC_G1
:
8520 case elfcpp::R_ARM_LDC_PC_G2
:
8521 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8522 case elfcpp::R_ARM_ALU_SB_G0
:
8523 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8524 case elfcpp::R_ARM_ALU_SB_G1
:
8525 case elfcpp::R_ARM_ALU_SB_G2
:
8526 case elfcpp::R_ARM_LDR_SB_G0
:
8527 case elfcpp::R_ARM_LDR_SB_G1
:
8528 case elfcpp::R_ARM_LDR_SB_G2
:
8529 case elfcpp::R_ARM_LDRS_SB_G0
:
8530 case elfcpp::R_ARM_LDRS_SB_G1
:
8531 case elfcpp::R_ARM_LDRS_SB_G2
:
8532 case elfcpp::R_ARM_LDC_SB_G0
:
8533 case elfcpp::R_ARM_LDC_SB_G1
:
8534 case elfcpp::R_ARM_LDC_SB_G2
:
8535 case elfcpp::R_ARM_MOVW_BREL_NC
:
8536 case elfcpp::R_ARM_MOVT_BREL
:
8537 case elfcpp::R_ARM_MOVW_BREL
:
8538 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8539 case elfcpp::R_ARM_THM_MOVT_BREL
:
8540 case elfcpp::R_ARM_THM_MOVW_BREL
:
8541 case elfcpp::R_ARM_THM_JUMP11
:
8542 case elfcpp::R_ARM_THM_JUMP8
:
8543 // We don't need to do anything for a relative addressing relocation
8544 // against a local symbol if it does not reference the GOT.
8547 case elfcpp::R_ARM_GOTOFF32
:
8548 case elfcpp::R_ARM_GOTOFF12
:
8549 // We need a GOT section:
8550 target
->got_section(symtab
, layout
);
8553 case elfcpp::R_ARM_GOT_BREL
:
8554 case elfcpp::R_ARM_GOT_PREL
:
8556 // The symbol requires a GOT entry.
8557 Arm_output_data_got
<big_endian
>* got
=
8558 target
->got_section(symtab
, layout
);
8559 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8560 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
8562 // If we are generating a shared object, we need to add a
8563 // dynamic RELATIVE relocation for this symbol's GOT entry.
8564 if (parameters
->options().output_is_position_independent())
8566 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8567 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8568 rel_dyn
->add_local_relative(
8569 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
8570 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
8576 case elfcpp::R_ARM_TARGET1
:
8577 case elfcpp::R_ARM_TARGET2
:
8578 // This should have been mapped to another type already.
8580 case elfcpp::R_ARM_COPY
:
8581 case elfcpp::R_ARM_GLOB_DAT
:
8582 case elfcpp::R_ARM_JUMP_SLOT
:
8583 case elfcpp::R_ARM_RELATIVE
:
8584 // These are relocations which should only be seen by the
8585 // dynamic linker, and should never be seen here.
8586 gold_error(_("%s: unexpected reloc %u in object file"),
8587 object
->name().c_str(), r_type
);
8591 // These are initial TLS relocs, which are expected when
8593 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8594 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8595 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8596 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8597 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8599 bool output_is_shared
= parameters
->options().shared();
8600 const tls::Tls_optimization optimized_type
8601 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
8605 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8606 if (optimized_type
== tls::TLSOPT_NONE
)
8608 // Create a pair of GOT entries for the module index and
8609 // dtv-relative offset.
8610 Arm_output_data_got
<big_endian
>* got
8611 = target
->got_section(symtab
, layout
);
8612 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8613 unsigned int shndx
= lsym
.get_st_shndx();
8615 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
8618 object
->error(_("local symbol %u has bad shndx %u"),
8623 if (!parameters
->doing_static_link())
8624 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
8626 target
->rel_dyn_section(layout
),
8627 elfcpp::R_ARM_TLS_DTPMOD32
);
8629 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
8633 // FIXME: TLS optimization not supported yet.
8637 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8638 if (optimized_type
== tls::TLSOPT_NONE
)
8640 // Create a GOT entry for the module index.
8641 target
->got_mod_index_entry(symtab
, layout
, object
);
8644 // FIXME: TLS optimization not supported yet.
8648 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8651 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8652 layout
->set_has_static_tls();
8653 if (optimized_type
== tls::TLSOPT_NONE
)
8655 // Create a GOT entry for the tp-relative offset.
8656 Arm_output_data_got
<big_endian
>* got
8657 = target
->got_section(symtab
, layout
);
8658 unsigned int r_sym
=
8659 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8660 if (!parameters
->doing_static_link())
8661 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
8662 target
->rel_dyn_section(layout
),
8663 elfcpp::R_ARM_TLS_TPOFF32
);
8664 else if (!object
->local_has_got_offset(r_sym
,
8665 GOT_TYPE_TLS_OFFSET
))
8667 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
8668 unsigned int got_offset
=
8669 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
8670 got
->add_static_reloc(got_offset
,
8671 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8676 // FIXME: TLS optimization not supported yet.
8680 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8681 layout
->set_has_static_tls();
8682 if (output_is_shared
)
8684 // We need to create a dynamic relocation.
8685 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8686 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8687 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8688 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8689 output_section
, data_shndx
,
8690 reloc
.get_r_offset());
8700 case elfcpp::R_ARM_PC24
:
8701 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8702 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8703 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8705 unsupported_reloc_local(object
, r_type
);
8710 // Report an unsupported relocation against a global symbol.
8712 template<bool big_endian
>
8714 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8715 Sized_relobj_file
<32, big_endian
>* object
,
8716 unsigned int r_type
,
8719 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8720 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8723 template<bool big_endian
>
8725 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8726 unsigned int r_type
)
8730 case elfcpp::R_ARM_PC24
:
8731 case elfcpp::R_ARM_THM_CALL
:
8732 case elfcpp::R_ARM_PLT32
:
8733 case elfcpp::R_ARM_CALL
:
8734 case elfcpp::R_ARM_JUMP24
:
8735 case elfcpp::R_ARM_THM_JUMP24
:
8736 case elfcpp::R_ARM_SBREL31
:
8737 case elfcpp::R_ARM_PREL31
:
8738 case elfcpp::R_ARM_THM_JUMP19
:
8739 case elfcpp::R_ARM_THM_JUMP6
:
8740 case elfcpp::R_ARM_THM_JUMP11
:
8741 case elfcpp::R_ARM_THM_JUMP8
:
8742 // All the relocations above are branches except SBREL31 and PREL31.
8746 // Be conservative and assume this is a function pointer.
8751 template<bool big_endian
>
8753 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8756 Target_arm
<big_endian
>* target
,
8757 Sized_relobj_file
<32, big_endian
>*,
8760 const elfcpp::Rel
<32, big_endian
>&,
8761 unsigned int r_type
,
8762 const elfcpp::Sym
<32, big_endian
>&)
8764 r_type
= target
->get_real_reloc_type(r_type
);
8765 return possible_function_pointer_reloc(r_type
);
8768 template<bool big_endian
>
8770 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8773 Target_arm
<big_endian
>* target
,
8774 Sized_relobj_file
<32, big_endian
>*,
8777 const elfcpp::Rel
<32, big_endian
>&,
8778 unsigned int r_type
,
8781 // GOT is not a function.
8782 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8785 r_type
= target
->get_real_reloc_type(r_type
);
8786 return possible_function_pointer_reloc(r_type
);
8789 // Scan a relocation for a global symbol.
8791 template<bool big_endian
>
8793 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8796 Sized_relobj_file
<32, big_endian
>* object
,
8797 unsigned int data_shndx
,
8798 Output_section
* output_section
,
8799 const elfcpp::Rel
<32, big_endian
>& reloc
,
8800 unsigned int r_type
,
8803 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8804 // section. We check here to avoid creating a dynamic reloc against
8805 // _GLOBAL_OFFSET_TABLE_.
8806 if (!target
->has_got_section()
8807 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8808 target
->got_section(symtab
, layout
);
8810 // A STT_GNU_IFUNC symbol may require a PLT entry.
8811 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
8812 && this->reloc_needs_plt_for_ifunc(object
, r_type
))
8813 target
->make_plt_entry(symtab
, layout
, gsym
);
8815 r_type
= get_real_reloc_type(r_type
);
8818 case elfcpp::R_ARM_NONE
:
8819 case elfcpp::R_ARM_V4BX
:
8820 case elfcpp::R_ARM_GNU_VTENTRY
:
8821 case elfcpp::R_ARM_GNU_VTINHERIT
:
8824 case elfcpp::R_ARM_ABS32
:
8825 case elfcpp::R_ARM_ABS16
:
8826 case elfcpp::R_ARM_ABS12
:
8827 case elfcpp::R_ARM_THM_ABS5
:
8828 case elfcpp::R_ARM_ABS8
:
8829 case elfcpp::R_ARM_BASE_ABS
:
8830 case elfcpp::R_ARM_MOVW_ABS_NC
:
8831 case elfcpp::R_ARM_MOVT_ABS
:
8832 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8833 case elfcpp::R_ARM_THM_MOVT_ABS
:
8834 case elfcpp::R_ARM_ABS32_NOI
:
8835 // Absolute addressing relocations.
8837 // Make a PLT entry if necessary.
8838 if (this->symbol_needs_plt_entry(gsym
))
8840 target
->make_plt_entry(symtab
, layout
, gsym
);
8841 // Since this is not a PC-relative relocation, we may be
8842 // taking the address of a function. In that case we need to
8843 // set the entry in the dynamic symbol table to the address of
8845 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
8846 gsym
->set_needs_dynsym_value();
8848 // Make a dynamic relocation if necessary.
8849 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8851 if (!parameters
->options().output_is_position_independent()
8852 && gsym
->may_need_copy_reloc())
8854 target
->copy_reloc(symtab
, layout
, object
,
8855 data_shndx
, output_section
, gsym
, reloc
);
8857 else if ((r_type
== elfcpp::R_ARM_ABS32
8858 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8859 && gsym
->type() == elfcpp::STT_GNU_IFUNC
8860 && gsym
->can_use_relative_reloc(false)
8861 && !gsym
->is_from_dynobj()
8862 && !gsym
->is_undefined()
8863 && !gsym
->is_preemptible())
8865 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC
8866 // symbol. This makes a function address in a PIE executable
8867 // match the address in a shared library that it links against.
8868 Reloc_section
* rel_irelative
=
8869 target
->rel_irelative_section(layout
);
8870 unsigned int r_type
= elfcpp::R_ARM_IRELATIVE
;
8871 rel_irelative
->add_symbolless_global_addend(
8872 gsym
, r_type
, output_section
, object
,
8873 data_shndx
, reloc
.get_r_offset());
8875 else if ((r_type
== elfcpp::R_ARM_ABS32
8876 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8877 && gsym
->can_use_relative_reloc(false))
8879 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8880 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
8881 output_section
, object
,
8882 data_shndx
, reloc
.get_r_offset());
8886 check_non_pic(object
, r_type
);
8887 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8888 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8889 data_shndx
, reloc
.get_r_offset());
8895 case elfcpp::R_ARM_GOTOFF32
:
8896 case elfcpp::R_ARM_GOTOFF12
:
8897 // We need a GOT section.
8898 target
->got_section(symtab
, layout
);
8901 case elfcpp::R_ARM_REL32
:
8902 case elfcpp::R_ARM_LDR_PC_G0
:
8903 case elfcpp::R_ARM_SBREL32
:
8904 case elfcpp::R_ARM_THM_PC8
:
8905 case elfcpp::R_ARM_BASE_PREL
:
8906 case elfcpp::R_ARM_MOVW_PREL_NC
:
8907 case elfcpp::R_ARM_MOVT_PREL
:
8908 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8909 case elfcpp::R_ARM_THM_MOVT_PREL
:
8910 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8911 case elfcpp::R_ARM_THM_PC12
:
8912 case elfcpp::R_ARM_REL32_NOI
:
8913 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8914 case elfcpp::R_ARM_ALU_PC_G0
:
8915 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8916 case elfcpp::R_ARM_ALU_PC_G1
:
8917 case elfcpp::R_ARM_ALU_PC_G2
:
8918 case elfcpp::R_ARM_LDR_PC_G1
:
8919 case elfcpp::R_ARM_LDR_PC_G2
:
8920 case elfcpp::R_ARM_LDRS_PC_G0
:
8921 case elfcpp::R_ARM_LDRS_PC_G1
:
8922 case elfcpp::R_ARM_LDRS_PC_G2
:
8923 case elfcpp::R_ARM_LDC_PC_G0
:
8924 case elfcpp::R_ARM_LDC_PC_G1
:
8925 case elfcpp::R_ARM_LDC_PC_G2
:
8926 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8927 case elfcpp::R_ARM_ALU_SB_G0
:
8928 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8929 case elfcpp::R_ARM_ALU_SB_G1
:
8930 case elfcpp::R_ARM_ALU_SB_G2
:
8931 case elfcpp::R_ARM_LDR_SB_G0
:
8932 case elfcpp::R_ARM_LDR_SB_G1
:
8933 case elfcpp::R_ARM_LDR_SB_G2
:
8934 case elfcpp::R_ARM_LDRS_SB_G0
:
8935 case elfcpp::R_ARM_LDRS_SB_G1
:
8936 case elfcpp::R_ARM_LDRS_SB_G2
:
8937 case elfcpp::R_ARM_LDC_SB_G0
:
8938 case elfcpp::R_ARM_LDC_SB_G1
:
8939 case elfcpp::R_ARM_LDC_SB_G2
:
8940 case elfcpp::R_ARM_MOVW_BREL_NC
:
8941 case elfcpp::R_ARM_MOVT_BREL
:
8942 case elfcpp::R_ARM_MOVW_BREL
:
8943 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8944 case elfcpp::R_ARM_THM_MOVT_BREL
:
8945 case elfcpp::R_ARM_THM_MOVW_BREL
:
8946 // Relative addressing relocations.
8948 // Make a dynamic relocation if necessary.
8949 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8951 if (parameters
->options().output_is_executable()
8952 && target
->may_need_copy_reloc(gsym
))
8954 target
->copy_reloc(symtab
, layout
, object
,
8955 data_shndx
, output_section
, gsym
, reloc
);
8959 check_non_pic(object
, r_type
);
8960 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8961 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8962 data_shndx
, reloc
.get_r_offset());
8968 case elfcpp::R_ARM_THM_CALL
:
8969 case elfcpp::R_ARM_PLT32
:
8970 case elfcpp::R_ARM_CALL
:
8971 case elfcpp::R_ARM_JUMP24
:
8972 case elfcpp::R_ARM_THM_JUMP24
:
8973 case elfcpp::R_ARM_SBREL31
:
8974 case elfcpp::R_ARM_PREL31
:
8975 case elfcpp::R_ARM_THM_JUMP19
:
8976 case elfcpp::R_ARM_THM_JUMP6
:
8977 case elfcpp::R_ARM_THM_JUMP11
:
8978 case elfcpp::R_ARM_THM_JUMP8
:
8979 // All the relocation above are branches except for the PREL31 ones.
8980 // A PREL31 relocation can point to a personality function in a shared
8981 // library. In that case we want to use a PLT because we want to
8982 // call the personality routine and the dynamic linkers we care about
8983 // do not support dynamic PREL31 relocations. An REL31 relocation may
8984 // point to a function whose unwinding behaviour is being described but
8985 // we will not mistakenly generate a PLT for that because we should use
8986 // a local section symbol.
8988 // If the symbol is fully resolved, this is just a relative
8989 // local reloc. Otherwise we need a PLT entry.
8990 if (gsym
->final_value_is_known())
8992 // If building a shared library, we can also skip the PLT entry
8993 // if the symbol is defined in the output file and is protected
8995 if (gsym
->is_defined()
8996 && !gsym
->is_from_dynobj()
8997 && !gsym
->is_preemptible())
8999 target
->make_plt_entry(symtab
, layout
, gsym
);
9002 case elfcpp::R_ARM_GOT_BREL
:
9003 case elfcpp::R_ARM_GOT_ABS
:
9004 case elfcpp::R_ARM_GOT_PREL
:
9006 // The symbol requires a GOT entry.
9007 Arm_output_data_got
<big_endian
>* got
=
9008 target
->got_section(symtab
, layout
);
9009 if (gsym
->final_value_is_known())
9011 // For a STT_GNU_IFUNC symbol we want the PLT address.
9012 if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
9013 got
->add_global_plt(gsym
, GOT_TYPE_STANDARD
);
9015 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
9019 // If this symbol is not fully resolved, we need to add a
9020 // GOT entry with a dynamic relocation.
9021 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9022 if (gsym
->is_from_dynobj()
9023 || gsym
->is_undefined()
9024 || gsym
->is_preemptible()
9025 || (gsym
->visibility() == elfcpp::STV_PROTECTED
9026 && parameters
->options().shared())
9027 || (gsym
->type() == elfcpp::STT_GNU_IFUNC
9028 && parameters
->options().output_is_position_independent()))
9029 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
9030 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
9033 // For a STT_GNU_IFUNC symbol we want to write the PLT
9034 // offset into the GOT, so that function pointer
9035 // comparisons work correctly.
9037 if (gsym
->type() != elfcpp::STT_GNU_IFUNC
)
9038 is_new
= got
->add_global(gsym
, GOT_TYPE_STANDARD
);
9041 is_new
= got
->add_global_plt(gsym
, GOT_TYPE_STANDARD
);
9042 // Tell the dynamic linker to use the PLT address
9043 // when resolving relocations.
9044 if (gsym
->is_from_dynobj()
9045 && !parameters
->options().shared())
9046 gsym
->set_needs_dynsym_value();
9049 rel_dyn
->add_global_relative(
9050 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
9051 gsym
->got_offset(GOT_TYPE_STANDARD
));
9057 case elfcpp::R_ARM_TARGET1
:
9058 case elfcpp::R_ARM_TARGET2
:
9059 // These should have been mapped to other types already.
9061 case elfcpp::R_ARM_COPY
:
9062 case elfcpp::R_ARM_GLOB_DAT
:
9063 case elfcpp::R_ARM_JUMP_SLOT
:
9064 case elfcpp::R_ARM_RELATIVE
:
9065 // These are relocations which should only be seen by the
9066 // dynamic linker, and should never be seen here.
9067 gold_error(_("%s: unexpected reloc %u in object file"),
9068 object
->name().c_str(), r_type
);
9071 // These are initial tls relocs, which are expected when
9073 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9074 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9075 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9076 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9077 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9079 const bool is_final
= gsym
->final_value_is_known();
9080 const tls::Tls_optimization optimized_type
9081 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9084 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9085 if (optimized_type
== tls::TLSOPT_NONE
)
9087 // Create a pair of GOT entries for the module index and
9088 // dtv-relative offset.
9089 Arm_output_data_got
<big_endian
>* got
9090 = target
->got_section(symtab
, layout
);
9091 if (!parameters
->doing_static_link())
9092 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
9093 target
->rel_dyn_section(layout
),
9094 elfcpp::R_ARM_TLS_DTPMOD32
,
9095 elfcpp::R_ARM_TLS_DTPOFF32
);
9097 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
9100 // FIXME: TLS optimization not supported yet.
9104 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9105 if (optimized_type
== tls::TLSOPT_NONE
)
9107 // Create a GOT entry for the module index.
9108 target
->got_mod_index_entry(symtab
, layout
, object
);
9111 // FIXME: TLS optimization not supported yet.
9115 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9118 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9119 layout
->set_has_static_tls();
9120 if (optimized_type
== tls::TLSOPT_NONE
)
9122 // Create a GOT entry for the tp-relative offset.
9123 Arm_output_data_got
<big_endian
>* got
9124 = target
->got_section(symtab
, layout
);
9125 if (!parameters
->doing_static_link())
9126 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
9127 target
->rel_dyn_section(layout
),
9128 elfcpp::R_ARM_TLS_TPOFF32
);
9129 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
9131 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
9132 unsigned int got_offset
=
9133 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
9134 got
->add_static_reloc(got_offset
,
9135 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
9139 // FIXME: TLS optimization not supported yet.
9143 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9144 layout
->set_has_static_tls();
9145 if (parameters
->options().shared())
9147 // We need to create a dynamic relocation.
9148 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
9149 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
9150 output_section
, object
,
9151 data_shndx
, reloc
.get_r_offset());
9161 case elfcpp::R_ARM_PC24
:
9162 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9163 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9164 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9166 unsupported_reloc_global(object
, r_type
, gsym
);
9171 // Process relocations for gc.
9173 template<bool big_endian
>
9175 Target_arm
<big_endian
>::gc_process_relocs(
9176 Symbol_table
* symtab
,
9178 Sized_relobj_file
<32, big_endian
>* object
,
9179 unsigned int data_shndx
,
9181 const unsigned char* prelocs
,
9183 Output_section
* output_section
,
9184 bool needs_special_offset_handling
,
9185 size_t local_symbol_count
,
9186 const unsigned char* plocal_symbols
)
9188 typedef Target_arm
<big_endian
> Arm
;
9189 typedef typename Target_arm
<big_endian
>::Scan Scan
;
9191 gold::gc_process_relocs
<32, big_endian
, Arm
, Scan
, Classify_reloc
>(
9200 needs_special_offset_handling
,
9205 // Scan relocations for a section.
9207 template<bool big_endian
>
9209 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
9211 Sized_relobj_file
<32, big_endian
>* object
,
9212 unsigned int data_shndx
,
9213 unsigned int sh_type
,
9214 const unsigned char* prelocs
,
9216 Output_section
* output_section
,
9217 bool needs_special_offset_handling
,
9218 size_t local_symbol_count
,
9219 const unsigned char* plocal_symbols
)
9221 if (sh_type
== elfcpp::SHT_RELA
)
9223 gold_error(_("%s: unsupported RELA reloc section"),
9224 object
->name().c_str());
9228 gold::scan_relocs
<32, big_endian
, Target_arm
, Scan
, Classify_reloc
>(
9237 needs_special_offset_handling
,
9242 // Finalize the sections.
9244 template<bool big_endian
>
9246 Target_arm
<big_endian
>::do_finalize_sections(
9248 const Input_objects
* input_objects
,
9251 bool merged_any_attributes
= false;
9252 // Merge processor-specific flags.
9253 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
9254 p
!= input_objects
->relobj_end();
9257 Arm_relobj
<big_endian
>* arm_relobj
=
9258 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
9259 if (arm_relobj
->merge_flags_and_attributes())
9261 this->merge_processor_specific_flags(
9263 arm_relobj
->processor_specific_flags());
9264 this->merge_object_attributes(arm_relobj
->name().c_str(),
9265 arm_relobj
->attributes_section_data());
9266 merged_any_attributes
= true;
9270 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
9271 p
!= input_objects
->dynobj_end();
9274 Arm_dynobj
<big_endian
>* arm_dynobj
=
9275 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
9276 this->merge_processor_specific_flags(
9278 arm_dynobj
->processor_specific_flags());
9279 this->merge_object_attributes(arm_dynobj
->name().c_str(),
9280 arm_dynobj
->attributes_section_data());
9281 merged_any_attributes
= true;
9284 // Create an empty uninitialized attribute section if we still don't have it
9285 // at this moment. This happens if there is no attributes sections in all
9287 if (this->attributes_section_data_
== NULL
)
9288 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
9290 const Object_attribute
* cpu_arch_attr
=
9291 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
9292 // Check if we need to use Cortex-A8 workaround.
9293 if (parameters
->options().user_set_fix_cortex_a8())
9294 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
9297 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
9298 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
9300 const Object_attribute
* cpu_arch_profile_attr
=
9301 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
9302 this->fix_cortex_a8_
=
9303 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
9304 && (cpu_arch_profile_attr
->int_value() == 'A'
9305 || cpu_arch_profile_attr
->int_value() == 0));
9308 // Check if we can use V4BX interworking.
9309 // The V4BX interworking stub contains BX instruction,
9310 // which is not specified for some profiles.
9311 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9312 && !this->may_use_v4t_interworking())
9313 gold_error(_("unable to provide V4BX reloc interworking fix up; "
9314 "the target profile does not support BX instruction"));
9316 // Fill in some more dynamic tags.
9317 const Reloc_section
* rel_plt
= (this->plt_
== NULL
9319 : this->plt_
->rel_plt());
9320 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
9321 this->rel_dyn_
, true, false);
9323 // Emit any relocs we saved in an attempt to avoid generating COPY
9325 if (this->copy_relocs_
.any_saved_relocs())
9326 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
9328 // Handle the .ARM.exidx section.
9329 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
9331 if (!parameters
->options().relocatable())
9333 if (exidx_section
!= NULL
9334 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
9336 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
9337 // the .ARM.exidx section.
9338 if (!layout
->script_options()->saw_phdrs_clause())
9340 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
9343 Output_segment
* exidx_segment
=
9344 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
9345 exidx_segment
->add_output_section_to_nonload(exidx_section
,
9351 // Create an .ARM.attributes section if we have merged any attributes
9353 if (merged_any_attributes
)
9355 Output_attributes_section_data
* attributes_section
=
9356 new Output_attributes_section_data(*this->attributes_section_data_
);
9357 layout
->add_output_section_data(".ARM.attributes",
9358 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
9359 attributes_section
, ORDER_INVALID
,
9363 // Fix up links in section EXIDX headers.
9364 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
9365 p
!= layout
->section_list().end();
9367 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
9369 Arm_output_section
<big_endian
>* os
=
9370 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
9371 os
->set_exidx_section_link();
9375 // Return whether a direct absolute static relocation needs to be applied.
9376 // In cases where Scan::local() or Scan::global() has created
9377 // a dynamic relocation other than R_ARM_RELATIVE, the addend
9378 // of the relocation is carried in the data, and we must not
9379 // apply the static relocation.
9381 template<bool big_endian
>
9383 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
9384 const Sized_symbol
<32>* gsym
,
9385 unsigned int r_type
,
9387 Output_section
* output_section
)
9389 // If the output section is not allocated, then we didn't call
9390 // scan_relocs, we didn't create a dynamic reloc, and we must apply
9392 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
9395 int ref_flags
= Scan::get_reference_flags(r_type
);
9397 // For local symbols, we will have created a non-RELATIVE dynamic
9398 // relocation only if (a) the output is position independent,
9399 // (b) the relocation is absolute (not pc- or segment-relative), and
9400 // (c) the relocation is not 32 bits wide.
9402 return !(parameters
->options().output_is_position_independent()
9403 && (ref_flags
& Symbol::ABSOLUTE_REF
)
9406 // For global symbols, we use the same helper routines used in the
9407 // scan pass. If we did not create a dynamic relocation, or if we
9408 // created a RELATIVE dynamic relocation, we should apply the static
9410 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
9411 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
9412 && gsym
->can_use_relative_reloc(ref_flags
9413 & Symbol::FUNCTION_CALL
);
9414 return !has_dyn
|| is_rel
;
9417 // Perform a relocation.
9419 template<bool big_endian
>
9421 Target_arm
<big_endian
>::Relocate::relocate(
9422 const Relocate_info
<32, big_endian
>* relinfo
,
9425 Output_section
* output_section
,
9427 const unsigned char* preloc
,
9428 const Sized_symbol
<32>* gsym
,
9429 const Symbol_value
<32>* psymval
,
9430 unsigned char* view
,
9431 Arm_address address
,
9432 section_size_type view_size
)
9437 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
9439 const elfcpp::Rel
<32, big_endian
> rel(preloc
);
9440 unsigned int r_type
= elfcpp::elf_r_type
<32>(rel
.get_r_info());
9441 r_type
= get_real_reloc_type(r_type
);
9442 const Arm_reloc_property
* reloc_property
=
9443 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9444 if (reloc_property
== NULL
)
9446 std::string reloc_name
=
9447 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9448 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9449 _("cannot relocate %s in object file"),
9450 reloc_name
.c_str());
9454 const Arm_relobj
<big_endian
>* object
=
9455 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9457 // If the final branch target of a relocation is THUMB instruction, this
9458 // is 1. Otherwise it is 0.
9459 Arm_address thumb_bit
= 0;
9460 Symbol_value
<32> symval
;
9461 bool is_weakly_undefined_without_plt
= false;
9462 bool have_got_offset
= false;
9463 unsigned int got_offset
= 0;
9465 // If the relocation uses the GOT entry of a symbol instead of the symbol
9466 // itself, we don't care about whether the symbol is defined or what kind
9468 if (reloc_property
->uses_got_entry())
9470 // Get the GOT offset.
9471 // The GOT pointer points to the end of the GOT section.
9472 // We need to subtract the size of the GOT section to get
9473 // the actual offset to use in the relocation.
9474 // TODO: We should move GOT offset computing code in TLS relocations
9478 case elfcpp::R_ARM_GOT_BREL
:
9479 case elfcpp::R_ARM_GOT_PREL
:
9482 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
9483 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
9484 - target
->got_size());
9488 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9489 gold_assert(object
->local_has_got_offset(r_sym
,
9490 GOT_TYPE_STANDARD
));
9491 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
9492 - target
->got_size());
9494 have_got_offset
= true;
9501 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
9505 // This is a global symbol. Determine if we use PLT and if the
9506 // final target is THUMB.
9507 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
9509 // This uses a PLT, change the symbol value.
9510 symval
.set_output_value(target
->plt_address_for_global(gsym
));
9513 else if (gsym
->is_weak_undefined())
9515 // This is a weakly undefined symbol and we do not use PLT
9516 // for this relocation. A branch targeting this symbol will
9517 // be converted into an NOP.
9518 is_weakly_undefined_without_plt
= true;
9520 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
9522 // This relocation uses the symbol value but the symbol is
9523 // undefined. Exit early and have the caller reporting an
9529 // Set thumb bit if symbol:
9530 // -Has type STT_ARM_TFUNC or
9531 // -Has type STT_FUNC, is defined and with LSB in value set.
9533 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
9534 || (gsym
->type() == elfcpp::STT_FUNC
9535 && !gsym
->is_undefined()
9536 && ((psymval
->value(object
, 0) & 1) != 0)))
9543 // This is a local symbol. Determine if the final target is THUMB.
9544 // We saved this information when all the local symbols were read.
9545 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
9546 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9547 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9549 if (psymval
->is_ifunc_symbol() && object
->local_has_plt_offset(r_sym
))
9551 symval
.set_output_value(
9552 target
->plt_address_for_local(object
, r_sym
));
9559 // This is a fake relocation synthesized for a stub. It does not have
9560 // a real symbol. We just look at the LSB of the symbol value to
9561 // determine if the target is THUMB or not.
9562 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
9565 // Strip LSB if this points to a THUMB target.
9567 && reloc_property
->uses_thumb_bit()
9568 && ((psymval
->value(object
, 0) & 1) != 0))
9570 Arm_address stripped_value
=
9571 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9572 symval
.set_output_value(stripped_value
);
9576 // To look up relocation stubs, we need to pass the symbol table index of
9578 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9580 // Get the addressing origin of the output segment defining the
9581 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
9582 Arm_address sym_origin
= 0;
9583 if (reloc_property
->uses_symbol_base())
9585 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
9586 // R_ARM_BASE_ABS with the NULL symbol will give the
9587 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
9588 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
9589 sym_origin
= target
->got_plt_section()->address();
9590 else if (gsym
== NULL
)
9592 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
9593 sym_origin
= gsym
->output_segment()->vaddr();
9594 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
9595 sym_origin
= gsym
->output_data()->address();
9597 // TODO: Assumes the segment base to be zero for the global symbols
9598 // till the proper support for the segment-base-relative addressing
9599 // will be implemented. This is consistent with GNU ld.
9602 // For relative addressing relocation, find out the relative address base.
9603 Arm_address relative_address_base
= 0;
9604 switch(reloc_property
->relative_address_base())
9606 case Arm_reloc_property::RAB_NONE
:
9607 // Relocations with relative address bases RAB_TLS and RAB_tp are
9608 // handled by relocate_tls. So we do not need to do anything here.
9609 case Arm_reloc_property::RAB_TLS
:
9610 case Arm_reloc_property::RAB_tp
:
9612 case Arm_reloc_property::RAB_B_S
:
9613 relative_address_base
= sym_origin
;
9615 case Arm_reloc_property::RAB_GOT_ORG
:
9616 relative_address_base
= target
->got_plt_section()->address();
9618 case Arm_reloc_property::RAB_P
:
9619 relative_address_base
= address
;
9621 case Arm_reloc_property::RAB_Pa
:
9622 relative_address_base
= address
& 0xfffffffcU
;
9628 typename
Arm_relocate_functions::Status reloc_status
=
9629 Arm_relocate_functions::STATUS_OKAY
;
9630 bool check_overflow
= reloc_property
->checks_overflow();
9633 case elfcpp::R_ARM_NONE
:
9636 case elfcpp::R_ARM_ABS8
:
9637 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9638 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
9641 case elfcpp::R_ARM_ABS12
:
9642 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9643 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
9646 case elfcpp::R_ARM_ABS16
:
9647 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9648 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
9651 case elfcpp::R_ARM_ABS32
:
9652 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9653 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9657 case elfcpp::R_ARM_ABS32_NOI
:
9658 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
9659 // No thumb bit for this relocation: (S + A)
9660 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
9664 case elfcpp::R_ARM_MOVW_ABS_NC
:
9665 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9666 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
9671 case elfcpp::R_ARM_MOVT_ABS
:
9672 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9673 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
9676 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9677 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9678 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9679 0, thumb_bit
, false);
9682 case elfcpp::R_ARM_THM_MOVT_ABS
:
9683 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9684 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
9688 case elfcpp::R_ARM_MOVW_PREL_NC
:
9689 case elfcpp::R_ARM_MOVW_BREL_NC
:
9690 case elfcpp::R_ARM_MOVW_BREL
:
9692 Arm_relocate_functions::movw(view
, object
, psymval
,
9693 relative_address_base
, thumb_bit
,
9697 case elfcpp::R_ARM_MOVT_PREL
:
9698 case elfcpp::R_ARM_MOVT_BREL
:
9700 Arm_relocate_functions::movt(view
, object
, psymval
,
9701 relative_address_base
);
9704 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9705 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9706 case elfcpp::R_ARM_THM_MOVW_BREL
:
9708 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9709 relative_address_base
,
9710 thumb_bit
, check_overflow
);
9713 case elfcpp::R_ARM_THM_MOVT_PREL
:
9714 case elfcpp::R_ARM_THM_MOVT_BREL
:
9716 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
9717 relative_address_base
);
9720 case elfcpp::R_ARM_REL32
:
9721 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9722 address
, thumb_bit
);
9725 case elfcpp::R_ARM_THM_ABS5
:
9726 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9727 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9730 // Thumb long branches.
9731 case elfcpp::R_ARM_THM_CALL
:
9732 case elfcpp::R_ARM_THM_XPC22
:
9733 case elfcpp::R_ARM_THM_JUMP24
:
9735 Arm_relocate_functions::thumb_branch_common(
9736 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9737 thumb_bit
, is_weakly_undefined_without_plt
);
9740 case elfcpp::R_ARM_GOTOFF32
:
9742 Arm_address got_origin
;
9743 got_origin
= target
->got_plt_section()->address();
9744 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9745 got_origin
, thumb_bit
);
9749 case elfcpp::R_ARM_BASE_PREL
:
9750 gold_assert(gsym
!= NULL
);
9752 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9755 case elfcpp::R_ARM_BASE_ABS
:
9756 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9757 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9760 case elfcpp::R_ARM_GOT_BREL
:
9761 gold_assert(have_got_offset
);
9762 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9765 case elfcpp::R_ARM_GOT_PREL
:
9766 gold_assert(have_got_offset
);
9767 // Get the address origin for GOT PLT, which is allocated right
9768 // after the GOT section, to calculate an absolute address of
9769 // the symbol GOT entry (got_origin + got_offset).
9770 Arm_address got_origin
;
9771 got_origin
= target
->got_plt_section()->address();
9772 reloc_status
= Arm_relocate_functions::got_prel(view
,
9773 got_origin
+ got_offset
,
9777 case elfcpp::R_ARM_PLT32
:
9778 case elfcpp::R_ARM_CALL
:
9779 case elfcpp::R_ARM_JUMP24
:
9780 case elfcpp::R_ARM_XPC25
:
9781 gold_assert(gsym
== NULL
9782 || gsym
->has_plt_offset()
9783 || gsym
->final_value_is_known()
9784 || (gsym
->is_defined()
9785 && !gsym
->is_from_dynobj()
9786 && !gsym
->is_preemptible()));
9788 Arm_relocate_functions::arm_branch_common(
9789 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9790 thumb_bit
, is_weakly_undefined_without_plt
);
9793 case elfcpp::R_ARM_THM_JUMP19
:
9795 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9799 case elfcpp::R_ARM_THM_JUMP6
:
9801 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9804 case elfcpp::R_ARM_THM_JUMP8
:
9806 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9809 case elfcpp::R_ARM_THM_JUMP11
:
9811 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9814 case elfcpp::R_ARM_PREL31
:
9815 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9816 address
, thumb_bit
);
9819 case elfcpp::R_ARM_V4BX
:
9820 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9822 const bool is_v4bx_interworking
=
9823 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9825 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9826 is_v4bx_interworking
);
9830 case elfcpp::R_ARM_THM_PC8
:
9832 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
9835 case elfcpp::R_ARM_THM_PC12
:
9837 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
9840 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9842 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
9846 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9847 case elfcpp::R_ARM_ALU_PC_G0
:
9848 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9849 case elfcpp::R_ARM_ALU_PC_G1
:
9850 case elfcpp::R_ARM_ALU_PC_G2
:
9851 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9852 case elfcpp::R_ARM_ALU_SB_G0
:
9853 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9854 case elfcpp::R_ARM_ALU_SB_G1
:
9855 case elfcpp::R_ARM_ALU_SB_G2
:
9857 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
9858 reloc_property
->group_index(),
9859 relative_address_base
,
9860 thumb_bit
, check_overflow
);
9863 case elfcpp::R_ARM_LDR_PC_G0
:
9864 case elfcpp::R_ARM_LDR_PC_G1
:
9865 case elfcpp::R_ARM_LDR_PC_G2
:
9866 case elfcpp::R_ARM_LDR_SB_G0
:
9867 case elfcpp::R_ARM_LDR_SB_G1
:
9868 case elfcpp::R_ARM_LDR_SB_G2
:
9870 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
9871 reloc_property
->group_index(),
9872 relative_address_base
);
9875 case elfcpp::R_ARM_LDRS_PC_G0
:
9876 case elfcpp::R_ARM_LDRS_PC_G1
:
9877 case elfcpp::R_ARM_LDRS_PC_G2
:
9878 case elfcpp::R_ARM_LDRS_SB_G0
:
9879 case elfcpp::R_ARM_LDRS_SB_G1
:
9880 case elfcpp::R_ARM_LDRS_SB_G2
:
9882 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
9883 reloc_property
->group_index(),
9884 relative_address_base
);
9887 case elfcpp::R_ARM_LDC_PC_G0
:
9888 case elfcpp::R_ARM_LDC_PC_G1
:
9889 case elfcpp::R_ARM_LDC_PC_G2
:
9890 case elfcpp::R_ARM_LDC_SB_G0
:
9891 case elfcpp::R_ARM_LDC_SB_G1
:
9892 case elfcpp::R_ARM_LDC_SB_G2
:
9894 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
9895 reloc_property
->group_index(),
9896 relative_address_base
);
9899 // These are initial tls relocs, which are expected when
9901 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9902 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9903 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9904 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9905 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9907 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
9908 view
, address
, view_size
);
9911 // The known and unknown unsupported and/or deprecated relocations.
9912 case elfcpp::R_ARM_PC24
:
9913 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9914 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9915 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9917 // Just silently leave the method. We should get an appropriate error
9918 // message in the scan methods.
9922 // Report any errors.
9923 switch (reloc_status
)
9925 case Arm_relocate_functions::STATUS_OKAY
:
9927 case Arm_relocate_functions::STATUS_OVERFLOW
:
9928 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9929 _("relocation overflow in %s"),
9930 reloc_property
->name().c_str());
9932 case Arm_relocate_functions::STATUS_BAD_RELOC
:
9933 gold_error_at_location(
9937 _("unexpected opcode while processing relocation %s"),
9938 reloc_property
->name().c_str());
9947 // Perform a TLS relocation.
9949 template<bool big_endian
>
9950 inline typename Arm_relocate_functions
<big_endian
>::Status
9951 Target_arm
<big_endian
>::Relocate::relocate_tls(
9952 const Relocate_info
<32, big_endian
>* relinfo
,
9953 Target_arm
<big_endian
>* target
,
9955 const elfcpp::Rel
<32, big_endian
>& rel
,
9956 unsigned int r_type
,
9957 const Sized_symbol
<32>* gsym
,
9958 const Symbol_value
<32>* psymval
,
9959 unsigned char* view
,
9960 elfcpp::Elf_types
<32>::Elf_Addr address
,
9961 section_size_type
/*view_size*/ )
9963 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
9964 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
9965 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
9967 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
9969 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
9971 const bool is_final
= (gsym
== NULL
9972 ? !parameters
->options().shared()
9973 : gsym
->final_value_is_known());
9974 const tls::Tls_optimization optimized_type
9975 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9978 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9980 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
9981 unsigned int got_offset
;
9984 gold_assert(gsym
->has_got_offset(got_type
));
9985 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
9989 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9990 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9991 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
9992 - target
->got_size());
9994 if (optimized_type
== tls::TLSOPT_NONE
)
9996 Arm_address got_entry
=
9997 target
->got_plt_section()->address() + got_offset
;
9999 // Relocate the field with the PC relative offset of the pair of
10001 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10002 return ArmRelocFuncs::STATUS_OKAY
;
10007 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
10008 if (optimized_type
== tls::TLSOPT_NONE
)
10010 // Relocate the field with the offset of the GOT entry for
10011 // the module index.
10012 unsigned int got_offset
;
10013 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
10014 - target
->got_size());
10015 Arm_address got_entry
=
10016 target
->got_plt_section()->address() + got_offset
;
10018 // Relocate the field with the PC relative offset of the pair of
10020 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10021 return ArmRelocFuncs::STATUS_OKAY
;
10025 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
10026 RelocFuncs::rel32_unaligned(view
, value
);
10027 return ArmRelocFuncs::STATUS_OKAY
;
10029 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
10030 if (optimized_type
== tls::TLSOPT_NONE
)
10032 // Relocate the field with the offset of the GOT entry for
10033 // the tp-relative offset of the symbol.
10034 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
10035 unsigned int got_offset
;
10038 gold_assert(gsym
->has_got_offset(got_type
));
10039 got_offset
= gsym
->got_offset(got_type
);
10043 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
10044 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
10045 got_offset
= object
->local_got_offset(r_sym
, got_type
);
10048 // All GOT offsets are relative to the end of the GOT.
10049 got_offset
-= target
->got_size();
10051 Arm_address got_entry
=
10052 target
->got_plt_section()->address() + got_offset
;
10054 // Relocate the field with the PC relative offset of the GOT entry.
10055 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
10056 return ArmRelocFuncs::STATUS_OKAY
;
10060 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
10061 // If we're creating a shared library, a dynamic relocation will
10062 // have been created for this location, so do not apply it now.
10063 if (!parameters
->options().shared())
10065 gold_assert(tls_segment
!= NULL
);
10067 // $tp points to the TCB, which is followed by the TLS, so we
10068 // need to add TCB size to the offset.
10069 Arm_address aligned_tcb_size
=
10070 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
10071 RelocFuncs::rel32_unaligned(view
, value
+ aligned_tcb_size
);
10074 return ArmRelocFuncs::STATUS_OKAY
;
10077 gold_unreachable();
10080 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
10081 _("unsupported reloc %u"),
10083 return ArmRelocFuncs::STATUS_BAD_RELOC
;
10086 // Relocate section data.
10088 template<bool big_endian
>
10090 Target_arm
<big_endian
>::relocate_section(
10091 const Relocate_info
<32, big_endian
>* relinfo
,
10092 unsigned int sh_type
,
10093 const unsigned char* prelocs
,
10094 size_t reloc_count
,
10095 Output_section
* output_section
,
10096 bool needs_special_offset_handling
,
10097 unsigned char* view
,
10098 Arm_address address
,
10099 section_size_type view_size
,
10100 const Reloc_symbol_changes
* reloc_symbol_changes
)
10102 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
10103 gold_assert(sh_type
== elfcpp::SHT_REL
);
10105 // See if we are relocating a relaxed input section. If so, the view
10106 // covers the whole output section and we need to adjust accordingly.
10107 if (needs_special_offset_handling
)
10109 const Output_relaxed_input_section
* poris
=
10110 output_section
->find_relaxed_input_section(relinfo
->object
,
10111 relinfo
->data_shndx
);
10114 Arm_address section_address
= poris
->address();
10115 section_size_type section_size
= poris
->data_size();
10117 gold_assert((section_address
>= address
)
10118 && ((section_address
+ section_size
)
10119 <= (address
+ view_size
)));
10121 off_t offset
= section_address
- address
;
10124 view_size
= section_size
;
10128 gold::relocate_section
<32, big_endian
, Target_arm
, Arm_relocate
,
10129 gold::Default_comdat_behavior
, Classify_reloc
>(
10135 needs_special_offset_handling
,
10139 reloc_symbol_changes
);
10142 // Return the size of a relocation while scanning during a relocatable
10145 template<bool big_endian
>
10147 Target_arm
<big_endian
>::Classify_reloc::get_size_for_reloc(
10148 unsigned int r_type
,
10151 r_type
= get_real_reloc_type(r_type
);
10152 const Arm_reloc_property
* arp
=
10153 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10155 return arp
->size();
10158 std::string reloc_name
=
10159 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
10160 gold_error(_("%s: unexpected %s in object file"),
10161 object
->name().c_str(), reloc_name
.c_str());
10166 // Scan the relocs during a relocatable link.
10168 template<bool big_endian
>
10170 Target_arm
<big_endian
>::scan_relocatable_relocs(
10171 Symbol_table
* symtab
,
10173 Sized_relobj_file
<32, big_endian
>* object
,
10174 unsigned int data_shndx
,
10175 unsigned int sh_type
,
10176 const unsigned char* prelocs
,
10177 size_t reloc_count
,
10178 Output_section
* output_section
,
10179 bool needs_special_offset_handling
,
10180 size_t local_symbol_count
,
10181 const unsigned char* plocal_symbols
,
10182 Relocatable_relocs
* rr
)
10184 typedef Arm_scan_relocatable_relocs
<big_endian
, Classify_reloc
>
10185 Scan_relocatable_relocs
;
10187 gold_assert(sh_type
== elfcpp::SHT_REL
);
10189 gold::scan_relocatable_relocs
<32, big_endian
, Scan_relocatable_relocs
>(
10197 needs_special_offset_handling
,
10198 local_symbol_count
,
10203 // Scan the relocs for --emit-relocs.
10205 template<bool big_endian
>
10207 Target_arm
<big_endian
>::emit_relocs_scan(Symbol_table
* symtab
,
10209 Sized_relobj_file
<32, big_endian
>* object
,
10210 unsigned int data_shndx
,
10211 unsigned int sh_type
,
10212 const unsigned char* prelocs
,
10213 size_t reloc_count
,
10214 Output_section
* output_section
,
10215 bool needs_special_offset_handling
,
10216 size_t local_symbol_count
,
10217 const unsigned char* plocal_syms
,
10218 Relocatable_relocs
* rr
)
10220 typedef gold::Default_classify_reloc
<elfcpp::SHT_REL
, 32, big_endian
>
10222 typedef gold::Default_emit_relocs_strategy
<Classify_reloc
>
10223 Emit_relocs_strategy
;
10225 gold_assert(sh_type
== elfcpp::SHT_REL
);
10227 gold::scan_relocatable_relocs
<32, big_endian
, Emit_relocs_strategy
>(
10235 needs_special_offset_handling
,
10236 local_symbol_count
,
10241 // Emit relocations for a section.
10243 template<bool big_endian
>
10245 Target_arm
<big_endian
>::relocate_relocs(
10246 const Relocate_info
<32, big_endian
>* relinfo
,
10247 unsigned int sh_type
,
10248 const unsigned char* prelocs
,
10249 size_t reloc_count
,
10250 Output_section
* output_section
,
10251 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
10252 unsigned char* view
,
10253 Arm_address view_address
,
10254 section_size_type view_size
,
10255 unsigned char* reloc_view
,
10256 section_size_type reloc_view_size
)
10258 gold_assert(sh_type
== elfcpp::SHT_REL
);
10260 gold::relocate_relocs
<32, big_endian
, Classify_reloc
>(
10265 offset_in_output_section
,
10273 // Perform target-specific processing in a relocatable link. This is
10274 // only used if we use the relocation strategy RELOC_SPECIAL.
10276 template<bool big_endian
>
10278 Target_arm
<big_endian
>::relocate_special_relocatable(
10279 const Relocate_info
<32, big_endian
>* relinfo
,
10280 unsigned int sh_type
,
10281 const unsigned char* preloc_in
,
10283 Output_section
* output_section
,
10284 typename
elfcpp::Elf_types
<32>::Elf_Off offset_in_output_section
,
10285 unsigned char* view
,
10286 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
10288 unsigned char* preloc_out
)
10290 // We can only handle REL type relocation sections.
10291 gold_assert(sh_type
== elfcpp::SHT_REL
);
10293 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
10294 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
10296 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
10298 const Arm_relobj
<big_endian
>* object
=
10299 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10300 const unsigned int local_count
= object
->local_symbol_count();
10302 Reltype
reloc(preloc_in
);
10303 Reltype_write
reloc_write(preloc_out
);
10305 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
10306 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
10307 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
10309 const Arm_reloc_property
* arp
=
10310 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10311 gold_assert(arp
!= NULL
);
10313 // Get the new symbol index.
10314 // We only use RELOC_SPECIAL strategy in local relocations.
10315 gold_assert(r_sym
< local_count
);
10317 // We are adjusting a section symbol. We need to find
10318 // the symbol table index of the section symbol for
10319 // the output section corresponding to input section
10320 // in which this symbol is defined.
10322 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
10323 gold_assert(is_ordinary
);
10324 Output_section
* os
= object
->output_section(shndx
);
10325 gold_assert(os
!= NULL
);
10326 gold_assert(os
->needs_symtab_index());
10327 unsigned int new_symndx
= os
->symtab_index();
10329 // Get the new offset--the location in the output section where
10330 // this relocation should be applied.
10332 Arm_address offset
= reloc
.get_r_offset();
10333 Arm_address new_offset
;
10334 if (offset_in_output_section
!= invalid_address
)
10335 new_offset
= offset
+ offset_in_output_section
;
10338 section_offset_type sot_offset
=
10339 convert_types
<section_offset_type
, Arm_address
>(offset
);
10340 section_offset_type new_sot_offset
=
10341 output_section
->output_offset(object
, relinfo
->data_shndx
,
10343 gold_assert(new_sot_offset
!= -1);
10344 new_offset
= new_sot_offset
;
10347 // In an object file, r_offset is an offset within the section.
10348 // In an executable or dynamic object, generated by
10349 // --emit-relocs, r_offset is an absolute address.
10350 if (!parameters
->options().relocatable())
10352 new_offset
+= view_address
;
10353 if (offset_in_output_section
!= invalid_address
)
10354 new_offset
-= offset_in_output_section
;
10357 reloc_write
.put_r_offset(new_offset
);
10358 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
10360 // Handle the reloc addend.
10361 // The relocation uses a section symbol in the input file.
10362 // We are adjusting it to use a section symbol in the output
10363 // file. The input section symbol refers to some address in
10364 // the input section. We need the relocation in the output
10365 // file to refer to that same address. This adjustment to
10366 // the addend is the same calculation we use for a simple
10367 // absolute relocation for the input section symbol.
10369 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
10371 // Handle THUMB bit.
10372 Symbol_value
<32> symval
;
10373 Arm_address thumb_bit
=
10374 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
10376 && arp
->uses_thumb_bit()
10377 && ((psymval
->value(object
, 0) & 1) != 0))
10379 Arm_address stripped_value
=
10380 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
10381 symval
.set_output_value(stripped_value
);
10385 unsigned char* paddend
= view
+ offset
;
10386 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
10387 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
10390 case elfcpp::R_ARM_ABS8
:
10391 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
10395 case elfcpp::R_ARM_ABS12
:
10396 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
10400 case elfcpp::R_ARM_ABS16
:
10401 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
10405 case elfcpp::R_ARM_THM_ABS5
:
10406 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
10411 case elfcpp::R_ARM_MOVW_ABS_NC
:
10412 case elfcpp::R_ARM_MOVW_PREL_NC
:
10413 case elfcpp::R_ARM_MOVW_BREL_NC
:
10414 case elfcpp::R_ARM_MOVW_BREL
:
10415 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
10416 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
10419 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
10420 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
10421 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
10422 case elfcpp::R_ARM_THM_MOVW_BREL
:
10423 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
10424 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
10427 case elfcpp::R_ARM_THM_CALL
:
10428 case elfcpp::R_ARM_THM_XPC22
:
10429 case elfcpp::R_ARM_THM_JUMP24
:
10431 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
10432 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
10436 case elfcpp::R_ARM_PLT32
:
10437 case elfcpp::R_ARM_CALL
:
10438 case elfcpp::R_ARM_JUMP24
:
10439 case elfcpp::R_ARM_XPC25
:
10441 Arm_relocate_functions
<big_endian
>::arm_branch_common(
10442 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
10446 case elfcpp::R_ARM_THM_JUMP19
:
10448 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
10449 psymval
, 0, thumb_bit
);
10452 case elfcpp::R_ARM_THM_JUMP6
:
10454 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
10458 case elfcpp::R_ARM_THM_JUMP8
:
10460 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
10464 case elfcpp::R_ARM_THM_JUMP11
:
10466 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
10470 case elfcpp::R_ARM_PREL31
:
10472 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
10476 case elfcpp::R_ARM_THM_PC8
:
10478 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
10482 case elfcpp::R_ARM_THM_PC12
:
10484 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
10488 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
10490 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
10494 // These relocation truncate relocation results so we cannot handle them
10495 // in a relocatable link.
10496 case elfcpp::R_ARM_MOVT_ABS
:
10497 case elfcpp::R_ARM_THM_MOVT_ABS
:
10498 case elfcpp::R_ARM_MOVT_PREL
:
10499 case elfcpp::R_ARM_MOVT_BREL
:
10500 case elfcpp::R_ARM_THM_MOVT_PREL
:
10501 case elfcpp::R_ARM_THM_MOVT_BREL
:
10502 case elfcpp::R_ARM_ALU_PC_G0_NC
:
10503 case elfcpp::R_ARM_ALU_PC_G0
:
10504 case elfcpp::R_ARM_ALU_PC_G1_NC
:
10505 case elfcpp::R_ARM_ALU_PC_G1
:
10506 case elfcpp::R_ARM_ALU_PC_G2
:
10507 case elfcpp::R_ARM_ALU_SB_G0_NC
:
10508 case elfcpp::R_ARM_ALU_SB_G0
:
10509 case elfcpp::R_ARM_ALU_SB_G1_NC
:
10510 case elfcpp::R_ARM_ALU_SB_G1
:
10511 case elfcpp::R_ARM_ALU_SB_G2
:
10512 case elfcpp::R_ARM_LDR_PC_G0
:
10513 case elfcpp::R_ARM_LDR_PC_G1
:
10514 case elfcpp::R_ARM_LDR_PC_G2
:
10515 case elfcpp::R_ARM_LDR_SB_G0
:
10516 case elfcpp::R_ARM_LDR_SB_G1
:
10517 case elfcpp::R_ARM_LDR_SB_G2
:
10518 case elfcpp::R_ARM_LDRS_PC_G0
:
10519 case elfcpp::R_ARM_LDRS_PC_G1
:
10520 case elfcpp::R_ARM_LDRS_PC_G2
:
10521 case elfcpp::R_ARM_LDRS_SB_G0
:
10522 case elfcpp::R_ARM_LDRS_SB_G1
:
10523 case elfcpp::R_ARM_LDRS_SB_G2
:
10524 case elfcpp::R_ARM_LDC_PC_G0
:
10525 case elfcpp::R_ARM_LDC_PC_G1
:
10526 case elfcpp::R_ARM_LDC_PC_G2
:
10527 case elfcpp::R_ARM_LDC_SB_G0
:
10528 case elfcpp::R_ARM_LDC_SB_G1
:
10529 case elfcpp::R_ARM_LDC_SB_G2
:
10530 gold_error(_("cannot handle %s in a relocatable link"),
10531 arp
->name().c_str());
10535 gold_unreachable();
10538 // Report any errors.
10539 switch (reloc_status
)
10541 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
10543 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
10544 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
10545 _("relocation overflow in %s"),
10546 arp
->name().c_str());
10548 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
10549 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
10550 _("unexpected opcode while processing relocation %s"),
10551 arp
->name().c_str());
10554 gold_unreachable();
10558 // Return the value to use for a dynamic symbol which requires special
10559 // treatment. This is how we support equality comparisons of function
10560 // pointers across shared library boundaries, as described in the
10561 // processor specific ABI supplement.
10563 template<bool big_endian
>
10565 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
10567 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
10568 return this->plt_address_for_global(gsym
);
10571 // Map platform-specific relocs to real relocs
10573 template<bool big_endian
>
10575 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
)
10579 case elfcpp::R_ARM_TARGET1
:
10580 // This is either R_ARM_ABS32 or R_ARM_REL32;
10581 return elfcpp::R_ARM_ABS32
;
10583 case elfcpp::R_ARM_TARGET2
:
10584 // This can be any reloc type but usually is R_ARM_GOT_PREL
10585 return elfcpp::R_ARM_GOT_PREL
;
10592 // Whether if two EABI versions V1 and V2 are compatible.
10594 template<bool big_endian
>
10596 Target_arm
<big_endian
>::are_eabi_versions_compatible(
10597 elfcpp::Elf_Word v1
,
10598 elfcpp::Elf_Word v2
)
10600 // v4 and v5 are the same spec before and after it was released,
10601 // so allow mixing them.
10602 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
10603 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
10604 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
10610 // Combine FLAGS from an input object called NAME and the processor-specific
10611 // flags in the ELF header of the output. Much of this is adapted from the
10612 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
10613 // in bfd/elf32-arm.c.
10615 template<bool big_endian
>
10617 Target_arm
<big_endian
>::merge_processor_specific_flags(
10618 const std::string
& name
,
10619 elfcpp::Elf_Word flags
)
10621 if (this->are_processor_specific_flags_set())
10623 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
10625 // Nothing to merge if flags equal to those in output.
10626 if (flags
== out_flags
)
10629 // Complain about various flag mismatches.
10630 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
10631 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
10632 if (!this->are_eabi_versions_compatible(version1
, version2
)
10633 && parameters
->options().warn_mismatch())
10634 gold_error(_("Source object %s has EABI version %d but output has "
10635 "EABI version %d."),
10637 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
10638 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
10642 // If the input is the default architecture and had the default
10643 // flags then do not bother setting the flags for the output
10644 // architecture, instead allow future merges to do this. If no
10645 // future merges ever set these flags then they will retain their
10646 // uninitialised values, which surprise surprise, correspond
10647 // to the default values.
10651 // This is the first time, just copy the flags.
10652 // We only copy the EABI version for now.
10653 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
10657 // Adjust ELF file header.
10658 template<bool big_endian
>
10660 Target_arm
<big_endian
>::do_adjust_elf_header(
10661 unsigned char* view
,
10664 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
10666 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
10667 elfcpp::Elf_Word flags
= this->processor_specific_flags();
10668 unsigned char e_ident
[elfcpp::EI_NIDENT
];
10669 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
10671 if (elfcpp::arm_eabi_version(flags
)
10672 == elfcpp::EF_ARM_EABI_UNKNOWN
)
10673 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
10675 e_ident
[elfcpp::EI_OSABI
] = 0;
10676 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
10678 // FIXME: Do EF_ARM_BE8 adjustment.
10680 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10682 if (elfcpp::arm_eabi_version(flags
) == elfcpp::EF_ARM_EABI_VER5
)
10684 elfcpp::Elf_Half type
= ehdr
.get_e_type();
10685 if (type
== elfcpp::ET_EXEC
|| type
== elfcpp::ET_DYN
)
10687 Object_attribute
* attr
= this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args
);
10688 if (attr
->int_value() == elfcpp::AEABI_VFP_args_vfp
)
10689 flags
|= elfcpp::EF_ARM_ABI_FLOAT_HARD
;
10691 flags
|= elfcpp::EF_ARM_ABI_FLOAT_SOFT
;
10692 this->set_processor_specific_flags(flags
);
10695 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
10696 oehdr
.put_e_ident(e_ident
);
10697 oehdr
.put_e_flags(this->processor_specific_flags());
10700 // do_make_elf_object to override the same function in the base class.
10701 // We need to use a target-specific sub-class of
10702 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10703 // Hence we need to have our own ELF object creation.
10705 template<bool big_endian
>
10707 Target_arm
<big_endian
>::do_make_elf_object(
10708 const std::string
& name
,
10709 Input_file
* input_file
,
10710 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
10712 int et
= ehdr
.get_e_type();
10713 // ET_EXEC files are valid input for --just-symbols/-R,
10714 // and we treat them as relocatable objects.
10715 if (et
== elfcpp::ET_REL
10716 || (et
== elfcpp::ET_EXEC
&& input_file
->just_symbols()))
10718 Arm_relobj
<big_endian
>* obj
=
10719 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10723 else if (et
== elfcpp::ET_DYN
)
10725 Sized_dynobj
<32, big_endian
>* obj
=
10726 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
10732 gold_error(_("%s: unsupported ELF file type %d"),
10738 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10739 // Returns -1 if no architecture could be read.
10740 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10742 template<bool big_endian
>
10744 Target_arm
<big_endian
>::get_secondary_compatible_arch(
10745 const Attributes_section_data
* pasd
)
10747 const Object_attribute
* known_attributes
=
10748 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10750 // Note: the tag and its argument below are uleb128 values, though
10751 // currently-defined values fit in one byte for each.
10752 const std::string
& sv
=
10753 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
10755 && sv
.data()[0] == elfcpp::Tag_CPU_arch
10756 && (sv
.data()[1] & 128) != 128)
10757 return sv
.data()[1];
10759 // This tag is "safely ignorable", so don't complain if it looks funny.
10763 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10764 // The tag is removed if ARCH is -1.
10765 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10767 template<bool big_endian
>
10769 Target_arm
<big_endian
>::set_secondary_compatible_arch(
10770 Attributes_section_data
* pasd
,
10773 Object_attribute
* known_attributes
=
10774 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10778 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10782 // Note: the tag and its argument below are uleb128 values, though
10783 // currently-defined values fit in one byte for each.
10785 sv
[0] = elfcpp::Tag_CPU_arch
;
10786 gold_assert(arch
!= 0);
10790 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10793 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10795 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10797 template<bool big_endian
>
10799 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10802 int* secondary_compat_out
,
10804 int secondary_compat
)
10806 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10807 static const int v6t2
[] =
10809 T(V6T2
), // PRE_V4.
10819 static const int v6k
[] =
10832 static const int v7
[] =
10846 static const int v6_m
[] =
10861 static const int v6s_m
[] =
10877 static const int v7e_m
[] =
10884 T(V7E_M
), // V5TEJ.
10891 T(V7E_M
), // V6S_M.
10894 static const int v8
[] =
10912 static const int v4t_plus_v6_m
[] =
10919 T(V5TEJ
), // V5TEJ.
10926 T(V6S_M
), // V6S_M.
10927 T(V7E_M
), // V7E_M.
10929 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
10931 static const int* comb
[] =
10940 // Pseudo-architecture.
10944 // Check we've not got a higher architecture than we know about.
10946 if (oldtag
> elfcpp::MAX_TAG_CPU_ARCH
|| newtag
> elfcpp::MAX_TAG_CPU_ARCH
)
10948 gold_error(_("%s: unknown CPU architecture"), name
);
10952 // Override old tag if we have a Tag_also_compatible_with on the output.
10954 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
10955 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
10956 oldtag
= T(V4T_PLUS_V6_M
);
10958 // And override the new tag if we have a Tag_also_compatible_with on the
10961 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
10962 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
10963 newtag
= T(V4T_PLUS_V6_M
);
10965 // Architectures before V6KZ add features monotonically.
10966 int tagh
= std::max(oldtag
, newtag
);
10967 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
10970 int tagl
= std::min(oldtag
, newtag
);
10971 int result
= comb
[tagh
- T(V6T2
)][tagl
];
10973 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10974 // as the canonical version.
10975 if (result
== T(V4T_PLUS_V6_M
))
10978 *secondary_compat_out
= T(V6_M
);
10981 *secondary_compat_out
= -1;
10985 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10986 name
, oldtag
, newtag
);
10994 // Helper to print AEABI enum tag value.
10996 template<bool big_endian
>
10998 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
11000 static const char* aeabi_enum_names
[] =
11001 { "", "variable-size", "32-bit", "" };
11002 const size_t aeabi_enum_names_size
=
11003 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
11005 if (value
< aeabi_enum_names_size
)
11006 return std::string(aeabi_enum_names
[value
]);
11010 sprintf(buffer
, "<unknown value %u>", value
);
11011 return std::string(buffer
);
11015 // Return the string value to store in TAG_CPU_name.
11017 template<bool big_endian
>
11019 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
11021 static const char* name_table
[] = {
11022 // These aren't real CPU names, but we can't guess
11023 // that from the architecture version alone.
11040 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
11042 if (value
< name_table_size
)
11043 return std::string(name_table
[value
]);
11047 sprintf(buffer
, "<unknown CPU value %u>", value
);
11048 return std::string(buffer
);
11052 // Query attributes object to see if integer divide instructions may be
11053 // present in an object.
11055 template<bool big_endian
>
11057 Target_arm
<big_endian
>::attributes_accept_div(int arch
, int profile
,
11058 const Object_attribute
* div_attr
)
11060 switch (div_attr
->int_value())
11063 // Integer divide allowed if instruction contained in
11065 if (arch
== elfcpp::TAG_CPU_ARCH_V7
&& (profile
== 'R' || profile
== 'M'))
11067 else if (arch
>= elfcpp::TAG_CPU_ARCH_V7E_M
)
11073 // Integer divide explicitly prohibited.
11077 // Unrecognised case - treat as allowing divide everywhere.
11079 // Integer divide allowed in ARM state.
11084 // Query attributes object to see if integer divide instructions are
11085 // forbidden to be in the object. This is not the inverse of
11086 // attributes_accept_div.
11088 template<bool big_endian
>
11090 Target_arm
<big_endian
>::attributes_forbid_div(const Object_attribute
* div_attr
)
11092 return div_attr
->int_value() == 1;
11095 // Merge object attributes from input file called NAME with those of the
11096 // output. The input object attributes are in the object pointed by PASD.
11098 template<bool big_endian
>
11100 Target_arm
<big_endian
>::merge_object_attributes(
11102 const Attributes_section_data
* pasd
)
11104 // Return if there is no attributes section data.
11108 // If output has no object attributes, just copy.
11109 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
11110 if (this->attributes_section_data_
== NULL
)
11112 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
11113 Object_attribute
* out_attr
=
11114 this->attributes_section_data_
->known_attributes(vendor
);
11116 // We do not output objects with Tag_MPextension_use_legacy - we move
11117 // the attribute's value to Tag_MPextension_use. */
11118 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
11120 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
11121 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
11122 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
11124 gold_error(_("%s has both the current and legacy "
11125 "Tag_MPextension_use attributes"),
11129 out_attr
[elfcpp::Tag_MPextension_use
] =
11130 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
11131 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
11132 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
11138 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
11139 Object_attribute
* out_attr
=
11140 this->attributes_section_data_
->known_attributes(vendor
);
11142 // This needs to happen before Tag_ABI_FP_number_model is merged. */
11143 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11144 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
11146 // Ignore mismatches if the object doesn't use floating point. */
11147 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11148 == elfcpp::AEABI_FP_number_model_none
11149 || (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11150 != elfcpp::AEABI_FP_number_model_none
11151 && out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11152 == elfcpp::AEABI_VFP_args_compatible
))
11153 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
11154 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
11155 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value()
11156 != elfcpp::AEABI_FP_number_model_none
11157 && in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
11158 != elfcpp::AEABI_VFP_args_compatible
11159 && parameters
->options().warn_mismatch())
11160 gold_error(_("%s uses VFP register arguments, output does not"),
11164 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
11166 // Merge this attribute with existing attributes.
11169 case elfcpp::Tag_CPU_raw_name
:
11170 case elfcpp::Tag_CPU_name
:
11171 // These are merged after Tag_CPU_arch.
11174 case elfcpp::Tag_ABI_optimization_goals
:
11175 case elfcpp::Tag_ABI_FP_optimization_goals
:
11176 // Use the first value seen.
11179 case elfcpp::Tag_CPU_arch
:
11181 unsigned int saved_out_attr
= out_attr
->int_value();
11182 // Merge Tag_CPU_arch and Tag_also_compatible_with.
11183 int secondary_compat
=
11184 this->get_secondary_compatible_arch(pasd
);
11185 int secondary_compat_out
=
11186 this->get_secondary_compatible_arch(
11187 this->attributes_section_data_
);
11188 out_attr
[i
].set_int_value(
11189 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
11190 &secondary_compat_out
,
11191 in_attr
[i
].int_value(),
11192 secondary_compat
));
11193 this->set_secondary_compatible_arch(this->attributes_section_data_
,
11194 secondary_compat_out
);
11196 // Merge Tag_CPU_name and Tag_CPU_raw_name.
11197 if (out_attr
[i
].int_value() == saved_out_attr
)
11198 ; // Leave the names alone.
11199 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
11201 // The output architecture has been changed to match the
11202 // input architecture. Use the input names.
11203 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
11204 in_attr
[elfcpp::Tag_CPU_name
].string_value());
11205 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
11206 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
11210 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
11211 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
11214 // If we still don't have a value for Tag_CPU_name,
11215 // make one up now. Tag_CPU_raw_name remains blank.
11216 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
11218 const std::string cpu_name
=
11219 this->tag_cpu_name_value(out_attr
[i
].int_value());
11220 // FIXME: If we see an unknown CPU, this will be set
11221 // to "<unknown CPU n>", where n is the attribute value.
11222 // This is different from BFD, which leaves the name alone.
11223 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
11228 case elfcpp::Tag_ARM_ISA_use
:
11229 case elfcpp::Tag_THUMB_ISA_use
:
11230 case elfcpp::Tag_WMMX_arch
:
11231 case elfcpp::Tag_Advanced_SIMD_arch
:
11232 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
11233 case elfcpp::Tag_ABI_FP_rounding
:
11234 case elfcpp::Tag_ABI_FP_exceptions
:
11235 case elfcpp::Tag_ABI_FP_user_exceptions
:
11236 case elfcpp::Tag_ABI_FP_number_model
:
11237 case elfcpp::Tag_VFP_HP_extension
:
11238 case elfcpp::Tag_CPU_unaligned_access
:
11239 case elfcpp::Tag_T2EE_use
:
11240 case elfcpp::Tag_Virtualization_use
:
11241 case elfcpp::Tag_MPextension_use
:
11242 // Use the largest value specified.
11243 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
11244 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11247 case elfcpp::Tag_ABI_align8_preserved
:
11248 case elfcpp::Tag_ABI_PCS_RO_data
:
11249 // Use the smallest value specified.
11250 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
11251 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11254 case elfcpp::Tag_ABI_align8_needed
:
11255 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
11256 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
11257 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
11260 // This error message should be enabled once all non-conforming
11261 // binaries in the toolchain have had the attributes set
11263 // gold_error(_("output 8-byte data alignment conflicts with %s"),
11267 case elfcpp::Tag_ABI_FP_denormal
:
11268 case elfcpp::Tag_ABI_PCS_GOT_use
:
11270 // These tags have 0 = don't care, 1 = strong requirement,
11271 // 2 = weak requirement.
11272 static const int order_021
[3] = {0, 2, 1};
11274 // Use the "greatest" from the sequence 0, 2, 1, or the largest
11275 // value if greater than 2 (for future-proofing).
11276 if ((in_attr
[i
].int_value() > 2
11277 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
11278 || (in_attr
[i
].int_value() <= 2
11279 && out_attr
[i
].int_value() <= 2
11280 && (order_021
[in_attr
[i
].int_value()]
11281 > order_021
[out_attr
[i
].int_value()])))
11282 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11286 case elfcpp::Tag_CPU_arch_profile
:
11287 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
11289 // 0 will merge with anything.
11290 // 'A' and 'S' merge to 'A'.
11291 // 'R' and 'S' merge to 'R'.
11292 // 'M' and 'A|R|S' is an error.
11293 if (out_attr
[i
].int_value() == 0
11294 || (out_attr
[i
].int_value() == 'S'
11295 && (in_attr
[i
].int_value() == 'A'
11296 || in_attr
[i
].int_value() == 'R')))
11297 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11298 else if (in_attr
[i
].int_value() == 0
11299 || (in_attr
[i
].int_value() == 'S'
11300 && (out_attr
[i
].int_value() == 'A'
11301 || out_attr
[i
].int_value() == 'R')))
11303 else if (parameters
->options().warn_mismatch())
11306 (_("conflicting architecture profiles %c/%c"),
11307 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
11308 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
11312 case elfcpp::Tag_VFP_arch
:
11314 static const struct
11318 } vfp_versions
[7] =
11329 // Values greater than 6 aren't defined, so just pick the
11331 if (in_attr
[i
].int_value() > 6
11332 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
11334 *out_attr
= *in_attr
;
11337 // The output uses the superset of input features
11338 // (ISA version) and registers.
11339 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
11340 vfp_versions
[out_attr
[i
].int_value()].ver
);
11341 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
11342 vfp_versions
[out_attr
[i
].int_value()].regs
);
11343 // This assumes all possible supersets are also a valid
11346 for (newval
= 6; newval
> 0; newval
--)
11348 if (regs
== vfp_versions
[newval
].regs
11349 && ver
== vfp_versions
[newval
].ver
)
11352 out_attr
[i
].set_int_value(newval
);
11355 case elfcpp::Tag_PCS_config
:
11356 if (out_attr
[i
].int_value() == 0)
11357 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11358 else if (in_attr
[i
].int_value() != 0
11359 && out_attr
[i
].int_value() != 0
11360 && parameters
->options().warn_mismatch())
11362 // It's sometimes ok to mix different configs, so this is only
11364 gold_warning(_("%s: conflicting platform configuration"), name
);
11367 case elfcpp::Tag_ABI_PCS_R9_use
:
11368 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11369 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
11370 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
11371 && parameters
->options().warn_mismatch())
11373 gold_error(_("%s: conflicting use of R9"), name
);
11375 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
11376 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11378 case elfcpp::Tag_ABI_PCS_RW_data
:
11379 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
11380 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
11381 != elfcpp::AEABI_R9_SB
)
11382 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
11383 != elfcpp::AEABI_R9_unused
)
11384 && parameters
->options().warn_mismatch())
11386 gold_error(_("%s: SB relative addressing conflicts with use "
11390 // Use the smallest value specified.
11391 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
11392 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11394 case elfcpp::Tag_ABI_PCS_wchar_t
:
11395 if (out_attr
[i
].int_value()
11396 && in_attr
[i
].int_value()
11397 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
11398 && parameters
->options().warn_mismatch()
11399 && parameters
->options().wchar_size_warning())
11401 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
11402 "use %u-byte wchar_t; use of wchar_t values "
11403 "across objects may fail"),
11404 name
, in_attr
[i
].int_value(),
11405 out_attr
[i
].int_value());
11407 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
11408 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11410 case elfcpp::Tag_ABI_enum_size
:
11411 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
11413 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
11414 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
11416 // The existing object is compatible with anything.
11417 // Use whatever requirements the new object has.
11418 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11420 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
11421 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
11422 && parameters
->options().warn_mismatch()
11423 && parameters
->options().enum_size_warning())
11425 unsigned int in_value
= in_attr
[i
].int_value();
11426 unsigned int out_value
= out_attr
[i
].int_value();
11427 gold_warning(_("%s uses %s enums yet the output is to use "
11428 "%s enums; use of enum values across objects "
11431 this->aeabi_enum_name(in_value
).c_str(),
11432 this->aeabi_enum_name(out_value
).c_str());
11436 case elfcpp::Tag_ABI_VFP_args
:
11439 case elfcpp::Tag_ABI_WMMX_args
:
11440 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11441 && parameters
->options().warn_mismatch())
11443 gold_error(_("%s uses iWMMXt register arguments, output does "
11448 case Object_attribute::Tag_compatibility
:
11449 // Merged in target-independent code.
11451 case elfcpp::Tag_ABI_HardFP_use
:
11452 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
11453 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
11454 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
11455 out_attr
[i
].set_int_value(3);
11456 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
11457 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11459 case elfcpp::Tag_ABI_FP_16bit_format
:
11460 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
11462 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
11463 && parameters
->options().warn_mismatch())
11464 gold_error(_("fp16 format mismatch between %s and output"),
11467 if (in_attr
[i
].int_value() != 0)
11468 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11471 case elfcpp::Tag_DIV_use
:
11473 // A value of zero on input means that the divide
11474 // instruction may be used if available in the base
11475 // architecture as specified via Tag_CPU_arch and
11476 // Tag_CPU_arch_profile. A value of 1 means that the user
11477 // did not want divide instructions. A value of 2
11478 // explicitly means that divide instructions were allowed
11479 // in ARM and Thumb state.
11481 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
)->
11483 int profile
= this->
11484 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
)->
11486 if (in_attr
[i
].int_value() == out_attr
[i
].int_value())
11490 else if (attributes_forbid_div(&in_attr
[i
])
11491 && !attributes_accept_div(arch
, profile
, &out_attr
[i
]))
11492 out_attr
[i
].set_int_value(1);
11493 else if (attributes_forbid_div(&out_attr
[i
])
11494 && attributes_accept_div(arch
, profile
, &in_attr
[i
]))
11495 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11496 else if (in_attr
[i
].int_value() == 2)
11497 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
11501 case elfcpp::Tag_MPextension_use_legacy
:
11502 // We don't output objects with Tag_MPextension_use_legacy - we
11503 // move the value to Tag_MPextension_use.
11504 if (in_attr
[i
].int_value() != 0
11505 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
11507 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
11508 != in_attr
[i
].int_value())
11510 gold_error(_("%s has has both the current and legacy "
11511 "Tag_MPextension_use attributes"),
11516 if (in_attr
[i
].int_value()
11517 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
11518 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
11522 case elfcpp::Tag_nodefaults
:
11523 // This tag is set if it exists, but the value is unused (and is
11524 // typically zero). We don't actually need to do anything here -
11525 // the merge happens automatically when the type flags are merged
11528 case elfcpp::Tag_also_compatible_with
:
11529 // Already done in Tag_CPU_arch.
11531 case elfcpp::Tag_conformance
:
11532 // Keep the attribute if it matches. Throw it away otherwise.
11533 // No attribute means no claim to conform.
11534 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
11535 out_attr
[i
].set_string_value("");
11540 const char* err_object
= NULL
;
11542 // The "known_obj_attributes" table does contain some undefined
11543 // attributes. Ensure that there are unused.
11544 if (out_attr
[i
].int_value() != 0
11545 || out_attr
[i
].string_value() != "")
11546 err_object
= "output";
11547 else if (in_attr
[i
].int_value() != 0
11548 || in_attr
[i
].string_value() != "")
11551 if (err_object
!= NULL
11552 && parameters
->options().warn_mismatch())
11554 // Attribute numbers >=64 (mod 128) can be safely ignored.
11555 if ((i
& 127) < 64)
11556 gold_error(_("%s: unknown mandatory EABI object attribute "
11560 gold_warning(_("%s: unknown EABI object attribute %d"),
11564 // Only pass on attributes that match in both inputs.
11565 if (!in_attr
[i
].matches(out_attr
[i
]))
11567 out_attr
[i
].set_int_value(0);
11568 out_attr
[i
].set_string_value("");
11573 // If out_attr was copied from in_attr then it won't have a type yet.
11574 if (in_attr
[i
].type() && !out_attr
[i
].type())
11575 out_attr
[i
].set_type(in_attr
[i
].type());
11578 // Merge Tag_compatibility attributes and any common GNU ones.
11579 this->attributes_section_data_
->merge(name
, pasd
);
11581 // Check for any attributes not known on ARM.
11582 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
11583 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
11584 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
11585 Other_attributes
* out_other_attributes
=
11586 this->attributes_section_data_
->other_attributes(vendor
);
11587 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
11589 while (in_iter
!= in_other_attributes
->end()
11590 || out_iter
!= out_other_attributes
->end())
11592 const char* err_object
= NULL
;
11595 // The tags for each list are in numerical order.
11596 // If the tags are equal, then merge.
11597 if (out_iter
!= out_other_attributes
->end()
11598 && (in_iter
== in_other_attributes
->end()
11599 || in_iter
->first
> out_iter
->first
))
11601 // This attribute only exists in output. We can't merge, and we
11602 // don't know what the tag means, so delete it.
11603 err_object
= "output";
11604 err_tag
= out_iter
->first
;
11605 int saved_tag
= out_iter
->first
;
11606 delete out_iter
->second
;
11607 out_other_attributes
->erase(out_iter
);
11608 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
11610 else if (in_iter
!= in_other_attributes
->end()
11611 && (out_iter
!= out_other_attributes
->end()
11612 || in_iter
->first
< out_iter
->first
))
11614 // This attribute only exists in input. We can't merge, and we
11615 // don't know what the tag means, so ignore it.
11617 err_tag
= in_iter
->first
;
11620 else // The tags are equal.
11622 // As present, all attributes in the list are unknown, and
11623 // therefore can't be merged meaningfully.
11624 err_object
= "output";
11625 err_tag
= out_iter
->first
;
11627 // Only pass on attributes that match in both inputs.
11628 if (!in_iter
->second
->matches(*(out_iter
->second
)))
11630 // No match. Delete the attribute.
11631 int saved_tag
= out_iter
->first
;
11632 delete out_iter
->second
;
11633 out_other_attributes
->erase(out_iter
);
11634 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
11638 // Matched. Keep the attribute and move to the next.
11644 if (err_object
&& parameters
->options().warn_mismatch())
11646 // Attribute numbers >=64 (mod 128) can be safely ignored. */
11647 if ((err_tag
& 127) < 64)
11649 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
11650 err_object
, err_tag
);
11654 gold_warning(_("%s: unknown EABI object attribute %d"),
11655 err_object
, err_tag
);
11661 // Stub-generation methods for Target_arm.
11663 // Make a new Arm_input_section object.
11665 template<bool big_endian
>
11666 Arm_input_section
<big_endian
>*
11667 Target_arm
<big_endian
>::new_arm_input_section(
11669 unsigned int shndx
)
11671 Section_id
sid(relobj
, shndx
);
11673 Arm_input_section
<big_endian
>* arm_input_section
=
11674 new Arm_input_section
<big_endian
>(relobj
, shndx
);
11675 arm_input_section
->init();
11677 // Register new Arm_input_section in map for look-up.
11678 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
11679 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
11681 // Make sure that it we have not created another Arm_input_section
11682 // for this input section already.
11683 gold_assert(ins
.second
);
11685 return arm_input_section
;
11688 // Find the Arm_input_section object corresponding to the SHNDX-th input
11689 // section of RELOBJ.
11691 template<bool big_endian
>
11692 Arm_input_section
<big_endian
>*
11693 Target_arm
<big_endian
>::find_arm_input_section(
11695 unsigned int shndx
) const
11697 Section_id
sid(relobj
, shndx
);
11698 typename
Arm_input_section_map::const_iterator p
=
11699 this->arm_input_section_map_
.find(sid
);
11700 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
11703 // Make a new stub table.
11705 template<bool big_endian
>
11706 Stub_table
<big_endian
>*
11707 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
11709 Stub_table
<big_endian
>* stub_table
=
11710 new Stub_table
<big_endian
>(owner
);
11711 this->stub_tables_
.push_back(stub_table
);
11713 stub_table
->set_address(owner
->address() + owner
->data_size());
11714 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
11715 stub_table
->finalize_data_size();
11720 // Scan a relocation for stub generation.
11722 template<bool big_endian
>
11724 Target_arm
<big_endian
>::scan_reloc_for_stub(
11725 const Relocate_info
<32, big_endian
>* relinfo
,
11726 unsigned int r_type
,
11727 const Sized_symbol
<32>* gsym
,
11728 unsigned int r_sym
,
11729 const Symbol_value
<32>* psymval
,
11730 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
11731 Arm_address address
)
11733 const Arm_relobj
<big_endian
>* arm_relobj
=
11734 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11736 bool target_is_thumb
;
11737 Symbol_value
<32> symval
;
11740 // This is a global symbol. Determine if we use PLT and if the
11741 // final target is THUMB.
11742 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
11744 // This uses a PLT, change the symbol value.
11745 symval
.set_output_value(this->plt_address_for_global(gsym
));
11747 target_is_thumb
= false;
11749 else if (gsym
->is_undefined())
11750 // There is no need to generate a stub symbol is undefined.
11755 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
11756 || (gsym
->type() == elfcpp::STT_FUNC
11757 && !gsym
->is_undefined()
11758 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
11763 // This is a local symbol. Determine if the final target is THUMB.
11764 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
11767 // Strip LSB if this points to a THUMB target.
11768 const Arm_reloc_property
* reloc_property
=
11769 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
11770 gold_assert(reloc_property
!= NULL
);
11771 if (target_is_thumb
11772 && reloc_property
->uses_thumb_bit()
11773 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
11775 Arm_address stripped_value
=
11776 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
11777 symval
.set_output_value(stripped_value
);
11781 // Get the symbol value.
11782 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
11784 // Owing to pipelining, the PC relative branches below actually skip
11785 // two instructions when the branch offset is 0.
11786 Arm_address destination
;
11789 case elfcpp::R_ARM_CALL
:
11790 case elfcpp::R_ARM_JUMP24
:
11791 case elfcpp::R_ARM_PLT32
:
11793 destination
= value
+ addend
+ 8;
11795 case elfcpp::R_ARM_THM_CALL
:
11796 case elfcpp::R_ARM_THM_XPC22
:
11797 case elfcpp::R_ARM_THM_JUMP24
:
11798 case elfcpp::R_ARM_THM_JUMP19
:
11800 destination
= value
+ addend
+ 4;
11803 gold_unreachable();
11806 Reloc_stub
* stub
= NULL
;
11807 Stub_type stub_type
=
11808 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
11810 if (stub_type
!= arm_stub_none
)
11812 // Try looking up an existing stub from a stub table.
11813 Stub_table
<big_endian
>* stub_table
=
11814 arm_relobj
->stub_table(relinfo
->data_shndx
);
11815 gold_assert(stub_table
!= NULL
);
11817 // Locate stub by destination.
11818 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
11820 // Create a stub if there is not one already
11821 stub
= stub_table
->find_reloc_stub(stub_key
);
11824 // create a new stub and add it to stub table.
11825 stub
= this->stub_factory().make_reloc_stub(stub_type
);
11826 stub_table
->add_reloc_stub(stub
, stub_key
);
11829 // Record the destination address.
11830 stub
->set_destination_address(destination
11831 | (target_is_thumb
? 1 : 0));
11834 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11835 if (this->fix_cortex_a8_
11836 && (r_type
== elfcpp::R_ARM_THM_JUMP24
11837 || r_type
== elfcpp::R_ARM_THM_JUMP19
11838 || r_type
== elfcpp::R_ARM_THM_CALL
11839 || r_type
== elfcpp::R_ARM_THM_XPC22
)
11840 && (address
& 0xfffU
) == 0xffeU
)
11842 // Found a candidate. Note we haven't checked the destination is
11843 // within 4K here: if we do so (and don't create a record) we can't
11844 // tell that a branch should have been relocated when scanning later.
11845 this->cortex_a8_relocs_info_
[address
] =
11846 new Cortex_a8_reloc(stub
, r_type
,
11847 destination
| (target_is_thumb
? 1 : 0));
11851 // This function scans a relocation sections for stub generation.
11852 // The template parameter Relocate must be a class type which provides
11853 // a single function, relocate(), which implements the machine
11854 // specific part of a relocation.
11856 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11857 // SHT_REL or SHT_RELA.
11859 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11860 // of relocs. OUTPUT_SECTION is the output section.
11861 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11862 // mapped to output offsets.
11864 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11865 // VIEW_SIZE is the size. These refer to the input section, unless
11866 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11867 // the output section.
11869 template<bool big_endian
>
11870 template<int sh_type
>
11872 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
11873 const Relocate_info
<32, big_endian
>* relinfo
,
11874 const unsigned char* prelocs
,
11875 size_t reloc_count
,
11876 Output_section
* output_section
,
11877 bool needs_special_offset_handling
,
11878 const unsigned char* view
,
11879 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
11882 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
11883 const int reloc_size
=
11884 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
11886 Arm_relobj
<big_endian
>* arm_object
=
11887 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11888 unsigned int local_count
= arm_object
->local_symbol_count();
11890 gold::Default_comdat_behavior default_comdat_behavior
;
11891 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
11893 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
11895 Reltype
reloc(prelocs
);
11897 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
11898 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
11899 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
11901 r_type
= this->get_real_reloc_type(r_type
);
11903 // Only a few relocation types need stubs.
11904 if ((r_type
!= elfcpp::R_ARM_CALL
)
11905 && (r_type
!= elfcpp::R_ARM_JUMP24
)
11906 && (r_type
!= elfcpp::R_ARM_PLT32
)
11907 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
11908 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
11909 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
11910 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
11911 && (r_type
!= elfcpp::R_ARM_V4BX
))
11914 section_offset_type offset
=
11915 convert_to_section_size_type(reloc
.get_r_offset());
11917 if (needs_special_offset_handling
)
11919 offset
= output_section
->output_offset(relinfo
->object
,
11920 relinfo
->data_shndx
,
11926 // Create a v4bx stub if --fix-v4bx-interworking is used.
11927 if (r_type
== elfcpp::R_ARM_V4BX
)
11929 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
11931 // Get the BX instruction.
11932 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
11933 const Valtype
* wv
=
11934 reinterpret_cast<const Valtype
*>(view
+ offset
);
11935 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
11936 elfcpp::Swap
<32, big_endian
>::readval(wv
);
11937 const uint32_t reg
= (insn
& 0xf);
11941 // Try looking up an existing stub from a stub table.
11942 Stub_table
<big_endian
>* stub_table
=
11943 arm_object
->stub_table(relinfo
->data_shndx
);
11944 gold_assert(stub_table
!= NULL
);
11946 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
11948 // create a new stub and add it to stub table.
11949 Arm_v4bx_stub
* stub
=
11950 this->stub_factory().make_arm_v4bx_stub(reg
);
11951 gold_assert(stub
!= NULL
);
11952 stub_table
->add_arm_v4bx_stub(stub
);
11960 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
11961 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
11962 stub_addend_reader(r_type
, view
+ offset
, reloc
);
11964 const Sized_symbol
<32>* sym
;
11966 Symbol_value
<32> symval
;
11967 const Symbol_value
<32> *psymval
;
11968 bool is_defined_in_discarded_section
;
11969 unsigned int shndx
;
11970 if (r_sym
< local_count
)
11973 psymval
= arm_object
->local_symbol(r_sym
);
11975 // If the local symbol belongs to a section we are discarding,
11976 // and that section is a debug section, try to find the
11977 // corresponding kept section and map this symbol to its
11978 // counterpart in the kept section. The symbol must not
11979 // correspond to a section we are folding.
11981 shndx
= psymval
->input_shndx(&is_ordinary
);
11982 is_defined_in_discarded_section
=
11984 && shndx
!= elfcpp::SHN_UNDEF
11985 && !arm_object
->is_section_included(shndx
)
11986 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
11988 // We need to compute the would-be final value of this local
11990 if (!is_defined_in_discarded_section
)
11992 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
11993 typename
ObjType::Compute_final_local_value_status status
=
11994 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
11996 if (status
== ObjType::CFLV_OK
)
11998 // Currently we cannot handle a branch to a target in
11999 // a merged section. If this is the case, issue an error
12000 // and also free the merge symbol value.
12001 if (!symval
.has_output_value())
12003 const std::string
& section_name
=
12004 arm_object
->section_name(shndx
);
12005 arm_object
->error(_("cannot handle branch to local %u "
12006 "in a merged section %s"),
12007 r_sym
, section_name
.c_str());
12013 // We cannot determine the final value.
12020 const Symbol
* gsym
;
12021 gsym
= arm_object
->global_symbol(r_sym
);
12022 gold_assert(gsym
!= NULL
);
12023 if (gsym
->is_forwarder())
12024 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
12026 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
12027 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
12028 symval
.set_output_symtab_index(sym
->symtab_index());
12030 symval
.set_no_output_symtab_entry();
12032 // We need to compute the would-be final value of this global
12034 const Symbol_table
* symtab
= relinfo
->symtab
;
12035 const Sized_symbol
<32>* sized_symbol
=
12036 symtab
->get_sized_symbol
<32>(gsym
);
12037 Symbol_table::Compute_final_value_status status
;
12038 Arm_address value
=
12039 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
12041 // Skip this if the symbol has not output section.
12042 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
12044 symval
.set_output_value(value
);
12046 if (gsym
->type() == elfcpp::STT_TLS
)
12047 symval
.set_is_tls_symbol();
12048 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
12049 symval
.set_is_ifunc_symbol();
12052 is_defined_in_discarded_section
=
12053 (gsym
->is_defined_in_discarded_section()
12054 && gsym
->is_undefined());
12058 Symbol_value
<32> symval2
;
12059 if (is_defined_in_discarded_section
)
12061 if (comdat_behavior
== CB_UNDETERMINED
)
12063 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
12064 comdat_behavior
= default_comdat_behavior
.get(name
.c_str());
12066 if (comdat_behavior
== CB_PRETEND
)
12068 // FIXME: This case does not work for global symbols.
12069 // We have no place to store the original section index.
12070 // Fortunately this does not matter for comdat sections,
12071 // only for sections explicitly discarded by a linker
12074 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
12075 arm_object
->map_to_kept_section(shndx
, &found
);
12077 symval2
.set_output_value(value
+ psymval
->input_value());
12079 symval2
.set_output_value(0);
12083 if (comdat_behavior
== CB_WARNING
)
12084 gold_warning_at_location(relinfo
, i
, offset
,
12085 _("relocation refers to discarded "
12087 symval2
.set_output_value(0);
12089 symval2
.set_no_output_symtab_entry();
12090 psymval
= &symval2
;
12093 // If symbol is a section symbol, we don't know the actual type of
12094 // destination. Give up.
12095 if (psymval
->is_section_symbol())
12098 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
12099 addend
, view_address
+ offset
);
12103 // Scan an input section for stub generation.
12105 template<bool big_endian
>
12107 Target_arm
<big_endian
>::scan_section_for_stubs(
12108 const Relocate_info
<32, big_endian
>* relinfo
,
12109 unsigned int sh_type
,
12110 const unsigned char* prelocs
,
12111 size_t reloc_count
,
12112 Output_section
* output_section
,
12113 bool needs_special_offset_handling
,
12114 const unsigned char* view
,
12115 Arm_address view_address
,
12116 section_size_type view_size
)
12118 if (sh_type
== elfcpp::SHT_REL
)
12119 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
12124 needs_special_offset_handling
,
12128 else if (sh_type
== elfcpp::SHT_RELA
)
12129 // We do not support RELA type relocations yet. This is provided for
12131 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
12136 needs_special_offset_handling
,
12141 gold_unreachable();
12144 // Group input sections for stub generation.
12146 // We group input sections in an output section so that the total size,
12147 // including any padding space due to alignment is smaller than GROUP_SIZE
12148 // unless the only input section in group is bigger than GROUP_SIZE already.
12149 // Then an ARM stub table is created to follow the last input section
12150 // in group. For each group an ARM stub table is created an is placed
12151 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
12152 // extend the group after the stub table.
12154 template<bool big_endian
>
12156 Target_arm
<big_endian
>::group_sections(
12158 section_size_type group_size
,
12159 bool stubs_always_after_branch
,
12162 // Group input sections and insert stub table
12163 Layout::Section_list section_list
;
12164 layout
->get_executable_sections(§ion_list
);
12165 for (Layout::Section_list::const_iterator p
= section_list
.begin();
12166 p
!= section_list
.end();
12169 Arm_output_section
<big_endian
>* output_section
=
12170 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12171 output_section
->group_sections(group_size
, stubs_always_after_branch
,
12176 // Relaxation hook. This is where we do stub generation.
12178 template<bool big_endian
>
12180 Target_arm
<big_endian
>::do_relax(
12182 const Input_objects
* input_objects
,
12183 Symbol_table
* symtab
,
12187 // No need to generate stubs if this is a relocatable link.
12188 gold_assert(!parameters
->options().relocatable());
12190 // If this is the first pass, we need to group input sections into
12192 bool done_exidx_fixup
= false;
12193 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
12196 // Determine the stub group size. The group size is the absolute
12197 // value of the parameter --stub-group-size. If --stub-group-size
12198 // is passed a negative value, we restrict stubs to be always after
12199 // the stubbed branches.
12200 int32_t stub_group_size_param
=
12201 parameters
->options().stub_group_size();
12202 bool stubs_always_after_branch
= stub_group_size_param
< 0;
12203 section_size_type stub_group_size
= abs(stub_group_size_param
);
12205 if (stub_group_size
== 1)
12208 // Thumb branch range is +-4MB has to be used as the default
12209 // maximum size (a given section can contain both ARM and Thumb
12210 // code, so the worst case has to be taken into account). If we are
12211 // fixing cortex-a8 errata, the branch range has to be even smaller,
12212 // since wide conditional branch has a range of +-1MB only.
12214 // This value is 48K less than that, which allows for 4096
12215 // 12-byte stubs. If we exceed that, then we will fail to link.
12216 // The user will have to relink with an explicit group size
12218 stub_group_size
= 4145152;
12221 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
12222 // page as the first half of a 32-bit branch straddling two 4K pages.
12223 // This is a crude way of enforcing that. In addition, long conditional
12224 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
12225 // erratum, limit the group size to (1M - 12k) to avoid unreachable
12226 // cortex-A8 stubs from long conditional branches.
12227 if (this->fix_cortex_a8_
)
12229 stubs_always_after_branch
= true;
12230 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
12231 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
12234 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
12236 // Also fix .ARM.exidx section coverage.
12237 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
12238 for (Layout::Section_list::const_iterator p
=
12239 layout
->section_list().begin();
12240 p
!= layout
->section_list().end();
12242 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
12244 if (exidx_output_section
== NULL
)
12245 exidx_output_section
=
12246 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12248 // We cannot handle this now.
12249 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
12250 "non-relocatable link"),
12251 exidx_output_section
->name(),
12255 if (exidx_output_section
!= NULL
)
12257 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
12259 done_exidx_fixup
= true;
12264 // If this is not the first pass, addresses and file offsets have
12265 // been reset at this point, set them here.
12266 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12267 sp
!= this->stub_tables_
.end();
12270 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
12271 off_t off
= align_address(owner
->original_size(),
12272 (*sp
)->addralign());
12273 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
12274 owner
->offset() + off
);
12278 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
12279 // beginning of each relaxation pass, just blow away all the stubs.
12280 // Alternatively, we could selectively remove only the stubs and reloc
12281 // information for code sections that have moved since the last pass.
12282 // That would require more book-keeping.
12283 if (this->fix_cortex_a8_
)
12285 // Clear all Cortex-A8 reloc information.
12286 for (typename
Cortex_a8_relocs_info::const_iterator p
=
12287 this->cortex_a8_relocs_info_
.begin();
12288 p
!= this->cortex_a8_relocs_info_
.end();
12291 this->cortex_a8_relocs_info_
.clear();
12293 // Remove all Cortex-A8 stubs.
12294 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12295 sp
!= this->stub_tables_
.end();
12297 (*sp
)->remove_all_cortex_a8_stubs();
12300 // Scan relocs for relocation stubs
12301 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
12302 op
!= input_objects
->relobj_end();
12305 Arm_relobj
<big_endian
>* arm_relobj
=
12306 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
12307 // Lock the object so we can read from it. This is only called
12308 // single-threaded from Layout::finalize, so it is OK to lock.
12309 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
12310 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
12313 // Check all stub tables to see if any of them have their data sizes
12314 // or addresses alignments changed. These are the only things that
12316 bool any_stub_table_changed
= false;
12317 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
12318 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12319 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
12322 if ((*sp
)->update_data_size_and_addralign())
12324 // Update data size of stub table owner.
12325 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
12326 uint64_t address
= owner
->address();
12327 off_t offset
= owner
->offset();
12328 owner
->reset_address_and_file_offset();
12329 owner
->set_address_and_file_offset(address
, offset
);
12331 sections_needing_adjustment
.insert(owner
->output_section());
12332 any_stub_table_changed
= true;
12336 // Output_section_data::output_section() returns a const pointer but we
12337 // need to update output sections, so we record all output sections needing
12338 // update above and scan the sections here to find out what sections need
12340 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
12341 p
!= layout
->section_list().end();
12344 if (sections_needing_adjustment
.find(*p
)
12345 != sections_needing_adjustment
.end())
12346 (*p
)->set_section_offsets_need_adjustment();
12349 // Stop relaxation if no EXIDX fix-up and no stub table change.
12350 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
12352 // Finalize the stubs in the last relaxation pass.
12353 if (!continue_relaxation
)
12355 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
12356 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
12358 (*sp
)->finalize_stubs();
12360 // Update output local symbol counts of objects if necessary.
12361 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
12362 op
!= input_objects
->relobj_end();
12365 Arm_relobj
<big_endian
>* arm_relobj
=
12366 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
12368 // Update output local symbol counts. We need to discard local
12369 // symbols defined in parts of input sections that are discarded by
12371 if (arm_relobj
->output_local_symbol_count_needs_update())
12373 // We need to lock the object's file to update it.
12374 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
12375 arm_relobj
->update_output_local_symbol_count();
12380 return continue_relaxation
;
12383 // Relocate a stub.
12385 template<bool big_endian
>
12387 Target_arm
<big_endian
>::relocate_stub(
12389 const Relocate_info
<32, big_endian
>* relinfo
,
12390 Output_section
* output_section
,
12391 unsigned char* view
,
12392 Arm_address address
,
12393 section_size_type view_size
)
12396 const Stub_template
* stub_template
= stub
->stub_template();
12397 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
12399 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
12400 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
12402 unsigned int r_type
= insn
->r_type();
12403 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
12404 section_size_type reloc_size
= insn
->size();
12405 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
12407 // This is the address of the stub destination.
12408 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
12409 Symbol_value
<32> symval
;
12410 symval
.set_output_value(target
);
12412 // Synthesize a fake reloc just in case. We don't have a symbol so
12414 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
12415 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
12416 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
12417 reloc_write
.put_r_offset(reloc_offset
);
12418 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
12420 relocate
.relocate(relinfo
, elfcpp::SHT_REL
, this, output_section
,
12421 this->fake_relnum_for_stubs
, reloc_buffer
,
12422 NULL
, &symval
, view
+ reloc_offset
,
12423 address
+ reloc_offset
, reloc_size
);
12427 // Determine whether an object attribute tag takes an integer, a
12430 template<bool big_endian
>
12432 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
12434 if (tag
== Object_attribute::Tag_compatibility
)
12435 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12436 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
12437 else if (tag
== elfcpp::Tag_nodefaults
)
12438 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12439 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
12440 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
12441 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
12443 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
12445 return ((tag
& 1) != 0
12446 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
12447 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
12450 // Reorder attributes.
12452 // The ABI defines that Tag_conformance should be emitted first, and that
12453 // Tag_nodefaults should be second (if either is defined). This sets those
12454 // two positions, and bumps up the position of all the remaining tags to
12457 template<bool big_endian
>
12459 Target_arm
<big_endian
>::do_attributes_order(int num
) const
12461 // Reorder the known object attributes in output. We want to move
12462 // Tag_conformance to position 4 and Tag_conformance to position 5
12463 // and shift everything between 4 .. Tag_conformance - 1 to make room.
12465 return elfcpp::Tag_conformance
;
12467 return elfcpp::Tag_nodefaults
;
12468 if ((num
- 2) < elfcpp::Tag_nodefaults
)
12470 if ((num
- 1) < elfcpp::Tag_conformance
)
12475 // Scan a span of THUMB code for Cortex-A8 erratum.
12477 template<bool big_endian
>
12479 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
12480 Arm_relobj
<big_endian
>* arm_relobj
,
12481 unsigned int shndx
,
12482 section_size_type span_start
,
12483 section_size_type span_end
,
12484 const unsigned char* view
,
12485 Arm_address address
)
12487 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
12489 // The opcode is BLX.W, BL.W, B.W, Bcc.W
12490 // The branch target is in the same 4KB region as the
12491 // first half of the branch.
12492 // The instruction before the branch is a 32-bit
12493 // length non-branch instruction.
12494 section_size_type i
= span_start
;
12495 bool last_was_32bit
= false;
12496 bool last_was_branch
= false;
12497 while (i
< span_end
)
12499 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
12500 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
12501 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12502 bool is_blx
= false, is_b
= false;
12503 bool is_bl
= false, is_bcc
= false;
12505 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
12508 // Load the rest of the insn (in manual-friendly order).
12509 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12511 // Encoding T4: B<c>.W.
12512 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
12513 // Encoding T1: BL<c>.W.
12514 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
12515 // Encoding T2: BLX<c>.W.
12516 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
12517 // Encoding T3: B<c>.W (not permitted in IT block).
12518 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
12519 && (insn
& 0x07f00000U
) != 0x03800000U
);
12522 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
12524 // If this instruction is a 32-bit THUMB branch that crosses a 4K
12525 // page boundary and it follows 32-bit non-branch instruction,
12526 // we need to work around.
12527 if (is_32bit_branch
12528 && ((address
+ i
) & 0xfffU
) == 0xffeU
12530 && !last_was_branch
)
12532 // Check to see if there is a relocation stub for this branch.
12533 bool force_target_arm
= false;
12534 bool force_target_thumb
= false;
12535 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
12536 Cortex_a8_relocs_info::const_iterator p
=
12537 this->cortex_a8_relocs_info_
.find(address
+ i
);
12539 if (p
!= this->cortex_a8_relocs_info_
.end())
12541 cortex_a8_reloc
= p
->second
;
12542 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
12544 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
12545 && !target_is_thumb
)
12546 force_target_arm
= true;
12547 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
12548 && target_is_thumb
)
12549 force_target_thumb
= true;
12553 Stub_type stub_type
= arm_stub_none
;
12555 // Check if we have an offending branch instruction.
12556 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
12557 uint16_t lower_insn
= insn
& 0xffffU
;
12558 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12560 if (cortex_a8_reloc
!= NULL
12561 && cortex_a8_reloc
->reloc_stub() != NULL
)
12562 // We've already made a stub for this instruction, e.g.
12563 // it's a long branch or a Thumb->ARM stub. Assume that
12564 // stub will suffice to work around the A8 erratum (see
12565 // setting of always_after_branch above).
12569 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
12571 stub_type
= arm_stub_a8_veneer_b_cond
;
12573 else if (is_b
|| is_bl
|| is_blx
)
12575 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
12580 stub_type
= (is_blx
12581 ? arm_stub_a8_veneer_blx
12583 ? arm_stub_a8_veneer_bl
12584 : arm_stub_a8_veneer_b
));
12587 if (stub_type
!= arm_stub_none
)
12589 Arm_address pc_for_insn
= address
+ i
+ 4;
12591 // The original instruction is a BL, but the target is
12592 // an ARM instruction. If we were not making a stub,
12593 // the BL would have been converted to a BLX. Use the
12594 // BLX stub instead in that case.
12595 if (this->may_use_v5t_interworking() && force_target_arm
12596 && stub_type
== arm_stub_a8_veneer_bl
)
12598 stub_type
= arm_stub_a8_veneer_blx
;
12602 // Conversely, if the original instruction was
12603 // BLX but the target is Thumb mode, use the BL stub.
12604 else if (force_target_thumb
12605 && stub_type
== arm_stub_a8_veneer_blx
)
12607 stub_type
= arm_stub_a8_veneer_bl
;
12615 // If we found a relocation, use the proper destination,
12616 // not the offset in the (unrelocated) instruction.
12617 // Note this is always done if we switched the stub type above.
12618 if (cortex_a8_reloc
!= NULL
)
12619 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
12621 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
12623 // Add a new stub if destination address in in the same page.
12624 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
12626 Cortex_a8_stub
* stub
=
12627 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
12631 Stub_table
<big_endian
>* stub_table
=
12632 arm_relobj
->stub_table(shndx
);
12633 gold_assert(stub_table
!= NULL
);
12634 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
12639 i
+= insn_32bit
? 4 : 2;
12640 last_was_32bit
= insn_32bit
;
12641 last_was_branch
= is_32bit_branch
;
12645 // Apply the Cortex-A8 workaround.
12647 template<bool big_endian
>
12649 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
12650 const Cortex_a8_stub
* stub
,
12651 Arm_address stub_address
,
12652 unsigned char* insn_view
,
12653 Arm_address insn_address
)
12655 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
12656 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
12657 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
12658 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
12659 off_t branch_offset
= stub_address
- (insn_address
+ 4);
12661 typedef class Arm_relocate_functions
<big_endian
> RelocFuncs
;
12662 switch (stub
->stub_template()->type())
12664 case arm_stub_a8_veneer_b_cond
:
12665 // For a conditional branch, we re-write it to be an unconditional
12666 // branch to the stub. We use the THUMB-2 encoding here.
12667 upper_insn
= 0xf000U
;
12668 lower_insn
= 0xb800U
;
12670 case arm_stub_a8_veneer_b
:
12671 case arm_stub_a8_veneer_bl
:
12672 case arm_stub_a8_veneer_blx
:
12673 if ((lower_insn
& 0x5000U
) == 0x4000U
)
12674 // For a BLX instruction, make sure that the relocation is
12675 // rounded up to a word boundary. This follows the semantics of
12676 // the instruction which specifies that bit 1 of the target
12677 // address will come from bit 1 of the base address.
12678 branch_offset
= (branch_offset
+ 2) & ~3;
12680 // Put BRANCH_OFFSET back into the insn.
12681 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
12682 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
12683 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
12687 gold_unreachable();
12690 // Put the relocated value back in the object file:
12691 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
12692 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
12695 // Target selector for ARM. Note this is never instantiated directly.
12696 // It's only used in Target_selector_arm_nacl, below.
12698 template<bool big_endian
>
12699 class Target_selector_arm
: public Target_selector
12702 Target_selector_arm()
12703 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
12704 (big_endian
? "elf32-bigarm" : "elf32-littlearm"),
12705 (big_endian
? "armelfb" : "armelf"))
12709 do_instantiate_target()
12710 { return new Target_arm
<big_endian
>(); }
12713 // Fix .ARM.exidx section coverage.
12715 template<bool big_endian
>
12717 Target_arm
<big_endian
>::fix_exidx_coverage(
12719 const Input_objects
* input_objects
,
12720 Arm_output_section
<big_endian
>* exidx_section
,
12721 Symbol_table
* symtab
,
12724 // We need to look at all the input sections in output in ascending
12725 // order of of output address. We do that by building a sorted list
12726 // of output sections by addresses. Then we looks at the output sections
12727 // in order. The input sections in an output section are already sorted
12728 // by addresses within the output section.
12730 typedef std::set
<Output_section
*, output_section_address_less_than
>
12731 Sorted_output_section_list
;
12732 Sorted_output_section_list sorted_output_sections
;
12734 // Find out all the output sections of input sections pointed by
12735 // EXIDX input sections.
12736 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
12737 p
!= input_objects
->relobj_end();
12740 Arm_relobj
<big_endian
>* arm_relobj
=
12741 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
12742 std::vector
<unsigned int> shndx_list
;
12743 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
12744 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
12746 const Arm_exidx_input_section
* exidx_input_section
=
12747 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
12748 gold_assert(exidx_input_section
!= NULL
);
12749 if (!exidx_input_section
->has_errors())
12751 unsigned int text_shndx
= exidx_input_section
->link();
12752 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
12753 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
12754 sorted_output_sections
.insert(os
);
12759 // Go over the output sections in ascending order of output addresses.
12760 typedef typename Arm_output_section
<big_endian
>::Text_section_list
12762 Text_section_list sorted_text_sections
;
12763 for (typename
Sorted_output_section_list::iterator p
=
12764 sorted_output_sections
.begin();
12765 p
!= sorted_output_sections
.end();
12768 Arm_output_section
<big_endian
>* arm_output_section
=
12769 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
12770 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
12773 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
12774 merge_exidx_entries(), task
);
12777 template<bool big_endian
>
12779 Target_arm
<big_endian
>::do_define_standard_symbols(
12780 Symbol_table
* symtab
,
12783 // Handle the .ARM.exidx section.
12784 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
12786 if (exidx_section
!= NULL
)
12788 // Create __exidx_start and __exidx_end symbols.
12789 symtab
->define_in_output_data("__exidx_start",
12791 Symbol_table::PREDEFINED
,
12795 elfcpp::STT_NOTYPE
,
12796 elfcpp::STB_GLOBAL
,
12797 elfcpp::STV_HIDDEN
,
12799 false, // offset_is_from_end
12800 true); // only_if_ref
12802 symtab
->define_in_output_data("__exidx_end",
12804 Symbol_table::PREDEFINED
,
12808 elfcpp::STT_NOTYPE
,
12809 elfcpp::STB_GLOBAL
,
12810 elfcpp::STV_HIDDEN
,
12812 true, // offset_is_from_end
12813 true); // only_if_ref
12817 // Define __exidx_start and __exidx_end even when .ARM.exidx
12818 // section is missing to match ld's behaviour.
12819 symtab
->define_as_constant("__exidx_start", NULL
,
12820 Symbol_table::PREDEFINED
,
12821 0, 0, elfcpp::STT_OBJECT
,
12822 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12824 symtab
->define_as_constant("__exidx_end", NULL
,
12825 Symbol_table::PREDEFINED
,
12826 0, 0, elfcpp::STT_OBJECT
,
12827 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
12832 // NaCl variant. It uses different PLT contents.
12834 template<bool big_endian
>
12835 class Output_data_plt_arm_nacl
;
12837 template<bool big_endian
>
12838 class Target_arm_nacl
: public Target_arm
<big_endian
>
12842 : Target_arm
<big_endian
>(&arm_nacl_info
)
12846 virtual Output_data_plt_arm
<big_endian
>*
12849 Arm_output_data_got
<big_endian
>* got
,
12850 Output_data_space
* got_plt
,
12851 Output_data_space
* got_irelative
)
12852 { return new Output_data_plt_arm_nacl
<big_endian
>(
12853 layout
, got
, got_plt
, got_irelative
); }
12856 static const Target::Target_info arm_nacl_info
;
12859 template<bool big_endian
>
12860 const Target::Target_info Target_arm_nacl
<big_endian
>::arm_nacl_info
=
12863 big_endian
, // is_big_endian
12864 elfcpp::EM_ARM
, // machine_code
12865 false, // has_make_symbol
12866 false, // has_resolve
12867 false, // has_code_fill
12868 true, // is_default_stack_executable
12869 false, // can_icf_inline_merge_sections
12871 "/lib/ld-nacl-arm.so.1", // dynamic_linker
12872 0x20000, // default_text_segment_address
12873 0x10000, // abi_pagesize (overridable by -z max-page-size)
12874 0x10000, // common_pagesize (overridable by -z common-page-size)
12875 true, // isolate_execinstr
12876 0x10000000, // rosegment_gap
12877 elfcpp::SHN_UNDEF
, // small_common_shndx
12878 elfcpp::SHN_UNDEF
, // large_common_shndx
12879 0, // small_common_section_flags
12880 0, // large_common_section_flags
12881 ".ARM.attributes", // attributes_section
12882 "aeabi", // attributes_vendor
12883 "_start", // entry_symbol_name
12884 32, // hash_entry_size
12887 template<bool big_endian
>
12888 class Output_data_plt_arm_nacl
: public Output_data_plt_arm
<big_endian
>
12891 Output_data_plt_arm_nacl(
12893 Arm_output_data_got
<big_endian
>* got
,
12894 Output_data_space
* got_plt
,
12895 Output_data_space
* got_irelative
)
12896 : Output_data_plt_arm
<big_endian
>(layout
, 16, got
, got_plt
, got_irelative
)
12900 // Return the offset of the first non-reserved PLT entry.
12901 virtual unsigned int
12902 do_first_plt_entry_offset() const
12903 { return sizeof(first_plt_entry
); }
12905 // Return the size of a PLT entry.
12906 virtual unsigned int
12907 do_get_plt_entry_size() const
12908 { return sizeof(plt_entry
); }
12911 do_fill_first_plt_entry(unsigned char* pov
,
12912 Arm_address got_address
,
12913 Arm_address plt_address
);
12916 do_fill_plt_entry(unsigned char* pov
,
12917 Arm_address got_address
,
12918 Arm_address plt_address
,
12919 unsigned int got_offset
,
12920 unsigned int plt_offset
);
12923 inline uint32_t arm_movw_immediate(uint32_t value
)
12925 return (value
& 0x00000fff) | ((value
& 0x0000f000) << 4);
12928 inline uint32_t arm_movt_immediate(uint32_t value
)
12930 return ((value
& 0x0fff0000) >> 16) | ((value
& 0xf0000000) >> 12);
12933 // Template for the first PLT entry.
12934 static const uint32_t first_plt_entry
[16];
12936 // Template for subsequent PLT entries.
12937 static const uint32_t plt_entry
[4];
12940 // The first entry in the PLT.
12941 template<bool big_endian
>
12942 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::first_plt_entry
[16] =
12945 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
12946 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
12947 0xe08cc00f, // add ip, ip, pc
12948 0xe52dc008, // str ip, [sp, #-8]!
12950 0xe3ccc103, // bic ip, ip, #0xc0000000
12951 0xe59cc000, // ldr ip, [ip]
12952 0xe3ccc13f, // bic ip, ip, #0xc000000f
12953 0xe12fff1c, // bx ip
12959 0xe50dc004, // str ip, [sp, #-4]
12961 0xe3ccc103, // bic ip, ip, #0xc0000000
12962 0xe59cc000, // ldr ip, [ip]
12963 0xe3ccc13f, // bic ip, ip, #0xc000000f
12964 0xe12fff1c, // bx ip
12967 template<bool big_endian
>
12969 Output_data_plt_arm_nacl
<big_endian
>::do_fill_first_plt_entry(
12970 unsigned char* pov
,
12971 Arm_address got_address
,
12972 Arm_address plt_address
)
12974 // Write first PLT entry. All but first two words are constants.
12975 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
12976 / sizeof(first_plt_entry
[0]));
12978 int32_t got_displacement
= got_address
+ 8 - (plt_address
+ 16);
12980 elfcpp::Swap
<32, big_endian
>::writeval
12981 (pov
+ 0, first_plt_entry
[0] | arm_movw_immediate (got_displacement
));
12982 elfcpp::Swap
<32, big_endian
>::writeval
12983 (pov
+ 4, first_plt_entry
[1] | arm_movt_immediate (got_displacement
));
12985 for (size_t i
= 2; i
< num_first_plt_words
; ++i
)
12986 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
12989 // Subsequent entries in the PLT.
12991 template<bool big_endian
>
12992 const uint32_t Output_data_plt_arm_nacl
<big_endian
>::plt_entry
[4] =
12994 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
12995 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
12996 0xe08cc00f, // add ip, ip, pc
12997 0xea000000, // b .Lplt_tail
13000 template<bool big_endian
>
13002 Output_data_plt_arm_nacl
<big_endian
>::do_fill_plt_entry(
13003 unsigned char* pov
,
13004 Arm_address got_address
,
13005 Arm_address plt_address
,
13006 unsigned int got_offset
,
13007 unsigned int plt_offset
)
13009 // Calculate the displacement between the PLT slot and the
13010 // common tail that's part of the special initial PLT slot.
13011 int32_t tail_displacement
= (plt_address
+ (11 * sizeof(uint32_t))
13012 - (plt_address
+ plt_offset
13013 + sizeof(plt_entry
) + sizeof(uint32_t)));
13014 gold_assert((tail_displacement
& 3) == 0);
13015 tail_displacement
>>= 2;
13017 gold_assert ((tail_displacement
& 0xff000000) == 0
13018 || (-tail_displacement
& 0xff000000) == 0);
13020 // Calculate the displacement between the PLT slot and the entry
13021 // in the GOT. The offset accounts for the value produced by
13022 // adding to pc in the penultimate instruction of the PLT stub.
13023 const int32_t got_displacement
= (got_address
+ got_offset
13024 - (plt_address
+ sizeof(plt_entry
)));
13026 elfcpp::Swap
<32, big_endian
>::writeval
13027 (pov
+ 0, plt_entry
[0] | arm_movw_immediate (got_displacement
));
13028 elfcpp::Swap
<32, big_endian
>::writeval
13029 (pov
+ 4, plt_entry
[1] | arm_movt_immediate (got_displacement
));
13030 elfcpp::Swap
<32, big_endian
>::writeval
13031 (pov
+ 8, plt_entry
[2]);
13032 elfcpp::Swap
<32, big_endian
>::writeval
13033 (pov
+ 12, plt_entry
[3] | (tail_displacement
& 0x00ffffff));
13036 // Target selectors.
13038 template<bool big_endian
>
13039 class Target_selector_arm_nacl
13040 : public Target_selector_nacl
<Target_selector_arm
<big_endian
>,
13041 Target_arm_nacl
<big_endian
> >
13044 Target_selector_arm_nacl()
13045 : Target_selector_nacl
<Target_selector_arm
<big_endian
>,
13046 Target_arm_nacl
<big_endian
> >(
13048 big_endian
? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
13049 big_endian
? "armelfb_nacl" : "armelf_nacl")
13053 Target_selector_arm_nacl
<false> target_selector_arm
;
13054 Target_selector_arm_nacl
<true> target_selector_armbe
;
13056 } // End anonymous namespace.