1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian
>
61 class Output_data_plt_arm
;
63 template<bool big_endian
>
66 template<bool big_endian
>
67 class Arm_input_section
;
69 class Arm_exidx_cantunwind
;
71 class Arm_exidx_merged_section
;
73 class Arm_exidx_fixup
;
75 template<bool big_endian
>
76 class Arm_output_section
;
78 class Arm_exidx_input_section
;
80 template<bool big_endian
>
83 template<bool big_endian
>
84 class Arm_relocate_functions
;
86 template<bool big_endian
>
87 class Arm_output_data_got
;
89 template<bool big_endian
>
93 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
95 // Maximum branch offsets for ARM, THUMB and THUMB2.
96 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
97 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
98 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
99 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
100 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
101 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
103 // Thread Control Block size.
104 const size_t ARM_TCB_SIZE
= 8;
106 // The arm target class.
108 // This is a very simple port of gold for ARM-EABI. It is intended for
109 // supporting Android only for the time being.
112 // - Implement all static relocation types documented in arm-reloc.def.
113 // - Make PLTs more flexible for different architecture features like
115 // There are probably a lot more.
117 // Ideally we would like to avoid using global variables but this is used
118 // very in many places and sometimes in loops. If we use a function
119 // returning a static instance of Arm_reloc_property_table, it will be very
120 // slow in an threaded environment since the static instance needs to be
121 // locked. The pointer is below initialized in the
122 // Target::do_select_as_default_target() hook so that we do not spend time
123 // building the table if we are not linking ARM objects.
125 // An alternative is to to process the information in arm-reloc.def in
126 // compilation time and generate a representation of it in PODs only. That
127 // way we can avoid initialization when the linker starts.
129 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
131 // Instruction template class. This class is similar to the insn_sequence
132 // struct in bfd/elf32-arm.c.
137 // Types of instruction templates.
141 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
142 // templates with class-specific semantics. Currently this is used
143 // only by the Cortex_a8_stub class for handling condition codes in
144 // conditional branches.
145 THUMB16_SPECIAL_TYPE
,
151 // Factory methods to create instruction templates in different formats.
153 static const Insn_template
154 thumb16_insn(uint32_t data
)
155 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
157 // A Thumb conditional branch, in which the proper condition is inserted
158 // when we build the stub.
159 static const Insn_template
160 thumb16_bcond_insn(uint32_t data
)
161 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
163 static const Insn_template
164 thumb32_insn(uint32_t data
)
165 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
167 static const Insn_template
168 thumb32_b_insn(uint32_t data
, int reloc_addend
)
170 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
174 static const Insn_template
175 arm_insn(uint32_t data
)
176 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
178 static const Insn_template
179 arm_rel_insn(unsigned data
, int reloc_addend
)
180 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
182 static const Insn_template
183 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
184 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
186 // Accessors. This class is used for read-only objects so no modifiers
191 { return this->data_
; }
193 // Return the instruction sequence type of this.
196 { return this->type_
; }
198 // Return the ARM relocation type of this.
201 { return this->r_type_
; }
205 { return this->reloc_addend_
; }
207 // Return size of instruction template in bytes.
211 // Return byte-alignment of instruction template.
216 // We make the constructor private to ensure that only the factory
219 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
220 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
223 // Instruction specific data. This is used to store information like
224 // some of the instruction bits.
226 // Instruction template type.
228 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
229 unsigned int r_type_
;
230 // Relocation addend.
231 int32_t reloc_addend_
;
234 // Macro for generating code to stub types. One entry per long/short
238 DEF_STUB(long_branch_any_any) \
239 DEF_STUB(long_branch_v4t_arm_thumb) \
240 DEF_STUB(long_branch_thumb_only) \
241 DEF_STUB(long_branch_v4t_thumb_thumb) \
242 DEF_STUB(long_branch_v4t_thumb_arm) \
243 DEF_STUB(short_branch_v4t_thumb_arm) \
244 DEF_STUB(long_branch_any_arm_pic) \
245 DEF_STUB(long_branch_any_thumb_pic) \
246 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
247 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
248 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
249 DEF_STUB(long_branch_thumb_only_pic) \
250 DEF_STUB(a8_veneer_b_cond) \
251 DEF_STUB(a8_veneer_b) \
252 DEF_STUB(a8_veneer_bl) \
253 DEF_STUB(a8_veneer_blx) \
254 DEF_STUB(v4_veneer_bx)
258 #define DEF_STUB(x) arm_stub_##x,
264 // First reloc stub type.
265 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
266 // Last reloc stub type.
267 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
269 // First Cortex-A8 stub type.
270 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
271 // Last Cortex-A8 stub type.
272 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
275 arm_stub_type_last
= arm_stub_v4_veneer_bx
279 // Stub template class. Templates are meant to be read-only objects.
280 // A stub template for a stub type contains all read-only attributes
281 // common to all stubs of the same type.
286 Stub_template(Stub_type
, const Insn_template
*, size_t);
294 { return this->type_
; }
296 // Return an array of instruction templates.
299 { return this->insns_
; }
301 // Return size of template in number of instructions.
304 { return this->insn_count_
; }
306 // Return size of template in bytes.
309 { return this->size_
; }
311 // Return alignment of the stub template.
314 { return this->alignment_
; }
316 // Return whether entry point is in thumb mode.
318 entry_in_thumb_mode() const
319 { return this->entry_in_thumb_mode_
; }
321 // Return number of relocations in this template.
324 { return this->relocs_
.size(); }
326 // Return index of the I-th instruction with relocation.
328 reloc_insn_index(size_t i
) const
330 gold_assert(i
< this->relocs_
.size());
331 return this->relocs_
[i
].first
;
334 // Return the offset of the I-th instruction with relocation from the
335 // beginning of the stub.
337 reloc_offset(size_t i
) const
339 gold_assert(i
< this->relocs_
.size());
340 return this->relocs_
[i
].second
;
344 // This contains information about an instruction template with a relocation
345 // and its offset from start of stub.
346 typedef std::pair
<size_t, section_size_type
> Reloc
;
348 // A Stub_template may not be copied. We want to share templates as much
350 Stub_template(const Stub_template
&);
351 Stub_template
& operator=(const Stub_template
&);
355 // Points to an array of Insn_templates.
356 const Insn_template
* insns_
;
357 // Number of Insn_templates in insns_[].
359 // Size of templated instructions in bytes.
361 // Alignment of templated instructions.
363 // Flag to indicate if entry is in thumb mode.
364 bool entry_in_thumb_mode_
;
365 // A table of reloc instruction indices and offsets. We can find these by
366 // looking at the instruction templates but we pre-compute and then stash
367 // them here for speed.
368 std::vector
<Reloc
> relocs_
;
372 // A class for code stubs. This is a base class for different type of
373 // stubs used in the ARM target.
379 static const section_offset_type invalid_offset
=
380 static_cast<section_offset_type
>(-1);
383 Stub(const Stub_template
* stub_template
)
384 : stub_template_(stub_template
), offset_(invalid_offset
)
391 // Return the stub template.
393 stub_template() const
394 { return this->stub_template_
; }
396 // Return offset of code stub from beginning of its containing stub table.
400 gold_assert(this->offset_
!= invalid_offset
);
401 return this->offset_
;
404 // Set offset of code stub from beginning of its containing stub table.
406 set_offset(section_offset_type offset
)
407 { this->offset_
= offset
; }
409 // Return the relocation target address of the i-th relocation in the
410 // stub. This must be defined in a child class.
412 reloc_target(size_t i
)
413 { return this->do_reloc_target(i
); }
415 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
417 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
418 { this->do_write(view
, view_size
, big_endian
); }
420 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
421 // for the i-th instruction.
423 thumb16_special(size_t i
)
424 { return this->do_thumb16_special(i
); }
427 // This must be defined in the child class.
429 do_reloc_target(size_t) = 0;
431 // This may be overridden in the child class.
433 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
436 this->do_fixed_endian_write
<true>(view
, view_size
);
438 this->do_fixed_endian_write
<false>(view
, view_size
);
441 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
442 // instruction template.
444 do_thumb16_special(size_t)
445 { gold_unreachable(); }
448 // A template to implement do_write.
449 template<bool big_endian
>
451 do_fixed_endian_write(unsigned char*, section_size_type
);
454 const Stub_template
* stub_template_
;
455 // Offset within the section of containing this stub.
456 section_offset_type offset_
;
459 // Reloc stub class. These are stubs we use to fix up relocation because
460 // of limited branch ranges.
462 class Reloc_stub
: public Stub
465 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
466 // We assume we never jump to this address.
467 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
469 // Return destination address.
471 destination_address() const
473 gold_assert(this->destination_address_
!= this->invalid_address
);
474 return this->destination_address_
;
477 // Set destination address.
479 set_destination_address(Arm_address address
)
481 gold_assert(address
!= this->invalid_address
);
482 this->destination_address_
= address
;
485 // Reset destination address.
487 reset_destination_address()
488 { this->destination_address_
= this->invalid_address
; }
490 // Determine stub type for a branch of a relocation of R_TYPE going
491 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
492 // the branch target is a thumb instruction. TARGET is used for look
493 // up ARM-specific linker settings.
495 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
496 Arm_address branch_target
, bool target_is_thumb
);
498 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
499 // and an addend. Since we treat global and local symbol differently, we
500 // use a Symbol object for a global symbol and a object-index pair for
505 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
506 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
507 // and R_SYM must not be invalid_index.
508 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
509 unsigned int r_sym
, int32_t addend
)
510 : stub_type_(stub_type
), addend_(addend
)
514 this->r_sym_
= Reloc_stub::invalid_index
;
515 this->u_
.symbol
= symbol
;
519 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
520 this->r_sym_
= r_sym
;
521 this->u_
.relobj
= relobj
;
528 // Accessors: Keys are meant to be read-only object so no modifiers are
534 { return this->stub_type_
; }
536 // Return the local symbol index or invalid_index.
539 { return this->r_sym_
; }
541 // Return the symbol if there is one.
544 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
546 // Return the relobj if there is one.
549 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
551 // Whether this equals to another key k.
553 eq(const Key
& k
) const
555 return ((this->stub_type_
== k
.stub_type_
)
556 && (this->r_sym_
== k
.r_sym_
)
557 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
558 ? (this->u_
.relobj
== k
.u_
.relobj
)
559 : (this->u_
.symbol
== k
.u_
.symbol
))
560 && (this->addend_
== k
.addend_
));
563 // Return a hash value.
567 return (this->stub_type_
569 ^ gold::string_hash
<char>(
570 (this->r_sym_
!= Reloc_stub::invalid_index
)
571 ? this->u_
.relobj
->name().c_str()
572 : this->u_
.symbol
->name())
576 // Functors for STL associative containers.
580 operator()(const Key
& k
) const
581 { return k
.hash_value(); }
587 operator()(const Key
& k1
, const Key
& k2
) const
588 { return k1
.eq(k2
); }
591 // Name of key. This is mainly for debugging.
597 Stub_type stub_type_
;
598 // If this is a local symbol, this is the index in the defining object.
599 // Otherwise, it is invalid_index for a global symbol.
601 // If r_sym_ is an invalid index, this points to a global symbol.
602 // Otherwise, it points to a relobj. We used the unsized and target
603 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
604 // Arm_relobj, in order to avoid making the stub class a template
605 // as most of the stub machinery is endianness-neutral. However, it
606 // may require a bit of casting done by users of this class.
609 const Symbol
* symbol
;
610 const Relobj
* relobj
;
612 // Addend associated with a reloc.
617 // Reloc_stubs are created via a stub factory. So these are protected.
618 Reloc_stub(const Stub_template
* stub_template
)
619 : Stub(stub_template
), destination_address_(invalid_address
)
625 friend class Stub_factory
;
627 // Return the relocation target address of the i-th relocation in the
630 do_reloc_target(size_t i
)
632 // All reloc stub have only one relocation.
634 return this->destination_address_
;
638 // Address of destination.
639 Arm_address destination_address_
;
642 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
643 // THUMB branch that meets the following conditions:
645 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
646 // branch address is 0xffe.
647 // 2. The branch target address is in the same page as the first word of the
649 // 3. The branch follows a 32-bit instruction which is not a branch.
651 // To do the fix up, we need to store the address of the branch instruction
652 // and its target at least. We also need to store the original branch
653 // instruction bits for the condition code in a conditional branch. The
654 // condition code is used in a special instruction template. We also want
655 // to identify input sections needing Cortex-A8 workaround quickly. We store
656 // extra information about object and section index of the code section
657 // containing a branch being fixed up. The information is used to mark
658 // the code section when we finalize the Cortex-A8 stubs.
661 class Cortex_a8_stub
: public Stub
667 // Return the object of the code section containing the branch being fixed
671 { return this->relobj_
; }
673 // Return the section index of the code section containing the branch being
677 { return this->shndx_
; }
679 // Return the source address of stub. This is the address of the original
680 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
683 source_address() const
684 { return this->source_address_
; }
686 // Return the destination address of the stub. This is the branch taken
687 // address of the original branch instruction. LSB is 1 if it is a THUMB
688 // instruction address.
690 destination_address() const
691 { return this->destination_address_
; }
693 // Return the instruction being fixed up.
695 original_insn() const
696 { return this->original_insn_
; }
699 // Cortex_a8_stubs are created via a stub factory. So these are protected.
700 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
701 unsigned int shndx
, Arm_address source_address
,
702 Arm_address destination_address
, uint32_t original_insn
)
703 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
704 source_address_(source_address
| 1U),
705 destination_address_(destination_address
),
706 original_insn_(original_insn
)
709 friend class Stub_factory
;
711 // Return the relocation target address of the i-th relocation in the
714 do_reloc_target(size_t i
)
716 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
718 // The conditional branch veneer has two relocations.
720 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
724 // All other Cortex-A8 stubs have only one relocation.
726 return this->destination_address_
;
730 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
732 do_thumb16_special(size_t);
735 // Object of the code section containing the branch being fixed up.
737 // Section index of the code section containing the branch begin fixed up.
739 // Source address of original branch.
740 Arm_address source_address_
;
741 // Destination address of the original branch.
742 Arm_address destination_address_
;
743 // Original branch instruction. This is needed for copying the condition
744 // code from a condition branch to its stub.
745 uint32_t original_insn_
;
748 // ARMv4 BX Rx branch relocation stub class.
749 class Arm_v4bx_stub
: public Stub
755 // Return the associated register.
758 { return this->reg_
; }
761 // Arm V4BX stubs are created via a stub factory. So these are protected.
762 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
763 : Stub(stub_template
), reg_(reg
)
766 friend class Stub_factory
;
768 // Return the relocation target address of the i-th relocation in the
771 do_reloc_target(size_t)
772 { gold_unreachable(); }
774 // This may be overridden in the child class.
776 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
779 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
781 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
785 // A template to implement do_write.
786 template<bool big_endian
>
788 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
790 const Insn_template
* insns
= this->stub_template()->insns();
791 elfcpp::Swap
<32, big_endian
>::writeval(view
,
793 + (this->reg_
<< 16)));
794 view
+= insns
[0].size();
795 elfcpp::Swap
<32, big_endian
>::writeval(view
,
796 (insns
[1].data() + this->reg_
));
797 view
+= insns
[1].size();
798 elfcpp::Swap
<32, big_endian
>::writeval(view
,
799 (insns
[2].data() + this->reg_
));
802 // A register index (r0-r14), which is associated with the stub.
806 // Stub factory class.
811 // Return the unique instance of this class.
812 static const Stub_factory
&
815 static Stub_factory singleton
;
819 // Make a relocation stub.
821 make_reloc_stub(Stub_type stub_type
) const
823 gold_assert(stub_type
>= arm_stub_reloc_first
824 && stub_type
<= arm_stub_reloc_last
);
825 return new Reloc_stub(this->stub_templates_
[stub_type
]);
828 // Make a Cortex-A8 stub.
830 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
831 Arm_address source
, Arm_address destination
,
832 uint32_t original_insn
) const
834 gold_assert(stub_type
>= arm_stub_cortex_a8_first
835 && stub_type
<= arm_stub_cortex_a8_last
);
836 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
837 source
, destination
, original_insn
);
840 // Make an ARM V4BX relocation stub.
841 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
843 make_arm_v4bx_stub(uint32_t reg
) const
845 gold_assert(reg
< 0xf);
846 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
851 // Constructor and destructor are protected since we only return a single
852 // instance created in Stub_factory::get_instance().
856 // A Stub_factory may not be copied since it is a singleton.
857 Stub_factory(const Stub_factory
&);
858 Stub_factory
& operator=(Stub_factory
&);
860 // Stub templates. These are initialized in the constructor.
861 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
864 // A class to hold stubs for the ARM target.
866 template<bool big_endian
>
867 class Stub_table
: public Output_data
870 Stub_table(Arm_input_section
<big_endian
>* owner
)
871 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
872 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
873 prev_data_size_(0), prev_addralign_(1)
879 // Owner of this stub table.
880 Arm_input_section
<big_endian
>*
882 { return this->owner_
; }
884 // Whether this stub table is empty.
888 return (this->reloc_stubs_
.empty()
889 && this->cortex_a8_stubs_
.empty()
890 && this->arm_v4bx_stubs_
.empty());
893 // Return the current data size.
895 current_data_size() const
896 { return this->current_data_size_for_child(); }
898 // Add a STUB using KEY. The caller is responsible for avoiding addition
899 // if a STUB with the same key has already been added.
901 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
903 const Stub_template
* stub_template
= stub
->stub_template();
904 gold_assert(stub_template
->type() == key
.stub_type());
905 this->reloc_stubs_
[key
] = stub
;
907 // Assign stub offset early. We can do this because we never remove
908 // reloc stubs and they are in the beginning of the stub table.
909 uint64_t align
= stub_template
->alignment();
910 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
911 stub
->set_offset(this->reloc_stubs_size_
);
912 this->reloc_stubs_size_
+= stub_template
->size();
913 this->reloc_stubs_addralign_
=
914 std::max(this->reloc_stubs_addralign_
, align
);
917 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
918 // The caller is responsible for avoiding addition if a STUB with the same
919 // address has already been added.
921 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
923 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
924 this->cortex_a8_stubs_
.insert(value
);
927 // Add an ARM V4BX relocation stub. A register index will be retrieved
930 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
932 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
933 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
936 // Remove all Cortex-A8 stubs.
938 remove_all_cortex_a8_stubs();
940 // Look up a relocation stub using KEY. Return NULL if there is none.
942 find_reloc_stub(const Reloc_stub::Key
& key
) const
944 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
945 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
948 // Look up an arm v4bx relocation stub using the register index.
949 // Return NULL if there is none.
951 find_arm_v4bx_stub(const uint32_t reg
) const
953 gold_assert(reg
< 0xf);
954 return this->arm_v4bx_stubs_
[reg
];
957 // Relocate stubs in this stub table.
959 relocate_stubs(const Relocate_info
<32, big_endian
>*,
960 Target_arm
<big_endian
>*, Output_section
*,
961 unsigned char*, Arm_address
, section_size_type
);
963 // Update data size and alignment at the end of a relaxation pass. Return
964 // true if either data size or alignment is different from that of the
965 // previous relaxation pass.
967 update_data_size_and_addralign();
969 // Finalize stubs. Set the offsets of all stubs and mark input sections
970 // needing the Cortex-A8 workaround.
974 // Apply Cortex-A8 workaround to an address range.
976 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
977 unsigned char*, Arm_address
,
981 // Write out section contents.
983 do_write(Output_file
*);
985 // Return the required alignment.
988 { return this->prev_addralign_
; }
990 // Reset address and file offset.
992 do_reset_address_and_file_offset()
993 { this->set_current_data_size_for_child(this->prev_data_size_
); }
995 // Set final data size.
997 set_final_data_size()
998 { this->set_data_size(this->current_data_size()); }
1001 // Relocate one stub.
1003 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1004 Target_arm
<big_endian
>*, Output_section
*,
1005 unsigned char*, Arm_address
, section_size_type
);
1007 // Unordered map of relocation stubs.
1009 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1010 Reloc_stub::Key::equal_to
>
1013 // List of Cortex-A8 stubs ordered by addresses of branches being
1014 // fixed up in output.
1015 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1016 // List of Arm V4BX relocation stubs ordered by associated registers.
1017 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1019 // Owner of this stub table.
1020 Arm_input_section
<big_endian
>* owner_
;
1021 // The relocation stubs.
1022 Reloc_stub_map reloc_stubs_
;
1023 // Size of reloc stubs.
1024 off_t reloc_stubs_size_
;
1025 // Maximum address alignment of reloc stubs.
1026 uint64_t reloc_stubs_addralign_
;
1027 // The cortex_a8_stubs.
1028 Cortex_a8_stub_list cortex_a8_stubs_
;
1029 // The Arm V4BX relocation stubs.
1030 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1031 // data size of this in the previous pass.
1032 off_t prev_data_size_
;
1033 // address alignment of this in the previous pass.
1034 uint64_t prev_addralign_
;
1037 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1038 // we add to the end of an EXIDX input section that goes into the output.
1040 class Arm_exidx_cantunwind
: public Output_section_data
1043 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1044 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1047 // Return the object containing the section pointed by this.
1050 { return this->relobj_
; }
1052 // Return the section index of the section pointed by this.
1055 { return this->shndx_
; }
1059 do_write(Output_file
* of
)
1061 if (parameters
->target().is_big_endian())
1062 this->do_fixed_endian_write
<true>(of
);
1064 this->do_fixed_endian_write
<false>(of
);
1067 // Write to a map file.
1069 do_print_to_mapfile(Mapfile
* mapfile
) const
1070 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1073 // Implement do_write for a given endianness.
1074 template<bool big_endian
>
1076 do_fixed_endian_write(Output_file
*);
1078 // The object containing the section pointed by this.
1080 // The section index of the section pointed by this.
1081 unsigned int shndx_
;
1084 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1085 // Offset map is used to map input section offset within the EXIDX section
1086 // to the output offset from the start of this EXIDX section.
1088 typedef std::map
<section_offset_type
, section_offset_type
>
1089 Arm_exidx_section_offset_map
;
1091 // Arm_exidx_merged_section class. This represents an EXIDX input section
1092 // with some of its entries merged.
1094 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1097 // Constructor for Arm_exidx_merged_section.
1098 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1099 // SECTION_OFFSET_MAP points to a section offset map describing how
1100 // parts of the input section are mapped to output. DELETED_BYTES is
1101 // the number of bytes deleted from the EXIDX input section.
1102 Arm_exidx_merged_section(
1103 const Arm_exidx_input_section
& exidx_input_section
,
1104 const Arm_exidx_section_offset_map
& section_offset_map
,
1105 uint32_t deleted_bytes
);
1107 // Build output contents.
1109 build_contents(const unsigned char*, section_size_type
);
1111 // Return the original EXIDX input section.
1112 const Arm_exidx_input_section
&
1113 exidx_input_section() const
1114 { return this->exidx_input_section_
; }
1116 // Return the section offset map.
1117 const Arm_exidx_section_offset_map
&
1118 section_offset_map() const
1119 { return this->section_offset_map_
; }
1122 // Write merged section into file OF.
1124 do_write(Output_file
* of
);
1127 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1128 section_offset_type
*) const;
1131 // Original EXIDX input section.
1132 const Arm_exidx_input_section
& exidx_input_section_
;
1133 // Section offset map.
1134 const Arm_exidx_section_offset_map
& section_offset_map_
;
1135 // Merged section contents. We need to keep build the merged section
1136 // and save it here to avoid accessing the original EXIDX section when
1137 // we cannot lock the sections' object.
1138 unsigned char* section_contents_
;
1141 // A class to wrap an ordinary input section containing executable code.
1143 template<bool big_endian
>
1144 class Arm_input_section
: public Output_relaxed_input_section
1147 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1148 : Output_relaxed_input_section(relobj
, shndx
, 1),
1149 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1150 original_contents_(NULL
)
1153 ~Arm_input_section()
1154 { delete[] this->original_contents_
; }
1160 // Whether this is a stub table owner.
1162 is_stub_table_owner() const
1163 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1165 // Return the stub table.
1166 Stub_table
<big_endian
>*
1168 { return this->stub_table_
; }
1170 // Set the stub_table.
1172 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1173 { this->stub_table_
= stub_table
; }
1175 // Downcast a base pointer to an Arm_input_section pointer. This is
1176 // not type-safe but we only use Arm_input_section not the base class.
1177 static Arm_input_section
<big_endian
>*
1178 as_arm_input_section(Output_relaxed_input_section
* poris
)
1179 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1181 // Return the original size of the section.
1183 original_size() const
1184 { return this->original_size_
; }
1187 // Write data to output file.
1189 do_write(Output_file
*);
1191 // Return required alignment of this.
1193 do_addralign() const
1195 if (this->is_stub_table_owner())
1196 return std::max(this->stub_table_
->addralign(),
1197 static_cast<uint64_t>(this->original_addralign_
));
1199 return this->original_addralign_
;
1202 // Finalize data size.
1204 set_final_data_size();
1206 // Reset address and file offset.
1208 do_reset_address_and_file_offset();
1212 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1213 section_offset_type offset
,
1214 section_offset_type
* poutput
) const
1216 if ((object
== this->relobj())
1217 && (shndx
== this->shndx())
1220 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1230 // Copying is not allowed.
1231 Arm_input_section(const Arm_input_section
&);
1232 Arm_input_section
& operator=(const Arm_input_section
&);
1234 // Address alignment of the original input section.
1235 uint32_t original_addralign_
;
1236 // Section size of the original input section.
1237 uint32_t original_size_
;
1239 Stub_table
<big_endian
>* stub_table_
;
1240 // Original section contents. We have to make a copy here since the file
1241 // containing the original section may not be locked when we need to access
1243 unsigned char* original_contents_
;
1246 // Arm_exidx_fixup class. This is used to define a number of methods
1247 // and keep states for fixing up EXIDX coverage.
1249 class Arm_exidx_fixup
1252 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1253 bool merge_exidx_entries
= true)
1254 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1255 last_inlined_entry_(0), last_input_section_(NULL
),
1256 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1257 merge_exidx_entries_(merge_exidx_entries
)
1261 { delete this->section_offset_map_
; }
1263 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1264 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1265 // number of bytes to be deleted in output. If parts of the input EXIDX
1266 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1267 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1268 // responsible for releasing it.
1269 template<bool big_endian
>
1271 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1272 const unsigned char* section_contents
,
1273 section_size_type section_size
,
1274 Arm_exidx_section_offset_map
** psection_offset_map
);
1276 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1277 // input section, if there is not one already.
1279 add_exidx_cantunwind_as_needed();
1281 // Return the output section for the text section which is linked to the
1282 // first exidx input in output.
1284 first_output_text_section() const
1285 { return this->first_output_text_section_
; }
1288 // Copying is not allowed.
1289 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1290 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1292 // Type of EXIDX unwind entry.
1297 // EXIDX_CANTUNWIND.
1298 UT_EXIDX_CANTUNWIND
,
1305 // Process an EXIDX entry. We only care about the second word of the
1306 // entry. Return true if the entry can be deleted.
1308 process_exidx_entry(uint32_t second_word
);
1310 // Update the current section offset map during EXIDX section fix-up.
1311 // If there is no map, create one. INPUT_OFFSET is the offset of a
1312 // reference point, DELETED_BYTES is the number of deleted by in the
1313 // section so far. If DELETE_ENTRY is true, the reference point and
1314 // all offsets after the previous reference point are discarded.
1316 update_offset_map(section_offset_type input_offset
,
1317 section_size_type deleted_bytes
, bool delete_entry
);
1319 // EXIDX output section.
1320 Output_section
* exidx_output_section_
;
1321 // Unwind type of the last EXIDX entry processed.
1322 Unwind_type last_unwind_type_
;
1323 // Last seen inlined EXIDX entry.
1324 uint32_t last_inlined_entry_
;
1325 // Last processed EXIDX input section.
1326 const Arm_exidx_input_section
* last_input_section_
;
1327 // Section offset map created in process_exidx_section.
1328 Arm_exidx_section_offset_map
* section_offset_map_
;
1329 // Output section for the text section which is linked to the first exidx
1331 Output_section
* first_output_text_section_
;
1333 bool merge_exidx_entries_
;
1336 // Arm output section class. This is defined mainly to add a number of
1337 // stub generation methods.
1339 template<bool big_endian
>
1340 class Arm_output_section
: public Output_section
1343 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1345 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1346 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1347 elfcpp::Elf_Xword flags
)
1348 : Output_section(name
, type
,
1349 (type
== elfcpp::SHT_ARM_EXIDX
1350 ? flags
| elfcpp::SHF_LINK_ORDER
1353 if (type
== elfcpp::SHT_ARM_EXIDX
)
1354 this->set_always_keeps_input_sections();
1357 ~Arm_output_section()
1360 // Group input sections for stub generation.
1362 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1364 // Downcast a base pointer to an Arm_output_section pointer. This is
1365 // not type-safe but we only use Arm_output_section not the base class.
1366 static Arm_output_section
<big_endian
>*
1367 as_arm_output_section(Output_section
* os
)
1368 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1370 // Append all input text sections in this into LIST.
1372 append_text_sections_to_list(Text_section_list
* list
);
1374 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1375 // is a list of text input sections sorted in ascending order of their
1376 // output addresses.
1378 fix_exidx_coverage(Layout
* layout
,
1379 const Text_section_list
& sorted_text_section
,
1380 Symbol_table
* symtab
,
1381 bool merge_exidx_entries
,
1384 // Link an EXIDX section into its corresponding text section.
1386 set_exidx_section_link();
1390 typedef Output_section::Input_section Input_section
;
1391 typedef Output_section::Input_section_list Input_section_list
;
1393 // Create a stub group.
1394 void create_stub_group(Input_section_list::const_iterator
,
1395 Input_section_list::const_iterator
,
1396 Input_section_list::const_iterator
,
1397 Target_arm
<big_endian
>*,
1398 std::vector
<Output_relaxed_input_section
*>*,
1402 // Arm_exidx_input_section class. This represents an EXIDX input section.
1404 class Arm_exidx_input_section
1407 static const section_offset_type invalid_offset
=
1408 static_cast<section_offset_type
>(-1);
1410 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1411 unsigned int link
, uint32_t size
,
1412 uint32_t addralign
, uint32_t text_size
)
1413 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1414 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1417 ~Arm_exidx_input_section()
1420 // Accessors: This is a read-only class.
1422 // Return the object containing this EXIDX input section.
1425 { return this->relobj_
; }
1427 // Return the section index of this EXIDX input section.
1430 { return this->shndx_
; }
1432 // Return the section index of linked text section in the same object.
1435 { return this->link_
; }
1437 // Return size of the EXIDX input section.
1440 { return this->size_
; }
1442 // Return address alignment of EXIDX input section.
1445 { return this->addralign_
; }
1447 // Return size of the associated text input section.
1450 { return this->text_size_
; }
1452 // Whether there are any errors in the EXIDX input section.
1455 { return this->has_errors_
; }
1457 // Set has-errors flag.
1460 { this->has_errors_
= true; }
1463 // Object containing this.
1465 // Section index of this.
1466 unsigned int shndx_
;
1467 // text section linked to this in the same object.
1469 // Size of this. For ARM 32-bit is sufficient.
1471 // Address alignment of this. For ARM 32-bit is sufficient.
1472 uint32_t addralign_
;
1473 // Size of associated text section.
1474 uint32_t text_size_
;
1475 // Whether this has any errors.
1479 // Arm_relobj class.
1481 template<bool big_endian
>
1482 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1485 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1487 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1488 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1489 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1490 stub_tables_(), local_symbol_is_thumb_function_(),
1491 attributes_section_data_(NULL
), mapping_symbols_info_(),
1492 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1493 output_local_symbol_count_needs_update_(false),
1494 merge_flags_and_attributes_(true)
1498 { delete this->attributes_section_data_
; }
1500 // Return the stub table of the SHNDX-th section if there is one.
1501 Stub_table
<big_endian
>*
1502 stub_table(unsigned int shndx
) const
1504 gold_assert(shndx
< this->stub_tables_
.size());
1505 return this->stub_tables_
[shndx
];
1508 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1510 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1512 gold_assert(shndx
< this->stub_tables_
.size());
1513 this->stub_tables_
[shndx
] = stub_table
;
1516 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1517 // index. This is only valid after do_count_local_symbol is called.
1519 local_symbol_is_thumb_function(unsigned int r_sym
) const
1521 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1522 return this->local_symbol_is_thumb_function_
[r_sym
];
1525 // Scan all relocation sections for stub generation.
1527 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1530 // Convert regular input section with index SHNDX to a relaxed section.
1532 convert_input_section_to_relaxed_section(unsigned shndx
)
1534 // The stubs have relocations and we need to process them after writing
1535 // out the stubs. So relocation now must follow section write.
1536 this->set_section_offset(shndx
, -1ULL);
1537 this->set_relocs_must_follow_section_writes();
1540 // Downcast a base pointer to an Arm_relobj pointer. This is
1541 // not type-safe but we only use Arm_relobj not the base class.
1542 static Arm_relobj
<big_endian
>*
1543 as_arm_relobj(Relobj
* relobj
)
1544 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1546 // Processor-specific flags in ELF file header. This is valid only after
1549 processor_specific_flags() const
1550 { return this->processor_specific_flags_
; }
1552 // Attribute section data This is the contents of the .ARM.attribute section
1554 const Attributes_section_data
*
1555 attributes_section_data() const
1556 { return this->attributes_section_data_
; }
1558 // Mapping symbol location.
1559 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1561 // Functor for STL container.
1562 struct Mapping_symbol_position_less
1565 operator()(const Mapping_symbol_position
& p1
,
1566 const Mapping_symbol_position
& p2
) const
1568 return (p1
.first
< p2
.first
1569 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1573 // We only care about the first character of a mapping symbol, so
1574 // we only store that instead of the whole symbol name.
1575 typedef std::map
<Mapping_symbol_position
, char,
1576 Mapping_symbol_position_less
> Mapping_symbols_info
;
1578 // Whether a section contains any Cortex-A8 workaround.
1580 section_has_cortex_a8_workaround(unsigned int shndx
) const
1582 return (this->section_has_cortex_a8_workaround_
!= NULL
1583 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1586 // Mark a section that has Cortex-A8 workaround.
1588 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1590 if (this->section_has_cortex_a8_workaround_
== NULL
)
1591 this->section_has_cortex_a8_workaround_
=
1592 new std::vector
<bool>(this->shnum(), false);
1593 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1596 // Return the EXIDX section of an text section with index SHNDX or NULL
1597 // if the text section has no associated EXIDX section.
1598 const Arm_exidx_input_section
*
1599 exidx_input_section_by_link(unsigned int shndx
) const
1601 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1602 return ((p
!= this->exidx_section_map_
.end()
1603 && p
->second
->link() == shndx
)
1608 // Return the EXIDX section with index SHNDX or NULL if there is none.
1609 const Arm_exidx_input_section
*
1610 exidx_input_section_by_shndx(unsigned shndx
) const
1612 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1613 return ((p
!= this->exidx_section_map_
.end()
1614 && p
->second
->shndx() == shndx
)
1619 // Whether output local symbol count needs updating.
1621 output_local_symbol_count_needs_update() const
1622 { return this->output_local_symbol_count_needs_update_
; }
1624 // Set output_local_symbol_count_needs_update flag to be true.
1626 set_output_local_symbol_count_needs_update()
1627 { this->output_local_symbol_count_needs_update_
= true; }
1629 // Update output local symbol count at the end of relaxation.
1631 update_output_local_symbol_count();
1633 // Whether we want to merge processor-specific flags and attributes.
1635 merge_flags_and_attributes() const
1636 { return this->merge_flags_and_attributes_
; }
1638 // Export list of EXIDX section indices.
1640 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1643 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1644 p
!= this->exidx_section_map_
.end();
1647 if (p
->second
->shndx() == p
->first
)
1648 list
->push_back(p
->first
);
1650 // Sort list to make result independent of implementation of map.
1651 std::sort(list
->begin(), list
->end());
1655 // Post constructor setup.
1659 // Call parent's setup method.
1660 Sized_relobj_file
<32, big_endian
>::do_setup();
1662 // Initialize look-up tables.
1663 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1664 this->stub_tables_
.swap(empty_stub_table_list
);
1667 // Count the local symbols.
1669 do_count_local_symbols(Stringpool_template
<char>*,
1670 Stringpool_template
<char>*);
1673 do_relocate_sections(
1674 const Symbol_table
* symtab
, const Layout
* layout
,
1675 const unsigned char* pshdrs
, Output_file
* of
,
1676 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1678 // Read the symbol information.
1680 do_read_symbols(Read_symbols_data
* sd
);
1682 // Process relocs for garbage collection.
1684 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1688 // Whether a section needs to be scanned for relocation stubs.
1690 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1691 const Relobj::Output_sections
&,
1692 const Symbol_table
*, const unsigned char*);
1694 // Whether a section is a scannable text section.
1696 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1697 const Output_section
*, const Symbol_table
*);
1699 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1701 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1702 unsigned int, Output_section
*,
1703 const Symbol_table
*);
1705 // Scan a section for the Cortex-A8 erratum.
1707 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1708 unsigned int, Output_section
*,
1709 Target_arm
<big_endian
>*);
1711 // Find the linked text section of an EXIDX section by looking at the
1712 // first relocation of the EXIDX section. PSHDR points to the section
1713 // headers of a relocation section and PSYMS points to the local symbols.
1714 // PSHNDX points to a location storing the text section index if found.
1715 // Return whether we can find the linked section.
1717 find_linked_text_section(const unsigned char* pshdr
,
1718 const unsigned char* psyms
, unsigned int* pshndx
);
1721 // Make a new Arm_exidx_input_section object for EXIDX section with
1722 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1723 // index of the linked text section.
1725 make_exidx_input_section(unsigned int shndx
,
1726 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1727 unsigned int text_shndx
,
1728 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1730 // Return the output address of either a plain input section or a
1731 // relaxed input section. SHNDX is the section index.
1733 simple_input_section_output_address(unsigned int, Output_section
*);
1735 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1736 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1739 // List of stub tables.
1740 Stub_table_list stub_tables_
;
1741 // Bit vector to tell if a local symbol is a thumb function or not.
1742 // This is only valid after do_count_local_symbol is called.
1743 std::vector
<bool> local_symbol_is_thumb_function_
;
1744 // processor-specific flags in ELF file header.
1745 elfcpp::Elf_Word processor_specific_flags_
;
1746 // Object attributes if there is an .ARM.attributes section or NULL.
1747 Attributes_section_data
* attributes_section_data_
;
1748 // Mapping symbols information.
1749 Mapping_symbols_info mapping_symbols_info_
;
1750 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1751 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1752 // Map a text section to its associated .ARM.exidx section, if there is one.
1753 Exidx_section_map exidx_section_map_
;
1754 // Whether output local symbol count needs updating.
1755 bool output_local_symbol_count_needs_update_
;
1756 // Whether we merge processor flags and attributes of this object to
1758 bool merge_flags_and_attributes_
;
1761 // Arm_dynobj class.
1763 template<bool big_endian
>
1764 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1767 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1768 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1769 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1770 processor_specific_flags_(0), attributes_section_data_(NULL
)
1774 { delete this->attributes_section_data_
; }
1776 // Downcast a base pointer to an Arm_relobj pointer. This is
1777 // not type-safe but we only use Arm_relobj not the base class.
1778 static Arm_dynobj
<big_endian
>*
1779 as_arm_dynobj(Dynobj
* dynobj
)
1780 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1782 // Processor-specific flags in ELF file header. This is valid only after
1785 processor_specific_flags() const
1786 { return this->processor_specific_flags_
; }
1788 // Attributes section data.
1789 const Attributes_section_data
*
1790 attributes_section_data() const
1791 { return this->attributes_section_data_
; }
1794 // Read the symbol information.
1796 do_read_symbols(Read_symbols_data
* sd
);
1799 // processor-specific flags in ELF file header.
1800 elfcpp::Elf_Word processor_specific_flags_
;
1801 // Object attributes if there is an .ARM.attributes section or NULL.
1802 Attributes_section_data
* attributes_section_data_
;
1805 // Functor to read reloc addends during stub generation.
1807 template<int sh_type
, bool big_endian
>
1808 struct Stub_addend_reader
1810 // Return the addend for a relocation of a particular type. Depending
1811 // on whether this is a REL or RELA relocation, read the addend from a
1812 // view or from a Reloc object.
1813 elfcpp::Elf_types
<32>::Elf_Swxword
1815 unsigned int /* r_type */,
1816 const unsigned char* /* view */,
1817 const typename Reloc_types
<sh_type
,
1818 32, big_endian
>::Reloc
& /* reloc */) const;
1821 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1823 template<bool big_endian
>
1824 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1826 elfcpp::Elf_types
<32>::Elf_Swxword
1829 const unsigned char*,
1830 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1833 // Specialized Stub_addend_reader for RELA type relocation sections.
1834 // We currently do not handle RELA type relocation sections but it is trivial
1835 // to implement the addend reader. This is provided for completeness and to
1836 // make it easier to add support for RELA relocation sections in the future.
1838 template<bool big_endian
>
1839 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1841 elfcpp::Elf_types
<32>::Elf_Swxword
1844 const unsigned char*,
1845 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1846 big_endian
>::Reloc
& reloc
) const
1847 { return reloc
.get_r_addend(); }
1850 // Cortex_a8_reloc class. We keep record of relocation that may need
1851 // the Cortex-A8 erratum workaround.
1853 class Cortex_a8_reloc
1856 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1857 Arm_address destination
)
1858 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1864 // Accessors: This is a read-only class.
1866 // Return the relocation stub associated with this relocation if there is
1870 { return this->reloc_stub_
; }
1872 // Return the relocation type.
1875 { return this->r_type_
; }
1877 // Return the destination address of the relocation. LSB stores the THUMB
1881 { return this->destination_
; }
1884 // Associated relocation stub if there is one, or NULL.
1885 const Reloc_stub
* reloc_stub_
;
1887 unsigned int r_type_
;
1888 // Destination address of this relocation. LSB is used to distinguish
1890 Arm_address destination_
;
1893 // Arm_output_data_got class. We derive this from Output_data_got to add
1894 // extra methods to handle TLS relocations in a static link.
1896 template<bool big_endian
>
1897 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1900 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1901 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1904 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1905 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1906 // applied in a static link.
1908 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1909 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1911 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1912 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1913 // relocation that needs to be applied in a static link.
1915 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1916 Sized_relobj_file
<32, big_endian
>* relobj
,
1919 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1923 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1924 // The first one is initialized to be 1, which is the module index for
1925 // the main executable and the second one 0. A reloc of the type
1926 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1927 // be applied by gold. GSYM is a global symbol.
1929 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1931 // Same as the above but for a local symbol in OBJECT with INDEX.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1934 Sized_relobj_file
<32, big_endian
>* object
,
1935 unsigned int index
);
1938 // Write out the GOT table.
1940 do_write(Output_file
*);
1943 // This class represent dynamic relocations that need to be applied by
1944 // gold because we are using TLS relocations in a static link.
1948 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1949 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1950 { this->u_
.global
.symbol
= gsym
; }
1952 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1953 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1954 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1956 this->u_
.local
.relobj
= relobj
;
1957 this->u_
.local
.index
= index
;
1960 // Return the GOT offset.
1963 { return this->got_offset_
; }
1968 { return this->r_type_
; }
1970 // Whether the symbol is global or not.
1972 symbol_is_global() const
1973 { return this->symbol_is_global_
; }
1975 // For a relocation against a global symbol, the global symbol.
1979 gold_assert(this->symbol_is_global_
);
1980 return this->u_
.global
.symbol
;
1983 // For a relocation against a local symbol, the defining object.
1984 Sized_relobj_file
<32, big_endian
>*
1987 gold_assert(!this->symbol_is_global_
);
1988 return this->u_
.local
.relobj
;
1991 // For a relocation against a local symbol, the local symbol index.
1995 gold_assert(!this->symbol_is_global_
);
1996 return this->u_
.local
.index
;
2000 // GOT offset of the entry to which this relocation is applied.
2001 unsigned int got_offset_
;
2002 // Type of relocation.
2003 unsigned int r_type_
;
2004 // Whether this relocation is against a global symbol.
2005 bool symbol_is_global_
;
2006 // A global or local symbol.
2011 // For a global symbol, the symbol itself.
2016 // For a local symbol, the object defining object.
2017 Sized_relobj_file
<32, big_endian
>* relobj
;
2018 // For a local symbol, the symbol index.
2024 // Symbol table of the output object.
2025 Symbol_table
* symbol_table_
;
2026 // Layout of the output object.
2028 // Static relocs to be applied to the GOT.
2029 std::vector
<Static_reloc
> static_relocs_
;
2032 // The ARM target has many relocation types with odd-sizes or noncontiguous
2033 // bits. The default handling of relocatable relocation cannot process these
2034 // relocations. So we have to extend the default code.
2036 template<bool big_endian
, int sh_type
, typename Classify_reloc
>
2037 class Arm_scan_relocatable_relocs
:
2038 public Default_scan_relocatable_relocs
<sh_type
, Classify_reloc
>
2041 // Return the strategy to use for a local symbol which is a section
2042 // symbol, given the relocation type.
2043 inline Relocatable_relocs::Reloc_strategy
2044 local_section_strategy(unsigned int r_type
, Relobj
*)
2046 if (sh_type
== elfcpp::SHT_RELA
)
2047 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2050 if (r_type
== elfcpp::R_ARM_TARGET1
2051 || r_type
== elfcpp::R_ARM_TARGET2
)
2053 const Target_arm
<big_endian
>* arm_target
=
2054 Target_arm
<big_endian
>::default_target();
2055 r_type
= arm_target
->get_real_reloc_type(r_type
);
2060 // Relocations that write nothing. These exclude R_ARM_TARGET1
2061 // and R_ARM_TARGET2.
2062 case elfcpp::R_ARM_NONE
:
2063 case elfcpp::R_ARM_V4BX
:
2064 case elfcpp::R_ARM_TLS_GOTDESC
:
2065 case elfcpp::R_ARM_TLS_CALL
:
2066 case elfcpp::R_ARM_TLS_DESCSEQ
:
2067 case elfcpp::R_ARM_THM_TLS_CALL
:
2068 case elfcpp::R_ARM_GOTRELAX
:
2069 case elfcpp::R_ARM_GNU_VTENTRY
:
2070 case elfcpp::R_ARM_GNU_VTINHERIT
:
2071 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2072 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2073 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2074 // These should have been converted to something else above.
2075 case elfcpp::R_ARM_TARGET1
:
2076 case elfcpp::R_ARM_TARGET2
:
2078 // Relocations that write full 32 bits and
2079 // have alignment of 1.
2080 case elfcpp::R_ARM_ABS32
:
2081 case elfcpp::R_ARM_REL32
:
2082 case elfcpp::R_ARM_SBREL32
:
2083 case elfcpp::R_ARM_GOTOFF32
:
2084 case elfcpp::R_ARM_BASE_PREL
:
2085 case elfcpp::R_ARM_GOT_BREL
:
2086 case elfcpp::R_ARM_BASE_ABS
:
2087 case elfcpp::R_ARM_ABS32_NOI
:
2088 case elfcpp::R_ARM_REL32_NOI
:
2089 case elfcpp::R_ARM_PLT32_ABS
:
2090 case elfcpp::R_ARM_GOT_ABS
:
2091 case elfcpp::R_ARM_GOT_PREL
:
2092 case elfcpp::R_ARM_TLS_GD32
:
2093 case elfcpp::R_ARM_TLS_LDM32
:
2094 case elfcpp::R_ARM_TLS_LDO32
:
2095 case elfcpp::R_ARM_TLS_IE32
:
2096 case elfcpp::R_ARM_TLS_LE32
:
2097 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED
;
2099 // For all other static relocations, return RELOC_SPECIAL.
2100 return Relocatable_relocs::RELOC_SPECIAL
;
2106 template<bool big_endian
>
2107 class Target_arm
: public Sized_target
<32, big_endian
>
2110 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2113 // When were are relocating a stub, we pass this as the relocation number.
2114 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2117 : Sized_target
<32, big_endian
>(&arm_info
),
2118 got_(NULL
), plt_(NULL
), got_plt_(NULL
), rel_dyn_(NULL
),
2119 copy_relocs_(elfcpp::R_ARM_COPY
), dynbss_(NULL
),
2120 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2121 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2122 should_force_pic_veneer_(false),
2123 arm_input_section_map_(), attributes_section_data_(NULL
),
2124 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2127 // Whether we force PCI branch veneers.
2129 should_force_pic_veneer() const
2130 { return this->should_force_pic_veneer_
; }
2132 // Set PIC veneer flag.
2134 set_should_force_pic_veneer(bool value
)
2135 { this->should_force_pic_veneer_
= value
; }
2137 // Whether we use THUMB-2 instructions.
2139 using_thumb2() const
2141 Object_attribute
* attr
=
2142 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2143 int arch
= attr
->int_value();
2144 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2147 // Whether we use THUMB/THUMB-2 instructions only.
2149 using_thumb_only() const
2151 Object_attribute
* attr
=
2152 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2154 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2155 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2157 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2158 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2160 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2161 return attr
->int_value() == 'M';
2164 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2166 may_use_arm_nop() const
2168 Object_attribute
* attr
=
2169 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2170 int arch
= attr
->int_value();
2171 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2172 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2173 || arch
== elfcpp::TAG_CPU_ARCH_V7
2174 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2177 // Whether we have THUMB-2 NOP.W instruction.
2179 may_use_thumb2_nop() const
2181 Object_attribute
* attr
=
2182 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2183 int arch
= attr
->int_value();
2184 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2185 || arch
== elfcpp::TAG_CPU_ARCH_V7
2186 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2189 // Whether we have v4T interworking instructions available.
2191 may_use_v4t_interworking() const
2193 Object_attribute
* attr
=
2194 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2195 int arch
= attr
->int_value();
2196 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2197 && arch
!= elfcpp::TAG_CPU_ARCH_V4
);
2200 // Whether we have v5T interworking instructions available.
2202 may_use_v5t_interworking() const
2204 Object_attribute
* attr
=
2205 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2206 int arch
= attr
->int_value();
2207 if (parameters
->options().fix_arm1176())
2208 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2209 || arch
== elfcpp::TAG_CPU_ARCH_V7
2210 || arch
== elfcpp::TAG_CPU_ARCH_V6_M
2211 || arch
== elfcpp::TAG_CPU_ARCH_V6S_M
2212 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2214 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2215 && arch
!= elfcpp::TAG_CPU_ARCH_V4
2216 && arch
!= elfcpp::TAG_CPU_ARCH_V4T
);
2219 // Process the relocations to determine unreferenced sections for
2220 // garbage collection.
2222 gc_process_relocs(Symbol_table
* symtab
,
2224 Sized_relobj_file
<32, big_endian
>* object
,
2225 unsigned int data_shndx
,
2226 unsigned int sh_type
,
2227 const unsigned char* prelocs
,
2229 Output_section
* output_section
,
2230 bool needs_special_offset_handling
,
2231 size_t local_symbol_count
,
2232 const unsigned char* plocal_symbols
);
2234 // Scan the relocations to look for symbol adjustments.
2236 scan_relocs(Symbol_table
* symtab
,
2238 Sized_relobj_file
<32, big_endian
>* object
,
2239 unsigned int data_shndx
,
2240 unsigned int sh_type
,
2241 const unsigned char* prelocs
,
2243 Output_section
* output_section
,
2244 bool needs_special_offset_handling
,
2245 size_t local_symbol_count
,
2246 const unsigned char* plocal_symbols
);
2248 // Finalize the sections.
2250 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2252 // Return the value to use for a dynamic symbol which requires special
2255 do_dynsym_value(const Symbol
*) const;
2257 // Relocate a section.
2259 relocate_section(const Relocate_info
<32, big_endian
>*,
2260 unsigned int sh_type
,
2261 const unsigned char* prelocs
,
2263 Output_section
* output_section
,
2264 bool needs_special_offset_handling
,
2265 unsigned char* view
,
2266 Arm_address view_address
,
2267 section_size_type view_size
,
2268 const Reloc_symbol_changes
*);
2270 // Scan the relocs during a relocatable link.
2272 scan_relocatable_relocs(Symbol_table
* symtab
,
2274 Sized_relobj_file
<32, big_endian
>* object
,
2275 unsigned int data_shndx
,
2276 unsigned int sh_type
,
2277 const unsigned char* prelocs
,
2279 Output_section
* output_section
,
2280 bool needs_special_offset_handling
,
2281 size_t local_symbol_count
,
2282 const unsigned char* plocal_symbols
,
2283 Relocatable_relocs
*);
2285 // Relocate a section during a relocatable link.
2287 relocate_for_relocatable(const Relocate_info
<32, big_endian
>*,
2288 unsigned int sh_type
,
2289 const unsigned char* prelocs
,
2291 Output_section
* output_section
,
2292 off_t offset_in_output_section
,
2293 const Relocatable_relocs
*,
2294 unsigned char* view
,
2295 Arm_address view_address
,
2296 section_size_type view_size
,
2297 unsigned char* reloc_view
,
2298 section_size_type reloc_view_size
);
2300 // Perform target-specific processing in a relocatable link. This is
2301 // only used if we use the relocation strategy RELOC_SPECIAL.
2303 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2304 unsigned int sh_type
,
2305 const unsigned char* preloc_in
,
2307 Output_section
* output_section
,
2308 off_t offset_in_output_section
,
2309 unsigned char* view
,
2310 typename
elfcpp::Elf_types
<32>::Elf_Addr
2312 section_size_type view_size
,
2313 unsigned char* preloc_out
);
2315 // Return whether SYM is defined by the ABI.
2317 do_is_defined_by_abi(Symbol
* sym
) const
2318 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2320 // Return whether there is a GOT section.
2322 has_got_section() const
2323 { return this->got_
!= NULL
; }
2325 // Return the size of the GOT section.
2329 gold_assert(this->got_
!= NULL
);
2330 return this->got_
->data_size();
2333 // Return the number of entries in the GOT.
2335 got_entry_count() const
2337 if (!this->has_got_section())
2339 return this->got_size() / 4;
2342 // Return the number of entries in the PLT.
2344 plt_entry_count() const;
2346 // Return the offset of the first non-reserved PLT entry.
2348 first_plt_entry_offset() const;
2350 // Return the size of each PLT entry.
2352 plt_entry_size() const;
2354 // Map platform-specific reloc types
2356 get_real_reloc_type(unsigned int r_type
);
2359 // Methods to support stub-generations.
2362 // Return the stub factory
2364 stub_factory() const
2365 { return this->stub_factory_
; }
2367 // Make a new Arm_input_section object.
2368 Arm_input_section
<big_endian
>*
2369 new_arm_input_section(Relobj
*, unsigned int);
2371 // Find the Arm_input_section object corresponding to the SHNDX-th input
2372 // section of RELOBJ.
2373 Arm_input_section
<big_endian
>*
2374 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2376 // Make a new Stub_table
2377 Stub_table
<big_endian
>*
2378 new_stub_table(Arm_input_section
<big_endian
>*);
2380 // Scan a section for stub generation.
2382 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2383 const unsigned char*, size_t, Output_section
*,
2384 bool, const unsigned char*, Arm_address
,
2389 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2390 Output_section
*, unsigned char*, Arm_address
,
2393 // Get the default ARM target.
2394 static Target_arm
<big_endian
>*
2397 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2398 && parameters
->target().is_big_endian() == big_endian
);
2399 return static_cast<Target_arm
<big_endian
>*>(
2400 parameters
->sized_target
<32, big_endian
>());
2403 // Whether NAME belongs to a mapping symbol.
2405 is_mapping_symbol_name(const char* name
)
2409 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2410 && (name
[2] == '\0' || name
[2] == '.'));
2413 // Whether we work around the Cortex-A8 erratum.
2415 fix_cortex_a8() const
2416 { return this->fix_cortex_a8_
; }
2418 // Whether we merge exidx entries in debuginfo.
2420 merge_exidx_entries() const
2421 { return parameters
->options().merge_exidx_entries(); }
2423 // Whether we fix R_ARM_V4BX relocation.
2425 // 1 - replace with MOV instruction (armv4 target)
2426 // 2 - make interworking veneer (>= armv4t targets only)
2427 General_options::Fix_v4bx
2429 { return parameters
->options().fix_v4bx(); }
2431 // Scan a span of THUMB code section for Cortex-A8 erratum.
2433 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2434 section_size_type
, section_size_type
,
2435 const unsigned char*, Arm_address
);
2437 // Apply Cortex-A8 workaround to a branch.
2439 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2440 unsigned char*, Arm_address
);
2443 // Make an ELF object.
2445 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2446 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2449 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2450 const elfcpp::Ehdr
<32, !big_endian
>&)
2451 { gold_unreachable(); }
2454 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2455 const elfcpp::Ehdr
<64, false>&)
2456 { gold_unreachable(); }
2459 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2460 const elfcpp::Ehdr
<64, true>&)
2461 { gold_unreachable(); }
2463 // Make an output section.
2465 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2466 elfcpp::Elf_Xword flags
)
2467 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2470 do_adjust_elf_header(unsigned char* view
, int len
) const;
2472 // We only need to generate stubs, and hence perform relaxation if we are
2473 // not doing relocatable linking.
2475 do_may_relax() const
2476 { return !parameters
->options().relocatable(); }
2479 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2481 // Determine whether an object attribute tag takes an integer, a
2484 do_attribute_arg_type(int tag
) const;
2486 // Reorder tags during output.
2488 do_attributes_order(int num
) const;
2490 // This is called when the target is selected as the default.
2492 do_select_as_default_target()
2494 // No locking is required since there should only be one default target.
2495 // We cannot have both the big-endian and little-endian ARM targets
2497 gold_assert(arm_reloc_property_table
== NULL
);
2498 arm_reloc_property_table
= new Arm_reloc_property_table();
2501 // Virtual function which is set to return true by a target if
2502 // it can use relocation types to determine if a function's
2503 // pointer is taken.
2505 do_can_check_for_function_pointers() const
2508 // Whether a section called SECTION_NAME may have function pointers to
2509 // sections not eligible for safe ICF folding.
2511 do_section_may_have_icf_unsafe_pointers(const char* section_name
) const
2513 return (!is_prefix_of(".ARM.exidx", section_name
)
2514 && !is_prefix_of(".ARM.extab", section_name
)
2515 && Target::do_section_may_have_icf_unsafe_pointers(section_name
));
2519 do_define_standard_symbols(Symbol_table
*, Layout
*);
2522 // The class which scans relocations.
2527 : issued_non_pic_error_(false)
2531 get_reference_flags(unsigned int r_type
);
2534 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2535 Sized_relobj_file
<32, big_endian
>* object
,
2536 unsigned int data_shndx
,
2537 Output_section
* output_section
,
2538 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2539 const elfcpp::Sym
<32, big_endian
>& lsym
);
2542 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2543 Sized_relobj_file
<32, big_endian
>* object
,
2544 unsigned int data_shndx
,
2545 Output_section
* output_section
,
2546 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2550 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2551 Sized_relobj_file
<32, big_endian
>* ,
2554 const elfcpp::Rel
<32, big_endian
>& ,
2556 const elfcpp::Sym
<32, big_endian
>&);
2559 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2560 Sized_relobj_file
<32, big_endian
>* ,
2563 const elfcpp::Rel
<32, big_endian
>& ,
2564 unsigned int , Symbol
*);
2568 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2569 unsigned int r_type
);
2572 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2573 unsigned int r_type
, Symbol
*);
2576 check_non_pic(Relobj
*, unsigned int r_type
);
2578 // Almost identical to Symbol::needs_plt_entry except that it also
2579 // handles STT_ARM_TFUNC.
2581 symbol_needs_plt_entry(const Symbol
* sym
)
2583 // An undefined symbol from an executable does not need a PLT entry.
2584 if (sym
->is_undefined() && !parameters
->options().shared())
2587 return (!parameters
->doing_static_link()
2588 && (sym
->type() == elfcpp::STT_FUNC
2589 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2590 && (sym
->is_from_dynobj()
2591 || sym
->is_undefined()
2592 || sym
->is_preemptible()));
2596 possible_function_pointer_reloc(unsigned int r_type
);
2598 // Whether we have issued an error about a non-PIC compilation.
2599 bool issued_non_pic_error_
;
2602 // The class which implements relocation.
2612 // Return whether the static relocation needs to be applied.
2614 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2615 unsigned int r_type
,
2617 Output_section
* output_section
);
2619 // Do a relocation. Return false if the caller should not issue
2620 // any warnings about this relocation.
2622 relocate(const Relocate_info
<32, big_endian
>*, Target_arm
*,
2623 Output_section
*, size_t relnum
,
2624 const elfcpp::Rel
<32, big_endian
>&,
2625 unsigned int r_type
, const Sized_symbol
<32>*,
2626 const Symbol_value
<32>*,
2627 unsigned char*, Arm_address
,
2630 // Return whether we want to pass flag NON_PIC_REF for this
2631 // reloc. This means the relocation type accesses a symbol not via
2634 reloc_is_non_pic(unsigned int r_type
)
2638 // These relocation types reference GOT or PLT entries explicitly.
2639 case elfcpp::R_ARM_GOT_BREL
:
2640 case elfcpp::R_ARM_GOT_ABS
:
2641 case elfcpp::R_ARM_GOT_PREL
:
2642 case elfcpp::R_ARM_GOT_BREL12
:
2643 case elfcpp::R_ARM_PLT32_ABS
:
2644 case elfcpp::R_ARM_TLS_GD32
:
2645 case elfcpp::R_ARM_TLS_LDM32
:
2646 case elfcpp::R_ARM_TLS_IE32
:
2647 case elfcpp::R_ARM_TLS_IE12GP
:
2649 // These relocate types may use PLT entries.
2650 case elfcpp::R_ARM_CALL
:
2651 case elfcpp::R_ARM_THM_CALL
:
2652 case elfcpp::R_ARM_JUMP24
:
2653 case elfcpp::R_ARM_THM_JUMP24
:
2654 case elfcpp::R_ARM_THM_JUMP19
:
2655 case elfcpp::R_ARM_PLT32
:
2656 case elfcpp::R_ARM_THM_XPC22
:
2657 case elfcpp::R_ARM_PREL31
:
2658 case elfcpp::R_ARM_SBREL31
:
2667 // Do a TLS relocation.
2668 inline typename Arm_relocate_functions
<big_endian
>::Status
2669 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2670 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2671 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2672 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2677 // A class which returns the size required for a relocation type,
2678 // used while scanning relocs during a relocatable link.
2679 class Relocatable_size_for_reloc
2683 get_size_for_reloc(unsigned int, Relobj
*);
2686 // Adjust TLS relocation type based on the options and whether this
2687 // is a local symbol.
2688 static tls::Tls_optimization
2689 optimize_tls_reloc(bool is_final
, int r_type
);
2691 // Get the GOT section, creating it if necessary.
2692 Arm_output_data_got
<big_endian
>*
2693 got_section(Symbol_table
*, Layout
*);
2695 // Get the GOT PLT section.
2697 got_plt_section() const
2699 gold_assert(this->got_plt_
!= NULL
);
2700 return this->got_plt_
;
2703 // Create a PLT entry for a global symbol.
2705 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2707 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2709 define_tls_base_symbol(Symbol_table
*, Layout
*);
2711 // Create a GOT entry for the TLS module index.
2713 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2714 Sized_relobj_file
<32, big_endian
>* object
);
2716 // Get the PLT section.
2717 const Output_data_plt_arm
<big_endian
>*
2720 gold_assert(this->plt_
!= NULL
);
2724 // Get the dynamic reloc section, creating it if necessary.
2726 rel_dyn_section(Layout
*);
2728 // Get the section to use for TLS_DESC relocations.
2730 rel_tls_desc_section(Layout
*) const;
2732 // Return true if the symbol may need a COPY relocation.
2733 // References from an executable object to non-function symbols
2734 // defined in a dynamic object may need a COPY relocation.
2736 may_need_copy_reloc(Symbol
* gsym
)
2738 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2739 && gsym
->may_need_copy_reloc());
2742 // Add a potential copy relocation.
2744 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2745 Sized_relobj_file
<32, big_endian
>* object
,
2746 unsigned int shndx
, Output_section
* output_section
,
2747 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2749 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2750 symtab
->get_sized_symbol
<32>(sym
),
2751 object
, shndx
, output_section
, reloc
,
2752 this->rel_dyn_section(layout
));
2755 // Whether two EABI versions are compatible.
2757 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2759 // Merge processor-specific flags from input object and those in the ELF
2760 // header of the output.
2762 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2764 // Get the secondary compatible architecture.
2766 get_secondary_compatible_arch(const Attributes_section_data
*);
2768 // Set the secondary compatible architecture.
2770 set_secondary_compatible_arch(Attributes_section_data
*, int);
2773 tag_cpu_arch_combine(const char*, int, int*, int, int);
2775 // Helper to print AEABI enum tag value.
2777 aeabi_enum_name(unsigned int);
2779 // Return string value for TAG_CPU_name.
2781 tag_cpu_name_value(unsigned int);
2783 // Merge object attributes from input object and those in the output.
2785 merge_object_attributes(const char*, const Attributes_section_data
*);
2787 // Helper to get an AEABI object attribute
2789 get_aeabi_object_attribute(int tag
) const
2791 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2792 gold_assert(pasd
!= NULL
);
2793 Object_attribute
* attr
=
2794 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2795 gold_assert(attr
!= NULL
);
2800 // Methods to support stub-generations.
2803 // Group input sections for stub generation.
2805 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2807 // Scan a relocation for stub generation.
2809 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2810 const Sized_symbol
<32>*, unsigned int,
2811 const Symbol_value
<32>*,
2812 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2814 // Scan a relocation section for stub.
2815 template<int sh_type
>
2817 scan_reloc_section_for_stubs(
2818 const Relocate_info
<32, big_endian
>* relinfo
,
2819 const unsigned char* prelocs
,
2821 Output_section
* output_section
,
2822 bool needs_special_offset_handling
,
2823 const unsigned char* view
,
2824 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2827 // Fix .ARM.exidx section coverage.
2829 fix_exidx_coverage(Layout
*, const Input_objects
*,
2830 Arm_output_section
<big_endian
>*, Symbol_table
*,
2833 // Functors for STL set.
2834 struct output_section_address_less_than
2837 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2838 { return s1
->address() < s2
->address(); }
2841 // Information about this specific target which we pass to the
2842 // general Target structure.
2843 static const Target::Target_info arm_info
;
2845 // The types of GOT entries needed for this platform.
2846 // These values are exposed to the ABI in an incremental link.
2847 // Do not renumber existing values without changing the version
2848 // number of the .gnu_incremental_inputs section.
2851 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2852 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2853 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2854 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2855 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2858 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2860 // Map input section to Arm_input_section.
2861 typedef Unordered_map
<Section_id
,
2862 Arm_input_section
<big_endian
>*,
2864 Arm_input_section_map
;
2866 // Map output addresses to relocs for Cortex-A8 erratum.
2867 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2868 Cortex_a8_relocs_info
;
2871 Arm_output_data_got
<big_endian
>* got_
;
2873 Output_data_plt_arm
<big_endian
>* plt_
;
2874 // The GOT PLT section.
2875 Output_data_space
* got_plt_
;
2876 // The dynamic reloc section.
2877 Reloc_section
* rel_dyn_
;
2878 // Relocs saved to avoid a COPY reloc.
2879 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2880 // Space for variables copied with a COPY reloc.
2881 Output_data_space
* dynbss_
;
2882 // Offset of the GOT entry for the TLS module index.
2883 unsigned int got_mod_index_offset_
;
2884 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2885 bool tls_base_symbol_defined_
;
2886 // Vector of Stub_tables created.
2887 Stub_table_list stub_tables_
;
2889 const Stub_factory
&stub_factory_
;
2890 // Whether we force PIC branch veneers.
2891 bool should_force_pic_veneer_
;
2892 // Map for locating Arm_input_sections.
2893 Arm_input_section_map arm_input_section_map_
;
2894 // Attributes section data in output.
2895 Attributes_section_data
* attributes_section_data_
;
2896 // Whether we want to fix code for Cortex-A8 erratum.
2897 bool fix_cortex_a8_
;
2898 // Map addresses to relocs for Cortex-A8 erratum.
2899 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2902 template<bool big_endian
>
2903 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2906 big_endian
, // is_big_endian
2907 elfcpp::EM_ARM
, // machine_code
2908 false, // has_make_symbol
2909 false, // has_resolve
2910 false, // has_code_fill
2911 true, // is_default_stack_executable
2912 false, // can_icf_inline_merge_sections
2914 "/usr/lib/libc.so.1", // dynamic_linker
2915 0x8000, // default_text_segment_address
2916 0x1000, // abi_pagesize (overridable by -z max-page-size)
2917 0x1000, // common_pagesize (overridable by -z common-page-size)
2918 elfcpp::SHN_UNDEF
, // small_common_shndx
2919 elfcpp::SHN_UNDEF
, // large_common_shndx
2920 0, // small_common_section_flags
2921 0, // large_common_section_flags
2922 ".ARM.attributes", // attributes_section
2923 "aeabi" // attributes_vendor
2926 // Arm relocate functions class
2929 template<bool big_endian
>
2930 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
2935 STATUS_OKAY
, // No error during relocation.
2936 STATUS_OVERFLOW
, // Relocation overflow.
2937 STATUS_BAD_RELOC
// Relocation cannot be applied.
2941 typedef Relocate_functions
<32, big_endian
> Base
;
2942 typedef Arm_relocate_functions
<big_endian
> This
;
2944 // Encoding of imm16 argument for movt and movw ARM instructions
2947 // imm16 := imm4 | imm12
2949 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2950 // +-------+---------------+-------+-------+-----------------------+
2951 // | | |imm4 | |imm12 |
2952 // +-------+---------------+-------+-------+-----------------------+
2954 // Extract the relocation addend from VAL based on the ARM
2955 // instruction encoding described above.
2956 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2957 extract_arm_movw_movt_addend(
2958 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2960 // According to the Elf ABI for ARM Architecture the immediate
2961 // field is sign-extended to form the addend.
2962 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000) | (val
& 0xfff));
2965 // Insert X into VAL based on the ARM instruction encoding described
2967 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2968 insert_val_arm_movw_movt(
2969 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2970 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2974 val
|= (x
& 0xf000) << 4;
2978 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2981 // imm16 := imm4 | i | imm3 | imm8
2983 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2984 // +---------+-+-----------+-------++-+-----+-------+---------------+
2985 // | |i| |imm4 || |imm3 | |imm8 |
2986 // +---------+-+-----------+-------++-+-----+-------+---------------+
2988 // Extract the relocation addend from VAL based on the Thumb2
2989 // instruction encoding described above.
2990 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2991 extract_thumb_movw_movt_addend(
2992 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2994 // According to the Elf ABI for ARM Architecture the immediate
2995 // field is sign-extended to form the addend.
2996 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000)
2997 | ((val
>> 15) & 0x0800)
2998 | ((val
>> 4) & 0x0700)
3002 // Insert X into VAL based on the Thumb2 instruction encoding
3004 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3005 insert_val_thumb_movw_movt(
3006 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3007 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3010 val
|= (x
& 0xf000) << 4;
3011 val
|= (x
& 0x0800) << 15;
3012 val
|= (x
& 0x0700) << 4;
3013 val
|= (x
& 0x00ff);
3017 // Calculate the smallest constant Kn for the specified residual.
3018 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3020 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3026 // Determine the most significant bit in the residual and
3027 // align the resulting value to a 2-bit boundary.
3028 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3030 // The desired shift is now (msb - 6), or zero, whichever
3032 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3035 // Calculate the final residual for the specified group index.
3036 // If the passed group index is less than zero, the method will return
3037 // the value of the specified residual without any change.
3038 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3039 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3040 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3043 for (int n
= 0; n
<= group
; n
++)
3045 // Calculate which part of the value to mask.
3046 uint32_t shift
= calc_grp_kn(residual
);
3047 // Calculate the residual for the next time around.
3048 residual
&= ~(residual
& (0xff << shift
));
3054 // Calculate the value of Gn for the specified group index.
3055 // We return it in the form of an encoded constant-and-rotation.
3056 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3057 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3058 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3061 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3064 for (int n
= 0; n
<= group
; n
++)
3066 // Calculate which part of the value to mask.
3067 shift
= calc_grp_kn(residual
);
3068 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3069 gn
= residual
& (0xff << shift
);
3070 // Calculate the residual for the next time around.
3073 // Return Gn in the form of an encoded constant-and-rotation.
3074 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3078 // Handle ARM long branches.
3079 static typename
This::Status
3080 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3081 unsigned char*, const Sized_symbol
<32>*,
3082 const Arm_relobj
<big_endian
>*, unsigned int,
3083 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3085 // Handle THUMB long branches.
3086 static typename
This::Status
3087 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3088 unsigned char*, const Sized_symbol
<32>*,
3089 const Arm_relobj
<big_endian
>*, unsigned int,
3090 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3093 // Return the branch offset of a 32-bit THUMB branch.
3094 static inline int32_t
3095 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3097 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3098 // involving the J1 and J2 bits.
3099 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3100 uint32_t upper
= upper_insn
& 0x3ffU
;
3101 uint32_t lower
= lower_insn
& 0x7ffU
;
3102 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3103 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3104 uint32_t i1
= j1
^ s
? 0 : 1;
3105 uint32_t i2
= j2
^ s
? 0 : 1;
3107 return Bits
<25>::sign_extend32((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3108 | (upper
<< 12) | (lower
<< 1));
3111 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3112 // UPPER_INSN is the original upper instruction of the branch. Caller is
3113 // responsible for overflow checking and BLX offset adjustment.
3114 static inline uint16_t
3115 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3117 uint32_t s
= offset
< 0 ? 1 : 0;
3118 uint32_t bits
= static_cast<uint32_t>(offset
);
3119 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3122 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3123 // LOWER_INSN is the original lower instruction of the branch. Caller is
3124 // responsible for overflow checking and BLX offset adjustment.
3125 static inline uint16_t
3126 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3128 uint32_t s
= offset
< 0 ? 1 : 0;
3129 uint32_t bits
= static_cast<uint32_t>(offset
);
3130 return ((lower_insn
& ~0x2fffU
)
3131 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3132 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3133 | ((bits
>> 1) & 0x7ffU
));
3136 // Return the branch offset of a 32-bit THUMB conditional branch.
3137 static inline int32_t
3138 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3140 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3141 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3142 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3143 uint32_t lower
= (lower_insn
& 0x07ffU
);
3144 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3146 return Bits
<21>::sign_extend32((upper
<< 12) | (lower
<< 1));
3149 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3150 // instruction. UPPER_INSN is the original upper instruction of the branch.
3151 // Caller is responsible for overflow checking.
3152 static inline uint16_t
3153 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3155 uint32_t s
= offset
< 0 ? 1 : 0;
3156 uint32_t bits
= static_cast<uint32_t>(offset
);
3157 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3160 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3161 // instruction. LOWER_INSN is the original lower instruction of the branch.
3162 // The caller is responsible for overflow checking.
3163 static inline uint16_t
3164 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3166 uint32_t bits
= static_cast<uint32_t>(offset
);
3167 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3168 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3169 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3171 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3174 // R_ARM_ABS8: S + A
3175 static inline typename
This::Status
3176 abs8(unsigned char* view
,
3177 const Sized_relobj_file
<32, big_endian
>* object
,
3178 const Symbol_value
<32>* psymval
)
3180 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3181 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3182 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3183 int32_t addend
= Bits
<8>::sign_extend32(val
);
3184 Arm_address x
= psymval
->value(object
, addend
);
3185 val
= Bits
<32>::bit_select32(val
, x
, 0xffU
);
3186 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3188 // R_ARM_ABS8 permits signed or unsigned results.
3189 return (Bits
<8>::has_signed_unsigned_overflow32(x
)
3190 ? This::STATUS_OVERFLOW
3191 : This::STATUS_OKAY
);
3194 // R_ARM_THM_ABS5: S + A
3195 static inline typename
This::Status
3196 thm_abs5(unsigned char* view
,
3197 const Sized_relobj_file
<32, big_endian
>* object
,
3198 const Symbol_value
<32>* psymval
)
3200 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3201 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3202 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3203 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3204 Reltype addend
= (val
& 0x7e0U
) >> 6;
3205 Reltype x
= psymval
->value(object
, addend
);
3206 val
= Bits
<32>::bit_select32(val
, x
<< 6, 0x7e0U
);
3207 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3208 return (Bits
<5>::has_overflow32(x
)
3209 ? This::STATUS_OVERFLOW
3210 : This::STATUS_OKAY
);
3213 // R_ARM_ABS12: S + A
3214 static inline typename
This::Status
3215 abs12(unsigned char* view
,
3216 const Sized_relobj_file
<32, big_endian
>* object
,
3217 const Symbol_value
<32>* psymval
)
3219 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3220 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3221 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3222 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3223 Reltype addend
= val
& 0x0fffU
;
3224 Reltype x
= psymval
->value(object
, addend
);
3225 val
= Bits
<32>::bit_select32(val
, x
, 0x0fffU
);
3226 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3227 return (Bits
<12>::has_overflow32(x
)
3228 ? This::STATUS_OVERFLOW
3229 : This::STATUS_OKAY
);
3232 // R_ARM_ABS16: S + A
3233 static inline typename
This::Status
3234 abs16(unsigned char* view
,
3235 const Sized_relobj_file
<32, big_endian
>* object
,
3236 const Symbol_value
<32>* psymval
)
3238 typedef typename
elfcpp::Swap_unaligned
<16, big_endian
>::Valtype Valtype
;
3239 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3240 Valtype val
= elfcpp::Swap_unaligned
<16, big_endian
>::readval(view
);
3241 int32_t addend
= Bits
<16>::sign_extend32(val
);
3242 Arm_address x
= psymval
->value(object
, addend
);
3243 val
= Bits
<32>::bit_select32(val
, x
, 0xffffU
);
3244 elfcpp::Swap_unaligned
<16, big_endian
>::writeval(view
, val
);
3246 // R_ARM_ABS16 permits signed or unsigned results.
3247 return (Bits
<16>::has_signed_unsigned_overflow32(x
)
3248 ? This::STATUS_OVERFLOW
3249 : This::STATUS_OKAY
);
3252 // R_ARM_ABS32: (S + A) | T
3253 static inline typename
This::Status
3254 abs32(unsigned char* view
,
3255 const Sized_relobj_file
<32, big_endian
>* object
,
3256 const Symbol_value
<32>* psymval
,
3257 Arm_address thumb_bit
)
3259 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3260 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3261 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3262 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3263 return This::STATUS_OKAY
;
3266 // R_ARM_REL32: (S + A) | T - P
3267 static inline typename
This::Status
3268 rel32(unsigned char* view
,
3269 const Sized_relobj_file
<32, big_endian
>* object
,
3270 const Symbol_value
<32>* psymval
,
3271 Arm_address address
,
3272 Arm_address thumb_bit
)
3274 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3275 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3276 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3277 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3278 return This::STATUS_OKAY
;
3281 // R_ARM_THM_JUMP24: (S + A) | T - P
3282 static typename
This::Status
3283 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3284 const Symbol_value
<32>* psymval
, Arm_address address
,
3285 Arm_address thumb_bit
);
3287 // R_ARM_THM_JUMP6: S + A – P
3288 static inline typename
This::Status
3289 thm_jump6(unsigned char* view
,
3290 const Sized_relobj_file
<32, big_endian
>* object
,
3291 const Symbol_value
<32>* psymval
,
3292 Arm_address address
)
3294 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3295 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3296 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3297 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3298 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3299 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3300 Reltype x
= (psymval
->value(object
, addend
) - address
);
3301 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3302 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3303 // CZB does only forward jumps.
3304 return ((x
> 0x007e)
3305 ? This::STATUS_OVERFLOW
3306 : This::STATUS_OKAY
);
3309 // R_ARM_THM_JUMP8: S + A – P
3310 static inline typename
This::Status
3311 thm_jump8(unsigned char* view
,
3312 const Sized_relobj_file
<32, big_endian
>* object
,
3313 const Symbol_value
<32>* psymval
,
3314 Arm_address address
)
3316 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3317 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3318 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3319 int32_t addend
= Bits
<8>::sign_extend32((val
& 0x00ff) << 1);
3320 int32_t x
= (psymval
->value(object
, addend
) - address
);
3321 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xff00)
3322 | ((x
& 0x01fe) >> 1)));
3323 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3324 return (Bits
<9>::has_overflow32(x
)
3325 ? This::STATUS_OVERFLOW
3326 : This::STATUS_OKAY
);
3329 // R_ARM_THM_JUMP11: S + A – P
3330 static inline typename
This::Status
3331 thm_jump11(unsigned char* view
,
3332 const Sized_relobj_file
<32, big_endian
>* object
,
3333 const Symbol_value
<32>* psymval
,
3334 Arm_address address
)
3336 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3337 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3338 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3339 int32_t addend
= Bits
<11>::sign_extend32((val
& 0x07ff) << 1);
3340 int32_t x
= (psymval
->value(object
, addend
) - address
);
3341 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xf800)
3342 | ((x
& 0x0ffe) >> 1)));
3343 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3344 return (Bits
<12>::has_overflow32(x
)
3345 ? This::STATUS_OVERFLOW
3346 : This::STATUS_OKAY
);
3349 // R_ARM_BASE_PREL: B(S) + A - P
3350 static inline typename
This::Status
3351 base_prel(unsigned char* view
,
3353 Arm_address address
)
3355 Base::rel32(view
, origin
- address
);
3359 // R_ARM_BASE_ABS: B(S) + A
3360 static inline typename
This::Status
3361 base_abs(unsigned char* view
,
3364 Base::rel32(view
, origin
);
3368 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3369 static inline typename
This::Status
3370 got_brel(unsigned char* view
,
3371 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3373 Base::rel32(view
, got_offset
);
3374 return This::STATUS_OKAY
;
3377 // R_ARM_GOT_PREL: GOT(S) + A - P
3378 static inline typename
This::Status
3379 got_prel(unsigned char* view
,
3380 Arm_address got_entry
,
3381 Arm_address address
)
3383 Base::rel32(view
, got_entry
- address
);
3384 return This::STATUS_OKAY
;
3387 // R_ARM_PREL: (S + A) | T - P
3388 static inline typename
This::Status
3389 prel31(unsigned char* view
,
3390 const Sized_relobj_file
<32, big_endian
>* object
,
3391 const Symbol_value
<32>* psymval
,
3392 Arm_address address
,
3393 Arm_address thumb_bit
)
3395 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3396 Valtype val
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3397 Valtype addend
= Bits
<31>::sign_extend32(val
);
3398 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3399 val
= Bits
<32>::bit_select32(val
, x
, 0x7fffffffU
);
3400 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, val
);
3401 return (Bits
<31>::has_overflow32(x
)
3402 ? This::STATUS_OVERFLOW
3403 : This::STATUS_OKAY
);
3406 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3407 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3408 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3409 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3410 static inline typename
This::Status
3411 movw(unsigned char* view
,
3412 const Sized_relobj_file
<32, big_endian
>* object
,
3413 const Symbol_value
<32>* psymval
,
3414 Arm_address relative_address_base
,
3415 Arm_address thumb_bit
,
3416 bool check_overflow
)
3418 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3419 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3420 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3421 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3422 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3423 - relative_address_base
);
3424 val
= This::insert_val_arm_movw_movt(val
, x
);
3425 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3426 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3427 ? This::STATUS_OVERFLOW
3428 : This::STATUS_OKAY
);
3431 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3432 // R_ARM_MOVT_PREL: S + A - P
3433 // R_ARM_MOVT_BREL: S + A - B(S)
3434 static inline typename
This::Status
3435 movt(unsigned char* view
,
3436 const Sized_relobj_file
<32, big_endian
>* object
,
3437 const Symbol_value
<32>* psymval
,
3438 Arm_address relative_address_base
)
3440 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3441 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3442 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3443 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3444 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3445 val
= This::insert_val_arm_movw_movt(val
, x
);
3446 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3447 // FIXME: IHI0044D says that we should check for overflow.
3448 return This::STATUS_OKAY
;
3451 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3452 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3453 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3454 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3455 static inline typename
This::Status
3456 thm_movw(unsigned char* view
,
3457 const Sized_relobj_file
<32, big_endian
>* object
,
3458 const Symbol_value
<32>* psymval
,
3459 Arm_address relative_address_base
,
3460 Arm_address thumb_bit
,
3461 bool check_overflow
)
3463 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3464 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3465 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3466 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3467 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3468 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3470 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3471 val
= This::insert_val_thumb_movw_movt(val
, x
);
3472 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3473 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3474 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3475 ? This::STATUS_OVERFLOW
3476 : This::STATUS_OKAY
);
3479 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3480 // R_ARM_THM_MOVT_PREL: S + A - P
3481 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3482 static inline typename
This::Status
3483 thm_movt(unsigned char* view
,
3484 const Sized_relobj_file
<32, big_endian
>* object
,
3485 const Symbol_value
<32>* psymval
,
3486 Arm_address relative_address_base
)
3488 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3489 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3490 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3491 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3492 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3493 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3494 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3495 val
= This::insert_val_thumb_movw_movt(val
, x
);
3496 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3497 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3498 return This::STATUS_OKAY
;
3501 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3502 static inline typename
This::Status
3503 thm_alu11(unsigned char* view
,
3504 const Sized_relobj_file
<32, big_endian
>* object
,
3505 const Symbol_value
<32>* psymval
,
3506 Arm_address address
,
3507 Arm_address thumb_bit
)
3509 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3510 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3511 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3512 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3513 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3515 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3516 // -----------------------------------------------------------------------
3517 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3518 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3519 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3520 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3521 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3522 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3524 // Determine a sign for the addend.
3525 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3526 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3527 // Thumb2 addend encoding:
3528 // imm12 := i | imm3 | imm8
3529 int32_t addend
= (insn
& 0xff)
3530 | ((insn
& 0x00007000) >> 4)
3531 | ((insn
& 0x04000000) >> 15);
3532 // Apply a sign to the added.
3535 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3536 - (address
& 0xfffffffc);
3537 Reltype val
= abs(x
);
3538 // Mask out the value and a distinct part of the ADD/SUB opcode
3539 // (bits 7:5 of opword).
3540 insn
= (insn
& 0xfb0f8f00)
3542 | ((val
& 0x700) << 4)
3543 | ((val
& 0x800) << 15);
3544 // Set the opcode according to whether the value to go in the
3545 // place is negative.
3549 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3550 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3551 return ((val
> 0xfff) ?
3552 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3555 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3556 static inline typename
This::Status
3557 thm_pc8(unsigned char* view
,
3558 const Sized_relobj_file
<32, big_endian
>* object
,
3559 const Symbol_value
<32>* psymval
,
3560 Arm_address address
)
3562 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3563 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3564 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3565 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3566 Reltype addend
= ((insn
& 0x00ff) << 2);
3567 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3568 Reltype val
= abs(x
);
3569 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3571 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3572 return ((val
> 0x03fc)
3573 ? This::STATUS_OVERFLOW
3574 : This::STATUS_OKAY
);
3577 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3578 static inline typename
This::Status
3579 thm_pc12(unsigned char* view
,
3580 const Sized_relobj_file
<32, big_endian
>* object
,
3581 const Symbol_value
<32>* psymval
,
3582 Arm_address address
)
3584 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3585 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3586 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3587 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3588 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3589 // Determine a sign for the addend (positive if the U bit is 1).
3590 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3591 int32_t addend
= (insn
& 0xfff);
3592 // Apply a sign to the added.
3595 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3596 Reltype val
= abs(x
);
3597 // Mask out and apply the value and the U bit.
3598 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3599 // Set the U bit according to whether the value to go in the
3600 // place is positive.
3604 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3605 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3606 return ((val
> 0xfff) ?
3607 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3611 static inline typename
This::Status
3612 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3613 unsigned char* view
,
3614 const Arm_relobj
<big_endian
>* object
,
3615 const Arm_address address
,
3616 const bool is_interworking
)
3619 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3620 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3621 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3623 // Ensure that we have a BX instruction.
3624 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3625 const uint32_t reg
= (val
& 0xf);
3626 if (is_interworking
&& reg
!= 0xf)
3628 Stub_table
<big_endian
>* stub_table
=
3629 object
->stub_table(relinfo
->data_shndx
);
3630 gold_assert(stub_table
!= NULL
);
3632 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3633 gold_assert(stub
!= NULL
);
3635 int32_t veneer_address
=
3636 stub_table
->address() + stub
->offset() - 8 - address
;
3637 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3638 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3639 // Replace with a branch to veneer (B <addr>)
3640 val
= (val
& 0xf0000000) | 0x0a000000
3641 | ((veneer_address
>> 2) & 0x00ffffff);
3645 // Preserve Rm (lowest four bits) and the condition code
3646 // (highest four bits). Other bits encode MOV PC,Rm.
3647 val
= (val
& 0xf000000f) | 0x01a0f000;
3649 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3650 return This::STATUS_OKAY
;
3653 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3654 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3655 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3656 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3657 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3658 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3659 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3660 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3661 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3662 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3663 static inline typename
This::Status
3664 arm_grp_alu(unsigned char* view
,
3665 const Sized_relobj_file
<32, big_endian
>* object
,
3666 const Symbol_value
<32>* psymval
,
3668 Arm_address address
,
3669 Arm_address thumb_bit
,
3670 bool check_overflow
)
3672 gold_assert(group
>= 0 && group
< 3);
3673 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3674 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3675 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3677 // ALU group relocations are allowed only for the ADD/SUB instructions.
3678 // (0x00800000 - ADD, 0x00400000 - SUB)
3679 const Valtype opcode
= insn
& 0x01e00000;
3680 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3681 return This::STATUS_BAD_RELOC
;
3683 // Determine a sign for the addend.
3684 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3685 // shifter = rotate_imm * 2
3686 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3687 // Initial addend value.
3688 int32_t addend
= insn
& 0xff;
3689 // Rotate addend right by shifter.
3690 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3691 // Apply a sign to the added.
3694 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3695 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3696 // Check for overflow if required
3698 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3699 return This::STATUS_OVERFLOW
;
3701 // Mask out the value and the ADD/SUB part of the opcode; take care
3702 // not to destroy the S bit.
3704 // Set the opcode according to whether the value to go in the
3705 // place is negative.
3706 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3707 // Encode the offset (encoded Gn).
3710 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3711 return This::STATUS_OKAY
;
3714 // R_ARM_LDR_PC_G0: S + A - P
3715 // R_ARM_LDR_PC_G1: S + A - P
3716 // R_ARM_LDR_PC_G2: S + A - P
3717 // R_ARM_LDR_SB_G0: S + A - B(S)
3718 // R_ARM_LDR_SB_G1: S + A - B(S)
3719 // R_ARM_LDR_SB_G2: S + A - B(S)
3720 static inline typename
This::Status
3721 arm_grp_ldr(unsigned char* view
,
3722 const Sized_relobj_file
<32, big_endian
>* object
,
3723 const Symbol_value
<32>* psymval
,
3725 Arm_address address
)
3727 gold_assert(group
>= 0 && group
< 3);
3728 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3729 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3730 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3732 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3733 int32_t addend
= (insn
& 0xfff) * sign
;
3734 int32_t x
= (psymval
->value(object
, addend
) - address
);
3735 // Calculate the relevant G(n-1) value to obtain this stage residual.
3737 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3738 if (residual
>= 0x1000)
3739 return This::STATUS_OVERFLOW
;
3741 // Mask out the value and U bit.
3743 // Set the U bit for non-negative values.
3748 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3749 return This::STATUS_OKAY
;
3752 // R_ARM_LDRS_PC_G0: S + A - P
3753 // R_ARM_LDRS_PC_G1: S + A - P
3754 // R_ARM_LDRS_PC_G2: S + A - P
3755 // R_ARM_LDRS_SB_G0: S + A - B(S)
3756 // R_ARM_LDRS_SB_G1: S + A - B(S)
3757 // R_ARM_LDRS_SB_G2: S + A - B(S)
3758 static inline typename
This::Status
3759 arm_grp_ldrs(unsigned char* view
,
3760 const Sized_relobj_file
<32, big_endian
>* object
,
3761 const Symbol_value
<32>* psymval
,
3763 Arm_address address
)
3765 gold_assert(group
>= 0 && group
< 3);
3766 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3767 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3768 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3770 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3771 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3772 int32_t x
= (psymval
->value(object
, addend
) - address
);
3773 // Calculate the relevant G(n-1) value to obtain this stage residual.
3775 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3776 if (residual
>= 0x100)
3777 return This::STATUS_OVERFLOW
;
3779 // Mask out the value and U bit.
3781 // Set the U bit for non-negative values.
3784 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3786 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3787 return This::STATUS_OKAY
;
3790 // R_ARM_LDC_PC_G0: S + A - P
3791 // R_ARM_LDC_PC_G1: S + A - P
3792 // R_ARM_LDC_PC_G2: S + A - P
3793 // R_ARM_LDC_SB_G0: S + A - B(S)
3794 // R_ARM_LDC_SB_G1: S + A - B(S)
3795 // R_ARM_LDC_SB_G2: S + A - B(S)
3796 static inline typename
This::Status
3797 arm_grp_ldc(unsigned char* view
,
3798 const Sized_relobj_file
<32, big_endian
>* object
,
3799 const Symbol_value
<32>* psymval
,
3801 Arm_address address
)
3803 gold_assert(group
>= 0 && group
< 3);
3804 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3805 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3806 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3808 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3809 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3810 int32_t x
= (psymval
->value(object
, addend
) - address
);
3811 // Calculate the relevant G(n-1) value to obtain this stage residual.
3813 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3814 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3815 return This::STATUS_OVERFLOW
;
3817 // Mask out the value and U bit.
3819 // Set the U bit for non-negative values.
3822 insn
|= (residual
>> 2);
3824 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3825 return This::STATUS_OKAY
;
3829 // Relocate ARM long branches. This handles relocation types
3830 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3831 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3832 // undefined and we do not use PLT in this relocation. In such a case,
3833 // the branch is converted into an NOP.
3835 template<bool big_endian
>
3836 typename Arm_relocate_functions
<big_endian
>::Status
3837 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3838 unsigned int r_type
,
3839 const Relocate_info
<32, big_endian
>* relinfo
,
3840 unsigned char* view
,
3841 const Sized_symbol
<32>* gsym
,
3842 const Arm_relobj
<big_endian
>* object
,
3844 const Symbol_value
<32>* psymval
,
3845 Arm_address address
,
3846 Arm_address thumb_bit
,
3847 bool is_weakly_undefined_without_plt
)
3849 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3850 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3851 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3853 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3854 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3855 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3856 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3857 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3858 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3859 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3861 // Check that the instruction is valid.
3862 if (r_type
== elfcpp::R_ARM_CALL
)
3864 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3865 return This::STATUS_BAD_RELOC
;
3867 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3869 if (!insn_is_b
&& !insn_is_cond_bl
)
3870 return This::STATUS_BAD_RELOC
;
3872 else if (r_type
== elfcpp::R_ARM_PLT32
)
3874 if (!insn_is_any_branch
)
3875 return This::STATUS_BAD_RELOC
;
3877 else if (r_type
== elfcpp::R_ARM_XPC25
)
3879 // FIXME: AAELF document IH0044C does not say much about it other
3880 // than it being obsolete.
3881 if (!insn_is_any_branch
)
3882 return This::STATUS_BAD_RELOC
;
3887 // A branch to an undefined weak symbol is turned into a jump to
3888 // the next instruction unless a PLT entry will be created.
3889 // Do the same for local undefined symbols.
3890 // The jump to the next instruction is optimized as a NOP depending
3891 // on the architecture.
3892 const Target_arm
<big_endian
>* arm_target
=
3893 Target_arm
<big_endian
>::default_target();
3894 if (is_weakly_undefined_without_plt
)
3896 gold_assert(!parameters
->options().relocatable());
3897 Valtype cond
= val
& 0xf0000000U
;
3898 if (arm_target
->may_use_arm_nop())
3899 val
= cond
| 0x0320f000;
3901 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3902 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3903 return This::STATUS_OKAY
;
3906 Valtype addend
= Bits
<26>::sign_extend32(val
<< 2);
3907 Valtype branch_target
= psymval
->value(object
, addend
);
3908 int32_t branch_offset
= branch_target
- address
;
3910 // We need a stub if the branch offset is too large or if we need
3912 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
3913 Reloc_stub
* stub
= NULL
;
3915 if (!parameters
->options().relocatable()
3916 && (Bits
<26>::has_overflow32(branch_offset
)
3917 || ((thumb_bit
!= 0)
3918 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
3920 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
3922 Stub_type stub_type
=
3923 Reloc_stub::stub_type_for_reloc(r_type
, address
,
3924 unadjusted_branch_target
,
3926 if (stub_type
!= arm_stub_none
)
3928 Stub_table
<big_endian
>* stub_table
=
3929 object
->stub_table(relinfo
->data_shndx
);
3930 gold_assert(stub_table
!= NULL
);
3932 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3933 stub
= stub_table
->find_reloc_stub(stub_key
);
3934 gold_assert(stub
!= NULL
);
3935 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3936 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3937 branch_offset
= branch_target
- address
;
3938 gold_assert(!Bits
<26>::has_overflow32(branch_offset
));
3942 // At this point, if we still need to switch mode, the instruction
3943 // must either be a BLX or a BL that can be converted to a BLX.
3947 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
3948 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
3951 val
= Bits
<32>::bit_select32(val
, (branch_offset
>> 2), 0xffffffUL
);
3952 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3953 return (Bits
<26>::has_overflow32(branch_offset
)
3954 ? This::STATUS_OVERFLOW
3955 : This::STATUS_OKAY
);
3958 // Relocate THUMB long branches. This handles relocation types
3959 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3960 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3961 // undefined and we do not use PLT in this relocation. In such a case,
3962 // the branch is converted into an NOP.
3964 template<bool big_endian
>
3965 typename Arm_relocate_functions
<big_endian
>::Status
3966 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
3967 unsigned int r_type
,
3968 const Relocate_info
<32, big_endian
>* relinfo
,
3969 unsigned char* view
,
3970 const Sized_symbol
<32>* gsym
,
3971 const Arm_relobj
<big_endian
>* object
,
3973 const Symbol_value
<32>* psymval
,
3974 Arm_address address
,
3975 Arm_address thumb_bit
,
3976 bool is_weakly_undefined_without_plt
)
3978 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3979 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3980 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3981 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3983 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3985 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
3986 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
3988 // Check that the instruction is valid.
3989 if (r_type
== elfcpp::R_ARM_THM_CALL
)
3991 if (!is_bl_insn
&& !is_blx_insn
)
3992 return This::STATUS_BAD_RELOC
;
3994 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
3996 // This cannot be a BLX.
3998 return This::STATUS_BAD_RELOC
;
4000 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
4002 // Check for Thumb to Thumb call.
4004 return This::STATUS_BAD_RELOC
;
4007 gold_warning(_("%s: Thumb BLX instruction targets "
4008 "thumb function '%s'."),
4009 object
->name().c_str(),
4010 (gsym
? gsym
->name() : "(local)"));
4011 // Convert BLX to BL.
4012 lower_insn
|= 0x1000U
;
4018 // A branch to an undefined weak symbol is turned into a jump to
4019 // the next instruction unless a PLT entry will be created.
4020 // The jump to the next instruction is optimized as a NOP.W for
4021 // Thumb-2 enabled architectures.
4022 const Target_arm
<big_endian
>* arm_target
=
4023 Target_arm
<big_endian
>::default_target();
4024 if (is_weakly_undefined_without_plt
)
4026 gold_assert(!parameters
->options().relocatable());
4027 if (arm_target
->may_use_thumb2_nop())
4029 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4030 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4034 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4035 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4037 return This::STATUS_OKAY
;
4040 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4041 Arm_address branch_target
= psymval
->value(object
, addend
);
4043 // For BLX, bit 1 of target address comes from bit 1 of base address.
4044 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4045 if (thumb_bit
== 0 && may_use_blx
)
4046 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4048 int32_t branch_offset
= branch_target
- address
;
4050 // We need a stub if the branch offset is too large or if we need
4052 bool thumb2
= arm_target
->using_thumb2();
4053 if (!parameters
->options().relocatable()
4054 && ((!thumb2
&& Bits
<23>::has_overflow32(branch_offset
))
4055 || (thumb2
&& Bits
<25>::has_overflow32(branch_offset
))
4056 || ((thumb_bit
== 0)
4057 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4058 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4060 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4062 Stub_type stub_type
=
4063 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4064 unadjusted_branch_target
,
4067 if (stub_type
!= arm_stub_none
)
4069 Stub_table
<big_endian
>* stub_table
=
4070 object
->stub_table(relinfo
->data_shndx
);
4071 gold_assert(stub_table
!= NULL
);
4073 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4074 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4075 gold_assert(stub
!= NULL
);
4076 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4077 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4078 if (thumb_bit
== 0 && may_use_blx
)
4079 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4080 branch_offset
= branch_target
- address
;
4084 // At this point, if we still need to switch mode, the instruction
4085 // must either be a BLX or a BL that can be converted to a BLX.
4088 gold_assert(may_use_blx
4089 && (r_type
== elfcpp::R_ARM_THM_CALL
4090 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4091 // Make sure this is a BLX.
4092 lower_insn
&= ~0x1000U
;
4096 // Make sure this is a BL.
4097 lower_insn
|= 0x1000U
;
4100 // For a BLX instruction, make sure that the relocation is rounded up
4101 // to a word boundary. This follows the semantics of the instruction
4102 // which specifies that bit 1 of the target address will come from bit
4103 // 1 of the base address.
4104 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4105 gold_assert((branch_offset
& 3) == 0);
4107 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4108 // We use the Thumb-2 encoding, which is safe even if dealing with
4109 // a Thumb-1 instruction by virtue of our overflow check above. */
4110 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4111 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4113 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4114 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4116 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
4119 ? Bits
<25>::has_overflow32(branch_offset
)
4120 : Bits
<23>::has_overflow32(branch_offset
))
4121 ? This::STATUS_OVERFLOW
4122 : This::STATUS_OKAY
);
4125 // Relocate THUMB-2 long conditional branches.
4126 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4127 // undefined and we do not use PLT in this relocation. In such a case,
4128 // the branch is converted into an NOP.
4130 template<bool big_endian
>
4131 typename Arm_relocate_functions
<big_endian
>::Status
4132 Arm_relocate_functions
<big_endian
>::thm_jump19(
4133 unsigned char* view
,
4134 const Arm_relobj
<big_endian
>* object
,
4135 const Symbol_value
<32>* psymval
,
4136 Arm_address address
,
4137 Arm_address thumb_bit
)
4139 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4140 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4141 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4142 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4143 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4145 Arm_address branch_target
= psymval
->value(object
, addend
);
4146 int32_t branch_offset
= branch_target
- address
;
4148 // ??? Should handle interworking? GCC might someday try to
4149 // use this for tail calls.
4150 // FIXME: We do support thumb entry to PLT yet.
4153 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4154 return This::STATUS_BAD_RELOC
;
4157 // Put RELOCATION back into the insn.
4158 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4159 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4161 // Put the relocated value back in the object file:
4162 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4163 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4165 return (Bits
<21>::has_overflow32(branch_offset
)
4166 ? This::STATUS_OVERFLOW
4167 : This::STATUS_OKAY
);
4170 // Get the GOT section, creating it if necessary.
4172 template<bool big_endian
>
4173 Arm_output_data_got
<big_endian
>*
4174 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4176 if (this->got_
== NULL
)
4178 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4180 // When using -z now, we can treat .got as a relro section.
4181 // Without -z now, it is modified after program startup by lazy
4183 bool is_got_relro
= parameters
->options().now();
4184 Output_section_order got_order
= (is_got_relro
4188 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4189 // .got.plt sections in output. The output .got section contains both
4190 // PLT and non-PLT GOT entries.
4191 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4193 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4194 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4195 this->got_
, got_order
, is_got_relro
);
4197 // The old GNU linker creates a .got.plt section. We just
4198 // create another set of data in the .got section. Note that we
4199 // always create a PLT if we create a GOT, although the PLT
4201 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4202 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4203 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4204 this->got_plt_
, got_order
, is_got_relro
);
4206 // The first three entries are reserved.
4207 this->got_plt_
->set_current_data_size(3 * 4);
4209 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4210 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4211 Symbol_table::PREDEFINED
,
4213 0, 0, elfcpp::STT_OBJECT
,
4215 elfcpp::STV_HIDDEN
, 0,
4221 // Get the dynamic reloc section, creating it if necessary.
4223 template<bool big_endian
>
4224 typename Target_arm
<big_endian
>::Reloc_section
*
4225 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4227 if (this->rel_dyn_
== NULL
)
4229 gold_assert(layout
!= NULL
);
4230 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4231 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4232 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4233 ORDER_DYNAMIC_RELOCS
, false);
4235 return this->rel_dyn_
;
4238 // Insn_template methods.
4240 // Return byte size of an instruction template.
4243 Insn_template::size() const
4245 switch (this->type())
4248 case THUMB16_SPECIAL_TYPE
:
4259 // Return alignment of an instruction template.
4262 Insn_template::alignment() const
4264 switch (this->type())
4267 case THUMB16_SPECIAL_TYPE
:
4278 // Stub_template methods.
4280 Stub_template::Stub_template(
4281 Stub_type type
, const Insn_template
* insns
,
4283 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4284 entry_in_thumb_mode_(false), relocs_()
4288 // Compute byte size and alignment of stub template.
4289 for (size_t i
= 0; i
< insn_count
; i
++)
4291 unsigned insn_alignment
= insns
[i
].alignment();
4292 size_t insn_size
= insns
[i
].size();
4293 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4294 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4295 switch (insns
[i
].type())
4297 case Insn_template::THUMB16_TYPE
:
4298 case Insn_template::THUMB16_SPECIAL_TYPE
:
4300 this->entry_in_thumb_mode_
= true;
4303 case Insn_template::THUMB32_TYPE
:
4304 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4305 this->relocs_
.push_back(Reloc(i
, offset
));
4307 this->entry_in_thumb_mode_
= true;
4310 case Insn_template::ARM_TYPE
:
4311 // Handle cases where the target is encoded within the
4313 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4314 this->relocs_
.push_back(Reloc(i
, offset
));
4317 case Insn_template::DATA_TYPE
:
4318 // Entry point cannot be data.
4319 gold_assert(i
!= 0);
4320 this->relocs_
.push_back(Reloc(i
, offset
));
4326 offset
+= insn_size
;
4328 this->size_
= offset
;
4333 // Template to implement do_write for a specific target endianness.
4335 template<bool big_endian
>
4337 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4339 const Stub_template
* stub_template
= this->stub_template();
4340 const Insn_template
* insns
= stub_template
->insns();
4342 // FIXME: We do not handle BE8 encoding yet.
4343 unsigned char* pov
= view
;
4344 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4346 switch (insns
[i
].type())
4348 case Insn_template::THUMB16_TYPE
:
4349 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4351 case Insn_template::THUMB16_SPECIAL_TYPE
:
4352 elfcpp::Swap
<16, big_endian
>::writeval(
4354 this->thumb16_special(i
));
4356 case Insn_template::THUMB32_TYPE
:
4358 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4359 uint32_t lo
= insns
[i
].data() & 0xffff;
4360 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4361 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4364 case Insn_template::ARM_TYPE
:
4365 case Insn_template::DATA_TYPE
:
4366 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4371 pov
+= insns
[i
].size();
4373 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4376 // Reloc_stub::Key methods.
4378 // Dump a Key as a string for debugging.
4381 Reloc_stub::Key::name() const
4383 if (this->r_sym_
== invalid_index
)
4385 // Global symbol key name
4386 // <stub-type>:<symbol name>:<addend>.
4387 const std::string sym_name
= this->u_
.symbol
->name();
4388 // We need to print two hex number and two colons. So just add 100 bytes
4389 // to the symbol name size.
4390 size_t len
= sym_name
.size() + 100;
4391 char* buffer
= new char[len
];
4392 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4393 sym_name
.c_str(), this->addend_
);
4394 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4396 return std::string(buffer
);
4400 // local symbol key name
4401 // <stub-type>:<object>:<r_sym>:<addend>.
4402 const size_t len
= 200;
4404 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4405 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4406 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4407 return std::string(buffer
);
4411 // Reloc_stub methods.
4413 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4414 // LOCATION to DESTINATION.
4415 // This code is based on the arm_type_of_stub function in
4416 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4420 Reloc_stub::stub_type_for_reloc(
4421 unsigned int r_type
,
4422 Arm_address location
,
4423 Arm_address destination
,
4424 bool target_is_thumb
)
4426 Stub_type stub_type
= arm_stub_none
;
4428 // This is a bit ugly but we want to avoid using a templated class for
4429 // big and little endianities.
4431 bool should_force_pic_veneer
;
4434 if (parameters
->target().is_big_endian())
4436 const Target_arm
<true>* big_endian_target
=
4437 Target_arm
<true>::default_target();
4438 may_use_blx
= big_endian_target
->may_use_v5t_interworking();
4439 should_force_pic_veneer
= big_endian_target
->should_force_pic_veneer();
4440 thumb2
= big_endian_target
->using_thumb2();
4441 thumb_only
= big_endian_target
->using_thumb_only();
4445 const Target_arm
<false>* little_endian_target
=
4446 Target_arm
<false>::default_target();
4447 may_use_blx
= little_endian_target
->may_use_v5t_interworking();
4448 should_force_pic_veneer
= little_endian_target
->should_force_pic_veneer();
4449 thumb2
= little_endian_target
->using_thumb2();
4450 thumb_only
= little_endian_target
->using_thumb_only();
4453 int64_t branch_offset
;
4454 bool output_is_position_independent
=
4455 parameters
->options().output_is_position_independent();
4456 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4458 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4459 // base address (instruction address + 4).
4460 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4461 destination
= Bits
<32>::bit_select32(destination
, location
, 0x2);
4462 branch_offset
= static_cast<int64_t>(destination
) - location
;
4464 // Handle cases where:
4465 // - this call goes too far (different Thumb/Thumb2 max
4467 // - it's a Thumb->Arm call and blx is not available, or it's a
4468 // Thumb->Arm branch (not bl). A stub is needed in this case.
4470 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4471 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4473 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4474 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4475 || ((!target_is_thumb
)
4476 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4477 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4479 if (target_is_thumb
)
4484 stub_type
= (output_is_position_independent
4485 || should_force_pic_veneer
)
4488 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4489 // V5T and above. Stub starts with ARM code, so
4490 // we must be able to switch mode before
4491 // reaching it, which is only possible for 'bl'
4492 // (ie R_ARM_THM_CALL relocation).
4493 ? arm_stub_long_branch_any_thumb_pic
4494 // On V4T, use Thumb code only.
4495 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4499 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4500 ? arm_stub_long_branch_any_any
// V5T and above.
4501 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4505 stub_type
= (output_is_position_independent
4506 || should_force_pic_veneer
)
4507 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4508 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4515 // FIXME: We should check that the input section is from an
4516 // object that has interwork enabled.
4518 stub_type
= (output_is_position_independent
4519 || should_force_pic_veneer
)
4522 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4523 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4524 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4528 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4529 ? arm_stub_long_branch_any_any
// V5T and above.
4530 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4532 // Handle v4t short branches.
4533 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4534 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4535 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4536 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4540 else if (r_type
== elfcpp::R_ARM_CALL
4541 || r_type
== elfcpp::R_ARM_JUMP24
4542 || r_type
== elfcpp::R_ARM_PLT32
)
4544 branch_offset
= static_cast<int64_t>(destination
) - location
;
4545 if (target_is_thumb
)
4549 // FIXME: We should check that the input section is from an
4550 // object that has interwork enabled.
4552 // We have an extra 2-bytes reach because of
4553 // the mode change (bit 24 (H) of BLX encoding).
4554 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4555 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4556 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4557 || (r_type
== elfcpp::R_ARM_JUMP24
)
4558 || (r_type
== elfcpp::R_ARM_PLT32
))
4560 stub_type
= (output_is_position_independent
4561 || should_force_pic_veneer
)
4564 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4565 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4569 ? arm_stub_long_branch_any_any
// V5T and above.
4570 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4576 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4577 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4579 stub_type
= (output_is_position_independent
4580 || should_force_pic_veneer
)
4581 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4582 : arm_stub_long_branch_any_any
; /// non-PIC.
4590 // Cortex_a8_stub methods.
4592 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4593 // I is the position of the instruction template in the stub template.
4596 Cortex_a8_stub::do_thumb16_special(size_t i
)
4598 // The only use of this is to copy condition code from a conditional
4599 // branch being worked around to the corresponding conditional branch in
4601 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4603 uint16_t data
= this->stub_template()->insns()[i
].data();
4604 gold_assert((data
& 0xff00U
) == 0xd000U
);
4605 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4609 // Stub_factory methods.
4611 Stub_factory::Stub_factory()
4613 // The instruction template sequences are declared as static
4614 // objects and initialized first time the constructor runs.
4616 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4617 // to reach the stub if necessary.
4618 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4620 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4621 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4622 // dcd R_ARM_ABS32(X)
4625 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4627 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4629 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4630 Insn_template::arm_insn(0xe12fff1c), // bx ip
4631 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4632 // dcd R_ARM_ABS32(X)
4635 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4636 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4638 Insn_template::thumb16_insn(0xb401), // push {r0}
4639 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4640 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4641 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4642 Insn_template::thumb16_insn(0x4760), // bx ip
4643 Insn_template::thumb16_insn(0xbf00), // nop
4644 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4645 // dcd R_ARM_ABS32(X)
4648 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4650 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4652 Insn_template::thumb16_insn(0x4778), // bx pc
4653 Insn_template::thumb16_insn(0x46c0), // nop
4654 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4655 Insn_template::arm_insn(0xe12fff1c), // bx ip
4656 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4657 // dcd R_ARM_ABS32(X)
4660 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4662 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4664 Insn_template::thumb16_insn(0x4778), // bx pc
4665 Insn_template::thumb16_insn(0x46c0), // nop
4666 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4667 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4668 // dcd R_ARM_ABS32(X)
4671 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4672 // one, when the destination is close enough.
4673 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4675 Insn_template::thumb16_insn(0x4778), // bx pc
4676 Insn_template::thumb16_insn(0x46c0), // nop
4677 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4680 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4681 // blx to reach the stub if necessary.
4682 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4684 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4685 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4686 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4687 // dcd R_ARM_REL32(X-4)
4690 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4691 // blx to reach the stub if necessary. We can not add into pc;
4692 // it is not guaranteed to mode switch (different in ARMv6 and
4694 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4696 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4697 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4698 Insn_template::arm_insn(0xe12fff1c), // bx ip
4699 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4700 // dcd R_ARM_REL32(X)
4703 // V4T ARM -> ARM long branch stub, PIC.
4704 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4706 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4707 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4708 Insn_template::arm_insn(0xe12fff1c), // bx ip
4709 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4710 // dcd R_ARM_REL32(X)
4713 // V4T Thumb -> ARM long branch stub, PIC.
4714 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4716 Insn_template::thumb16_insn(0x4778), // bx pc
4717 Insn_template::thumb16_insn(0x46c0), // nop
4718 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4719 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4720 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4721 // dcd R_ARM_REL32(X)
4724 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4726 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4728 Insn_template::thumb16_insn(0xb401), // push {r0}
4729 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4730 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4731 Insn_template::thumb16_insn(0x4484), // add ip, r0
4732 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4733 Insn_template::thumb16_insn(0x4760), // bx ip
4734 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4735 // dcd R_ARM_REL32(X)
4738 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4740 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4742 Insn_template::thumb16_insn(0x4778), // bx pc
4743 Insn_template::thumb16_insn(0x46c0), // nop
4744 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4745 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4746 Insn_template::arm_insn(0xe12fff1c), // bx ip
4747 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4748 // dcd R_ARM_REL32(X)
4751 // Cortex-A8 erratum-workaround stubs.
4753 // Stub used for conditional branches (which may be beyond +/-1MB away,
4754 // so we can't use a conditional branch to reach this stub).
4761 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4763 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4764 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4765 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4769 // Stub used for b.w and bl.w instructions.
4771 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4773 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4776 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4778 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4781 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4782 // instruction (which switches to ARM mode) to point to this stub. Jump to
4783 // the real destination using an ARM-mode branch.
4784 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4786 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4789 // Stub used to provide an interworking for R_ARM_V4BX relocation
4790 // (bx r[n] instruction).
4791 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4793 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4794 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4795 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4798 // Fill in the stub template look-up table. Stub templates are constructed
4799 // per instance of Stub_factory for fast look-up without locking
4800 // in a thread-enabled environment.
4802 this->stub_templates_
[arm_stub_none
] =
4803 new Stub_template(arm_stub_none
, NULL
, 0);
4805 #define DEF_STUB(x) \
4809 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4810 Stub_type type = arm_stub_##x; \
4811 this->stub_templates_[type] = \
4812 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4820 // Stub_table methods.
4822 // Remove all Cortex-A8 stub.
4824 template<bool big_endian
>
4826 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4828 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4829 p
!= this->cortex_a8_stubs_
.end();
4832 this->cortex_a8_stubs_
.clear();
4835 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4837 template<bool big_endian
>
4839 Stub_table
<big_endian
>::relocate_stub(
4841 const Relocate_info
<32, big_endian
>* relinfo
,
4842 Target_arm
<big_endian
>* arm_target
,
4843 Output_section
* output_section
,
4844 unsigned char* view
,
4845 Arm_address address
,
4846 section_size_type view_size
)
4848 const Stub_template
* stub_template
= stub
->stub_template();
4849 if (stub_template
->reloc_count() != 0)
4851 // Adjust view to cover the stub only.
4852 section_size_type offset
= stub
->offset();
4853 section_size_type stub_size
= stub_template
->size();
4854 gold_assert(offset
+ stub_size
<= view_size
);
4856 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4857 address
+ offset
, stub_size
);
4861 // Relocate all stubs in this stub table.
4863 template<bool big_endian
>
4865 Stub_table
<big_endian
>::relocate_stubs(
4866 const Relocate_info
<32, big_endian
>* relinfo
,
4867 Target_arm
<big_endian
>* arm_target
,
4868 Output_section
* output_section
,
4869 unsigned char* view
,
4870 Arm_address address
,
4871 section_size_type view_size
)
4873 // If we are passed a view bigger than the stub table's. we need to
4875 gold_assert(address
== this->address()
4877 == static_cast<section_size_type
>(this->data_size())));
4879 // Relocate all relocation stubs.
4880 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4881 p
!= this->reloc_stubs_
.end();
4883 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4884 address
, view_size
);
4886 // Relocate all Cortex-A8 stubs.
4887 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4888 p
!= this->cortex_a8_stubs_
.end();
4890 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4891 address
, view_size
);
4893 // Relocate all ARM V4BX stubs.
4894 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
4895 p
!= this->arm_v4bx_stubs_
.end();
4899 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
4900 address
, view_size
);
4904 // Write out the stubs to file.
4906 template<bool big_endian
>
4908 Stub_table
<big_endian
>::do_write(Output_file
* of
)
4910 off_t offset
= this->offset();
4911 const section_size_type oview_size
=
4912 convert_to_section_size_type(this->data_size());
4913 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4915 // Write relocation stubs.
4916 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4917 p
!= this->reloc_stubs_
.end();
4920 Reloc_stub
* stub
= p
->second
;
4921 Arm_address address
= this->address() + stub
->offset();
4923 == align_address(address
,
4924 stub
->stub_template()->alignment()));
4925 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4929 // Write Cortex-A8 stubs.
4930 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4931 p
!= this->cortex_a8_stubs_
.end();
4934 Cortex_a8_stub
* stub
= p
->second
;
4935 Arm_address address
= this->address() + stub
->offset();
4937 == align_address(address
,
4938 stub
->stub_template()->alignment()));
4939 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4943 // Write ARM V4BX relocation stubs.
4944 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4945 p
!= this->arm_v4bx_stubs_
.end();
4951 Arm_address address
= this->address() + (*p
)->offset();
4953 == align_address(address
,
4954 (*p
)->stub_template()->alignment()));
4955 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
4959 of
->write_output_view(this->offset(), oview_size
, oview
);
4962 // Update the data size and address alignment of the stub table at the end
4963 // of a relaxation pass. Return true if either the data size or the
4964 // alignment changed in this relaxation pass.
4966 template<bool big_endian
>
4968 Stub_table
<big_endian
>::update_data_size_and_addralign()
4970 // Go over all stubs in table to compute data size and address alignment.
4971 off_t size
= this->reloc_stubs_size_
;
4972 unsigned addralign
= this->reloc_stubs_addralign_
;
4974 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4975 p
!= this->cortex_a8_stubs_
.end();
4978 const Stub_template
* stub_template
= p
->second
->stub_template();
4979 addralign
= std::max(addralign
, stub_template
->alignment());
4980 size
= (align_address(size
, stub_template
->alignment())
4981 + stub_template
->size());
4984 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4985 p
!= this->arm_v4bx_stubs_
.end();
4991 const Stub_template
* stub_template
= (*p
)->stub_template();
4992 addralign
= std::max(addralign
, stub_template
->alignment());
4993 size
= (align_address(size
, stub_template
->alignment())
4994 + stub_template
->size());
4997 // Check if either data size or alignment changed in this pass.
4998 // Update prev_data_size_ and prev_addralign_. These will be used
4999 // as the current data size and address alignment for the next pass.
5000 bool changed
= size
!= this->prev_data_size_
;
5001 this->prev_data_size_
= size
;
5003 if (addralign
!= this->prev_addralign_
)
5005 this->prev_addralign_
= addralign
;
5010 // Finalize the stubs. This sets the offsets of the stubs within the stub
5011 // table. It also marks all input sections needing Cortex-A8 workaround.
5013 template<bool big_endian
>
5015 Stub_table
<big_endian
>::finalize_stubs()
5017 off_t off
= this->reloc_stubs_size_
;
5018 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5019 p
!= this->cortex_a8_stubs_
.end();
5022 Cortex_a8_stub
* stub
= p
->second
;
5023 const Stub_template
* stub_template
= stub
->stub_template();
5024 uint64_t stub_addralign
= stub_template
->alignment();
5025 off
= align_address(off
, stub_addralign
);
5026 stub
->set_offset(off
);
5027 off
+= stub_template
->size();
5029 // Mark input section so that we can determine later if a code section
5030 // needs the Cortex-A8 workaround quickly.
5031 Arm_relobj
<big_endian
>* arm_relobj
=
5032 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5033 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5036 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5037 p
!= this->arm_v4bx_stubs_
.end();
5043 const Stub_template
* stub_template
= (*p
)->stub_template();
5044 uint64_t stub_addralign
= stub_template
->alignment();
5045 off
= align_address(off
, stub_addralign
);
5046 (*p
)->set_offset(off
);
5047 off
+= stub_template
->size();
5050 gold_assert(off
<= this->prev_data_size_
);
5053 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5054 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5055 // of the address range seen by the linker.
5057 template<bool big_endian
>
5059 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5060 Target_arm
<big_endian
>* arm_target
,
5061 unsigned char* view
,
5062 Arm_address view_address
,
5063 section_size_type view_size
)
5065 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5066 for (Cortex_a8_stub_list::const_iterator p
=
5067 this->cortex_a8_stubs_
.lower_bound(view_address
);
5068 ((p
!= this->cortex_a8_stubs_
.end())
5069 && (p
->first
< (view_address
+ view_size
)));
5072 // We do not store the THUMB bit in the LSB of either the branch address
5073 // or the stub offset. There is no need to strip the LSB.
5074 Arm_address branch_address
= p
->first
;
5075 const Cortex_a8_stub
* stub
= p
->second
;
5076 Arm_address stub_address
= this->address() + stub
->offset();
5078 // Offset of the branch instruction relative to this view.
5079 section_size_type offset
=
5080 convert_to_section_size_type(branch_address
- view_address
);
5081 gold_assert((offset
+ 4) <= view_size
);
5083 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5084 view
+ offset
, branch_address
);
5088 // Arm_input_section methods.
5090 // Initialize an Arm_input_section.
5092 template<bool big_endian
>
5094 Arm_input_section
<big_endian
>::init()
5096 Relobj
* relobj
= this->relobj();
5097 unsigned int shndx
= this->shndx();
5099 // We have to cache original size, alignment and contents to avoid locking
5100 // the original file.
5101 this->original_addralign_
=
5102 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5104 // This is not efficient but we expect only a small number of relaxed
5105 // input sections for stubs.
5106 section_size_type section_size
;
5107 const unsigned char* section_contents
=
5108 relobj
->section_contents(shndx
, §ion_size
, false);
5109 this->original_size_
=
5110 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5112 gold_assert(this->original_contents_
== NULL
);
5113 this->original_contents_
= new unsigned char[section_size
];
5114 memcpy(this->original_contents_
, section_contents
, section_size
);
5116 // We want to make this look like the original input section after
5117 // output sections are finalized.
5118 Output_section
* os
= relobj
->output_section(shndx
);
5119 off_t offset
= relobj
->output_section_offset(shndx
);
5120 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5121 this->set_address(os
->address() + offset
);
5122 this->set_file_offset(os
->offset() + offset
);
5124 this->set_current_data_size(this->original_size_
);
5125 this->finalize_data_size();
5128 template<bool big_endian
>
5130 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5132 // We have to write out the original section content.
5133 gold_assert(this->original_contents_
!= NULL
);
5134 of
->write(this->offset(), this->original_contents_
,
5135 this->original_size_
);
5137 // If this owns a stub table and it is not empty, write it.
5138 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5139 this->stub_table_
->write(of
);
5142 // Finalize data size.
5144 template<bool big_endian
>
5146 Arm_input_section
<big_endian
>::set_final_data_size()
5148 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5150 if (this->is_stub_table_owner())
5152 this->stub_table_
->finalize_data_size();
5153 off
= align_address(off
, this->stub_table_
->addralign());
5154 off
+= this->stub_table_
->data_size();
5156 this->set_data_size(off
);
5159 // Reset address and file offset.
5161 template<bool big_endian
>
5163 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5165 // Size of the original input section contents.
5166 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5168 // If this is a stub table owner, account for the stub table size.
5169 if (this->is_stub_table_owner())
5171 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5173 // Reset the stub table's address and file offset. The
5174 // current data size for child will be updated after that.
5175 stub_table_
->reset_address_and_file_offset();
5176 off
= align_address(off
, stub_table_
->addralign());
5177 off
+= stub_table
->current_data_size();
5180 this->set_current_data_size(off
);
5183 // Arm_exidx_cantunwind methods.
5185 // Write this to Output file OF for a fixed endianness.
5187 template<bool big_endian
>
5189 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5191 off_t offset
= this->offset();
5192 const section_size_type oview_size
= 8;
5193 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5195 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
5197 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5198 gold_assert(os
!= NULL
);
5200 Arm_relobj
<big_endian
>* arm_relobj
=
5201 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5202 Arm_address output_offset
=
5203 arm_relobj
->get_output_section_offset(this->shndx_
);
5204 Arm_address section_start
;
5205 section_size_type section_size
;
5207 // Find out the end of the text section referred by this.
5208 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5210 section_start
= os
->address() + output_offset
;
5211 const Arm_exidx_input_section
* exidx_input_section
=
5212 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5213 gold_assert(exidx_input_section
!= NULL
);
5215 convert_to_section_size_type(exidx_input_section
->text_size());
5219 // Currently this only happens for a relaxed section.
5220 const Output_relaxed_input_section
* poris
=
5221 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5222 gold_assert(poris
!= NULL
);
5223 section_start
= poris
->address();
5224 section_size
= convert_to_section_size_type(poris
->data_size());
5227 // We always append this to the end of an EXIDX section.
5228 Arm_address output_address
= section_start
+ section_size
;
5230 // Write out the entry. The first word either points to the beginning
5231 // or after the end of a text section. The second word is the special
5232 // EXIDX_CANTUNWIND value.
5233 uint32_t prel31_offset
= output_address
- this->address();
5234 if (Bits
<31>::has_overflow32(offset
))
5235 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5236 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
,
5237 prel31_offset
& 0x7fffffffU
);
5238 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
+ 4,
5239 elfcpp::EXIDX_CANTUNWIND
);
5241 of
->write_output_view(this->offset(), oview_size
, oview
);
5244 // Arm_exidx_merged_section methods.
5246 // Constructor for Arm_exidx_merged_section.
5247 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5248 // SECTION_OFFSET_MAP points to a section offset map describing how
5249 // parts of the input section are mapped to output. DELETED_BYTES is
5250 // the number of bytes deleted from the EXIDX input section.
5252 Arm_exidx_merged_section::Arm_exidx_merged_section(
5253 const Arm_exidx_input_section
& exidx_input_section
,
5254 const Arm_exidx_section_offset_map
& section_offset_map
,
5255 uint32_t deleted_bytes
)
5256 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5257 exidx_input_section
.shndx(),
5258 exidx_input_section
.addralign()),
5259 exidx_input_section_(exidx_input_section
),
5260 section_offset_map_(section_offset_map
)
5262 // If we retain or discard the whole EXIDX input section, we would
5264 gold_assert(deleted_bytes
!= 0
5265 && deleted_bytes
!= this->exidx_input_section_
.size());
5267 // Fix size here so that we do not need to implement set_final_data_size.
5268 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5269 this->set_data_size(size
);
5270 this->fix_data_size();
5272 // Allocate buffer for section contents and build contents.
5273 this->section_contents_
= new unsigned char[size
];
5276 // Build the contents of a merged EXIDX output section.
5279 Arm_exidx_merged_section::build_contents(
5280 const unsigned char* original_contents
,
5281 section_size_type original_size
)
5283 // Go over spans of input offsets and write only those that are not
5285 section_offset_type in_start
= 0;
5286 section_offset_type out_start
= 0;
5287 section_offset_type in_max
=
5288 convert_types
<section_offset_type
>(original_size
);
5289 section_offset_type out_max
=
5290 convert_types
<section_offset_type
>(this->data_size());
5291 for (Arm_exidx_section_offset_map::const_iterator p
=
5292 this->section_offset_map_
.begin();
5293 p
!= this->section_offset_map_
.end();
5296 section_offset_type in_end
= p
->first
;
5297 gold_assert(in_end
>= in_start
);
5298 section_offset_type out_end
= p
->second
;
5299 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5302 size_t out_chunk_size
=
5303 convert_types
<size_t>(out_end
- out_start
+ 1);
5305 gold_assert(out_chunk_size
== in_chunk_size
5306 && in_end
< in_max
&& out_end
< out_max
);
5308 memcpy(this->section_contents_
+ out_start
,
5309 original_contents
+ in_start
,
5311 out_start
+= out_chunk_size
;
5313 in_start
+= in_chunk_size
;
5317 // Given an input OBJECT, an input section index SHNDX within that
5318 // object, and an OFFSET relative to the start of that input
5319 // section, return whether or not the corresponding offset within
5320 // the output section is known. If this function returns true, it
5321 // sets *POUTPUT to the output offset. The value -1 indicates that
5322 // this input offset is being discarded.
5325 Arm_exidx_merged_section::do_output_offset(
5326 const Relobj
* relobj
,
5328 section_offset_type offset
,
5329 section_offset_type
* poutput
) const
5331 // We only handle offsets for the original EXIDX input section.
5332 if (relobj
!= this->exidx_input_section_
.relobj()
5333 || shndx
!= this->exidx_input_section_
.shndx())
5336 section_offset_type section_size
=
5337 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5338 if (offset
< 0 || offset
>= section_size
)
5339 // Input offset is out of valid range.
5343 // We need to look up the section offset map to determine the output
5344 // offset. Find the reference point in map that is first offset
5345 // bigger than or equal to this offset.
5346 Arm_exidx_section_offset_map::const_iterator p
=
5347 this->section_offset_map_
.lower_bound(offset
);
5349 // The section offset maps are build such that this should not happen if
5350 // input offset is in the valid range.
5351 gold_assert(p
!= this->section_offset_map_
.end());
5353 // We need to check if this is dropped.
5354 section_offset_type ref
= p
->first
;
5355 section_offset_type mapped_ref
= p
->second
;
5357 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5358 // Offset is present in output.
5359 *poutput
= mapped_ref
+ (offset
- ref
);
5361 // Offset is discarded owing to EXIDX entry merging.
5368 // Write this to output file OF.
5371 Arm_exidx_merged_section::do_write(Output_file
* of
)
5373 off_t offset
= this->offset();
5374 const section_size_type oview_size
= this->data_size();
5375 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5377 Output_section
* os
= this->relobj()->output_section(this->shndx());
5378 gold_assert(os
!= NULL
);
5380 memcpy(oview
, this->section_contents_
, oview_size
);
5381 of
->write_output_view(this->offset(), oview_size
, oview
);
5384 // Arm_exidx_fixup methods.
5386 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5387 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5388 // points to the end of the last seen EXIDX section.
5391 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5393 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5394 && this->last_input_section_
!= NULL
)
5396 Relobj
* relobj
= this->last_input_section_
->relobj();
5397 unsigned int text_shndx
= this->last_input_section_
->link();
5398 Arm_exidx_cantunwind
* cantunwind
=
5399 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5400 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5401 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5405 // Process an EXIDX section entry in input. Return whether this entry
5406 // can be deleted in the output. SECOND_WORD in the second word of the
5410 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5413 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5415 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5416 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5417 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5419 else if ((second_word
& 0x80000000) != 0)
5421 // Inlined unwinding data. Merge if equal to previous.
5422 delete_entry
= (merge_exidx_entries_
5423 && this->last_unwind_type_
== UT_INLINED_ENTRY
5424 && this->last_inlined_entry_
== second_word
);
5425 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5426 this->last_inlined_entry_
= second_word
;
5430 // Normal table entry. In theory we could merge these too,
5431 // but duplicate entries are likely to be much less common.
5432 delete_entry
= false;
5433 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5435 return delete_entry
;
5438 // Update the current section offset map during EXIDX section fix-up.
5439 // If there is no map, create one. INPUT_OFFSET is the offset of a
5440 // reference point, DELETED_BYTES is the number of deleted by in the
5441 // section so far. If DELETE_ENTRY is true, the reference point and
5442 // all offsets after the previous reference point are discarded.
5445 Arm_exidx_fixup::update_offset_map(
5446 section_offset_type input_offset
,
5447 section_size_type deleted_bytes
,
5450 if (this->section_offset_map_
== NULL
)
5451 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5452 section_offset_type output_offset
;
5454 output_offset
= Arm_exidx_input_section::invalid_offset
;
5456 output_offset
= input_offset
- deleted_bytes
;
5457 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5460 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5461 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5462 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5463 // If some entries are merged, also store a pointer to a newly created
5464 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5465 // owns the map and is responsible for releasing it after use.
5467 template<bool big_endian
>
5469 Arm_exidx_fixup::process_exidx_section(
5470 const Arm_exidx_input_section
* exidx_input_section
,
5471 const unsigned char* section_contents
,
5472 section_size_type section_size
,
5473 Arm_exidx_section_offset_map
** psection_offset_map
)
5475 Relobj
* relobj
= exidx_input_section
->relobj();
5476 unsigned shndx
= exidx_input_section
->shndx();
5478 if ((section_size
% 8) != 0)
5480 // Something is wrong with this section. Better not touch it.
5481 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5482 relobj
->name().c_str(), shndx
);
5483 this->last_input_section_
= exidx_input_section
;
5484 this->last_unwind_type_
= UT_NONE
;
5488 uint32_t deleted_bytes
= 0;
5489 bool prev_delete_entry
= false;
5490 gold_assert(this->section_offset_map_
== NULL
);
5492 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5494 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5496 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5497 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5499 bool delete_entry
= this->process_exidx_entry(second_word
);
5501 // Entry deletion causes changes in output offsets. We use a std::map
5502 // to record these. And entry (x, y) means input offset x
5503 // is mapped to output offset y. If y is invalid_offset, then x is
5504 // dropped in the output. Because of the way std::map::lower_bound
5505 // works, we record the last offset in a region w.r.t to keeping or
5506 // dropping. If there is no entry (x0, y0) for an input offset x0,
5507 // the output offset y0 of it is determined by the output offset y1 of
5508 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5509 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5511 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5512 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5514 // Update total deleted bytes for this entry.
5518 prev_delete_entry
= delete_entry
;
5521 // If section offset map is not NULL, make an entry for the end of
5523 if (this->section_offset_map_
!= NULL
)
5524 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5526 *psection_offset_map
= this->section_offset_map_
;
5527 this->section_offset_map_
= NULL
;
5528 this->last_input_section_
= exidx_input_section
;
5530 // Set the first output text section so that we can link the EXIDX output
5531 // section to it. Ignore any EXIDX input section that is completely merged.
5532 if (this->first_output_text_section_
== NULL
5533 && deleted_bytes
!= section_size
)
5535 unsigned int link
= exidx_input_section
->link();
5536 Output_section
* os
= relobj
->output_section(link
);
5537 gold_assert(os
!= NULL
);
5538 this->first_output_text_section_
= os
;
5541 return deleted_bytes
;
5544 // Arm_output_section methods.
5546 // Create a stub group for input sections from BEGIN to END. OWNER
5547 // points to the input section to be the owner a new stub table.
5549 template<bool big_endian
>
5551 Arm_output_section
<big_endian
>::create_stub_group(
5552 Input_section_list::const_iterator begin
,
5553 Input_section_list::const_iterator end
,
5554 Input_section_list::const_iterator owner
,
5555 Target_arm
<big_endian
>* target
,
5556 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5559 // We use a different kind of relaxed section in an EXIDX section.
5560 // The static casting from Output_relaxed_input_section to
5561 // Arm_input_section is invalid in an EXIDX section. We are okay
5562 // because we should not be calling this for an EXIDX section.
5563 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5565 // Currently we convert ordinary input sections into relaxed sections only
5566 // at this point but we may want to support creating relaxed input section
5567 // very early. So we check here to see if owner is already a relaxed
5570 Arm_input_section
<big_endian
>* arm_input_section
;
5571 if (owner
->is_relaxed_input_section())
5574 Arm_input_section
<big_endian
>::as_arm_input_section(
5575 owner
->relaxed_input_section());
5579 gold_assert(owner
->is_input_section());
5580 // Create a new relaxed input section. We need to lock the original
5582 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5584 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5585 new_relaxed_sections
->push_back(arm_input_section
);
5588 // Create a stub table.
5589 Stub_table
<big_endian
>* stub_table
=
5590 target
->new_stub_table(arm_input_section
);
5592 arm_input_section
->set_stub_table(stub_table
);
5594 Input_section_list::const_iterator p
= begin
;
5595 Input_section_list::const_iterator prev_p
;
5597 // Look for input sections or relaxed input sections in [begin ... end].
5600 if (p
->is_input_section() || p
->is_relaxed_input_section())
5602 // The stub table information for input sections live
5603 // in their objects.
5604 Arm_relobj
<big_endian
>* arm_relobj
=
5605 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5606 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5610 while (prev_p
!= end
);
5613 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5614 // of stub groups. We grow a stub group by adding input section until the
5615 // size is just below GROUP_SIZE. The last input section will be converted
5616 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5617 // input section after the stub table, effectively double the group size.
5619 // This is similar to the group_sections() function in elf32-arm.c but is
5620 // implemented differently.
5622 template<bool big_endian
>
5624 Arm_output_section
<big_endian
>::group_sections(
5625 section_size_type group_size
,
5626 bool stubs_always_after_branch
,
5627 Target_arm
<big_endian
>* target
,
5630 // We only care about sections containing code.
5631 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5634 // States for grouping.
5637 // No group is being built.
5639 // A group is being built but the stub table is not found yet.
5640 // We keep group a stub group until the size is just under GROUP_SIZE.
5641 // The last input section in the group will be used as the stub table.
5642 FINDING_STUB_SECTION
,
5643 // A group is being built and we have already found a stub table.
5644 // We enter this state to grow a stub group by adding input section
5645 // after the stub table. This effectively doubles the group size.
5649 // Any newly created relaxed sections are stored here.
5650 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5652 State state
= NO_GROUP
;
5653 section_size_type off
= 0;
5654 section_size_type group_begin_offset
= 0;
5655 section_size_type group_end_offset
= 0;
5656 section_size_type stub_table_end_offset
= 0;
5657 Input_section_list::const_iterator group_begin
=
5658 this->input_sections().end();
5659 Input_section_list::const_iterator stub_table
=
5660 this->input_sections().end();
5661 Input_section_list::const_iterator group_end
= this->input_sections().end();
5662 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5663 p
!= this->input_sections().end();
5666 section_size_type section_begin_offset
=
5667 align_address(off
, p
->addralign());
5668 section_size_type section_end_offset
=
5669 section_begin_offset
+ p
->data_size();
5671 // Check to see if we should group the previously seen sections.
5677 case FINDING_STUB_SECTION
:
5678 // Adding this section makes the group larger than GROUP_SIZE.
5679 if (section_end_offset
- group_begin_offset
>= group_size
)
5681 if (stubs_always_after_branch
)
5683 gold_assert(group_end
!= this->input_sections().end());
5684 this->create_stub_group(group_begin
, group_end
, group_end
,
5685 target
, &new_relaxed_sections
,
5691 // But wait, there's more! Input sections up to
5692 // stub_group_size bytes after the stub table can be
5693 // handled by it too.
5694 state
= HAS_STUB_SECTION
;
5695 stub_table
= group_end
;
5696 stub_table_end_offset
= group_end_offset
;
5701 case HAS_STUB_SECTION
:
5702 // Adding this section makes the post stub-section group larger
5704 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5706 gold_assert(group_end
!= this->input_sections().end());
5707 this->create_stub_group(group_begin
, group_end
, stub_table
,
5708 target
, &new_relaxed_sections
, task
);
5717 // If we see an input section and currently there is no group, start
5718 // a new one. Skip any empty sections. We look at the data size
5719 // instead of calling p->relobj()->section_size() to avoid locking.
5720 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5721 && (p
->data_size() != 0))
5723 if (state
== NO_GROUP
)
5725 state
= FINDING_STUB_SECTION
;
5727 group_begin_offset
= section_begin_offset
;
5730 // Keep track of the last input section seen.
5732 group_end_offset
= section_end_offset
;
5735 off
= section_end_offset
;
5738 // Create a stub group for any ungrouped sections.
5739 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5741 gold_assert(group_end
!= this->input_sections().end());
5742 this->create_stub_group(group_begin
, group_end
,
5743 (state
== FINDING_STUB_SECTION
5746 target
, &new_relaxed_sections
, task
);
5749 // Convert input section into relaxed input section in a batch.
5750 if (!new_relaxed_sections
.empty())
5751 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5753 // Update the section offsets
5754 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5756 Arm_relobj
<big_endian
>* arm_relobj
=
5757 Arm_relobj
<big_endian
>::as_arm_relobj(
5758 new_relaxed_sections
[i
]->relobj());
5759 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5760 // Tell Arm_relobj that this input section is converted.
5761 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5765 // Append non empty text sections in this to LIST in ascending
5766 // order of their position in this.
5768 template<bool big_endian
>
5770 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5771 Text_section_list
* list
)
5773 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5775 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5776 p
!= this->input_sections().end();
5779 // We only care about plain or relaxed input sections. We also
5780 // ignore any merged sections.
5781 if (p
->is_input_section() || p
->is_relaxed_input_section())
5782 list
->push_back(Text_section_list::value_type(p
->relobj(),
5787 template<bool big_endian
>
5789 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5791 const Text_section_list
& sorted_text_sections
,
5792 Symbol_table
* symtab
,
5793 bool merge_exidx_entries
,
5796 // We should only do this for the EXIDX output section.
5797 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5799 // We don't want the relaxation loop to undo these changes, so we discard
5800 // the current saved states and take another one after the fix-up.
5801 this->discard_states();
5803 // Remove all input sections.
5804 uint64_t address
= this->address();
5805 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5806 Input_section_list input_sections
;
5807 this->reset_address_and_file_offset();
5808 this->get_input_sections(address
, std::string(""), &input_sections
);
5810 if (!this->input_sections().empty())
5811 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5813 // Go through all the known input sections and record them.
5814 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5815 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5816 Section_id_hash
> Text_to_exidx_map
;
5817 Text_to_exidx_map text_to_exidx_map
;
5818 for (Input_section_list::const_iterator p
= input_sections
.begin();
5819 p
!= input_sections
.end();
5822 // This should never happen. At this point, we should only see
5823 // plain EXIDX input sections.
5824 gold_assert(!p
->is_relaxed_input_section());
5825 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
5828 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
5830 // Go over the sorted text sections.
5831 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5832 Section_id_set processed_input_sections
;
5833 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5834 p
!= sorted_text_sections
.end();
5837 Relobj
* relobj
= p
->first
;
5838 unsigned int shndx
= p
->second
;
5840 Arm_relobj
<big_endian
>* arm_relobj
=
5841 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5842 const Arm_exidx_input_section
* exidx_input_section
=
5843 arm_relobj
->exidx_input_section_by_link(shndx
);
5845 // If this text section has no EXIDX section or if the EXIDX section
5846 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5847 // of the last seen EXIDX section.
5848 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
5850 exidx_fixup
.add_exidx_cantunwind_as_needed();
5854 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5855 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5856 Section_id
sid(exidx_relobj
, exidx_shndx
);
5857 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
5858 if (iter
== text_to_exidx_map
.end())
5860 // This is odd. We have not seen this EXIDX input section before.
5861 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5862 // issue a warning instead. We assume the user knows what he
5863 // or she is doing. Otherwise, this is an error.
5864 if (layout
->script_options()->saw_sections_clause())
5865 gold_warning(_("unwinding may not work because EXIDX input section"
5866 " %u of %s is not in EXIDX output section"),
5867 exidx_shndx
, exidx_relobj
->name().c_str());
5869 gold_error(_("unwinding may not work because EXIDX input section"
5870 " %u of %s is not in EXIDX output section"),
5871 exidx_shndx
, exidx_relobj
->name().c_str());
5873 exidx_fixup
.add_exidx_cantunwind_as_needed();
5877 // We need to access the contents of the EXIDX section, lock the
5879 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
5880 section_size_type exidx_size
;
5881 const unsigned char* exidx_contents
=
5882 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
5884 // Fix up coverage and append input section to output data list.
5885 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
5886 uint32_t deleted_bytes
=
5887 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
5890 §ion_offset_map
);
5892 if (deleted_bytes
== exidx_input_section
->size())
5894 // The whole EXIDX section got merged. Remove it from output.
5895 gold_assert(section_offset_map
== NULL
);
5896 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
5898 // All local symbols defined in this input section will be dropped.
5899 // We need to adjust output local symbol count.
5900 arm_relobj
->set_output_local_symbol_count_needs_update();
5902 else if (deleted_bytes
> 0)
5904 // Some entries are merged. We need to convert this EXIDX input
5905 // section into a relaxed section.
5906 gold_assert(section_offset_map
!= NULL
);
5908 Arm_exidx_merged_section
* merged_section
=
5909 new Arm_exidx_merged_section(*exidx_input_section
,
5910 *section_offset_map
, deleted_bytes
);
5911 merged_section
->build_contents(exidx_contents
, exidx_size
);
5913 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
5914 this->add_relaxed_input_section(layout
, merged_section
, secname
);
5915 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
5917 // All local symbols defined in discarded portions of this input
5918 // section will be dropped. We need to adjust output local symbol
5920 arm_relobj
->set_output_local_symbol_count_needs_update();
5924 // Just add back the EXIDX input section.
5925 gold_assert(section_offset_map
== NULL
);
5926 const Output_section::Input_section
* pis
= iter
->second
;
5927 gold_assert(pis
->is_input_section());
5928 this->add_script_input_section(*pis
);
5931 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
5934 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5935 exidx_fixup
.add_exidx_cantunwind_as_needed();
5937 // Remove any known EXIDX input sections that are not processed.
5938 for (Input_section_list::const_iterator p
= input_sections
.begin();
5939 p
!= input_sections
.end();
5942 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
5943 == processed_input_sections
.end())
5945 // We discard a known EXIDX section because its linked
5946 // text section has been folded by ICF. We also discard an
5947 // EXIDX section with error, the output does not matter in this
5948 // case. We do this to avoid triggering asserts.
5949 Arm_relobj
<big_endian
>* arm_relobj
=
5950 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5951 const Arm_exidx_input_section
* exidx_input_section
=
5952 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
5953 gold_assert(exidx_input_section
!= NULL
);
5954 if (!exidx_input_section
->has_errors())
5956 unsigned int text_shndx
= exidx_input_section
->link();
5957 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
5960 // Remove this from link. We also need to recount the
5962 p
->relobj()->set_output_section(p
->shndx(), NULL
);
5963 arm_relobj
->set_output_local_symbol_count_needs_update();
5967 // Link exidx output section to the first seen output section and
5968 // set correct entry size.
5969 this->set_link_section(exidx_fixup
.first_output_text_section());
5970 this->set_entsize(8);
5972 // Make changes permanent.
5973 this->save_states();
5974 this->set_section_offsets_need_adjustment();
5977 // Link EXIDX output sections to text output sections.
5979 template<bool big_endian
>
5981 Arm_output_section
<big_endian
>::set_exidx_section_link()
5983 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5984 if (!this->input_sections().empty())
5986 Input_section_list::const_iterator p
= this->input_sections().begin();
5987 Arm_relobj
<big_endian
>* arm_relobj
=
5988 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5989 unsigned exidx_shndx
= p
->shndx();
5990 const Arm_exidx_input_section
* exidx_input_section
=
5991 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
5992 gold_assert(exidx_input_section
!= NULL
);
5993 unsigned int text_shndx
= exidx_input_section
->link();
5994 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
5995 this->set_link_section(os
);
5999 // Arm_relobj methods.
6001 // Determine if an input section is scannable for stub processing. SHDR is
6002 // the header of the section and SHNDX is the section index. OS is the output
6003 // section for the input section and SYMTAB is the global symbol table used to
6004 // look up ICF information.
6006 template<bool big_endian
>
6008 Arm_relobj
<big_endian
>::section_is_scannable(
6009 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6011 const Output_section
* os
,
6012 const Symbol_table
* symtab
)
6014 // Skip any empty sections, unallocated sections or sections whose
6015 // type are not SHT_PROGBITS.
6016 if (shdr
.get_sh_size() == 0
6017 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6018 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6021 // Skip any discarded or ICF'ed sections.
6022 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6025 // If this requires special offset handling, check to see if it is
6026 // a relaxed section. If this is not, then it is a merged section that
6027 // we cannot handle.
6028 if (this->is_output_section_offset_invalid(shndx
))
6030 const Output_relaxed_input_section
* poris
=
6031 os
->find_relaxed_input_section(this, shndx
);
6039 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6040 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6042 template<bool big_endian
>
6044 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6045 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6046 const Relobj::Output_sections
& out_sections
,
6047 const Symbol_table
* symtab
,
6048 const unsigned char* pshdrs
)
6050 unsigned int sh_type
= shdr
.get_sh_type();
6051 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6054 // Ignore empty section.
6055 off_t sh_size
= shdr
.get_sh_size();
6059 // Ignore reloc section with unexpected symbol table. The
6060 // error will be reported in the final link.
6061 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6064 unsigned int reloc_size
;
6065 if (sh_type
== elfcpp::SHT_REL
)
6066 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6068 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6070 // Ignore reloc section with unexpected entsize or uneven size.
6071 // The error will be reported in the final link.
6072 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6075 // Ignore reloc section with bad info. This error will be
6076 // reported in the final link.
6077 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6078 if (index
>= this->shnum())
6081 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6082 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6083 return this->section_is_scannable(text_shdr
, index
,
6084 out_sections
[index
], symtab
);
6087 // Return the output address of either a plain input section or a relaxed
6088 // input section. SHNDX is the section index. We define and use this
6089 // instead of calling Output_section::output_address because that is slow
6090 // for large output.
6092 template<bool big_endian
>
6094 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6098 if (this->is_output_section_offset_invalid(shndx
))
6100 const Output_relaxed_input_section
* poris
=
6101 os
->find_relaxed_input_section(this, shndx
);
6102 // We do not handle merged sections here.
6103 gold_assert(poris
!= NULL
);
6104 return poris
->address();
6107 return os
->address() + this->get_output_section_offset(shndx
);
6110 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6111 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6113 template<bool big_endian
>
6115 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6116 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6119 const Symbol_table
* symtab
)
6121 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6124 // If the section does not cross any 4K-boundaries, it does not need to
6126 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6127 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6133 // Scan a section for Cortex-A8 workaround.
6135 template<bool big_endian
>
6137 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6138 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6141 Target_arm
<big_endian
>* arm_target
)
6143 // Look for the first mapping symbol in this section. It should be
6145 Mapping_symbol_position
section_start(shndx
, 0);
6146 typename
Mapping_symbols_info::const_iterator p
=
6147 this->mapping_symbols_info_
.lower_bound(section_start
);
6149 // There are no mapping symbols for this section. Treat it as a data-only
6150 // section. Issue a warning if section is marked as containing
6152 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6154 if ((this->section_flags(shndx
) & elfcpp::SHF_EXECINSTR
) != 0)
6155 gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6156 "erratum because it has no mapping symbols."),
6157 shndx
, this->name().c_str());
6161 Arm_address output_address
=
6162 this->simple_input_section_output_address(shndx
, os
);
6164 // Get the section contents.
6165 section_size_type input_view_size
= 0;
6166 const unsigned char* input_view
=
6167 this->section_contents(shndx
, &input_view_size
, false);
6169 // We need to go through the mapping symbols to determine what to
6170 // scan. There are two reasons. First, we should look at THUMB code and
6171 // THUMB code only. Second, we only want to look at the 4K-page boundary
6172 // to speed up the scanning.
6174 while (p
!= this->mapping_symbols_info_
.end()
6175 && p
->first
.first
== shndx
)
6177 typename
Mapping_symbols_info::const_iterator next
=
6178 this->mapping_symbols_info_
.upper_bound(p
->first
);
6180 // Only scan part of a section with THUMB code.
6181 if (p
->second
== 't')
6183 // Determine the end of this range.
6184 section_size_type span_start
=
6185 convert_to_section_size_type(p
->first
.second
);
6186 section_size_type span_end
;
6187 if (next
!= this->mapping_symbols_info_
.end()
6188 && next
->first
.first
== shndx
)
6189 span_end
= convert_to_section_size_type(next
->first
.second
);
6191 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6193 if (((span_start
+ output_address
) & ~0xfffUL
)
6194 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6196 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6197 span_start
, span_end
,
6207 // Scan relocations for stub generation.
6209 template<bool big_endian
>
6211 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6212 Target_arm
<big_endian
>* arm_target
,
6213 const Symbol_table
* symtab
,
6214 const Layout
* layout
)
6216 unsigned int shnum
= this->shnum();
6217 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6219 // Read the section headers.
6220 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6224 // To speed up processing, we set up hash tables for fast lookup of
6225 // input offsets to output addresses.
6226 this->initialize_input_to_output_maps();
6228 const Relobj::Output_sections
& out_sections(this->output_sections());
6230 Relocate_info
<32, big_endian
> relinfo
;
6231 relinfo
.symtab
= symtab
;
6232 relinfo
.layout
= layout
;
6233 relinfo
.object
= this;
6235 // Do relocation stubs scanning.
6236 const unsigned char* p
= pshdrs
+ shdr_size
;
6237 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6239 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6240 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6243 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6244 Arm_address output_offset
= this->get_output_section_offset(index
);
6245 Arm_address output_address
;
6246 if (output_offset
!= invalid_address
)
6247 output_address
= out_sections
[index
]->address() + output_offset
;
6250 // Currently this only happens for a relaxed section.
6251 const Output_relaxed_input_section
* poris
=
6252 out_sections
[index
]->find_relaxed_input_section(this, index
);
6253 gold_assert(poris
!= NULL
);
6254 output_address
= poris
->address();
6257 // Get the relocations.
6258 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6262 // Get the section contents. This does work for the case in which
6263 // we modify the contents of an input section. We need to pass the
6264 // output view under such circumstances.
6265 section_size_type input_view_size
= 0;
6266 const unsigned char* input_view
=
6267 this->section_contents(index
, &input_view_size
, false);
6269 relinfo
.reloc_shndx
= i
;
6270 relinfo
.data_shndx
= index
;
6271 unsigned int sh_type
= shdr
.get_sh_type();
6272 unsigned int reloc_size
;
6273 if (sh_type
== elfcpp::SHT_REL
)
6274 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6276 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6278 Output_section
* os
= out_sections
[index
];
6279 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6280 shdr
.get_sh_size() / reloc_size
,
6282 output_offset
== invalid_address
,
6283 input_view
, output_address
,
6288 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6289 // after its relocation section, if there is one, is processed for
6290 // relocation stubs. Merging this loop with the one above would have been
6291 // complicated since we would have had to make sure that relocation stub
6292 // scanning is done first.
6293 if (arm_target
->fix_cortex_a8())
6295 const unsigned char* p
= pshdrs
+ shdr_size
;
6296 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6298 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6299 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6302 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6307 // After we've done the relocations, we release the hash tables,
6308 // since we no longer need them.
6309 this->free_input_to_output_maps();
6312 // Count the local symbols. The ARM backend needs to know if a symbol
6313 // is a THUMB function or not. For global symbols, it is easy because
6314 // the Symbol object keeps the ELF symbol type. For local symbol it is
6315 // harder because we cannot access this information. So we override the
6316 // do_count_local_symbol in parent and scan local symbols to mark
6317 // THUMB functions. This is not the most efficient way but I do not want to
6318 // slow down other ports by calling a per symbol target hook inside
6319 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6321 template<bool big_endian
>
6323 Arm_relobj
<big_endian
>::do_count_local_symbols(
6324 Stringpool_template
<char>* pool
,
6325 Stringpool_template
<char>* dynpool
)
6327 // We need to fix-up the values of any local symbols whose type are
6330 // Ask parent to count the local symbols.
6331 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6332 const unsigned int loccount
= this->local_symbol_count();
6336 // Initialize the thumb function bit-vector.
6337 std::vector
<bool> empty_vector(loccount
, false);
6338 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6340 // Read the symbol table section header.
6341 const unsigned int symtab_shndx
= this->symtab_shndx();
6342 elfcpp::Shdr
<32, big_endian
>
6343 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6344 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6346 // Read the local symbols.
6347 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6348 gold_assert(loccount
== symtabshdr
.get_sh_info());
6349 off_t locsize
= loccount
* sym_size
;
6350 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6351 locsize
, true, true);
6353 // For mapping symbol processing, we need to read the symbol names.
6354 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6355 if (strtab_shndx
>= this->shnum())
6357 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6361 elfcpp::Shdr
<32, big_endian
>
6362 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6363 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6365 this->error(_("symbol table name section has wrong type: %u"),
6366 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6369 const char* pnames
=
6370 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6371 strtabshdr
.get_sh_size(),
6374 // Loop over the local symbols and mark any local symbols pointing
6375 // to THUMB functions.
6377 // Skip the first dummy symbol.
6379 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6380 this->local_values();
6381 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6383 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6384 elfcpp::STT st_type
= sym
.get_st_type();
6385 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6386 Arm_address input_value
= lv
.input_value();
6388 // Check to see if this is a mapping symbol.
6389 const char* sym_name
= pnames
+ sym
.get_st_name();
6390 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6393 unsigned int input_shndx
=
6394 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6395 gold_assert(is_ordinary
);
6397 // Strip of LSB in case this is a THUMB symbol.
6398 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6399 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6402 if (st_type
== elfcpp::STT_ARM_TFUNC
6403 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6405 // This is a THUMB function. Mark this and canonicalize the
6406 // symbol value by setting LSB.
6407 this->local_symbol_is_thumb_function_
[i
] = true;
6408 if ((input_value
& 1) == 0)
6409 lv
.set_input_value(input_value
| 1);
6414 // Relocate sections.
6415 template<bool big_endian
>
6417 Arm_relobj
<big_endian
>::do_relocate_sections(
6418 const Symbol_table
* symtab
,
6419 const Layout
* layout
,
6420 const unsigned char* pshdrs
,
6422 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6424 // Call parent to relocate sections.
6425 Sized_relobj_file
<32, big_endian
>::do_relocate_sections(symtab
, layout
,
6426 pshdrs
, of
, pviews
);
6428 // We do not generate stubs if doing a relocatable link.
6429 if (parameters
->options().relocatable())
6432 // Relocate stub tables.
6433 unsigned int shnum
= this->shnum();
6435 Target_arm
<big_endian
>* arm_target
=
6436 Target_arm
<big_endian
>::default_target();
6438 Relocate_info
<32, big_endian
> relinfo
;
6439 relinfo
.symtab
= symtab
;
6440 relinfo
.layout
= layout
;
6441 relinfo
.object
= this;
6443 for (unsigned int i
= 1; i
< shnum
; ++i
)
6445 Arm_input_section
<big_endian
>* arm_input_section
=
6446 arm_target
->find_arm_input_section(this, i
);
6448 if (arm_input_section
!= NULL
6449 && arm_input_section
->is_stub_table_owner()
6450 && !arm_input_section
->stub_table()->empty())
6452 // We cannot discard a section if it owns a stub table.
6453 Output_section
* os
= this->output_section(i
);
6454 gold_assert(os
!= NULL
);
6456 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6457 relinfo
.reloc_shdr
= NULL
;
6458 relinfo
.data_shndx
= i
;
6459 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6461 gold_assert((*pviews
)[i
].view
!= NULL
);
6463 // We are passed the output section view. Adjust it to cover the
6465 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6466 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6467 && ((stub_table
->address() + stub_table
->data_size())
6468 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6470 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6471 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6472 Arm_address address
= stub_table
->address();
6473 section_size_type view_size
= stub_table
->data_size();
6475 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6479 // Apply Cortex A8 workaround if applicable.
6480 if (this->section_has_cortex_a8_workaround(i
))
6482 unsigned char* view
= (*pviews
)[i
].view
;
6483 Arm_address view_address
= (*pviews
)[i
].address
;
6484 section_size_type view_size
= (*pviews
)[i
].view_size
;
6485 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6487 // Adjust view to cover section.
6488 Output_section
* os
= this->output_section(i
);
6489 gold_assert(os
!= NULL
);
6490 Arm_address section_address
=
6491 this->simple_input_section_output_address(i
, os
);
6492 uint64_t section_size
= this->section_size(i
);
6494 gold_assert(section_address
>= view_address
6495 && ((section_address
+ section_size
)
6496 <= (view_address
+ view_size
)));
6498 unsigned char* section_view
= view
+ (section_address
- view_address
);
6500 // Apply the Cortex-A8 workaround to the output address range
6501 // corresponding to this input section.
6502 stub_table
->apply_cortex_a8_workaround_to_address_range(
6511 // Find the linked text section of an EXIDX section by looking at the first
6512 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6513 // must be linked to its associated code section via the sh_link field of
6514 // its section header. However, some tools are broken and the link is not
6515 // always set. LD just drops such an EXIDX section silently, causing the
6516 // associated code not unwindabled. Here we try a little bit harder to
6517 // discover the linked code section.
6519 // PSHDR points to the section header of a relocation section of an EXIDX
6520 // section. If we can find a linked text section, return true and
6521 // store the text section index in the location PSHNDX. Otherwise
6524 template<bool big_endian
>
6526 Arm_relobj
<big_endian
>::find_linked_text_section(
6527 const unsigned char* pshdr
,
6528 const unsigned char* psyms
,
6529 unsigned int* pshndx
)
6531 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6533 // If there is no relocation, we cannot find the linked text section.
6535 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6536 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6538 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6539 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6541 // Get the relocations.
6542 const unsigned char* prelocs
=
6543 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6545 // Find the REL31 relocation for the first word of the first EXIDX entry.
6546 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6548 Arm_address r_offset
;
6549 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6550 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6552 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6553 r_info
= reloc
.get_r_info();
6554 r_offset
= reloc
.get_r_offset();
6558 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6559 r_info
= reloc
.get_r_info();
6560 r_offset
= reloc
.get_r_offset();
6563 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6564 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6567 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6569 || r_sym
>= this->local_symbol_count()
6573 // This is the relocation for the first word of the first EXIDX entry.
6574 // We expect to see a local section symbol.
6575 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6576 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6577 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6581 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6582 gold_assert(is_ordinary
);
6592 // Make an EXIDX input section object for an EXIDX section whose index is
6593 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6594 // is the section index of the linked text section.
6596 template<bool big_endian
>
6598 Arm_relobj
<big_endian
>::make_exidx_input_section(
6600 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6601 unsigned int text_shndx
,
6602 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6604 // Create an Arm_exidx_input_section object for this EXIDX section.
6605 Arm_exidx_input_section
* exidx_input_section
=
6606 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6607 shdr
.get_sh_addralign(),
6608 text_shdr
.get_sh_size());
6610 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6611 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6613 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6615 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6616 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6617 this->name().c_str());
6618 exidx_input_section
->set_has_errors();
6620 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6622 unsigned other_exidx_shndx
=
6623 this->exidx_section_map_
[text_shndx
]->shndx();
6624 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6626 this->section_name(shndx
).c_str(), shndx
,
6627 this->section_name(other_exidx_shndx
).c_str(),
6628 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6629 text_shndx
, this->name().c_str());
6630 exidx_input_section
->set_has_errors();
6633 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6635 // Check section flags of text section.
6636 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6638 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6640 this->section_name(shndx
).c_str(), shndx
,
6641 this->section_name(text_shndx
).c_str(), text_shndx
,
6642 this->name().c_str());
6643 exidx_input_section
->set_has_errors();
6645 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6646 // I would like to make this an error but currently ld just ignores
6648 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6650 this->section_name(shndx
).c_str(), shndx
,
6651 this->section_name(text_shndx
).c_str(), text_shndx
,
6652 this->name().c_str());
6655 // Read the symbol information.
6657 template<bool big_endian
>
6659 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6661 // Call parent class to read symbol information.
6662 Sized_relobj_file
<32, big_endian
>::do_read_symbols(sd
);
6664 // If this input file is a binary file, it has no processor
6665 // specific flags and attributes section.
6666 Input_file::Format format
= this->input_file()->format();
6667 if (format
!= Input_file::FORMAT_ELF
)
6669 gold_assert(format
== Input_file::FORMAT_BINARY
);
6670 this->merge_flags_and_attributes_
= false;
6674 // Read processor-specific flags in ELF file header.
6675 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6676 elfcpp::Elf_sizes
<32>::ehdr_size
,
6678 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6679 this->processor_specific_flags_
= ehdr
.get_e_flags();
6681 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6683 std::vector
<unsigned int> deferred_exidx_sections
;
6684 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6685 const unsigned char* pshdrs
= sd
->section_headers
->data();
6686 const unsigned char* ps
= pshdrs
+ shdr_size
;
6687 bool must_merge_flags_and_attributes
= false;
6688 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6690 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6692 // Sometimes an object has no contents except the section name string
6693 // table and an empty symbol table with the undefined symbol. We
6694 // don't want to merge processor-specific flags from such an object.
6695 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6697 // Symbol table is not empty.
6698 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6699 elfcpp::Elf_sizes
<32>::sym_size
;
6700 if (shdr
.get_sh_size() > sym_size
)
6701 must_merge_flags_and_attributes
= true;
6703 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6704 // If this is neither an empty symbol table nor a string table,
6706 must_merge_flags_and_attributes
= true;
6708 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6710 gold_assert(this->attributes_section_data_
== NULL
);
6711 section_offset_type section_offset
= shdr
.get_sh_offset();
6712 section_size_type section_size
=
6713 convert_to_section_size_type(shdr
.get_sh_size());
6714 const unsigned char* view
=
6715 this->get_view(section_offset
, section_size
, true, false);
6716 this->attributes_section_data_
=
6717 new Attributes_section_data(view
, section_size
);
6719 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6721 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6722 if (text_shndx
== elfcpp::SHN_UNDEF
)
6723 deferred_exidx_sections
.push_back(i
);
6726 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6727 + text_shndx
* shdr_size
);
6728 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6730 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6731 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6732 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6733 this->section_name(i
).c_str(), this->name().c_str());
6738 if (!must_merge_flags_and_attributes
)
6740 gold_assert(deferred_exidx_sections
.empty());
6741 this->merge_flags_and_attributes_
= false;
6745 // Some tools are broken and they do not set the link of EXIDX sections.
6746 // We look at the first relocation to figure out the linked sections.
6747 if (!deferred_exidx_sections
.empty())
6749 // We need to go over the section headers again to find the mapping
6750 // from sections being relocated to their relocation sections. This is
6751 // a bit inefficient as we could do that in the loop above. However,
6752 // we do not expect any deferred EXIDX sections normally. So we do not
6753 // want to slow down the most common path.
6754 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6755 Reloc_map reloc_map
;
6756 ps
= pshdrs
+ shdr_size
;
6757 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6759 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6760 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
6761 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
6763 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
6764 if (info_shndx
>= this->shnum())
6765 gold_error(_("relocation section %u has invalid info %u"),
6767 Reloc_map::value_type
value(info_shndx
, i
);
6768 std::pair
<Reloc_map::iterator
, bool> result
=
6769 reloc_map
.insert(value
);
6771 gold_error(_("section %u has multiple relocation sections "
6773 info_shndx
, i
, reloc_map
[info_shndx
]);
6777 // Read the symbol table section header.
6778 const unsigned int symtab_shndx
= this->symtab_shndx();
6779 elfcpp::Shdr
<32, big_endian
>
6780 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6781 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6783 // Read the local symbols.
6784 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6785 const unsigned int loccount
= this->local_symbol_count();
6786 gold_assert(loccount
== symtabshdr
.get_sh_info());
6787 off_t locsize
= loccount
* sym_size
;
6788 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6789 locsize
, true, true);
6791 // Process the deferred EXIDX sections.
6792 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
6794 unsigned int shndx
= deferred_exidx_sections
[i
];
6795 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
6796 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
6797 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
6798 if (it
!= reloc_map
.end())
6799 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
6800 psyms
, &text_shndx
);
6801 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6802 + text_shndx
* shdr_size
);
6803 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
6808 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6809 // sections for unwinding. These sections are referenced implicitly by
6810 // text sections linked in the section headers. If we ignore these implicit
6811 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6812 // will be garbage-collected incorrectly. Hence we override the same function
6813 // in the base class to handle these implicit references.
6815 template<bool big_endian
>
6817 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6819 Read_relocs_data
* rd
)
6821 // First, call base class method to process relocations in this object.
6822 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6824 // If --gc-sections is not specified, there is nothing more to do.
6825 // This happens when --icf is used but --gc-sections is not.
6826 if (!parameters
->options().gc_sections())
6829 unsigned int shnum
= this->shnum();
6830 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6831 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6835 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6836 // to these from the linked text sections.
6837 const unsigned char* ps
= pshdrs
+ shdr_size
;
6838 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6840 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6841 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6843 // Found an .ARM.exidx section, add it to the set of reachable
6844 // sections from its linked text section.
6845 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6846 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6851 // Update output local symbol count. Owing to EXIDX entry merging, some local
6852 // symbols will be removed in output. Adjust output local symbol count
6853 // accordingly. We can only changed the static output local symbol count. It
6854 // is too late to change the dynamic symbols.
6856 template<bool big_endian
>
6858 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
6860 // Caller should check that this needs updating. We want caller checking
6861 // because output_local_symbol_count_needs_update() is most likely inlined.
6862 gold_assert(this->output_local_symbol_count_needs_update_
);
6864 gold_assert(this->symtab_shndx() != -1U);
6865 if (this->symtab_shndx() == 0)
6867 // This object has no symbols. Weird but legal.
6871 // Read the symbol table section header.
6872 const unsigned int symtab_shndx
= this->symtab_shndx();
6873 elfcpp::Shdr
<32, big_endian
>
6874 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6875 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6877 // Read the local symbols.
6878 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6879 const unsigned int loccount
= this->local_symbol_count();
6880 gold_assert(loccount
== symtabshdr
.get_sh_info());
6881 off_t locsize
= loccount
* sym_size
;
6882 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6883 locsize
, true, true);
6885 // Loop over the local symbols.
6887 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
6889 const Output_sections
& out_sections(this->output_sections());
6890 unsigned int shnum
= this->shnum();
6891 unsigned int count
= 0;
6892 // Skip the first, dummy, symbol.
6894 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6896 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6898 Symbol_value
<32>& lv((*this->local_values())[i
]);
6900 // This local symbol was already discarded by do_count_local_symbols.
6901 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
6905 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
6910 Output_section
* os
= out_sections
[shndx
];
6912 // This local symbol no longer has an output section. Discard it.
6915 lv
.set_no_output_symtab_entry();
6919 // Currently we only discard parts of EXIDX input sections.
6920 // We explicitly check for a merged EXIDX input section to avoid
6921 // calling Output_section_data::output_offset unless necessary.
6922 if ((this->get_output_section_offset(shndx
) == invalid_address
)
6923 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
6925 section_offset_type output_offset
=
6926 os
->output_offset(this, shndx
, lv
.input_value());
6927 if (output_offset
== -1)
6929 // This symbol is defined in a part of an EXIDX input section
6930 // that is discarded due to entry merging.
6931 lv
.set_no_output_symtab_entry();
6940 this->set_output_local_symbol_count(count
);
6941 this->output_local_symbol_count_needs_update_
= false;
6944 // Arm_dynobj methods.
6946 // Read the symbol information.
6948 template<bool big_endian
>
6950 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6952 // Call parent class to read symbol information.
6953 Sized_dynobj
<32, big_endian
>::do_read_symbols(sd
);
6955 // Read processor-specific flags in ELF file header.
6956 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6957 elfcpp::Elf_sizes
<32>::ehdr_size
,
6959 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6960 this->processor_specific_flags_
= ehdr
.get_e_flags();
6962 // Read the attributes section if there is one.
6963 // We read from the end because gas seems to put it near the end of
6964 // the section headers.
6965 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6966 const unsigned char* ps
=
6967 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
6968 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
6970 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6971 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6973 section_offset_type section_offset
= shdr
.get_sh_offset();
6974 section_size_type section_size
=
6975 convert_to_section_size_type(shdr
.get_sh_size());
6976 const unsigned char* view
=
6977 this->get_view(section_offset
, section_size
, true, false);
6978 this->attributes_section_data_
=
6979 new Attributes_section_data(view
, section_size
);
6985 // Stub_addend_reader methods.
6987 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6989 template<bool big_endian
>
6990 elfcpp::Elf_types
<32>::Elf_Swxword
6991 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
6992 unsigned int r_type
,
6993 const unsigned char* view
,
6994 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
6996 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
7000 case elfcpp::R_ARM_CALL
:
7001 case elfcpp::R_ARM_JUMP24
:
7002 case elfcpp::R_ARM_PLT32
:
7004 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7005 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7006 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
7007 return Bits
<26>::sign_extend32(val
<< 2);
7010 case elfcpp::R_ARM_THM_CALL
:
7011 case elfcpp::R_ARM_THM_JUMP24
:
7012 case elfcpp::R_ARM_THM_XPC22
:
7014 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7015 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7016 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7017 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7018 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7021 case elfcpp::R_ARM_THM_JUMP19
:
7023 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7024 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7025 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7026 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7027 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7035 // Arm_output_data_got methods.
7037 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7038 // The first one is initialized to be 1, which is the module index for
7039 // the main executable and the second one 0. A reloc of the type
7040 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7041 // be applied by gold. GSYM is a global symbol.
7043 template<bool big_endian
>
7045 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7046 unsigned int got_type
,
7049 if (gsym
->has_got_offset(got_type
))
7052 // We are doing a static link. Just mark it as belong to module 1,
7054 unsigned int got_offset
= this->add_constant(1);
7055 gsym
->set_got_offset(got_type
, got_offset
);
7056 got_offset
= this->add_constant(0);
7057 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7058 elfcpp::R_ARM_TLS_DTPOFF32
,
7062 // Same as the above but for a local symbol.
7064 template<bool big_endian
>
7066 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7067 unsigned int got_type
,
7068 Sized_relobj_file
<32, big_endian
>* object
,
7071 if (object
->local_has_got_offset(index
, got_type
))
7074 // We are doing a static link. Just mark it as belong to module 1,
7076 unsigned int got_offset
= this->add_constant(1);
7077 object
->set_local_got_offset(index
, got_type
, got_offset
);
7078 got_offset
= this->add_constant(0);
7079 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7080 elfcpp::R_ARM_TLS_DTPOFF32
,
7084 template<bool big_endian
>
7086 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7088 // Call parent to write out GOT.
7089 Output_data_got
<32, big_endian
>::do_write(of
);
7091 // We are done if there is no fix up.
7092 if (this->static_relocs_
.empty())
7095 gold_assert(parameters
->doing_static_link());
7097 const off_t offset
= this->offset();
7098 const section_size_type oview_size
=
7099 convert_to_section_size_type(this->data_size());
7100 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7102 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7103 gold_assert(tls_segment
!= NULL
);
7105 // The thread pointer $tp points to the TCB, which is followed by the
7106 // TLS. So we need to adjust $tp relative addressing by this amount.
7107 Arm_address aligned_tcb_size
=
7108 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7110 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7112 Static_reloc
& reloc(this->static_relocs_
[i
]);
7115 if (!reloc
.symbol_is_global())
7117 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7118 const Symbol_value
<32>* psymval
=
7119 reloc
.relobj()->local_symbol(reloc
.index());
7121 // We are doing static linking. Issue an error and skip this
7122 // relocation if the symbol is undefined or in a discarded_section.
7124 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7125 if ((shndx
== elfcpp::SHN_UNDEF
)
7127 && shndx
!= elfcpp::SHN_UNDEF
7128 && !object
->is_section_included(shndx
)
7129 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7131 gold_error(_("undefined or discarded local symbol %u from "
7132 " object %s in GOT"),
7133 reloc
.index(), reloc
.relobj()->name().c_str());
7137 value
= psymval
->value(object
, 0);
7141 const Symbol
* gsym
= reloc
.symbol();
7142 gold_assert(gsym
!= NULL
);
7143 if (gsym
->is_forwarder())
7144 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7146 // We are doing static linking. Issue an error and skip this
7147 // relocation if the symbol is undefined or in a discarded_section
7148 // unless it is a weakly_undefined symbol.
7149 if ((gsym
->is_defined_in_discarded_section()
7150 || gsym
->is_undefined())
7151 && !gsym
->is_weak_undefined())
7153 gold_error(_("undefined or discarded symbol %s in GOT"),
7158 if (!gsym
->is_weak_undefined())
7160 const Sized_symbol
<32>* sym
=
7161 static_cast<const Sized_symbol
<32>*>(gsym
);
7162 value
= sym
->value();
7168 unsigned got_offset
= reloc
.got_offset();
7169 gold_assert(got_offset
< oview_size
);
7171 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7172 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7174 switch (reloc
.r_type())
7176 case elfcpp::R_ARM_TLS_DTPOFF32
:
7179 case elfcpp::R_ARM_TLS_TPOFF32
:
7180 x
= value
+ aligned_tcb_size
;
7185 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7188 of
->write_output_view(offset
, oview_size
, oview
);
7191 // A class to handle the PLT data.
7193 template<bool big_endian
>
7194 class Output_data_plt_arm
: public Output_section_data
7197 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7200 Output_data_plt_arm(Layout
*, Output_data_space
*);
7202 // Add an entry to the PLT.
7204 add_entry(Symbol
* gsym
);
7206 // Return the .rel.plt section data.
7207 const Reloc_section
*
7209 { return this->rel_
; }
7211 // Return the number of PLT entries.
7214 { return this->count_
; }
7216 // Return the offset of the first non-reserved PLT entry.
7218 first_plt_entry_offset()
7219 { return sizeof(first_plt_entry
); }
7221 // Return the size of a PLT entry.
7223 get_plt_entry_size()
7224 { return sizeof(plt_entry
); }
7228 do_adjust_output_section(Output_section
* os
);
7230 // Write to a map file.
7232 do_print_to_mapfile(Mapfile
* mapfile
) const
7233 { mapfile
->print_output_data(this, _("** PLT")); }
7236 // Template for the first PLT entry.
7237 static const uint32_t first_plt_entry
[5];
7239 // Template for subsequent PLT entries.
7240 static const uint32_t plt_entry
[3];
7242 // Set the final size.
7244 set_final_data_size()
7246 this->set_data_size(sizeof(first_plt_entry
)
7247 + this->count_
* sizeof(plt_entry
));
7250 // Write out the PLT data.
7252 do_write(Output_file
*);
7254 // The reloc section.
7255 Reloc_section
* rel_
;
7256 // The .got.plt section.
7257 Output_data_space
* got_plt_
;
7258 // The number of PLT entries.
7259 unsigned int count_
;
7262 // Create the PLT section. The ordinary .got section is an argument,
7263 // since we need to refer to the start. We also create our own .got
7264 // section just for PLT entries.
7266 template<bool big_endian
>
7267 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(Layout
* layout
,
7268 Output_data_space
* got_plt
)
7269 : Output_section_data(4), got_plt_(got_plt
), count_(0)
7271 this->rel_
= new Reloc_section(false);
7272 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7273 elfcpp::SHF_ALLOC
, this->rel_
,
7274 ORDER_DYNAMIC_PLT_RELOCS
, false);
7277 template<bool big_endian
>
7279 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7284 // Add an entry to the PLT.
7286 template<bool big_endian
>
7288 Output_data_plt_arm
<big_endian
>::add_entry(Symbol
* gsym
)
7290 gold_assert(!gsym
->has_plt_offset());
7292 // Note that when setting the PLT offset we skip the initial
7293 // reserved PLT entry.
7294 gsym
->set_plt_offset((this->count_
) * sizeof(plt_entry
)
7295 + sizeof(first_plt_entry
));
7299 section_offset_type got_offset
= this->got_plt_
->current_data_size();
7301 // Every PLT entry needs a GOT entry which points back to the PLT
7302 // entry (this will be changed by the dynamic linker, normally
7303 // lazily when the function is called).
7304 this->got_plt_
->set_current_data_size(got_offset
+ 4);
7306 // Every PLT entry needs a reloc.
7307 gsym
->set_needs_dynsym_entry();
7308 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7311 // Note that we don't need to save the symbol. The contents of the
7312 // PLT are independent of which symbols are used. The symbols only
7313 // appear in the relocations.
7317 // FIXME: This is not very flexible. Right now this has only been tested
7318 // on armv5te. If we are to support additional architecture features like
7319 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7321 // The first entry in the PLT.
7322 template<bool big_endian
>
7323 const uint32_t Output_data_plt_arm
<big_endian
>::first_plt_entry
[5] =
7325 0xe52de004, // str lr, [sp, #-4]!
7326 0xe59fe004, // ldr lr, [pc, #4]
7327 0xe08fe00e, // add lr, pc, lr
7328 0xe5bef008, // ldr pc, [lr, #8]!
7329 0x00000000, // &GOT[0] - .
7332 // Subsequent entries in the PLT.
7334 template<bool big_endian
>
7335 const uint32_t Output_data_plt_arm
<big_endian
>::plt_entry
[3] =
7337 0xe28fc600, // add ip, pc, #0xNN00000
7338 0xe28cca00, // add ip, ip, #0xNN000
7339 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7342 // Write out the PLT. This uses the hand-coded instructions above,
7343 // and adjusts them as needed. This is all specified by the arm ELF
7344 // Processor Supplement.
7346 template<bool big_endian
>
7348 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
7350 const off_t offset
= this->offset();
7351 const section_size_type oview_size
=
7352 convert_to_section_size_type(this->data_size());
7353 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7355 const off_t got_file_offset
= this->got_plt_
->offset();
7356 const section_size_type got_size
=
7357 convert_to_section_size_type(this->got_plt_
->data_size());
7358 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
7360 unsigned char* pov
= oview
;
7362 Arm_address plt_address
= this->address();
7363 Arm_address got_address
= this->got_plt_
->address();
7365 // Write first PLT entry. All but the last word are constants.
7366 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7367 / sizeof(plt_entry
[0]));
7368 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7369 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
7370 // Last word in first PLT entry is &GOT[0] - .
7371 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7372 got_address
- (plt_address
+ 16));
7373 pov
+= sizeof(first_plt_entry
);
7375 unsigned char* got_pov
= got_view
;
7377 memset(got_pov
, 0, 12);
7380 const int rel_size
= elfcpp::Elf_sizes
<32>::rel_size
;
7381 unsigned int plt_offset
= sizeof(first_plt_entry
);
7382 unsigned int plt_rel_offset
= 0;
7383 unsigned int got_offset
= 12;
7384 const unsigned int count
= this->count_
;
7385 for (unsigned int i
= 0;
7388 pov
+= sizeof(plt_entry
),
7390 plt_offset
+= sizeof(plt_entry
),
7391 plt_rel_offset
+= rel_size
,
7394 // Set and adjust the PLT entry itself.
7395 int32_t offset
= ((got_address
+ got_offset
)
7396 - (plt_address
+ plt_offset
+ 8));
7398 gold_assert(offset
>= 0 && offset
< 0x0fffffff);
7399 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7400 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7401 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7402 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7403 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7404 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7406 // Set the entry in the GOT.
7407 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, plt_address
);
7410 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
7411 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
7413 of
->write_output_view(offset
, oview_size
, oview
);
7414 of
->write_output_view(got_file_offset
, got_size
, got_view
);
7417 // Create a PLT entry for a global symbol.
7419 template<bool big_endian
>
7421 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
7424 if (gsym
->has_plt_offset())
7427 if (this->plt_
== NULL
)
7429 // Create the GOT sections first.
7430 this->got_section(symtab
, layout
);
7432 this->plt_
= new Output_data_plt_arm
<big_endian
>(layout
, this->got_plt_
);
7433 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
7435 | elfcpp::SHF_EXECINSTR
),
7436 this->plt_
, ORDER_PLT
, false);
7438 this->plt_
->add_entry(gsym
);
7441 // Return the number of entries in the PLT.
7443 template<bool big_endian
>
7445 Target_arm
<big_endian
>::plt_entry_count() const
7447 if (this->plt_
== NULL
)
7449 return this->plt_
->entry_count();
7452 // Return the offset of the first non-reserved PLT entry.
7454 template<bool big_endian
>
7456 Target_arm
<big_endian
>::first_plt_entry_offset() const
7458 return Output_data_plt_arm
<big_endian
>::first_plt_entry_offset();
7461 // Return the size of each PLT entry.
7463 template<bool big_endian
>
7465 Target_arm
<big_endian
>::plt_entry_size() const
7467 return Output_data_plt_arm
<big_endian
>::get_plt_entry_size();
7470 // Get the section to use for TLS_DESC relocations.
7472 template<bool big_endian
>
7473 typename Target_arm
<big_endian
>::Reloc_section
*
7474 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
7476 return this->plt_section()->rel_tls_desc(layout
);
7479 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7481 template<bool big_endian
>
7483 Target_arm
<big_endian
>::define_tls_base_symbol(
7484 Symbol_table
* symtab
,
7487 if (this->tls_base_symbol_defined_
)
7490 Output_segment
* tls_segment
= layout
->tls_segment();
7491 if (tls_segment
!= NULL
)
7493 bool is_exec
= parameters
->options().output_is_executable();
7494 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
7495 Symbol_table::PREDEFINED
,
7499 elfcpp::STV_HIDDEN
, 0,
7501 ? Symbol::SEGMENT_END
7502 : Symbol::SEGMENT_START
),
7505 this->tls_base_symbol_defined_
= true;
7508 // Create a GOT entry for the TLS module index.
7510 template<bool big_endian
>
7512 Target_arm
<big_endian
>::got_mod_index_entry(
7513 Symbol_table
* symtab
,
7515 Sized_relobj_file
<32, big_endian
>* object
)
7517 if (this->got_mod_index_offset_
== -1U)
7519 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
7520 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
7521 unsigned int got_offset
;
7522 if (!parameters
->doing_static_link())
7524 got_offset
= got
->add_constant(0);
7525 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
7526 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
7531 // We are doing a static link. Just mark it as belong to module 1,
7533 got_offset
= got
->add_constant(1);
7536 got
->add_constant(0);
7537 this->got_mod_index_offset_
= got_offset
;
7539 return this->got_mod_index_offset_
;
7542 // Optimize the TLS relocation type based on what we know about the
7543 // symbol. IS_FINAL is true if the final address of this symbol is
7544 // known at link time.
7546 template<bool big_endian
>
7547 tls::Tls_optimization
7548 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
7550 // FIXME: Currently we do not do any TLS optimization.
7551 return tls::TLSOPT_NONE
;
7554 // Get the Reference_flags for a particular relocation.
7556 template<bool big_endian
>
7558 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
7562 case elfcpp::R_ARM_NONE
:
7563 case elfcpp::R_ARM_V4BX
:
7564 case elfcpp::R_ARM_GNU_VTENTRY
:
7565 case elfcpp::R_ARM_GNU_VTINHERIT
:
7566 // No symbol reference.
7569 case elfcpp::R_ARM_ABS32
:
7570 case elfcpp::R_ARM_ABS16
:
7571 case elfcpp::R_ARM_ABS12
:
7572 case elfcpp::R_ARM_THM_ABS5
:
7573 case elfcpp::R_ARM_ABS8
:
7574 case elfcpp::R_ARM_BASE_ABS
:
7575 case elfcpp::R_ARM_MOVW_ABS_NC
:
7576 case elfcpp::R_ARM_MOVT_ABS
:
7577 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7578 case elfcpp::R_ARM_THM_MOVT_ABS
:
7579 case elfcpp::R_ARM_ABS32_NOI
:
7580 return Symbol::ABSOLUTE_REF
;
7582 case elfcpp::R_ARM_REL32
:
7583 case elfcpp::R_ARM_LDR_PC_G0
:
7584 case elfcpp::R_ARM_SBREL32
:
7585 case elfcpp::R_ARM_THM_PC8
:
7586 case elfcpp::R_ARM_BASE_PREL
:
7587 case elfcpp::R_ARM_MOVW_PREL_NC
:
7588 case elfcpp::R_ARM_MOVT_PREL
:
7589 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7590 case elfcpp::R_ARM_THM_MOVT_PREL
:
7591 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7592 case elfcpp::R_ARM_THM_PC12
:
7593 case elfcpp::R_ARM_REL32_NOI
:
7594 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7595 case elfcpp::R_ARM_ALU_PC_G0
:
7596 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7597 case elfcpp::R_ARM_ALU_PC_G1
:
7598 case elfcpp::R_ARM_ALU_PC_G2
:
7599 case elfcpp::R_ARM_LDR_PC_G1
:
7600 case elfcpp::R_ARM_LDR_PC_G2
:
7601 case elfcpp::R_ARM_LDRS_PC_G0
:
7602 case elfcpp::R_ARM_LDRS_PC_G1
:
7603 case elfcpp::R_ARM_LDRS_PC_G2
:
7604 case elfcpp::R_ARM_LDC_PC_G0
:
7605 case elfcpp::R_ARM_LDC_PC_G1
:
7606 case elfcpp::R_ARM_LDC_PC_G2
:
7607 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7608 case elfcpp::R_ARM_ALU_SB_G0
:
7609 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7610 case elfcpp::R_ARM_ALU_SB_G1
:
7611 case elfcpp::R_ARM_ALU_SB_G2
:
7612 case elfcpp::R_ARM_LDR_SB_G0
:
7613 case elfcpp::R_ARM_LDR_SB_G1
:
7614 case elfcpp::R_ARM_LDR_SB_G2
:
7615 case elfcpp::R_ARM_LDRS_SB_G0
:
7616 case elfcpp::R_ARM_LDRS_SB_G1
:
7617 case elfcpp::R_ARM_LDRS_SB_G2
:
7618 case elfcpp::R_ARM_LDC_SB_G0
:
7619 case elfcpp::R_ARM_LDC_SB_G1
:
7620 case elfcpp::R_ARM_LDC_SB_G2
:
7621 case elfcpp::R_ARM_MOVW_BREL_NC
:
7622 case elfcpp::R_ARM_MOVT_BREL
:
7623 case elfcpp::R_ARM_MOVW_BREL
:
7624 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7625 case elfcpp::R_ARM_THM_MOVT_BREL
:
7626 case elfcpp::R_ARM_THM_MOVW_BREL
:
7627 case elfcpp::R_ARM_GOTOFF32
:
7628 case elfcpp::R_ARM_GOTOFF12
:
7629 case elfcpp::R_ARM_SBREL31
:
7630 return Symbol::RELATIVE_REF
;
7632 case elfcpp::R_ARM_PLT32
:
7633 case elfcpp::R_ARM_CALL
:
7634 case elfcpp::R_ARM_JUMP24
:
7635 case elfcpp::R_ARM_THM_CALL
:
7636 case elfcpp::R_ARM_THM_JUMP24
:
7637 case elfcpp::R_ARM_THM_JUMP19
:
7638 case elfcpp::R_ARM_THM_JUMP6
:
7639 case elfcpp::R_ARM_THM_JUMP11
:
7640 case elfcpp::R_ARM_THM_JUMP8
:
7641 // R_ARM_PREL31 is not used to relocate call/jump instructions but
7642 // in unwind tables. It may point to functions via PLTs.
7643 // So we treat it like call/jump relocations above.
7644 case elfcpp::R_ARM_PREL31
:
7645 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
7647 case elfcpp::R_ARM_GOT_BREL
:
7648 case elfcpp::R_ARM_GOT_ABS
:
7649 case elfcpp::R_ARM_GOT_PREL
:
7651 return Symbol::ABSOLUTE_REF
;
7653 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7654 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7655 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7656 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7657 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7658 return Symbol::TLS_REF
;
7660 case elfcpp::R_ARM_TARGET1
:
7661 case elfcpp::R_ARM_TARGET2
:
7662 case elfcpp::R_ARM_COPY
:
7663 case elfcpp::R_ARM_GLOB_DAT
:
7664 case elfcpp::R_ARM_JUMP_SLOT
:
7665 case elfcpp::R_ARM_RELATIVE
:
7666 case elfcpp::R_ARM_PC24
:
7667 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
7668 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
7669 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
7671 // Not expected. We will give an error later.
7676 // Report an unsupported relocation against a local symbol.
7678 template<bool big_endian
>
7680 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
7681 Sized_relobj_file
<32, big_endian
>* object
,
7682 unsigned int r_type
)
7684 gold_error(_("%s: unsupported reloc %u against local symbol"),
7685 object
->name().c_str(), r_type
);
7688 // We are about to emit a dynamic relocation of type R_TYPE. If the
7689 // dynamic linker does not support it, issue an error. The GNU linker
7690 // only issues a non-PIC error for an allocated read-only section.
7691 // Here we know the section is allocated, but we don't know that it is
7692 // read-only. But we check for all the relocation types which the
7693 // glibc dynamic linker supports, so it seems appropriate to issue an
7694 // error even if the section is not read-only.
7696 template<bool big_endian
>
7698 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
7699 unsigned int r_type
)
7703 // These are the relocation types supported by glibc for ARM.
7704 case elfcpp::R_ARM_RELATIVE
:
7705 case elfcpp::R_ARM_COPY
:
7706 case elfcpp::R_ARM_GLOB_DAT
:
7707 case elfcpp::R_ARM_JUMP_SLOT
:
7708 case elfcpp::R_ARM_ABS32
:
7709 case elfcpp::R_ARM_ABS32_NOI
:
7710 case elfcpp::R_ARM_PC24
:
7711 // FIXME: The following 3 types are not supported by Android's dynamic
7713 case elfcpp::R_ARM_TLS_DTPMOD32
:
7714 case elfcpp::R_ARM_TLS_DTPOFF32
:
7715 case elfcpp::R_ARM_TLS_TPOFF32
:
7720 // This prevents us from issuing more than one error per reloc
7721 // section. But we can still wind up issuing more than one
7722 // error per object file.
7723 if (this->issued_non_pic_error_
)
7725 const Arm_reloc_property
* reloc_property
=
7726 arm_reloc_property_table
->get_reloc_property(r_type
);
7727 gold_assert(reloc_property
!= NULL
);
7728 object
->error(_("requires unsupported dynamic reloc %s; "
7729 "recompile with -fPIC"),
7730 reloc_property
->name().c_str());
7731 this->issued_non_pic_error_
= true;
7735 case elfcpp::R_ARM_NONE
:
7740 // Scan a relocation for a local symbol.
7741 // FIXME: This only handles a subset of relocation types used by Android
7742 // on ARM v5te devices.
7744 template<bool big_endian
>
7746 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
7749 Sized_relobj_file
<32, big_endian
>* object
,
7750 unsigned int data_shndx
,
7751 Output_section
* output_section
,
7752 const elfcpp::Rel
<32, big_endian
>& reloc
,
7753 unsigned int r_type
,
7754 const elfcpp::Sym
<32, big_endian
>& lsym
)
7756 r_type
= get_real_reloc_type(r_type
);
7759 case elfcpp::R_ARM_NONE
:
7760 case elfcpp::R_ARM_V4BX
:
7761 case elfcpp::R_ARM_GNU_VTENTRY
:
7762 case elfcpp::R_ARM_GNU_VTINHERIT
:
7765 case elfcpp::R_ARM_ABS32
:
7766 case elfcpp::R_ARM_ABS32_NOI
:
7767 // If building a shared library (or a position-independent
7768 // executable), we need to create a dynamic relocation for
7769 // this location. The relocation applied at link time will
7770 // apply the link-time value, so we flag the location with
7771 // an R_ARM_RELATIVE relocation so the dynamic loader can
7772 // relocate it easily.
7773 if (parameters
->options().output_is_position_independent())
7775 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7776 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7777 // If we are to add more other reloc types than R_ARM_ABS32,
7778 // we need to add check_non_pic(object, r_type) here.
7779 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
7780 output_section
, data_shndx
,
7781 reloc
.get_r_offset());
7785 case elfcpp::R_ARM_ABS16
:
7786 case elfcpp::R_ARM_ABS12
:
7787 case elfcpp::R_ARM_THM_ABS5
:
7788 case elfcpp::R_ARM_ABS8
:
7789 case elfcpp::R_ARM_BASE_ABS
:
7790 case elfcpp::R_ARM_MOVW_ABS_NC
:
7791 case elfcpp::R_ARM_MOVT_ABS
:
7792 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7793 case elfcpp::R_ARM_THM_MOVT_ABS
:
7794 // If building a shared library (or a position-independent
7795 // executable), we need to create a dynamic relocation for
7796 // this location. Because the addend needs to remain in the
7797 // data section, we need to be careful not to apply this
7798 // relocation statically.
7799 if (parameters
->options().output_is_position_independent())
7801 check_non_pic(object
, r_type
);
7802 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7803 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7804 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
7805 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
7806 data_shndx
, reloc
.get_r_offset());
7809 gold_assert(lsym
.get_st_value() == 0);
7810 unsigned int shndx
= lsym
.get_st_shndx();
7812 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
7815 object
->error(_("section symbol %u has bad shndx %u"),
7818 rel_dyn
->add_local_section(object
, shndx
,
7819 r_type
, output_section
,
7820 data_shndx
, reloc
.get_r_offset());
7825 case elfcpp::R_ARM_REL32
:
7826 case elfcpp::R_ARM_LDR_PC_G0
:
7827 case elfcpp::R_ARM_SBREL32
:
7828 case elfcpp::R_ARM_THM_CALL
:
7829 case elfcpp::R_ARM_THM_PC8
:
7830 case elfcpp::R_ARM_BASE_PREL
:
7831 case elfcpp::R_ARM_PLT32
:
7832 case elfcpp::R_ARM_CALL
:
7833 case elfcpp::R_ARM_JUMP24
:
7834 case elfcpp::R_ARM_THM_JUMP24
:
7835 case elfcpp::R_ARM_SBREL31
:
7836 case elfcpp::R_ARM_PREL31
:
7837 case elfcpp::R_ARM_MOVW_PREL_NC
:
7838 case elfcpp::R_ARM_MOVT_PREL
:
7839 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7840 case elfcpp::R_ARM_THM_MOVT_PREL
:
7841 case elfcpp::R_ARM_THM_JUMP19
:
7842 case elfcpp::R_ARM_THM_JUMP6
:
7843 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7844 case elfcpp::R_ARM_THM_PC12
:
7845 case elfcpp::R_ARM_REL32_NOI
:
7846 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7847 case elfcpp::R_ARM_ALU_PC_G0
:
7848 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7849 case elfcpp::R_ARM_ALU_PC_G1
:
7850 case elfcpp::R_ARM_ALU_PC_G2
:
7851 case elfcpp::R_ARM_LDR_PC_G1
:
7852 case elfcpp::R_ARM_LDR_PC_G2
:
7853 case elfcpp::R_ARM_LDRS_PC_G0
:
7854 case elfcpp::R_ARM_LDRS_PC_G1
:
7855 case elfcpp::R_ARM_LDRS_PC_G2
:
7856 case elfcpp::R_ARM_LDC_PC_G0
:
7857 case elfcpp::R_ARM_LDC_PC_G1
:
7858 case elfcpp::R_ARM_LDC_PC_G2
:
7859 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7860 case elfcpp::R_ARM_ALU_SB_G0
:
7861 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7862 case elfcpp::R_ARM_ALU_SB_G1
:
7863 case elfcpp::R_ARM_ALU_SB_G2
:
7864 case elfcpp::R_ARM_LDR_SB_G0
:
7865 case elfcpp::R_ARM_LDR_SB_G1
:
7866 case elfcpp::R_ARM_LDR_SB_G2
:
7867 case elfcpp::R_ARM_LDRS_SB_G0
:
7868 case elfcpp::R_ARM_LDRS_SB_G1
:
7869 case elfcpp::R_ARM_LDRS_SB_G2
:
7870 case elfcpp::R_ARM_LDC_SB_G0
:
7871 case elfcpp::R_ARM_LDC_SB_G1
:
7872 case elfcpp::R_ARM_LDC_SB_G2
:
7873 case elfcpp::R_ARM_MOVW_BREL_NC
:
7874 case elfcpp::R_ARM_MOVT_BREL
:
7875 case elfcpp::R_ARM_MOVW_BREL
:
7876 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7877 case elfcpp::R_ARM_THM_MOVT_BREL
:
7878 case elfcpp::R_ARM_THM_MOVW_BREL
:
7879 case elfcpp::R_ARM_THM_JUMP11
:
7880 case elfcpp::R_ARM_THM_JUMP8
:
7881 // We don't need to do anything for a relative addressing relocation
7882 // against a local symbol if it does not reference the GOT.
7885 case elfcpp::R_ARM_GOTOFF32
:
7886 case elfcpp::R_ARM_GOTOFF12
:
7887 // We need a GOT section:
7888 target
->got_section(symtab
, layout
);
7891 case elfcpp::R_ARM_GOT_BREL
:
7892 case elfcpp::R_ARM_GOT_PREL
:
7894 // The symbol requires a GOT entry.
7895 Arm_output_data_got
<big_endian
>* got
=
7896 target
->got_section(symtab
, layout
);
7897 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7898 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
7900 // If we are generating a shared object, we need to add a
7901 // dynamic RELATIVE relocation for this symbol's GOT entry.
7902 if (parameters
->options().output_is_position_independent())
7904 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7905 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7906 rel_dyn
->add_local_relative(
7907 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
7908 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
7914 case elfcpp::R_ARM_TARGET1
:
7915 case elfcpp::R_ARM_TARGET2
:
7916 // This should have been mapped to another type already.
7918 case elfcpp::R_ARM_COPY
:
7919 case elfcpp::R_ARM_GLOB_DAT
:
7920 case elfcpp::R_ARM_JUMP_SLOT
:
7921 case elfcpp::R_ARM_RELATIVE
:
7922 // These are relocations which should only be seen by the
7923 // dynamic linker, and should never be seen here.
7924 gold_error(_("%s: unexpected reloc %u in object file"),
7925 object
->name().c_str(), r_type
);
7929 // These are initial TLS relocs, which are expected when
7931 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7932 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7933 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7934 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7935 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7937 bool output_is_shared
= parameters
->options().shared();
7938 const tls::Tls_optimization optimized_type
7939 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
7943 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7944 if (optimized_type
== tls::TLSOPT_NONE
)
7946 // Create a pair of GOT entries for the module index and
7947 // dtv-relative offset.
7948 Arm_output_data_got
<big_endian
>* got
7949 = target
->got_section(symtab
, layout
);
7950 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7951 unsigned int shndx
= lsym
.get_st_shndx();
7953 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
7956 object
->error(_("local symbol %u has bad shndx %u"),
7961 if (!parameters
->doing_static_link())
7962 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
7964 target
->rel_dyn_section(layout
),
7965 elfcpp::R_ARM_TLS_DTPMOD32
, 0);
7967 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
7971 // FIXME: TLS optimization not supported yet.
7975 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7976 if (optimized_type
== tls::TLSOPT_NONE
)
7978 // Create a GOT entry for the module index.
7979 target
->got_mod_index_entry(symtab
, layout
, object
);
7982 // FIXME: TLS optimization not supported yet.
7986 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7989 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7990 layout
->set_has_static_tls();
7991 if (optimized_type
== tls::TLSOPT_NONE
)
7993 // Create a GOT entry for the tp-relative offset.
7994 Arm_output_data_got
<big_endian
>* got
7995 = target
->got_section(symtab
, layout
);
7996 unsigned int r_sym
=
7997 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7998 if (!parameters
->doing_static_link())
7999 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
8000 target
->rel_dyn_section(layout
),
8001 elfcpp::R_ARM_TLS_TPOFF32
);
8002 else if (!object
->local_has_got_offset(r_sym
,
8003 GOT_TYPE_TLS_OFFSET
))
8005 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
8006 unsigned int got_offset
=
8007 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
8008 got
->add_static_reloc(got_offset
,
8009 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8014 // FIXME: TLS optimization not supported yet.
8018 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8019 layout
->set_has_static_tls();
8020 if (output_is_shared
)
8022 // We need to create a dynamic relocation.
8023 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8024 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8025 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8026 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8027 output_section
, data_shndx
,
8028 reloc
.get_r_offset());
8038 case elfcpp::R_ARM_PC24
:
8039 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8040 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8041 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8043 unsupported_reloc_local(object
, r_type
);
8048 // Report an unsupported relocation against a global symbol.
8050 template<bool big_endian
>
8052 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8053 Sized_relobj_file
<32, big_endian
>* object
,
8054 unsigned int r_type
,
8057 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8058 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8061 template<bool big_endian
>
8063 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8064 unsigned int r_type
)
8068 case elfcpp::R_ARM_PC24
:
8069 case elfcpp::R_ARM_THM_CALL
:
8070 case elfcpp::R_ARM_PLT32
:
8071 case elfcpp::R_ARM_CALL
:
8072 case elfcpp::R_ARM_JUMP24
:
8073 case elfcpp::R_ARM_THM_JUMP24
:
8074 case elfcpp::R_ARM_SBREL31
:
8075 case elfcpp::R_ARM_PREL31
:
8076 case elfcpp::R_ARM_THM_JUMP19
:
8077 case elfcpp::R_ARM_THM_JUMP6
:
8078 case elfcpp::R_ARM_THM_JUMP11
:
8079 case elfcpp::R_ARM_THM_JUMP8
:
8080 // All the relocations above are branches except SBREL31 and PREL31.
8084 // Be conservative and assume this is a function pointer.
8089 template<bool big_endian
>
8091 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8094 Target_arm
<big_endian
>* target
,
8095 Sized_relobj_file
<32, big_endian
>*,
8098 const elfcpp::Rel
<32, big_endian
>&,
8099 unsigned int r_type
,
8100 const elfcpp::Sym
<32, big_endian
>&)
8102 r_type
= target
->get_real_reloc_type(r_type
);
8103 return possible_function_pointer_reloc(r_type
);
8106 template<bool big_endian
>
8108 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8111 Target_arm
<big_endian
>* target
,
8112 Sized_relobj_file
<32, big_endian
>*,
8115 const elfcpp::Rel
<32, big_endian
>&,
8116 unsigned int r_type
,
8119 // GOT is not a function.
8120 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8123 r_type
= target
->get_real_reloc_type(r_type
);
8124 return possible_function_pointer_reloc(r_type
);
8127 // Scan a relocation for a global symbol.
8129 template<bool big_endian
>
8131 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8134 Sized_relobj_file
<32, big_endian
>* object
,
8135 unsigned int data_shndx
,
8136 Output_section
* output_section
,
8137 const elfcpp::Rel
<32, big_endian
>& reloc
,
8138 unsigned int r_type
,
8141 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8142 // section. We check here to avoid creating a dynamic reloc against
8143 // _GLOBAL_OFFSET_TABLE_.
8144 if (!target
->has_got_section()
8145 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8146 target
->got_section(symtab
, layout
);
8148 r_type
= get_real_reloc_type(r_type
);
8151 case elfcpp::R_ARM_NONE
:
8152 case elfcpp::R_ARM_V4BX
:
8153 case elfcpp::R_ARM_GNU_VTENTRY
:
8154 case elfcpp::R_ARM_GNU_VTINHERIT
:
8157 case elfcpp::R_ARM_ABS32
:
8158 case elfcpp::R_ARM_ABS16
:
8159 case elfcpp::R_ARM_ABS12
:
8160 case elfcpp::R_ARM_THM_ABS5
:
8161 case elfcpp::R_ARM_ABS8
:
8162 case elfcpp::R_ARM_BASE_ABS
:
8163 case elfcpp::R_ARM_MOVW_ABS_NC
:
8164 case elfcpp::R_ARM_MOVT_ABS
:
8165 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8166 case elfcpp::R_ARM_THM_MOVT_ABS
:
8167 case elfcpp::R_ARM_ABS32_NOI
:
8168 // Absolute addressing relocations.
8170 // Make a PLT entry if necessary.
8171 if (this->symbol_needs_plt_entry(gsym
))
8173 target
->make_plt_entry(symtab
, layout
, gsym
);
8174 // Since this is not a PC-relative relocation, we may be
8175 // taking the address of a function. In that case we need to
8176 // set the entry in the dynamic symbol table to the address of
8178 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
8179 gsym
->set_needs_dynsym_value();
8181 // Make a dynamic relocation if necessary.
8182 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8184 if (gsym
->may_need_copy_reloc())
8186 target
->copy_reloc(symtab
, layout
, object
,
8187 data_shndx
, output_section
, gsym
, reloc
);
8189 else if ((r_type
== elfcpp::R_ARM_ABS32
8190 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8191 && gsym
->can_use_relative_reloc(false))
8193 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8194 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
8195 output_section
, object
,
8196 data_shndx
, reloc
.get_r_offset());
8200 check_non_pic(object
, r_type
);
8201 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8202 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8203 data_shndx
, reloc
.get_r_offset());
8209 case elfcpp::R_ARM_GOTOFF32
:
8210 case elfcpp::R_ARM_GOTOFF12
:
8211 // We need a GOT section.
8212 target
->got_section(symtab
, layout
);
8215 case elfcpp::R_ARM_REL32
:
8216 case elfcpp::R_ARM_LDR_PC_G0
:
8217 case elfcpp::R_ARM_SBREL32
:
8218 case elfcpp::R_ARM_THM_PC8
:
8219 case elfcpp::R_ARM_BASE_PREL
:
8220 case elfcpp::R_ARM_MOVW_PREL_NC
:
8221 case elfcpp::R_ARM_MOVT_PREL
:
8222 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8223 case elfcpp::R_ARM_THM_MOVT_PREL
:
8224 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8225 case elfcpp::R_ARM_THM_PC12
:
8226 case elfcpp::R_ARM_REL32_NOI
:
8227 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8228 case elfcpp::R_ARM_ALU_PC_G0
:
8229 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8230 case elfcpp::R_ARM_ALU_PC_G1
:
8231 case elfcpp::R_ARM_ALU_PC_G2
:
8232 case elfcpp::R_ARM_LDR_PC_G1
:
8233 case elfcpp::R_ARM_LDR_PC_G2
:
8234 case elfcpp::R_ARM_LDRS_PC_G0
:
8235 case elfcpp::R_ARM_LDRS_PC_G1
:
8236 case elfcpp::R_ARM_LDRS_PC_G2
:
8237 case elfcpp::R_ARM_LDC_PC_G0
:
8238 case elfcpp::R_ARM_LDC_PC_G1
:
8239 case elfcpp::R_ARM_LDC_PC_G2
:
8240 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8241 case elfcpp::R_ARM_ALU_SB_G0
:
8242 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8243 case elfcpp::R_ARM_ALU_SB_G1
:
8244 case elfcpp::R_ARM_ALU_SB_G2
:
8245 case elfcpp::R_ARM_LDR_SB_G0
:
8246 case elfcpp::R_ARM_LDR_SB_G1
:
8247 case elfcpp::R_ARM_LDR_SB_G2
:
8248 case elfcpp::R_ARM_LDRS_SB_G0
:
8249 case elfcpp::R_ARM_LDRS_SB_G1
:
8250 case elfcpp::R_ARM_LDRS_SB_G2
:
8251 case elfcpp::R_ARM_LDC_SB_G0
:
8252 case elfcpp::R_ARM_LDC_SB_G1
:
8253 case elfcpp::R_ARM_LDC_SB_G2
:
8254 case elfcpp::R_ARM_MOVW_BREL_NC
:
8255 case elfcpp::R_ARM_MOVT_BREL
:
8256 case elfcpp::R_ARM_MOVW_BREL
:
8257 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8258 case elfcpp::R_ARM_THM_MOVT_BREL
:
8259 case elfcpp::R_ARM_THM_MOVW_BREL
:
8260 // Relative addressing relocations.
8262 // Make a dynamic relocation if necessary.
8263 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8265 if (target
->may_need_copy_reloc(gsym
))
8267 target
->copy_reloc(symtab
, layout
, object
,
8268 data_shndx
, output_section
, gsym
, reloc
);
8272 check_non_pic(object
, r_type
);
8273 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8274 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8275 data_shndx
, reloc
.get_r_offset());
8281 case elfcpp::R_ARM_THM_CALL
:
8282 case elfcpp::R_ARM_PLT32
:
8283 case elfcpp::R_ARM_CALL
:
8284 case elfcpp::R_ARM_JUMP24
:
8285 case elfcpp::R_ARM_THM_JUMP24
:
8286 case elfcpp::R_ARM_SBREL31
:
8287 case elfcpp::R_ARM_PREL31
:
8288 case elfcpp::R_ARM_THM_JUMP19
:
8289 case elfcpp::R_ARM_THM_JUMP6
:
8290 case elfcpp::R_ARM_THM_JUMP11
:
8291 case elfcpp::R_ARM_THM_JUMP8
:
8292 // All the relocation above are branches except for the PREL31 ones.
8293 // A PREL31 relocation can point to a personality function in a shared
8294 // library. In that case we want to use a PLT because we want to
8295 // call the personality routine and the dynamic linkers we care about
8296 // do not support dynamic PREL31 relocations. An REL31 relocation may
8297 // point to a function whose unwinding behaviour is being described but
8298 // we will not mistakenly generate a PLT for that because we should use
8299 // a local section symbol.
8301 // If the symbol is fully resolved, this is just a relative
8302 // local reloc. Otherwise we need a PLT entry.
8303 if (gsym
->final_value_is_known())
8305 // If building a shared library, we can also skip the PLT entry
8306 // if the symbol is defined in the output file and is protected
8308 if (gsym
->is_defined()
8309 && !gsym
->is_from_dynobj()
8310 && !gsym
->is_preemptible())
8312 target
->make_plt_entry(symtab
, layout
, gsym
);
8315 case elfcpp::R_ARM_GOT_BREL
:
8316 case elfcpp::R_ARM_GOT_ABS
:
8317 case elfcpp::R_ARM_GOT_PREL
:
8319 // The symbol requires a GOT entry.
8320 Arm_output_data_got
<big_endian
>* got
=
8321 target
->got_section(symtab
, layout
);
8322 if (gsym
->final_value_is_known())
8323 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
8326 // If this symbol is not fully resolved, we need to add a
8327 // GOT entry with a dynamic relocation.
8328 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8329 if (gsym
->is_from_dynobj()
8330 || gsym
->is_undefined()
8331 || gsym
->is_preemptible()
8332 || (gsym
->visibility() == elfcpp::STV_PROTECTED
8333 && parameters
->options().shared()))
8334 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
8335 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
8338 if (got
->add_global(gsym
, GOT_TYPE_STANDARD
))
8339 rel_dyn
->add_global_relative(
8340 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
8341 gsym
->got_offset(GOT_TYPE_STANDARD
));
8347 case elfcpp::R_ARM_TARGET1
:
8348 case elfcpp::R_ARM_TARGET2
:
8349 // These should have been mapped to other types already.
8351 case elfcpp::R_ARM_COPY
:
8352 case elfcpp::R_ARM_GLOB_DAT
:
8353 case elfcpp::R_ARM_JUMP_SLOT
:
8354 case elfcpp::R_ARM_RELATIVE
:
8355 // These are relocations which should only be seen by the
8356 // dynamic linker, and should never be seen here.
8357 gold_error(_("%s: unexpected reloc %u in object file"),
8358 object
->name().c_str(), r_type
);
8361 // These are initial tls relocs, which are expected when
8363 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8364 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8365 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8366 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8367 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8369 const bool is_final
= gsym
->final_value_is_known();
8370 const tls::Tls_optimization optimized_type
8371 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
8374 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8375 if (optimized_type
== tls::TLSOPT_NONE
)
8377 // Create a pair of GOT entries for the module index and
8378 // dtv-relative offset.
8379 Arm_output_data_got
<big_endian
>* got
8380 = target
->got_section(symtab
, layout
);
8381 if (!parameters
->doing_static_link())
8382 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
8383 target
->rel_dyn_section(layout
),
8384 elfcpp::R_ARM_TLS_DTPMOD32
,
8385 elfcpp::R_ARM_TLS_DTPOFF32
);
8387 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
8390 // FIXME: TLS optimization not supported yet.
8394 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8395 if (optimized_type
== tls::TLSOPT_NONE
)
8397 // Create a GOT entry for the module index.
8398 target
->got_mod_index_entry(symtab
, layout
, object
);
8401 // FIXME: TLS optimization not supported yet.
8405 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8408 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8409 layout
->set_has_static_tls();
8410 if (optimized_type
== tls::TLSOPT_NONE
)
8412 // Create a GOT entry for the tp-relative offset.
8413 Arm_output_data_got
<big_endian
>* got
8414 = target
->got_section(symtab
, layout
);
8415 if (!parameters
->doing_static_link())
8416 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
8417 target
->rel_dyn_section(layout
),
8418 elfcpp::R_ARM_TLS_TPOFF32
);
8419 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
8421 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
8422 unsigned int got_offset
=
8423 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
8424 got
->add_static_reloc(got_offset
,
8425 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
8429 // FIXME: TLS optimization not supported yet.
8433 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8434 layout
->set_has_static_tls();
8435 if (parameters
->options().shared())
8437 // We need to create a dynamic relocation.
8438 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8439 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
8440 output_section
, object
,
8441 data_shndx
, reloc
.get_r_offset());
8451 case elfcpp::R_ARM_PC24
:
8452 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8453 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8454 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8456 unsupported_reloc_global(object
, r_type
, gsym
);
8461 // Process relocations for gc.
8463 template<bool big_endian
>
8465 Target_arm
<big_endian
>::gc_process_relocs(
8466 Symbol_table
* symtab
,
8468 Sized_relobj_file
<32, big_endian
>* object
,
8469 unsigned int data_shndx
,
8471 const unsigned char* prelocs
,
8473 Output_section
* output_section
,
8474 bool needs_special_offset_handling
,
8475 size_t local_symbol_count
,
8476 const unsigned char* plocal_symbols
)
8478 typedef Target_arm
<big_endian
> Arm
;
8479 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8481 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
,
8482 typename
Target_arm::Relocatable_size_for_reloc
>(
8491 needs_special_offset_handling
,
8496 // Scan relocations for a section.
8498 template<bool big_endian
>
8500 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
8502 Sized_relobj_file
<32, big_endian
>* object
,
8503 unsigned int data_shndx
,
8504 unsigned int sh_type
,
8505 const unsigned char* prelocs
,
8507 Output_section
* output_section
,
8508 bool needs_special_offset_handling
,
8509 size_t local_symbol_count
,
8510 const unsigned char* plocal_symbols
)
8512 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8513 if (sh_type
== elfcpp::SHT_RELA
)
8515 gold_error(_("%s: unsupported RELA reloc section"),
8516 object
->name().c_str());
8520 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
8529 needs_special_offset_handling
,
8534 // Finalize the sections.
8536 template<bool big_endian
>
8538 Target_arm
<big_endian
>::do_finalize_sections(
8540 const Input_objects
* input_objects
,
8543 bool merged_any_attributes
= false;
8544 // Merge processor-specific flags.
8545 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
8546 p
!= input_objects
->relobj_end();
8549 Arm_relobj
<big_endian
>* arm_relobj
=
8550 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
8551 if (arm_relobj
->merge_flags_and_attributes())
8553 this->merge_processor_specific_flags(
8555 arm_relobj
->processor_specific_flags());
8556 this->merge_object_attributes(arm_relobj
->name().c_str(),
8557 arm_relobj
->attributes_section_data());
8558 merged_any_attributes
= true;
8562 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
8563 p
!= input_objects
->dynobj_end();
8566 Arm_dynobj
<big_endian
>* arm_dynobj
=
8567 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
8568 this->merge_processor_specific_flags(
8570 arm_dynobj
->processor_specific_flags());
8571 this->merge_object_attributes(arm_dynobj
->name().c_str(),
8572 arm_dynobj
->attributes_section_data());
8573 merged_any_attributes
= true;
8576 // Create an empty uninitialized attribute section if we still don't have it
8577 // at this moment. This happens if there is no attributes sections in all
8579 if (this->attributes_section_data_
== NULL
)
8580 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
8582 const Object_attribute
* cpu_arch_attr
=
8583 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
8584 // Check if we need to use Cortex-A8 workaround.
8585 if (parameters
->options().user_set_fix_cortex_a8())
8586 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
8589 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8590 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8592 const Object_attribute
* cpu_arch_profile_attr
=
8593 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
8594 this->fix_cortex_a8_
=
8595 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
8596 && (cpu_arch_profile_attr
->int_value() == 'A'
8597 || cpu_arch_profile_attr
->int_value() == 0));
8600 // Check if we can use V4BX interworking.
8601 // The V4BX interworking stub contains BX instruction,
8602 // which is not specified for some profiles.
8603 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8604 && !this->may_use_v4t_interworking())
8605 gold_error(_("unable to provide V4BX reloc interworking fix up; "
8606 "the target profile does not support BX instruction"));
8608 // Fill in some more dynamic tags.
8609 const Reloc_section
* rel_plt
= (this->plt_
== NULL
8611 : this->plt_
->rel_plt());
8612 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
8613 this->rel_dyn_
, true, false);
8615 // Emit any relocs we saved in an attempt to avoid generating COPY
8617 if (this->copy_relocs_
.any_saved_relocs())
8618 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
8620 // Handle the .ARM.exidx section.
8621 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
8623 if (!parameters
->options().relocatable())
8625 if (exidx_section
!= NULL
8626 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
8628 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
8629 // the .ARM.exidx section.
8630 if (!layout
->script_options()->saw_phdrs_clause())
8632 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
8635 Output_segment
* exidx_segment
=
8636 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
8637 exidx_segment
->add_output_section_to_nonload(exidx_section
,
8643 // Create an .ARM.attributes section if we have merged any attributes
8645 if (merged_any_attributes
)
8647 Output_attributes_section_data
* attributes_section
=
8648 new Output_attributes_section_data(*this->attributes_section_data_
);
8649 layout
->add_output_section_data(".ARM.attributes",
8650 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
8651 attributes_section
, ORDER_INVALID
,
8655 // Fix up links in section EXIDX headers.
8656 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
8657 p
!= layout
->section_list().end();
8659 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
8661 Arm_output_section
<big_endian
>* os
=
8662 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
8663 os
->set_exidx_section_link();
8667 // Return whether a direct absolute static relocation needs to be applied.
8668 // In cases where Scan::local() or Scan::global() has created
8669 // a dynamic relocation other than R_ARM_RELATIVE, the addend
8670 // of the relocation is carried in the data, and we must not
8671 // apply the static relocation.
8673 template<bool big_endian
>
8675 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
8676 const Sized_symbol
<32>* gsym
,
8677 unsigned int r_type
,
8679 Output_section
* output_section
)
8681 // If the output section is not allocated, then we didn't call
8682 // scan_relocs, we didn't create a dynamic reloc, and we must apply
8684 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
8687 int ref_flags
= Scan::get_reference_flags(r_type
);
8689 // For local symbols, we will have created a non-RELATIVE dynamic
8690 // relocation only if (a) the output is position independent,
8691 // (b) the relocation is absolute (not pc- or segment-relative), and
8692 // (c) the relocation is not 32 bits wide.
8694 return !(parameters
->options().output_is_position_independent()
8695 && (ref_flags
& Symbol::ABSOLUTE_REF
)
8698 // For global symbols, we use the same helper routines used in the
8699 // scan pass. If we did not create a dynamic relocation, or if we
8700 // created a RELATIVE dynamic relocation, we should apply the static
8702 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
8703 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
8704 && gsym
->can_use_relative_reloc(ref_flags
8705 & Symbol::FUNCTION_CALL
);
8706 return !has_dyn
|| is_rel
;
8709 // Perform a relocation.
8711 template<bool big_endian
>
8713 Target_arm
<big_endian
>::Relocate::relocate(
8714 const Relocate_info
<32, big_endian
>* relinfo
,
8716 Output_section
* output_section
,
8718 const elfcpp::Rel
<32, big_endian
>& rel
,
8719 unsigned int r_type
,
8720 const Sized_symbol
<32>* gsym
,
8721 const Symbol_value
<32>* psymval
,
8722 unsigned char* view
,
8723 Arm_address address
,
8724 section_size_type view_size
)
8726 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
8728 r_type
= get_real_reloc_type(r_type
);
8729 const Arm_reloc_property
* reloc_property
=
8730 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
8731 if (reloc_property
== NULL
)
8733 std::string reloc_name
=
8734 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
8735 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
8736 _("cannot relocate %s in object file"),
8737 reloc_name
.c_str());
8741 const Arm_relobj
<big_endian
>* object
=
8742 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
8744 // If the final branch target of a relocation is THUMB instruction, this
8745 // is 1. Otherwise it is 0.
8746 Arm_address thumb_bit
= 0;
8747 Symbol_value
<32> symval
;
8748 bool is_weakly_undefined_without_plt
= false;
8749 bool have_got_offset
= false;
8750 unsigned int got_offset
= 0;
8752 // If the relocation uses the GOT entry of a symbol instead of the symbol
8753 // itself, we don't care about whether the symbol is defined or what kind
8755 if (reloc_property
->uses_got_entry())
8757 // Get the GOT offset.
8758 // The GOT pointer points to the end of the GOT section.
8759 // We need to subtract the size of the GOT section to get
8760 // the actual offset to use in the relocation.
8761 // TODO: We should move GOT offset computing code in TLS relocations
8765 case elfcpp::R_ARM_GOT_BREL
:
8766 case elfcpp::R_ARM_GOT_PREL
:
8769 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
8770 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
8771 - target
->got_size());
8775 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8776 gold_assert(object
->local_has_got_offset(r_sym
,
8777 GOT_TYPE_STANDARD
));
8778 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
8779 - target
->got_size());
8781 have_got_offset
= true;
8788 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
8792 // This is a global symbol. Determine if we use PLT and if the
8793 // final target is THUMB.
8794 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
8796 // This uses a PLT, change the symbol value.
8797 symval
.set_output_value(target
->plt_section()->address()
8798 + gsym
->plt_offset());
8801 else if (gsym
->is_weak_undefined())
8803 // This is a weakly undefined symbol and we do not use PLT
8804 // for this relocation. A branch targeting this symbol will
8805 // be converted into an NOP.
8806 is_weakly_undefined_without_plt
= true;
8808 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
8810 // This relocation uses the symbol value but the symbol is
8811 // undefined. Exit early and have the caller reporting an
8817 // Set thumb bit if symbol:
8818 // -Has type STT_ARM_TFUNC or
8819 // -Has type STT_FUNC, is defined and with LSB in value set.
8821 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
8822 || (gsym
->type() == elfcpp::STT_FUNC
8823 && !gsym
->is_undefined()
8824 && ((psymval
->value(object
, 0) & 1) != 0)))
8831 // This is a local symbol. Determine if the final target is THUMB.
8832 // We saved this information when all the local symbols were read.
8833 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
8834 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
8835 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
8840 // This is a fake relocation synthesized for a stub. It does not have
8841 // a real symbol. We just look at the LSB of the symbol value to
8842 // determine if the target is THUMB or not.
8843 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
8846 // Strip LSB if this points to a THUMB target.
8848 && reloc_property
->uses_thumb_bit()
8849 && ((psymval
->value(object
, 0) & 1) != 0))
8851 Arm_address stripped_value
=
8852 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
8853 symval
.set_output_value(stripped_value
);
8857 // To look up relocation stubs, we need to pass the symbol table index of
8859 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8861 // Get the addressing origin of the output segment defining the
8862 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8863 Arm_address sym_origin
= 0;
8864 if (reloc_property
->uses_symbol_base())
8866 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
8867 // R_ARM_BASE_ABS with the NULL symbol will give the
8868 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8869 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8870 sym_origin
= target
->got_plt_section()->address();
8871 else if (gsym
== NULL
)
8873 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
8874 sym_origin
= gsym
->output_segment()->vaddr();
8875 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
8876 sym_origin
= gsym
->output_data()->address();
8878 // TODO: Assumes the segment base to be zero for the global symbols
8879 // till the proper support for the segment-base-relative addressing
8880 // will be implemented. This is consistent with GNU ld.
8883 // For relative addressing relocation, find out the relative address base.
8884 Arm_address relative_address_base
= 0;
8885 switch(reloc_property
->relative_address_base())
8887 case Arm_reloc_property::RAB_NONE
:
8888 // Relocations with relative address bases RAB_TLS and RAB_tp are
8889 // handled by relocate_tls. So we do not need to do anything here.
8890 case Arm_reloc_property::RAB_TLS
:
8891 case Arm_reloc_property::RAB_tp
:
8893 case Arm_reloc_property::RAB_B_S
:
8894 relative_address_base
= sym_origin
;
8896 case Arm_reloc_property::RAB_GOT_ORG
:
8897 relative_address_base
= target
->got_plt_section()->address();
8899 case Arm_reloc_property::RAB_P
:
8900 relative_address_base
= address
;
8902 case Arm_reloc_property::RAB_Pa
:
8903 relative_address_base
= address
& 0xfffffffcU
;
8909 typename
Arm_relocate_functions::Status reloc_status
=
8910 Arm_relocate_functions::STATUS_OKAY
;
8911 bool check_overflow
= reloc_property
->checks_overflow();
8914 case elfcpp::R_ARM_NONE
:
8917 case elfcpp::R_ARM_ABS8
:
8918 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8919 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
8922 case elfcpp::R_ARM_ABS12
:
8923 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8924 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
8927 case elfcpp::R_ARM_ABS16
:
8928 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8929 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
8932 case elfcpp::R_ARM_ABS32
:
8933 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
8934 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
8938 case elfcpp::R_ARM_ABS32_NOI
:
8939 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
8940 // No thumb bit for this relocation: (S + A)
8941 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
8945 case elfcpp::R_ARM_MOVW_ABS_NC
:
8946 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8947 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
8952 case elfcpp::R_ARM_MOVT_ABS
:
8953 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8954 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
8957 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8958 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8959 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
8960 0, thumb_bit
, false);
8963 case elfcpp::R_ARM_THM_MOVT_ABS
:
8964 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8965 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
8969 case elfcpp::R_ARM_MOVW_PREL_NC
:
8970 case elfcpp::R_ARM_MOVW_BREL_NC
:
8971 case elfcpp::R_ARM_MOVW_BREL
:
8973 Arm_relocate_functions::movw(view
, object
, psymval
,
8974 relative_address_base
, thumb_bit
,
8978 case elfcpp::R_ARM_MOVT_PREL
:
8979 case elfcpp::R_ARM_MOVT_BREL
:
8981 Arm_relocate_functions::movt(view
, object
, psymval
,
8982 relative_address_base
);
8985 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8986 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8987 case elfcpp::R_ARM_THM_MOVW_BREL
:
8989 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
8990 relative_address_base
,
8991 thumb_bit
, check_overflow
);
8994 case elfcpp::R_ARM_THM_MOVT_PREL
:
8995 case elfcpp::R_ARM_THM_MOVT_BREL
:
8997 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
8998 relative_address_base
);
9001 case elfcpp::R_ARM_REL32
:
9002 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9003 address
, thumb_bit
);
9006 case elfcpp::R_ARM_THM_ABS5
:
9007 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9008 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9011 // Thumb long branches.
9012 case elfcpp::R_ARM_THM_CALL
:
9013 case elfcpp::R_ARM_THM_XPC22
:
9014 case elfcpp::R_ARM_THM_JUMP24
:
9016 Arm_relocate_functions::thumb_branch_common(
9017 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9018 thumb_bit
, is_weakly_undefined_without_plt
);
9021 case elfcpp::R_ARM_GOTOFF32
:
9023 Arm_address got_origin
;
9024 got_origin
= target
->got_plt_section()->address();
9025 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9026 got_origin
, thumb_bit
);
9030 case elfcpp::R_ARM_BASE_PREL
:
9031 gold_assert(gsym
!= NULL
);
9033 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9036 case elfcpp::R_ARM_BASE_ABS
:
9037 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9038 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9041 case elfcpp::R_ARM_GOT_BREL
:
9042 gold_assert(have_got_offset
);
9043 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9046 case elfcpp::R_ARM_GOT_PREL
:
9047 gold_assert(have_got_offset
);
9048 // Get the address origin for GOT PLT, which is allocated right
9049 // after the GOT section, to calculate an absolute address of
9050 // the symbol GOT entry (got_origin + got_offset).
9051 Arm_address got_origin
;
9052 got_origin
= target
->got_plt_section()->address();
9053 reloc_status
= Arm_relocate_functions::got_prel(view
,
9054 got_origin
+ got_offset
,
9058 case elfcpp::R_ARM_PLT32
:
9059 case elfcpp::R_ARM_CALL
:
9060 case elfcpp::R_ARM_JUMP24
:
9061 case elfcpp::R_ARM_XPC25
:
9062 gold_assert(gsym
== NULL
9063 || gsym
->has_plt_offset()
9064 || gsym
->final_value_is_known()
9065 || (gsym
->is_defined()
9066 && !gsym
->is_from_dynobj()
9067 && !gsym
->is_preemptible()));
9069 Arm_relocate_functions::arm_branch_common(
9070 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9071 thumb_bit
, is_weakly_undefined_without_plt
);
9074 case elfcpp::R_ARM_THM_JUMP19
:
9076 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9080 case elfcpp::R_ARM_THM_JUMP6
:
9082 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9085 case elfcpp::R_ARM_THM_JUMP8
:
9087 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9090 case elfcpp::R_ARM_THM_JUMP11
:
9092 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9095 case elfcpp::R_ARM_PREL31
:
9096 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9097 address
, thumb_bit
);
9100 case elfcpp::R_ARM_V4BX
:
9101 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9103 const bool is_v4bx_interworking
=
9104 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9106 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9107 is_v4bx_interworking
);
9111 case elfcpp::R_ARM_THM_PC8
:
9113 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
9116 case elfcpp::R_ARM_THM_PC12
:
9118 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
9121 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9123 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
9127 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9128 case elfcpp::R_ARM_ALU_PC_G0
:
9129 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9130 case elfcpp::R_ARM_ALU_PC_G1
:
9131 case elfcpp::R_ARM_ALU_PC_G2
:
9132 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9133 case elfcpp::R_ARM_ALU_SB_G0
:
9134 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9135 case elfcpp::R_ARM_ALU_SB_G1
:
9136 case elfcpp::R_ARM_ALU_SB_G2
:
9138 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
9139 reloc_property
->group_index(),
9140 relative_address_base
,
9141 thumb_bit
, check_overflow
);
9144 case elfcpp::R_ARM_LDR_PC_G0
:
9145 case elfcpp::R_ARM_LDR_PC_G1
:
9146 case elfcpp::R_ARM_LDR_PC_G2
:
9147 case elfcpp::R_ARM_LDR_SB_G0
:
9148 case elfcpp::R_ARM_LDR_SB_G1
:
9149 case elfcpp::R_ARM_LDR_SB_G2
:
9151 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
9152 reloc_property
->group_index(),
9153 relative_address_base
);
9156 case elfcpp::R_ARM_LDRS_PC_G0
:
9157 case elfcpp::R_ARM_LDRS_PC_G1
:
9158 case elfcpp::R_ARM_LDRS_PC_G2
:
9159 case elfcpp::R_ARM_LDRS_SB_G0
:
9160 case elfcpp::R_ARM_LDRS_SB_G1
:
9161 case elfcpp::R_ARM_LDRS_SB_G2
:
9163 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
9164 reloc_property
->group_index(),
9165 relative_address_base
);
9168 case elfcpp::R_ARM_LDC_PC_G0
:
9169 case elfcpp::R_ARM_LDC_PC_G1
:
9170 case elfcpp::R_ARM_LDC_PC_G2
:
9171 case elfcpp::R_ARM_LDC_SB_G0
:
9172 case elfcpp::R_ARM_LDC_SB_G1
:
9173 case elfcpp::R_ARM_LDC_SB_G2
:
9175 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
9176 reloc_property
->group_index(),
9177 relative_address_base
);
9180 // These are initial tls relocs, which are expected when
9182 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9183 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9184 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9185 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9186 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9188 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
9189 view
, address
, view_size
);
9192 // The known and unknown unsupported and/or deprecated relocations.
9193 case elfcpp::R_ARM_PC24
:
9194 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9195 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9196 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9198 // Just silently leave the method. We should get an appropriate error
9199 // message in the scan methods.
9203 // Report any errors.
9204 switch (reloc_status
)
9206 case Arm_relocate_functions::STATUS_OKAY
:
9208 case Arm_relocate_functions::STATUS_OVERFLOW
:
9209 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9210 _("relocation overflow in %s"),
9211 reloc_property
->name().c_str());
9213 case Arm_relocate_functions::STATUS_BAD_RELOC
:
9214 gold_error_at_location(
9218 _("unexpected opcode while processing relocation %s"),
9219 reloc_property
->name().c_str());
9228 // Perform a TLS relocation.
9230 template<bool big_endian
>
9231 inline typename Arm_relocate_functions
<big_endian
>::Status
9232 Target_arm
<big_endian
>::Relocate::relocate_tls(
9233 const Relocate_info
<32, big_endian
>* relinfo
,
9234 Target_arm
<big_endian
>* target
,
9236 const elfcpp::Rel
<32, big_endian
>& rel
,
9237 unsigned int r_type
,
9238 const Sized_symbol
<32>* gsym
,
9239 const Symbol_value
<32>* psymval
,
9240 unsigned char* view
,
9241 elfcpp::Elf_types
<32>::Elf_Addr address
,
9242 section_size_type
/*view_size*/ )
9244 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
9245 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
9246 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
9248 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
9250 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
9252 const bool is_final
= (gsym
== NULL
9253 ? !parameters
->options().shared()
9254 : gsym
->final_value_is_known());
9255 const tls::Tls_optimization optimized_type
9256 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9259 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9261 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
9262 unsigned int got_offset
;
9265 gold_assert(gsym
->has_got_offset(got_type
));
9266 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
9270 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9271 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9272 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
9273 - target
->got_size());
9275 if (optimized_type
== tls::TLSOPT_NONE
)
9277 Arm_address got_entry
=
9278 target
->got_plt_section()->address() + got_offset
;
9280 // Relocate the field with the PC relative offset of the pair of
9282 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9283 return ArmRelocFuncs::STATUS_OKAY
;
9288 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9289 if (optimized_type
== tls::TLSOPT_NONE
)
9291 // Relocate the field with the offset of the GOT entry for
9292 // the module index.
9293 unsigned int got_offset
;
9294 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
9295 - target
->got_size());
9296 Arm_address got_entry
=
9297 target
->got_plt_section()->address() + got_offset
;
9299 // Relocate the field with the PC relative offset of the pair of
9301 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9302 return ArmRelocFuncs::STATUS_OKAY
;
9306 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9307 RelocFuncs::rel32_unaligned(view
, value
);
9308 return ArmRelocFuncs::STATUS_OKAY
;
9310 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9311 if (optimized_type
== tls::TLSOPT_NONE
)
9313 // Relocate the field with the offset of the GOT entry for
9314 // the tp-relative offset of the symbol.
9315 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
9316 unsigned int got_offset
;
9319 gold_assert(gsym
->has_got_offset(got_type
));
9320 got_offset
= gsym
->got_offset(got_type
);
9324 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9325 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9326 got_offset
= object
->local_got_offset(r_sym
, got_type
);
9329 // All GOT offsets are relative to the end of the GOT.
9330 got_offset
-= target
->got_size();
9332 Arm_address got_entry
=
9333 target
->got_plt_section()->address() + got_offset
;
9335 // Relocate the field with the PC relative offset of the GOT entry.
9336 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9337 return ArmRelocFuncs::STATUS_OKAY
;
9341 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9342 // If we're creating a shared library, a dynamic relocation will
9343 // have been created for this location, so do not apply it now.
9344 if (!parameters
->options().shared())
9346 gold_assert(tls_segment
!= NULL
);
9348 // $tp points to the TCB, which is followed by the TLS, so we
9349 // need to add TCB size to the offset.
9350 Arm_address aligned_tcb_size
=
9351 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
9352 RelocFuncs::rel32_unaligned(view
, value
+ aligned_tcb_size
);
9355 return ArmRelocFuncs::STATUS_OKAY
;
9361 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9362 _("unsupported reloc %u"),
9364 return ArmRelocFuncs::STATUS_BAD_RELOC
;
9367 // Relocate section data.
9369 template<bool big_endian
>
9371 Target_arm
<big_endian
>::relocate_section(
9372 const Relocate_info
<32, big_endian
>* relinfo
,
9373 unsigned int sh_type
,
9374 const unsigned char* prelocs
,
9376 Output_section
* output_section
,
9377 bool needs_special_offset_handling
,
9378 unsigned char* view
,
9379 Arm_address address
,
9380 section_size_type view_size
,
9381 const Reloc_symbol_changes
* reloc_symbol_changes
)
9383 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
9384 gold_assert(sh_type
== elfcpp::SHT_REL
);
9386 // See if we are relocating a relaxed input section. If so, the view
9387 // covers the whole output section and we need to adjust accordingly.
9388 if (needs_special_offset_handling
)
9390 const Output_relaxed_input_section
* poris
=
9391 output_section
->find_relaxed_input_section(relinfo
->object
,
9392 relinfo
->data_shndx
);
9395 Arm_address section_address
= poris
->address();
9396 section_size_type section_size
= poris
->data_size();
9398 gold_assert((section_address
>= address
)
9399 && ((section_address
+ section_size
)
9400 <= (address
+ view_size
)));
9402 off_t offset
= section_address
- address
;
9405 view_size
= section_size
;
9409 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
9416 needs_special_offset_handling
,
9420 reloc_symbol_changes
);
9423 // Return the size of a relocation while scanning during a relocatable
9426 template<bool big_endian
>
9428 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
9429 unsigned int r_type
,
9432 r_type
= get_real_reloc_type(r_type
);
9433 const Arm_reloc_property
* arp
=
9434 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9439 std::string reloc_name
=
9440 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9441 gold_error(_("%s: unexpected %s in object file"),
9442 object
->name().c_str(), reloc_name
.c_str());
9447 // Scan the relocs during a relocatable link.
9449 template<bool big_endian
>
9451 Target_arm
<big_endian
>::scan_relocatable_relocs(
9452 Symbol_table
* symtab
,
9454 Sized_relobj_file
<32, big_endian
>* object
,
9455 unsigned int data_shndx
,
9456 unsigned int sh_type
,
9457 const unsigned char* prelocs
,
9459 Output_section
* output_section
,
9460 bool needs_special_offset_handling
,
9461 size_t local_symbol_count
,
9462 const unsigned char* plocal_symbols
,
9463 Relocatable_relocs
* rr
)
9465 gold_assert(sh_type
== elfcpp::SHT_REL
);
9467 typedef Arm_scan_relocatable_relocs
<big_endian
, elfcpp::SHT_REL
,
9468 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
9470 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
9471 Scan_relocatable_relocs
>(
9479 needs_special_offset_handling
,
9485 // Relocate a section during a relocatable link.
9487 template<bool big_endian
>
9489 Target_arm
<big_endian
>::relocate_for_relocatable(
9490 const Relocate_info
<32, big_endian
>* relinfo
,
9491 unsigned int sh_type
,
9492 const unsigned char* prelocs
,
9494 Output_section
* output_section
,
9495 off_t offset_in_output_section
,
9496 const Relocatable_relocs
* rr
,
9497 unsigned char* view
,
9498 Arm_address view_address
,
9499 section_size_type view_size
,
9500 unsigned char* reloc_view
,
9501 section_size_type reloc_view_size
)
9503 gold_assert(sh_type
== elfcpp::SHT_REL
);
9505 gold::relocate_for_relocatable
<32, big_endian
, elfcpp::SHT_REL
>(
9510 offset_in_output_section
,
9519 // Perform target-specific processing in a relocatable link. This is
9520 // only used if we use the relocation strategy RELOC_SPECIAL.
9522 template<bool big_endian
>
9524 Target_arm
<big_endian
>::relocate_special_relocatable(
9525 const Relocate_info
<32, big_endian
>* relinfo
,
9526 unsigned int sh_type
,
9527 const unsigned char* preloc_in
,
9529 Output_section
* output_section
,
9530 off_t offset_in_output_section
,
9531 unsigned char* view
,
9532 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
9534 unsigned char* preloc_out
)
9536 // We can only handle REL type relocation sections.
9537 gold_assert(sh_type
== elfcpp::SHT_REL
);
9539 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
9540 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
9542 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
9544 const Arm_relobj
<big_endian
>* object
=
9545 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9546 const unsigned int local_count
= object
->local_symbol_count();
9548 Reltype
reloc(preloc_in
);
9549 Reltype_write
reloc_write(preloc_out
);
9551 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
9552 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9553 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
9555 const Arm_reloc_property
* arp
=
9556 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9557 gold_assert(arp
!= NULL
);
9559 // Get the new symbol index.
9560 // We only use RELOC_SPECIAL strategy in local relocations.
9561 gold_assert(r_sym
< local_count
);
9563 // We are adjusting a section symbol. We need to find
9564 // the symbol table index of the section symbol for
9565 // the output section corresponding to input section
9566 // in which this symbol is defined.
9568 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
9569 gold_assert(is_ordinary
);
9570 Output_section
* os
= object
->output_section(shndx
);
9571 gold_assert(os
!= NULL
);
9572 gold_assert(os
->needs_symtab_index());
9573 unsigned int new_symndx
= os
->symtab_index();
9575 // Get the new offset--the location in the output section where
9576 // this relocation should be applied.
9578 Arm_address offset
= reloc
.get_r_offset();
9579 Arm_address new_offset
;
9580 if (offset_in_output_section
!= invalid_address
)
9581 new_offset
= offset
+ offset_in_output_section
;
9584 section_offset_type sot_offset
=
9585 convert_types
<section_offset_type
, Arm_address
>(offset
);
9586 section_offset_type new_sot_offset
=
9587 output_section
->output_offset(object
, relinfo
->data_shndx
,
9589 gold_assert(new_sot_offset
!= -1);
9590 new_offset
= new_sot_offset
;
9593 // In an object file, r_offset is an offset within the section.
9594 // In an executable or dynamic object, generated by
9595 // --emit-relocs, r_offset is an absolute address.
9596 if (!parameters
->options().relocatable())
9598 new_offset
+= view_address
;
9599 if (offset_in_output_section
!= invalid_address
)
9600 new_offset
-= offset_in_output_section
;
9603 reloc_write
.put_r_offset(new_offset
);
9604 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
9606 // Handle the reloc addend.
9607 // The relocation uses a section symbol in the input file.
9608 // We are adjusting it to use a section symbol in the output
9609 // file. The input section symbol refers to some address in
9610 // the input section. We need the relocation in the output
9611 // file to refer to that same address. This adjustment to
9612 // the addend is the same calculation we use for a simple
9613 // absolute relocation for the input section symbol.
9615 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
9617 // Handle THUMB bit.
9618 Symbol_value
<32> symval
;
9619 Arm_address thumb_bit
=
9620 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9622 && arp
->uses_thumb_bit()
9623 && ((psymval
->value(object
, 0) & 1) != 0))
9625 Arm_address stripped_value
=
9626 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9627 symval
.set_output_value(stripped_value
);
9631 unsigned char* paddend
= view
+ offset
;
9632 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
9633 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
9636 case elfcpp::R_ARM_ABS8
:
9637 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
9641 case elfcpp::R_ARM_ABS12
:
9642 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
9646 case elfcpp::R_ARM_ABS16
:
9647 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
9651 case elfcpp::R_ARM_THM_ABS5
:
9652 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
9657 case elfcpp::R_ARM_MOVW_ABS_NC
:
9658 case elfcpp::R_ARM_MOVW_PREL_NC
:
9659 case elfcpp::R_ARM_MOVW_BREL_NC
:
9660 case elfcpp::R_ARM_MOVW_BREL
:
9661 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
9662 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9665 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9666 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9667 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9668 case elfcpp::R_ARM_THM_MOVW_BREL
:
9669 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
9670 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9673 case elfcpp::R_ARM_THM_CALL
:
9674 case elfcpp::R_ARM_THM_XPC22
:
9675 case elfcpp::R_ARM_THM_JUMP24
:
9677 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
9678 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9682 case elfcpp::R_ARM_PLT32
:
9683 case elfcpp::R_ARM_CALL
:
9684 case elfcpp::R_ARM_JUMP24
:
9685 case elfcpp::R_ARM_XPC25
:
9687 Arm_relocate_functions
<big_endian
>::arm_branch_common(
9688 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9692 case elfcpp::R_ARM_THM_JUMP19
:
9694 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
9695 psymval
, 0, thumb_bit
);
9698 case elfcpp::R_ARM_THM_JUMP6
:
9700 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
9704 case elfcpp::R_ARM_THM_JUMP8
:
9706 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
9710 case elfcpp::R_ARM_THM_JUMP11
:
9712 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
9716 case elfcpp::R_ARM_PREL31
:
9718 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
9722 case elfcpp::R_ARM_THM_PC8
:
9724 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
9728 case elfcpp::R_ARM_THM_PC12
:
9730 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
9734 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9736 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
9740 // These relocation truncate relocation results so we cannot handle them
9741 // in a relocatable link.
9742 case elfcpp::R_ARM_MOVT_ABS
:
9743 case elfcpp::R_ARM_THM_MOVT_ABS
:
9744 case elfcpp::R_ARM_MOVT_PREL
:
9745 case elfcpp::R_ARM_MOVT_BREL
:
9746 case elfcpp::R_ARM_THM_MOVT_PREL
:
9747 case elfcpp::R_ARM_THM_MOVT_BREL
:
9748 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9749 case elfcpp::R_ARM_ALU_PC_G0
:
9750 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9751 case elfcpp::R_ARM_ALU_PC_G1
:
9752 case elfcpp::R_ARM_ALU_PC_G2
:
9753 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9754 case elfcpp::R_ARM_ALU_SB_G0
:
9755 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9756 case elfcpp::R_ARM_ALU_SB_G1
:
9757 case elfcpp::R_ARM_ALU_SB_G2
:
9758 case elfcpp::R_ARM_LDR_PC_G0
:
9759 case elfcpp::R_ARM_LDR_PC_G1
:
9760 case elfcpp::R_ARM_LDR_PC_G2
:
9761 case elfcpp::R_ARM_LDR_SB_G0
:
9762 case elfcpp::R_ARM_LDR_SB_G1
:
9763 case elfcpp::R_ARM_LDR_SB_G2
:
9764 case elfcpp::R_ARM_LDRS_PC_G0
:
9765 case elfcpp::R_ARM_LDRS_PC_G1
:
9766 case elfcpp::R_ARM_LDRS_PC_G2
:
9767 case elfcpp::R_ARM_LDRS_SB_G0
:
9768 case elfcpp::R_ARM_LDRS_SB_G1
:
9769 case elfcpp::R_ARM_LDRS_SB_G2
:
9770 case elfcpp::R_ARM_LDC_PC_G0
:
9771 case elfcpp::R_ARM_LDC_PC_G1
:
9772 case elfcpp::R_ARM_LDC_PC_G2
:
9773 case elfcpp::R_ARM_LDC_SB_G0
:
9774 case elfcpp::R_ARM_LDC_SB_G1
:
9775 case elfcpp::R_ARM_LDC_SB_G2
:
9776 gold_error(_("cannot handle %s in a relocatable link"),
9777 arp
->name().c_str());
9784 // Report any errors.
9785 switch (reloc_status
)
9787 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
9789 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
9790 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9791 _("relocation overflow in %s"),
9792 arp
->name().c_str());
9794 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
9795 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9796 _("unexpected opcode while processing relocation %s"),
9797 arp
->name().c_str());
9804 // Return the value to use for a dynamic symbol which requires special
9805 // treatment. This is how we support equality comparisons of function
9806 // pointers across shared library boundaries, as described in the
9807 // processor specific ABI supplement.
9809 template<bool big_endian
>
9811 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
9813 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
9814 return this->plt_section()->address() + gsym
->plt_offset();
9817 // Map platform-specific relocs to real relocs
9819 template<bool big_endian
>
9821 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
)
9825 case elfcpp::R_ARM_TARGET1
:
9826 // This is either R_ARM_ABS32 or R_ARM_REL32;
9827 return elfcpp::R_ARM_ABS32
;
9829 case elfcpp::R_ARM_TARGET2
:
9830 // This can be any reloc type but usually is R_ARM_GOT_PREL
9831 return elfcpp::R_ARM_GOT_PREL
;
9838 // Whether if two EABI versions V1 and V2 are compatible.
9840 template<bool big_endian
>
9842 Target_arm
<big_endian
>::are_eabi_versions_compatible(
9843 elfcpp::Elf_Word v1
,
9844 elfcpp::Elf_Word v2
)
9846 // v4 and v5 are the same spec before and after it was released,
9847 // so allow mixing them.
9848 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
9849 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
9850 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
9856 // Combine FLAGS from an input object called NAME and the processor-specific
9857 // flags in the ELF header of the output. Much of this is adapted from the
9858 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9859 // in bfd/elf32-arm.c.
9861 template<bool big_endian
>
9863 Target_arm
<big_endian
>::merge_processor_specific_flags(
9864 const std::string
& name
,
9865 elfcpp::Elf_Word flags
)
9867 if (this->are_processor_specific_flags_set())
9869 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
9871 // Nothing to merge if flags equal to those in output.
9872 if (flags
== out_flags
)
9875 // Complain about various flag mismatches.
9876 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
9877 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
9878 if (!this->are_eabi_versions_compatible(version1
, version2
)
9879 && parameters
->options().warn_mismatch())
9880 gold_error(_("Source object %s has EABI version %d but output has "
9881 "EABI version %d."),
9883 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
9884 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
9888 // If the input is the default architecture and had the default
9889 // flags then do not bother setting the flags for the output
9890 // architecture, instead allow future merges to do this. If no
9891 // future merges ever set these flags then they will retain their
9892 // uninitialised values, which surprise surprise, correspond
9893 // to the default values.
9897 // This is the first time, just copy the flags.
9898 // We only copy the EABI version for now.
9899 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
9903 // Adjust ELF file header.
9904 template<bool big_endian
>
9906 Target_arm
<big_endian
>::do_adjust_elf_header(
9907 unsigned char* view
,
9910 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
9912 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
9913 unsigned char e_ident
[elfcpp::EI_NIDENT
];
9914 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
9916 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
9917 == elfcpp::EF_ARM_EABI_UNKNOWN
)
9918 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
9920 e_ident
[elfcpp::EI_OSABI
] = 0;
9921 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
9923 // FIXME: Do EF_ARM_BE8 adjustment.
9925 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
9926 oehdr
.put_e_ident(e_ident
);
9929 // do_make_elf_object to override the same function in the base class.
9930 // We need to use a target-specific sub-class of
9931 // Sized_relobj_file<32, big_endian> to store ARM specific information.
9932 // Hence we need to have our own ELF object creation.
9934 template<bool big_endian
>
9936 Target_arm
<big_endian
>::do_make_elf_object(
9937 const std::string
& name
,
9938 Input_file
* input_file
,
9939 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
9941 int et
= ehdr
.get_e_type();
9942 // ET_EXEC files are valid input for --just-symbols/-R,
9943 // and we treat them as relocatable objects.
9944 if (et
== elfcpp::ET_REL
9945 || (et
== elfcpp::ET_EXEC
&& input_file
->just_symbols()))
9947 Arm_relobj
<big_endian
>* obj
=
9948 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
9952 else if (et
== elfcpp::ET_DYN
)
9954 Sized_dynobj
<32, big_endian
>* obj
=
9955 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
9961 gold_error(_("%s: unsupported ELF file type %d"),
9967 // Read the architecture from the Tag_also_compatible_with attribute, if any.
9968 // Returns -1 if no architecture could be read.
9969 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
9971 template<bool big_endian
>
9973 Target_arm
<big_endian
>::get_secondary_compatible_arch(
9974 const Attributes_section_data
* pasd
)
9976 const Object_attribute
* known_attributes
=
9977 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
9979 // Note: the tag and its argument below are uleb128 values, though
9980 // currently-defined values fit in one byte for each.
9981 const std::string
& sv
=
9982 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
9984 && sv
.data()[0] == elfcpp::Tag_CPU_arch
9985 && (sv
.data()[1] & 128) != 128)
9986 return sv
.data()[1];
9988 // This tag is "safely ignorable", so don't complain if it looks funny.
9992 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
9993 // The tag is removed if ARCH is -1.
9994 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
9996 template<bool big_endian
>
9998 Target_arm
<big_endian
>::set_secondary_compatible_arch(
9999 Attributes_section_data
* pasd
,
10002 Object_attribute
* known_attributes
=
10003 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10007 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10011 // Note: the tag and its argument below are uleb128 values, though
10012 // currently-defined values fit in one byte for each.
10014 sv
[0] = elfcpp::Tag_CPU_arch
;
10015 gold_assert(arch
!= 0);
10019 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10022 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10024 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10026 template<bool big_endian
>
10028 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10031 int* secondary_compat_out
,
10033 int secondary_compat
)
10035 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10036 static const int v6t2
[] =
10038 T(V6T2
), // PRE_V4.
10048 static const int v6k
[] =
10061 static const int v7
[] =
10075 static const int v6_m
[] =
10090 static const int v6s_m
[] =
10106 static const int v7e_m
[] =
10113 T(V7E_M
), // V5TEJ.
10120 T(V7E_M
), // V6S_M.
10123 static const int v4t_plus_v6_m
[] =
10130 T(V5TEJ
), // V5TEJ.
10137 T(V6S_M
), // V6S_M.
10138 T(V7E_M
), // V7E_M.
10139 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
10141 static const int* comb
[] =
10149 // Pseudo-architecture.
10153 // Check we've not got a higher architecture than we know about.
10155 if (oldtag
> elfcpp::MAX_TAG_CPU_ARCH
|| newtag
> elfcpp::MAX_TAG_CPU_ARCH
)
10157 gold_error(_("%s: unknown CPU architecture"), name
);
10161 // Override old tag if we have a Tag_also_compatible_with on the output.
10163 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
10164 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
10165 oldtag
= T(V4T_PLUS_V6_M
);
10167 // And override the new tag if we have a Tag_also_compatible_with on the
10170 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
10171 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
10172 newtag
= T(V4T_PLUS_V6_M
);
10174 // Architectures before V6KZ add features monotonically.
10175 int tagh
= std::max(oldtag
, newtag
);
10176 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
10179 int tagl
= std::min(oldtag
, newtag
);
10180 int result
= comb
[tagh
- T(V6T2
)][tagl
];
10182 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10183 // as the canonical version.
10184 if (result
== T(V4T_PLUS_V6_M
))
10187 *secondary_compat_out
= T(V6_M
);
10190 *secondary_compat_out
= -1;
10194 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10195 name
, oldtag
, newtag
);
10203 // Helper to print AEABI enum tag value.
10205 template<bool big_endian
>
10207 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
10209 static const char* aeabi_enum_names
[] =
10210 { "", "variable-size", "32-bit", "" };
10211 const size_t aeabi_enum_names_size
=
10212 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
10214 if (value
< aeabi_enum_names_size
)
10215 return std::string(aeabi_enum_names
[value
]);
10219 sprintf(buffer
, "<unknown value %u>", value
);
10220 return std::string(buffer
);
10224 // Return the string value to store in TAG_CPU_name.
10226 template<bool big_endian
>
10228 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
10230 static const char* name_table
[] = {
10231 // These aren't real CPU names, but we can't guess
10232 // that from the architecture version alone.
10248 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
10250 if (value
< name_table_size
)
10251 return std::string(name_table
[value
]);
10255 sprintf(buffer
, "<unknown CPU value %u>", value
);
10256 return std::string(buffer
);
10260 // Merge object attributes from input file called NAME with those of the
10261 // output. The input object attributes are in the object pointed by PASD.
10263 template<bool big_endian
>
10265 Target_arm
<big_endian
>::merge_object_attributes(
10267 const Attributes_section_data
* pasd
)
10269 // Return if there is no attributes section data.
10273 // If output has no object attributes, just copy.
10274 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
10275 if (this->attributes_section_data_
== NULL
)
10277 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
10278 Object_attribute
* out_attr
=
10279 this->attributes_section_data_
->known_attributes(vendor
);
10281 // We do not output objects with Tag_MPextension_use_legacy - we move
10282 // the attribute's value to Tag_MPextension_use. */
10283 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
10285 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
10286 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
10287 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10289 gold_error(_("%s has both the current and legacy "
10290 "Tag_MPextension_use attributes"),
10294 out_attr
[elfcpp::Tag_MPextension_use
] =
10295 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
10296 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
10297 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
10303 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
10304 Object_attribute
* out_attr
=
10305 this->attributes_section_data_
->known_attributes(vendor
);
10307 // This needs to happen before Tag_ABI_FP_number_model is merged. */
10308 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
10309 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
10311 // Ignore mismatches if the object doesn't use floating point. */
10312 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() == 0)
10313 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
10314 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
10315 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() != 0
10316 && parameters
->options().warn_mismatch())
10317 gold_error(_("%s uses VFP register arguments, output does not"),
10321 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
10323 // Merge this attribute with existing attributes.
10326 case elfcpp::Tag_CPU_raw_name
:
10327 case elfcpp::Tag_CPU_name
:
10328 // These are merged after Tag_CPU_arch.
10331 case elfcpp::Tag_ABI_optimization_goals
:
10332 case elfcpp::Tag_ABI_FP_optimization_goals
:
10333 // Use the first value seen.
10336 case elfcpp::Tag_CPU_arch
:
10338 unsigned int saved_out_attr
= out_attr
->int_value();
10339 // Merge Tag_CPU_arch and Tag_also_compatible_with.
10340 int secondary_compat
=
10341 this->get_secondary_compatible_arch(pasd
);
10342 int secondary_compat_out
=
10343 this->get_secondary_compatible_arch(
10344 this->attributes_section_data_
);
10345 out_attr
[i
].set_int_value(
10346 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
10347 &secondary_compat_out
,
10348 in_attr
[i
].int_value(),
10349 secondary_compat
));
10350 this->set_secondary_compatible_arch(this->attributes_section_data_
,
10351 secondary_compat_out
);
10353 // Merge Tag_CPU_name and Tag_CPU_raw_name.
10354 if (out_attr
[i
].int_value() == saved_out_attr
)
10355 ; // Leave the names alone.
10356 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
10358 // The output architecture has been changed to match the
10359 // input architecture. Use the input names.
10360 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
10361 in_attr
[elfcpp::Tag_CPU_name
].string_value());
10362 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
10363 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
10367 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
10368 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
10371 // If we still don't have a value for Tag_CPU_name,
10372 // make one up now. Tag_CPU_raw_name remains blank.
10373 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
10375 const std::string cpu_name
=
10376 this->tag_cpu_name_value(out_attr
[i
].int_value());
10377 // FIXME: If we see an unknown CPU, this will be set
10378 // to "<unknown CPU n>", where n is the attribute value.
10379 // This is different from BFD, which leaves the name alone.
10380 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
10385 case elfcpp::Tag_ARM_ISA_use
:
10386 case elfcpp::Tag_THUMB_ISA_use
:
10387 case elfcpp::Tag_WMMX_arch
:
10388 case elfcpp::Tag_Advanced_SIMD_arch
:
10389 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
10390 case elfcpp::Tag_ABI_FP_rounding
:
10391 case elfcpp::Tag_ABI_FP_exceptions
:
10392 case elfcpp::Tag_ABI_FP_user_exceptions
:
10393 case elfcpp::Tag_ABI_FP_number_model
:
10394 case elfcpp::Tag_VFP_HP_extension
:
10395 case elfcpp::Tag_CPU_unaligned_access
:
10396 case elfcpp::Tag_T2EE_use
:
10397 case elfcpp::Tag_Virtualization_use
:
10398 case elfcpp::Tag_MPextension_use
:
10399 // Use the largest value specified.
10400 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10401 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10404 case elfcpp::Tag_ABI_align8_preserved
:
10405 case elfcpp::Tag_ABI_PCS_RO_data
:
10406 // Use the smallest value specified.
10407 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10408 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10411 case elfcpp::Tag_ABI_align8_needed
:
10412 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
10413 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
10414 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
10417 // This error message should be enabled once all non-conforming
10418 // binaries in the toolchain have had the attributes set
10420 // gold_error(_("output 8-byte data alignment conflicts with %s"),
10424 case elfcpp::Tag_ABI_FP_denormal
:
10425 case elfcpp::Tag_ABI_PCS_GOT_use
:
10427 // These tags have 0 = don't care, 1 = strong requirement,
10428 // 2 = weak requirement.
10429 static const int order_021
[3] = {0, 2, 1};
10431 // Use the "greatest" from the sequence 0, 2, 1, or the largest
10432 // value if greater than 2 (for future-proofing).
10433 if ((in_attr
[i
].int_value() > 2
10434 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10435 || (in_attr
[i
].int_value() <= 2
10436 && out_attr
[i
].int_value() <= 2
10437 && (order_021
[in_attr
[i
].int_value()]
10438 > order_021
[out_attr
[i
].int_value()])))
10439 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10443 case elfcpp::Tag_CPU_arch_profile
:
10444 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
10446 // 0 will merge with anything.
10447 // 'A' and 'S' merge to 'A'.
10448 // 'R' and 'S' merge to 'R'.
10449 // 'M' and 'A|R|S' is an error.
10450 if (out_attr
[i
].int_value() == 0
10451 || (out_attr
[i
].int_value() == 'S'
10452 && (in_attr
[i
].int_value() == 'A'
10453 || in_attr
[i
].int_value() == 'R')))
10454 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10455 else if (in_attr
[i
].int_value() == 0
10456 || (in_attr
[i
].int_value() == 'S'
10457 && (out_attr
[i
].int_value() == 'A'
10458 || out_attr
[i
].int_value() == 'R')))
10460 else if (parameters
->options().warn_mismatch())
10463 (_("conflicting architecture profiles %c/%c"),
10464 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
10465 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
10469 case elfcpp::Tag_VFP_arch
:
10471 static const struct
10475 } vfp_versions
[7] =
10486 // Values greater than 6 aren't defined, so just pick the
10488 if (in_attr
[i
].int_value() > 6
10489 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10491 *out_attr
= *in_attr
;
10494 // The output uses the superset of input features
10495 // (ISA version) and registers.
10496 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
10497 vfp_versions
[out_attr
[i
].int_value()].ver
);
10498 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
10499 vfp_versions
[out_attr
[i
].int_value()].regs
);
10500 // This assumes all possible supersets are also a valid
10503 for (newval
= 6; newval
> 0; newval
--)
10505 if (regs
== vfp_versions
[newval
].regs
10506 && ver
== vfp_versions
[newval
].ver
)
10509 out_attr
[i
].set_int_value(newval
);
10512 case elfcpp::Tag_PCS_config
:
10513 if (out_attr
[i
].int_value() == 0)
10514 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10515 else if (in_attr
[i
].int_value() != 0
10516 && out_attr
[i
].int_value() != 0
10517 && parameters
->options().warn_mismatch())
10519 // It's sometimes ok to mix different configs, so this is only
10521 gold_warning(_("%s: conflicting platform configuration"), name
);
10524 case elfcpp::Tag_ABI_PCS_R9_use
:
10525 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10526 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10527 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10528 && parameters
->options().warn_mismatch())
10530 gold_error(_("%s: conflicting use of R9"), name
);
10532 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
10533 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10535 case elfcpp::Tag_ABI_PCS_RW_data
:
10536 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10537 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10538 != elfcpp::AEABI_R9_SB
)
10539 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10540 != elfcpp::AEABI_R9_unused
)
10541 && parameters
->options().warn_mismatch())
10543 gold_error(_("%s: SB relative addressing conflicts with use "
10547 // Use the smallest value specified.
10548 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10549 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10551 case elfcpp::Tag_ABI_PCS_wchar_t
:
10552 if (out_attr
[i
].int_value()
10553 && in_attr
[i
].int_value()
10554 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10555 && parameters
->options().warn_mismatch()
10556 && parameters
->options().wchar_size_warning())
10558 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10559 "use %u-byte wchar_t; use of wchar_t values "
10560 "across objects may fail"),
10561 name
, in_attr
[i
].int_value(),
10562 out_attr
[i
].int_value());
10564 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
10565 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10567 case elfcpp::Tag_ABI_enum_size
:
10568 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
10570 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
10571 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
10573 // The existing object is compatible with anything.
10574 // Use whatever requirements the new object has.
10575 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10577 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
10578 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10579 && parameters
->options().warn_mismatch()
10580 && parameters
->options().enum_size_warning())
10582 unsigned int in_value
= in_attr
[i
].int_value();
10583 unsigned int out_value
= out_attr
[i
].int_value();
10584 gold_warning(_("%s uses %s enums yet the output is to use "
10585 "%s enums; use of enum values across objects "
10588 this->aeabi_enum_name(in_value
).c_str(),
10589 this->aeabi_enum_name(out_value
).c_str());
10593 case elfcpp::Tag_ABI_VFP_args
:
10596 case elfcpp::Tag_ABI_WMMX_args
:
10597 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10598 && parameters
->options().warn_mismatch())
10600 gold_error(_("%s uses iWMMXt register arguments, output does "
10605 case Object_attribute::Tag_compatibility
:
10606 // Merged in target-independent code.
10608 case elfcpp::Tag_ABI_HardFP_use
:
10609 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10610 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
10611 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
10612 out_attr
[i
].set_int_value(3);
10613 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10614 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10616 case elfcpp::Tag_ABI_FP_16bit_format
:
10617 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
10619 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10620 && parameters
->options().warn_mismatch())
10621 gold_error(_("fp16 format mismatch between %s and output"),
10624 if (in_attr
[i
].int_value() != 0)
10625 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10628 case elfcpp::Tag_DIV_use
:
10629 // This tag is set to zero if we can use UDIV and SDIV in Thumb
10630 // mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10631 // SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10632 // CPU. We will merge as follows: If the input attribute's value
10633 // is one then the output attribute's value remains unchanged. If
10634 // the input attribute's value is zero or two then if the output
10635 // attribute's value is one the output value is set to the input
10636 // value, otherwise the output value must be the same as the
10638 if (in_attr
[i
].int_value() != 1 && out_attr
[i
].int_value() != 1)
10640 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
10642 gold_error(_("DIV usage mismatch between %s and output"),
10647 if (in_attr
[i
].int_value() != 1)
10648 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10652 case elfcpp::Tag_MPextension_use_legacy
:
10653 // We don't output objects with Tag_MPextension_use_legacy - we
10654 // move the value to Tag_MPextension_use.
10655 if (in_attr
[i
].int_value() != 0
10656 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
10658 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
10659 != in_attr
[i
].int_value())
10661 gold_error(_("%s has has both the current and legacy "
10662 "Tag_MPextension_use attributes"),
10667 if (in_attr
[i
].int_value()
10668 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10669 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
10673 case elfcpp::Tag_nodefaults
:
10674 // This tag is set if it exists, but the value is unused (and is
10675 // typically zero). We don't actually need to do anything here -
10676 // the merge happens automatically when the type flags are merged
10679 case elfcpp::Tag_also_compatible_with
:
10680 // Already done in Tag_CPU_arch.
10682 case elfcpp::Tag_conformance
:
10683 // Keep the attribute if it matches. Throw it away otherwise.
10684 // No attribute means no claim to conform.
10685 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
10686 out_attr
[i
].set_string_value("");
10691 const char* err_object
= NULL
;
10693 // The "known_obj_attributes" table does contain some undefined
10694 // attributes. Ensure that there are unused.
10695 if (out_attr
[i
].int_value() != 0
10696 || out_attr
[i
].string_value() != "")
10697 err_object
= "output";
10698 else if (in_attr
[i
].int_value() != 0
10699 || in_attr
[i
].string_value() != "")
10702 if (err_object
!= NULL
10703 && parameters
->options().warn_mismatch())
10705 // Attribute numbers >=64 (mod 128) can be safely ignored.
10706 if ((i
& 127) < 64)
10707 gold_error(_("%s: unknown mandatory EABI object attribute "
10711 gold_warning(_("%s: unknown EABI object attribute %d"),
10715 // Only pass on attributes that match in both inputs.
10716 if (!in_attr
[i
].matches(out_attr
[i
]))
10718 out_attr
[i
].set_int_value(0);
10719 out_attr
[i
].set_string_value("");
10724 // If out_attr was copied from in_attr then it won't have a type yet.
10725 if (in_attr
[i
].type() && !out_attr
[i
].type())
10726 out_attr
[i
].set_type(in_attr
[i
].type());
10729 // Merge Tag_compatibility attributes and any common GNU ones.
10730 this->attributes_section_data_
->merge(name
, pasd
);
10732 // Check for any attributes not known on ARM.
10733 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
10734 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
10735 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
10736 Other_attributes
* out_other_attributes
=
10737 this->attributes_section_data_
->other_attributes(vendor
);
10738 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
10740 while (in_iter
!= in_other_attributes
->end()
10741 || out_iter
!= out_other_attributes
->end())
10743 const char* err_object
= NULL
;
10746 // The tags for each list are in numerical order.
10747 // If the tags are equal, then merge.
10748 if (out_iter
!= out_other_attributes
->end()
10749 && (in_iter
== in_other_attributes
->end()
10750 || in_iter
->first
> out_iter
->first
))
10752 // This attribute only exists in output. We can't merge, and we
10753 // don't know what the tag means, so delete it.
10754 err_object
= "output";
10755 err_tag
= out_iter
->first
;
10756 int saved_tag
= out_iter
->first
;
10757 delete out_iter
->second
;
10758 out_other_attributes
->erase(out_iter
);
10759 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10761 else if (in_iter
!= in_other_attributes
->end()
10762 && (out_iter
!= out_other_attributes
->end()
10763 || in_iter
->first
< out_iter
->first
))
10765 // This attribute only exists in input. We can't merge, and we
10766 // don't know what the tag means, so ignore it.
10768 err_tag
= in_iter
->first
;
10771 else // The tags are equal.
10773 // As present, all attributes in the list are unknown, and
10774 // therefore can't be merged meaningfully.
10775 err_object
= "output";
10776 err_tag
= out_iter
->first
;
10778 // Only pass on attributes that match in both inputs.
10779 if (!in_iter
->second
->matches(*(out_iter
->second
)))
10781 // No match. Delete the attribute.
10782 int saved_tag
= out_iter
->first
;
10783 delete out_iter
->second
;
10784 out_other_attributes
->erase(out_iter
);
10785 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10789 // Matched. Keep the attribute and move to the next.
10795 if (err_object
&& parameters
->options().warn_mismatch())
10797 // Attribute numbers >=64 (mod 128) can be safely ignored. */
10798 if ((err_tag
& 127) < 64)
10800 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10801 err_object
, err_tag
);
10805 gold_warning(_("%s: unknown EABI object attribute %d"),
10806 err_object
, err_tag
);
10812 // Stub-generation methods for Target_arm.
10814 // Make a new Arm_input_section object.
10816 template<bool big_endian
>
10817 Arm_input_section
<big_endian
>*
10818 Target_arm
<big_endian
>::new_arm_input_section(
10820 unsigned int shndx
)
10822 Section_id
sid(relobj
, shndx
);
10824 Arm_input_section
<big_endian
>* arm_input_section
=
10825 new Arm_input_section
<big_endian
>(relobj
, shndx
);
10826 arm_input_section
->init();
10828 // Register new Arm_input_section in map for look-up.
10829 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
10830 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
10832 // Make sure that it we have not created another Arm_input_section
10833 // for this input section already.
10834 gold_assert(ins
.second
);
10836 return arm_input_section
;
10839 // Find the Arm_input_section object corresponding to the SHNDX-th input
10840 // section of RELOBJ.
10842 template<bool big_endian
>
10843 Arm_input_section
<big_endian
>*
10844 Target_arm
<big_endian
>::find_arm_input_section(
10846 unsigned int shndx
) const
10848 Section_id
sid(relobj
, shndx
);
10849 typename
Arm_input_section_map::const_iterator p
=
10850 this->arm_input_section_map_
.find(sid
);
10851 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
10854 // Make a new stub table.
10856 template<bool big_endian
>
10857 Stub_table
<big_endian
>*
10858 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
10860 Stub_table
<big_endian
>* stub_table
=
10861 new Stub_table
<big_endian
>(owner
);
10862 this->stub_tables_
.push_back(stub_table
);
10864 stub_table
->set_address(owner
->address() + owner
->data_size());
10865 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
10866 stub_table
->finalize_data_size();
10871 // Scan a relocation for stub generation.
10873 template<bool big_endian
>
10875 Target_arm
<big_endian
>::scan_reloc_for_stub(
10876 const Relocate_info
<32, big_endian
>* relinfo
,
10877 unsigned int r_type
,
10878 const Sized_symbol
<32>* gsym
,
10879 unsigned int r_sym
,
10880 const Symbol_value
<32>* psymval
,
10881 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
10882 Arm_address address
)
10884 typedef typename Target_arm
<big_endian
>::Relocate Relocate
;
10886 const Arm_relobj
<big_endian
>* arm_relobj
=
10887 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10889 bool target_is_thumb
;
10890 Symbol_value
<32> symval
;
10893 // This is a global symbol. Determine if we use PLT and if the
10894 // final target is THUMB.
10895 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
10897 // This uses a PLT, change the symbol value.
10898 symval
.set_output_value(this->plt_section()->address()
10899 + gsym
->plt_offset());
10901 target_is_thumb
= false;
10903 else if (gsym
->is_undefined())
10904 // There is no need to generate a stub symbol is undefined.
10909 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
10910 || (gsym
->type() == elfcpp::STT_FUNC
10911 && !gsym
->is_undefined()
10912 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
10917 // This is a local symbol. Determine if the final target is THUMB.
10918 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
10921 // Strip LSB if this points to a THUMB target.
10922 const Arm_reloc_property
* reloc_property
=
10923 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10924 gold_assert(reloc_property
!= NULL
);
10925 if (target_is_thumb
10926 && reloc_property
->uses_thumb_bit()
10927 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
10929 Arm_address stripped_value
=
10930 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
10931 symval
.set_output_value(stripped_value
);
10935 // Get the symbol value.
10936 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
10938 // Owing to pipelining, the PC relative branches below actually skip
10939 // two instructions when the branch offset is 0.
10940 Arm_address destination
;
10943 case elfcpp::R_ARM_CALL
:
10944 case elfcpp::R_ARM_JUMP24
:
10945 case elfcpp::R_ARM_PLT32
:
10947 destination
= value
+ addend
+ 8;
10949 case elfcpp::R_ARM_THM_CALL
:
10950 case elfcpp::R_ARM_THM_XPC22
:
10951 case elfcpp::R_ARM_THM_JUMP24
:
10952 case elfcpp::R_ARM_THM_JUMP19
:
10954 destination
= value
+ addend
+ 4;
10957 gold_unreachable();
10960 Reloc_stub
* stub
= NULL
;
10961 Stub_type stub_type
=
10962 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
10964 if (stub_type
!= arm_stub_none
)
10966 // Try looking up an existing stub from a stub table.
10967 Stub_table
<big_endian
>* stub_table
=
10968 arm_relobj
->stub_table(relinfo
->data_shndx
);
10969 gold_assert(stub_table
!= NULL
);
10971 // Locate stub by destination.
10972 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
10974 // Create a stub if there is not one already
10975 stub
= stub_table
->find_reloc_stub(stub_key
);
10978 // create a new stub and add it to stub table.
10979 stub
= this->stub_factory().make_reloc_stub(stub_type
);
10980 stub_table
->add_reloc_stub(stub
, stub_key
);
10983 // Record the destination address.
10984 stub
->set_destination_address(destination
10985 | (target_is_thumb
? 1 : 0));
10988 // For Cortex-A8, we need to record a relocation at 4K page boundary.
10989 if (this->fix_cortex_a8_
10990 && (r_type
== elfcpp::R_ARM_THM_JUMP24
10991 || r_type
== elfcpp::R_ARM_THM_JUMP19
10992 || r_type
== elfcpp::R_ARM_THM_CALL
10993 || r_type
== elfcpp::R_ARM_THM_XPC22
)
10994 && (address
& 0xfffU
) == 0xffeU
)
10996 // Found a candidate. Note we haven't checked the destination is
10997 // within 4K here: if we do so (and don't create a record) we can't
10998 // tell that a branch should have been relocated when scanning later.
10999 this->cortex_a8_relocs_info_
[address
] =
11000 new Cortex_a8_reloc(stub
, r_type
,
11001 destination
| (target_is_thumb
? 1 : 0));
11005 // This function scans a relocation sections for stub generation.
11006 // The template parameter Relocate must be a class type which provides
11007 // a single function, relocate(), which implements the machine
11008 // specific part of a relocation.
11010 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11011 // SHT_REL or SHT_RELA.
11013 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11014 // of relocs. OUTPUT_SECTION is the output section.
11015 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11016 // mapped to output offsets.
11018 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11019 // VIEW_SIZE is the size. These refer to the input section, unless
11020 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11021 // the output section.
11023 template<bool big_endian
>
11024 template<int sh_type
>
11026 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
11027 const Relocate_info
<32, big_endian
>* relinfo
,
11028 const unsigned char* prelocs
,
11029 size_t reloc_count
,
11030 Output_section
* output_section
,
11031 bool needs_special_offset_handling
,
11032 const unsigned char* view
,
11033 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
11036 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
11037 const int reloc_size
=
11038 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
11040 Arm_relobj
<big_endian
>* arm_object
=
11041 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11042 unsigned int local_count
= arm_object
->local_symbol_count();
11044 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
11046 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
11048 Reltype
reloc(prelocs
);
11050 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
11051 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
11052 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
11054 r_type
= this->get_real_reloc_type(r_type
);
11056 // Only a few relocation types need stubs.
11057 if ((r_type
!= elfcpp::R_ARM_CALL
)
11058 && (r_type
!= elfcpp::R_ARM_JUMP24
)
11059 && (r_type
!= elfcpp::R_ARM_PLT32
)
11060 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
11061 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
11062 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
11063 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
11064 && (r_type
!= elfcpp::R_ARM_V4BX
))
11067 section_offset_type offset
=
11068 convert_to_section_size_type(reloc
.get_r_offset());
11070 if (needs_special_offset_handling
)
11072 offset
= output_section
->output_offset(relinfo
->object
,
11073 relinfo
->data_shndx
,
11079 // Create a v4bx stub if --fix-v4bx-interworking is used.
11080 if (r_type
== elfcpp::R_ARM_V4BX
)
11082 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
11084 // Get the BX instruction.
11085 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
11086 const Valtype
* wv
=
11087 reinterpret_cast<const Valtype
*>(view
+ offset
);
11088 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
11089 elfcpp::Swap
<32, big_endian
>::readval(wv
);
11090 const uint32_t reg
= (insn
& 0xf);
11094 // Try looking up an existing stub from a stub table.
11095 Stub_table
<big_endian
>* stub_table
=
11096 arm_object
->stub_table(relinfo
->data_shndx
);
11097 gold_assert(stub_table
!= NULL
);
11099 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
11101 // create a new stub and add it to stub table.
11102 Arm_v4bx_stub
* stub
=
11103 this->stub_factory().make_arm_v4bx_stub(reg
);
11104 gold_assert(stub
!= NULL
);
11105 stub_table
->add_arm_v4bx_stub(stub
);
11113 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
11114 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
11115 stub_addend_reader(r_type
, view
+ offset
, reloc
);
11117 const Sized_symbol
<32>* sym
;
11119 Symbol_value
<32> symval
;
11120 const Symbol_value
<32> *psymval
;
11121 bool is_defined_in_discarded_section
;
11122 unsigned int shndx
;
11123 if (r_sym
< local_count
)
11126 psymval
= arm_object
->local_symbol(r_sym
);
11128 // If the local symbol belongs to a section we are discarding,
11129 // and that section is a debug section, try to find the
11130 // corresponding kept section and map this symbol to its
11131 // counterpart in the kept section. The symbol must not
11132 // correspond to a section we are folding.
11134 shndx
= psymval
->input_shndx(&is_ordinary
);
11135 is_defined_in_discarded_section
=
11137 && shndx
!= elfcpp::SHN_UNDEF
11138 && !arm_object
->is_section_included(shndx
)
11139 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
11141 // We need to compute the would-be final value of this local
11143 if (!is_defined_in_discarded_section
)
11145 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
11146 typename
ObjType::Compute_final_local_value_status status
=
11147 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
11149 if (status
== ObjType::CFLV_OK
)
11151 // Currently we cannot handle a branch to a target in
11152 // a merged section. If this is the case, issue an error
11153 // and also free the merge symbol value.
11154 if (!symval
.has_output_value())
11156 const std::string
& section_name
=
11157 arm_object
->section_name(shndx
);
11158 arm_object
->error(_("cannot handle branch to local %u "
11159 "in a merged section %s"),
11160 r_sym
, section_name
.c_str());
11166 // We cannot determine the final value.
11173 const Symbol
* gsym
;
11174 gsym
= arm_object
->global_symbol(r_sym
);
11175 gold_assert(gsym
!= NULL
);
11176 if (gsym
->is_forwarder())
11177 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
11179 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
11180 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
11181 symval
.set_output_symtab_index(sym
->symtab_index());
11183 symval
.set_no_output_symtab_entry();
11185 // We need to compute the would-be final value of this global
11187 const Symbol_table
* symtab
= relinfo
->symtab
;
11188 const Sized_symbol
<32>* sized_symbol
=
11189 symtab
->get_sized_symbol
<32>(gsym
);
11190 Symbol_table::Compute_final_value_status status
;
11191 Arm_address value
=
11192 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
11194 // Skip this if the symbol has not output section.
11195 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
11197 symval
.set_output_value(value
);
11199 if (gsym
->type() == elfcpp::STT_TLS
)
11200 symval
.set_is_tls_symbol();
11201 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
11202 symval
.set_is_ifunc_symbol();
11205 is_defined_in_discarded_section
=
11206 (gsym
->is_defined_in_discarded_section()
11207 && gsym
->is_undefined());
11211 Symbol_value
<32> symval2
;
11212 if (is_defined_in_discarded_section
)
11214 if (comdat_behavior
== CB_UNDETERMINED
)
11216 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
11217 comdat_behavior
= get_comdat_behavior(name
.c_str());
11219 if (comdat_behavior
== CB_PRETEND
)
11221 // FIXME: This case does not work for global symbols.
11222 // We have no place to store the original section index.
11223 // Fortunately this does not matter for comdat sections,
11224 // only for sections explicitly discarded by a linker
11227 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
11228 arm_object
->map_to_kept_section(shndx
, &found
);
11230 symval2
.set_output_value(value
+ psymval
->input_value());
11232 symval2
.set_output_value(0);
11236 if (comdat_behavior
== CB_WARNING
)
11237 gold_warning_at_location(relinfo
, i
, offset
,
11238 _("relocation refers to discarded "
11240 symval2
.set_output_value(0);
11242 symval2
.set_no_output_symtab_entry();
11243 psymval
= &symval2
;
11246 // If symbol is a section symbol, we don't know the actual type of
11247 // destination. Give up.
11248 if (psymval
->is_section_symbol())
11251 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
11252 addend
, view_address
+ offset
);
11256 // Scan an input section for stub generation.
11258 template<bool big_endian
>
11260 Target_arm
<big_endian
>::scan_section_for_stubs(
11261 const Relocate_info
<32, big_endian
>* relinfo
,
11262 unsigned int sh_type
,
11263 const unsigned char* prelocs
,
11264 size_t reloc_count
,
11265 Output_section
* output_section
,
11266 bool needs_special_offset_handling
,
11267 const unsigned char* view
,
11268 Arm_address view_address
,
11269 section_size_type view_size
)
11271 if (sh_type
== elfcpp::SHT_REL
)
11272 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
11277 needs_special_offset_handling
,
11281 else if (sh_type
== elfcpp::SHT_RELA
)
11282 // We do not support RELA type relocations yet. This is provided for
11284 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
11289 needs_special_offset_handling
,
11294 gold_unreachable();
11297 // Group input sections for stub generation.
11299 // We group input sections in an output section so that the total size,
11300 // including any padding space due to alignment is smaller than GROUP_SIZE
11301 // unless the only input section in group is bigger than GROUP_SIZE already.
11302 // Then an ARM stub table is created to follow the last input section
11303 // in group. For each group an ARM stub table is created an is placed
11304 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
11305 // extend the group after the stub table.
11307 template<bool big_endian
>
11309 Target_arm
<big_endian
>::group_sections(
11311 section_size_type group_size
,
11312 bool stubs_always_after_branch
,
11315 // Group input sections and insert stub table
11316 Layout::Section_list section_list
;
11317 layout
->get_allocated_sections(§ion_list
);
11318 for (Layout::Section_list::const_iterator p
= section_list
.begin();
11319 p
!= section_list
.end();
11322 Arm_output_section
<big_endian
>* output_section
=
11323 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11324 output_section
->group_sections(group_size
, stubs_always_after_branch
,
11329 // Relaxation hook. This is where we do stub generation.
11331 template<bool big_endian
>
11333 Target_arm
<big_endian
>::do_relax(
11335 const Input_objects
* input_objects
,
11336 Symbol_table
* symtab
,
11340 // No need to generate stubs if this is a relocatable link.
11341 gold_assert(!parameters
->options().relocatable());
11343 // If this is the first pass, we need to group input sections into
11345 bool done_exidx_fixup
= false;
11346 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
11349 // Determine the stub group size. The group size is the absolute
11350 // value of the parameter --stub-group-size. If --stub-group-size
11351 // is passed a negative value, we restrict stubs to be always after
11352 // the stubbed branches.
11353 int32_t stub_group_size_param
=
11354 parameters
->options().stub_group_size();
11355 bool stubs_always_after_branch
= stub_group_size_param
< 0;
11356 section_size_type stub_group_size
= abs(stub_group_size_param
);
11358 if (stub_group_size
== 1)
11361 // Thumb branch range is +-4MB has to be used as the default
11362 // maximum size (a given section can contain both ARM and Thumb
11363 // code, so the worst case has to be taken into account). If we are
11364 // fixing cortex-a8 errata, the branch range has to be even smaller,
11365 // since wide conditional branch has a range of +-1MB only.
11367 // This value is 48K less than that, which allows for 4096
11368 // 12-byte stubs. If we exceed that, then we will fail to link.
11369 // The user will have to relink with an explicit group size
11371 stub_group_size
= 4145152;
11374 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
11375 // page as the first half of a 32-bit branch straddling two 4K pages.
11376 // This is a crude way of enforcing that. In addition, long conditional
11377 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
11378 // erratum, limit the group size to (1M - 12k) to avoid unreachable
11379 // cortex-A8 stubs from long conditional branches.
11380 if (this->fix_cortex_a8_
)
11382 stubs_always_after_branch
= true;
11383 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
11384 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
11387 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
11389 // Also fix .ARM.exidx section coverage.
11390 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
11391 for (Layout::Section_list::const_iterator p
=
11392 layout
->section_list().begin();
11393 p
!= layout
->section_list().end();
11395 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
11397 if (exidx_output_section
== NULL
)
11398 exidx_output_section
=
11399 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11401 // We cannot handle this now.
11402 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
11403 "non-relocatable link"),
11404 exidx_output_section
->name(),
11408 if (exidx_output_section
!= NULL
)
11410 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
11412 done_exidx_fixup
= true;
11417 // If this is not the first pass, addresses and file offsets have
11418 // been reset at this point, set them here.
11419 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11420 sp
!= this->stub_tables_
.end();
11423 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11424 off_t off
= align_address(owner
->original_size(),
11425 (*sp
)->addralign());
11426 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
11427 owner
->offset() + off
);
11431 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
11432 // beginning of each relaxation pass, just blow away all the stubs.
11433 // Alternatively, we could selectively remove only the stubs and reloc
11434 // information for code sections that have moved since the last pass.
11435 // That would require more book-keeping.
11436 if (this->fix_cortex_a8_
)
11438 // Clear all Cortex-A8 reloc information.
11439 for (typename
Cortex_a8_relocs_info::const_iterator p
=
11440 this->cortex_a8_relocs_info_
.begin();
11441 p
!= this->cortex_a8_relocs_info_
.end();
11444 this->cortex_a8_relocs_info_
.clear();
11446 // Remove all Cortex-A8 stubs.
11447 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11448 sp
!= this->stub_tables_
.end();
11450 (*sp
)->remove_all_cortex_a8_stubs();
11453 // Scan relocs for relocation stubs
11454 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11455 op
!= input_objects
->relobj_end();
11458 Arm_relobj
<big_endian
>* arm_relobj
=
11459 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11460 // Lock the object so we can read from it. This is only called
11461 // single-threaded from Layout::finalize, so it is OK to lock.
11462 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11463 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
11466 // Check all stub tables to see if any of them have their data sizes
11467 // or addresses alignments changed. These are the only things that
11469 bool any_stub_table_changed
= false;
11470 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
11471 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11472 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11475 if ((*sp
)->update_data_size_and_addralign())
11477 // Update data size of stub table owner.
11478 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11479 uint64_t address
= owner
->address();
11480 off_t offset
= owner
->offset();
11481 owner
->reset_address_and_file_offset();
11482 owner
->set_address_and_file_offset(address
, offset
);
11484 sections_needing_adjustment
.insert(owner
->output_section());
11485 any_stub_table_changed
= true;
11489 // Output_section_data::output_section() returns a const pointer but we
11490 // need to update output sections, so we record all output sections needing
11491 // update above and scan the sections here to find out what sections need
11493 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
11494 p
!= layout
->section_list().end();
11497 if (sections_needing_adjustment
.find(*p
)
11498 != sections_needing_adjustment
.end())
11499 (*p
)->set_section_offsets_need_adjustment();
11502 // Stop relaxation if no EXIDX fix-up and no stub table change.
11503 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
11505 // Finalize the stubs in the last relaxation pass.
11506 if (!continue_relaxation
)
11508 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11509 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11511 (*sp
)->finalize_stubs();
11513 // Update output local symbol counts of objects if necessary.
11514 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11515 op
!= input_objects
->relobj_end();
11518 Arm_relobj
<big_endian
>* arm_relobj
=
11519 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11521 // Update output local symbol counts. We need to discard local
11522 // symbols defined in parts of input sections that are discarded by
11524 if (arm_relobj
->output_local_symbol_count_needs_update())
11526 // We need to lock the object's file to update it.
11527 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11528 arm_relobj
->update_output_local_symbol_count();
11533 return continue_relaxation
;
11536 // Relocate a stub.
11538 template<bool big_endian
>
11540 Target_arm
<big_endian
>::relocate_stub(
11542 const Relocate_info
<32, big_endian
>* relinfo
,
11543 Output_section
* output_section
,
11544 unsigned char* view
,
11545 Arm_address address
,
11546 section_size_type view_size
)
11549 const Stub_template
* stub_template
= stub
->stub_template();
11550 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
11552 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
11553 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
11555 unsigned int r_type
= insn
->r_type();
11556 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
11557 section_size_type reloc_size
= insn
->size();
11558 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
11560 // This is the address of the stub destination.
11561 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
11562 Symbol_value
<32> symval
;
11563 symval
.set_output_value(target
);
11565 // Synthesize a fake reloc just in case. We don't have a symbol so
11567 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
11568 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
11569 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
11570 reloc_write
.put_r_offset(reloc_offset
);
11571 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
11572 elfcpp::Rel
<32, big_endian
> rel(reloc_buffer
);
11574 relocate
.relocate(relinfo
, this, output_section
,
11575 this->fake_relnum_for_stubs
, rel
, r_type
,
11576 NULL
, &symval
, view
+ reloc_offset
,
11577 address
+ reloc_offset
, reloc_size
);
11581 // Determine whether an object attribute tag takes an integer, a
11584 template<bool big_endian
>
11586 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
11588 if (tag
== Object_attribute::Tag_compatibility
)
11589 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11590 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
11591 else if (tag
== elfcpp::Tag_nodefaults
)
11592 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11593 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
11594 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
11595 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
11597 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
11599 return ((tag
& 1) != 0
11600 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11601 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
11604 // Reorder attributes.
11606 // The ABI defines that Tag_conformance should be emitted first, and that
11607 // Tag_nodefaults should be second (if either is defined). This sets those
11608 // two positions, and bumps up the position of all the remaining tags to
11611 template<bool big_endian
>
11613 Target_arm
<big_endian
>::do_attributes_order(int num
) const
11615 // Reorder the known object attributes in output. We want to move
11616 // Tag_conformance to position 4 and Tag_conformance to position 5
11617 // and shift everything between 4 .. Tag_conformance - 1 to make room.
11619 return elfcpp::Tag_conformance
;
11621 return elfcpp::Tag_nodefaults
;
11622 if ((num
- 2) < elfcpp::Tag_nodefaults
)
11624 if ((num
- 1) < elfcpp::Tag_conformance
)
11629 // Scan a span of THUMB code for Cortex-A8 erratum.
11631 template<bool big_endian
>
11633 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
11634 Arm_relobj
<big_endian
>* arm_relobj
,
11635 unsigned int shndx
,
11636 section_size_type span_start
,
11637 section_size_type span_end
,
11638 const unsigned char* view
,
11639 Arm_address address
)
11641 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11643 // The opcode is BLX.W, BL.W, B.W, Bcc.W
11644 // The branch target is in the same 4KB region as the
11645 // first half of the branch.
11646 // The instruction before the branch is a 32-bit
11647 // length non-branch instruction.
11648 section_size_type i
= span_start
;
11649 bool last_was_32bit
= false;
11650 bool last_was_branch
= false;
11651 while (i
< span_end
)
11653 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11654 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
11655 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11656 bool is_blx
= false, is_b
= false;
11657 bool is_bl
= false, is_bcc
= false;
11659 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
11662 // Load the rest of the insn (in manual-friendly order).
11663 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11665 // Encoding T4: B<c>.W.
11666 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
11667 // Encoding T1: BL<c>.W.
11668 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
11669 // Encoding T2: BLX<c>.W.
11670 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
11671 // Encoding T3: B<c>.W (not permitted in IT block).
11672 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
11673 && (insn
& 0x07f00000U
) != 0x03800000U
);
11676 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
11678 // If this instruction is a 32-bit THUMB branch that crosses a 4K
11679 // page boundary and it follows 32-bit non-branch instruction,
11680 // we need to work around.
11681 if (is_32bit_branch
11682 && ((address
+ i
) & 0xfffU
) == 0xffeU
11684 && !last_was_branch
)
11686 // Check to see if there is a relocation stub for this branch.
11687 bool force_target_arm
= false;
11688 bool force_target_thumb
= false;
11689 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
11690 Cortex_a8_relocs_info::const_iterator p
=
11691 this->cortex_a8_relocs_info_
.find(address
+ i
);
11693 if (p
!= this->cortex_a8_relocs_info_
.end())
11695 cortex_a8_reloc
= p
->second
;
11696 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
11698 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11699 && !target_is_thumb
)
11700 force_target_arm
= true;
11701 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11702 && target_is_thumb
)
11703 force_target_thumb
= true;
11707 Stub_type stub_type
= arm_stub_none
;
11709 // Check if we have an offending branch instruction.
11710 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
11711 uint16_t lower_insn
= insn
& 0xffffU
;
11712 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
11714 if (cortex_a8_reloc
!= NULL
11715 && cortex_a8_reloc
->reloc_stub() != NULL
)
11716 // We've already made a stub for this instruction, e.g.
11717 // it's a long branch or a Thumb->ARM stub. Assume that
11718 // stub will suffice to work around the A8 erratum (see
11719 // setting of always_after_branch above).
11723 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
11725 stub_type
= arm_stub_a8_veneer_b_cond
;
11727 else if (is_b
|| is_bl
|| is_blx
)
11729 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
11734 stub_type
= (is_blx
11735 ? arm_stub_a8_veneer_blx
11737 ? arm_stub_a8_veneer_bl
11738 : arm_stub_a8_veneer_b
));
11741 if (stub_type
!= arm_stub_none
)
11743 Arm_address pc_for_insn
= address
+ i
+ 4;
11745 // The original instruction is a BL, but the target is
11746 // an ARM instruction. If we were not making a stub,
11747 // the BL would have been converted to a BLX. Use the
11748 // BLX stub instead in that case.
11749 if (this->may_use_v5t_interworking() && force_target_arm
11750 && stub_type
== arm_stub_a8_veneer_bl
)
11752 stub_type
= arm_stub_a8_veneer_blx
;
11756 // Conversely, if the original instruction was
11757 // BLX but the target is Thumb mode, use the BL stub.
11758 else if (force_target_thumb
11759 && stub_type
== arm_stub_a8_veneer_blx
)
11761 stub_type
= arm_stub_a8_veneer_bl
;
11769 // If we found a relocation, use the proper destination,
11770 // not the offset in the (unrelocated) instruction.
11771 // Note this is always done if we switched the stub type above.
11772 if (cortex_a8_reloc
!= NULL
)
11773 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
11775 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
11777 // Add a new stub if destination address in in the same page.
11778 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
11780 Cortex_a8_stub
* stub
=
11781 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
11785 Stub_table
<big_endian
>* stub_table
=
11786 arm_relobj
->stub_table(shndx
);
11787 gold_assert(stub_table
!= NULL
);
11788 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
11793 i
+= insn_32bit
? 4 : 2;
11794 last_was_32bit
= insn_32bit
;
11795 last_was_branch
= is_32bit_branch
;
11799 // Apply the Cortex-A8 workaround.
11801 template<bool big_endian
>
11803 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
11804 const Cortex_a8_stub
* stub
,
11805 Arm_address stub_address
,
11806 unsigned char* insn_view
,
11807 Arm_address insn_address
)
11809 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11810 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
11811 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11812 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11813 off_t branch_offset
= stub_address
- (insn_address
+ 4);
11815 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
11816 switch (stub
->stub_template()->type())
11818 case arm_stub_a8_veneer_b_cond
:
11819 // For a conditional branch, we re-write it to be an unconditional
11820 // branch to the stub. We use the THUMB-2 encoding here.
11821 upper_insn
= 0xf000U
;
11822 lower_insn
= 0xb800U
;
11824 case arm_stub_a8_veneer_b
:
11825 case arm_stub_a8_veneer_bl
:
11826 case arm_stub_a8_veneer_blx
:
11827 if ((lower_insn
& 0x5000U
) == 0x4000U
)
11828 // For a BLX instruction, make sure that the relocation is
11829 // rounded up to a word boundary. This follows the semantics of
11830 // the instruction which specifies that bit 1 of the target
11831 // address will come from bit 1 of the base address.
11832 branch_offset
= (branch_offset
+ 2) & ~3;
11834 // Put BRANCH_OFFSET back into the insn.
11835 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
11836 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
11837 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
11841 gold_unreachable();
11844 // Put the relocated value back in the object file:
11845 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
11846 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
11849 template<bool big_endian
>
11850 class Target_selector_arm
: public Target_selector
11853 Target_selector_arm()
11854 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
11855 (big_endian
? "elf32-bigarm" : "elf32-littlearm"),
11856 (big_endian
? "armelfb" : "armelf"))
11860 do_instantiate_target()
11861 { return new Target_arm
<big_endian
>(); }
11864 // Fix .ARM.exidx section coverage.
11866 template<bool big_endian
>
11868 Target_arm
<big_endian
>::fix_exidx_coverage(
11870 const Input_objects
* input_objects
,
11871 Arm_output_section
<big_endian
>* exidx_section
,
11872 Symbol_table
* symtab
,
11875 // We need to look at all the input sections in output in ascending
11876 // order of of output address. We do that by building a sorted list
11877 // of output sections by addresses. Then we looks at the output sections
11878 // in order. The input sections in an output section are already sorted
11879 // by addresses within the output section.
11881 typedef std::set
<Output_section
*, output_section_address_less_than
>
11882 Sorted_output_section_list
;
11883 Sorted_output_section_list sorted_output_sections
;
11885 // Find out all the output sections of input sections pointed by
11886 // EXIDX input sections.
11887 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
11888 p
!= input_objects
->relobj_end();
11891 Arm_relobj
<big_endian
>* arm_relobj
=
11892 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
11893 std::vector
<unsigned int> shndx_list
;
11894 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
11895 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
11897 const Arm_exidx_input_section
* exidx_input_section
=
11898 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
11899 gold_assert(exidx_input_section
!= NULL
);
11900 if (!exidx_input_section
->has_errors())
11902 unsigned int text_shndx
= exidx_input_section
->link();
11903 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
11904 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
11905 sorted_output_sections
.insert(os
);
11910 // Go over the output sections in ascending order of output addresses.
11911 typedef typename Arm_output_section
<big_endian
>::Text_section_list
11913 Text_section_list sorted_text_sections
;
11914 for (typename
Sorted_output_section_list::iterator p
=
11915 sorted_output_sections
.begin();
11916 p
!= sorted_output_sections
.end();
11919 Arm_output_section
<big_endian
>* arm_output_section
=
11920 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11921 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
11924 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
11925 merge_exidx_entries(), task
);
11928 template<bool big_endian
>
11930 Target_arm
<big_endian
>::do_define_standard_symbols(
11931 Symbol_table
* symtab
,
11934 // Handle the .ARM.exidx section.
11935 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
11937 if (exidx_section
!= NULL
)
11939 // Create __exidx_start and __exidx_end symbols.
11940 symtab
->define_in_output_data("__exidx_start",
11942 Symbol_table::PREDEFINED
,
11946 elfcpp::STT_NOTYPE
,
11947 elfcpp::STB_GLOBAL
,
11948 elfcpp::STV_HIDDEN
,
11950 false, // offset_is_from_end
11951 true); // only_if_ref
11953 symtab
->define_in_output_data("__exidx_end",
11955 Symbol_table::PREDEFINED
,
11959 elfcpp::STT_NOTYPE
,
11960 elfcpp::STB_GLOBAL
,
11961 elfcpp::STV_HIDDEN
,
11963 true, // offset_is_from_end
11964 true); // only_if_ref
11968 // Define __exidx_start and __exidx_end even when .ARM.exidx
11969 // section is missing to match ld's behaviour.
11970 symtab
->define_as_constant("__exidx_start", NULL
,
11971 Symbol_table::PREDEFINED
,
11972 0, 0, elfcpp::STT_OBJECT
,
11973 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
11975 symtab
->define_as_constant("__exidx_end", NULL
,
11976 Symbol_table::PREDEFINED
,
11977 0, 0, elfcpp::STT_OBJECT
,
11978 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
11983 Target_selector_arm
<false> target_selector_arm
;
11984 Target_selector_arm
<true> target_selector_armbe
;
11986 } // End anonymous namespace.