1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian
>
61 class Output_data_plt_arm
;
63 template<bool big_endian
>
66 template<bool big_endian
>
67 class Arm_input_section
;
69 class Arm_exidx_cantunwind
;
71 class Arm_exidx_merged_section
;
73 class Arm_exidx_fixup
;
75 template<bool big_endian
>
76 class Arm_output_section
;
78 class Arm_exidx_input_section
;
80 template<bool big_endian
>
83 template<bool big_endian
>
84 class Arm_relocate_functions
;
86 template<bool big_endian
>
87 class Arm_output_data_got
;
89 template<bool big_endian
>
93 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
95 // Maximum branch offsets for ARM, THUMB and THUMB2.
96 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
97 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
98 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
99 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
100 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
101 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
103 // Thread Control Block size.
104 const size_t ARM_TCB_SIZE
= 8;
106 // The arm target class.
108 // This is a very simple port of gold for ARM-EABI. It is intended for
109 // supporting Android only for the time being.
112 // - Implement all static relocation types documented in arm-reloc.def.
113 // - Make PLTs more flexible for different architecture features like
115 // There are probably a lot more.
117 // Ideally we would like to avoid using global variables but this is used
118 // very in many places and sometimes in loops. If we use a function
119 // returning a static instance of Arm_reloc_property_table, it will be very
120 // slow in an threaded environment since the static instance needs to be
121 // locked. The pointer is below initialized in the
122 // Target::do_select_as_default_target() hook so that we do not spend time
123 // building the table if we are not linking ARM objects.
125 // An alternative is to to process the information in arm-reloc.def in
126 // compilation time and generate a representation of it in PODs only. That
127 // way we can avoid initialization when the linker starts.
129 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
131 // Instruction template class. This class is similar to the insn_sequence
132 // struct in bfd/elf32-arm.c.
137 // Types of instruction templates.
141 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
142 // templates with class-specific semantics. Currently this is used
143 // only by the Cortex_a8_stub class for handling condition codes in
144 // conditional branches.
145 THUMB16_SPECIAL_TYPE
,
151 // Factory methods to create instruction templates in different formats.
153 static const Insn_template
154 thumb16_insn(uint32_t data
)
155 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
157 // A Thumb conditional branch, in which the proper condition is inserted
158 // when we build the stub.
159 static const Insn_template
160 thumb16_bcond_insn(uint32_t data
)
161 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
163 static const Insn_template
164 thumb32_insn(uint32_t data
)
165 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
167 static const Insn_template
168 thumb32_b_insn(uint32_t data
, int reloc_addend
)
170 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
174 static const Insn_template
175 arm_insn(uint32_t data
)
176 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
178 static const Insn_template
179 arm_rel_insn(unsigned data
, int reloc_addend
)
180 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
182 static const Insn_template
183 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
184 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
186 // Accessors. This class is used for read-only objects so no modifiers
191 { return this->data_
; }
193 // Return the instruction sequence type of this.
196 { return this->type_
; }
198 // Return the ARM relocation type of this.
201 { return this->r_type_
; }
205 { return this->reloc_addend_
; }
207 // Return size of instruction template in bytes.
211 // Return byte-alignment of instruction template.
216 // We make the constructor private to ensure that only the factory
219 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
220 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
223 // Instruction specific data. This is used to store information like
224 // some of the instruction bits.
226 // Instruction template type.
228 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
229 unsigned int r_type_
;
230 // Relocation addend.
231 int32_t reloc_addend_
;
234 // Macro for generating code to stub types. One entry per long/short
238 DEF_STUB(long_branch_any_any) \
239 DEF_STUB(long_branch_v4t_arm_thumb) \
240 DEF_STUB(long_branch_thumb_only) \
241 DEF_STUB(long_branch_v4t_thumb_thumb) \
242 DEF_STUB(long_branch_v4t_thumb_arm) \
243 DEF_STUB(short_branch_v4t_thumb_arm) \
244 DEF_STUB(long_branch_any_arm_pic) \
245 DEF_STUB(long_branch_any_thumb_pic) \
246 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
247 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
248 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
249 DEF_STUB(long_branch_thumb_only_pic) \
250 DEF_STUB(a8_veneer_b_cond) \
251 DEF_STUB(a8_veneer_b) \
252 DEF_STUB(a8_veneer_bl) \
253 DEF_STUB(a8_veneer_blx) \
254 DEF_STUB(v4_veneer_bx)
258 #define DEF_STUB(x) arm_stub_##x,
264 // First reloc stub type.
265 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
266 // Last reloc stub type.
267 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
269 // First Cortex-A8 stub type.
270 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
271 // Last Cortex-A8 stub type.
272 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
275 arm_stub_type_last
= arm_stub_v4_veneer_bx
279 // Stub template class. Templates are meant to be read-only objects.
280 // A stub template for a stub type contains all read-only attributes
281 // common to all stubs of the same type.
286 Stub_template(Stub_type
, const Insn_template
*, size_t);
294 { return this->type_
; }
296 // Return an array of instruction templates.
299 { return this->insns_
; }
301 // Return size of template in number of instructions.
304 { return this->insn_count_
; }
306 // Return size of template in bytes.
309 { return this->size_
; }
311 // Return alignment of the stub template.
314 { return this->alignment_
; }
316 // Return whether entry point is in thumb mode.
318 entry_in_thumb_mode() const
319 { return this->entry_in_thumb_mode_
; }
321 // Return number of relocations in this template.
324 { return this->relocs_
.size(); }
326 // Return index of the I-th instruction with relocation.
328 reloc_insn_index(size_t i
) const
330 gold_assert(i
< this->relocs_
.size());
331 return this->relocs_
[i
].first
;
334 // Return the offset of the I-th instruction with relocation from the
335 // beginning of the stub.
337 reloc_offset(size_t i
) const
339 gold_assert(i
< this->relocs_
.size());
340 return this->relocs_
[i
].second
;
344 // This contains information about an instruction template with a relocation
345 // and its offset from start of stub.
346 typedef std::pair
<size_t, section_size_type
> Reloc
;
348 // A Stub_template may not be copied. We want to share templates as much
350 Stub_template(const Stub_template
&);
351 Stub_template
& operator=(const Stub_template
&);
355 // Points to an array of Insn_templates.
356 const Insn_template
* insns_
;
357 // Number of Insn_templates in insns_[].
359 // Size of templated instructions in bytes.
361 // Alignment of templated instructions.
363 // Flag to indicate if entry is in thumb mode.
364 bool entry_in_thumb_mode_
;
365 // A table of reloc instruction indices and offsets. We can find these by
366 // looking at the instruction templates but we pre-compute and then stash
367 // them here for speed.
368 std::vector
<Reloc
> relocs_
;
372 // A class for code stubs. This is a base class for different type of
373 // stubs used in the ARM target.
379 static const section_offset_type invalid_offset
=
380 static_cast<section_offset_type
>(-1);
383 Stub(const Stub_template
* stub_template
)
384 : stub_template_(stub_template
), offset_(invalid_offset
)
391 // Return the stub template.
393 stub_template() const
394 { return this->stub_template_
; }
396 // Return offset of code stub from beginning of its containing stub table.
400 gold_assert(this->offset_
!= invalid_offset
);
401 return this->offset_
;
404 // Set offset of code stub from beginning of its containing stub table.
406 set_offset(section_offset_type offset
)
407 { this->offset_
= offset
; }
409 // Return the relocation target address of the i-th relocation in the
410 // stub. This must be defined in a child class.
412 reloc_target(size_t i
)
413 { return this->do_reloc_target(i
); }
415 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
417 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
418 { this->do_write(view
, view_size
, big_endian
); }
420 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
421 // for the i-th instruction.
423 thumb16_special(size_t i
)
424 { return this->do_thumb16_special(i
); }
427 // This must be defined in the child class.
429 do_reloc_target(size_t) = 0;
431 // This may be overridden in the child class.
433 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
436 this->do_fixed_endian_write
<true>(view
, view_size
);
438 this->do_fixed_endian_write
<false>(view
, view_size
);
441 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
442 // instruction template.
444 do_thumb16_special(size_t)
445 { gold_unreachable(); }
448 // A template to implement do_write.
449 template<bool big_endian
>
451 do_fixed_endian_write(unsigned char*, section_size_type
);
454 const Stub_template
* stub_template_
;
455 // Offset within the section of containing this stub.
456 section_offset_type offset_
;
459 // Reloc stub class. These are stubs we use to fix up relocation because
460 // of limited branch ranges.
462 class Reloc_stub
: public Stub
465 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
466 // We assume we never jump to this address.
467 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
469 // Return destination address.
471 destination_address() const
473 gold_assert(this->destination_address_
!= this->invalid_address
);
474 return this->destination_address_
;
477 // Set destination address.
479 set_destination_address(Arm_address address
)
481 gold_assert(address
!= this->invalid_address
);
482 this->destination_address_
= address
;
485 // Reset destination address.
487 reset_destination_address()
488 { this->destination_address_
= this->invalid_address
; }
490 // Determine stub type for a branch of a relocation of R_TYPE going
491 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
492 // the branch target is a thumb instruction. TARGET is used for look
493 // up ARM-specific linker settings.
495 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
496 Arm_address branch_target
, bool target_is_thumb
);
498 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
499 // and an addend. Since we treat global and local symbol differently, we
500 // use a Symbol object for a global symbol and a object-index pair for
505 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
506 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
507 // and R_SYM must not be invalid_index.
508 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
509 unsigned int r_sym
, int32_t addend
)
510 : stub_type_(stub_type
), addend_(addend
)
514 this->r_sym_
= Reloc_stub::invalid_index
;
515 this->u_
.symbol
= symbol
;
519 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
520 this->r_sym_
= r_sym
;
521 this->u_
.relobj
= relobj
;
528 // Accessors: Keys are meant to be read-only object so no modifiers are
534 { return this->stub_type_
; }
536 // Return the local symbol index or invalid_index.
539 { return this->r_sym_
; }
541 // Return the symbol if there is one.
544 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
546 // Return the relobj if there is one.
549 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
551 // Whether this equals to another key k.
553 eq(const Key
& k
) const
555 return ((this->stub_type_
== k
.stub_type_
)
556 && (this->r_sym_
== k
.r_sym_
)
557 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
558 ? (this->u_
.relobj
== k
.u_
.relobj
)
559 : (this->u_
.symbol
== k
.u_
.symbol
))
560 && (this->addend_
== k
.addend_
));
563 // Return a hash value.
567 return (this->stub_type_
569 ^ gold::string_hash
<char>(
570 (this->r_sym_
!= Reloc_stub::invalid_index
)
571 ? this->u_
.relobj
->name().c_str()
572 : this->u_
.symbol
->name())
576 // Functors for STL associative containers.
580 operator()(const Key
& k
) const
581 { return k
.hash_value(); }
587 operator()(const Key
& k1
, const Key
& k2
) const
588 { return k1
.eq(k2
); }
591 // Name of key. This is mainly for debugging.
597 Stub_type stub_type_
;
598 // If this is a local symbol, this is the index in the defining object.
599 // Otherwise, it is invalid_index for a global symbol.
601 // If r_sym_ is an invalid index, this points to a global symbol.
602 // Otherwise, it points to a relobj. We used the unsized and target
603 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
604 // Arm_relobj, in order to avoid making the stub class a template
605 // as most of the stub machinery is endianness-neutral. However, it
606 // may require a bit of casting done by users of this class.
609 const Symbol
* symbol
;
610 const Relobj
* relobj
;
612 // Addend associated with a reloc.
617 // Reloc_stubs are created via a stub factory. So these are protected.
618 Reloc_stub(const Stub_template
* stub_template
)
619 : Stub(stub_template
), destination_address_(invalid_address
)
625 friend class Stub_factory
;
627 // Return the relocation target address of the i-th relocation in the
630 do_reloc_target(size_t i
)
632 // All reloc stub have only one relocation.
634 return this->destination_address_
;
638 // Address of destination.
639 Arm_address destination_address_
;
642 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
643 // THUMB branch that meets the following conditions:
645 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
646 // branch address is 0xffe.
647 // 2. The branch target address is in the same page as the first word of the
649 // 3. The branch follows a 32-bit instruction which is not a branch.
651 // To do the fix up, we need to store the address of the branch instruction
652 // and its target at least. We also need to store the original branch
653 // instruction bits for the condition code in a conditional branch. The
654 // condition code is used in a special instruction template. We also want
655 // to identify input sections needing Cortex-A8 workaround quickly. We store
656 // extra information about object and section index of the code section
657 // containing a branch being fixed up. The information is used to mark
658 // the code section when we finalize the Cortex-A8 stubs.
661 class Cortex_a8_stub
: public Stub
667 // Return the object of the code section containing the branch being fixed
671 { return this->relobj_
; }
673 // Return the section index of the code section containing the branch being
677 { return this->shndx_
; }
679 // Return the source address of stub. This is the address of the original
680 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
683 source_address() const
684 { return this->source_address_
; }
686 // Return the destination address of the stub. This is the branch taken
687 // address of the original branch instruction. LSB is 1 if it is a THUMB
688 // instruction address.
690 destination_address() const
691 { return this->destination_address_
; }
693 // Return the instruction being fixed up.
695 original_insn() const
696 { return this->original_insn_
; }
699 // Cortex_a8_stubs are created via a stub factory. So these are protected.
700 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
701 unsigned int shndx
, Arm_address source_address
,
702 Arm_address destination_address
, uint32_t original_insn
)
703 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
704 source_address_(source_address
| 1U),
705 destination_address_(destination_address
),
706 original_insn_(original_insn
)
709 friend class Stub_factory
;
711 // Return the relocation target address of the i-th relocation in the
714 do_reloc_target(size_t i
)
716 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
718 // The conditional branch veneer has two relocations.
720 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
724 // All other Cortex-A8 stubs have only one relocation.
726 return this->destination_address_
;
730 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
732 do_thumb16_special(size_t);
735 // Object of the code section containing the branch being fixed up.
737 // Section index of the code section containing the branch begin fixed up.
739 // Source address of original branch.
740 Arm_address source_address_
;
741 // Destination address of the original branch.
742 Arm_address destination_address_
;
743 // Original branch instruction. This is needed for copying the condition
744 // code from a condition branch to its stub.
745 uint32_t original_insn_
;
748 // ARMv4 BX Rx branch relocation stub class.
749 class Arm_v4bx_stub
: public Stub
755 // Return the associated register.
758 { return this->reg_
; }
761 // Arm V4BX stubs are created via a stub factory. So these are protected.
762 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
763 : Stub(stub_template
), reg_(reg
)
766 friend class Stub_factory
;
768 // Return the relocation target address of the i-th relocation in the
771 do_reloc_target(size_t)
772 { gold_unreachable(); }
774 // This may be overridden in the child class.
776 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
779 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
781 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
785 // A template to implement do_write.
786 template<bool big_endian
>
788 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
790 const Insn_template
* insns
= this->stub_template()->insns();
791 elfcpp::Swap
<32, big_endian
>::writeval(view
,
793 + (this->reg_
<< 16)));
794 view
+= insns
[0].size();
795 elfcpp::Swap
<32, big_endian
>::writeval(view
,
796 (insns
[1].data() + this->reg_
));
797 view
+= insns
[1].size();
798 elfcpp::Swap
<32, big_endian
>::writeval(view
,
799 (insns
[2].data() + this->reg_
));
802 // A register index (r0-r14), which is associated with the stub.
806 // Stub factory class.
811 // Return the unique instance of this class.
812 static const Stub_factory
&
815 static Stub_factory singleton
;
819 // Make a relocation stub.
821 make_reloc_stub(Stub_type stub_type
) const
823 gold_assert(stub_type
>= arm_stub_reloc_first
824 && stub_type
<= arm_stub_reloc_last
);
825 return new Reloc_stub(this->stub_templates_
[stub_type
]);
828 // Make a Cortex-A8 stub.
830 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
831 Arm_address source
, Arm_address destination
,
832 uint32_t original_insn
) const
834 gold_assert(stub_type
>= arm_stub_cortex_a8_first
835 && stub_type
<= arm_stub_cortex_a8_last
);
836 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
837 source
, destination
, original_insn
);
840 // Make an ARM V4BX relocation stub.
841 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
843 make_arm_v4bx_stub(uint32_t reg
) const
845 gold_assert(reg
< 0xf);
846 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
851 // Constructor and destructor are protected since we only return a single
852 // instance created in Stub_factory::get_instance().
856 // A Stub_factory may not be copied since it is a singleton.
857 Stub_factory(const Stub_factory
&);
858 Stub_factory
& operator=(Stub_factory
&);
860 // Stub templates. These are initialized in the constructor.
861 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
864 // A class to hold stubs for the ARM target.
866 template<bool big_endian
>
867 class Stub_table
: public Output_data
870 Stub_table(Arm_input_section
<big_endian
>* owner
)
871 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
872 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
873 prev_data_size_(0), prev_addralign_(1)
879 // Owner of this stub table.
880 Arm_input_section
<big_endian
>*
882 { return this->owner_
; }
884 // Whether this stub table is empty.
888 return (this->reloc_stubs_
.empty()
889 && this->cortex_a8_stubs_
.empty()
890 && this->arm_v4bx_stubs_
.empty());
893 // Return the current data size.
895 current_data_size() const
896 { return this->current_data_size_for_child(); }
898 // Add a STUB using KEY. The caller is responsible for avoiding addition
899 // if a STUB with the same key has already been added.
901 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
903 const Stub_template
* stub_template
= stub
->stub_template();
904 gold_assert(stub_template
->type() == key
.stub_type());
905 this->reloc_stubs_
[key
] = stub
;
907 // Assign stub offset early. We can do this because we never remove
908 // reloc stubs and they are in the beginning of the stub table.
909 uint64_t align
= stub_template
->alignment();
910 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
911 stub
->set_offset(this->reloc_stubs_size_
);
912 this->reloc_stubs_size_
+= stub_template
->size();
913 this->reloc_stubs_addralign_
=
914 std::max(this->reloc_stubs_addralign_
, align
);
917 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
918 // The caller is responsible for avoiding addition if a STUB with the same
919 // address has already been added.
921 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
923 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
924 this->cortex_a8_stubs_
.insert(value
);
927 // Add an ARM V4BX relocation stub. A register index will be retrieved
930 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
932 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
933 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
936 // Remove all Cortex-A8 stubs.
938 remove_all_cortex_a8_stubs();
940 // Look up a relocation stub using KEY. Return NULL if there is none.
942 find_reloc_stub(const Reloc_stub::Key
& key
) const
944 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
945 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
948 // Look up an arm v4bx relocation stub using the register index.
949 // Return NULL if there is none.
951 find_arm_v4bx_stub(const uint32_t reg
) const
953 gold_assert(reg
< 0xf);
954 return this->arm_v4bx_stubs_
[reg
];
957 // Relocate stubs in this stub table.
959 relocate_stubs(const Relocate_info
<32, big_endian
>*,
960 Target_arm
<big_endian
>*, Output_section
*,
961 unsigned char*, Arm_address
, section_size_type
);
963 // Update data size and alignment at the end of a relaxation pass. Return
964 // true if either data size or alignment is different from that of the
965 // previous relaxation pass.
967 update_data_size_and_addralign();
969 // Finalize stubs. Set the offsets of all stubs and mark input sections
970 // needing the Cortex-A8 workaround.
974 // Apply Cortex-A8 workaround to an address range.
976 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
977 unsigned char*, Arm_address
,
981 // Write out section contents.
983 do_write(Output_file
*);
985 // Return the required alignment.
988 { return this->prev_addralign_
; }
990 // Reset address and file offset.
992 do_reset_address_and_file_offset()
993 { this->set_current_data_size_for_child(this->prev_data_size_
); }
995 // Set final data size.
997 set_final_data_size()
998 { this->set_data_size(this->current_data_size()); }
1001 // Relocate one stub.
1003 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1004 Target_arm
<big_endian
>*, Output_section
*,
1005 unsigned char*, Arm_address
, section_size_type
);
1007 // Unordered map of relocation stubs.
1009 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1010 Reloc_stub::Key::equal_to
>
1013 // List of Cortex-A8 stubs ordered by addresses of branches being
1014 // fixed up in output.
1015 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1016 // List of Arm V4BX relocation stubs ordered by associated registers.
1017 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1019 // Owner of this stub table.
1020 Arm_input_section
<big_endian
>* owner_
;
1021 // The relocation stubs.
1022 Reloc_stub_map reloc_stubs_
;
1023 // Size of reloc stubs.
1024 off_t reloc_stubs_size_
;
1025 // Maximum address alignment of reloc stubs.
1026 uint64_t reloc_stubs_addralign_
;
1027 // The cortex_a8_stubs.
1028 Cortex_a8_stub_list cortex_a8_stubs_
;
1029 // The Arm V4BX relocation stubs.
1030 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1031 // data size of this in the previous pass.
1032 off_t prev_data_size_
;
1033 // address alignment of this in the previous pass.
1034 uint64_t prev_addralign_
;
1037 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1038 // we add to the end of an EXIDX input section that goes into the output.
1040 class Arm_exidx_cantunwind
: public Output_section_data
1043 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1044 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1047 // Return the object containing the section pointed by this.
1050 { return this->relobj_
; }
1052 // Return the section index of the section pointed by this.
1055 { return this->shndx_
; }
1059 do_write(Output_file
* of
)
1061 if (parameters
->target().is_big_endian())
1062 this->do_fixed_endian_write
<true>(of
);
1064 this->do_fixed_endian_write
<false>(of
);
1067 // Write to a map file.
1069 do_print_to_mapfile(Mapfile
* mapfile
) const
1070 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1073 // Implement do_write for a given endianness.
1074 template<bool big_endian
>
1076 do_fixed_endian_write(Output_file
*);
1078 // The object containing the section pointed by this.
1080 // The section index of the section pointed by this.
1081 unsigned int shndx_
;
1084 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1085 // Offset map is used to map input section offset within the EXIDX section
1086 // to the output offset from the start of this EXIDX section.
1088 typedef std::map
<section_offset_type
, section_offset_type
>
1089 Arm_exidx_section_offset_map
;
1091 // Arm_exidx_merged_section class. This represents an EXIDX input section
1092 // with some of its entries merged.
1094 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1097 // Constructor for Arm_exidx_merged_section.
1098 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1099 // SECTION_OFFSET_MAP points to a section offset map describing how
1100 // parts of the input section are mapped to output. DELETED_BYTES is
1101 // the number of bytes deleted from the EXIDX input section.
1102 Arm_exidx_merged_section(
1103 const Arm_exidx_input_section
& exidx_input_section
,
1104 const Arm_exidx_section_offset_map
& section_offset_map
,
1105 uint32_t deleted_bytes
);
1107 // Build output contents.
1109 build_contents(const unsigned char*, section_size_type
);
1111 // Return the original EXIDX input section.
1112 const Arm_exidx_input_section
&
1113 exidx_input_section() const
1114 { return this->exidx_input_section_
; }
1116 // Return the section offset map.
1117 const Arm_exidx_section_offset_map
&
1118 section_offset_map() const
1119 { return this->section_offset_map_
; }
1122 // Write merged section into file OF.
1124 do_write(Output_file
* of
);
1127 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1128 section_offset_type
*) const;
1131 // Original EXIDX input section.
1132 const Arm_exidx_input_section
& exidx_input_section_
;
1133 // Section offset map.
1134 const Arm_exidx_section_offset_map
& section_offset_map_
;
1135 // Merged section contents. We need to keep build the merged section
1136 // and save it here to avoid accessing the original EXIDX section when
1137 // we cannot lock the sections' object.
1138 unsigned char* section_contents_
;
1141 // A class to wrap an ordinary input section containing executable code.
1143 template<bool big_endian
>
1144 class Arm_input_section
: public Output_relaxed_input_section
1147 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1148 : Output_relaxed_input_section(relobj
, shndx
, 1),
1149 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1150 original_contents_(NULL
)
1153 ~Arm_input_section()
1154 { delete[] this->original_contents_
; }
1160 // Whether this is a stub table owner.
1162 is_stub_table_owner() const
1163 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1165 // Return the stub table.
1166 Stub_table
<big_endian
>*
1168 { return this->stub_table_
; }
1170 // Set the stub_table.
1172 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1173 { this->stub_table_
= stub_table
; }
1175 // Downcast a base pointer to an Arm_input_section pointer. This is
1176 // not type-safe but we only use Arm_input_section not the base class.
1177 static Arm_input_section
<big_endian
>*
1178 as_arm_input_section(Output_relaxed_input_section
* poris
)
1179 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1181 // Return the original size of the section.
1183 original_size() const
1184 { return this->original_size_
; }
1187 // Write data to output file.
1189 do_write(Output_file
*);
1191 // Return required alignment of this.
1193 do_addralign() const
1195 if (this->is_stub_table_owner())
1196 return std::max(this->stub_table_
->addralign(),
1197 static_cast<uint64_t>(this->original_addralign_
));
1199 return this->original_addralign_
;
1202 // Finalize data size.
1204 set_final_data_size();
1206 // Reset address and file offset.
1208 do_reset_address_and_file_offset();
1212 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1213 section_offset_type offset
,
1214 section_offset_type
* poutput
) const
1216 if ((object
== this->relobj())
1217 && (shndx
== this->shndx())
1220 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1230 // Copying is not allowed.
1231 Arm_input_section(const Arm_input_section
&);
1232 Arm_input_section
& operator=(const Arm_input_section
&);
1234 // Address alignment of the original input section.
1235 uint32_t original_addralign_
;
1236 // Section size of the original input section.
1237 uint32_t original_size_
;
1239 Stub_table
<big_endian
>* stub_table_
;
1240 // Original section contents. We have to make a copy here since the file
1241 // containing the original section may not be locked when we need to access
1243 unsigned char* original_contents_
;
1246 // Arm_exidx_fixup class. This is used to define a number of methods
1247 // and keep states for fixing up EXIDX coverage.
1249 class Arm_exidx_fixup
1252 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1253 bool merge_exidx_entries
= true)
1254 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1255 last_inlined_entry_(0), last_input_section_(NULL
),
1256 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1257 merge_exidx_entries_(merge_exidx_entries
)
1261 { delete this->section_offset_map_
; }
1263 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1264 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1265 // number of bytes to be deleted in output. If parts of the input EXIDX
1266 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1267 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1268 // responsible for releasing it.
1269 template<bool big_endian
>
1271 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1272 const unsigned char* section_contents
,
1273 section_size_type section_size
,
1274 Arm_exidx_section_offset_map
** psection_offset_map
);
1276 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1277 // input section, if there is not one already.
1279 add_exidx_cantunwind_as_needed();
1281 // Return the output section for the text section which is linked to the
1282 // first exidx input in output.
1284 first_output_text_section() const
1285 { return this->first_output_text_section_
; }
1288 // Copying is not allowed.
1289 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1290 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1292 // Type of EXIDX unwind entry.
1297 // EXIDX_CANTUNWIND.
1298 UT_EXIDX_CANTUNWIND
,
1305 // Process an EXIDX entry. We only care about the second word of the
1306 // entry. Return true if the entry can be deleted.
1308 process_exidx_entry(uint32_t second_word
);
1310 // Update the current section offset map during EXIDX section fix-up.
1311 // If there is no map, create one. INPUT_OFFSET is the offset of a
1312 // reference point, DELETED_BYTES is the number of deleted by in the
1313 // section so far. If DELETE_ENTRY is true, the reference point and
1314 // all offsets after the previous reference point are discarded.
1316 update_offset_map(section_offset_type input_offset
,
1317 section_size_type deleted_bytes
, bool delete_entry
);
1319 // EXIDX output section.
1320 Output_section
* exidx_output_section_
;
1321 // Unwind type of the last EXIDX entry processed.
1322 Unwind_type last_unwind_type_
;
1323 // Last seen inlined EXIDX entry.
1324 uint32_t last_inlined_entry_
;
1325 // Last processed EXIDX input section.
1326 const Arm_exidx_input_section
* last_input_section_
;
1327 // Section offset map created in process_exidx_section.
1328 Arm_exidx_section_offset_map
* section_offset_map_
;
1329 // Output section for the text section which is linked to the first exidx
1331 Output_section
* first_output_text_section_
;
1333 bool merge_exidx_entries_
;
1336 // Arm output section class. This is defined mainly to add a number of
1337 // stub generation methods.
1339 template<bool big_endian
>
1340 class Arm_output_section
: public Output_section
1343 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1345 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1346 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1347 elfcpp::Elf_Xword flags
)
1348 : Output_section(name
, type
,
1349 (type
== elfcpp::SHT_ARM_EXIDX
1350 ? flags
| elfcpp::SHF_LINK_ORDER
1353 if (type
== elfcpp::SHT_ARM_EXIDX
)
1354 this->set_always_keeps_input_sections();
1357 ~Arm_output_section()
1360 // Group input sections for stub generation.
1362 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1364 // Downcast a base pointer to an Arm_output_section pointer. This is
1365 // not type-safe but we only use Arm_output_section not the base class.
1366 static Arm_output_section
<big_endian
>*
1367 as_arm_output_section(Output_section
* os
)
1368 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1370 // Append all input text sections in this into LIST.
1372 append_text_sections_to_list(Text_section_list
* list
);
1374 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1375 // is a list of text input sections sorted in ascending order of their
1376 // output addresses.
1378 fix_exidx_coverage(Layout
* layout
,
1379 const Text_section_list
& sorted_text_section
,
1380 Symbol_table
* symtab
,
1381 bool merge_exidx_entries
,
1384 // Link an EXIDX section into its corresponding text section.
1386 set_exidx_section_link();
1390 typedef Output_section::Input_section Input_section
;
1391 typedef Output_section::Input_section_list Input_section_list
;
1393 // Create a stub group.
1394 void create_stub_group(Input_section_list::const_iterator
,
1395 Input_section_list::const_iterator
,
1396 Input_section_list::const_iterator
,
1397 Target_arm
<big_endian
>*,
1398 std::vector
<Output_relaxed_input_section
*>*,
1402 // Arm_exidx_input_section class. This represents an EXIDX input section.
1404 class Arm_exidx_input_section
1407 static const section_offset_type invalid_offset
=
1408 static_cast<section_offset_type
>(-1);
1410 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1411 unsigned int link
, uint32_t size
,
1412 uint32_t addralign
, uint32_t text_size
)
1413 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1414 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1417 ~Arm_exidx_input_section()
1420 // Accessors: This is a read-only class.
1422 // Return the object containing this EXIDX input section.
1425 { return this->relobj_
; }
1427 // Return the section index of this EXIDX input section.
1430 { return this->shndx_
; }
1432 // Return the section index of linked text section in the same object.
1435 { return this->link_
; }
1437 // Return size of the EXIDX input section.
1440 { return this->size_
; }
1442 // Return address alignment of EXIDX input section.
1445 { return this->addralign_
; }
1447 // Return size of the associated text input section.
1450 { return this->text_size_
; }
1452 // Whether there are any errors in the EXIDX input section.
1455 { return this->has_errors_
; }
1457 // Set has-errors flag.
1460 { this->has_errors_
= true; }
1463 // Object containing this.
1465 // Section index of this.
1466 unsigned int shndx_
;
1467 // text section linked to this in the same object.
1469 // Size of this. For ARM 32-bit is sufficient.
1471 // Address alignment of this. For ARM 32-bit is sufficient.
1472 uint32_t addralign_
;
1473 // Size of associated text section.
1474 uint32_t text_size_
;
1475 // Whether this has any errors.
1479 // Arm_relobj class.
1481 template<bool big_endian
>
1482 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1485 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1487 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1488 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1489 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1490 stub_tables_(), local_symbol_is_thumb_function_(),
1491 attributes_section_data_(NULL
), mapping_symbols_info_(),
1492 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1493 output_local_symbol_count_needs_update_(false),
1494 merge_flags_and_attributes_(true)
1498 { delete this->attributes_section_data_
; }
1500 // Return the stub table of the SHNDX-th section if there is one.
1501 Stub_table
<big_endian
>*
1502 stub_table(unsigned int shndx
) const
1504 gold_assert(shndx
< this->stub_tables_
.size());
1505 return this->stub_tables_
[shndx
];
1508 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1510 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1512 gold_assert(shndx
< this->stub_tables_
.size());
1513 this->stub_tables_
[shndx
] = stub_table
;
1516 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1517 // index. This is only valid after do_count_local_symbol is called.
1519 local_symbol_is_thumb_function(unsigned int r_sym
) const
1521 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1522 return this->local_symbol_is_thumb_function_
[r_sym
];
1525 // Scan all relocation sections for stub generation.
1527 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1530 // Convert regular input section with index SHNDX to a relaxed section.
1532 convert_input_section_to_relaxed_section(unsigned shndx
)
1534 // The stubs have relocations and we need to process them after writing
1535 // out the stubs. So relocation now must follow section write.
1536 this->set_section_offset(shndx
, -1ULL);
1537 this->set_relocs_must_follow_section_writes();
1540 // Downcast a base pointer to an Arm_relobj pointer. This is
1541 // not type-safe but we only use Arm_relobj not the base class.
1542 static Arm_relobj
<big_endian
>*
1543 as_arm_relobj(Relobj
* relobj
)
1544 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1546 // Processor-specific flags in ELF file header. This is valid only after
1549 processor_specific_flags() const
1550 { return this->processor_specific_flags_
; }
1552 // Attribute section data This is the contents of the .ARM.attribute section
1554 const Attributes_section_data
*
1555 attributes_section_data() const
1556 { return this->attributes_section_data_
; }
1558 // Mapping symbol location.
1559 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1561 // Functor for STL container.
1562 struct Mapping_symbol_position_less
1565 operator()(const Mapping_symbol_position
& p1
,
1566 const Mapping_symbol_position
& p2
) const
1568 return (p1
.first
< p2
.first
1569 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1573 // We only care about the first character of a mapping symbol, so
1574 // we only store that instead of the whole symbol name.
1575 typedef std::map
<Mapping_symbol_position
, char,
1576 Mapping_symbol_position_less
> Mapping_symbols_info
;
1578 // Whether a section contains any Cortex-A8 workaround.
1580 section_has_cortex_a8_workaround(unsigned int shndx
) const
1582 return (this->section_has_cortex_a8_workaround_
!= NULL
1583 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1586 // Mark a section that has Cortex-A8 workaround.
1588 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1590 if (this->section_has_cortex_a8_workaround_
== NULL
)
1591 this->section_has_cortex_a8_workaround_
=
1592 new std::vector
<bool>(this->shnum(), false);
1593 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1596 // Return the EXIDX section of an text section with index SHNDX or NULL
1597 // if the text section has no associated EXIDX section.
1598 const Arm_exidx_input_section
*
1599 exidx_input_section_by_link(unsigned int shndx
) const
1601 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1602 return ((p
!= this->exidx_section_map_
.end()
1603 && p
->second
->link() == shndx
)
1608 // Return the EXIDX section with index SHNDX or NULL if there is none.
1609 const Arm_exidx_input_section
*
1610 exidx_input_section_by_shndx(unsigned shndx
) const
1612 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1613 return ((p
!= this->exidx_section_map_
.end()
1614 && p
->second
->shndx() == shndx
)
1619 // Whether output local symbol count needs updating.
1621 output_local_symbol_count_needs_update() const
1622 { return this->output_local_symbol_count_needs_update_
; }
1624 // Set output_local_symbol_count_needs_update flag to be true.
1626 set_output_local_symbol_count_needs_update()
1627 { this->output_local_symbol_count_needs_update_
= true; }
1629 // Update output local symbol count at the end of relaxation.
1631 update_output_local_symbol_count();
1633 // Whether we want to merge processor-specific flags and attributes.
1635 merge_flags_and_attributes() const
1636 { return this->merge_flags_and_attributes_
; }
1638 // Export list of EXIDX section indices.
1640 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1643 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1644 p
!= this->exidx_section_map_
.end();
1647 if (p
->second
->shndx() == p
->first
)
1648 list
->push_back(p
->first
);
1650 // Sort list to make result independent of implementation of map.
1651 std::sort(list
->begin(), list
->end());
1655 // Post constructor setup.
1659 // Call parent's setup method.
1660 Sized_relobj_file
<32, big_endian
>::do_setup();
1662 // Initialize look-up tables.
1663 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1664 this->stub_tables_
.swap(empty_stub_table_list
);
1667 // Count the local symbols.
1669 do_count_local_symbols(Stringpool_template
<char>*,
1670 Stringpool_template
<char>*);
1673 do_relocate_sections(
1674 const Symbol_table
* symtab
, const Layout
* layout
,
1675 const unsigned char* pshdrs
, Output_file
* of
,
1676 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1678 // Read the symbol information.
1680 do_read_symbols(Read_symbols_data
* sd
);
1682 // Process relocs for garbage collection.
1684 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1688 // Whether a section needs to be scanned for relocation stubs.
1690 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1691 const Relobj::Output_sections
&,
1692 const Symbol_table
*, const unsigned char*);
1694 // Whether a section is a scannable text section.
1696 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1697 const Output_section
*, const Symbol_table
*);
1699 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1701 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1702 unsigned int, Output_section
*,
1703 const Symbol_table
*);
1705 // Scan a section for the Cortex-A8 erratum.
1707 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1708 unsigned int, Output_section
*,
1709 Target_arm
<big_endian
>*);
1711 // Find the linked text section of an EXIDX section by looking at the
1712 // first relocation of the EXIDX section. PSHDR points to the section
1713 // headers of a relocation section and PSYMS points to the local symbols.
1714 // PSHNDX points to a location storing the text section index if found.
1715 // Return whether we can find the linked section.
1717 find_linked_text_section(const unsigned char* pshdr
,
1718 const unsigned char* psyms
, unsigned int* pshndx
);
1721 // Make a new Arm_exidx_input_section object for EXIDX section with
1722 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1723 // index of the linked text section.
1725 make_exidx_input_section(unsigned int shndx
,
1726 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1727 unsigned int text_shndx
,
1728 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1730 // Return the output address of either a plain input section or a
1731 // relaxed input section. SHNDX is the section index.
1733 simple_input_section_output_address(unsigned int, Output_section
*);
1735 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1736 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1739 // List of stub tables.
1740 Stub_table_list stub_tables_
;
1741 // Bit vector to tell if a local symbol is a thumb function or not.
1742 // This is only valid after do_count_local_symbol is called.
1743 std::vector
<bool> local_symbol_is_thumb_function_
;
1744 // processor-specific flags in ELF file header.
1745 elfcpp::Elf_Word processor_specific_flags_
;
1746 // Object attributes if there is an .ARM.attributes section or NULL.
1747 Attributes_section_data
* attributes_section_data_
;
1748 // Mapping symbols information.
1749 Mapping_symbols_info mapping_symbols_info_
;
1750 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1751 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1752 // Map a text section to its associated .ARM.exidx section, if there is one.
1753 Exidx_section_map exidx_section_map_
;
1754 // Whether output local symbol count needs updating.
1755 bool output_local_symbol_count_needs_update_
;
1756 // Whether we merge processor flags and attributes of this object to
1758 bool merge_flags_and_attributes_
;
1761 // Arm_dynobj class.
1763 template<bool big_endian
>
1764 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1767 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1768 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1769 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1770 processor_specific_flags_(0), attributes_section_data_(NULL
)
1774 { delete this->attributes_section_data_
; }
1776 // Downcast a base pointer to an Arm_relobj pointer. This is
1777 // not type-safe but we only use Arm_relobj not the base class.
1778 static Arm_dynobj
<big_endian
>*
1779 as_arm_dynobj(Dynobj
* dynobj
)
1780 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1782 // Processor-specific flags in ELF file header. This is valid only after
1785 processor_specific_flags() const
1786 { return this->processor_specific_flags_
; }
1788 // Attributes section data.
1789 const Attributes_section_data
*
1790 attributes_section_data() const
1791 { return this->attributes_section_data_
; }
1794 // Read the symbol information.
1796 do_read_symbols(Read_symbols_data
* sd
);
1799 // processor-specific flags in ELF file header.
1800 elfcpp::Elf_Word processor_specific_flags_
;
1801 // Object attributes if there is an .ARM.attributes section or NULL.
1802 Attributes_section_data
* attributes_section_data_
;
1805 // Functor to read reloc addends during stub generation.
1807 template<int sh_type
, bool big_endian
>
1808 struct Stub_addend_reader
1810 // Return the addend for a relocation of a particular type. Depending
1811 // on whether this is a REL or RELA relocation, read the addend from a
1812 // view or from a Reloc object.
1813 elfcpp::Elf_types
<32>::Elf_Swxword
1815 unsigned int /* r_type */,
1816 const unsigned char* /* view */,
1817 const typename Reloc_types
<sh_type
,
1818 32, big_endian
>::Reloc
& /* reloc */) const;
1821 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1823 template<bool big_endian
>
1824 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1826 elfcpp::Elf_types
<32>::Elf_Swxword
1829 const unsigned char*,
1830 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1833 // Specialized Stub_addend_reader for RELA type relocation sections.
1834 // We currently do not handle RELA type relocation sections but it is trivial
1835 // to implement the addend reader. This is provided for completeness and to
1836 // make it easier to add support for RELA relocation sections in the future.
1838 template<bool big_endian
>
1839 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1841 elfcpp::Elf_types
<32>::Elf_Swxword
1844 const unsigned char*,
1845 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1846 big_endian
>::Reloc
& reloc
) const
1847 { return reloc
.get_r_addend(); }
1850 // Cortex_a8_reloc class. We keep record of relocation that may need
1851 // the Cortex-A8 erratum workaround.
1853 class Cortex_a8_reloc
1856 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1857 Arm_address destination
)
1858 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1864 // Accessors: This is a read-only class.
1866 // Return the relocation stub associated with this relocation if there is
1870 { return this->reloc_stub_
; }
1872 // Return the relocation type.
1875 { return this->r_type_
; }
1877 // Return the destination address of the relocation. LSB stores the THUMB
1881 { return this->destination_
; }
1884 // Associated relocation stub if there is one, or NULL.
1885 const Reloc_stub
* reloc_stub_
;
1887 unsigned int r_type_
;
1888 // Destination address of this relocation. LSB is used to distinguish
1890 Arm_address destination_
;
1893 // Arm_output_data_got class. We derive this from Output_data_got to add
1894 // extra methods to handle TLS relocations in a static link.
1896 template<bool big_endian
>
1897 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1900 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1901 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1904 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1905 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1906 // applied in a static link.
1908 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1909 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1911 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1912 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1913 // relocation that needs to be applied in a static link.
1915 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1916 Sized_relobj_file
<32, big_endian
>* relobj
,
1919 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1923 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1924 // The first one is initialized to be 1, which is the module index for
1925 // the main executable and the second one 0. A reloc of the type
1926 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1927 // be applied by gold. GSYM is a global symbol.
1929 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1931 // Same as the above but for a local symbol in OBJECT with INDEX.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1934 Sized_relobj_file
<32, big_endian
>* object
,
1935 unsigned int index
);
1938 // Write out the GOT table.
1940 do_write(Output_file
*);
1943 // This class represent dynamic relocations that need to be applied by
1944 // gold because we are using TLS relocations in a static link.
1948 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1949 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1950 { this->u_
.global
.symbol
= gsym
; }
1952 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1953 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1954 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1956 this->u_
.local
.relobj
= relobj
;
1957 this->u_
.local
.index
= index
;
1960 // Return the GOT offset.
1963 { return this->got_offset_
; }
1968 { return this->r_type_
; }
1970 // Whether the symbol is global or not.
1972 symbol_is_global() const
1973 { return this->symbol_is_global_
; }
1975 // For a relocation against a global symbol, the global symbol.
1979 gold_assert(this->symbol_is_global_
);
1980 return this->u_
.global
.symbol
;
1983 // For a relocation against a local symbol, the defining object.
1984 Sized_relobj_file
<32, big_endian
>*
1987 gold_assert(!this->symbol_is_global_
);
1988 return this->u_
.local
.relobj
;
1991 // For a relocation against a local symbol, the local symbol index.
1995 gold_assert(!this->symbol_is_global_
);
1996 return this->u_
.local
.index
;
2000 // GOT offset of the entry to which this relocation is applied.
2001 unsigned int got_offset_
;
2002 // Type of relocation.
2003 unsigned int r_type_
;
2004 // Whether this relocation is against a global symbol.
2005 bool symbol_is_global_
;
2006 // A global or local symbol.
2011 // For a global symbol, the symbol itself.
2016 // For a local symbol, the object defining object.
2017 Sized_relobj_file
<32, big_endian
>* relobj
;
2018 // For a local symbol, the symbol index.
2024 // Symbol table of the output object.
2025 Symbol_table
* symbol_table_
;
2026 // Layout of the output object.
2028 // Static relocs to be applied to the GOT.
2029 std::vector
<Static_reloc
> static_relocs_
;
2032 // The ARM target has many relocation types with odd-sizes or noncontiguous
2033 // bits. The default handling of relocatable relocation cannot process these
2034 // relocations. So we have to extend the default code.
2036 template<bool big_endian
, int sh_type
, typename Classify_reloc
>
2037 class Arm_scan_relocatable_relocs
:
2038 public Default_scan_relocatable_relocs
<sh_type
, Classify_reloc
>
2041 // Return the strategy to use for a local symbol which is a section
2042 // symbol, given the relocation type.
2043 inline Relocatable_relocs::Reloc_strategy
2044 local_section_strategy(unsigned int r_type
, Relobj
*)
2046 if (sh_type
== elfcpp::SHT_RELA
)
2047 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2050 if (r_type
== elfcpp::R_ARM_TARGET1
2051 || r_type
== elfcpp::R_ARM_TARGET2
)
2053 const Target_arm
<big_endian
>* arm_target
=
2054 Target_arm
<big_endian
>::default_target();
2055 r_type
= arm_target
->get_real_reloc_type(r_type
);
2060 // Relocations that write nothing. These exclude R_ARM_TARGET1
2061 // and R_ARM_TARGET2.
2062 case elfcpp::R_ARM_NONE
:
2063 case elfcpp::R_ARM_V4BX
:
2064 case elfcpp::R_ARM_TLS_GOTDESC
:
2065 case elfcpp::R_ARM_TLS_CALL
:
2066 case elfcpp::R_ARM_TLS_DESCSEQ
:
2067 case elfcpp::R_ARM_THM_TLS_CALL
:
2068 case elfcpp::R_ARM_GOTRELAX
:
2069 case elfcpp::R_ARM_GNU_VTENTRY
:
2070 case elfcpp::R_ARM_GNU_VTINHERIT
:
2071 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2072 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2073 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2074 // These should have been converted to something else above.
2075 case elfcpp::R_ARM_TARGET1
:
2076 case elfcpp::R_ARM_TARGET2
:
2078 // Relocations that write full 32 bits and
2079 // have alignment of 1.
2080 case elfcpp::R_ARM_ABS32
:
2081 case elfcpp::R_ARM_REL32
:
2082 case elfcpp::R_ARM_SBREL32
:
2083 case elfcpp::R_ARM_GOTOFF32
:
2084 case elfcpp::R_ARM_BASE_PREL
:
2085 case elfcpp::R_ARM_GOT_BREL
:
2086 case elfcpp::R_ARM_BASE_ABS
:
2087 case elfcpp::R_ARM_ABS32_NOI
:
2088 case elfcpp::R_ARM_REL32_NOI
:
2089 case elfcpp::R_ARM_PLT32_ABS
:
2090 case elfcpp::R_ARM_GOT_ABS
:
2091 case elfcpp::R_ARM_GOT_PREL
:
2092 case elfcpp::R_ARM_TLS_GD32
:
2093 case elfcpp::R_ARM_TLS_LDM32
:
2094 case elfcpp::R_ARM_TLS_LDO32
:
2095 case elfcpp::R_ARM_TLS_IE32
:
2096 case elfcpp::R_ARM_TLS_LE32
:
2097 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED
;
2099 // For all other static relocations, return RELOC_SPECIAL.
2100 return Relocatable_relocs::RELOC_SPECIAL
;
2106 template<bool big_endian
>
2107 class Target_arm
: public Sized_target
<32, big_endian
>
2110 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2113 // When were are relocating a stub, we pass this as the relocation number.
2114 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2117 : Sized_target
<32, big_endian
>(&arm_info
),
2118 got_(NULL
), plt_(NULL
), got_plt_(NULL
), rel_dyn_(NULL
),
2119 copy_relocs_(elfcpp::R_ARM_COPY
), dynbss_(NULL
),
2120 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2121 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2122 should_force_pic_veneer_(false),
2123 arm_input_section_map_(), attributes_section_data_(NULL
),
2124 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2127 // Whether we force PCI branch veneers.
2129 should_force_pic_veneer() const
2130 { return this->should_force_pic_veneer_
; }
2132 // Set PIC veneer flag.
2134 set_should_force_pic_veneer(bool value
)
2135 { this->should_force_pic_veneer_
= value
; }
2137 // Whether we use THUMB-2 instructions.
2139 using_thumb2() const
2141 Object_attribute
* attr
=
2142 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2143 int arch
= attr
->int_value();
2144 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2147 // Whether we use THUMB/THUMB-2 instructions only.
2149 using_thumb_only() const
2151 Object_attribute
* attr
=
2152 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2154 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2155 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2157 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2158 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2160 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2161 return attr
->int_value() == 'M';
2164 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2166 may_use_arm_nop() const
2168 Object_attribute
* attr
=
2169 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2170 int arch
= attr
->int_value();
2171 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2172 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2173 || arch
== elfcpp::TAG_CPU_ARCH_V7
2174 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2177 // Whether we have THUMB-2 NOP.W instruction.
2179 may_use_thumb2_nop() const
2181 Object_attribute
* attr
=
2182 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2183 int arch
= attr
->int_value();
2184 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2185 || arch
== elfcpp::TAG_CPU_ARCH_V7
2186 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2189 // Whether we have v4T interworking instructions available.
2191 may_use_v4t_interworking() const
2193 Object_attribute
* attr
=
2194 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2195 int arch
= attr
->int_value();
2196 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2197 && arch
!= elfcpp::TAG_CPU_ARCH_V4
);
2200 // Whether we have v5T interworking instructions available.
2202 may_use_v5t_interworking() const
2204 Object_attribute
* attr
=
2205 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2206 int arch
= attr
->int_value();
2207 if (parameters
->options().fix_arm1176())
2208 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2209 || arch
== elfcpp::TAG_CPU_ARCH_V7
2210 || arch
== elfcpp::TAG_CPU_ARCH_V6_M
2211 || arch
== elfcpp::TAG_CPU_ARCH_V6S_M
2212 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2214 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2215 && arch
!= elfcpp::TAG_CPU_ARCH_V4
2216 && arch
!= elfcpp::TAG_CPU_ARCH_V4T
);
2219 // Process the relocations to determine unreferenced sections for
2220 // garbage collection.
2222 gc_process_relocs(Symbol_table
* symtab
,
2224 Sized_relobj_file
<32, big_endian
>* object
,
2225 unsigned int data_shndx
,
2226 unsigned int sh_type
,
2227 const unsigned char* prelocs
,
2229 Output_section
* output_section
,
2230 bool needs_special_offset_handling
,
2231 size_t local_symbol_count
,
2232 const unsigned char* plocal_symbols
);
2234 // Scan the relocations to look for symbol adjustments.
2236 scan_relocs(Symbol_table
* symtab
,
2238 Sized_relobj_file
<32, big_endian
>* object
,
2239 unsigned int data_shndx
,
2240 unsigned int sh_type
,
2241 const unsigned char* prelocs
,
2243 Output_section
* output_section
,
2244 bool needs_special_offset_handling
,
2245 size_t local_symbol_count
,
2246 const unsigned char* plocal_symbols
);
2248 // Finalize the sections.
2250 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2252 // Return the value to use for a dynamic symbol which requires special
2255 do_dynsym_value(const Symbol
*) const;
2257 // Relocate a section.
2259 relocate_section(const Relocate_info
<32, big_endian
>*,
2260 unsigned int sh_type
,
2261 const unsigned char* prelocs
,
2263 Output_section
* output_section
,
2264 bool needs_special_offset_handling
,
2265 unsigned char* view
,
2266 Arm_address view_address
,
2267 section_size_type view_size
,
2268 const Reloc_symbol_changes
*);
2270 // Scan the relocs during a relocatable link.
2272 scan_relocatable_relocs(Symbol_table
* symtab
,
2274 Sized_relobj_file
<32, big_endian
>* object
,
2275 unsigned int data_shndx
,
2276 unsigned int sh_type
,
2277 const unsigned char* prelocs
,
2279 Output_section
* output_section
,
2280 bool needs_special_offset_handling
,
2281 size_t local_symbol_count
,
2282 const unsigned char* plocal_symbols
,
2283 Relocatable_relocs
*);
2285 // Relocate a section during a relocatable link.
2287 relocate_for_relocatable(const Relocate_info
<32, big_endian
>*,
2288 unsigned int sh_type
,
2289 const unsigned char* prelocs
,
2291 Output_section
* output_section
,
2292 off_t offset_in_output_section
,
2293 const Relocatable_relocs
*,
2294 unsigned char* view
,
2295 Arm_address view_address
,
2296 section_size_type view_size
,
2297 unsigned char* reloc_view
,
2298 section_size_type reloc_view_size
);
2300 // Perform target-specific processing in a relocatable link. This is
2301 // only used if we use the relocation strategy RELOC_SPECIAL.
2303 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2304 unsigned int sh_type
,
2305 const unsigned char* preloc_in
,
2307 Output_section
* output_section
,
2308 off_t offset_in_output_section
,
2309 unsigned char* view
,
2310 typename
elfcpp::Elf_types
<32>::Elf_Addr
2312 section_size_type view_size
,
2313 unsigned char* preloc_out
);
2315 // Return whether SYM is defined by the ABI.
2317 do_is_defined_by_abi(Symbol
* sym
) const
2318 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2320 // Return whether there is a GOT section.
2322 has_got_section() const
2323 { return this->got_
!= NULL
; }
2325 // Return the size of the GOT section.
2329 gold_assert(this->got_
!= NULL
);
2330 return this->got_
->data_size();
2333 // Return the number of entries in the GOT.
2335 got_entry_count() const
2337 if (!this->has_got_section())
2339 return this->got_size() / 4;
2342 // Return the number of entries in the PLT.
2344 plt_entry_count() const;
2346 // Return the offset of the first non-reserved PLT entry.
2348 first_plt_entry_offset() const;
2350 // Return the size of each PLT entry.
2352 plt_entry_size() const;
2354 // Map platform-specific reloc types
2356 get_real_reloc_type(unsigned int r_type
);
2359 // Methods to support stub-generations.
2362 // Return the stub factory
2364 stub_factory() const
2365 { return this->stub_factory_
; }
2367 // Make a new Arm_input_section object.
2368 Arm_input_section
<big_endian
>*
2369 new_arm_input_section(Relobj
*, unsigned int);
2371 // Find the Arm_input_section object corresponding to the SHNDX-th input
2372 // section of RELOBJ.
2373 Arm_input_section
<big_endian
>*
2374 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2376 // Make a new Stub_table
2377 Stub_table
<big_endian
>*
2378 new_stub_table(Arm_input_section
<big_endian
>*);
2380 // Scan a section for stub generation.
2382 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2383 const unsigned char*, size_t, Output_section
*,
2384 bool, const unsigned char*, Arm_address
,
2389 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2390 Output_section
*, unsigned char*, Arm_address
,
2393 // Get the default ARM target.
2394 static Target_arm
<big_endian
>*
2397 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2398 && parameters
->target().is_big_endian() == big_endian
);
2399 return static_cast<Target_arm
<big_endian
>*>(
2400 parameters
->sized_target
<32, big_endian
>());
2403 // Whether NAME belongs to a mapping symbol.
2405 is_mapping_symbol_name(const char* name
)
2409 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2410 && (name
[2] == '\0' || name
[2] == '.'));
2413 // Whether we work around the Cortex-A8 erratum.
2415 fix_cortex_a8() const
2416 { return this->fix_cortex_a8_
; }
2418 // Whether we merge exidx entries in debuginfo.
2420 merge_exidx_entries() const
2421 { return parameters
->options().merge_exidx_entries(); }
2423 // Whether we fix R_ARM_V4BX relocation.
2425 // 1 - replace with MOV instruction (armv4 target)
2426 // 2 - make interworking veneer (>= armv4t targets only)
2427 General_options::Fix_v4bx
2429 { return parameters
->options().fix_v4bx(); }
2431 // Scan a span of THUMB code section for Cortex-A8 erratum.
2433 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2434 section_size_type
, section_size_type
,
2435 const unsigned char*, Arm_address
);
2437 // Apply Cortex-A8 workaround to a branch.
2439 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2440 unsigned char*, Arm_address
);
2443 // Make an ELF object.
2445 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2446 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2449 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2450 const elfcpp::Ehdr
<32, !big_endian
>&)
2451 { gold_unreachable(); }
2454 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2455 const elfcpp::Ehdr
<64, false>&)
2456 { gold_unreachable(); }
2459 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2460 const elfcpp::Ehdr
<64, true>&)
2461 { gold_unreachable(); }
2463 // Make an output section.
2465 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2466 elfcpp::Elf_Xword flags
)
2467 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2470 do_adjust_elf_header(unsigned char* view
, int len
) const;
2472 // We only need to generate stubs, and hence perform relaxation if we are
2473 // not doing relocatable linking.
2475 do_may_relax() const
2476 { return !parameters
->options().relocatable(); }
2479 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2481 // Determine whether an object attribute tag takes an integer, a
2484 do_attribute_arg_type(int tag
) const;
2486 // Reorder tags during output.
2488 do_attributes_order(int num
) const;
2490 // This is called when the target is selected as the default.
2492 do_select_as_default_target()
2494 // No locking is required since there should only be one default target.
2495 // We cannot have both the big-endian and little-endian ARM targets
2497 gold_assert(arm_reloc_property_table
== NULL
);
2498 arm_reloc_property_table
= new Arm_reloc_property_table();
2501 // Virtual function which is set to return true by a target if
2502 // it can use relocation types to determine if a function's
2503 // pointer is taken.
2505 do_can_check_for_function_pointers() const
2508 // Whether a section called SECTION_NAME may have function pointers to
2509 // sections not eligible for safe ICF folding.
2511 do_section_may_have_icf_unsafe_pointers(const char* section_name
) const
2513 return (!is_prefix_of(".ARM.exidx", section_name
)
2514 && !is_prefix_of(".ARM.extab", section_name
)
2515 && Target::do_section_may_have_icf_unsafe_pointers(section_name
));
2519 // The class which scans relocations.
2524 : issued_non_pic_error_(false)
2528 get_reference_flags(unsigned int r_type
);
2531 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2532 Sized_relobj_file
<32, big_endian
>* object
,
2533 unsigned int data_shndx
,
2534 Output_section
* output_section
,
2535 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2536 const elfcpp::Sym
<32, big_endian
>& lsym
);
2539 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2540 Sized_relobj_file
<32, big_endian
>* object
,
2541 unsigned int data_shndx
,
2542 Output_section
* output_section
,
2543 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2547 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2548 Sized_relobj_file
<32, big_endian
>* ,
2551 const elfcpp::Rel
<32, big_endian
>& ,
2553 const elfcpp::Sym
<32, big_endian
>&);
2556 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2557 Sized_relobj_file
<32, big_endian
>* ,
2560 const elfcpp::Rel
<32, big_endian
>& ,
2561 unsigned int , Symbol
*);
2565 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2566 unsigned int r_type
);
2569 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2570 unsigned int r_type
, Symbol
*);
2573 check_non_pic(Relobj
*, unsigned int r_type
);
2575 // Almost identical to Symbol::needs_plt_entry except that it also
2576 // handles STT_ARM_TFUNC.
2578 symbol_needs_plt_entry(const Symbol
* sym
)
2580 // An undefined symbol from an executable does not need a PLT entry.
2581 if (sym
->is_undefined() && !parameters
->options().shared())
2584 return (!parameters
->doing_static_link()
2585 && (sym
->type() == elfcpp::STT_FUNC
2586 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2587 && (sym
->is_from_dynobj()
2588 || sym
->is_undefined()
2589 || sym
->is_preemptible()));
2593 possible_function_pointer_reloc(unsigned int r_type
);
2595 // Whether we have issued an error about a non-PIC compilation.
2596 bool issued_non_pic_error_
;
2599 // The class which implements relocation.
2609 // Return whether the static relocation needs to be applied.
2611 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2612 unsigned int r_type
,
2614 Output_section
* output_section
);
2616 // Do a relocation. Return false if the caller should not issue
2617 // any warnings about this relocation.
2619 relocate(const Relocate_info
<32, big_endian
>*, Target_arm
*,
2620 Output_section
*, size_t relnum
,
2621 const elfcpp::Rel
<32, big_endian
>&,
2622 unsigned int r_type
, const Sized_symbol
<32>*,
2623 const Symbol_value
<32>*,
2624 unsigned char*, Arm_address
,
2627 // Return whether we want to pass flag NON_PIC_REF for this
2628 // reloc. This means the relocation type accesses a symbol not via
2631 reloc_is_non_pic(unsigned int r_type
)
2635 // These relocation types reference GOT or PLT entries explicitly.
2636 case elfcpp::R_ARM_GOT_BREL
:
2637 case elfcpp::R_ARM_GOT_ABS
:
2638 case elfcpp::R_ARM_GOT_PREL
:
2639 case elfcpp::R_ARM_GOT_BREL12
:
2640 case elfcpp::R_ARM_PLT32_ABS
:
2641 case elfcpp::R_ARM_TLS_GD32
:
2642 case elfcpp::R_ARM_TLS_LDM32
:
2643 case elfcpp::R_ARM_TLS_IE32
:
2644 case elfcpp::R_ARM_TLS_IE12GP
:
2646 // These relocate types may use PLT entries.
2647 case elfcpp::R_ARM_CALL
:
2648 case elfcpp::R_ARM_THM_CALL
:
2649 case elfcpp::R_ARM_JUMP24
:
2650 case elfcpp::R_ARM_THM_JUMP24
:
2651 case elfcpp::R_ARM_THM_JUMP19
:
2652 case elfcpp::R_ARM_PLT32
:
2653 case elfcpp::R_ARM_THM_XPC22
:
2654 case elfcpp::R_ARM_PREL31
:
2655 case elfcpp::R_ARM_SBREL31
:
2664 // Do a TLS relocation.
2665 inline typename Arm_relocate_functions
<big_endian
>::Status
2666 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2667 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2668 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2669 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2674 // A class which returns the size required for a relocation type,
2675 // used while scanning relocs during a relocatable link.
2676 class Relocatable_size_for_reloc
2680 get_size_for_reloc(unsigned int, Relobj
*);
2683 // Adjust TLS relocation type based on the options and whether this
2684 // is a local symbol.
2685 static tls::Tls_optimization
2686 optimize_tls_reloc(bool is_final
, int r_type
);
2688 // Get the GOT section, creating it if necessary.
2689 Arm_output_data_got
<big_endian
>*
2690 got_section(Symbol_table
*, Layout
*);
2692 // Get the GOT PLT section.
2694 got_plt_section() const
2696 gold_assert(this->got_plt_
!= NULL
);
2697 return this->got_plt_
;
2700 // Create a PLT entry for a global symbol.
2702 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2704 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2706 define_tls_base_symbol(Symbol_table
*, Layout
*);
2708 // Create a GOT entry for the TLS module index.
2710 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2711 Sized_relobj_file
<32, big_endian
>* object
);
2713 // Get the PLT section.
2714 const Output_data_plt_arm
<big_endian
>*
2717 gold_assert(this->plt_
!= NULL
);
2721 // Get the dynamic reloc section, creating it if necessary.
2723 rel_dyn_section(Layout
*);
2725 // Get the section to use for TLS_DESC relocations.
2727 rel_tls_desc_section(Layout
*) const;
2729 // Return true if the symbol may need a COPY relocation.
2730 // References from an executable object to non-function symbols
2731 // defined in a dynamic object may need a COPY relocation.
2733 may_need_copy_reloc(Symbol
* gsym
)
2735 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2736 && gsym
->may_need_copy_reloc());
2739 // Add a potential copy relocation.
2741 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2742 Sized_relobj_file
<32, big_endian
>* object
,
2743 unsigned int shndx
, Output_section
* output_section
,
2744 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2746 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2747 symtab
->get_sized_symbol
<32>(sym
),
2748 object
, shndx
, output_section
, reloc
,
2749 this->rel_dyn_section(layout
));
2752 // Whether two EABI versions are compatible.
2754 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2756 // Merge processor-specific flags from input object and those in the ELF
2757 // header of the output.
2759 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2761 // Get the secondary compatible architecture.
2763 get_secondary_compatible_arch(const Attributes_section_data
*);
2765 // Set the secondary compatible architecture.
2767 set_secondary_compatible_arch(Attributes_section_data
*, int);
2770 tag_cpu_arch_combine(const char*, int, int*, int, int);
2772 // Helper to print AEABI enum tag value.
2774 aeabi_enum_name(unsigned int);
2776 // Return string value for TAG_CPU_name.
2778 tag_cpu_name_value(unsigned int);
2780 // Merge object attributes from input object and those in the output.
2782 merge_object_attributes(const char*, const Attributes_section_data
*);
2784 // Helper to get an AEABI object attribute
2786 get_aeabi_object_attribute(int tag
) const
2788 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2789 gold_assert(pasd
!= NULL
);
2790 Object_attribute
* attr
=
2791 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2792 gold_assert(attr
!= NULL
);
2797 // Methods to support stub-generations.
2800 // Group input sections for stub generation.
2802 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2804 // Scan a relocation for stub generation.
2806 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2807 const Sized_symbol
<32>*, unsigned int,
2808 const Symbol_value
<32>*,
2809 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2811 // Scan a relocation section for stub.
2812 template<int sh_type
>
2814 scan_reloc_section_for_stubs(
2815 const Relocate_info
<32, big_endian
>* relinfo
,
2816 const unsigned char* prelocs
,
2818 Output_section
* output_section
,
2819 bool needs_special_offset_handling
,
2820 const unsigned char* view
,
2821 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2824 // Fix .ARM.exidx section coverage.
2826 fix_exidx_coverage(Layout
*, const Input_objects
*,
2827 Arm_output_section
<big_endian
>*, Symbol_table
*,
2830 // Functors for STL set.
2831 struct output_section_address_less_than
2834 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2835 { return s1
->address() < s2
->address(); }
2838 // Information about this specific target which we pass to the
2839 // general Target structure.
2840 static const Target::Target_info arm_info
;
2842 // The types of GOT entries needed for this platform.
2843 // These values are exposed to the ABI in an incremental link.
2844 // Do not renumber existing values without changing the version
2845 // number of the .gnu_incremental_inputs section.
2848 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2849 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2850 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2851 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2852 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2855 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2857 // Map input section to Arm_input_section.
2858 typedef Unordered_map
<Section_id
,
2859 Arm_input_section
<big_endian
>*,
2861 Arm_input_section_map
;
2863 // Map output addresses to relocs for Cortex-A8 erratum.
2864 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2865 Cortex_a8_relocs_info
;
2868 Arm_output_data_got
<big_endian
>* got_
;
2870 Output_data_plt_arm
<big_endian
>* plt_
;
2871 // The GOT PLT section.
2872 Output_data_space
* got_plt_
;
2873 // The dynamic reloc section.
2874 Reloc_section
* rel_dyn_
;
2875 // Relocs saved to avoid a COPY reloc.
2876 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2877 // Space for variables copied with a COPY reloc.
2878 Output_data_space
* dynbss_
;
2879 // Offset of the GOT entry for the TLS module index.
2880 unsigned int got_mod_index_offset_
;
2881 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2882 bool tls_base_symbol_defined_
;
2883 // Vector of Stub_tables created.
2884 Stub_table_list stub_tables_
;
2886 const Stub_factory
&stub_factory_
;
2887 // Whether we force PIC branch veneers.
2888 bool should_force_pic_veneer_
;
2889 // Map for locating Arm_input_sections.
2890 Arm_input_section_map arm_input_section_map_
;
2891 // Attributes section data in output.
2892 Attributes_section_data
* attributes_section_data_
;
2893 // Whether we want to fix code for Cortex-A8 erratum.
2894 bool fix_cortex_a8_
;
2895 // Map addresses to relocs for Cortex-A8 erratum.
2896 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2899 template<bool big_endian
>
2900 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2903 big_endian
, // is_big_endian
2904 elfcpp::EM_ARM
, // machine_code
2905 false, // has_make_symbol
2906 false, // has_resolve
2907 false, // has_code_fill
2908 true, // is_default_stack_executable
2909 false, // can_icf_inline_merge_sections
2911 "/usr/lib/libc.so.1", // dynamic_linker
2912 0x8000, // default_text_segment_address
2913 0x1000, // abi_pagesize (overridable by -z max-page-size)
2914 0x1000, // common_pagesize (overridable by -z common-page-size)
2915 elfcpp::SHN_UNDEF
, // small_common_shndx
2916 elfcpp::SHN_UNDEF
, // large_common_shndx
2917 0, // small_common_section_flags
2918 0, // large_common_section_flags
2919 ".ARM.attributes", // attributes_section
2920 "aeabi" // attributes_vendor
2923 // Arm relocate functions class
2926 template<bool big_endian
>
2927 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
2932 STATUS_OKAY
, // No error during relocation.
2933 STATUS_OVERFLOW
, // Relocation overflow.
2934 STATUS_BAD_RELOC
// Relocation cannot be applied.
2938 typedef Relocate_functions
<32, big_endian
> Base
;
2939 typedef Arm_relocate_functions
<big_endian
> This
;
2941 // Encoding of imm16 argument for movt and movw ARM instructions
2944 // imm16 := imm4 | imm12
2946 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2947 // +-------+---------------+-------+-------+-----------------------+
2948 // | | |imm4 | |imm12 |
2949 // +-------+---------------+-------+-------+-----------------------+
2951 // Extract the relocation addend from VAL based on the ARM
2952 // instruction encoding described above.
2953 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2954 extract_arm_movw_movt_addend(
2955 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2957 // According to the Elf ABI for ARM Architecture the immediate
2958 // field is sign-extended to form the addend.
2959 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000) | (val
& 0xfff));
2962 // Insert X into VAL based on the ARM instruction encoding described
2964 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2965 insert_val_arm_movw_movt(
2966 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2967 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2971 val
|= (x
& 0xf000) << 4;
2975 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2978 // imm16 := imm4 | i | imm3 | imm8
2980 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2981 // +---------+-+-----------+-------++-+-----+-------+---------------+
2982 // | |i| |imm4 || |imm3 | |imm8 |
2983 // +---------+-+-----------+-------++-+-----+-------+---------------+
2985 // Extract the relocation addend from VAL based on the Thumb2
2986 // instruction encoding described above.
2987 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2988 extract_thumb_movw_movt_addend(
2989 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2991 // According to the Elf ABI for ARM Architecture the immediate
2992 // field is sign-extended to form the addend.
2993 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000)
2994 | ((val
>> 15) & 0x0800)
2995 | ((val
>> 4) & 0x0700)
2999 // Insert X into VAL based on the Thumb2 instruction encoding
3001 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3002 insert_val_thumb_movw_movt(
3003 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3004 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3007 val
|= (x
& 0xf000) << 4;
3008 val
|= (x
& 0x0800) << 15;
3009 val
|= (x
& 0x0700) << 4;
3010 val
|= (x
& 0x00ff);
3014 // Calculate the smallest constant Kn for the specified residual.
3015 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3017 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3023 // Determine the most significant bit in the residual and
3024 // align the resulting value to a 2-bit boundary.
3025 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3027 // The desired shift is now (msb - 6), or zero, whichever
3029 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3032 // Calculate the final residual for the specified group index.
3033 // If the passed group index is less than zero, the method will return
3034 // the value of the specified residual without any change.
3035 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3036 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3037 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3040 for (int n
= 0; n
<= group
; n
++)
3042 // Calculate which part of the value to mask.
3043 uint32_t shift
= calc_grp_kn(residual
);
3044 // Calculate the residual for the next time around.
3045 residual
&= ~(residual
& (0xff << shift
));
3051 // Calculate the value of Gn for the specified group index.
3052 // We return it in the form of an encoded constant-and-rotation.
3053 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3054 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3055 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3058 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3061 for (int n
= 0; n
<= group
; n
++)
3063 // Calculate which part of the value to mask.
3064 shift
= calc_grp_kn(residual
);
3065 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3066 gn
= residual
& (0xff << shift
);
3067 // Calculate the residual for the next time around.
3070 // Return Gn in the form of an encoded constant-and-rotation.
3071 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3075 // Handle ARM long branches.
3076 static typename
This::Status
3077 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3078 unsigned char*, const Sized_symbol
<32>*,
3079 const Arm_relobj
<big_endian
>*, unsigned int,
3080 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3082 // Handle THUMB long branches.
3083 static typename
This::Status
3084 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3085 unsigned char*, const Sized_symbol
<32>*,
3086 const Arm_relobj
<big_endian
>*, unsigned int,
3087 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3090 // Return the branch offset of a 32-bit THUMB branch.
3091 static inline int32_t
3092 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3094 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3095 // involving the J1 and J2 bits.
3096 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3097 uint32_t upper
= upper_insn
& 0x3ffU
;
3098 uint32_t lower
= lower_insn
& 0x7ffU
;
3099 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3100 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3101 uint32_t i1
= j1
^ s
? 0 : 1;
3102 uint32_t i2
= j2
^ s
? 0 : 1;
3104 return Bits
<25>::sign_extend32((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3105 | (upper
<< 12) | (lower
<< 1));
3108 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3109 // UPPER_INSN is the original upper instruction of the branch. Caller is
3110 // responsible for overflow checking and BLX offset adjustment.
3111 static inline uint16_t
3112 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3114 uint32_t s
= offset
< 0 ? 1 : 0;
3115 uint32_t bits
= static_cast<uint32_t>(offset
);
3116 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3119 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3120 // LOWER_INSN is the original lower instruction of the branch. Caller is
3121 // responsible for overflow checking and BLX offset adjustment.
3122 static inline uint16_t
3123 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3125 uint32_t s
= offset
< 0 ? 1 : 0;
3126 uint32_t bits
= static_cast<uint32_t>(offset
);
3127 return ((lower_insn
& ~0x2fffU
)
3128 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3129 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3130 | ((bits
>> 1) & 0x7ffU
));
3133 // Return the branch offset of a 32-bit THUMB conditional branch.
3134 static inline int32_t
3135 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3137 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3138 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3139 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3140 uint32_t lower
= (lower_insn
& 0x07ffU
);
3141 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3143 return Bits
<21>::sign_extend32((upper
<< 12) | (lower
<< 1));
3146 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3147 // instruction. UPPER_INSN is the original upper instruction of the branch.
3148 // Caller is responsible for overflow checking.
3149 static inline uint16_t
3150 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3152 uint32_t s
= offset
< 0 ? 1 : 0;
3153 uint32_t bits
= static_cast<uint32_t>(offset
);
3154 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3157 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3158 // instruction. LOWER_INSN is the original lower instruction of the branch.
3159 // The caller is responsible for overflow checking.
3160 static inline uint16_t
3161 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3163 uint32_t bits
= static_cast<uint32_t>(offset
);
3164 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3165 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3166 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3168 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3171 // R_ARM_ABS8: S + A
3172 static inline typename
This::Status
3173 abs8(unsigned char* view
,
3174 const Sized_relobj_file
<32, big_endian
>* object
,
3175 const Symbol_value
<32>* psymval
)
3177 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3178 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3179 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3180 int32_t addend
= Bits
<8>::sign_extend32(val
);
3181 Arm_address x
= psymval
->value(object
, addend
);
3182 val
= Bits
<32>::bit_select32(val
, x
, 0xffU
);
3183 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3185 // R_ARM_ABS8 permits signed or unsigned results.
3186 return (Bits
<8>::has_signed_unsigned_overflow32(x
)
3187 ? This::STATUS_OVERFLOW
3188 : This::STATUS_OKAY
);
3191 // R_ARM_THM_ABS5: S + A
3192 static inline typename
This::Status
3193 thm_abs5(unsigned char* view
,
3194 const Sized_relobj_file
<32, big_endian
>* object
,
3195 const Symbol_value
<32>* psymval
)
3197 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3198 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3199 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3200 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3201 Reltype addend
= (val
& 0x7e0U
) >> 6;
3202 Reltype x
= psymval
->value(object
, addend
);
3203 val
= Bits
<32>::bit_select32(val
, x
<< 6, 0x7e0U
);
3204 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3205 return (Bits
<5>::has_overflow32(x
)
3206 ? This::STATUS_OVERFLOW
3207 : This::STATUS_OKAY
);
3210 // R_ARM_ABS12: S + A
3211 static inline typename
This::Status
3212 abs12(unsigned char* view
,
3213 const Sized_relobj_file
<32, big_endian
>* object
,
3214 const Symbol_value
<32>* psymval
)
3216 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3217 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3218 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3219 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3220 Reltype addend
= val
& 0x0fffU
;
3221 Reltype x
= psymval
->value(object
, addend
);
3222 val
= Bits
<32>::bit_select32(val
, x
, 0x0fffU
);
3223 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3224 return (Bits
<12>::has_overflow32(x
)
3225 ? This::STATUS_OVERFLOW
3226 : This::STATUS_OKAY
);
3229 // R_ARM_ABS16: S + A
3230 static inline typename
This::Status
3231 abs16(unsigned char* view
,
3232 const Sized_relobj_file
<32, big_endian
>* object
,
3233 const Symbol_value
<32>* psymval
)
3235 typedef typename
elfcpp::Swap_unaligned
<16, big_endian
>::Valtype Valtype
;
3236 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3237 Valtype val
= elfcpp::Swap_unaligned
<16, big_endian
>::readval(view
);
3238 int32_t addend
= Bits
<16>::sign_extend32(val
);
3239 Arm_address x
= psymval
->value(object
, addend
);
3240 val
= Bits
<32>::bit_select32(val
, x
, 0xffffU
);
3241 elfcpp::Swap_unaligned
<16, big_endian
>::writeval(view
, val
);
3243 // R_ARM_ABS16 permits signed or unsigned results.
3244 return (Bits
<16>::has_signed_unsigned_overflow32(x
)
3245 ? This::STATUS_OVERFLOW
3246 : This::STATUS_OKAY
);
3249 // R_ARM_ABS32: (S + A) | T
3250 static inline typename
This::Status
3251 abs32(unsigned char* view
,
3252 const Sized_relobj_file
<32, big_endian
>* object
,
3253 const Symbol_value
<32>* psymval
,
3254 Arm_address thumb_bit
)
3256 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3257 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3258 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3259 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3260 return This::STATUS_OKAY
;
3263 // R_ARM_REL32: (S + A) | T - P
3264 static inline typename
This::Status
3265 rel32(unsigned char* view
,
3266 const Sized_relobj_file
<32, big_endian
>* object
,
3267 const Symbol_value
<32>* psymval
,
3268 Arm_address address
,
3269 Arm_address thumb_bit
)
3271 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3272 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3273 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3274 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3275 return This::STATUS_OKAY
;
3278 // R_ARM_THM_JUMP24: (S + A) | T - P
3279 static typename
This::Status
3280 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3281 const Symbol_value
<32>* psymval
, Arm_address address
,
3282 Arm_address thumb_bit
);
3284 // R_ARM_THM_JUMP6: S + A – P
3285 static inline typename
This::Status
3286 thm_jump6(unsigned char* view
,
3287 const Sized_relobj_file
<32, big_endian
>* object
,
3288 const Symbol_value
<32>* psymval
,
3289 Arm_address address
)
3291 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3292 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3293 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3294 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3295 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3296 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3297 Reltype x
= (psymval
->value(object
, addend
) - address
);
3298 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3299 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3300 // CZB does only forward jumps.
3301 return ((x
> 0x007e)
3302 ? This::STATUS_OVERFLOW
3303 : This::STATUS_OKAY
);
3306 // R_ARM_THM_JUMP8: S + A – P
3307 static inline typename
This::Status
3308 thm_jump8(unsigned char* view
,
3309 const Sized_relobj_file
<32, big_endian
>* object
,
3310 const Symbol_value
<32>* psymval
,
3311 Arm_address address
)
3313 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3314 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3315 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3316 int32_t addend
= Bits
<8>::sign_extend32((val
& 0x00ff) << 1);
3317 int32_t x
= (psymval
->value(object
, addend
) - address
);
3318 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xff00)
3319 | ((x
& 0x01fe) >> 1)));
3320 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3321 return (Bits
<9>::has_overflow32(x
)
3322 ? This::STATUS_OVERFLOW
3323 : This::STATUS_OKAY
);
3326 // R_ARM_THM_JUMP11: S + A – P
3327 static inline typename
This::Status
3328 thm_jump11(unsigned char* view
,
3329 const Sized_relobj_file
<32, big_endian
>* object
,
3330 const Symbol_value
<32>* psymval
,
3331 Arm_address address
)
3333 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3334 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3335 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3336 int32_t addend
= Bits
<11>::sign_extend32((val
& 0x07ff) << 1);
3337 int32_t x
= (psymval
->value(object
, addend
) - address
);
3338 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xf800)
3339 | ((x
& 0x0ffe) >> 1)));
3340 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3341 return (Bits
<12>::has_overflow32(x
)
3342 ? This::STATUS_OVERFLOW
3343 : This::STATUS_OKAY
);
3346 // R_ARM_BASE_PREL: B(S) + A - P
3347 static inline typename
This::Status
3348 base_prel(unsigned char* view
,
3350 Arm_address address
)
3352 Base::rel32(view
, origin
- address
);
3356 // R_ARM_BASE_ABS: B(S) + A
3357 static inline typename
This::Status
3358 base_abs(unsigned char* view
,
3361 Base::rel32(view
, origin
);
3365 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3366 static inline typename
This::Status
3367 got_brel(unsigned char* view
,
3368 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3370 Base::rel32(view
, got_offset
);
3371 return This::STATUS_OKAY
;
3374 // R_ARM_GOT_PREL: GOT(S) + A - P
3375 static inline typename
This::Status
3376 got_prel(unsigned char* view
,
3377 Arm_address got_entry
,
3378 Arm_address address
)
3380 Base::rel32(view
, got_entry
- address
);
3381 return This::STATUS_OKAY
;
3384 // R_ARM_PREL: (S + A) | T - P
3385 static inline typename
This::Status
3386 prel31(unsigned char* view
,
3387 const Sized_relobj_file
<32, big_endian
>* object
,
3388 const Symbol_value
<32>* psymval
,
3389 Arm_address address
,
3390 Arm_address thumb_bit
)
3392 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3393 Valtype val
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3394 Valtype addend
= Bits
<31>::sign_extend32(val
);
3395 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3396 val
= Bits
<32>::bit_select32(val
, x
, 0x7fffffffU
);
3397 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, val
);
3398 return (Bits
<31>::has_overflow32(x
)
3399 ? This::STATUS_OVERFLOW
3400 : This::STATUS_OKAY
);
3403 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3404 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3405 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3406 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3407 static inline typename
This::Status
3408 movw(unsigned char* view
,
3409 const Sized_relobj_file
<32, big_endian
>* object
,
3410 const Symbol_value
<32>* psymval
,
3411 Arm_address relative_address_base
,
3412 Arm_address thumb_bit
,
3413 bool check_overflow
)
3415 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3416 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3417 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3418 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3419 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3420 - relative_address_base
);
3421 val
= This::insert_val_arm_movw_movt(val
, x
);
3422 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3423 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3424 ? This::STATUS_OVERFLOW
3425 : This::STATUS_OKAY
);
3428 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3429 // R_ARM_MOVT_PREL: S + A - P
3430 // R_ARM_MOVT_BREL: S + A - B(S)
3431 static inline typename
This::Status
3432 movt(unsigned char* view
,
3433 const Sized_relobj_file
<32, big_endian
>* object
,
3434 const Symbol_value
<32>* psymval
,
3435 Arm_address relative_address_base
)
3437 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3438 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3439 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3440 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3441 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3442 val
= This::insert_val_arm_movw_movt(val
, x
);
3443 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3444 // FIXME: IHI0044D says that we should check for overflow.
3445 return This::STATUS_OKAY
;
3448 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3449 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3450 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3451 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3452 static inline typename
This::Status
3453 thm_movw(unsigned char* view
,
3454 const Sized_relobj_file
<32, big_endian
>* object
,
3455 const Symbol_value
<32>* psymval
,
3456 Arm_address relative_address_base
,
3457 Arm_address thumb_bit
,
3458 bool check_overflow
)
3460 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3461 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3462 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3463 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3464 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3465 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3467 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3468 val
= This::insert_val_thumb_movw_movt(val
, x
);
3469 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3470 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3471 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3472 ? This::STATUS_OVERFLOW
3473 : This::STATUS_OKAY
);
3476 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3477 // R_ARM_THM_MOVT_PREL: S + A - P
3478 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3479 static inline typename
This::Status
3480 thm_movt(unsigned char* view
,
3481 const Sized_relobj_file
<32, big_endian
>* object
,
3482 const Symbol_value
<32>* psymval
,
3483 Arm_address relative_address_base
)
3485 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3486 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3487 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3488 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3489 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3490 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3491 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3492 val
= This::insert_val_thumb_movw_movt(val
, x
);
3493 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3494 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3495 return This::STATUS_OKAY
;
3498 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3499 static inline typename
This::Status
3500 thm_alu11(unsigned char* view
,
3501 const Sized_relobj_file
<32, big_endian
>* object
,
3502 const Symbol_value
<32>* psymval
,
3503 Arm_address address
,
3504 Arm_address thumb_bit
)
3506 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3507 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3508 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3509 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3510 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3512 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3513 // -----------------------------------------------------------------------
3514 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3515 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3516 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3517 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3518 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3519 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3521 // Determine a sign for the addend.
3522 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3523 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3524 // Thumb2 addend encoding:
3525 // imm12 := i | imm3 | imm8
3526 int32_t addend
= (insn
& 0xff)
3527 | ((insn
& 0x00007000) >> 4)
3528 | ((insn
& 0x04000000) >> 15);
3529 // Apply a sign to the added.
3532 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3533 - (address
& 0xfffffffc);
3534 Reltype val
= abs(x
);
3535 // Mask out the value and a distinct part of the ADD/SUB opcode
3536 // (bits 7:5 of opword).
3537 insn
= (insn
& 0xfb0f8f00)
3539 | ((val
& 0x700) << 4)
3540 | ((val
& 0x800) << 15);
3541 // Set the opcode according to whether the value to go in the
3542 // place is negative.
3546 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3547 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3548 return ((val
> 0xfff) ?
3549 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3552 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3553 static inline typename
This::Status
3554 thm_pc8(unsigned char* view
,
3555 const Sized_relobj_file
<32, big_endian
>* object
,
3556 const Symbol_value
<32>* psymval
,
3557 Arm_address address
)
3559 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3560 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3561 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3562 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3563 Reltype addend
= ((insn
& 0x00ff) << 2);
3564 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3565 Reltype val
= abs(x
);
3566 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3568 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3569 return ((val
> 0x03fc)
3570 ? This::STATUS_OVERFLOW
3571 : This::STATUS_OKAY
);
3574 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3575 static inline typename
This::Status
3576 thm_pc12(unsigned char* view
,
3577 const Sized_relobj_file
<32, big_endian
>* object
,
3578 const Symbol_value
<32>* psymval
,
3579 Arm_address address
)
3581 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3582 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3583 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3584 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3585 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3586 // Determine a sign for the addend (positive if the U bit is 1).
3587 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3588 int32_t addend
= (insn
& 0xfff);
3589 // Apply a sign to the added.
3592 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3593 Reltype val
= abs(x
);
3594 // Mask out and apply the value and the U bit.
3595 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3596 // Set the U bit according to whether the value to go in the
3597 // place is positive.
3601 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3602 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3603 return ((val
> 0xfff) ?
3604 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3608 static inline typename
This::Status
3609 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3610 unsigned char* view
,
3611 const Arm_relobj
<big_endian
>* object
,
3612 const Arm_address address
,
3613 const bool is_interworking
)
3616 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3617 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3618 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3620 // Ensure that we have a BX instruction.
3621 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3622 const uint32_t reg
= (val
& 0xf);
3623 if (is_interworking
&& reg
!= 0xf)
3625 Stub_table
<big_endian
>* stub_table
=
3626 object
->stub_table(relinfo
->data_shndx
);
3627 gold_assert(stub_table
!= NULL
);
3629 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3630 gold_assert(stub
!= NULL
);
3632 int32_t veneer_address
=
3633 stub_table
->address() + stub
->offset() - 8 - address
;
3634 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3635 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3636 // Replace with a branch to veneer (B <addr>)
3637 val
= (val
& 0xf0000000) | 0x0a000000
3638 | ((veneer_address
>> 2) & 0x00ffffff);
3642 // Preserve Rm (lowest four bits) and the condition code
3643 // (highest four bits). Other bits encode MOV PC,Rm.
3644 val
= (val
& 0xf000000f) | 0x01a0f000;
3646 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3647 return This::STATUS_OKAY
;
3650 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3651 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3652 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3653 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3654 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3655 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3656 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3657 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3658 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3659 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3660 static inline typename
This::Status
3661 arm_grp_alu(unsigned char* view
,
3662 const Sized_relobj_file
<32, big_endian
>* object
,
3663 const Symbol_value
<32>* psymval
,
3665 Arm_address address
,
3666 Arm_address thumb_bit
,
3667 bool check_overflow
)
3669 gold_assert(group
>= 0 && group
< 3);
3670 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3671 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3672 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3674 // ALU group relocations are allowed only for the ADD/SUB instructions.
3675 // (0x00800000 - ADD, 0x00400000 - SUB)
3676 const Valtype opcode
= insn
& 0x01e00000;
3677 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3678 return This::STATUS_BAD_RELOC
;
3680 // Determine a sign for the addend.
3681 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3682 // shifter = rotate_imm * 2
3683 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3684 // Initial addend value.
3685 int32_t addend
= insn
& 0xff;
3686 // Rotate addend right by shifter.
3687 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3688 // Apply a sign to the added.
3691 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3692 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3693 // Check for overflow if required
3695 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3696 return This::STATUS_OVERFLOW
;
3698 // Mask out the value and the ADD/SUB part of the opcode; take care
3699 // not to destroy the S bit.
3701 // Set the opcode according to whether the value to go in the
3702 // place is negative.
3703 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3704 // Encode the offset (encoded Gn).
3707 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3708 return This::STATUS_OKAY
;
3711 // R_ARM_LDR_PC_G0: S + A - P
3712 // R_ARM_LDR_PC_G1: S + A - P
3713 // R_ARM_LDR_PC_G2: S + A - P
3714 // R_ARM_LDR_SB_G0: S + A - B(S)
3715 // R_ARM_LDR_SB_G1: S + A - B(S)
3716 // R_ARM_LDR_SB_G2: S + A - B(S)
3717 static inline typename
This::Status
3718 arm_grp_ldr(unsigned char* view
,
3719 const Sized_relobj_file
<32, big_endian
>* object
,
3720 const Symbol_value
<32>* psymval
,
3722 Arm_address address
)
3724 gold_assert(group
>= 0 && group
< 3);
3725 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3726 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3727 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3729 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3730 int32_t addend
= (insn
& 0xfff) * sign
;
3731 int32_t x
= (psymval
->value(object
, addend
) - address
);
3732 // Calculate the relevant G(n-1) value to obtain this stage residual.
3734 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3735 if (residual
>= 0x1000)
3736 return This::STATUS_OVERFLOW
;
3738 // Mask out the value and U bit.
3740 // Set the U bit for non-negative values.
3745 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3746 return This::STATUS_OKAY
;
3749 // R_ARM_LDRS_PC_G0: S + A - P
3750 // R_ARM_LDRS_PC_G1: S + A - P
3751 // R_ARM_LDRS_PC_G2: S + A - P
3752 // R_ARM_LDRS_SB_G0: S + A - B(S)
3753 // R_ARM_LDRS_SB_G1: S + A - B(S)
3754 // R_ARM_LDRS_SB_G2: S + A - B(S)
3755 static inline typename
This::Status
3756 arm_grp_ldrs(unsigned char* view
,
3757 const Sized_relobj_file
<32, big_endian
>* object
,
3758 const Symbol_value
<32>* psymval
,
3760 Arm_address address
)
3762 gold_assert(group
>= 0 && group
< 3);
3763 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3764 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3765 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3767 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3768 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3769 int32_t x
= (psymval
->value(object
, addend
) - address
);
3770 // Calculate the relevant G(n-1) value to obtain this stage residual.
3772 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3773 if (residual
>= 0x100)
3774 return This::STATUS_OVERFLOW
;
3776 // Mask out the value and U bit.
3778 // Set the U bit for non-negative values.
3781 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3783 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3784 return This::STATUS_OKAY
;
3787 // R_ARM_LDC_PC_G0: S + A - P
3788 // R_ARM_LDC_PC_G1: S + A - P
3789 // R_ARM_LDC_PC_G2: S + A - P
3790 // R_ARM_LDC_SB_G0: S + A - B(S)
3791 // R_ARM_LDC_SB_G1: S + A - B(S)
3792 // R_ARM_LDC_SB_G2: S + A - B(S)
3793 static inline typename
This::Status
3794 arm_grp_ldc(unsigned char* view
,
3795 const Sized_relobj_file
<32, big_endian
>* object
,
3796 const Symbol_value
<32>* psymval
,
3798 Arm_address address
)
3800 gold_assert(group
>= 0 && group
< 3);
3801 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3802 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3803 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3805 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3806 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3807 int32_t x
= (psymval
->value(object
, addend
) - address
);
3808 // Calculate the relevant G(n-1) value to obtain this stage residual.
3810 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3811 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3812 return This::STATUS_OVERFLOW
;
3814 // Mask out the value and U bit.
3816 // Set the U bit for non-negative values.
3819 insn
|= (residual
>> 2);
3821 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3822 return This::STATUS_OKAY
;
3826 // Relocate ARM long branches. This handles relocation types
3827 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3828 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3829 // undefined and we do not use PLT in this relocation. In such a case,
3830 // the branch is converted into an NOP.
3832 template<bool big_endian
>
3833 typename Arm_relocate_functions
<big_endian
>::Status
3834 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3835 unsigned int r_type
,
3836 const Relocate_info
<32, big_endian
>* relinfo
,
3837 unsigned char* view
,
3838 const Sized_symbol
<32>* gsym
,
3839 const Arm_relobj
<big_endian
>* object
,
3841 const Symbol_value
<32>* psymval
,
3842 Arm_address address
,
3843 Arm_address thumb_bit
,
3844 bool is_weakly_undefined_without_plt
)
3846 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3847 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3848 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3850 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3851 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3852 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3853 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3854 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3855 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3856 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3858 // Check that the instruction is valid.
3859 if (r_type
== elfcpp::R_ARM_CALL
)
3861 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3862 return This::STATUS_BAD_RELOC
;
3864 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3866 if (!insn_is_b
&& !insn_is_cond_bl
)
3867 return This::STATUS_BAD_RELOC
;
3869 else if (r_type
== elfcpp::R_ARM_PLT32
)
3871 if (!insn_is_any_branch
)
3872 return This::STATUS_BAD_RELOC
;
3874 else if (r_type
== elfcpp::R_ARM_XPC25
)
3876 // FIXME: AAELF document IH0044C does not say much about it other
3877 // than it being obsolete.
3878 if (!insn_is_any_branch
)
3879 return This::STATUS_BAD_RELOC
;
3884 // A branch to an undefined weak symbol is turned into a jump to
3885 // the next instruction unless a PLT entry will be created.
3886 // Do the same for local undefined symbols.
3887 // The jump to the next instruction is optimized as a NOP depending
3888 // on the architecture.
3889 const Target_arm
<big_endian
>* arm_target
=
3890 Target_arm
<big_endian
>::default_target();
3891 if (is_weakly_undefined_without_plt
)
3893 gold_assert(!parameters
->options().relocatable());
3894 Valtype cond
= val
& 0xf0000000U
;
3895 if (arm_target
->may_use_arm_nop())
3896 val
= cond
| 0x0320f000;
3898 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3899 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3900 return This::STATUS_OKAY
;
3903 Valtype addend
= Bits
<26>::sign_extend32(val
<< 2);
3904 Valtype branch_target
= psymval
->value(object
, addend
);
3905 int32_t branch_offset
= branch_target
- address
;
3907 // We need a stub if the branch offset is too large or if we need
3909 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
3910 Reloc_stub
* stub
= NULL
;
3912 if (!parameters
->options().relocatable()
3913 && (Bits
<26>::has_overflow32(branch_offset
)
3914 || ((thumb_bit
!= 0)
3915 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
3917 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
3919 Stub_type stub_type
=
3920 Reloc_stub::stub_type_for_reloc(r_type
, address
,
3921 unadjusted_branch_target
,
3923 if (stub_type
!= arm_stub_none
)
3925 Stub_table
<big_endian
>* stub_table
=
3926 object
->stub_table(relinfo
->data_shndx
);
3927 gold_assert(stub_table
!= NULL
);
3929 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3930 stub
= stub_table
->find_reloc_stub(stub_key
);
3931 gold_assert(stub
!= NULL
);
3932 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3933 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3934 branch_offset
= branch_target
- address
;
3935 gold_assert(!Bits
<26>::has_overflow32(branch_offset
));
3939 // At this point, if we still need to switch mode, the instruction
3940 // must either be a BLX or a BL that can be converted to a BLX.
3944 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
3945 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
3948 val
= Bits
<32>::bit_select32(val
, (branch_offset
>> 2), 0xffffffUL
);
3949 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3950 return (Bits
<26>::has_overflow32(branch_offset
)
3951 ? This::STATUS_OVERFLOW
3952 : This::STATUS_OKAY
);
3955 // Relocate THUMB long branches. This handles relocation types
3956 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3957 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3958 // undefined and we do not use PLT in this relocation. In such a case,
3959 // the branch is converted into an NOP.
3961 template<bool big_endian
>
3962 typename Arm_relocate_functions
<big_endian
>::Status
3963 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
3964 unsigned int r_type
,
3965 const Relocate_info
<32, big_endian
>* relinfo
,
3966 unsigned char* view
,
3967 const Sized_symbol
<32>* gsym
,
3968 const Arm_relobj
<big_endian
>* object
,
3970 const Symbol_value
<32>* psymval
,
3971 Arm_address address
,
3972 Arm_address thumb_bit
,
3973 bool is_weakly_undefined_without_plt
)
3975 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3976 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3977 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3978 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3980 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3982 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
3983 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
3985 // Check that the instruction is valid.
3986 if (r_type
== elfcpp::R_ARM_THM_CALL
)
3988 if (!is_bl_insn
&& !is_blx_insn
)
3989 return This::STATUS_BAD_RELOC
;
3991 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
3993 // This cannot be a BLX.
3995 return This::STATUS_BAD_RELOC
;
3997 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
3999 // Check for Thumb to Thumb call.
4001 return This::STATUS_BAD_RELOC
;
4004 gold_warning(_("%s: Thumb BLX instruction targets "
4005 "thumb function '%s'."),
4006 object
->name().c_str(),
4007 (gsym
? gsym
->name() : "(local)"));
4008 // Convert BLX to BL.
4009 lower_insn
|= 0x1000U
;
4015 // A branch to an undefined weak symbol is turned into a jump to
4016 // the next instruction unless a PLT entry will be created.
4017 // The jump to the next instruction is optimized as a NOP.W for
4018 // Thumb-2 enabled architectures.
4019 const Target_arm
<big_endian
>* arm_target
=
4020 Target_arm
<big_endian
>::default_target();
4021 if (is_weakly_undefined_without_plt
)
4023 gold_assert(!parameters
->options().relocatable());
4024 if (arm_target
->may_use_thumb2_nop())
4026 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4027 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4031 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4032 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4034 return This::STATUS_OKAY
;
4037 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4038 Arm_address branch_target
= psymval
->value(object
, addend
);
4040 // For BLX, bit 1 of target address comes from bit 1 of base address.
4041 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4042 if (thumb_bit
== 0 && may_use_blx
)
4043 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4045 int32_t branch_offset
= branch_target
- address
;
4047 // We need a stub if the branch offset is too large or if we need
4049 bool thumb2
= arm_target
->using_thumb2();
4050 if (!parameters
->options().relocatable()
4051 && ((!thumb2
&& Bits
<23>::has_overflow32(branch_offset
))
4052 || (thumb2
&& Bits
<25>::has_overflow32(branch_offset
))
4053 || ((thumb_bit
== 0)
4054 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4055 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4057 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4059 Stub_type stub_type
=
4060 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4061 unadjusted_branch_target
,
4064 if (stub_type
!= arm_stub_none
)
4066 Stub_table
<big_endian
>* stub_table
=
4067 object
->stub_table(relinfo
->data_shndx
);
4068 gold_assert(stub_table
!= NULL
);
4070 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4071 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4072 gold_assert(stub
!= NULL
);
4073 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4074 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4075 if (thumb_bit
== 0 && may_use_blx
)
4076 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4077 branch_offset
= branch_target
- address
;
4081 // At this point, if we still need to switch mode, the instruction
4082 // must either be a BLX or a BL that can be converted to a BLX.
4085 gold_assert(may_use_blx
4086 && (r_type
== elfcpp::R_ARM_THM_CALL
4087 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4088 // Make sure this is a BLX.
4089 lower_insn
&= ~0x1000U
;
4093 // Make sure this is a BL.
4094 lower_insn
|= 0x1000U
;
4097 // For a BLX instruction, make sure that the relocation is rounded up
4098 // to a word boundary. This follows the semantics of the instruction
4099 // which specifies that bit 1 of the target address will come from bit
4100 // 1 of the base address.
4101 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4102 gold_assert((branch_offset
& 3) == 0);
4104 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4105 // We use the Thumb-2 encoding, which is safe even if dealing with
4106 // a Thumb-1 instruction by virtue of our overflow check above. */
4107 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4108 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4110 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4111 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4113 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
4116 ? Bits
<25>::has_overflow32(branch_offset
)
4117 : Bits
<23>::has_overflow32(branch_offset
))
4118 ? This::STATUS_OVERFLOW
4119 : This::STATUS_OKAY
);
4122 // Relocate THUMB-2 long conditional branches.
4123 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4124 // undefined and we do not use PLT in this relocation. In such a case,
4125 // the branch is converted into an NOP.
4127 template<bool big_endian
>
4128 typename Arm_relocate_functions
<big_endian
>::Status
4129 Arm_relocate_functions
<big_endian
>::thm_jump19(
4130 unsigned char* view
,
4131 const Arm_relobj
<big_endian
>* object
,
4132 const Symbol_value
<32>* psymval
,
4133 Arm_address address
,
4134 Arm_address thumb_bit
)
4136 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4137 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4138 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4139 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4140 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4142 Arm_address branch_target
= psymval
->value(object
, addend
);
4143 int32_t branch_offset
= branch_target
- address
;
4145 // ??? Should handle interworking? GCC might someday try to
4146 // use this for tail calls.
4147 // FIXME: We do support thumb entry to PLT yet.
4150 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4151 return This::STATUS_BAD_RELOC
;
4154 // Put RELOCATION back into the insn.
4155 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4156 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4158 // Put the relocated value back in the object file:
4159 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4160 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4162 return (Bits
<21>::has_overflow32(branch_offset
)
4163 ? This::STATUS_OVERFLOW
4164 : This::STATUS_OKAY
);
4167 // Get the GOT section, creating it if necessary.
4169 template<bool big_endian
>
4170 Arm_output_data_got
<big_endian
>*
4171 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4173 if (this->got_
== NULL
)
4175 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4177 // When using -z now, we can treat .got as a relro section.
4178 // Without -z now, it is modified after program startup by lazy
4180 bool is_got_relro
= parameters
->options().now();
4181 Output_section_order got_order
= (is_got_relro
4185 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4186 // .got.plt sections in output. The output .got section contains both
4187 // PLT and non-PLT GOT entries.
4188 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4190 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4191 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4192 this->got_
, got_order
, is_got_relro
);
4194 // The old GNU linker creates a .got.plt section. We just
4195 // create another set of data in the .got section. Note that we
4196 // always create a PLT if we create a GOT, although the PLT
4198 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4199 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4200 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4201 this->got_plt_
, got_order
, is_got_relro
);
4203 // The first three entries are reserved.
4204 this->got_plt_
->set_current_data_size(3 * 4);
4206 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4207 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4208 Symbol_table::PREDEFINED
,
4210 0, 0, elfcpp::STT_OBJECT
,
4212 elfcpp::STV_HIDDEN
, 0,
4218 // Get the dynamic reloc section, creating it if necessary.
4220 template<bool big_endian
>
4221 typename Target_arm
<big_endian
>::Reloc_section
*
4222 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4224 if (this->rel_dyn_
== NULL
)
4226 gold_assert(layout
!= NULL
);
4227 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4228 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4229 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4230 ORDER_DYNAMIC_RELOCS
, false);
4232 return this->rel_dyn_
;
4235 // Insn_template methods.
4237 // Return byte size of an instruction template.
4240 Insn_template::size() const
4242 switch (this->type())
4245 case THUMB16_SPECIAL_TYPE
:
4256 // Return alignment of an instruction template.
4259 Insn_template::alignment() const
4261 switch (this->type())
4264 case THUMB16_SPECIAL_TYPE
:
4275 // Stub_template methods.
4277 Stub_template::Stub_template(
4278 Stub_type type
, const Insn_template
* insns
,
4280 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4281 entry_in_thumb_mode_(false), relocs_()
4285 // Compute byte size and alignment of stub template.
4286 for (size_t i
= 0; i
< insn_count
; i
++)
4288 unsigned insn_alignment
= insns
[i
].alignment();
4289 size_t insn_size
= insns
[i
].size();
4290 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4291 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4292 switch (insns
[i
].type())
4294 case Insn_template::THUMB16_TYPE
:
4295 case Insn_template::THUMB16_SPECIAL_TYPE
:
4297 this->entry_in_thumb_mode_
= true;
4300 case Insn_template::THUMB32_TYPE
:
4301 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4302 this->relocs_
.push_back(Reloc(i
, offset
));
4304 this->entry_in_thumb_mode_
= true;
4307 case Insn_template::ARM_TYPE
:
4308 // Handle cases where the target is encoded within the
4310 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4311 this->relocs_
.push_back(Reloc(i
, offset
));
4314 case Insn_template::DATA_TYPE
:
4315 // Entry point cannot be data.
4316 gold_assert(i
!= 0);
4317 this->relocs_
.push_back(Reloc(i
, offset
));
4323 offset
+= insn_size
;
4325 this->size_
= offset
;
4330 // Template to implement do_write for a specific target endianness.
4332 template<bool big_endian
>
4334 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4336 const Stub_template
* stub_template
= this->stub_template();
4337 const Insn_template
* insns
= stub_template
->insns();
4339 // FIXME: We do not handle BE8 encoding yet.
4340 unsigned char* pov
= view
;
4341 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4343 switch (insns
[i
].type())
4345 case Insn_template::THUMB16_TYPE
:
4346 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4348 case Insn_template::THUMB16_SPECIAL_TYPE
:
4349 elfcpp::Swap
<16, big_endian
>::writeval(
4351 this->thumb16_special(i
));
4353 case Insn_template::THUMB32_TYPE
:
4355 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4356 uint32_t lo
= insns
[i
].data() & 0xffff;
4357 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4358 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4361 case Insn_template::ARM_TYPE
:
4362 case Insn_template::DATA_TYPE
:
4363 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4368 pov
+= insns
[i
].size();
4370 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4373 // Reloc_stub::Key methods.
4375 // Dump a Key as a string for debugging.
4378 Reloc_stub::Key::name() const
4380 if (this->r_sym_
== invalid_index
)
4382 // Global symbol key name
4383 // <stub-type>:<symbol name>:<addend>.
4384 const std::string sym_name
= this->u_
.symbol
->name();
4385 // We need to print two hex number and two colons. So just add 100 bytes
4386 // to the symbol name size.
4387 size_t len
= sym_name
.size() + 100;
4388 char* buffer
= new char[len
];
4389 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4390 sym_name
.c_str(), this->addend_
);
4391 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4393 return std::string(buffer
);
4397 // local symbol key name
4398 // <stub-type>:<object>:<r_sym>:<addend>.
4399 const size_t len
= 200;
4401 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4402 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4403 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4404 return std::string(buffer
);
4408 // Reloc_stub methods.
4410 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4411 // LOCATION to DESTINATION.
4412 // This code is based on the arm_type_of_stub function in
4413 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4417 Reloc_stub::stub_type_for_reloc(
4418 unsigned int r_type
,
4419 Arm_address location
,
4420 Arm_address destination
,
4421 bool target_is_thumb
)
4423 Stub_type stub_type
= arm_stub_none
;
4425 // This is a bit ugly but we want to avoid using a templated class for
4426 // big and little endianities.
4428 bool should_force_pic_veneer
;
4431 if (parameters
->target().is_big_endian())
4433 const Target_arm
<true>* big_endian_target
=
4434 Target_arm
<true>::default_target();
4435 may_use_blx
= big_endian_target
->may_use_v5t_interworking();
4436 should_force_pic_veneer
= big_endian_target
->should_force_pic_veneer();
4437 thumb2
= big_endian_target
->using_thumb2();
4438 thumb_only
= big_endian_target
->using_thumb_only();
4442 const Target_arm
<false>* little_endian_target
=
4443 Target_arm
<false>::default_target();
4444 may_use_blx
= little_endian_target
->may_use_v5t_interworking();
4445 should_force_pic_veneer
= little_endian_target
->should_force_pic_veneer();
4446 thumb2
= little_endian_target
->using_thumb2();
4447 thumb_only
= little_endian_target
->using_thumb_only();
4450 int64_t branch_offset
;
4451 bool output_is_position_independent
=
4452 parameters
->options().output_is_position_independent();
4453 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4455 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4456 // base address (instruction address + 4).
4457 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4458 destination
= Bits
<32>::bit_select32(destination
, location
, 0x2);
4459 branch_offset
= static_cast<int64_t>(destination
) - location
;
4461 // Handle cases where:
4462 // - this call goes too far (different Thumb/Thumb2 max
4464 // - it's a Thumb->Arm call and blx is not available, or it's a
4465 // Thumb->Arm branch (not bl). A stub is needed in this case.
4467 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4468 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4470 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4471 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4472 || ((!target_is_thumb
)
4473 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4474 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4476 if (target_is_thumb
)
4481 stub_type
= (output_is_position_independent
4482 || should_force_pic_veneer
)
4485 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4486 // V5T and above. Stub starts with ARM code, so
4487 // we must be able to switch mode before
4488 // reaching it, which is only possible for 'bl'
4489 // (ie R_ARM_THM_CALL relocation).
4490 ? arm_stub_long_branch_any_thumb_pic
4491 // On V4T, use Thumb code only.
4492 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4496 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4497 ? arm_stub_long_branch_any_any
// V5T and above.
4498 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4502 stub_type
= (output_is_position_independent
4503 || should_force_pic_veneer
)
4504 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4505 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4512 // FIXME: We should check that the input section is from an
4513 // object that has interwork enabled.
4515 stub_type
= (output_is_position_independent
4516 || should_force_pic_veneer
)
4519 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4520 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4521 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4525 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4526 ? arm_stub_long_branch_any_any
// V5T and above.
4527 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4529 // Handle v4t short branches.
4530 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4531 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4532 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4533 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4537 else if (r_type
== elfcpp::R_ARM_CALL
4538 || r_type
== elfcpp::R_ARM_JUMP24
4539 || r_type
== elfcpp::R_ARM_PLT32
)
4541 branch_offset
= static_cast<int64_t>(destination
) - location
;
4542 if (target_is_thumb
)
4546 // FIXME: We should check that the input section is from an
4547 // object that has interwork enabled.
4549 // We have an extra 2-bytes reach because of
4550 // the mode change (bit 24 (H) of BLX encoding).
4551 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4552 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4553 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4554 || (r_type
== elfcpp::R_ARM_JUMP24
)
4555 || (r_type
== elfcpp::R_ARM_PLT32
))
4557 stub_type
= (output_is_position_independent
4558 || should_force_pic_veneer
)
4561 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4562 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4566 ? arm_stub_long_branch_any_any
// V5T and above.
4567 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4573 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4574 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4576 stub_type
= (output_is_position_independent
4577 || should_force_pic_veneer
)
4578 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4579 : arm_stub_long_branch_any_any
; /// non-PIC.
4587 // Cortex_a8_stub methods.
4589 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4590 // I is the position of the instruction template in the stub template.
4593 Cortex_a8_stub::do_thumb16_special(size_t i
)
4595 // The only use of this is to copy condition code from a conditional
4596 // branch being worked around to the corresponding conditional branch in
4598 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4600 uint16_t data
= this->stub_template()->insns()[i
].data();
4601 gold_assert((data
& 0xff00U
) == 0xd000U
);
4602 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4606 // Stub_factory methods.
4608 Stub_factory::Stub_factory()
4610 // The instruction template sequences are declared as static
4611 // objects and initialized first time the constructor runs.
4613 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4614 // to reach the stub if necessary.
4615 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4617 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4618 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4619 // dcd R_ARM_ABS32(X)
4622 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4624 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4626 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4627 Insn_template::arm_insn(0xe12fff1c), // bx ip
4628 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4629 // dcd R_ARM_ABS32(X)
4632 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4633 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4635 Insn_template::thumb16_insn(0xb401), // push {r0}
4636 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4637 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4638 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4639 Insn_template::thumb16_insn(0x4760), // bx ip
4640 Insn_template::thumb16_insn(0xbf00), // nop
4641 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4642 // dcd R_ARM_ABS32(X)
4645 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4647 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4649 Insn_template::thumb16_insn(0x4778), // bx pc
4650 Insn_template::thumb16_insn(0x46c0), // nop
4651 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4652 Insn_template::arm_insn(0xe12fff1c), // bx ip
4653 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4654 // dcd R_ARM_ABS32(X)
4657 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4659 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4661 Insn_template::thumb16_insn(0x4778), // bx pc
4662 Insn_template::thumb16_insn(0x46c0), // nop
4663 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4664 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4665 // dcd R_ARM_ABS32(X)
4668 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4669 // one, when the destination is close enough.
4670 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4672 Insn_template::thumb16_insn(0x4778), // bx pc
4673 Insn_template::thumb16_insn(0x46c0), // nop
4674 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4677 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4678 // blx to reach the stub if necessary.
4679 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4681 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4682 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4683 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4684 // dcd R_ARM_REL32(X-4)
4687 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4688 // blx to reach the stub if necessary. We can not add into pc;
4689 // it is not guaranteed to mode switch (different in ARMv6 and
4691 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4693 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4694 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4695 Insn_template::arm_insn(0xe12fff1c), // bx ip
4696 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4697 // dcd R_ARM_REL32(X)
4700 // V4T ARM -> ARM long branch stub, PIC.
4701 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4703 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4704 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4705 Insn_template::arm_insn(0xe12fff1c), // bx ip
4706 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4707 // dcd R_ARM_REL32(X)
4710 // V4T Thumb -> ARM long branch stub, PIC.
4711 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4713 Insn_template::thumb16_insn(0x4778), // bx pc
4714 Insn_template::thumb16_insn(0x46c0), // nop
4715 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4716 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4717 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4718 // dcd R_ARM_REL32(X)
4721 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4723 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4725 Insn_template::thumb16_insn(0xb401), // push {r0}
4726 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4727 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4728 Insn_template::thumb16_insn(0x4484), // add ip, r0
4729 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4730 Insn_template::thumb16_insn(0x4760), // bx ip
4731 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4732 // dcd R_ARM_REL32(X)
4735 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4737 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4739 Insn_template::thumb16_insn(0x4778), // bx pc
4740 Insn_template::thumb16_insn(0x46c0), // nop
4741 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4742 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4743 Insn_template::arm_insn(0xe12fff1c), // bx ip
4744 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4745 // dcd R_ARM_REL32(X)
4748 // Cortex-A8 erratum-workaround stubs.
4750 // Stub used for conditional branches (which may be beyond +/-1MB away,
4751 // so we can't use a conditional branch to reach this stub).
4758 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4760 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4761 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4762 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4766 // Stub used for b.w and bl.w instructions.
4768 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4770 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4773 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4775 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4778 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4779 // instruction (which switches to ARM mode) to point to this stub. Jump to
4780 // the real destination using an ARM-mode branch.
4781 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4783 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4786 // Stub used to provide an interworking for R_ARM_V4BX relocation
4787 // (bx r[n] instruction).
4788 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4790 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4791 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4792 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4795 // Fill in the stub template look-up table. Stub templates are constructed
4796 // per instance of Stub_factory for fast look-up without locking
4797 // in a thread-enabled environment.
4799 this->stub_templates_
[arm_stub_none
] =
4800 new Stub_template(arm_stub_none
, NULL
, 0);
4802 #define DEF_STUB(x) \
4806 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4807 Stub_type type = arm_stub_##x; \
4808 this->stub_templates_[type] = \
4809 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4817 // Stub_table methods.
4819 // Remove all Cortex-A8 stub.
4821 template<bool big_endian
>
4823 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4825 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4826 p
!= this->cortex_a8_stubs_
.end();
4829 this->cortex_a8_stubs_
.clear();
4832 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4834 template<bool big_endian
>
4836 Stub_table
<big_endian
>::relocate_stub(
4838 const Relocate_info
<32, big_endian
>* relinfo
,
4839 Target_arm
<big_endian
>* arm_target
,
4840 Output_section
* output_section
,
4841 unsigned char* view
,
4842 Arm_address address
,
4843 section_size_type view_size
)
4845 const Stub_template
* stub_template
= stub
->stub_template();
4846 if (stub_template
->reloc_count() != 0)
4848 // Adjust view to cover the stub only.
4849 section_size_type offset
= stub
->offset();
4850 section_size_type stub_size
= stub_template
->size();
4851 gold_assert(offset
+ stub_size
<= view_size
);
4853 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4854 address
+ offset
, stub_size
);
4858 // Relocate all stubs in this stub table.
4860 template<bool big_endian
>
4862 Stub_table
<big_endian
>::relocate_stubs(
4863 const Relocate_info
<32, big_endian
>* relinfo
,
4864 Target_arm
<big_endian
>* arm_target
,
4865 Output_section
* output_section
,
4866 unsigned char* view
,
4867 Arm_address address
,
4868 section_size_type view_size
)
4870 // If we are passed a view bigger than the stub table's. we need to
4872 gold_assert(address
== this->address()
4874 == static_cast<section_size_type
>(this->data_size())));
4876 // Relocate all relocation stubs.
4877 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4878 p
!= this->reloc_stubs_
.end();
4880 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4881 address
, view_size
);
4883 // Relocate all Cortex-A8 stubs.
4884 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4885 p
!= this->cortex_a8_stubs_
.end();
4887 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4888 address
, view_size
);
4890 // Relocate all ARM V4BX stubs.
4891 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
4892 p
!= this->arm_v4bx_stubs_
.end();
4896 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
4897 address
, view_size
);
4901 // Write out the stubs to file.
4903 template<bool big_endian
>
4905 Stub_table
<big_endian
>::do_write(Output_file
* of
)
4907 off_t offset
= this->offset();
4908 const section_size_type oview_size
=
4909 convert_to_section_size_type(this->data_size());
4910 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4912 // Write relocation stubs.
4913 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4914 p
!= this->reloc_stubs_
.end();
4917 Reloc_stub
* stub
= p
->second
;
4918 Arm_address address
= this->address() + stub
->offset();
4920 == align_address(address
,
4921 stub
->stub_template()->alignment()));
4922 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4926 // Write Cortex-A8 stubs.
4927 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4928 p
!= this->cortex_a8_stubs_
.end();
4931 Cortex_a8_stub
* stub
= p
->second
;
4932 Arm_address address
= this->address() + stub
->offset();
4934 == align_address(address
,
4935 stub
->stub_template()->alignment()));
4936 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4940 // Write ARM V4BX relocation stubs.
4941 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4942 p
!= this->arm_v4bx_stubs_
.end();
4948 Arm_address address
= this->address() + (*p
)->offset();
4950 == align_address(address
,
4951 (*p
)->stub_template()->alignment()));
4952 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
4956 of
->write_output_view(this->offset(), oview_size
, oview
);
4959 // Update the data size and address alignment of the stub table at the end
4960 // of a relaxation pass. Return true if either the data size or the
4961 // alignment changed in this relaxation pass.
4963 template<bool big_endian
>
4965 Stub_table
<big_endian
>::update_data_size_and_addralign()
4967 // Go over all stubs in table to compute data size and address alignment.
4968 off_t size
= this->reloc_stubs_size_
;
4969 unsigned addralign
= this->reloc_stubs_addralign_
;
4971 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4972 p
!= this->cortex_a8_stubs_
.end();
4975 const Stub_template
* stub_template
= p
->second
->stub_template();
4976 addralign
= std::max(addralign
, stub_template
->alignment());
4977 size
= (align_address(size
, stub_template
->alignment())
4978 + stub_template
->size());
4981 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4982 p
!= this->arm_v4bx_stubs_
.end();
4988 const Stub_template
* stub_template
= (*p
)->stub_template();
4989 addralign
= std::max(addralign
, stub_template
->alignment());
4990 size
= (align_address(size
, stub_template
->alignment())
4991 + stub_template
->size());
4994 // Check if either data size or alignment changed in this pass.
4995 // Update prev_data_size_ and prev_addralign_. These will be used
4996 // as the current data size and address alignment for the next pass.
4997 bool changed
= size
!= this->prev_data_size_
;
4998 this->prev_data_size_
= size
;
5000 if (addralign
!= this->prev_addralign_
)
5002 this->prev_addralign_
= addralign
;
5007 // Finalize the stubs. This sets the offsets of the stubs within the stub
5008 // table. It also marks all input sections needing Cortex-A8 workaround.
5010 template<bool big_endian
>
5012 Stub_table
<big_endian
>::finalize_stubs()
5014 off_t off
= this->reloc_stubs_size_
;
5015 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5016 p
!= this->cortex_a8_stubs_
.end();
5019 Cortex_a8_stub
* stub
= p
->second
;
5020 const Stub_template
* stub_template
= stub
->stub_template();
5021 uint64_t stub_addralign
= stub_template
->alignment();
5022 off
= align_address(off
, stub_addralign
);
5023 stub
->set_offset(off
);
5024 off
+= stub_template
->size();
5026 // Mark input section so that we can determine later if a code section
5027 // needs the Cortex-A8 workaround quickly.
5028 Arm_relobj
<big_endian
>* arm_relobj
=
5029 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5030 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5033 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5034 p
!= this->arm_v4bx_stubs_
.end();
5040 const Stub_template
* stub_template
= (*p
)->stub_template();
5041 uint64_t stub_addralign
= stub_template
->alignment();
5042 off
= align_address(off
, stub_addralign
);
5043 (*p
)->set_offset(off
);
5044 off
+= stub_template
->size();
5047 gold_assert(off
<= this->prev_data_size_
);
5050 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5051 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5052 // of the address range seen by the linker.
5054 template<bool big_endian
>
5056 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5057 Target_arm
<big_endian
>* arm_target
,
5058 unsigned char* view
,
5059 Arm_address view_address
,
5060 section_size_type view_size
)
5062 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5063 for (Cortex_a8_stub_list::const_iterator p
=
5064 this->cortex_a8_stubs_
.lower_bound(view_address
);
5065 ((p
!= this->cortex_a8_stubs_
.end())
5066 && (p
->first
< (view_address
+ view_size
)));
5069 // We do not store the THUMB bit in the LSB of either the branch address
5070 // or the stub offset. There is no need to strip the LSB.
5071 Arm_address branch_address
= p
->first
;
5072 const Cortex_a8_stub
* stub
= p
->second
;
5073 Arm_address stub_address
= this->address() + stub
->offset();
5075 // Offset of the branch instruction relative to this view.
5076 section_size_type offset
=
5077 convert_to_section_size_type(branch_address
- view_address
);
5078 gold_assert((offset
+ 4) <= view_size
);
5080 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5081 view
+ offset
, branch_address
);
5085 // Arm_input_section methods.
5087 // Initialize an Arm_input_section.
5089 template<bool big_endian
>
5091 Arm_input_section
<big_endian
>::init()
5093 Relobj
* relobj
= this->relobj();
5094 unsigned int shndx
= this->shndx();
5096 // We have to cache original size, alignment and contents to avoid locking
5097 // the original file.
5098 this->original_addralign_
=
5099 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5101 // This is not efficient but we expect only a small number of relaxed
5102 // input sections for stubs.
5103 section_size_type section_size
;
5104 const unsigned char* section_contents
=
5105 relobj
->section_contents(shndx
, §ion_size
, false);
5106 this->original_size_
=
5107 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5109 gold_assert(this->original_contents_
== NULL
);
5110 this->original_contents_
= new unsigned char[section_size
];
5111 memcpy(this->original_contents_
, section_contents
, section_size
);
5113 // We want to make this look like the original input section after
5114 // output sections are finalized.
5115 Output_section
* os
= relobj
->output_section(shndx
);
5116 off_t offset
= relobj
->output_section_offset(shndx
);
5117 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5118 this->set_address(os
->address() + offset
);
5119 this->set_file_offset(os
->offset() + offset
);
5121 this->set_current_data_size(this->original_size_
);
5122 this->finalize_data_size();
5125 template<bool big_endian
>
5127 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5129 // We have to write out the original section content.
5130 gold_assert(this->original_contents_
!= NULL
);
5131 of
->write(this->offset(), this->original_contents_
,
5132 this->original_size_
);
5134 // If this owns a stub table and it is not empty, write it.
5135 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5136 this->stub_table_
->write(of
);
5139 // Finalize data size.
5141 template<bool big_endian
>
5143 Arm_input_section
<big_endian
>::set_final_data_size()
5145 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5147 if (this->is_stub_table_owner())
5149 this->stub_table_
->finalize_data_size();
5150 off
= align_address(off
, this->stub_table_
->addralign());
5151 off
+= this->stub_table_
->data_size();
5153 this->set_data_size(off
);
5156 // Reset address and file offset.
5158 template<bool big_endian
>
5160 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5162 // Size of the original input section contents.
5163 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5165 // If this is a stub table owner, account for the stub table size.
5166 if (this->is_stub_table_owner())
5168 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5170 // Reset the stub table's address and file offset. The
5171 // current data size for child will be updated after that.
5172 stub_table_
->reset_address_and_file_offset();
5173 off
= align_address(off
, stub_table_
->addralign());
5174 off
+= stub_table
->current_data_size();
5177 this->set_current_data_size(off
);
5180 // Arm_exidx_cantunwind methods.
5182 // Write this to Output file OF for a fixed endianness.
5184 template<bool big_endian
>
5186 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5188 off_t offset
= this->offset();
5189 const section_size_type oview_size
= 8;
5190 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5192 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
5194 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5195 gold_assert(os
!= NULL
);
5197 Arm_relobj
<big_endian
>* arm_relobj
=
5198 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5199 Arm_address output_offset
=
5200 arm_relobj
->get_output_section_offset(this->shndx_
);
5201 Arm_address section_start
;
5202 section_size_type section_size
;
5204 // Find out the end of the text section referred by this.
5205 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5207 section_start
= os
->address() + output_offset
;
5208 const Arm_exidx_input_section
* exidx_input_section
=
5209 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5210 gold_assert(exidx_input_section
!= NULL
);
5212 convert_to_section_size_type(exidx_input_section
->text_size());
5216 // Currently this only happens for a relaxed section.
5217 const Output_relaxed_input_section
* poris
=
5218 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5219 gold_assert(poris
!= NULL
);
5220 section_start
= poris
->address();
5221 section_size
= convert_to_section_size_type(poris
->data_size());
5224 // We always append this to the end of an EXIDX section.
5225 Arm_address output_address
= section_start
+ section_size
;
5227 // Write out the entry. The first word either points to the beginning
5228 // or after the end of a text section. The second word is the special
5229 // EXIDX_CANTUNWIND value.
5230 uint32_t prel31_offset
= output_address
- this->address();
5231 if (Bits
<31>::has_overflow32(offset
))
5232 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5233 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
,
5234 prel31_offset
& 0x7fffffffU
);
5235 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
+ 4,
5236 elfcpp::EXIDX_CANTUNWIND
);
5238 of
->write_output_view(this->offset(), oview_size
, oview
);
5241 // Arm_exidx_merged_section methods.
5243 // Constructor for Arm_exidx_merged_section.
5244 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5245 // SECTION_OFFSET_MAP points to a section offset map describing how
5246 // parts of the input section are mapped to output. DELETED_BYTES is
5247 // the number of bytes deleted from the EXIDX input section.
5249 Arm_exidx_merged_section::Arm_exidx_merged_section(
5250 const Arm_exidx_input_section
& exidx_input_section
,
5251 const Arm_exidx_section_offset_map
& section_offset_map
,
5252 uint32_t deleted_bytes
)
5253 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5254 exidx_input_section
.shndx(),
5255 exidx_input_section
.addralign()),
5256 exidx_input_section_(exidx_input_section
),
5257 section_offset_map_(section_offset_map
)
5259 // If we retain or discard the whole EXIDX input section, we would
5261 gold_assert(deleted_bytes
!= 0
5262 && deleted_bytes
!= this->exidx_input_section_
.size());
5264 // Fix size here so that we do not need to implement set_final_data_size.
5265 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5266 this->set_data_size(size
);
5267 this->fix_data_size();
5269 // Allocate buffer for section contents and build contents.
5270 this->section_contents_
= new unsigned char[size
];
5273 // Build the contents of a merged EXIDX output section.
5276 Arm_exidx_merged_section::build_contents(
5277 const unsigned char* original_contents
,
5278 section_size_type original_size
)
5280 // Go over spans of input offsets and write only those that are not
5282 section_offset_type in_start
= 0;
5283 section_offset_type out_start
= 0;
5284 section_offset_type in_max
=
5285 convert_types
<section_offset_type
>(original_size
);
5286 section_offset_type out_max
=
5287 convert_types
<section_offset_type
>(this->data_size());
5288 for (Arm_exidx_section_offset_map::const_iterator p
=
5289 this->section_offset_map_
.begin();
5290 p
!= this->section_offset_map_
.end();
5293 section_offset_type in_end
= p
->first
;
5294 gold_assert(in_end
>= in_start
);
5295 section_offset_type out_end
= p
->second
;
5296 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5299 size_t out_chunk_size
=
5300 convert_types
<size_t>(out_end
- out_start
+ 1);
5302 gold_assert(out_chunk_size
== in_chunk_size
5303 && in_end
< in_max
&& out_end
< out_max
);
5305 memcpy(this->section_contents_
+ out_start
,
5306 original_contents
+ in_start
,
5308 out_start
+= out_chunk_size
;
5310 in_start
+= in_chunk_size
;
5314 // Given an input OBJECT, an input section index SHNDX within that
5315 // object, and an OFFSET relative to the start of that input
5316 // section, return whether or not the corresponding offset within
5317 // the output section is known. If this function returns true, it
5318 // sets *POUTPUT to the output offset. The value -1 indicates that
5319 // this input offset is being discarded.
5322 Arm_exidx_merged_section::do_output_offset(
5323 const Relobj
* relobj
,
5325 section_offset_type offset
,
5326 section_offset_type
* poutput
) const
5328 // We only handle offsets for the original EXIDX input section.
5329 if (relobj
!= this->exidx_input_section_
.relobj()
5330 || shndx
!= this->exidx_input_section_
.shndx())
5333 section_offset_type section_size
=
5334 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5335 if (offset
< 0 || offset
>= section_size
)
5336 // Input offset is out of valid range.
5340 // We need to look up the section offset map to determine the output
5341 // offset. Find the reference point in map that is first offset
5342 // bigger than or equal to this offset.
5343 Arm_exidx_section_offset_map::const_iterator p
=
5344 this->section_offset_map_
.lower_bound(offset
);
5346 // The section offset maps are build such that this should not happen if
5347 // input offset is in the valid range.
5348 gold_assert(p
!= this->section_offset_map_
.end());
5350 // We need to check if this is dropped.
5351 section_offset_type ref
= p
->first
;
5352 section_offset_type mapped_ref
= p
->second
;
5354 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5355 // Offset is present in output.
5356 *poutput
= mapped_ref
+ (offset
- ref
);
5358 // Offset is discarded owing to EXIDX entry merging.
5365 // Write this to output file OF.
5368 Arm_exidx_merged_section::do_write(Output_file
* of
)
5370 off_t offset
= this->offset();
5371 const section_size_type oview_size
= this->data_size();
5372 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5374 Output_section
* os
= this->relobj()->output_section(this->shndx());
5375 gold_assert(os
!= NULL
);
5377 memcpy(oview
, this->section_contents_
, oview_size
);
5378 of
->write_output_view(this->offset(), oview_size
, oview
);
5381 // Arm_exidx_fixup methods.
5383 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5384 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5385 // points to the end of the last seen EXIDX section.
5388 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5390 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5391 && this->last_input_section_
!= NULL
)
5393 Relobj
* relobj
= this->last_input_section_
->relobj();
5394 unsigned int text_shndx
= this->last_input_section_
->link();
5395 Arm_exidx_cantunwind
* cantunwind
=
5396 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5397 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5398 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5402 // Process an EXIDX section entry in input. Return whether this entry
5403 // can be deleted in the output. SECOND_WORD in the second word of the
5407 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5410 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5412 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5413 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5414 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5416 else if ((second_word
& 0x80000000) != 0)
5418 // Inlined unwinding data. Merge if equal to previous.
5419 delete_entry
= (merge_exidx_entries_
5420 && this->last_unwind_type_
== UT_INLINED_ENTRY
5421 && this->last_inlined_entry_
== second_word
);
5422 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5423 this->last_inlined_entry_
= second_word
;
5427 // Normal table entry. In theory we could merge these too,
5428 // but duplicate entries are likely to be much less common.
5429 delete_entry
= false;
5430 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5432 return delete_entry
;
5435 // Update the current section offset map during EXIDX section fix-up.
5436 // If there is no map, create one. INPUT_OFFSET is the offset of a
5437 // reference point, DELETED_BYTES is the number of deleted by in the
5438 // section so far. If DELETE_ENTRY is true, the reference point and
5439 // all offsets after the previous reference point are discarded.
5442 Arm_exidx_fixup::update_offset_map(
5443 section_offset_type input_offset
,
5444 section_size_type deleted_bytes
,
5447 if (this->section_offset_map_
== NULL
)
5448 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5449 section_offset_type output_offset
;
5451 output_offset
= Arm_exidx_input_section::invalid_offset
;
5453 output_offset
= input_offset
- deleted_bytes
;
5454 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5457 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5458 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5459 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5460 // If some entries are merged, also store a pointer to a newly created
5461 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5462 // owns the map and is responsible for releasing it after use.
5464 template<bool big_endian
>
5466 Arm_exidx_fixup::process_exidx_section(
5467 const Arm_exidx_input_section
* exidx_input_section
,
5468 const unsigned char* section_contents
,
5469 section_size_type section_size
,
5470 Arm_exidx_section_offset_map
** psection_offset_map
)
5472 Relobj
* relobj
= exidx_input_section
->relobj();
5473 unsigned shndx
= exidx_input_section
->shndx();
5475 if ((section_size
% 8) != 0)
5477 // Something is wrong with this section. Better not touch it.
5478 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5479 relobj
->name().c_str(), shndx
);
5480 this->last_input_section_
= exidx_input_section
;
5481 this->last_unwind_type_
= UT_NONE
;
5485 uint32_t deleted_bytes
= 0;
5486 bool prev_delete_entry
= false;
5487 gold_assert(this->section_offset_map_
== NULL
);
5489 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5491 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5493 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5494 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5496 bool delete_entry
= this->process_exidx_entry(second_word
);
5498 // Entry deletion causes changes in output offsets. We use a std::map
5499 // to record these. And entry (x, y) means input offset x
5500 // is mapped to output offset y. If y is invalid_offset, then x is
5501 // dropped in the output. Because of the way std::map::lower_bound
5502 // works, we record the last offset in a region w.r.t to keeping or
5503 // dropping. If there is no entry (x0, y0) for an input offset x0,
5504 // the output offset y0 of it is determined by the output offset y1 of
5505 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5506 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5508 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5509 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5511 // Update total deleted bytes for this entry.
5515 prev_delete_entry
= delete_entry
;
5518 // If section offset map is not NULL, make an entry for the end of
5520 if (this->section_offset_map_
!= NULL
)
5521 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5523 *psection_offset_map
= this->section_offset_map_
;
5524 this->section_offset_map_
= NULL
;
5525 this->last_input_section_
= exidx_input_section
;
5527 // Set the first output text section so that we can link the EXIDX output
5528 // section to it. Ignore any EXIDX input section that is completely merged.
5529 if (this->first_output_text_section_
== NULL
5530 && deleted_bytes
!= section_size
)
5532 unsigned int link
= exidx_input_section
->link();
5533 Output_section
* os
= relobj
->output_section(link
);
5534 gold_assert(os
!= NULL
);
5535 this->first_output_text_section_
= os
;
5538 return deleted_bytes
;
5541 // Arm_output_section methods.
5543 // Create a stub group for input sections from BEGIN to END. OWNER
5544 // points to the input section to be the owner a new stub table.
5546 template<bool big_endian
>
5548 Arm_output_section
<big_endian
>::create_stub_group(
5549 Input_section_list::const_iterator begin
,
5550 Input_section_list::const_iterator end
,
5551 Input_section_list::const_iterator owner
,
5552 Target_arm
<big_endian
>* target
,
5553 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5556 // We use a different kind of relaxed section in an EXIDX section.
5557 // The static casting from Output_relaxed_input_section to
5558 // Arm_input_section is invalid in an EXIDX section. We are okay
5559 // because we should not be calling this for an EXIDX section.
5560 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5562 // Currently we convert ordinary input sections into relaxed sections only
5563 // at this point but we may want to support creating relaxed input section
5564 // very early. So we check here to see if owner is already a relaxed
5567 Arm_input_section
<big_endian
>* arm_input_section
;
5568 if (owner
->is_relaxed_input_section())
5571 Arm_input_section
<big_endian
>::as_arm_input_section(
5572 owner
->relaxed_input_section());
5576 gold_assert(owner
->is_input_section());
5577 // Create a new relaxed input section. We need to lock the original
5579 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5581 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5582 new_relaxed_sections
->push_back(arm_input_section
);
5585 // Create a stub table.
5586 Stub_table
<big_endian
>* stub_table
=
5587 target
->new_stub_table(arm_input_section
);
5589 arm_input_section
->set_stub_table(stub_table
);
5591 Input_section_list::const_iterator p
= begin
;
5592 Input_section_list::const_iterator prev_p
;
5594 // Look for input sections or relaxed input sections in [begin ... end].
5597 if (p
->is_input_section() || p
->is_relaxed_input_section())
5599 // The stub table information for input sections live
5600 // in their objects.
5601 Arm_relobj
<big_endian
>* arm_relobj
=
5602 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5603 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5607 while (prev_p
!= end
);
5610 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5611 // of stub groups. We grow a stub group by adding input section until the
5612 // size is just below GROUP_SIZE. The last input section will be converted
5613 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5614 // input section after the stub table, effectively double the group size.
5616 // This is similar to the group_sections() function in elf32-arm.c but is
5617 // implemented differently.
5619 template<bool big_endian
>
5621 Arm_output_section
<big_endian
>::group_sections(
5622 section_size_type group_size
,
5623 bool stubs_always_after_branch
,
5624 Target_arm
<big_endian
>* target
,
5627 // We only care about sections containing code.
5628 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5631 // States for grouping.
5634 // No group is being built.
5636 // A group is being built but the stub table is not found yet.
5637 // We keep group a stub group until the size is just under GROUP_SIZE.
5638 // The last input section in the group will be used as the stub table.
5639 FINDING_STUB_SECTION
,
5640 // A group is being built and we have already found a stub table.
5641 // We enter this state to grow a stub group by adding input section
5642 // after the stub table. This effectively doubles the group size.
5646 // Any newly created relaxed sections are stored here.
5647 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5649 State state
= NO_GROUP
;
5650 section_size_type off
= 0;
5651 section_size_type group_begin_offset
= 0;
5652 section_size_type group_end_offset
= 0;
5653 section_size_type stub_table_end_offset
= 0;
5654 Input_section_list::const_iterator group_begin
=
5655 this->input_sections().end();
5656 Input_section_list::const_iterator stub_table
=
5657 this->input_sections().end();
5658 Input_section_list::const_iterator group_end
= this->input_sections().end();
5659 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5660 p
!= this->input_sections().end();
5663 section_size_type section_begin_offset
=
5664 align_address(off
, p
->addralign());
5665 section_size_type section_end_offset
=
5666 section_begin_offset
+ p
->data_size();
5668 // Check to see if we should group the previously seen sections.
5674 case FINDING_STUB_SECTION
:
5675 // Adding this section makes the group larger than GROUP_SIZE.
5676 if (section_end_offset
- group_begin_offset
>= group_size
)
5678 if (stubs_always_after_branch
)
5680 gold_assert(group_end
!= this->input_sections().end());
5681 this->create_stub_group(group_begin
, group_end
, group_end
,
5682 target
, &new_relaxed_sections
,
5688 // But wait, there's more! Input sections up to
5689 // stub_group_size bytes after the stub table can be
5690 // handled by it too.
5691 state
= HAS_STUB_SECTION
;
5692 stub_table
= group_end
;
5693 stub_table_end_offset
= group_end_offset
;
5698 case HAS_STUB_SECTION
:
5699 // Adding this section makes the post stub-section group larger
5701 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5703 gold_assert(group_end
!= this->input_sections().end());
5704 this->create_stub_group(group_begin
, group_end
, stub_table
,
5705 target
, &new_relaxed_sections
, task
);
5714 // If we see an input section and currently there is no group, start
5715 // a new one. Skip any empty sections. We look at the data size
5716 // instead of calling p->relobj()->section_size() to avoid locking.
5717 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5718 && (p
->data_size() != 0))
5720 if (state
== NO_GROUP
)
5722 state
= FINDING_STUB_SECTION
;
5724 group_begin_offset
= section_begin_offset
;
5727 // Keep track of the last input section seen.
5729 group_end_offset
= section_end_offset
;
5732 off
= section_end_offset
;
5735 // Create a stub group for any ungrouped sections.
5736 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5738 gold_assert(group_end
!= this->input_sections().end());
5739 this->create_stub_group(group_begin
, group_end
,
5740 (state
== FINDING_STUB_SECTION
5743 target
, &new_relaxed_sections
, task
);
5746 // Convert input section into relaxed input section in a batch.
5747 if (!new_relaxed_sections
.empty())
5748 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5750 // Update the section offsets
5751 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5753 Arm_relobj
<big_endian
>* arm_relobj
=
5754 Arm_relobj
<big_endian
>::as_arm_relobj(
5755 new_relaxed_sections
[i
]->relobj());
5756 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5757 // Tell Arm_relobj that this input section is converted.
5758 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5762 // Append non empty text sections in this to LIST in ascending
5763 // order of their position in this.
5765 template<bool big_endian
>
5767 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5768 Text_section_list
* list
)
5770 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5772 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5773 p
!= this->input_sections().end();
5776 // We only care about plain or relaxed input sections. We also
5777 // ignore any merged sections.
5778 if (p
->is_input_section() || p
->is_relaxed_input_section())
5779 list
->push_back(Text_section_list::value_type(p
->relobj(),
5784 template<bool big_endian
>
5786 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5788 const Text_section_list
& sorted_text_sections
,
5789 Symbol_table
* symtab
,
5790 bool merge_exidx_entries
,
5793 // We should only do this for the EXIDX output section.
5794 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5796 // We don't want the relaxation loop to undo these changes, so we discard
5797 // the current saved states and take another one after the fix-up.
5798 this->discard_states();
5800 // Remove all input sections.
5801 uint64_t address
= this->address();
5802 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5803 Input_section_list input_sections
;
5804 this->reset_address_and_file_offset();
5805 this->get_input_sections(address
, std::string(""), &input_sections
);
5807 if (!this->input_sections().empty())
5808 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5810 // Go through all the known input sections and record them.
5811 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5812 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5813 Section_id_hash
> Text_to_exidx_map
;
5814 Text_to_exidx_map text_to_exidx_map
;
5815 for (Input_section_list::const_iterator p
= input_sections
.begin();
5816 p
!= input_sections
.end();
5819 // This should never happen. At this point, we should only see
5820 // plain EXIDX input sections.
5821 gold_assert(!p
->is_relaxed_input_section());
5822 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
5825 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
5827 // Go over the sorted text sections.
5828 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5829 Section_id_set processed_input_sections
;
5830 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5831 p
!= sorted_text_sections
.end();
5834 Relobj
* relobj
= p
->first
;
5835 unsigned int shndx
= p
->second
;
5837 Arm_relobj
<big_endian
>* arm_relobj
=
5838 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5839 const Arm_exidx_input_section
* exidx_input_section
=
5840 arm_relobj
->exidx_input_section_by_link(shndx
);
5842 // If this text section has no EXIDX section or if the EXIDX section
5843 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5844 // of the last seen EXIDX section.
5845 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
5847 exidx_fixup
.add_exidx_cantunwind_as_needed();
5851 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5852 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5853 Section_id
sid(exidx_relobj
, exidx_shndx
);
5854 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
5855 if (iter
== text_to_exidx_map
.end())
5857 // This is odd. We have not seen this EXIDX input section before.
5858 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5859 // issue a warning instead. We assume the user knows what he
5860 // or she is doing. Otherwise, this is an error.
5861 if (layout
->script_options()->saw_sections_clause())
5862 gold_warning(_("unwinding may not work because EXIDX input section"
5863 " %u of %s is not in EXIDX output section"),
5864 exidx_shndx
, exidx_relobj
->name().c_str());
5866 gold_error(_("unwinding may not work because EXIDX input section"
5867 " %u of %s is not in EXIDX output section"),
5868 exidx_shndx
, exidx_relobj
->name().c_str());
5870 exidx_fixup
.add_exidx_cantunwind_as_needed();
5874 // We need to access the contents of the EXIDX section, lock the
5876 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
5877 section_size_type exidx_size
;
5878 const unsigned char* exidx_contents
=
5879 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
5881 // Fix up coverage and append input section to output data list.
5882 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
5883 uint32_t deleted_bytes
=
5884 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
5887 §ion_offset_map
);
5889 if (deleted_bytes
== exidx_input_section
->size())
5891 // The whole EXIDX section got merged. Remove it from output.
5892 gold_assert(section_offset_map
== NULL
);
5893 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
5895 // All local symbols defined in this input section will be dropped.
5896 // We need to adjust output local symbol count.
5897 arm_relobj
->set_output_local_symbol_count_needs_update();
5899 else if (deleted_bytes
> 0)
5901 // Some entries are merged. We need to convert this EXIDX input
5902 // section into a relaxed section.
5903 gold_assert(section_offset_map
!= NULL
);
5905 Arm_exidx_merged_section
* merged_section
=
5906 new Arm_exidx_merged_section(*exidx_input_section
,
5907 *section_offset_map
, deleted_bytes
);
5908 merged_section
->build_contents(exidx_contents
, exidx_size
);
5910 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
5911 this->add_relaxed_input_section(layout
, merged_section
, secname
);
5912 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
5914 // All local symbols defined in discarded portions of this input
5915 // section will be dropped. We need to adjust output local symbol
5917 arm_relobj
->set_output_local_symbol_count_needs_update();
5921 // Just add back the EXIDX input section.
5922 gold_assert(section_offset_map
== NULL
);
5923 const Output_section::Input_section
* pis
= iter
->second
;
5924 gold_assert(pis
->is_input_section());
5925 this->add_script_input_section(*pis
);
5928 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
5931 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5932 exidx_fixup
.add_exidx_cantunwind_as_needed();
5934 // Remove any known EXIDX input sections that are not processed.
5935 for (Input_section_list::const_iterator p
= input_sections
.begin();
5936 p
!= input_sections
.end();
5939 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
5940 == processed_input_sections
.end())
5942 // We discard a known EXIDX section because its linked
5943 // text section has been folded by ICF. We also discard an
5944 // EXIDX section with error, the output does not matter in this
5945 // case. We do this to avoid triggering asserts.
5946 Arm_relobj
<big_endian
>* arm_relobj
=
5947 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5948 const Arm_exidx_input_section
* exidx_input_section
=
5949 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
5950 gold_assert(exidx_input_section
!= NULL
);
5951 if (!exidx_input_section
->has_errors())
5953 unsigned int text_shndx
= exidx_input_section
->link();
5954 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
5957 // Remove this from link. We also need to recount the
5959 p
->relobj()->set_output_section(p
->shndx(), NULL
);
5960 arm_relobj
->set_output_local_symbol_count_needs_update();
5964 // Link exidx output section to the first seen output section and
5965 // set correct entry size.
5966 this->set_link_section(exidx_fixup
.first_output_text_section());
5967 this->set_entsize(8);
5969 // Make changes permanent.
5970 this->save_states();
5971 this->set_section_offsets_need_adjustment();
5974 // Link EXIDX output sections to text output sections.
5976 template<bool big_endian
>
5978 Arm_output_section
<big_endian
>::set_exidx_section_link()
5980 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5981 if (!this->input_sections().empty())
5983 Input_section_list::const_iterator p
= this->input_sections().begin();
5984 Arm_relobj
<big_endian
>* arm_relobj
=
5985 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5986 unsigned exidx_shndx
= p
->shndx();
5987 const Arm_exidx_input_section
* exidx_input_section
=
5988 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
5989 gold_assert(exidx_input_section
!= NULL
);
5990 unsigned int text_shndx
= exidx_input_section
->link();
5991 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
5992 this->set_link_section(os
);
5996 // Arm_relobj methods.
5998 // Determine if an input section is scannable for stub processing. SHDR is
5999 // the header of the section and SHNDX is the section index. OS is the output
6000 // section for the input section and SYMTAB is the global symbol table used to
6001 // look up ICF information.
6003 template<bool big_endian
>
6005 Arm_relobj
<big_endian
>::section_is_scannable(
6006 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6008 const Output_section
* os
,
6009 const Symbol_table
* symtab
)
6011 // Skip any empty sections, unallocated sections or sections whose
6012 // type are not SHT_PROGBITS.
6013 if (shdr
.get_sh_size() == 0
6014 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6015 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6018 // Skip any discarded or ICF'ed sections.
6019 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6022 // If this requires special offset handling, check to see if it is
6023 // a relaxed section. If this is not, then it is a merged section that
6024 // we cannot handle.
6025 if (this->is_output_section_offset_invalid(shndx
))
6027 const Output_relaxed_input_section
* poris
=
6028 os
->find_relaxed_input_section(this, shndx
);
6036 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6037 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6039 template<bool big_endian
>
6041 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6042 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6043 const Relobj::Output_sections
& out_sections
,
6044 const Symbol_table
* symtab
,
6045 const unsigned char* pshdrs
)
6047 unsigned int sh_type
= shdr
.get_sh_type();
6048 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6051 // Ignore empty section.
6052 off_t sh_size
= shdr
.get_sh_size();
6056 // Ignore reloc section with unexpected symbol table. The
6057 // error will be reported in the final link.
6058 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6061 unsigned int reloc_size
;
6062 if (sh_type
== elfcpp::SHT_REL
)
6063 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6065 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6067 // Ignore reloc section with unexpected entsize or uneven size.
6068 // The error will be reported in the final link.
6069 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6072 // Ignore reloc section with bad info. This error will be
6073 // reported in the final link.
6074 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6075 if (index
>= this->shnum())
6078 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6079 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6080 return this->section_is_scannable(text_shdr
, index
,
6081 out_sections
[index
], symtab
);
6084 // Return the output address of either a plain input section or a relaxed
6085 // input section. SHNDX is the section index. We define and use this
6086 // instead of calling Output_section::output_address because that is slow
6087 // for large output.
6089 template<bool big_endian
>
6091 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6095 if (this->is_output_section_offset_invalid(shndx
))
6097 const Output_relaxed_input_section
* poris
=
6098 os
->find_relaxed_input_section(this, shndx
);
6099 // We do not handle merged sections here.
6100 gold_assert(poris
!= NULL
);
6101 return poris
->address();
6104 return os
->address() + this->get_output_section_offset(shndx
);
6107 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6108 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6110 template<bool big_endian
>
6112 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6113 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6116 const Symbol_table
* symtab
)
6118 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6121 // If the section does not cross any 4K-boundaries, it does not need to
6123 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6124 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6130 // Scan a section for Cortex-A8 workaround.
6132 template<bool big_endian
>
6134 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6135 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6138 Target_arm
<big_endian
>* arm_target
)
6140 // Look for the first mapping symbol in this section. It should be
6142 Mapping_symbol_position
section_start(shndx
, 0);
6143 typename
Mapping_symbols_info::const_iterator p
=
6144 this->mapping_symbols_info_
.lower_bound(section_start
);
6146 // There are no mapping symbols for this section. Treat it as a data-only
6147 // section. Issue a warning if section is marked as containing
6149 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6151 if ((this->section_flags(shndx
) & elfcpp::SHF_EXECINSTR
) != 0)
6152 gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6153 "erratum because it has no mapping symbols."),
6154 shndx
, this->name().c_str());
6158 Arm_address output_address
=
6159 this->simple_input_section_output_address(shndx
, os
);
6161 // Get the section contents.
6162 section_size_type input_view_size
= 0;
6163 const unsigned char* input_view
=
6164 this->section_contents(shndx
, &input_view_size
, false);
6166 // We need to go through the mapping symbols to determine what to
6167 // scan. There are two reasons. First, we should look at THUMB code and
6168 // THUMB code only. Second, we only want to look at the 4K-page boundary
6169 // to speed up the scanning.
6171 while (p
!= this->mapping_symbols_info_
.end()
6172 && p
->first
.first
== shndx
)
6174 typename
Mapping_symbols_info::const_iterator next
=
6175 this->mapping_symbols_info_
.upper_bound(p
->first
);
6177 // Only scan part of a section with THUMB code.
6178 if (p
->second
== 't')
6180 // Determine the end of this range.
6181 section_size_type span_start
=
6182 convert_to_section_size_type(p
->first
.second
);
6183 section_size_type span_end
;
6184 if (next
!= this->mapping_symbols_info_
.end()
6185 && next
->first
.first
== shndx
)
6186 span_end
= convert_to_section_size_type(next
->first
.second
);
6188 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6190 if (((span_start
+ output_address
) & ~0xfffUL
)
6191 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6193 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6194 span_start
, span_end
,
6204 // Scan relocations for stub generation.
6206 template<bool big_endian
>
6208 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6209 Target_arm
<big_endian
>* arm_target
,
6210 const Symbol_table
* symtab
,
6211 const Layout
* layout
)
6213 unsigned int shnum
= this->shnum();
6214 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6216 // Read the section headers.
6217 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6221 // To speed up processing, we set up hash tables for fast lookup of
6222 // input offsets to output addresses.
6223 this->initialize_input_to_output_maps();
6225 const Relobj::Output_sections
& out_sections(this->output_sections());
6227 Relocate_info
<32, big_endian
> relinfo
;
6228 relinfo
.symtab
= symtab
;
6229 relinfo
.layout
= layout
;
6230 relinfo
.object
= this;
6232 // Do relocation stubs scanning.
6233 const unsigned char* p
= pshdrs
+ shdr_size
;
6234 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6236 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6237 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6240 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6241 Arm_address output_offset
= this->get_output_section_offset(index
);
6242 Arm_address output_address
;
6243 if (output_offset
!= invalid_address
)
6244 output_address
= out_sections
[index
]->address() + output_offset
;
6247 // Currently this only happens for a relaxed section.
6248 const Output_relaxed_input_section
* poris
=
6249 out_sections
[index
]->find_relaxed_input_section(this, index
);
6250 gold_assert(poris
!= NULL
);
6251 output_address
= poris
->address();
6254 // Get the relocations.
6255 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6259 // Get the section contents. This does work for the case in which
6260 // we modify the contents of an input section. We need to pass the
6261 // output view under such circumstances.
6262 section_size_type input_view_size
= 0;
6263 const unsigned char* input_view
=
6264 this->section_contents(index
, &input_view_size
, false);
6266 relinfo
.reloc_shndx
= i
;
6267 relinfo
.data_shndx
= index
;
6268 unsigned int sh_type
= shdr
.get_sh_type();
6269 unsigned int reloc_size
;
6270 if (sh_type
== elfcpp::SHT_REL
)
6271 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6273 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6275 Output_section
* os
= out_sections
[index
];
6276 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6277 shdr
.get_sh_size() / reloc_size
,
6279 output_offset
== invalid_address
,
6280 input_view
, output_address
,
6285 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6286 // after its relocation section, if there is one, is processed for
6287 // relocation stubs. Merging this loop with the one above would have been
6288 // complicated since we would have had to make sure that relocation stub
6289 // scanning is done first.
6290 if (arm_target
->fix_cortex_a8())
6292 const unsigned char* p
= pshdrs
+ shdr_size
;
6293 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6295 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6296 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6299 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6304 // After we've done the relocations, we release the hash tables,
6305 // since we no longer need them.
6306 this->free_input_to_output_maps();
6309 // Count the local symbols. The ARM backend needs to know if a symbol
6310 // is a THUMB function or not. For global symbols, it is easy because
6311 // the Symbol object keeps the ELF symbol type. For local symbol it is
6312 // harder because we cannot access this information. So we override the
6313 // do_count_local_symbol in parent and scan local symbols to mark
6314 // THUMB functions. This is not the most efficient way but I do not want to
6315 // slow down other ports by calling a per symbol target hook inside
6316 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6318 template<bool big_endian
>
6320 Arm_relobj
<big_endian
>::do_count_local_symbols(
6321 Stringpool_template
<char>* pool
,
6322 Stringpool_template
<char>* dynpool
)
6324 // We need to fix-up the values of any local symbols whose type are
6327 // Ask parent to count the local symbols.
6328 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6329 const unsigned int loccount
= this->local_symbol_count();
6333 // Initialize the thumb function bit-vector.
6334 std::vector
<bool> empty_vector(loccount
, false);
6335 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6337 // Read the symbol table section header.
6338 const unsigned int symtab_shndx
= this->symtab_shndx();
6339 elfcpp::Shdr
<32, big_endian
>
6340 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6341 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6343 // Read the local symbols.
6344 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6345 gold_assert(loccount
== symtabshdr
.get_sh_info());
6346 off_t locsize
= loccount
* sym_size
;
6347 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6348 locsize
, true, true);
6350 // For mapping symbol processing, we need to read the symbol names.
6351 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6352 if (strtab_shndx
>= this->shnum())
6354 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6358 elfcpp::Shdr
<32, big_endian
>
6359 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6360 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6362 this->error(_("symbol table name section has wrong type: %u"),
6363 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6366 const char* pnames
=
6367 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6368 strtabshdr
.get_sh_size(),
6371 // Loop over the local symbols and mark any local symbols pointing
6372 // to THUMB functions.
6374 // Skip the first dummy symbol.
6376 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6377 this->local_values();
6378 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6380 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6381 elfcpp::STT st_type
= sym
.get_st_type();
6382 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6383 Arm_address input_value
= lv
.input_value();
6385 // Check to see if this is a mapping symbol.
6386 const char* sym_name
= pnames
+ sym
.get_st_name();
6387 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6390 unsigned int input_shndx
=
6391 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6392 gold_assert(is_ordinary
);
6394 // Strip of LSB in case this is a THUMB symbol.
6395 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6396 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6399 if (st_type
== elfcpp::STT_ARM_TFUNC
6400 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6402 // This is a THUMB function. Mark this and canonicalize the
6403 // symbol value by setting LSB.
6404 this->local_symbol_is_thumb_function_
[i
] = true;
6405 if ((input_value
& 1) == 0)
6406 lv
.set_input_value(input_value
| 1);
6411 // Relocate sections.
6412 template<bool big_endian
>
6414 Arm_relobj
<big_endian
>::do_relocate_sections(
6415 const Symbol_table
* symtab
,
6416 const Layout
* layout
,
6417 const unsigned char* pshdrs
,
6419 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6421 // Call parent to relocate sections.
6422 Sized_relobj_file
<32, big_endian
>::do_relocate_sections(symtab
, layout
,
6423 pshdrs
, of
, pviews
);
6425 // We do not generate stubs if doing a relocatable link.
6426 if (parameters
->options().relocatable())
6429 // Relocate stub tables.
6430 unsigned int shnum
= this->shnum();
6432 Target_arm
<big_endian
>* arm_target
=
6433 Target_arm
<big_endian
>::default_target();
6435 Relocate_info
<32, big_endian
> relinfo
;
6436 relinfo
.symtab
= symtab
;
6437 relinfo
.layout
= layout
;
6438 relinfo
.object
= this;
6440 for (unsigned int i
= 1; i
< shnum
; ++i
)
6442 Arm_input_section
<big_endian
>* arm_input_section
=
6443 arm_target
->find_arm_input_section(this, i
);
6445 if (arm_input_section
!= NULL
6446 && arm_input_section
->is_stub_table_owner()
6447 && !arm_input_section
->stub_table()->empty())
6449 // We cannot discard a section if it owns a stub table.
6450 Output_section
* os
= this->output_section(i
);
6451 gold_assert(os
!= NULL
);
6453 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6454 relinfo
.reloc_shdr
= NULL
;
6455 relinfo
.data_shndx
= i
;
6456 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6458 gold_assert((*pviews
)[i
].view
!= NULL
);
6460 // We are passed the output section view. Adjust it to cover the
6462 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6463 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6464 && ((stub_table
->address() + stub_table
->data_size())
6465 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6467 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6468 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6469 Arm_address address
= stub_table
->address();
6470 section_size_type view_size
= stub_table
->data_size();
6472 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6476 // Apply Cortex A8 workaround if applicable.
6477 if (this->section_has_cortex_a8_workaround(i
))
6479 unsigned char* view
= (*pviews
)[i
].view
;
6480 Arm_address view_address
= (*pviews
)[i
].address
;
6481 section_size_type view_size
= (*pviews
)[i
].view_size
;
6482 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6484 // Adjust view to cover section.
6485 Output_section
* os
= this->output_section(i
);
6486 gold_assert(os
!= NULL
);
6487 Arm_address section_address
=
6488 this->simple_input_section_output_address(i
, os
);
6489 uint64_t section_size
= this->section_size(i
);
6491 gold_assert(section_address
>= view_address
6492 && ((section_address
+ section_size
)
6493 <= (view_address
+ view_size
)));
6495 unsigned char* section_view
= view
+ (section_address
- view_address
);
6497 // Apply the Cortex-A8 workaround to the output address range
6498 // corresponding to this input section.
6499 stub_table
->apply_cortex_a8_workaround_to_address_range(
6508 // Find the linked text section of an EXIDX section by looking at the first
6509 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6510 // must be linked to its associated code section via the sh_link field of
6511 // its section header. However, some tools are broken and the link is not
6512 // always set. LD just drops such an EXIDX section silently, causing the
6513 // associated code not unwindabled. Here we try a little bit harder to
6514 // discover the linked code section.
6516 // PSHDR points to the section header of a relocation section of an EXIDX
6517 // section. If we can find a linked text section, return true and
6518 // store the text section index in the location PSHNDX. Otherwise
6521 template<bool big_endian
>
6523 Arm_relobj
<big_endian
>::find_linked_text_section(
6524 const unsigned char* pshdr
,
6525 const unsigned char* psyms
,
6526 unsigned int* pshndx
)
6528 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6530 // If there is no relocation, we cannot find the linked text section.
6532 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6533 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6535 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6536 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6538 // Get the relocations.
6539 const unsigned char* prelocs
=
6540 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6542 // Find the REL31 relocation for the first word of the first EXIDX entry.
6543 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6545 Arm_address r_offset
;
6546 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6547 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6549 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6550 r_info
= reloc
.get_r_info();
6551 r_offset
= reloc
.get_r_offset();
6555 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6556 r_info
= reloc
.get_r_info();
6557 r_offset
= reloc
.get_r_offset();
6560 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6561 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6564 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6566 || r_sym
>= this->local_symbol_count()
6570 // This is the relocation for the first word of the first EXIDX entry.
6571 // We expect to see a local section symbol.
6572 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6573 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6574 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6578 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6579 gold_assert(is_ordinary
);
6589 // Make an EXIDX input section object for an EXIDX section whose index is
6590 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6591 // is the section index of the linked text section.
6593 template<bool big_endian
>
6595 Arm_relobj
<big_endian
>::make_exidx_input_section(
6597 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6598 unsigned int text_shndx
,
6599 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6601 // Create an Arm_exidx_input_section object for this EXIDX section.
6602 Arm_exidx_input_section
* exidx_input_section
=
6603 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6604 shdr
.get_sh_addralign(),
6605 text_shdr
.get_sh_size());
6607 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6608 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6610 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6612 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6613 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6614 this->name().c_str());
6615 exidx_input_section
->set_has_errors();
6617 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6619 unsigned other_exidx_shndx
=
6620 this->exidx_section_map_
[text_shndx
]->shndx();
6621 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6623 this->section_name(shndx
).c_str(), shndx
,
6624 this->section_name(other_exidx_shndx
).c_str(),
6625 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6626 text_shndx
, this->name().c_str());
6627 exidx_input_section
->set_has_errors();
6630 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6632 // Check section flags of text section.
6633 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6635 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6637 this->section_name(shndx
).c_str(), shndx
,
6638 this->section_name(text_shndx
).c_str(), text_shndx
,
6639 this->name().c_str());
6640 exidx_input_section
->set_has_errors();
6642 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6643 // I would like to make this an error but currently ld just ignores
6645 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6647 this->section_name(shndx
).c_str(), shndx
,
6648 this->section_name(text_shndx
).c_str(), text_shndx
,
6649 this->name().c_str());
6652 // Read the symbol information.
6654 template<bool big_endian
>
6656 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6658 // Call parent class to read symbol information.
6659 Sized_relobj_file
<32, big_endian
>::do_read_symbols(sd
);
6661 // If this input file is a binary file, it has no processor
6662 // specific flags and attributes section.
6663 Input_file::Format format
= this->input_file()->format();
6664 if (format
!= Input_file::FORMAT_ELF
)
6666 gold_assert(format
== Input_file::FORMAT_BINARY
);
6667 this->merge_flags_and_attributes_
= false;
6671 // Read processor-specific flags in ELF file header.
6672 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6673 elfcpp::Elf_sizes
<32>::ehdr_size
,
6675 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6676 this->processor_specific_flags_
= ehdr
.get_e_flags();
6678 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6680 std::vector
<unsigned int> deferred_exidx_sections
;
6681 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6682 const unsigned char* pshdrs
= sd
->section_headers
->data();
6683 const unsigned char* ps
= pshdrs
+ shdr_size
;
6684 bool must_merge_flags_and_attributes
= false;
6685 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6687 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6689 // Sometimes an object has no contents except the section name string
6690 // table and an empty symbol table with the undefined symbol. We
6691 // don't want to merge processor-specific flags from such an object.
6692 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6694 // Symbol table is not empty.
6695 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6696 elfcpp::Elf_sizes
<32>::sym_size
;
6697 if (shdr
.get_sh_size() > sym_size
)
6698 must_merge_flags_and_attributes
= true;
6700 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6701 // If this is neither an empty symbol table nor a string table,
6703 must_merge_flags_and_attributes
= true;
6705 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6707 gold_assert(this->attributes_section_data_
== NULL
);
6708 section_offset_type section_offset
= shdr
.get_sh_offset();
6709 section_size_type section_size
=
6710 convert_to_section_size_type(shdr
.get_sh_size());
6711 const unsigned char* view
=
6712 this->get_view(section_offset
, section_size
, true, false);
6713 this->attributes_section_data_
=
6714 new Attributes_section_data(view
, section_size
);
6716 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6718 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6719 if (text_shndx
== elfcpp::SHN_UNDEF
)
6720 deferred_exidx_sections
.push_back(i
);
6723 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6724 + text_shndx
* shdr_size
);
6725 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6727 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6728 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6729 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6730 this->section_name(i
).c_str(), this->name().c_str());
6735 if (!must_merge_flags_and_attributes
)
6737 gold_assert(deferred_exidx_sections
.empty());
6738 this->merge_flags_and_attributes_
= false;
6742 // Some tools are broken and they do not set the link of EXIDX sections.
6743 // We look at the first relocation to figure out the linked sections.
6744 if (!deferred_exidx_sections
.empty())
6746 // We need to go over the section headers again to find the mapping
6747 // from sections being relocated to their relocation sections. This is
6748 // a bit inefficient as we could do that in the loop above. However,
6749 // we do not expect any deferred EXIDX sections normally. So we do not
6750 // want to slow down the most common path.
6751 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6752 Reloc_map reloc_map
;
6753 ps
= pshdrs
+ shdr_size
;
6754 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6756 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6757 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
6758 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
6760 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
6761 if (info_shndx
>= this->shnum())
6762 gold_error(_("relocation section %u has invalid info %u"),
6764 Reloc_map::value_type
value(info_shndx
, i
);
6765 std::pair
<Reloc_map::iterator
, bool> result
=
6766 reloc_map
.insert(value
);
6768 gold_error(_("section %u has multiple relocation sections "
6770 info_shndx
, i
, reloc_map
[info_shndx
]);
6774 // Read the symbol table section header.
6775 const unsigned int symtab_shndx
= this->symtab_shndx();
6776 elfcpp::Shdr
<32, big_endian
>
6777 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6778 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6780 // Read the local symbols.
6781 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6782 const unsigned int loccount
= this->local_symbol_count();
6783 gold_assert(loccount
== symtabshdr
.get_sh_info());
6784 off_t locsize
= loccount
* sym_size
;
6785 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6786 locsize
, true, true);
6788 // Process the deferred EXIDX sections.
6789 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
6791 unsigned int shndx
= deferred_exidx_sections
[i
];
6792 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
6793 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
6794 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
6795 if (it
!= reloc_map
.end())
6796 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
6797 psyms
, &text_shndx
);
6798 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6799 + text_shndx
* shdr_size
);
6800 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
6805 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6806 // sections for unwinding. These sections are referenced implicitly by
6807 // text sections linked in the section headers. If we ignore these implicit
6808 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6809 // will be garbage-collected incorrectly. Hence we override the same function
6810 // in the base class to handle these implicit references.
6812 template<bool big_endian
>
6814 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6816 Read_relocs_data
* rd
)
6818 // First, call base class method to process relocations in this object.
6819 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6821 // If --gc-sections is not specified, there is nothing more to do.
6822 // This happens when --icf is used but --gc-sections is not.
6823 if (!parameters
->options().gc_sections())
6826 unsigned int shnum
= this->shnum();
6827 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6828 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6832 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6833 // to these from the linked text sections.
6834 const unsigned char* ps
= pshdrs
+ shdr_size
;
6835 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6837 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6838 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6840 // Found an .ARM.exidx section, add it to the set of reachable
6841 // sections from its linked text section.
6842 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6843 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6848 // Update output local symbol count. Owing to EXIDX entry merging, some local
6849 // symbols will be removed in output. Adjust output local symbol count
6850 // accordingly. We can only changed the static output local symbol count. It
6851 // is too late to change the dynamic symbols.
6853 template<bool big_endian
>
6855 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
6857 // Caller should check that this needs updating. We want caller checking
6858 // because output_local_symbol_count_needs_update() is most likely inlined.
6859 gold_assert(this->output_local_symbol_count_needs_update_
);
6861 gold_assert(this->symtab_shndx() != -1U);
6862 if (this->symtab_shndx() == 0)
6864 // This object has no symbols. Weird but legal.
6868 // Read the symbol table section header.
6869 const unsigned int symtab_shndx
= this->symtab_shndx();
6870 elfcpp::Shdr
<32, big_endian
>
6871 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6872 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6874 // Read the local symbols.
6875 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6876 const unsigned int loccount
= this->local_symbol_count();
6877 gold_assert(loccount
== symtabshdr
.get_sh_info());
6878 off_t locsize
= loccount
* sym_size
;
6879 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6880 locsize
, true, true);
6882 // Loop over the local symbols.
6884 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
6886 const Output_sections
& out_sections(this->output_sections());
6887 unsigned int shnum
= this->shnum();
6888 unsigned int count
= 0;
6889 // Skip the first, dummy, symbol.
6891 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6893 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6895 Symbol_value
<32>& lv((*this->local_values())[i
]);
6897 // This local symbol was already discarded by do_count_local_symbols.
6898 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
6902 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
6907 Output_section
* os
= out_sections
[shndx
];
6909 // This local symbol no longer has an output section. Discard it.
6912 lv
.set_no_output_symtab_entry();
6916 // Currently we only discard parts of EXIDX input sections.
6917 // We explicitly check for a merged EXIDX input section to avoid
6918 // calling Output_section_data::output_offset unless necessary.
6919 if ((this->get_output_section_offset(shndx
) == invalid_address
)
6920 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
6922 section_offset_type output_offset
=
6923 os
->output_offset(this, shndx
, lv
.input_value());
6924 if (output_offset
== -1)
6926 // This symbol is defined in a part of an EXIDX input section
6927 // that is discarded due to entry merging.
6928 lv
.set_no_output_symtab_entry();
6937 this->set_output_local_symbol_count(count
);
6938 this->output_local_symbol_count_needs_update_
= false;
6941 // Arm_dynobj methods.
6943 // Read the symbol information.
6945 template<bool big_endian
>
6947 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6949 // Call parent class to read symbol information.
6950 Sized_dynobj
<32, big_endian
>::do_read_symbols(sd
);
6952 // Read processor-specific flags in ELF file header.
6953 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6954 elfcpp::Elf_sizes
<32>::ehdr_size
,
6956 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6957 this->processor_specific_flags_
= ehdr
.get_e_flags();
6959 // Read the attributes section if there is one.
6960 // We read from the end because gas seems to put it near the end of
6961 // the section headers.
6962 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6963 const unsigned char* ps
=
6964 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
6965 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
6967 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6968 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6970 section_offset_type section_offset
= shdr
.get_sh_offset();
6971 section_size_type section_size
=
6972 convert_to_section_size_type(shdr
.get_sh_size());
6973 const unsigned char* view
=
6974 this->get_view(section_offset
, section_size
, true, false);
6975 this->attributes_section_data_
=
6976 new Attributes_section_data(view
, section_size
);
6982 // Stub_addend_reader methods.
6984 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6986 template<bool big_endian
>
6987 elfcpp::Elf_types
<32>::Elf_Swxword
6988 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
6989 unsigned int r_type
,
6990 const unsigned char* view
,
6991 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
6993 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
6997 case elfcpp::R_ARM_CALL
:
6998 case elfcpp::R_ARM_JUMP24
:
6999 case elfcpp::R_ARM_PLT32
:
7001 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7002 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7003 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
7004 return Bits
<26>::sign_extend32(val
<< 2);
7007 case elfcpp::R_ARM_THM_CALL
:
7008 case elfcpp::R_ARM_THM_JUMP24
:
7009 case elfcpp::R_ARM_THM_XPC22
:
7011 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7012 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7013 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7014 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7015 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7018 case elfcpp::R_ARM_THM_JUMP19
:
7020 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7021 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7022 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7023 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7024 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7032 // Arm_output_data_got methods.
7034 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7035 // The first one is initialized to be 1, which is the module index for
7036 // the main executable and the second one 0. A reloc of the type
7037 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7038 // be applied by gold. GSYM is a global symbol.
7040 template<bool big_endian
>
7042 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7043 unsigned int got_type
,
7046 if (gsym
->has_got_offset(got_type
))
7049 // We are doing a static link. Just mark it as belong to module 1,
7051 unsigned int got_offset
= this->add_constant(1);
7052 gsym
->set_got_offset(got_type
, got_offset
);
7053 got_offset
= this->add_constant(0);
7054 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7055 elfcpp::R_ARM_TLS_DTPOFF32
,
7059 // Same as the above but for a local symbol.
7061 template<bool big_endian
>
7063 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7064 unsigned int got_type
,
7065 Sized_relobj_file
<32, big_endian
>* object
,
7068 if (object
->local_has_got_offset(index
, got_type
))
7071 // We are doing a static link. Just mark it as belong to module 1,
7073 unsigned int got_offset
= this->add_constant(1);
7074 object
->set_local_got_offset(index
, got_type
, got_offset
);
7075 got_offset
= this->add_constant(0);
7076 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7077 elfcpp::R_ARM_TLS_DTPOFF32
,
7081 template<bool big_endian
>
7083 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7085 // Call parent to write out GOT.
7086 Output_data_got
<32, big_endian
>::do_write(of
);
7088 // We are done if there is no fix up.
7089 if (this->static_relocs_
.empty())
7092 gold_assert(parameters
->doing_static_link());
7094 const off_t offset
= this->offset();
7095 const section_size_type oview_size
=
7096 convert_to_section_size_type(this->data_size());
7097 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7099 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7100 gold_assert(tls_segment
!= NULL
);
7102 // The thread pointer $tp points to the TCB, which is followed by the
7103 // TLS. So we need to adjust $tp relative addressing by this amount.
7104 Arm_address aligned_tcb_size
=
7105 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7107 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7109 Static_reloc
& reloc(this->static_relocs_
[i
]);
7112 if (!reloc
.symbol_is_global())
7114 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7115 const Symbol_value
<32>* psymval
=
7116 reloc
.relobj()->local_symbol(reloc
.index());
7118 // We are doing static linking. Issue an error and skip this
7119 // relocation if the symbol is undefined or in a discarded_section.
7121 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7122 if ((shndx
== elfcpp::SHN_UNDEF
)
7124 && shndx
!= elfcpp::SHN_UNDEF
7125 && !object
->is_section_included(shndx
)
7126 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7128 gold_error(_("undefined or discarded local symbol %u from "
7129 " object %s in GOT"),
7130 reloc
.index(), reloc
.relobj()->name().c_str());
7134 value
= psymval
->value(object
, 0);
7138 const Symbol
* gsym
= reloc
.symbol();
7139 gold_assert(gsym
!= NULL
);
7140 if (gsym
->is_forwarder())
7141 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7143 // We are doing static linking. Issue an error and skip this
7144 // relocation if the symbol is undefined or in a discarded_section
7145 // unless it is a weakly_undefined symbol.
7146 if ((gsym
->is_defined_in_discarded_section()
7147 || gsym
->is_undefined())
7148 && !gsym
->is_weak_undefined())
7150 gold_error(_("undefined or discarded symbol %s in GOT"),
7155 if (!gsym
->is_weak_undefined())
7157 const Sized_symbol
<32>* sym
=
7158 static_cast<const Sized_symbol
<32>*>(gsym
);
7159 value
= sym
->value();
7165 unsigned got_offset
= reloc
.got_offset();
7166 gold_assert(got_offset
< oview_size
);
7168 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7169 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7171 switch (reloc
.r_type())
7173 case elfcpp::R_ARM_TLS_DTPOFF32
:
7176 case elfcpp::R_ARM_TLS_TPOFF32
:
7177 x
= value
+ aligned_tcb_size
;
7182 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7185 of
->write_output_view(offset
, oview_size
, oview
);
7188 // A class to handle the PLT data.
7190 template<bool big_endian
>
7191 class Output_data_plt_arm
: public Output_section_data
7194 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7197 Output_data_plt_arm(Layout
*, Output_data_space
*);
7199 // Add an entry to the PLT.
7201 add_entry(Symbol
* gsym
);
7203 // Return the .rel.plt section data.
7204 const Reloc_section
*
7206 { return this->rel_
; }
7208 // Return the number of PLT entries.
7211 { return this->count_
; }
7213 // Return the offset of the first non-reserved PLT entry.
7215 first_plt_entry_offset()
7216 { return sizeof(first_plt_entry
); }
7218 // Return the size of a PLT entry.
7220 get_plt_entry_size()
7221 { return sizeof(plt_entry
); }
7225 do_adjust_output_section(Output_section
* os
);
7227 // Write to a map file.
7229 do_print_to_mapfile(Mapfile
* mapfile
) const
7230 { mapfile
->print_output_data(this, _("** PLT")); }
7233 // Template for the first PLT entry.
7234 static const uint32_t first_plt_entry
[5];
7236 // Template for subsequent PLT entries.
7237 static const uint32_t plt_entry
[3];
7239 // Set the final size.
7241 set_final_data_size()
7243 this->set_data_size(sizeof(first_plt_entry
)
7244 + this->count_
* sizeof(plt_entry
));
7247 // Write out the PLT data.
7249 do_write(Output_file
*);
7251 // The reloc section.
7252 Reloc_section
* rel_
;
7253 // The .got.plt section.
7254 Output_data_space
* got_plt_
;
7255 // The number of PLT entries.
7256 unsigned int count_
;
7259 // Create the PLT section. The ordinary .got section is an argument,
7260 // since we need to refer to the start. We also create our own .got
7261 // section just for PLT entries.
7263 template<bool big_endian
>
7264 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(Layout
* layout
,
7265 Output_data_space
* got_plt
)
7266 : Output_section_data(4), got_plt_(got_plt
), count_(0)
7268 this->rel_
= new Reloc_section(false);
7269 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7270 elfcpp::SHF_ALLOC
, this->rel_
,
7271 ORDER_DYNAMIC_PLT_RELOCS
, false);
7274 template<bool big_endian
>
7276 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7281 // Add an entry to the PLT.
7283 template<bool big_endian
>
7285 Output_data_plt_arm
<big_endian
>::add_entry(Symbol
* gsym
)
7287 gold_assert(!gsym
->has_plt_offset());
7289 // Note that when setting the PLT offset we skip the initial
7290 // reserved PLT entry.
7291 gsym
->set_plt_offset((this->count_
) * sizeof(plt_entry
)
7292 + sizeof(first_plt_entry
));
7296 section_offset_type got_offset
= this->got_plt_
->current_data_size();
7298 // Every PLT entry needs a GOT entry which points back to the PLT
7299 // entry (this will be changed by the dynamic linker, normally
7300 // lazily when the function is called).
7301 this->got_plt_
->set_current_data_size(got_offset
+ 4);
7303 // Every PLT entry needs a reloc.
7304 gsym
->set_needs_dynsym_entry();
7305 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7308 // Note that we don't need to save the symbol. The contents of the
7309 // PLT are independent of which symbols are used. The symbols only
7310 // appear in the relocations.
7314 // FIXME: This is not very flexible. Right now this has only been tested
7315 // on armv5te. If we are to support additional architecture features like
7316 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7318 // The first entry in the PLT.
7319 template<bool big_endian
>
7320 const uint32_t Output_data_plt_arm
<big_endian
>::first_plt_entry
[5] =
7322 0xe52de004, // str lr, [sp, #-4]!
7323 0xe59fe004, // ldr lr, [pc, #4]
7324 0xe08fe00e, // add lr, pc, lr
7325 0xe5bef008, // ldr pc, [lr, #8]!
7326 0x00000000, // &GOT[0] - .
7329 // Subsequent entries in the PLT.
7331 template<bool big_endian
>
7332 const uint32_t Output_data_plt_arm
<big_endian
>::plt_entry
[3] =
7334 0xe28fc600, // add ip, pc, #0xNN00000
7335 0xe28cca00, // add ip, ip, #0xNN000
7336 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7339 // Write out the PLT. This uses the hand-coded instructions above,
7340 // and adjusts them as needed. This is all specified by the arm ELF
7341 // Processor Supplement.
7343 template<bool big_endian
>
7345 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
7347 const off_t offset
= this->offset();
7348 const section_size_type oview_size
=
7349 convert_to_section_size_type(this->data_size());
7350 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7352 const off_t got_file_offset
= this->got_plt_
->offset();
7353 const section_size_type got_size
=
7354 convert_to_section_size_type(this->got_plt_
->data_size());
7355 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
7357 unsigned char* pov
= oview
;
7359 Arm_address plt_address
= this->address();
7360 Arm_address got_address
= this->got_plt_
->address();
7362 // Write first PLT entry. All but the last word are constants.
7363 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7364 / sizeof(plt_entry
[0]));
7365 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7366 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
7367 // Last word in first PLT entry is &GOT[0] - .
7368 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7369 got_address
- (plt_address
+ 16));
7370 pov
+= sizeof(first_plt_entry
);
7372 unsigned char* got_pov
= got_view
;
7374 memset(got_pov
, 0, 12);
7377 const int rel_size
= elfcpp::Elf_sizes
<32>::rel_size
;
7378 unsigned int plt_offset
= sizeof(first_plt_entry
);
7379 unsigned int plt_rel_offset
= 0;
7380 unsigned int got_offset
= 12;
7381 const unsigned int count
= this->count_
;
7382 for (unsigned int i
= 0;
7385 pov
+= sizeof(plt_entry
),
7387 plt_offset
+= sizeof(plt_entry
),
7388 plt_rel_offset
+= rel_size
,
7391 // Set and adjust the PLT entry itself.
7392 int32_t offset
= ((got_address
+ got_offset
)
7393 - (plt_address
+ plt_offset
+ 8));
7395 gold_assert(offset
>= 0 && offset
< 0x0fffffff);
7396 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7397 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7398 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7399 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7400 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7401 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7403 // Set the entry in the GOT.
7404 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, plt_address
);
7407 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
7408 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
7410 of
->write_output_view(offset
, oview_size
, oview
);
7411 of
->write_output_view(got_file_offset
, got_size
, got_view
);
7414 // Create a PLT entry for a global symbol.
7416 template<bool big_endian
>
7418 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
7421 if (gsym
->has_plt_offset())
7424 if (this->plt_
== NULL
)
7426 // Create the GOT sections first.
7427 this->got_section(symtab
, layout
);
7429 this->plt_
= new Output_data_plt_arm
<big_endian
>(layout
, this->got_plt_
);
7430 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
7432 | elfcpp::SHF_EXECINSTR
),
7433 this->plt_
, ORDER_PLT
, false);
7435 this->plt_
->add_entry(gsym
);
7438 // Return the number of entries in the PLT.
7440 template<bool big_endian
>
7442 Target_arm
<big_endian
>::plt_entry_count() const
7444 if (this->plt_
== NULL
)
7446 return this->plt_
->entry_count();
7449 // Return the offset of the first non-reserved PLT entry.
7451 template<bool big_endian
>
7453 Target_arm
<big_endian
>::first_plt_entry_offset() const
7455 return Output_data_plt_arm
<big_endian
>::first_plt_entry_offset();
7458 // Return the size of each PLT entry.
7460 template<bool big_endian
>
7462 Target_arm
<big_endian
>::plt_entry_size() const
7464 return Output_data_plt_arm
<big_endian
>::get_plt_entry_size();
7467 // Get the section to use for TLS_DESC relocations.
7469 template<bool big_endian
>
7470 typename Target_arm
<big_endian
>::Reloc_section
*
7471 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
7473 return this->plt_section()->rel_tls_desc(layout
);
7476 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7478 template<bool big_endian
>
7480 Target_arm
<big_endian
>::define_tls_base_symbol(
7481 Symbol_table
* symtab
,
7484 if (this->tls_base_symbol_defined_
)
7487 Output_segment
* tls_segment
= layout
->tls_segment();
7488 if (tls_segment
!= NULL
)
7490 bool is_exec
= parameters
->options().output_is_executable();
7491 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
7492 Symbol_table::PREDEFINED
,
7496 elfcpp::STV_HIDDEN
, 0,
7498 ? Symbol::SEGMENT_END
7499 : Symbol::SEGMENT_START
),
7502 this->tls_base_symbol_defined_
= true;
7505 // Create a GOT entry for the TLS module index.
7507 template<bool big_endian
>
7509 Target_arm
<big_endian
>::got_mod_index_entry(
7510 Symbol_table
* symtab
,
7512 Sized_relobj_file
<32, big_endian
>* object
)
7514 if (this->got_mod_index_offset_
== -1U)
7516 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
7517 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
7518 unsigned int got_offset
;
7519 if (!parameters
->doing_static_link())
7521 got_offset
= got
->add_constant(0);
7522 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
7523 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
7528 // We are doing a static link. Just mark it as belong to module 1,
7530 got_offset
= got
->add_constant(1);
7533 got
->add_constant(0);
7534 this->got_mod_index_offset_
= got_offset
;
7536 return this->got_mod_index_offset_
;
7539 // Optimize the TLS relocation type based on what we know about the
7540 // symbol. IS_FINAL is true if the final address of this symbol is
7541 // known at link time.
7543 template<bool big_endian
>
7544 tls::Tls_optimization
7545 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
7547 // FIXME: Currently we do not do any TLS optimization.
7548 return tls::TLSOPT_NONE
;
7551 // Get the Reference_flags for a particular relocation.
7553 template<bool big_endian
>
7555 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
7559 case elfcpp::R_ARM_NONE
:
7560 case elfcpp::R_ARM_V4BX
:
7561 case elfcpp::R_ARM_GNU_VTENTRY
:
7562 case elfcpp::R_ARM_GNU_VTINHERIT
:
7563 // No symbol reference.
7566 case elfcpp::R_ARM_ABS32
:
7567 case elfcpp::R_ARM_ABS16
:
7568 case elfcpp::R_ARM_ABS12
:
7569 case elfcpp::R_ARM_THM_ABS5
:
7570 case elfcpp::R_ARM_ABS8
:
7571 case elfcpp::R_ARM_BASE_ABS
:
7572 case elfcpp::R_ARM_MOVW_ABS_NC
:
7573 case elfcpp::R_ARM_MOVT_ABS
:
7574 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7575 case elfcpp::R_ARM_THM_MOVT_ABS
:
7576 case elfcpp::R_ARM_ABS32_NOI
:
7577 return Symbol::ABSOLUTE_REF
;
7579 case elfcpp::R_ARM_REL32
:
7580 case elfcpp::R_ARM_LDR_PC_G0
:
7581 case elfcpp::R_ARM_SBREL32
:
7582 case elfcpp::R_ARM_THM_PC8
:
7583 case elfcpp::R_ARM_BASE_PREL
:
7584 case elfcpp::R_ARM_MOVW_PREL_NC
:
7585 case elfcpp::R_ARM_MOVT_PREL
:
7586 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7587 case elfcpp::R_ARM_THM_MOVT_PREL
:
7588 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7589 case elfcpp::R_ARM_THM_PC12
:
7590 case elfcpp::R_ARM_REL32_NOI
:
7591 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7592 case elfcpp::R_ARM_ALU_PC_G0
:
7593 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7594 case elfcpp::R_ARM_ALU_PC_G1
:
7595 case elfcpp::R_ARM_ALU_PC_G2
:
7596 case elfcpp::R_ARM_LDR_PC_G1
:
7597 case elfcpp::R_ARM_LDR_PC_G2
:
7598 case elfcpp::R_ARM_LDRS_PC_G0
:
7599 case elfcpp::R_ARM_LDRS_PC_G1
:
7600 case elfcpp::R_ARM_LDRS_PC_G2
:
7601 case elfcpp::R_ARM_LDC_PC_G0
:
7602 case elfcpp::R_ARM_LDC_PC_G1
:
7603 case elfcpp::R_ARM_LDC_PC_G2
:
7604 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7605 case elfcpp::R_ARM_ALU_SB_G0
:
7606 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7607 case elfcpp::R_ARM_ALU_SB_G1
:
7608 case elfcpp::R_ARM_ALU_SB_G2
:
7609 case elfcpp::R_ARM_LDR_SB_G0
:
7610 case elfcpp::R_ARM_LDR_SB_G1
:
7611 case elfcpp::R_ARM_LDR_SB_G2
:
7612 case elfcpp::R_ARM_LDRS_SB_G0
:
7613 case elfcpp::R_ARM_LDRS_SB_G1
:
7614 case elfcpp::R_ARM_LDRS_SB_G2
:
7615 case elfcpp::R_ARM_LDC_SB_G0
:
7616 case elfcpp::R_ARM_LDC_SB_G1
:
7617 case elfcpp::R_ARM_LDC_SB_G2
:
7618 case elfcpp::R_ARM_MOVW_BREL_NC
:
7619 case elfcpp::R_ARM_MOVT_BREL
:
7620 case elfcpp::R_ARM_MOVW_BREL
:
7621 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7622 case elfcpp::R_ARM_THM_MOVT_BREL
:
7623 case elfcpp::R_ARM_THM_MOVW_BREL
:
7624 case elfcpp::R_ARM_GOTOFF32
:
7625 case elfcpp::R_ARM_GOTOFF12
:
7626 case elfcpp::R_ARM_SBREL31
:
7627 return Symbol::RELATIVE_REF
;
7629 case elfcpp::R_ARM_PLT32
:
7630 case elfcpp::R_ARM_CALL
:
7631 case elfcpp::R_ARM_JUMP24
:
7632 case elfcpp::R_ARM_THM_CALL
:
7633 case elfcpp::R_ARM_THM_JUMP24
:
7634 case elfcpp::R_ARM_THM_JUMP19
:
7635 case elfcpp::R_ARM_THM_JUMP6
:
7636 case elfcpp::R_ARM_THM_JUMP11
:
7637 case elfcpp::R_ARM_THM_JUMP8
:
7638 // R_ARM_PREL31 is not used to relocate call/jump instructions but
7639 // in unwind tables. It may point to functions via PLTs.
7640 // So we treat it like call/jump relocations above.
7641 case elfcpp::R_ARM_PREL31
:
7642 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
7644 case elfcpp::R_ARM_GOT_BREL
:
7645 case elfcpp::R_ARM_GOT_ABS
:
7646 case elfcpp::R_ARM_GOT_PREL
:
7648 return Symbol::ABSOLUTE_REF
;
7650 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7651 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7652 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7653 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7654 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7655 return Symbol::TLS_REF
;
7657 case elfcpp::R_ARM_TARGET1
:
7658 case elfcpp::R_ARM_TARGET2
:
7659 case elfcpp::R_ARM_COPY
:
7660 case elfcpp::R_ARM_GLOB_DAT
:
7661 case elfcpp::R_ARM_JUMP_SLOT
:
7662 case elfcpp::R_ARM_RELATIVE
:
7663 case elfcpp::R_ARM_PC24
:
7664 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
7665 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
7666 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
7668 // Not expected. We will give an error later.
7673 // Report an unsupported relocation against a local symbol.
7675 template<bool big_endian
>
7677 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
7678 Sized_relobj_file
<32, big_endian
>* object
,
7679 unsigned int r_type
)
7681 gold_error(_("%s: unsupported reloc %u against local symbol"),
7682 object
->name().c_str(), r_type
);
7685 // We are about to emit a dynamic relocation of type R_TYPE. If the
7686 // dynamic linker does not support it, issue an error. The GNU linker
7687 // only issues a non-PIC error for an allocated read-only section.
7688 // Here we know the section is allocated, but we don't know that it is
7689 // read-only. But we check for all the relocation types which the
7690 // glibc dynamic linker supports, so it seems appropriate to issue an
7691 // error even if the section is not read-only.
7693 template<bool big_endian
>
7695 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
7696 unsigned int r_type
)
7700 // These are the relocation types supported by glibc for ARM.
7701 case elfcpp::R_ARM_RELATIVE
:
7702 case elfcpp::R_ARM_COPY
:
7703 case elfcpp::R_ARM_GLOB_DAT
:
7704 case elfcpp::R_ARM_JUMP_SLOT
:
7705 case elfcpp::R_ARM_ABS32
:
7706 case elfcpp::R_ARM_ABS32_NOI
:
7707 case elfcpp::R_ARM_PC24
:
7708 // FIXME: The following 3 types are not supported by Android's dynamic
7710 case elfcpp::R_ARM_TLS_DTPMOD32
:
7711 case elfcpp::R_ARM_TLS_DTPOFF32
:
7712 case elfcpp::R_ARM_TLS_TPOFF32
:
7717 // This prevents us from issuing more than one error per reloc
7718 // section. But we can still wind up issuing more than one
7719 // error per object file.
7720 if (this->issued_non_pic_error_
)
7722 const Arm_reloc_property
* reloc_property
=
7723 arm_reloc_property_table
->get_reloc_property(r_type
);
7724 gold_assert(reloc_property
!= NULL
);
7725 object
->error(_("requires unsupported dynamic reloc %s; "
7726 "recompile with -fPIC"),
7727 reloc_property
->name().c_str());
7728 this->issued_non_pic_error_
= true;
7732 case elfcpp::R_ARM_NONE
:
7737 // Scan a relocation for a local symbol.
7738 // FIXME: This only handles a subset of relocation types used by Android
7739 // on ARM v5te devices.
7741 template<bool big_endian
>
7743 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
7746 Sized_relobj_file
<32, big_endian
>* object
,
7747 unsigned int data_shndx
,
7748 Output_section
* output_section
,
7749 const elfcpp::Rel
<32, big_endian
>& reloc
,
7750 unsigned int r_type
,
7751 const elfcpp::Sym
<32, big_endian
>& lsym
)
7753 r_type
= get_real_reloc_type(r_type
);
7756 case elfcpp::R_ARM_NONE
:
7757 case elfcpp::R_ARM_V4BX
:
7758 case elfcpp::R_ARM_GNU_VTENTRY
:
7759 case elfcpp::R_ARM_GNU_VTINHERIT
:
7762 case elfcpp::R_ARM_ABS32
:
7763 case elfcpp::R_ARM_ABS32_NOI
:
7764 // If building a shared library (or a position-independent
7765 // executable), we need to create a dynamic relocation for
7766 // this location. The relocation applied at link time will
7767 // apply the link-time value, so we flag the location with
7768 // an R_ARM_RELATIVE relocation so the dynamic loader can
7769 // relocate it easily.
7770 if (parameters
->options().output_is_position_independent())
7772 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7773 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7774 // If we are to add more other reloc types than R_ARM_ABS32,
7775 // we need to add check_non_pic(object, r_type) here.
7776 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
7777 output_section
, data_shndx
,
7778 reloc
.get_r_offset());
7782 case elfcpp::R_ARM_ABS16
:
7783 case elfcpp::R_ARM_ABS12
:
7784 case elfcpp::R_ARM_THM_ABS5
:
7785 case elfcpp::R_ARM_ABS8
:
7786 case elfcpp::R_ARM_BASE_ABS
:
7787 case elfcpp::R_ARM_MOVW_ABS_NC
:
7788 case elfcpp::R_ARM_MOVT_ABS
:
7789 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7790 case elfcpp::R_ARM_THM_MOVT_ABS
:
7791 // If building a shared library (or a position-independent
7792 // executable), we need to create a dynamic relocation for
7793 // this location. Because the addend needs to remain in the
7794 // data section, we need to be careful not to apply this
7795 // relocation statically.
7796 if (parameters
->options().output_is_position_independent())
7798 check_non_pic(object
, r_type
);
7799 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7800 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7801 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
7802 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
7803 data_shndx
, reloc
.get_r_offset());
7806 gold_assert(lsym
.get_st_value() == 0);
7807 unsigned int shndx
= lsym
.get_st_shndx();
7809 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
7812 object
->error(_("section symbol %u has bad shndx %u"),
7815 rel_dyn
->add_local_section(object
, shndx
,
7816 r_type
, output_section
,
7817 data_shndx
, reloc
.get_r_offset());
7822 case elfcpp::R_ARM_REL32
:
7823 case elfcpp::R_ARM_LDR_PC_G0
:
7824 case elfcpp::R_ARM_SBREL32
:
7825 case elfcpp::R_ARM_THM_CALL
:
7826 case elfcpp::R_ARM_THM_PC8
:
7827 case elfcpp::R_ARM_BASE_PREL
:
7828 case elfcpp::R_ARM_PLT32
:
7829 case elfcpp::R_ARM_CALL
:
7830 case elfcpp::R_ARM_JUMP24
:
7831 case elfcpp::R_ARM_THM_JUMP24
:
7832 case elfcpp::R_ARM_SBREL31
:
7833 case elfcpp::R_ARM_PREL31
:
7834 case elfcpp::R_ARM_MOVW_PREL_NC
:
7835 case elfcpp::R_ARM_MOVT_PREL
:
7836 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7837 case elfcpp::R_ARM_THM_MOVT_PREL
:
7838 case elfcpp::R_ARM_THM_JUMP19
:
7839 case elfcpp::R_ARM_THM_JUMP6
:
7840 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7841 case elfcpp::R_ARM_THM_PC12
:
7842 case elfcpp::R_ARM_REL32_NOI
:
7843 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7844 case elfcpp::R_ARM_ALU_PC_G0
:
7845 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7846 case elfcpp::R_ARM_ALU_PC_G1
:
7847 case elfcpp::R_ARM_ALU_PC_G2
:
7848 case elfcpp::R_ARM_LDR_PC_G1
:
7849 case elfcpp::R_ARM_LDR_PC_G2
:
7850 case elfcpp::R_ARM_LDRS_PC_G0
:
7851 case elfcpp::R_ARM_LDRS_PC_G1
:
7852 case elfcpp::R_ARM_LDRS_PC_G2
:
7853 case elfcpp::R_ARM_LDC_PC_G0
:
7854 case elfcpp::R_ARM_LDC_PC_G1
:
7855 case elfcpp::R_ARM_LDC_PC_G2
:
7856 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7857 case elfcpp::R_ARM_ALU_SB_G0
:
7858 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7859 case elfcpp::R_ARM_ALU_SB_G1
:
7860 case elfcpp::R_ARM_ALU_SB_G2
:
7861 case elfcpp::R_ARM_LDR_SB_G0
:
7862 case elfcpp::R_ARM_LDR_SB_G1
:
7863 case elfcpp::R_ARM_LDR_SB_G2
:
7864 case elfcpp::R_ARM_LDRS_SB_G0
:
7865 case elfcpp::R_ARM_LDRS_SB_G1
:
7866 case elfcpp::R_ARM_LDRS_SB_G2
:
7867 case elfcpp::R_ARM_LDC_SB_G0
:
7868 case elfcpp::R_ARM_LDC_SB_G1
:
7869 case elfcpp::R_ARM_LDC_SB_G2
:
7870 case elfcpp::R_ARM_MOVW_BREL_NC
:
7871 case elfcpp::R_ARM_MOVT_BREL
:
7872 case elfcpp::R_ARM_MOVW_BREL
:
7873 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7874 case elfcpp::R_ARM_THM_MOVT_BREL
:
7875 case elfcpp::R_ARM_THM_MOVW_BREL
:
7876 case elfcpp::R_ARM_THM_JUMP11
:
7877 case elfcpp::R_ARM_THM_JUMP8
:
7878 // We don't need to do anything for a relative addressing relocation
7879 // against a local symbol if it does not reference the GOT.
7882 case elfcpp::R_ARM_GOTOFF32
:
7883 case elfcpp::R_ARM_GOTOFF12
:
7884 // We need a GOT section:
7885 target
->got_section(symtab
, layout
);
7888 case elfcpp::R_ARM_GOT_BREL
:
7889 case elfcpp::R_ARM_GOT_PREL
:
7891 // The symbol requires a GOT entry.
7892 Arm_output_data_got
<big_endian
>* got
=
7893 target
->got_section(symtab
, layout
);
7894 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7895 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
7897 // If we are generating a shared object, we need to add a
7898 // dynamic RELATIVE relocation for this symbol's GOT entry.
7899 if (parameters
->options().output_is_position_independent())
7901 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7902 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7903 rel_dyn
->add_local_relative(
7904 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
7905 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
7911 case elfcpp::R_ARM_TARGET1
:
7912 case elfcpp::R_ARM_TARGET2
:
7913 // This should have been mapped to another type already.
7915 case elfcpp::R_ARM_COPY
:
7916 case elfcpp::R_ARM_GLOB_DAT
:
7917 case elfcpp::R_ARM_JUMP_SLOT
:
7918 case elfcpp::R_ARM_RELATIVE
:
7919 // These are relocations which should only be seen by the
7920 // dynamic linker, and should never be seen here.
7921 gold_error(_("%s: unexpected reloc %u in object file"),
7922 object
->name().c_str(), r_type
);
7926 // These are initial TLS relocs, which are expected when
7928 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7929 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7930 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7931 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7932 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7934 bool output_is_shared
= parameters
->options().shared();
7935 const tls::Tls_optimization optimized_type
7936 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
7940 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7941 if (optimized_type
== tls::TLSOPT_NONE
)
7943 // Create a pair of GOT entries for the module index and
7944 // dtv-relative offset.
7945 Arm_output_data_got
<big_endian
>* got
7946 = target
->got_section(symtab
, layout
);
7947 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7948 unsigned int shndx
= lsym
.get_st_shndx();
7950 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
7953 object
->error(_("local symbol %u has bad shndx %u"),
7958 if (!parameters
->doing_static_link())
7959 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
7961 target
->rel_dyn_section(layout
),
7962 elfcpp::R_ARM_TLS_DTPMOD32
, 0);
7964 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
7968 // FIXME: TLS optimization not supported yet.
7972 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7973 if (optimized_type
== tls::TLSOPT_NONE
)
7975 // Create a GOT entry for the module index.
7976 target
->got_mod_index_entry(symtab
, layout
, object
);
7979 // FIXME: TLS optimization not supported yet.
7983 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7986 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7987 layout
->set_has_static_tls();
7988 if (optimized_type
== tls::TLSOPT_NONE
)
7990 // Create a GOT entry for the tp-relative offset.
7991 Arm_output_data_got
<big_endian
>* got
7992 = target
->got_section(symtab
, layout
);
7993 unsigned int r_sym
=
7994 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7995 if (!parameters
->doing_static_link())
7996 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
7997 target
->rel_dyn_section(layout
),
7998 elfcpp::R_ARM_TLS_TPOFF32
);
7999 else if (!object
->local_has_got_offset(r_sym
,
8000 GOT_TYPE_TLS_OFFSET
))
8002 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
8003 unsigned int got_offset
=
8004 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
8005 got
->add_static_reloc(got_offset
,
8006 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8011 // FIXME: TLS optimization not supported yet.
8015 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8016 layout
->set_has_static_tls();
8017 if (output_is_shared
)
8019 // We need to create a dynamic relocation.
8020 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8021 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8022 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8023 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8024 output_section
, data_shndx
,
8025 reloc
.get_r_offset());
8035 case elfcpp::R_ARM_PC24
:
8036 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8037 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8038 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8040 unsupported_reloc_local(object
, r_type
);
8045 // Report an unsupported relocation against a global symbol.
8047 template<bool big_endian
>
8049 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8050 Sized_relobj_file
<32, big_endian
>* object
,
8051 unsigned int r_type
,
8054 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8055 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8058 template<bool big_endian
>
8060 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8061 unsigned int r_type
)
8065 case elfcpp::R_ARM_PC24
:
8066 case elfcpp::R_ARM_THM_CALL
:
8067 case elfcpp::R_ARM_PLT32
:
8068 case elfcpp::R_ARM_CALL
:
8069 case elfcpp::R_ARM_JUMP24
:
8070 case elfcpp::R_ARM_THM_JUMP24
:
8071 case elfcpp::R_ARM_SBREL31
:
8072 case elfcpp::R_ARM_PREL31
:
8073 case elfcpp::R_ARM_THM_JUMP19
:
8074 case elfcpp::R_ARM_THM_JUMP6
:
8075 case elfcpp::R_ARM_THM_JUMP11
:
8076 case elfcpp::R_ARM_THM_JUMP8
:
8077 // All the relocations above are branches except SBREL31 and PREL31.
8081 // Be conservative and assume this is a function pointer.
8086 template<bool big_endian
>
8088 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8091 Target_arm
<big_endian
>* target
,
8092 Sized_relobj_file
<32, big_endian
>*,
8095 const elfcpp::Rel
<32, big_endian
>&,
8096 unsigned int r_type
,
8097 const elfcpp::Sym
<32, big_endian
>&)
8099 r_type
= target
->get_real_reloc_type(r_type
);
8100 return possible_function_pointer_reloc(r_type
);
8103 template<bool big_endian
>
8105 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8108 Target_arm
<big_endian
>* target
,
8109 Sized_relobj_file
<32, big_endian
>*,
8112 const elfcpp::Rel
<32, big_endian
>&,
8113 unsigned int r_type
,
8116 // GOT is not a function.
8117 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8120 r_type
= target
->get_real_reloc_type(r_type
);
8121 return possible_function_pointer_reloc(r_type
);
8124 // Scan a relocation for a global symbol.
8126 template<bool big_endian
>
8128 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8131 Sized_relobj_file
<32, big_endian
>* object
,
8132 unsigned int data_shndx
,
8133 Output_section
* output_section
,
8134 const elfcpp::Rel
<32, big_endian
>& reloc
,
8135 unsigned int r_type
,
8138 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8139 // section. We check here to avoid creating a dynamic reloc against
8140 // _GLOBAL_OFFSET_TABLE_.
8141 if (!target
->has_got_section()
8142 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8143 target
->got_section(symtab
, layout
);
8145 r_type
= get_real_reloc_type(r_type
);
8148 case elfcpp::R_ARM_NONE
:
8149 case elfcpp::R_ARM_V4BX
:
8150 case elfcpp::R_ARM_GNU_VTENTRY
:
8151 case elfcpp::R_ARM_GNU_VTINHERIT
:
8154 case elfcpp::R_ARM_ABS32
:
8155 case elfcpp::R_ARM_ABS16
:
8156 case elfcpp::R_ARM_ABS12
:
8157 case elfcpp::R_ARM_THM_ABS5
:
8158 case elfcpp::R_ARM_ABS8
:
8159 case elfcpp::R_ARM_BASE_ABS
:
8160 case elfcpp::R_ARM_MOVW_ABS_NC
:
8161 case elfcpp::R_ARM_MOVT_ABS
:
8162 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8163 case elfcpp::R_ARM_THM_MOVT_ABS
:
8164 case elfcpp::R_ARM_ABS32_NOI
:
8165 // Absolute addressing relocations.
8167 // Make a PLT entry if necessary.
8168 if (this->symbol_needs_plt_entry(gsym
))
8170 target
->make_plt_entry(symtab
, layout
, gsym
);
8171 // Since this is not a PC-relative relocation, we may be
8172 // taking the address of a function. In that case we need to
8173 // set the entry in the dynamic symbol table to the address of
8175 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
8176 gsym
->set_needs_dynsym_value();
8178 // Make a dynamic relocation if necessary.
8179 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8181 if (gsym
->may_need_copy_reloc())
8183 target
->copy_reloc(symtab
, layout
, object
,
8184 data_shndx
, output_section
, gsym
, reloc
);
8186 else if ((r_type
== elfcpp::R_ARM_ABS32
8187 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8188 && gsym
->can_use_relative_reloc(false))
8190 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8191 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
8192 output_section
, object
,
8193 data_shndx
, reloc
.get_r_offset());
8197 check_non_pic(object
, r_type
);
8198 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8199 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8200 data_shndx
, reloc
.get_r_offset());
8206 case elfcpp::R_ARM_GOTOFF32
:
8207 case elfcpp::R_ARM_GOTOFF12
:
8208 // We need a GOT section.
8209 target
->got_section(symtab
, layout
);
8212 case elfcpp::R_ARM_REL32
:
8213 case elfcpp::R_ARM_LDR_PC_G0
:
8214 case elfcpp::R_ARM_SBREL32
:
8215 case elfcpp::R_ARM_THM_PC8
:
8216 case elfcpp::R_ARM_BASE_PREL
:
8217 case elfcpp::R_ARM_MOVW_PREL_NC
:
8218 case elfcpp::R_ARM_MOVT_PREL
:
8219 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8220 case elfcpp::R_ARM_THM_MOVT_PREL
:
8221 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8222 case elfcpp::R_ARM_THM_PC12
:
8223 case elfcpp::R_ARM_REL32_NOI
:
8224 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8225 case elfcpp::R_ARM_ALU_PC_G0
:
8226 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8227 case elfcpp::R_ARM_ALU_PC_G1
:
8228 case elfcpp::R_ARM_ALU_PC_G2
:
8229 case elfcpp::R_ARM_LDR_PC_G1
:
8230 case elfcpp::R_ARM_LDR_PC_G2
:
8231 case elfcpp::R_ARM_LDRS_PC_G0
:
8232 case elfcpp::R_ARM_LDRS_PC_G1
:
8233 case elfcpp::R_ARM_LDRS_PC_G2
:
8234 case elfcpp::R_ARM_LDC_PC_G0
:
8235 case elfcpp::R_ARM_LDC_PC_G1
:
8236 case elfcpp::R_ARM_LDC_PC_G2
:
8237 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8238 case elfcpp::R_ARM_ALU_SB_G0
:
8239 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8240 case elfcpp::R_ARM_ALU_SB_G1
:
8241 case elfcpp::R_ARM_ALU_SB_G2
:
8242 case elfcpp::R_ARM_LDR_SB_G0
:
8243 case elfcpp::R_ARM_LDR_SB_G1
:
8244 case elfcpp::R_ARM_LDR_SB_G2
:
8245 case elfcpp::R_ARM_LDRS_SB_G0
:
8246 case elfcpp::R_ARM_LDRS_SB_G1
:
8247 case elfcpp::R_ARM_LDRS_SB_G2
:
8248 case elfcpp::R_ARM_LDC_SB_G0
:
8249 case elfcpp::R_ARM_LDC_SB_G1
:
8250 case elfcpp::R_ARM_LDC_SB_G2
:
8251 case elfcpp::R_ARM_MOVW_BREL_NC
:
8252 case elfcpp::R_ARM_MOVT_BREL
:
8253 case elfcpp::R_ARM_MOVW_BREL
:
8254 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8255 case elfcpp::R_ARM_THM_MOVT_BREL
:
8256 case elfcpp::R_ARM_THM_MOVW_BREL
:
8257 // Relative addressing relocations.
8259 // Make a dynamic relocation if necessary.
8260 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8262 if (target
->may_need_copy_reloc(gsym
))
8264 target
->copy_reloc(symtab
, layout
, object
,
8265 data_shndx
, output_section
, gsym
, reloc
);
8269 check_non_pic(object
, r_type
);
8270 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8271 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8272 data_shndx
, reloc
.get_r_offset());
8278 case elfcpp::R_ARM_THM_CALL
:
8279 case elfcpp::R_ARM_PLT32
:
8280 case elfcpp::R_ARM_CALL
:
8281 case elfcpp::R_ARM_JUMP24
:
8282 case elfcpp::R_ARM_THM_JUMP24
:
8283 case elfcpp::R_ARM_SBREL31
:
8284 case elfcpp::R_ARM_PREL31
:
8285 case elfcpp::R_ARM_THM_JUMP19
:
8286 case elfcpp::R_ARM_THM_JUMP6
:
8287 case elfcpp::R_ARM_THM_JUMP11
:
8288 case elfcpp::R_ARM_THM_JUMP8
:
8289 // All the relocation above are branches except for the PREL31 ones.
8290 // A PREL31 relocation can point to a personality function in a shared
8291 // library. In that case we want to use a PLT because we want to
8292 // call the personality routine and the dynamic linkers we care about
8293 // do not support dynamic PREL31 relocations. An REL31 relocation may
8294 // point to a function whose unwinding behaviour is being described but
8295 // we will not mistakenly generate a PLT for that because we should use
8296 // a local section symbol.
8298 // If the symbol is fully resolved, this is just a relative
8299 // local reloc. Otherwise we need a PLT entry.
8300 if (gsym
->final_value_is_known())
8302 // If building a shared library, we can also skip the PLT entry
8303 // if the symbol is defined in the output file and is protected
8305 if (gsym
->is_defined()
8306 && !gsym
->is_from_dynobj()
8307 && !gsym
->is_preemptible())
8309 target
->make_plt_entry(symtab
, layout
, gsym
);
8312 case elfcpp::R_ARM_GOT_BREL
:
8313 case elfcpp::R_ARM_GOT_ABS
:
8314 case elfcpp::R_ARM_GOT_PREL
:
8316 // The symbol requires a GOT entry.
8317 Arm_output_data_got
<big_endian
>* got
=
8318 target
->got_section(symtab
, layout
);
8319 if (gsym
->final_value_is_known())
8320 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
8323 // If this symbol is not fully resolved, we need to add a
8324 // GOT entry with a dynamic relocation.
8325 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8326 if (gsym
->is_from_dynobj()
8327 || gsym
->is_undefined()
8328 || gsym
->is_preemptible()
8329 || (gsym
->visibility() == elfcpp::STV_PROTECTED
8330 && parameters
->options().shared()))
8331 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
8332 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
8335 if (got
->add_global(gsym
, GOT_TYPE_STANDARD
))
8336 rel_dyn
->add_global_relative(
8337 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
8338 gsym
->got_offset(GOT_TYPE_STANDARD
));
8344 case elfcpp::R_ARM_TARGET1
:
8345 case elfcpp::R_ARM_TARGET2
:
8346 // These should have been mapped to other types already.
8348 case elfcpp::R_ARM_COPY
:
8349 case elfcpp::R_ARM_GLOB_DAT
:
8350 case elfcpp::R_ARM_JUMP_SLOT
:
8351 case elfcpp::R_ARM_RELATIVE
:
8352 // These are relocations which should only be seen by the
8353 // dynamic linker, and should never be seen here.
8354 gold_error(_("%s: unexpected reloc %u in object file"),
8355 object
->name().c_str(), r_type
);
8358 // These are initial tls relocs, which are expected when
8360 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8361 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8362 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8363 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8364 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8366 const bool is_final
= gsym
->final_value_is_known();
8367 const tls::Tls_optimization optimized_type
8368 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
8371 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8372 if (optimized_type
== tls::TLSOPT_NONE
)
8374 // Create a pair of GOT entries for the module index and
8375 // dtv-relative offset.
8376 Arm_output_data_got
<big_endian
>* got
8377 = target
->got_section(symtab
, layout
);
8378 if (!parameters
->doing_static_link())
8379 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
8380 target
->rel_dyn_section(layout
),
8381 elfcpp::R_ARM_TLS_DTPMOD32
,
8382 elfcpp::R_ARM_TLS_DTPOFF32
);
8384 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
8387 // FIXME: TLS optimization not supported yet.
8391 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8392 if (optimized_type
== tls::TLSOPT_NONE
)
8394 // Create a GOT entry for the module index.
8395 target
->got_mod_index_entry(symtab
, layout
, object
);
8398 // FIXME: TLS optimization not supported yet.
8402 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8405 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8406 layout
->set_has_static_tls();
8407 if (optimized_type
== tls::TLSOPT_NONE
)
8409 // Create a GOT entry for the tp-relative offset.
8410 Arm_output_data_got
<big_endian
>* got
8411 = target
->got_section(symtab
, layout
);
8412 if (!parameters
->doing_static_link())
8413 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
8414 target
->rel_dyn_section(layout
),
8415 elfcpp::R_ARM_TLS_TPOFF32
);
8416 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
8418 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
8419 unsigned int got_offset
=
8420 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
8421 got
->add_static_reloc(got_offset
,
8422 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
8426 // FIXME: TLS optimization not supported yet.
8430 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8431 layout
->set_has_static_tls();
8432 if (parameters
->options().shared())
8434 // We need to create a dynamic relocation.
8435 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8436 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
8437 output_section
, object
,
8438 data_shndx
, reloc
.get_r_offset());
8448 case elfcpp::R_ARM_PC24
:
8449 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8450 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8451 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8453 unsupported_reloc_global(object
, r_type
, gsym
);
8458 // Process relocations for gc.
8460 template<bool big_endian
>
8462 Target_arm
<big_endian
>::gc_process_relocs(
8463 Symbol_table
* symtab
,
8465 Sized_relobj_file
<32, big_endian
>* object
,
8466 unsigned int data_shndx
,
8468 const unsigned char* prelocs
,
8470 Output_section
* output_section
,
8471 bool needs_special_offset_handling
,
8472 size_t local_symbol_count
,
8473 const unsigned char* plocal_symbols
)
8475 typedef Target_arm
<big_endian
> Arm
;
8476 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8478 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
,
8479 typename
Target_arm::Relocatable_size_for_reloc
>(
8488 needs_special_offset_handling
,
8493 // Scan relocations for a section.
8495 template<bool big_endian
>
8497 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
8499 Sized_relobj_file
<32, big_endian
>* object
,
8500 unsigned int data_shndx
,
8501 unsigned int sh_type
,
8502 const unsigned char* prelocs
,
8504 Output_section
* output_section
,
8505 bool needs_special_offset_handling
,
8506 size_t local_symbol_count
,
8507 const unsigned char* plocal_symbols
)
8509 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8510 if (sh_type
== elfcpp::SHT_RELA
)
8512 gold_error(_("%s: unsupported RELA reloc section"),
8513 object
->name().c_str());
8517 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
8526 needs_special_offset_handling
,
8531 // Finalize the sections.
8533 template<bool big_endian
>
8535 Target_arm
<big_endian
>::do_finalize_sections(
8537 const Input_objects
* input_objects
,
8538 Symbol_table
* symtab
)
8540 bool merged_any_attributes
= false;
8541 // Merge processor-specific flags.
8542 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
8543 p
!= input_objects
->relobj_end();
8546 Arm_relobj
<big_endian
>* arm_relobj
=
8547 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
8548 if (arm_relobj
->merge_flags_and_attributes())
8550 this->merge_processor_specific_flags(
8552 arm_relobj
->processor_specific_flags());
8553 this->merge_object_attributes(arm_relobj
->name().c_str(),
8554 arm_relobj
->attributes_section_data());
8555 merged_any_attributes
= true;
8559 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
8560 p
!= input_objects
->dynobj_end();
8563 Arm_dynobj
<big_endian
>* arm_dynobj
=
8564 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
8565 this->merge_processor_specific_flags(
8567 arm_dynobj
->processor_specific_flags());
8568 this->merge_object_attributes(arm_dynobj
->name().c_str(),
8569 arm_dynobj
->attributes_section_data());
8570 merged_any_attributes
= true;
8573 // Create an empty uninitialized attribute section if we still don't have it
8574 // at this moment. This happens if there is no attributes sections in all
8576 if (this->attributes_section_data_
== NULL
)
8577 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
8579 const Object_attribute
* cpu_arch_attr
=
8580 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
8581 // Check if we need to use Cortex-A8 workaround.
8582 if (parameters
->options().user_set_fix_cortex_a8())
8583 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
8586 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8587 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8589 const Object_attribute
* cpu_arch_profile_attr
=
8590 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
8591 this->fix_cortex_a8_
=
8592 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
8593 && (cpu_arch_profile_attr
->int_value() == 'A'
8594 || cpu_arch_profile_attr
->int_value() == 0));
8597 // Check if we can use V4BX interworking.
8598 // The V4BX interworking stub contains BX instruction,
8599 // which is not specified for some profiles.
8600 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8601 && !this->may_use_v4t_interworking())
8602 gold_error(_("unable to provide V4BX reloc interworking fix up; "
8603 "the target profile does not support BX instruction"));
8605 // Fill in some more dynamic tags.
8606 const Reloc_section
* rel_plt
= (this->plt_
== NULL
8608 : this->plt_
->rel_plt());
8609 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
8610 this->rel_dyn_
, true, false);
8612 // Emit any relocs we saved in an attempt to avoid generating COPY
8614 if (this->copy_relocs_
.any_saved_relocs())
8615 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
8617 // Handle the .ARM.exidx section.
8618 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
8620 if (!parameters
->options().relocatable())
8622 if (exidx_section
!= NULL
8623 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
8625 // Create __exidx_start and __exidx_end symbols.
8626 symtab
->define_in_output_data("__exidx_start", NULL
,
8627 Symbol_table::PREDEFINED
,
8628 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
8629 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
,
8631 symtab
->define_in_output_data("__exidx_end", NULL
,
8632 Symbol_table::PREDEFINED
,
8633 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
8634 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
,
8637 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
8638 // the .ARM.exidx section.
8639 if (!layout
->script_options()->saw_phdrs_clause())
8641 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
8644 Output_segment
* exidx_segment
=
8645 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
8646 exidx_segment
->add_output_section_to_nonload(exidx_section
,
8652 symtab
->define_as_constant("__exidx_start", NULL
,
8653 Symbol_table::PREDEFINED
,
8654 0, 0, elfcpp::STT_OBJECT
,
8655 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
8657 symtab
->define_as_constant("__exidx_end", NULL
,
8658 Symbol_table::PREDEFINED
,
8659 0, 0, elfcpp::STT_OBJECT
,
8660 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
8665 // Create an .ARM.attributes section if we have merged any attributes
8667 if (merged_any_attributes
)
8669 Output_attributes_section_data
* attributes_section
=
8670 new Output_attributes_section_data(*this->attributes_section_data_
);
8671 layout
->add_output_section_data(".ARM.attributes",
8672 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
8673 attributes_section
, ORDER_INVALID
,
8677 // Fix up links in section EXIDX headers.
8678 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
8679 p
!= layout
->section_list().end();
8681 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
8683 Arm_output_section
<big_endian
>* os
=
8684 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
8685 os
->set_exidx_section_link();
8689 // Return whether a direct absolute static relocation needs to be applied.
8690 // In cases where Scan::local() or Scan::global() has created
8691 // a dynamic relocation other than R_ARM_RELATIVE, the addend
8692 // of the relocation is carried in the data, and we must not
8693 // apply the static relocation.
8695 template<bool big_endian
>
8697 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
8698 const Sized_symbol
<32>* gsym
,
8699 unsigned int r_type
,
8701 Output_section
* output_section
)
8703 // If the output section is not allocated, then we didn't call
8704 // scan_relocs, we didn't create a dynamic reloc, and we must apply
8706 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
8709 int ref_flags
= Scan::get_reference_flags(r_type
);
8711 // For local symbols, we will have created a non-RELATIVE dynamic
8712 // relocation only if (a) the output is position independent,
8713 // (b) the relocation is absolute (not pc- or segment-relative), and
8714 // (c) the relocation is not 32 bits wide.
8716 return !(parameters
->options().output_is_position_independent()
8717 && (ref_flags
& Symbol::ABSOLUTE_REF
)
8720 // For global symbols, we use the same helper routines used in the
8721 // scan pass. If we did not create a dynamic relocation, or if we
8722 // created a RELATIVE dynamic relocation, we should apply the static
8724 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
8725 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
8726 && gsym
->can_use_relative_reloc(ref_flags
8727 & Symbol::FUNCTION_CALL
);
8728 return !has_dyn
|| is_rel
;
8731 // Perform a relocation.
8733 template<bool big_endian
>
8735 Target_arm
<big_endian
>::Relocate::relocate(
8736 const Relocate_info
<32, big_endian
>* relinfo
,
8738 Output_section
* output_section
,
8740 const elfcpp::Rel
<32, big_endian
>& rel
,
8741 unsigned int r_type
,
8742 const Sized_symbol
<32>* gsym
,
8743 const Symbol_value
<32>* psymval
,
8744 unsigned char* view
,
8745 Arm_address address
,
8746 section_size_type view_size
)
8748 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
8750 r_type
= get_real_reloc_type(r_type
);
8751 const Arm_reloc_property
* reloc_property
=
8752 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
8753 if (reloc_property
== NULL
)
8755 std::string reloc_name
=
8756 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
8757 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
8758 _("cannot relocate %s in object file"),
8759 reloc_name
.c_str());
8763 const Arm_relobj
<big_endian
>* object
=
8764 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
8766 // If the final branch target of a relocation is THUMB instruction, this
8767 // is 1. Otherwise it is 0.
8768 Arm_address thumb_bit
= 0;
8769 Symbol_value
<32> symval
;
8770 bool is_weakly_undefined_without_plt
= false;
8771 bool have_got_offset
= false;
8772 unsigned int got_offset
= 0;
8774 // If the relocation uses the GOT entry of a symbol instead of the symbol
8775 // itself, we don't care about whether the symbol is defined or what kind
8777 if (reloc_property
->uses_got_entry())
8779 // Get the GOT offset.
8780 // The GOT pointer points to the end of the GOT section.
8781 // We need to subtract the size of the GOT section to get
8782 // the actual offset to use in the relocation.
8783 // TODO: We should move GOT offset computing code in TLS relocations
8787 case elfcpp::R_ARM_GOT_BREL
:
8788 case elfcpp::R_ARM_GOT_PREL
:
8791 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
8792 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
8793 - target
->got_size());
8797 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8798 gold_assert(object
->local_has_got_offset(r_sym
,
8799 GOT_TYPE_STANDARD
));
8800 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
8801 - target
->got_size());
8803 have_got_offset
= true;
8810 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
8814 // This is a global symbol. Determine if we use PLT and if the
8815 // final target is THUMB.
8816 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
8818 // This uses a PLT, change the symbol value.
8819 symval
.set_output_value(target
->plt_section()->address()
8820 + gsym
->plt_offset());
8823 else if (gsym
->is_weak_undefined())
8825 // This is a weakly undefined symbol and we do not use PLT
8826 // for this relocation. A branch targeting this symbol will
8827 // be converted into an NOP.
8828 is_weakly_undefined_without_plt
= true;
8830 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
8832 // This relocation uses the symbol value but the symbol is
8833 // undefined. Exit early and have the caller reporting an
8839 // Set thumb bit if symbol:
8840 // -Has type STT_ARM_TFUNC or
8841 // -Has type STT_FUNC, is defined and with LSB in value set.
8843 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
8844 || (gsym
->type() == elfcpp::STT_FUNC
8845 && !gsym
->is_undefined()
8846 && ((psymval
->value(object
, 0) & 1) != 0)))
8853 // This is a local symbol. Determine if the final target is THUMB.
8854 // We saved this information when all the local symbols were read.
8855 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
8856 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
8857 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
8862 // This is a fake relocation synthesized for a stub. It does not have
8863 // a real symbol. We just look at the LSB of the symbol value to
8864 // determine if the target is THUMB or not.
8865 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
8868 // Strip LSB if this points to a THUMB target.
8870 && reloc_property
->uses_thumb_bit()
8871 && ((psymval
->value(object
, 0) & 1) != 0))
8873 Arm_address stripped_value
=
8874 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
8875 symval
.set_output_value(stripped_value
);
8879 // To look up relocation stubs, we need to pass the symbol table index of
8881 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8883 // Get the addressing origin of the output segment defining the
8884 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8885 Arm_address sym_origin
= 0;
8886 if (reloc_property
->uses_symbol_base())
8888 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
8889 // R_ARM_BASE_ABS with the NULL symbol will give the
8890 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8891 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8892 sym_origin
= target
->got_plt_section()->address();
8893 else if (gsym
== NULL
)
8895 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
8896 sym_origin
= gsym
->output_segment()->vaddr();
8897 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
8898 sym_origin
= gsym
->output_data()->address();
8900 // TODO: Assumes the segment base to be zero for the global symbols
8901 // till the proper support for the segment-base-relative addressing
8902 // will be implemented. This is consistent with GNU ld.
8905 // For relative addressing relocation, find out the relative address base.
8906 Arm_address relative_address_base
= 0;
8907 switch(reloc_property
->relative_address_base())
8909 case Arm_reloc_property::RAB_NONE
:
8910 // Relocations with relative address bases RAB_TLS and RAB_tp are
8911 // handled by relocate_tls. So we do not need to do anything here.
8912 case Arm_reloc_property::RAB_TLS
:
8913 case Arm_reloc_property::RAB_tp
:
8915 case Arm_reloc_property::RAB_B_S
:
8916 relative_address_base
= sym_origin
;
8918 case Arm_reloc_property::RAB_GOT_ORG
:
8919 relative_address_base
= target
->got_plt_section()->address();
8921 case Arm_reloc_property::RAB_P
:
8922 relative_address_base
= address
;
8924 case Arm_reloc_property::RAB_Pa
:
8925 relative_address_base
= address
& 0xfffffffcU
;
8931 typename
Arm_relocate_functions::Status reloc_status
=
8932 Arm_relocate_functions::STATUS_OKAY
;
8933 bool check_overflow
= reloc_property
->checks_overflow();
8936 case elfcpp::R_ARM_NONE
:
8939 case elfcpp::R_ARM_ABS8
:
8940 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8941 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
8944 case elfcpp::R_ARM_ABS12
:
8945 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8946 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
8949 case elfcpp::R_ARM_ABS16
:
8950 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8951 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
8954 case elfcpp::R_ARM_ABS32
:
8955 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
8956 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
8960 case elfcpp::R_ARM_ABS32_NOI
:
8961 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
8962 // No thumb bit for this relocation: (S + A)
8963 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
8967 case elfcpp::R_ARM_MOVW_ABS_NC
:
8968 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8969 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
8974 case elfcpp::R_ARM_MOVT_ABS
:
8975 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8976 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
8979 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8980 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8981 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
8982 0, thumb_bit
, false);
8985 case elfcpp::R_ARM_THM_MOVT_ABS
:
8986 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8987 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
8991 case elfcpp::R_ARM_MOVW_PREL_NC
:
8992 case elfcpp::R_ARM_MOVW_BREL_NC
:
8993 case elfcpp::R_ARM_MOVW_BREL
:
8995 Arm_relocate_functions::movw(view
, object
, psymval
,
8996 relative_address_base
, thumb_bit
,
9000 case elfcpp::R_ARM_MOVT_PREL
:
9001 case elfcpp::R_ARM_MOVT_BREL
:
9003 Arm_relocate_functions::movt(view
, object
, psymval
,
9004 relative_address_base
);
9007 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9008 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9009 case elfcpp::R_ARM_THM_MOVW_BREL
:
9011 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9012 relative_address_base
,
9013 thumb_bit
, check_overflow
);
9016 case elfcpp::R_ARM_THM_MOVT_PREL
:
9017 case elfcpp::R_ARM_THM_MOVT_BREL
:
9019 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
9020 relative_address_base
);
9023 case elfcpp::R_ARM_REL32
:
9024 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9025 address
, thumb_bit
);
9028 case elfcpp::R_ARM_THM_ABS5
:
9029 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9030 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9033 // Thumb long branches.
9034 case elfcpp::R_ARM_THM_CALL
:
9035 case elfcpp::R_ARM_THM_XPC22
:
9036 case elfcpp::R_ARM_THM_JUMP24
:
9038 Arm_relocate_functions::thumb_branch_common(
9039 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9040 thumb_bit
, is_weakly_undefined_without_plt
);
9043 case elfcpp::R_ARM_GOTOFF32
:
9045 Arm_address got_origin
;
9046 got_origin
= target
->got_plt_section()->address();
9047 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9048 got_origin
, thumb_bit
);
9052 case elfcpp::R_ARM_BASE_PREL
:
9053 gold_assert(gsym
!= NULL
);
9055 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9058 case elfcpp::R_ARM_BASE_ABS
:
9059 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9060 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9063 case elfcpp::R_ARM_GOT_BREL
:
9064 gold_assert(have_got_offset
);
9065 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9068 case elfcpp::R_ARM_GOT_PREL
:
9069 gold_assert(have_got_offset
);
9070 // Get the address origin for GOT PLT, which is allocated right
9071 // after the GOT section, to calculate an absolute address of
9072 // the symbol GOT entry (got_origin + got_offset).
9073 Arm_address got_origin
;
9074 got_origin
= target
->got_plt_section()->address();
9075 reloc_status
= Arm_relocate_functions::got_prel(view
,
9076 got_origin
+ got_offset
,
9080 case elfcpp::R_ARM_PLT32
:
9081 case elfcpp::R_ARM_CALL
:
9082 case elfcpp::R_ARM_JUMP24
:
9083 case elfcpp::R_ARM_XPC25
:
9084 gold_assert(gsym
== NULL
9085 || gsym
->has_plt_offset()
9086 || gsym
->final_value_is_known()
9087 || (gsym
->is_defined()
9088 && !gsym
->is_from_dynobj()
9089 && !gsym
->is_preemptible()));
9091 Arm_relocate_functions::arm_branch_common(
9092 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9093 thumb_bit
, is_weakly_undefined_without_plt
);
9096 case elfcpp::R_ARM_THM_JUMP19
:
9098 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9102 case elfcpp::R_ARM_THM_JUMP6
:
9104 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9107 case elfcpp::R_ARM_THM_JUMP8
:
9109 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9112 case elfcpp::R_ARM_THM_JUMP11
:
9114 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9117 case elfcpp::R_ARM_PREL31
:
9118 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9119 address
, thumb_bit
);
9122 case elfcpp::R_ARM_V4BX
:
9123 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9125 const bool is_v4bx_interworking
=
9126 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9128 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9129 is_v4bx_interworking
);
9133 case elfcpp::R_ARM_THM_PC8
:
9135 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
9138 case elfcpp::R_ARM_THM_PC12
:
9140 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
9143 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9145 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
9149 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9150 case elfcpp::R_ARM_ALU_PC_G0
:
9151 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9152 case elfcpp::R_ARM_ALU_PC_G1
:
9153 case elfcpp::R_ARM_ALU_PC_G2
:
9154 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9155 case elfcpp::R_ARM_ALU_SB_G0
:
9156 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9157 case elfcpp::R_ARM_ALU_SB_G1
:
9158 case elfcpp::R_ARM_ALU_SB_G2
:
9160 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
9161 reloc_property
->group_index(),
9162 relative_address_base
,
9163 thumb_bit
, check_overflow
);
9166 case elfcpp::R_ARM_LDR_PC_G0
:
9167 case elfcpp::R_ARM_LDR_PC_G1
:
9168 case elfcpp::R_ARM_LDR_PC_G2
:
9169 case elfcpp::R_ARM_LDR_SB_G0
:
9170 case elfcpp::R_ARM_LDR_SB_G1
:
9171 case elfcpp::R_ARM_LDR_SB_G2
:
9173 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
9174 reloc_property
->group_index(),
9175 relative_address_base
);
9178 case elfcpp::R_ARM_LDRS_PC_G0
:
9179 case elfcpp::R_ARM_LDRS_PC_G1
:
9180 case elfcpp::R_ARM_LDRS_PC_G2
:
9181 case elfcpp::R_ARM_LDRS_SB_G0
:
9182 case elfcpp::R_ARM_LDRS_SB_G1
:
9183 case elfcpp::R_ARM_LDRS_SB_G2
:
9185 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
9186 reloc_property
->group_index(),
9187 relative_address_base
);
9190 case elfcpp::R_ARM_LDC_PC_G0
:
9191 case elfcpp::R_ARM_LDC_PC_G1
:
9192 case elfcpp::R_ARM_LDC_PC_G2
:
9193 case elfcpp::R_ARM_LDC_SB_G0
:
9194 case elfcpp::R_ARM_LDC_SB_G1
:
9195 case elfcpp::R_ARM_LDC_SB_G2
:
9197 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
9198 reloc_property
->group_index(),
9199 relative_address_base
);
9202 // These are initial tls relocs, which are expected when
9204 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9205 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9206 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9207 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9208 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9210 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
9211 view
, address
, view_size
);
9214 // The known and unknown unsupported and/or deprecated relocations.
9215 case elfcpp::R_ARM_PC24
:
9216 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9217 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9218 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9220 // Just silently leave the method. We should get an appropriate error
9221 // message in the scan methods.
9225 // Report any errors.
9226 switch (reloc_status
)
9228 case Arm_relocate_functions::STATUS_OKAY
:
9230 case Arm_relocate_functions::STATUS_OVERFLOW
:
9231 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9232 _("relocation overflow in %s"),
9233 reloc_property
->name().c_str());
9235 case Arm_relocate_functions::STATUS_BAD_RELOC
:
9236 gold_error_at_location(
9240 _("unexpected opcode while processing relocation %s"),
9241 reloc_property
->name().c_str());
9250 // Perform a TLS relocation.
9252 template<bool big_endian
>
9253 inline typename Arm_relocate_functions
<big_endian
>::Status
9254 Target_arm
<big_endian
>::Relocate::relocate_tls(
9255 const Relocate_info
<32, big_endian
>* relinfo
,
9256 Target_arm
<big_endian
>* target
,
9258 const elfcpp::Rel
<32, big_endian
>& rel
,
9259 unsigned int r_type
,
9260 const Sized_symbol
<32>* gsym
,
9261 const Symbol_value
<32>* psymval
,
9262 unsigned char* view
,
9263 elfcpp::Elf_types
<32>::Elf_Addr address
,
9264 section_size_type
/*view_size*/ )
9266 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
9267 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
9268 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
9270 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
9272 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
9274 const bool is_final
= (gsym
== NULL
9275 ? !parameters
->options().shared()
9276 : gsym
->final_value_is_known());
9277 const tls::Tls_optimization optimized_type
9278 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9281 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9283 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
9284 unsigned int got_offset
;
9287 gold_assert(gsym
->has_got_offset(got_type
));
9288 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
9292 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9293 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9294 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
9295 - target
->got_size());
9297 if (optimized_type
== tls::TLSOPT_NONE
)
9299 Arm_address got_entry
=
9300 target
->got_plt_section()->address() + got_offset
;
9302 // Relocate the field with the PC relative offset of the pair of
9304 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9305 return ArmRelocFuncs::STATUS_OKAY
;
9310 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9311 if (optimized_type
== tls::TLSOPT_NONE
)
9313 // Relocate the field with the offset of the GOT entry for
9314 // the module index.
9315 unsigned int got_offset
;
9316 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
9317 - target
->got_size());
9318 Arm_address got_entry
=
9319 target
->got_plt_section()->address() + got_offset
;
9321 // Relocate the field with the PC relative offset of the pair of
9323 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9324 return ArmRelocFuncs::STATUS_OKAY
;
9328 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9329 RelocFuncs::rel32_unaligned(view
, value
);
9330 return ArmRelocFuncs::STATUS_OKAY
;
9332 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9333 if (optimized_type
== tls::TLSOPT_NONE
)
9335 // Relocate the field with the offset of the GOT entry for
9336 // the tp-relative offset of the symbol.
9337 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
9338 unsigned int got_offset
;
9341 gold_assert(gsym
->has_got_offset(got_type
));
9342 got_offset
= gsym
->got_offset(got_type
);
9346 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9347 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9348 got_offset
= object
->local_got_offset(r_sym
, got_type
);
9351 // All GOT offsets are relative to the end of the GOT.
9352 got_offset
-= target
->got_size();
9354 Arm_address got_entry
=
9355 target
->got_plt_section()->address() + got_offset
;
9357 // Relocate the field with the PC relative offset of the GOT entry.
9358 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9359 return ArmRelocFuncs::STATUS_OKAY
;
9363 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9364 // If we're creating a shared library, a dynamic relocation will
9365 // have been created for this location, so do not apply it now.
9366 if (!parameters
->options().shared())
9368 gold_assert(tls_segment
!= NULL
);
9370 // $tp points to the TCB, which is followed by the TLS, so we
9371 // need to add TCB size to the offset.
9372 Arm_address aligned_tcb_size
=
9373 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
9374 RelocFuncs::rel32_unaligned(view
, value
+ aligned_tcb_size
);
9377 return ArmRelocFuncs::STATUS_OKAY
;
9383 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9384 _("unsupported reloc %u"),
9386 return ArmRelocFuncs::STATUS_BAD_RELOC
;
9389 // Relocate section data.
9391 template<bool big_endian
>
9393 Target_arm
<big_endian
>::relocate_section(
9394 const Relocate_info
<32, big_endian
>* relinfo
,
9395 unsigned int sh_type
,
9396 const unsigned char* prelocs
,
9398 Output_section
* output_section
,
9399 bool needs_special_offset_handling
,
9400 unsigned char* view
,
9401 Arm_address address
,
9402 section_size_type view_size
,
9403 const Reloc_symbol_changes
* reloc_symbol_changes
)
9405 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
9406 gold_assert(sh_type
== elfcpp::SHT_REL
);
9408 // See if we are relocating a relaxed input section. If so, the view
9409 // covers the whole output section and we need to adjust accordingly.
9410 if (needs_special_offset_handling
)
9412 const Output_relaxed_input_section
* poris
=
9413 output_section
->find_relaxed_input_section(relinfo
->object
,
9414 relinfo
->data_shndx
);
9417 Arm_address section_address
= poris
->address();
9418 section_size_type section_size
= poris
->data_size();
9420 gold_assert((section_address
>= address
)
9421 && ((section_address
+ section_size
)
9422 <= (address
+ view_size
)));
9424 off_t offset
= section_address
- address
;
9427 view_size
= section_size
;
9431 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
9438 needs_special_offset_handling
,
9442 reloc_symbol_changes
);
9445 // Return the size of a relocation while scanning during a relocatable
9448 template<bool big_endian
>
9450 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
9451 unsigned int r_type
,
9454 r_type
= get_real_reloc_type(r_type
);
9455 const Arm_reloc_property
* arp
=
9456 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9461 std::string reloc_name
=
9462 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9463 gold_error(_("%s: unexpected %s in object file"),
9464 object
->name().c_str(), reloc_name
.c_str());
9469 // Scan the relocs during a relocatable link.
9471 template<bool big_endian
>
9473 Target_arm
<big_endian
>::scan_relocatable_relocs(
9474 Symbol_table
* symtab
,
9476 Sized_relobj_file
<32, big_endian
>* object
,
9477 unsigned int data_shndx
,
9478 unsigned int sh_type
,
9479 const unsigned char* prelocs
,
9481 Output_section
* output_section
,
9482 bool needs_special_offset_handling
,
9483 size_t local_symbol_count
,
9484 const unsigned char* plocal_symbols
,
9485 Relocatable_relocs
* rr
)
9487 gold_assert(sh_type
== elfcpp::SHT_REL
);
9489 typedef Arm_scan_relocatable_relocs
<big_endian
, elfcpp::SHT_REL
,
9490 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
9492 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
9493 Scan_relocatable_relocs
>(
9501 needs_special_offset_handling
,
9507 // Relocate a section during a relocatable link.
9509 template<bool big_endian
>
9511 Target_arm
<big_endian
>::relocate_for_relocatable(
9512 const Relocate_info
<32, big_endian
>* relinfo
,
9513 unsigned int sh_type
,
9514 const unsigned char* prelocs
,
9516 Output_section
* output_section
,
9517 off_t offset_in_output_section
,
9518 const Relocatable_relocs
* rr
,
9519 unsigned char* view
,
9520 Arm_address view_address
,
9521 section_size_type view_size
,
9522 unsigned char* reloc_view
,
9523 section_size_type reloc_view_size
)
9525 gold_assert(sh_type
== elfcpp::SHT_REL
);
9527 gold::relocate_for_relocatable
<32, big_endian
, elfcpp::SHT_REL
>(
9532 offset_in_output_section
,
9541 // Perform target-specific processing in a relocatable link. This is
9542 // only used if we use the relocation strategy RELOC_SPECIAL.
9544 template<bool big_endian
>
9546 Target_arm
<big_endian
>::relocate_special_relocatable(
9547 const Relocate_info
<32, big_endian
>* relinfo
,
9548 unsigned int sh_type
,
9549 const unsigned char* preloc_in
,
9551 Output_section
* output_section
,
9552 off_t offset_in_output_section
,
9553 unsigned char* view
,
9554 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
9556 unsigned char* preloc_out
)
9558 // We can only handle REL type relocation sections.
9559 gold_assert(sh_type
== elfcpp::SHT_REL
);
9561 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
9562 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
9564 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
9566 const Arm_relobj
<big_endian
>* object
=
9567 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9568 const unsigned int local_count
= object
->local_symbol_count();
9570 Reltype
reloc(preloc_in
);
9571 Reltype_write
reloc_write(preloc_out
);
9573 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
9574 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9575 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
9577 const Arm_reloc_property
* arp
=
9578 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9579 gold_assert(arp
!= NULL
);
9581 // Get the new symbol index.
9582 // We only use RELOC_SPECIAL strategy in local relocations.
9583 gold_assert(r_sym
< local_count
);
9585 // We are adjusting a section symbol. We need to find
9586 // the symbol table index of the section symbol for
9587 // the output section corresponding to input section
9588 // in which this symbol is defined.
9590 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
9591 gold_assert(is_ordinary
);
9592 Output_section
* os
= object
->output_section(shndx
);
9593 gold_assert(os
!= NULL
);
9594 gold_assert(os
->needs_symtab_index());
9595 unsigned int new_symndx
= os
->symtab_index();
9597 // Get the new offset--the location in the output section where
9598 // this relocation should be applied.
9600 Arm_address offset
= reloc
.get_r_offset();
9601 Arm_address new_offset
;
9602 if (offset_in_output_section
!= invalid_address
)
9603 new_offset
= offset
+ offset_in_output_section
;
9606 section_offset_type sot_offset
=
9607 convert_types
<section_offset_type
, Arm_address
>(offset
);
9608 section_offset_type new_sot_offset
=
9609 output_section
->output_offset(object
, relinfo
->data_shndx
,
9611 gold_assert(new_sot_offset
!= -1);
9612 new_offset
= new_sot_offset
;
9615 // In an object file, r_offset is an offset within the section.
9616 // In an executable or dynamic object, generated by
9617 // --emit-relocs, r_offset is an absolute address.
9618 if (!parameters
->options().relocatable())
9620 new_offset
+= view_address
;
9621 if (offset_in_output_section
!= invalid_address
)
9622 new_offset
-= offset_in_output_section
;
9625 reloc_write
.put_r_offset(new_offset
);
9626 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
9628 // Handle the reloc addend.
9629 // The relocation uses a section symbol in the input file.
9630 // We are adjusting it to use a section symbol in the output
9631 // file. The input section symbol refers to some address in
9632 // the input section. We need the relocation in the output
9633 // file to refer to that same address. This adjustment to
9634 // the addend is the same calculation we use for a simple
9635 // absolute relocation for the input section symbol.
9637 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
9639 // Handle THUMB bit.
9640 Symbol_value
<32> symval
;
9641 Arm_address thumb_bit
=
9642 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9644 && arp
->uses_thumb_bit()
9645 && ((psymval
->value(object
, 0) & 1) != 0))
9647 Arm_address stripped_value
=
9648 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9649 symval
.set_output_value(stripped_value
);
9653 unsigned char* paddend
= view
+ offset
;
9654 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
9655 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
9658 case elfcpp::R_ARM_ABS8
:
9659 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
9663 case elfcpp::R_ARM_ABS12
:
9664 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
9668 case elfcpp::R_ARM_ABS16
:
9669 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
9673 case elfcpp::R_ARM_THM_ABS5
:
9674 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
9679 case elfcpp::R_ARM_MOVW_ABS_NC
:
9680 case elfcpp::R_ARM_MOVW_PREL_NC
:
9681 case elfcpp::R_ARM_MOVW_BREL_NC
:
9682 case elfcpp::R_ARM_MOVW_BREL
:
9683 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
9684 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9687 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9688 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9689 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9690 case elfcpp::R_ARM_THM_MOVW_BREL
:
9691 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
9692 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9695 case elfcpp::R_ARM_THM_CALL
:
9696 case elfcpp::R_ARM_THM_XPC22
:
9697 case elfcpp::R_ARM_THM_JUMP24
:
9699 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
9700 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9704 case elfcpp::R_ARM_PLT32
:
9705 case elfcpp::R_ARM_CALL
:
9706 case elfcpp::R_ARM_JUMP24
:
9707 case elfcpp::R_ARM_XPC25
:
9709 Arm_relocate_functions
<big_endian
>::arm_branch_common(
9710 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9714 case elfcpp::R_ARM_THM_JUMP19
:
9716 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
9717 psymval
, 0, thumb_bit
);
9720 case elfcpp::R_ARM_THM_JUMP6
:
9722 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
9726 case elfcpp::R_ARM_THM_JUMP8
:
9728 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
9732 case elfcpp::R_ARM_THM_JUMP11
:
9734 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
9738 case elfcpp::R_ARM_PREL31
:
9740 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
9744 case elfcpp::R_ARM_THM_PC8
:
9746 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
9750 case elfcpp::R_ARM_THM_PC12
:
9752 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
9756 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9758 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
9762 // These relocation truncate relocation results so we cannot handle them
9763 // in a relocatable link.
9764 case elfcpp::R_ARM_MOVT_ABS
:
9765 case elfcpp::R_ARM_THM_MOVT_ABS
:
9766 case elfcpp::R_ARM_MOVT_PREL
:
9767 case elfcpp::R_ARM_MOVT_BREL
:
9768 case elfcpp::R_ARM_THM_MOVT_PREL
:
9769 case elfcpp::R_ARM_THM_MOVT_BREL
:
9770 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9771 case elfcpp::R_ARM_ALU_PC_G0
:
9772 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9773 case elfcpp::R_ARM_ALU_PC_G1
:
9774 case elfcpp::R_ARM_ALU_PC_G2
:
9775 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9776 case elfcpp::R_ARM_ALU_SB_G0
:
9777 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9778 case elfcpp::R_ARM_ALU_SB_G1
:
9779 case elfcpp::R_ARM_ALU_SB_G2
:
9780 case elfcpp::R_ARM_LDR_PC_G0
:
9781 case elfcpp::R_ARM_LDR_PC_G1
:
9782 case elfcpp::R_ARM_LDR_PC_G2
:
9783 case elfcpp::R_ARM_LDR_SB_G0
:
9784 case elfcpp::R_ARM_LDR_SB_G1
:
9785 case elfcpp::R_ARM_LDR_SB_G2
:
9786 case elfcpp::R_ARM_LDRS_PC_G0
:
9787 case elfcpp::R_ARM_LDRS_PC_G1
:
9788 case elfcpp::R_ARM_LDRS_PC_G2
:
9789 case elfcpp::R_ARM_LDRS_SB_G0
:
9790 case elfcpp::R_ARM_LDRS_SB_G1
:
9791 case elfcpp::R_ARM_LDRS_SB_G2
:
9792 case elfcpp::R_ARM_LDC_PC_G0
:
9793 case elfcpp::R_ARM_LDC_PC_G1
:
9794 case elfcpp::R_ARM_LDC_PC_G2
:
9795 case elfcpp::R_ARM_LDC_SB_G0
:
9796 case elfcpp::R_ARM_LDC_SB_G1
:
9797 case elfcpp::R_ARM_LDC_SB_G2
:
9798 gold_error(_("cannot handle %s in a relocatable link"),
9799 arp
->name().c_str());
9806 // Report any errors.
9807 switch (reloc_status
)
9809 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
9811 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
9812 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9813 _("relocation overflow in %s"),
9814 arp
->name().c_str());
9816 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
9817 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9818 _("unexpected opcode while processing relocation %s"),
9819 arp
->name().c_str());
9826 // Return the value to use for a dynamic symbol which requires special
9827 // treatment. This is how we support equality comparisons of function
9828 // pointers across shared library boundaries, as described in the
9829 // processor specific ABI supplement.
9831 template<bool big_endian
>
9833 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
9835 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
9836 return this->plt_section()->address() + gsym
->plt_offset();
9839 // Map platform-specific relocs to real relocs
9841 template<bool big_endian
>
9843 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
)
9847 case elfcpp::R_ARM_TARGET1
:
9848 // This is either R_ARM_ABS32 or R_ARM_REL32;
9849 return elfcpp::R_ARM_ABS32
;
9851 case elfcpp::R_ARM_TARGET2
:
9852 // This can be any reloc type but usually is R_ARM_GOT_PREL
9853 return elfcpp::R_ARM_GOT_PREL
;
9860 // Whether if two EABI versions V1 and V2 are compatible.
9862 template<bool big_endian
>
9864 Target_arm
<big_endian
>::are_eabi_versions_compatible(
9865 elfcpp::Elf_Word v1
,
9866 elfcpp::Elf_Word v2
)
9868 // v4 and v5 are the same spec before and after it was released,
9869 // so allow mixing them.
9870 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
9871 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
9872 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
9878 // Combine FLAGS from an input object called NAME and the processor-specific
9879 // flags in the ELF header of the output. Much of this is adapted from the
9880 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9881 // in bfd/elf32-arm.c.
9883 template<bool big_endian
>
9885 Target_arm
<big_endian
>::merge_processor_specific_flags(
9886 const std::string
& name
,
9887 elfcpp::Elf_Word flags
)
9889 if (this->are_processor_specific_flags_set())
9891 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
9893 // Nothing to merge if flags equal to those in output.
9894 if (flags
== out_flags
)
9897 // Complain about various flag mismatches.
9898 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
9899 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
9900 if (!this->are_eabi_versions_compatible(version1
, version2
)
9901 && parameters
->options().warn_mismatch())
9902 gold_error(_("Source object %s has EABI version %d but output has "
9903 "EABI version %d."),
9905 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
9906 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
9910 // If the input is the default architecture and had the default
9911 // flags then do not bother setting the flags for the output
9912 // architecture, instead allow future merges to do this. If no
9913 // future merges ever set these flags then they will retain their
9914 // uninitialised values, which surprise surprise, correspond
9915 // to the default values.
9919 // This is the first time, just copy the flags.
9920 // We only copy the EABI version for now.
9921 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
9925 // Adjust ELF file header.
9926 template<bool big_endian
>
9928 Target_arm
<big_endian
>::do_adjust_elf_header(
9929 unsigned char* view
,
9932 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
9934 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
9935 unsigned char e_ident
[elfcpp::EI_NIDENT
];
9936 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
9938 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
9939 == elfcpp::EF_ARM_EABI_UNKNOWN
)
9940 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
9942 e_ident
[elfcpp::EI_OSABI
] = 0;
9943 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
9945 // FIXME: Do EF_ARM_BE8 adjustment.
9947 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
9948 oehdr
.put_e_ident(e_ident
);
9951 // do_make_elf_object to override the same function in the base class.
9952 // We need to use a target-specific sub-class of
9953 // Sized_relobj_file<32, big_endian> to store ARM specific information.
9954 // Hence we need to have our own ELF object creation.
9956 template<bool big_endian
>
9958 Target_arm
<big_endian
>::do_make_elf_object(
9959 const std::string
& name
,
9960 Input_file
* input_file
,
9961 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
9963 int et
= ehdr
.get_e_type();
9964 // ET_EXEC files are valid input for --just-symbols/-R,
9965 // and we treat them as relocatable objects.
9966 if (et
== elfcpp::ET_REL
9967 || (et
== elfcpp::ET_EXEC
&& input_file
->just_symbols()))
9969 Arm_relobj
<big_endian
>* obj
=
9970 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
9974 else if (et
== elfcpp::ET_DYN
)
9976 Sized_dynobj
<32, big_endian
>* obj
=
9977 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
9983 gold_error(_("%s: unsupported ELF file type %d"),
9989 // Read the architecture from the Tag_also_compatible_with attribute, if any.
9990 // Returns -1 if no architecture could be read.
9991 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
9993 template<bool big_endian
>
9995 Target_arm
<big_endian
>::get_secondary_compatible_arch(
9996 const Attributes_section_data
* pasd
)
9998 const Object_attribute
* known_attributes
=
9999 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10001 // Note: the tag and its argument below are uleb128 values, though
10002 // currently-defined values fit in one byte for each.
10003 const std::string
& sv
=
10004 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
10006 && sv
.data()[0] == elfcpp::Tag_CPU_arch
10007 && (sv
.data()[1] & 128) != 128)
10008 return sv
.data()[1];
10010 // This tag is "safely ignorable", so don't complain if it looks funny.
10014 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10015 // The tag is removed if ARCH is -1.
10016 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10018 template<bool big_endian
>
10020 Target_arm
<big_endian
>::set_secondary_compatible_arch(
10021 Attributes_section_data
* pasd
,
10024 Object_attribute
* known_attributes
=
10025 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10029 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10033 // Note: the tag and its argument below are uleb128 values, though
10034 // currently-defined values fit in one byte for each.
10036 sv
[0] = elfcpp::Tag_CPU_arch
;
10037 gold_assert(arch
!= 0);
10041 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10044 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10046 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10048 template<bool big_endian
>
10050 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10053 int* secondary_compat_out
,
10055 int secondary_compat
)
10057 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10058 static const int v6t2
[] =
10060 T(V6T2
), // PRE_V4.
10070 static const int v6k
[] =
10083 static const int v7
[] =
10097 static const int v6_m
[] =
10112 static const int v6s_m
[] =
10128 static const int v7e_m
[] =
10135 T(V7E_M
), // V5TEJ.
10142 T(V7E_M
), // V6S_M.
10145 static const int v4t_plus_v6_m
[] =
10152 T(V5TEJ
), // V5TEJ.
10159 T(V6S_M
), // V6S_M.
10160 T(V7E_M
), // V7E_M.
10161 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
10163 static const int* comb
[] =
10171 // Pseudo-architecture.
10175 // Check we've not got a higher architecture than we know about.
10177 if (oldtag
> elfcpp::MAX_TAG_CPU_ARCH
|| newtag
> elfcpp::MAX_TAG_CPU_ARCH
)
10179 gold_error(_("%s: unknown CPU architecture"), name
);
10183 // Override old tag if we have a Tag_also_compatible_with on the output.
10185 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
10186 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
10187 oldtag
= T(V4T_PLUS_V6_M
);
10189 // And override the new tag if we have a Tag_also_compatible_with on the
10192 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
10193 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
10194 newtag
= T(V4T_PLUS_V6_M
);
10196 // Architectures before V6KZ add features monotonically.
10197 int tagh
= std::max(oldtag
, newtag
);
10198 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
10201 int tagl
= std::min(oldtag
, newtag
);
10202 int result
= comb
[tagh
- T(V6T2
)][tagl
];
10204 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10205 // as the canonical version.
10206 if (result
== T(V4T_PLUS_V6_M
))
10209 *secondary_compat_out
= T(V6_M
);
10212 *secondary_compat_out
= -1;
10216 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10217 name
, oldtag
, newtag
);
10225 // Helper to print AEABI enum tag value.
10227 template<bool big_endian
>
10229 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
10231 static const char* aeabi_enum_names
[] =
10232 { "", "variable-size", "32-bit", "" };
10233 const size_t aeabi_enum_names_size
=
10234 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
10236 if (value
< aeabi_enum_names_size
)
10237 return std::string(aeabi_enum_names
[value
]);
10241 sprintf(buffer
, "<unknown value %u>", value
);
10242 return std::string(buffer
);
10246 // Return the string value to store in TAG_CPU_name.
10248 template<bool big_endian
>
10250 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
10252 static const char* name_table
[] = {
10253 // These aren't real CPU names, but we can't guess
10254 // that from the architecture version alone.
10270 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
10272 if (value
< name_table_size
)
10273 return std::string(name_table
[value
]);
10277 sprintf(buffer
, "<unknown CPU value %u>", value
);
10278 return std::string(buffer
);
10282 // Merge object attributes from input file called NAME with those of the
10283 // output. The input object attributes are in the object pointed by PASD.
10285 template<bool big_endian
>
10287 Target_arm
<big_endian
>::merge_object_attributes(
10289 const Attributes_section_data
* pasd
)
10291 // Return if there is no attributes section data.
10295 // If output has no object attributes, just copy.
10296 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
10297 if (this->attributes_section_data_
== NULL
)
10299 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
10300 Object_attribute
* out_attr
=
10301 this->attributes_section_data_
->known_attributes(vendor
);
10303 // We do not output objects with Tag_MPextension_use_legacy - we move
10304 // the attribute's value to Tag_MPextension_use. */
10305 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
10307 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
10308 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
10309 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10311 gold_error(_("%s has both the current and legacy "
10312 "Tag_MPextension_use attributes"),
10316 out_attr
[elfcpp::Tag_MPextension_use
] =
10317 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
10318 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
10319 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
10325 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
10326 Object_attribute
* out_attr
=
10327 this->attributes_section_data_
->known_attributes(vendor
);
10329 // This needs to happen before Tag_ABI_FP_number_model is merged. */
10330 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
10331 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
10333 // Ignore mismatches if the object doesn't use floating point. */
10334 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() == 0)
10335 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
10336 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
10337 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() != 0
10338 && parameters
->options().warn_mismatch())
10339 gold_error(_("%s uses VFP register arguments, output does not"),
10343 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
10345 // Merge this attribute with existing attributes.
10348 case elfcpp::Tag_CPU_raw_name
:
10349 case elfcpp::Tag_CPU_name
:
10350 // These are merged after Tag_CPU_arch.
10353 case elfcpp::Tag_ABI_optimization_goals
:
10354 case elfcpp::Tag_ABI_FP_optimization_goals
:
10355 // Use the first value seen.
10358 case elfcpp::Tag_CPU_arch
:
10360 unsigned int saved_out_attr
= out_attr
->int_value();
10361 // Merge Tag_CPU_arch and Tag_also_compatible_with.
10362 int secondary_compat
=
10363 this->get_secondary_compatible_arch(pasd
);
10364 int secondary_compat_out
=
10365 this->get_secondary_compatible_arch(
10366 this->attributes_section_data_
);
10367 out_attr
[i
].set_int_value(
10368 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
10369 &secondary_compat_out
,
10370 in_attr
[i
].int_value(),
10371 secondary_compat
));
10372 this->set_secondary_compatible_arch(this->attributes_section_data_
,
10373 secondary_compat_out
);
10375 // Merge Tag_CPU_name and Tag_CPU_raw_name.
10376 if (out_attr
[i
].int_value() == saved_out_attr
)
10377 ; // Leave the names alone.
10378 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
10380 // The output architecture has been changed to match the
10381 // input architecture. Use the input names.
10382 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
10383 in_attr
[elfcpp::Tag_CPU_name
].string_value());
10384 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
10385 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
10389 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
10390 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
10393 // If we still don't have a value for Tag_CPU_name,
10394 // make one up now. Tag_CPU_raw_name remains blank.
10395 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
10397 const std::string cpu_name
=
10398 this->tag_cpu_name_value(out_attr
[i
].int_value());
10399 // FIXME: If we see an unknown CPU, this will be set
10400 // to "<unknown CPU n>", where n is the attribute value.
10401 // This is different from BFD, which leaves the name alone.
10402 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
10407 case elfcpp::Tag_ARM_ISA_use
:
10408 case elfcpp::Tag_THUMB_ISA_use
:
10409 case elfcpp::Tag_WMMX_arch
:
10410 case elfcpp::Tag_Advanced_SIMD_arch
:
10411 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
10412 case elfcpp::Tag_ABI_FP_rounding
:
10413 case elfcpp::Tag_ABI_FP_exceptions
:
10414 case elfcpp::Tag_ABI_FP_user_exceptions
:
10415 case elfcpp::Tag_ABI_FP_number_model
:
10416 case elfcpp::Tag_VFP_HP_extension
:
10417 case elfcpp::Tag_CPU_unaligned_access
:
10418 case elfcpp::Tag_T2EE_use
:
10419 case elfcpp::Tag_Virtualization_use
:
10420 case elfcpp::Tag_MPextension_use
:
10421 // Use the largest value specified.
10422 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10423 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10426 case elfcpp::Tag_ABI_align8_preserved
:
10427 case elfcpp::Tag_ABI_PCS_RO_data
:
10428 // Use the smallest value specified.
10429 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10430 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10433 case elfcpp::Tag_ABI_align8_needed
:
10434 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
10435 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
10436 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
10439 // This error message should be enabled once all non-conforming
10440 // binaries in the toolchain have had the attributes set
10442 // gold_error(_("output 8-byte data alignment conflicts with %s"),
10446 case elfcpp::Tag_ABI_FP_denormal
:
10447 case elfcpp::Tag_ABI_PCS_GOT_use
:
10449 // These tags have 0 = don't care, 1 = strong requirement,
10450 // 2 = weak requirement.
10451 static const int order_021
[3] = {0, 2, 1};
10453 // Use the "greatest" from the sequence 0, 2, 1, or the largest
10454 // value if greater than 2 (for future-proofing).
10455 if ((in_attr
[i
].int_value() > 2
10456 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10457 || (in_attr
[i
].int_value() <= 2
10458 && out_attr
[i
].int_value() <= 2
10459 && (order_021
[in_attr
[i
].int_value()]
10460 > order_021
[out_attr
[i
].int_value()])))
10461 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10465 case elfcpp::Tag_CPU_arch_profile
:
10466 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
10468 // 0 will merge with anything.
10469 // 'A' and 'S' merge to 'A'.
10470 // 'R' and 'S' merge to 'R'.
10471 // 'M' and 'A|R|S' is an error.
10472 if (out_attr
[i
].int_value() == 0
10473 || (out_attr
[i
].int_value() == 'S'
10474 && (in_attr
[i
].int_value() == 'A'
10475 || in_attr
[i
].int_value() == 'R')))
10476 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10477 else if (in_attr
[i
].int_value() == 0
10478 || (in_attr
[i
].int_value() == 'S'
10479 && (out_attr
[i
].int_value() == 'A'
10480 || out_attr
[i
].int_value() == 'R')))
10482 else if (parameters
->options().warn_mismatch())
10485 (_("conflicting architecture profiles %c/%c"),
10486 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
10487 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
10491 case elfcpp::Tag_VFP_arch
:
10493 static const struct
10497 } vfp_versions
[7] =
10508 // Values greater than 6 aren't defined, so just pick the
10510 if (in_attr
[i
].int_value() > 6
10511 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10513 *out_attr
= *in_attr
;
10516 // The output uses the superset of input features
10517 // (ISA version) and registers.
10518 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
10519 vfp_versions
[out_attr
[i
].int_value()].ver
);
10520 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
10521 vfp_versions
[out_attr
[i
].int_value()].regs
);
10522 // This assumes all possible supersets are also a valid
10525 for (newval
= 6; newval
> 0; newval
--)
10527 if (regs
== vfp_versions
[newval
].regs
10528 && ver
== vfp_versions
[newval
].ver
)
10531 out_attr
[i
].set_int_value(newval
);
10534 case elfcpp::Tag_PCS_config
:
10535 if (out_attr
[i
].int_value() == 0)
10536 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10537 else if (in_attr
[i
].int_value() != 0
10538 && out_attr
[i
].int_value() != 0
10539 && parameters
->options().warn_mismatch())
10541 // It's sometimes ok to mix different configs, so this is only
10543 gold_warning(_("%s: conflicting platform configuration"), name
);
10546 case elfcpp::Tag_ABI_PCS_R9_use
:
10547 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10548 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10549 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10550 && parameters
->options().warn_mismatch())
10552 gold_error(_("%s: conflicting use of R9"), name
);
10554 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
10555 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10557 case elfcpp::Tag_ABI_PCS_RW_data
:
10558 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10559 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10560 != elfcpp::AEABI_R9_SB
)
10561 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10562 != elfcpp::AEABI_R9_unused
)
10563 && parameters
->options().warn_mismatch())
10565 gold_error(_("%s: SB relative addressing conflicts with use "
10569 // Use the smallest value specified.
10570 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10571 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10573 case elfcpp::Tag_ABI_PCS_wchar_t
:
10574 if (out_attr
[i
].int_value()
10575 && in_attr
[i
].int_value()
10576 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10577 && parameters
->options().warn_mismatch()
10578 && parameters
->options().wchar_size_warning())
10580 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10581 "use %u-byte wchar_t; use of wchar_t values "
10582 "across objects may fail"),
10583 name
, in_attr
[i
].int_value(),
10584 out_attr
[i
].int_value());
10586 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
10587 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10589 case elfcpp::Tag_ABI_enum_size
:
10590 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
10592 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
10593 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
10595 // The existing object is compatible with anything.
10596 // Use whatever requirements the new object has.
10597 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10599 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
10600 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10601 && parameters
->options().warn_mismatch()
10602 && parameters
->options().enum_size_warning())
10604 unsigned int in_value
= in_attr
[i
].int_value();
10605 unsigned int out_value
= out_attr
[i
].int_value();
10606 gold_warning(_("%s uses %s enums yet the output is to use "
10607 "%s enums; use of enum values across objects "
10610 this->aeabi_enum_name(in_value
).c_str(),
10611 this->aeabi_enum_name(out_value
).c_str());
10615 case elfcpp::Tag_ABI_VFP_args
:
10618 case elfcpp::Tag_ABI_WMMX_args
:
10619 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10620 && parameters
->options().warn_mismatch())
10622 gold_error(_("%s uses iWMMXt register arguments, output does "
10627 case Object_attribute::Tag_compatibility
:
10628 // Merged in target-independent code.
10630 case elfcpp::Tag_ABI_HardFP_use
:
10631 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10632 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
10633 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
10634 out_attr
[i
].set_int_value(3);
10635 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10636 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10638 case elfcpp::Tag_ABI_FP_16bit_format
:
10639 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
10641 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10642 && parameters
->options().warn_mismatch())
10643 gold_error(_("fp16 format mismatch between %s and output"),
10646 if (in_attr
[i
].int_value() != 0)
10647 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10650 case elfcpp::Tag_DIV_use
:
10651 // This tag is set to zero if we can use UDIV and SDIV in Thumb
10652 // mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10653 // SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10654 // CPU. We will merge as follows: If the input attribute's value
10655 // is one then the output attribute's value remains unchanged. If
10656 // the input attribute's value is zero or two then if the output
10657 // attribute's value is one the output value is set to the input
10658 // value, otherwise the output value must be the same as the
10660 if (in_attr
[i
].int_value() != 1 && out_attr
[i
].int_value() != 1)
10662 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
10664 gold_error(_("DIV usage mismatch between %s and output"),
10669 if (in_attr
[i
].int_value() != 1)
10670 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10674 case elfcpp::Tag_MPextension_use_legacy
:
10675 // We don't output objects with Tag_MPextension_use_legacy - we
10676 // move the value to Tag_MPextension_use.
10677 if (in_attr
[i
].int_value() != 0
10678 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
10680 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
10681 != in_attr
[i
].int_value())
10683 gold_error(_("%s has has both the current and legacy "
10684 "Tag_MPextension_use attributes"),
10689 if (in_attr
[i
].int_value()
10690 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10691 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
10695 case elfcpp::Tag_nodefaults
:
10696 // This tag is set if it exists, but the value is unused (and is
10697 // typically zero). We don't actually need to do anything here -
10698 // the merge happens automatically when the type flags are merged
10701 case elfcpp::Tag_also_compatible_with
:
10702 // Already done in Tag_CPU_arch.
10704 case elfcpp::Tag_conformance
:
10705 // Keep the attribute if it matches. Throw it away otherwise.
10706 // No attribute means no claim to conform.
10707 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
10708 out_attr
[i
].set_string_value("");
10713 const char* err_object
= NULL
;
10715 // The "known_obj_attributes" table does contain some undefined
10716 // attributes. Ensure that there are unused.
10717 if (out_attr
[i
].int_value() != 0
10718 || out_attr
[i
].string_value() != "")
10719 err_object
= "output";
10720 else if (in_attr
[i
].int_value() != 0
10721 || in_attr
[i
].string_value() != "")
10724 if (err_object
!= NULL
10725 && parameters
->options().warn_mismatch())
10727 // Attribute numbers >=64 (mod 128) can be safely ignored.
10728 if ((i
& 127) < 64)
10729 gold_error(_("%s: unknown mandatory EABI object attribute "
10733 gold_warning(_("%s: unknown EABI object attribute %d"),
10737 // Only pass on attributes that match in both inputs.
10738 if (!in_attr
[i
].matches(out_attr
[i
]))
10740 out_attr
[i
].set_int_value(0);
10741 out_attr
[i
].set_string_value("");
10746 // If out_attr was copied from in_attr then it won't have a type yet.
10747 if (in_attr
[i
].type() && !out_attr
[i
].type())
10748 out_attr
[i
].set_type(in_attr
[i
].type());
10751 // Merge Tag_compatibility attributes and any common GNU ones.
10752 this->attributes_section_data_
->merge(name
, pasd
);
10754 // Check for any attributes not known on ARM.
10755 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
10756 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
10757 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
10758 Other_attributes
* out_other_attributes
=
10759 this->attributes_section_data_
->other_attributes(vendor
);
10760 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
10762 while (in_iter
!= in_other_attributes
->end()
10763 || out_iter
!= out_other_attributes
->end())
10765 const char* err_object
= NULL
;
10768 // The tags for each list are in numerical order.
10769 // If the tags are equal, then merge.
10770 if (out_iter
!= out_other_attributes
->end()
10771 && (in_iter
== in_other_attributes
->end()
10772 || in_iter
->first
> out_iter
->first
))
10774 // This attribute only exists in output. We can't merge, and we
10775 // don't know what the tag means, so delete it.
10776 err_object
= "output";
10777 err_tag
= out_iter
->first
;
10778 int saved_tag
= out_iter
->first
;
10779 delete out_iter
->second
;
10780 out_other_attributes
->erase(out_iter
);
10781 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10783 else if (in_iter
!= in_other_attributes
->end()
10784 && (out_iter
!= out_other_attributes
->end()
10785 || in_iter
->first
< out_iter
->first
))
10787 // This attribute only exists in input. We can't merge, and we
10788 // don't know what the tag means, so ignore it.
10790 err_tag
= in_iter
->first
;
10793 else // The tags are equal.
10795 // As present, all attributes in the list are unknown, and
10796 // therefore can't be merged meaningfully.
10797 err_object
= "output";
10798 err_tag
= out_iter
->first
;
10800 // Only pass on attributes that match in both inputs.
10801 if (!in_iter
->second
->matches(*(out_iter
->second
)))
10803 // No match. Delete the attribute.
10804 int saved_tag
= out_iter
->first
;
10805 delete out_iter
->second
;
10806 out_other_attributes
->erase(out_iter
);
10807 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10811 // Matched. Keep the attribute and move to the next.
10817 if (err_object
&& parameters
->options().warn_mismatch())
10819 // Attribute numbers >=64 (mod 128) can be safely ignored. */
10820 if ((err_tag
& 127) < 64)
10822 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10823 err_object
, err_tag
);
10827 gold_warning(_("%s: unknown EABI object attribute %d"),
10828 err_object
, err_tag
);
10834 // Stub-generation methods for Target_arm.
10836 // Make a new Arm_input_section object.
10838 template<bool big_endian
>
10839 Arm_input_section
<big_endian
>*
10840 Target_arm
<big_endian
>::new_arm_input_section(
10842 unsigned int shndx
)
10844 Section_id
sid(relobj
, shndx
);
10846 Arm_input_section
<big_endian
>* arm_input_section
=
10847 new Arm_input_section
<big_endian
>(relobj
, shndx
);
10848 arm_input_section
->init();
10850 // Register new Arm_input_section in map for look-up.
10851 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
10852 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
10854 // Make sure that it we have not created another Arm_input_section
10855 // for this input section already.
10856 gold_assert(ins
.second
);
10858 return arm_input_section
;
10861 // Find the Arm_input_section object corresponding to the SHNDX-th input
10862 // section of RELOBJ.
10864 template<bool big_endian
>
10865 Arm_input_section
<big_endian
>*
10866 Target_arm
<big_endian
>::find_arm_input_section(
10868 unsigned int shndx
) const
10870 Section_id
sid(relobj
, shndx
);
10871 typename
Arm_input_section_map::const_iterator p
=
10872 this->arm_input_section_map_
.find(sid
);
10873 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
10876 // Make a new stub table.
10878 template<bool big_endian
>
10879 Stub_table
<big_endian
>*
10880 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
10882 Stub_table
<big_endian
>* stub_table
=
10883 new Stub_table
<big_endian
>(owner
);
10884 this->stub_tables_
.push_back(stub_table
);
10886 stub_table
->set_address(owner
->address() + owner
->data_size());
10887 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
10888 stub_table
->finalize_data_size();
10893 // Scan a relocation for stub generation.
10895 template<bool big_endian
>
10897 Target_arm
<big_endian
>::scan_reloc_for_stub(
10898 const Relocate_info
<32, big_endian
>* relinfo
,
10899 unsigned int r_type
,
10900 const Sized_symbol
<32>* gsym
,
10901 unsigned int r_sym
,
10902 const Symbol_value
<32>* psymval
,
10903 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
10904 Arm_address address
)
10906 typedef typename Target_arm
<big_endian
>::Relocate Relocate
;
10908 const Arm_relobj
<big_endian
>* arm_relobj
=
10909 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10911 bool target_is_thumb
;
10912 Symbol_value
<32> symval
;
10915 // This is a global symbol. Determine if we use PLT and if the
10916 // final target is THUMB.
10917 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
10919 // This uses a PLT, change the symbol value.
10920 symval
.set_output_value(this->plt_section()->address()
10921 + gsym
->plt_offset());
10923 target_is_thumb
= false;
10925 else if (gsym
->is_undefined())
10926 // There is no need to generate a stub symbol is undefined.
10931 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
10932 || (gsym
->type() == elfcpp::STT_FUNC
10933 && !gsym
->is_undefined()
10934 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
10939 // This is a local symbol. Determine if the final target is THUMB.
10940 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
10943 // Strip LSB if this points to a THUMB target.
10944 const Arm_reloc_property
* reloc_property
=
10945 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10946 gold_assert(reloc_property
!= NULL
);
10947 if (target_is_thumb
10948 && reloc_property
->uses_thumb_bit()
10949 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
10951 Arm_address stripped_value
=
10952 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
10953 symval
.set_output_value(stripped_value
);
10957 // Get the symbol value.
10958 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
10960 // Owing to pipelining, the PC relative branches below actually skip
10961 // two instructions when the branch offset is 0.
10962 Arm_address destination
;
10965 case elfcpp::R_ARM_CALL
:
10966 case elfcpp::R_ARM_JUMP24
:
10967 case elfcpp::R_ARM_PLT32
:
10969 destination
= value
+ addend
+ 8;
10971 case elfcpp::R_ARM_THM_CALL
:
10972 case elfcpp::R_ARM_THM_XPC22
:
10973 case elfcpp::R_ARM_THM_JUMP24
:
10974 case elfcpp::R_ARM_THM_JUMP19
:
10976 destination
= value
+ addend
+ 4;
10979 gold_unreachable();
10982 Reloc_stub
* stub
= NULL
;
10983 Stub_type stub_type
=
10984 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
10986 if (stub_type
!= arm_stub_none
)
10988 // Try looking up an existing stub from a stub table.
10989 Stub_table
<big_endian
>* stub_table
=
10990 arm_relobj
->stub_table(relinfo
->data_shndx
);
10991 gold_assert(stub_table
!= NULL
);
10993 // Locate stub by destination.
10994 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
10996 // Create a stub if there is not one already
10997 stub
= stub_table
->find_reloc_stub(stub_key
);
11000 // create a new stub and add it to stub table.
11001 stub
= this->stub_factory().make_reloc_stub(stub_type
);
11002 stub_table
->add_reloc_stub(stub
, stub_key
);
11005 // Record the destination address.
11006 stub
->set_destination_address(destination
11007 | (target_is_thumb
? 1 : 0));
11010 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11011 if (this->fix_cortex_a8_
11012 && (r_type
== elfcpp::R_ARM_THM_JUMP24
11013 || r_type
== elfcpp::R_ARM_THM_JUMP19
11014 || r_type
== elfcpp::R_ARM_THM_CALL
11015 || r_type
== elfcpp::R_ARM_THM_XPC22
)
11016 && (address
& 0xfffU
) == 0xffeU
)
11018 // Found a candidate. Note we haven't checked the destination is
11019 // within 4K here: if we do so (and don't create a record) we can't
11020 // tell that a branch should have been relocated when scanning later.
11021 this->cortex_a8_relocs_info_
[address
] =
11022 new Cortex_a8_reloc(stub
, r_type
,
11023 destination
| (target_is_thumb
? 1 : 0));
11027 // This function scans a relocation sections for stub generation.
11028 // The template parameter Relocate must be a class type which provides
11029 // a single function, relocate(), which implements the machine
11030 // specific part of a relocation.
11032 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11033 // SHT_REL or SHT_RELA.
11035 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11036 // of relocs. OUTPUT_SECTION is the output section.
11037 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11038 // mapped to output offsets.
11040 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11041 // VIEW_SIZE is the size. These refer to the input section, unless
11042 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11043 // the output section.
11045 template<bool big_endian
>
11046 template<int sh_type
>
11048 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
11049 const Relocate_info
<32, big_endian
>* relinfo
,
11050 const unsigned char* prelocs
,
11051 size_t reloc_count
,
11052 Output_section
* output_section
,
11053 bool needs_special_offset_handling
,
11054 const unsigned char* view
,
11055 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
11058 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
11059 const int reloc_size
=
11060 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
11062 Arm_relobj
<big_endian
>* arm_object
=
11063 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11064 unsigned int local_count
= arm_object
->local_symbol_count();
11066 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
11068 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
11070 Reltype
reloc(prelocs
);
11072 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
11073 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
11074 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
11076 r_type
= this->get_real_reloc_type(r_type
);
11078 // Only a few relocation types need stubs.
11079 if ((r_type
!= elfcpp::R_ARM_CALL
)
11080 && (r_type
!= elfcpp::R_ARM_JUMP24
)
11081 && (r_type
!= elfcpp::R_ARM_PLT32
)
11082 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
11083 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
11084 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
11085 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
11086 && (r_type
!= elfcpp::R_ARM_V4BX
))
11089 section_offset_type offset
=
11090 convert_to_section_size_type(reloc
.get_r_offset());
11092 if (needs_special_offset_handling
)
11094 offset
= output_section
->output_offset(relinfo
->object
,
11095 relinfo
->data_shndx
,
11101 // Create a v4bx stub if --fix-v4bx-interworking is used.
11102 if (r_type
== elfcpp::R_ARM_V4BX
)
11104 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
11106 // Get the BX instruction.
11107 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
11108 const Valtype
* wv
=
11109 reinterpret_cast<const Valtype
*>(view
+ offset
);
11110 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
11111 elfcpp::Swap
<32, big_endian
>::readval(wv
);
11112 const uint32_t reg
= (insn
& 0xf);
11116 // Try looking up an existing stub from a stub table.
11117 Stub_table
<big_endian
>* stub_table
=
11118 arm_object
->stub_table(relinfo
->data_shndx
);
11119 gold_assert(stub_table
!= NULL
);
11121 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
11123 // create a new stub and add it to stub table.
11124 Arm_v4bx_stub
* stub
=
11125 this->stub_factory().make_arm_v4bx_stub(reg
);
11126 gold_assert(stub
!= NULL
);
11127 stub_table
->add_arm_v4bx_stub(stub
);
11135 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
11136 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
11137 stub_addend_reader(r_type
, view
+ offset
, reloc
);
11139 const Sized_symbol
<32>* sym
;
11141 Symbol_value
<32> symval
;
11142 const Symbol_value
<32> *psymval
;
11143 bool is_defined_in_discarded_section
;
11144 unsigned int shndx
;
11145 if (r_sym
< local_count
)
11148 psymval
= arm_object
->local_symbol(r_sym
);
11150 // If the local symbol belongs to a section we are discarding,
11151 // and that section is a debug section, try to find the
11152 // corresponding kept section and map this symbol to its
11153 // counterpart in the kept section. The symbol must not
11154 // correspond to a section we are folding.
11156 shndx
= psymval
->input_shndx(&is_ordinary
);
11157 is_defined_in_discarded_section
=
11159 && shndx
!= elfcpp::SHN_UNDEF
11160 && !arm_object
->is_section_included(shndx
)
11161 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
11163 // We need to compute the would-be final value of this local
11165 if (!is_defined_in_discarded_section
)
11167 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
11168 typename
ObjType::Compute_final_local_value_status status
=
11169 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
11171 if (status
== ObjType::CFLV_OK
)
11173 // Currently we cannot handle a branch to a target in
11174 // a merged section. If this is the case, issue an error
11175 // and also free the merge symbol value.
11176 if (!symval
.has_output_value())
11178 const std::string
& section_name
=
11179 arm_object
->section_name(shndx
);
11180 arm_object
->error(_("cannot handle branch to local %u "
11181 "in a merged section %s"),
11182 r_sym
, section_name
.c_str());
11188 // We cannot determine the final value.
11195 const Symbol
* gsym
;
11196 gsym
= arm_object
->global_symbol(r_sym
);
11197 gold_assert(gsym
!= NULL
);
11198 if (gsym
->is_forwarder())
11199 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
11201 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
11202 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
11203 symval
.set_output_symtab_index(sym
->symtab_index());
11205 symval
.set_no_output_symtab_entry();
11207 // We need to compute the would-be final value of this global
11209 const Symbol_table
* symtab
= relinfo
->symtab
;
11210 const Sized_symbol
<32>* sized_symbol
=
11211 symtab
->get_sized_symbol
<32>(gsym
);
11212 Symbol_table::Compute_final_value_status status
;
11213 Arm_address value
=
11214 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
11216 // Skip this if the symbol has not output section.
11217 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
11219 symval
.set_output_value(value
);
11221 if (gsym
->type() == elfcpp::STT_TLS
)
11222 symval
.set_is_tls_symbol();
11223 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
11224 symval
.set_is_ifunc_symbol();
11227 is_defined_in_discarded_section
=
11228 (gsym
->is_defined_in_discarded_section()
11229 && gsym
->is_undefined());
11233 Symbol_value
<32> symval2
;
11234 if (is_defined_in_discarded_section
)
11236 if (comdat_behavior
== CB_UNDETERMINED
)
11238 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
11239 comdat_behavior
= get_comdat_behavior(name
.c_str());
11241 if (comdat_behavior
== CB_PRETEND
)
11243 // FIXME: This case does not work for global symbols.
11244 // We have no place to store the original section index.
11245 // Fortunately this does not matter for comdat sections,
11246 // only for sections explicitly discarded by a linker
11249 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
11250 arm_object
->map_to_kept_section(shndx
, &found
);
11252 symval2
.set_output_value(value
+ psymval
->input_value());
11254 symval2
.set_output_value(0);
11258 if (comdat_behavior
== CB_WARNING
)
11259 gold_warning_at_location(relinfo
, i
, offset
,
11260 _("relocation refers to discarded "
11262 symval2
.set_output_value(0);
11264 symval2
.set_no_output_symtab_entry();
11265 psymval
= &symval2
;
11268 // If symbol is a section symbol, we don't know the actual type of
11269 // destination. Give up.
11270 if (psymval
->is_section_symbol())
11273 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
11274 addend
, view_address
+ offset
);
11278 // Scan an input section for stub generation.
11280 template<bool big_endian
>
11282 Target_arm
<big_endian
>::scan_section_for_stubs(
11283 const Relocate_info
<32, big_endian
>* relinfo
,
11284 unsigned int sh_type
,
11285 const unsigned char* prelocs
,
11286 size_t reloc_count
,
11287 Output_section
* output_section
,
11288 bool needs_special_offset_handling
,
11289 const unsigned char* view
,
11290 Arm_address view_address
,
11291 section_size_type view_size
)
11293 if (sh_type
== elfcpp::SHT_REL
)
11294 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
11299 needs_special_offset_handling
,
11303 else if (sh_type
== elfcpp::SHT_RELA
)
11304 // We do not support RELA type relocations yet. This is provided for
11306 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
11311 needs_special_offset_handling
,
11316 gold_unreachable();
11319 // Group input sections for stub generation.
11321 // We group input sections in an output section so that the total size,
11322 // including any padding space due to alignment is smaller than GROUP_SIZE
11323 // unless the only input section in group is bigger than GROUP_SIZE already.
11324 // Then an ARM stub table is created to follow the last input section
11325 // in group. For each group an ARM stub table is created an is placed
11326 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
11327 // extend the group after the stub table.
11329 template<bool big_endian
>
11331 Target_arm
<big_endian
>::group_sections(
11333 section_size_type group_size
,
11334 bool stubs_always_after_branch
,
11337 // Group input sections and insert stub table
11338 Layout::Section_list section_list
;
11339 layout
->get_allocated_sections(§ion_list
);
11340 for (Layout::Section_list::const_iterator p
= section_list
.begin();
11341 p
!= section_list
.end();
11344 Arm_output_section
<big_endian
>* output_section
=
11345 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11346 output_section
->group_sections(group_size
, stubs_always_after_branch
,
11351 // Relaxation hook. This is where we do stub generation.
11353 template<bool big_endian
>
11355 Target_arm
<big_endian
>::do_relax(
11357 const Input_objects
* input_objects
,
11358 Symbol_table
* symtab
,
11362 // No need to generate stubs if this is a relocatable link.
11363 gold_assert(!parameters
->options().relocatable());
11365 // If this is the first pass, we need to group input sections into
11367 bool done_exidx_fixup
= false;
11368 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
11371 // Determine the stub group size. The group size is the absolute
11372 // value of the parameter --stub-group-size. If --stub-group-size
11373 // is passed a negative value, we restrict stubs to be always after
11374 // the stubbed branches.
11375 int32_t stub_group_size_param
=
11376 parameters
->options().stub_group_size();
11377 bool stubs_always_after_branch
= stub_group_size_param
< 0;
11378 section_size_type stub_group_size
= abs(stub_group_size_param
);
11380 if (stub_group_size
== 1)
11383 // Thumb branch range is +-4MB has to be used as the default
11384 // maximum size (a given section can contain both ARM and Thumb
11385 // code, so the worst case has to be taken into account). If we are
11386 // fixing cortex-a8 errata, the branch range has to be even smaller,
11387 // since wide conditional branch has a range of +-1MB only.
11389 // This value is 48K less than that, which allows for 4096
11390 // 12-byte stubs. If we exceed that, then we will fail to link.
11391 // The user will have to relink with an explicit group size
11393 stub_group_size
= 4145152;
11396 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
11397 // page as the first half of a 32-bit branch straddling two 4K pages.
11398 // This is a crude way of enforcing that. In addition, long conditional
11399 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
11400 // erratum, limit the group size to (1M - 12k) to avoid unreachable
11401 // cortex-A8 stubs from long conditional branches.
11402 if (this->fix_cortex_a8_
)
11404 stubs_always_after_branch
= true;
11405 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
11406 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
11409 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
11411 // Also fix .ARM.exidx section coverage.
11412 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
11413 for (Layout::Section_list::const_iterator p
=
11414 layout
->section_list().begin();
11415 p
!= layout
->section_list().end();
11417 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
11419 if (exidx_output_section
== NULL
)
11420 exidx_output_section
=
11421 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11423 // We cannot handle this now.
11424 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
11425 "non-relocatable link"),
11426 exidx_output_section
->name(),
11430 if (exidx_output_section
!= NULL
)
11432 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
11434 done_exidx_fixup
= true;
11439 // If this is not the first pass, addresses and file offsets have
11440 // been reset at this point, set them here.
11441 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11442 sp
!= this->stub_tables_
.end();
11445 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11446 off_t off
= align_address(owner
->original_size(),
11447 (*sp
)->addralign());
11448 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
11449 owner
->offset() + off
);
11453 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
11454 // beginning of each relaxation pass, just blow away all the stubs.
11455 // Alternatively, we could selectively remove only the stubs and reloc
11456 // information for code sections that have moved since the last pass.
11457 // That would require more book-keeping.
11458 if (this->fix_cortex_a8_
)
11460 // Clear all Cortex-A8 reloc information.
11461 for (typename
Cortex_a8_relocs_info::const_iterator p
=
11462 this->cortex_a8_relocs_info_
.begin();
11463 p
!= this->cortex_a8_relocs_info_
.end();
11466 this->cortex_a8_relocs_info_
.clear();
11468 // Remove all Cortex-A8 stubs.
11469 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11470 sp
!= this->stub_tables_
.end();
11472 (*sp
)->remove_all_cortex_a8_stubs();
11475 // Scan relocs for relocation stubs
11476 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11477 op
!= input_objects
->relobj_end();
11480 Arm_relobj
<big_endian
>* arm_relobj
=
11481 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11482 // Lock the object so we can read from it. This is only called
11483 // single-threaded from Layout::finalize, so it is OK to lock.
11484 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11485 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
11488 // Check all stub tables to see if any of them have their data sizes
11489 // or addresses alignments changed. These are the only things that
11491 bool any_stub_table_changed
= false;
11492 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
11493 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11494 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11497 if ((*sp
)->update_data_size_and_addralign())
11499 // Update data size of stub table owner.
11500 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11501 uint64_t address
= owner
->address();
11502 off_t offset
= owner
->offset();
11503 owner
->reset_address_and_file_offset();
11504 owner
->set_address_and_file_offset(address
, offset
);
11506 sections_needing_adjustment
.insert(owner
->output_section());
11507 any_stub_table_changed
= true;
11511 // Output_section_data::output_section() returns a const pointer but we
11512 // need to update output sections, so we record all output sections needing
11513 // update above and scan the sections here to find out what sections need
11515 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
11516 p
!= layout
->section_list().end();
11519 if (sections_needing_adjustment
.find(*p
)
11520 != sections_needing_adjustment
.end())
11521 (*p
)->set_section_offsets_need_adjustment();
11524 // Stop relaxation if no EXIDX fix-up and no stub table change.
11525 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
11527 // Finalize the stubs in the last relaxation pass.
11528 if (!continue_relaxation
)
11530 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11531 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11533 (*sp
)->finalize_stubs();
11535 // Update output local symbol counts of objects if necessary.
11536 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11537 op
!= input_objects
->relobj_end();
11540 Arm_relobj
<big_endian
>* arm_relobj
=
11541 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11543 // Update output local symbol counts. We need to discard local
11544 // symbols defined in parts of input sections that are discarded by
11546 if (arm_relobj
->output_local_symbol_count_needs_update())
11548 // We need to lock the object's file to update it.
11549 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11550 arm_relobj
->update_output_local_symbol_count();
11555 return continue_relaxation
;
11558 // Relocate a stub.
11560 template<bool big_endian
>
11562 Target_arm
<big_endian
>::relocate_stub(
11564 const Relocate_info
<32, big_endian
>* relinfo
,
11565 Output_section
* output_section
,
11566 unsigned char* view
,
11567 Arm_address address
,
11568 section_size_type view_size
)
11571 const Stub_template
* stub_template
= stub
->stub_template();
11572 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
11574 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
11575 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
11577 unsigned int r_type
= insn
->r_type();
11578 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
11579 section_size_type reloc_size
= insn
->size();
11580 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
11582 // This is the address of the stub destination.
11583 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
11584 Symbol_value
<32> symval
;
11585 symval
.set_output_value(target
);
11587 // Synthesize a fake reloc just in case. We don't have a symbol so
11589 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
11590 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
11591 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
11592 reloc_write
.put_r_offset(reloc_offset
);
11593 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
11594 elfcpp::Rel
<32, big_endian
> rel(reloc_buffer
);
11596 relocate
.relocate(relinfo
, this, output_section
,
11597 this->fake_relnum_for_stubs
, rel
, r_type
,
11598 NULL
, &symval
, view
+ reloc_offset
,
11599 address
+ reloc_offset
, reloc_size
);
11603 // Determine whether an object attribute tag takes an integer, a
11606 template<bool big_endian
>
11608 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
11610 if (tag
== Object_attribute::Tag_compatibility
)
11611 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11612 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
11613 else if (tag
== elfcpp::Tag_nodefaults
)
11614 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11615 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
11616 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
11617 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
11619 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
11621 return ((tag
& 1) != 0
11622 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11623 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
11626 // Reorder attributes.
11628 // The ABI defines that Tag_conformance should be emitted first, and that
11629 // Tag_nodefaults should be second (if either is defined). This sets those
11630 // two positions, and bumps up the position of all the remaining tags to
11633 template<bool big_endian
>
11635 Target_arm
<big_endian
>::do_attributes_order(int num
) const
11637 // Reorder the known object attributes in output. We want to move
11638 // Tag_conformance to position 4 and Tag_conformance to position 5
11639 // and shift everything between 4 .. Tag_conformance - 1 to make room.
11641 return elfcpp::Tag_conformance
;
11643 return elfcpp::Tag_nodefaults
;
11644 if ((num
- 2) < elfcpp::Tag_nodefaults
)
11646 if ((num
- 1) < elfcpp::Tag_conformance
)
11651 // Scan a span of THUMB code for Cortex-A8 erratum.
11653 template<bool big_endian
>
11655 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
11656 Arm_relobj
<big_endian
>* arm_relobj
,
11657 unsigned int shndx
,
11658 section_size_type span_start
,
11659 section_size_type span_end
,
11660 const unsigned char* view
,
11661 Arm_address address
)
11663 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11665 // The opcode is BLX.W, BL.W, B.W, Bcc.W
11666 // The branch target is in the same 4KB region as the
11667 // first half of the branch.
11668 // The instruction before the branch is a 32-bit
11669 // length non-branch instruction.
11670 section_size_type i
= span_start
;
11671 bool last_was_32bit
= false;
11672 bool last_was_branch
= false;
11673 while (i
< span_end
)
11675 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11676 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
11677 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11678 bool is_blx
= false, is_b
= false;
11679 bool is_bl
= false, is_bcc
= false;
11681 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
11684 // Load the rest of the insn (in manual-friendly order).
11685 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11687 // Encoding T4: B<c>.W.
11688 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
11689 // Encoding T1: BL<c>.W.
11690 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
11691 // Encoding T2: BLX<c>.W.
11692 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
11693 // Encoding T3: B<c>.W (not permitted in IT block).
11694 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
11695 && (insn
& 0x07f00000U
) != 0x03800000U
);
11698 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
11700 // If this instruction is a 32-bit THUMB branch that crosses a 4K
11701 // page boundary and it follows 32-bit non-branch instruction,
11702 // we need to work around.
11703 if (is_32bit_branch
11704 && ((address
+ i
) & 0xfffU
) == 0xffeU
11706 && !last_was_branch
)
11708 // Check to see if there is a relocation stub for this branch.
11709 bool force_target_arm
= false;
11710 bool force_target_thumb
= false;
11711 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
11712 Cortex_a8_relocs_info::const_iterator p
=
11713 this->cortex_a8_relocs_info_
.find(address
+ i
);
11715 if (p
!= this->cortex_a8_relocs_info_
.end())
11717 cortex_a8_reloc
= p
->second
;
11718 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
11720 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11721 && !target_is_thumb
)
11722 force_target_arm
= true;
11723 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11724 && target_is_thumb
)
11725 force_target_thumb
= true;
11729 Stub_type stub_type
= arm_stub_none
;
11731 // Check if we have an offending branch instruction.
11732 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
11733 uint16_t lower_insn
= insn
& 0xffffU
;
11734 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
11736 if (cortex_a8_reloc
!= NULL
11737 && cortex_a8_reloc
->reloc_stub() != NULL
)
11738 // We've already made a stub for this instruction, e.g.
11739 // it's a long branch or a Thumb->ARM stub. Assume that
11740 // stub will suffice to work around the A8 erratum (see
11741 // setting of always_after_branch above).
11745 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
11747 stub_type
= arm_stub_a8_veneer_b_cond
;
11749 else if (is_b
|| is_bl
|| is_blx
)
11751 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
11756 stub_type
= (is_blx
11757 ? arm_stub_a8_veneer_blx
11759 ? arm_stub_a8_veneer_bl
11760 : arm_stub_a8_veneer_b
));
11763 if (stub_type
!= arm_stub_none
)
11765 Arm_address pc_for_insn
= address
+ i
+ 4;
11767 // The original instruction is a BL, but the target is
11768 // an ARM instruction. If we were not making a stub,
11769 // the BL would have been converted to a BLX. Use the
11770 // BLX stub instead in that case.
11771 if (this->may_use_v5t_interworking() && force_target_arm
11772 && stub_type
== arm_stub_a8_veneer_bl
)
11774 stub_type
= arm_stub_a8_veneer_blx
;
11778 // Conversely, if the original instruction was
11779 // BLX but the target is Thumb mode, use the BL stub.
11780 else if (force_target_thumb
11781 && stub_type
== arm_stub_a8_veneer_blx
)
11783 stub_type
= arm_stub_a8_veneer_bl
;
11791 // If we found a relocation, use the proper destination,
11792 // not the offset in the (unrelocated) instruction.
11793 // Note this is always done if we switched the stub type above.
11794 if (cortex_a8_reloc
!= NULL
)
11795 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
11797 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
11799 // Add a new stub if destination address in in the same page.
11800 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
11802 Cortex_a8_stub
* stub
=
11803 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
11807 Stub_table
<big_endian
>* stub_table
=
11808 arm_relobj
->stub_table(shndx
);
11809 gold_assert(stub_table
!= NULL
);
11810 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
11815 i
+= insn_32bit
? 4 : 2;
11816 last_was_32bit
= insn_32bit
;
11817 last_was_branch
= is_32bit_branch
;
11821 // Apply the Cortex-A8 workaround.
11823 template<bool big_endian
>
11825 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
11826 const Cortex_a8_stub
* stub
,
11827 Arm_address stub_address
,
11828 unsigned char* insn_view
,
11829 Arm_address insn_address
)
11831 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11832 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
11833 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11834 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11835 off_t branch_offset
= stub_address
- (insn_address
+ 4);
11837 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
11838 switch (stub
->stub_template()->type())
11840 case arm_stub_a8_veneer_b_cond
:
11841 // For a conditional branch, we re-write it to be an unconditional
11842 // branch to the stub. We use the THUMB-2 encoding here.
11843 upper_insn
= 0xf000U
;
11844 lower_insn
= 0xb800U
;
11846 case arm_stub_a8_veneer_b
:
11847 case arm_stub_a8_veneer_bl
:
11848 case arm_stub_a8_veneer_blx
:
11849 if ((lower_insn
& 0x5000U
) == 0x4000U
)
11850 // For a BLX instruction, make sure that the relocation is
11851 // rounded up to a word boundary. This follows the semantics of
11852 // the instruction which specifies that bit 1 of the target
11853 // address will come from bit 1 of the base address.
11854 branch_offset
= (branch_offset
+ 2) & ~3;
11856 // Put BRANCH_OFFSET back into the insn.
11857 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
11858 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
11859 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
11863 gold_unreachable();
11866 // Put the relocated value back in the object file:
11867 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
11868 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
11871 template<bool big_endian
>
11872 class Target_selector_arm
: public Target_selector
11875 Target_selector_arm()
11876 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
11877 (big_endian
? "elf32-bigarm" : "elf32-littlearm"),
11878 (big_endian
? "armelfb" : "armelf"))
11882 do_instantiate_target()
11883 { return new Target_arm
<big_endian
>(); }
11886 // Fix .ARM.exidx section coverage.
11888 template<bool big_endian
>
11890 Target_arm
<big_endian
>::fix_exidx_coverage(
11892 const Input_objects
* input_objects
,
11893 Arm_output_section
<big_endian
>* exidx_section
,
11894 Symbol_table
* symtab
,
11897 // We need to look at all the input sections in output in ascending
11898 // order of of output address. We do that by building a sorted list
11899 // of output sections by addresses. Then we looks at the output sections
11900 // in order. The input sections in an output section are already sorted
11901 // by addresses within the output section.
11903 typedef std::set
<Output_section
*, output_section_address_less_than
>
11904 Sorted_output_section_list
;
11905 Sorted_output_section_list sorted_output_sections
;
11907 // Find out all the output sections of input sections pointed by
11908 // EXIDX input sections.
11909 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
11910 p
!= input_objects
->relobj_end();
11913 Arm_relobj
<big_endian
>* arm_relobj
=
11914 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
11915 std::vector
<unsigned int> shndx_list
;
11916 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
11917 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
11919 const Arm_exidx_input_section
* exidx_input_section
=
11920 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
11921 gold_assert(exidx_input_section
!= NULL
);
11922 if (!exidx_input_section
->has_errors())
11924 unsigned int text_shndx
= exidx_input_section
->link();
11925 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
11926 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
11927 sorted_output_sections
.insert(os
);
11932 // Go over the output sections in ascending order of output addresses.
11933 typedef typename Arm_output_section
<big_endian
>::Text_section_list
11935 Text_section_list sorted_text_sections
;
11936 for (typename
Sorted_output_section_list::iterator p
=
11937 sorted_output_sections
.begin();
11938 p
!= sorted_output_sections
.end();
11941 Arm_output_section
<big_endian
>* arm_output_section
=
11942 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11943 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
11946 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
11947 merge_exidx_entries(), task
);
11950 Target_selector_arm
<false> target_selector_arm
;
11951 Target_selector_arm
<true> target_selector_armbe
;
11953 } // End anonymous namespace.