1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
60 template<bool big_endian
>
61 class Output_data_plt_arm
;
63 template<bool big_endian
>
66 template<bool big_endian
>
67 class Arm_input_section
;
69 class Arm_exidx_cantunwind
;
71 class Arm_exidx_merged_section
;
73 class Arm_exidx_fixup
;
75 template<bool big_endian
>
76 class Arm_output_section
;
78 class Arm_exidx_input_section
;
80 template<bool big_endian
>
83 template<bool big_endian
>
84 class Arm_relocate_functions
;
86 template<bool big_endian
>
87 class Arm_output_data_got
;
89 template<bool big_endian
>
93 typedef elfcpp::Elf_types
<32>::Elf_Addr Arm_address
;
95 // Maximum branch offsets for ARM, THUMB and THUMB2.
96 const int32_t ARM_MAX_FWD_BRANCH_OFFSET
= ((((1 << 23) - 1) << 2) + 8);
97 const int32_t ARM_MAX_BWD_BRANCH_OFFSET
= ((-((1 << 23) << 2)) + 8);
98 const int32_t THM_MAX_FWD_BRANCH_OFFSET
= ((1 << 22) -2 + 4);
99 const int32_t THM_MAX_BWD_BRANCH_OFFSET
= (-(1 << 22) + 4);
100 const int32_t THM2_MAX_FWD_BRANCH_OFFSET
= (((1 << 24) - 2) + 4);
101 const int32_t THM2_MAX_BWD_BRANCH_OFFSET
= (-(1 << 24) + 4);
103 // Thread Control Block size.
104 const size_t ARM_TCB_SIZE
= 8;
106 // The arm target class.
108 // This is a very simple port of gold for ARM-EABI. It is intended for
109 // supporting Android only for the time being.
112 // - Implement all static relocation types documented in arm-reloc.def.
113 // - Make PLTs more flexible for different architecture features like
115 // There are probably a lot more.
117 // Ideally we would like to avoid using global variables but this is used
118 // very in many places and sometimes in loops. If we use a function
119 // returning a static instance of Arm_reloc_property_table, it will be very
120 // slow in an threaded environment since the static instance needs to be
121 // locked. The pointer is below initialized in the
122 // Target::do_select_as_default_target() hook so that we do not spend time
123 // building the table if we are not linking ARM objects.
125 // An alternative is to to process the information in arm-reloc.def in
126 // compilation time and generate a representation of it in PODs only. That
127 // way we can avoid initialization when the linker starts.
129 Arm_reloc_property_table
* arm_reloc_property_table
= NULL
;
131 // Instruction template class. This class is similar to the insn_sequence
132 // struct in bfd/elf32-arm.c.
137 // Types of instruction templates.
141 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
142 // templates with class-specific semantics. Currently this is used
143 // only by the Cortex_a8_stub class for handling condition codes in
144 // conditional branches.
145 THUMB16_SPECIAL_TYPE
,
151 // Factory methods to create instruction templates in different formats.
153 static const Insn_template
154 thumb16_insn(uint32_t data
)
155 { return Insn_template(data
, THUMB16_TYPE
, elfcpp::R_ARM_NONE
, 0); }
157 // A Thumb conditional branch, in which the proper condition is inserted
158 // when we build the stub.
159 static const Insn_template
160 thumb16_bcond_insn(uint32_t data
)
161 { return Insn_template(data
, THUMB16_SPECIAL_TYPE
, elfcpp::R_ARM_NONE
, 1); }
163 static const Insn_template
164 thumb32_insn(uint32_t data
)
165 { return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_NONE
, 0); }
167 static const Insn_template
168 thumb32_b_insn(uint32_t data
, int reloc_addend
)
170 return Insn_template(data
, THUMB32_TYPE
, elfcpp::R_ARM_THM_JUMP24
,
174 static const Insn_template
175 arm_insn(uint32_t data
)
176 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_NONE
, 0); }
178 static const Insn_template
179 arm_rel_insn(unsigned data
, int reloc_addend
)
180 { return Insn_template(data
, ARM_TYPE
, elfcpp::R_ARM_JUMP24
, reloc_addend
); }
182 static const Insn_template
183 data_word(unsigned data
, unsigned int r_type
, int reloc_addend
)
184 { return Insn_template(data
, DATA_TYPE
, r_type
, reloc_addend
); }
186 // Accessors. This class is used for read-only objects so no modifiers
191 { return this->data_
; }
193 // Return the instruction sequence type of this.
196 { return this->type_
; }
198 // Return the ARM relocation type of this.
201 { return this->r_type_
; }
205 { return this->reloc_addend_
; }
207 // Return size of instruction template in bytes.
211 // Return byte-alignment of instruction template.
216 // We make the constructor private to ensure that only the factory
219 Insn_template(unsigned data
, Type type
, unsigned int r_type
, int reloc_addend
)
220 : data_(data
), type_(type
), r_type_(r_type
), reloc_addend_(reloc_addend
)
223 // Instruction specific data. This is used to store information like
224 // some of the instruction bits.
226 // Instruction template type.
228 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
229 unsigned int r_type_
;
230 // Relocation addend.
231 int32_t reloc_addend_
;
234 // Macro for generating code to stub types. One entry per long/short
238 DEF_STUB(long_branch_any_any) \
239 DEF_STUB(long_branch_v4t_arm_thumb) \
240 DEF_STUB(long_branch_thumb_only) \
241 DEF_STUB(long_branch_v4t_thumb_thumb) \
242 DEF_STUB(long_branch_v4t_thumb_arm) \
243 DEF_STUB(short_branch_v4t_thumb_arm) \
244 DEF_STUB(long_branch_any_arm_pic) \
245 DEF_STUB(long_branch_any_thumb_pic) \
246 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
247 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
248 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
249 DEF_STUB(long_branch_thumb_only_pic) \
250 DEF_STUB(a8_veneer_b_cond) \
251 DEF_STUB(a8_veneer_b) \
252 DEF_STUB(a8_veneer_bl) \
253 DEF_STUB(a8_veneer_blx) \
254 DEF_STUB(v4_veneer_bx)
258 #define DEF_STUB(x) arm_stub_##x,
264 // First reloc stub type.
265 arm_stub_reloc_first
= arm_stub_long_branch_any_any
,
266 // Last reloc stub type.
267 arm_stub_reloc_last
= arm_stub_long_branch_thumb_only_pic
,
269 // First Cortex-A8 stub type.
270 arm_stub_cortex_a8_first
= arm_stub_a8_veneer_b_cond
,
271 // Last Cortex-A8 stub type.
272 arm_stub_cortex_a8_last
= arm_stub_a8_veneer_blx
,
275 arm_stub_type_last
= arm_stub_v4_veneer_bx
279 // Stub template class. Templates are meant to be read-only objects.
280 // A stub template for a stub type contains all read-only attributes
281 // common to all stubs of the same type.
286 Stub_template(Stub_type
, const Insn_template
*, size_t);
294 { return this->type_
; }
296 // Return an array of instruction templates.
299 { return this->insns_
; }
301 // Return size of template in number of instructions.
304 { return this->insn_count_
; }
306 // Return size of template in bytes.
309 { return this->size_
; }
311 // Return alignment of the stub template.
314 { return this->alignment_
; }
316 // Return whether entry point is in thumb mode.
318 entry_in_thumb_mode() const
319 { return this->entry_in_thumb_mode_
; }
321 // Return number of relocations in this template.
324 { return this->relocs_
.size(); }
326 // Return index of the I-th instruction with relocation.
328 reloc_insn_index(size_t i
) const
330 gold_assert(i
< this->relocs_
.size());
331 return this->relocs_
[i
].first
;
334 // Return the offset of the I-th instruction with relocation from the
335 // beginning of the stub.
337 reloc_offset(size_t i
) const
339 gold_assert(i
< this->relocs_
.size());
340 return this->relocs_
[i
].second
;
344 // This contains information about an instruction template with a relocation
345 // and its offset from start of stub.
346 typedef std::pair
<size_t, section_size_type
> Reloc
;
348 // A Stub_template may not be copied. We want to share templates as much
350 Stub_template(const Stub_template
&);
351 Stub_template
& operator=(const Stub_template
&);
355 // Points to an array of Insn_templates.
356 const Insn_template
* insns_
;
357 // Number of Insn_templates in insns_[].
359 // Size of templated instructions in bytes.
361 // Alignment of templated instructions.
363 // Flag to indicate if entry is in thumb mode.
364 bool entry_in_thumb_mode_
;
365 // A table of reloc instruction indices and offsets. We can find these by
366 // looking at the instruction templates but we pre-compute and then stash
367 // them here for speed.
368 std::vector
<Reloc
> relocs_
;
372 // A class for code stubs. This is a base class for different type of
373 // stubs used in the ARM target.
379 static const section_offset_type invalid_offset
=
380 static_cast<section_offset_type
>(-1);
383 Stub(const Stub_template
* stub_template
)
384 : stub_template_(stub_template
), offset_(invalid_offset
)
391 // Return the stub template.
393 stub_template() const
394 { return this->stub_template_
; }
396 // Return offset of code stub from beginning of its containing stub table.
400 gold_assert(this->offset_
!= invalid_offset
);
401 return this->offset_
;
404 // Set offset of code stub from beginning of its containing stub table.
406 set_offset(section_offset_type offset
)
407 { this->offset_
= offset
; }
409 // Return the relocation target address of the i-th relocation in the
410 // stub. This must be defined in a child class.
412 reloc_target(size_t i
)
413 { return this->do_reloc_target(i
); }
415 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
417 write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
418 { this->do_write(view
, view_size
, big_endian
); }
420 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
421 // for the i-th instruction.
423 thumb16_special(size_t i
)
424 { return this->do_thumb16_special(i
); }
427 // This must be defined in the child class.
429 do_reloc_target(size_t) = 0;
431 // This may be overridden in the child class.
433 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
436 this->do_fixed_endian_write
<true>(view
, view_size
);
438 this->do_fixed_endian_write
<false>(view
, view_size
);
441 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
442 // instruction template.
444 do_thumb16_special(size_t)
445 { gold_unreachable(); }
448 // A template to implement do_write.
449 template<bool big_endian
>
451 do_fixed_endian_write(unsigned char*, section_size_type
);
454 const Stub_template
* stub_template_
;
455 // Offset within the section of containing this stub.
456 section_offset_type offset_
;
459 // Reloc stub class. These are stubs we use to fix up relocation because
460 // of limited branch ranges.
462 class Reloc_stub
: public Stub
465 static const unsigned int invalid_index
= static_cast<unsigned int>(-1);
466 // We assume we never jump to this address.
467 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
469 // Return destination address.
471 destination_address() const
473 gold_assert(this->destination_address_
!= this->invalid_address
);
474 return this->destination_address_
;
477 // Set destination address.
479 set_destination_address(Arm_address address
)
481 gold_assert(address
!= this->invalid_address
);
482 this->destination_address_
= address
;
485 // Reset destination address.
487 reset_destination_address()
488 { this->destination_address_
= this->invalid_address
; }
490 // Determine stub type for a branch of a relocation of R_TYPE going
491 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
492 // the branch target is a thumb instruction. TARGET is used for look
493 // up ARM-specific linker settings.
495 stub_type_for_reloc(unsigned int r_type
, Arm_address branch_address
,
496 Arm_address branch_target
, bool target_is_thumb
);
498 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
499 // and an addend. Since we treat global and local symbol differently, we
500 // use a Symbol object for a global symbol and a object-index pair for
505 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
506 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
507 // and R_SYM must not be invalid_index.
508 Key(Stub_type stub_type
, const Symbol
* symbol
, const Relobj
* relobj
,
509 unsigned int r_sym
, int32_t addend
)
510 : stub_type_(stub_type
), addend_(addend
)
514 this->r_sym_
= Reloc_stub::invalid_index
;
515 this->u_
.symbol
= symbol
;
519 gold_assert(relobj
!= NULL
&& r_sym
!= invalid_index
);
520 this->r_sym_
= r_sym
;
521 this->u_
.relobj
= relobj
;
528 // Accessors: Keys are meant to be read-only object so no modifiers are
534 { return this->stub_type_
; }
536 // Return the local symbol index or invalid_index.
539 { return this->r_sym_
; }
541 // Return the symbol if there is one.
544 { return this->r_sym_
== invalid_index
? this->u_
.symbol
: NULL
; }
546 // Return the relobj if there is one.
549 { return this->r_sym_
!= invalid_index
? this->u_
.relobj
: NULL
; }
551 // Whether this equals to another key k.
553 eq(const Key
& k
) const
555 return ((this->stub_type_
== k
.stub_type_
)
556 && (this->r_sym_
== k
.r_sym_
)
557 && ((this->r_sym_
!= Reloc_stub::invalid_index
)
558 ? (this->u_
.relobj
== k
.u_
.relobj
)
559 : (this->u_
.symbol
== k
.u_
.symbol
))
560 && (this->addend_
== k
.addend_
));
563 // Return a hash value.
567 return (this->stub_type_
569 ^ gold::string_hash
<char>(
570 (this->r_sym_
!= Reloc_stub::invalid_index
)
571 ? this->u_
.relobj
->name().c_str()
572 : this->u_
.symbol
->name())
576 // Functors for STL associative containers.
580 operator()(const Key
& k
) const
581 { return k
.hash_value(); }
587 operator()(const Key
& k1
, const Key
& k2
) const
588 { return k1
.eq(k2
); }
591 // Name of key. This is mainly for debugging.
597 Stub_type stub_type_
;
598 // If this is a local symbol, this is the index in the defining object.
599 // Otherwise, it is invalid_index for a global symbol.
601 // If r_sym_ is an invalid index, this points to a global symbol.
602 // Otherwise, it points to a relobj. We used the unsized and target
603 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
604 // Arm_relobj, in order to avoid making the stub class a template
605 // as most of the stub machinery is endianness-neutral. However, it
606 // may require a bit of casting done by users of this class.
609 const Symbol
* symbol
;
610 const Relobj
* relobj
;
612 // Addend associated with a reloc.
617 // Reloc_stubs are created via a stub factory. So these are protected.
618 Reloc_stub(const Stub_template
* stub_template
)
619 : Stub(stub_template
), destination_address_(invalid_address
)
625 friend class Stub_factory
;
627 // Return the relocation target address of the i-th relocation in the
630 do_reloc_target(size_t i
)
632 // All reloc stub have only one relocation.
634 return this->destination_address_
;
638 // Address of destination.
639 Arm_address destination_address_
;
642 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
643 // THUMB branch that meets the following conditions:
645 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
646 // branch address is 0xffe.
647 // 2. The branch target address is in the same page as the first word of the
649 // 3. The branch follows a 32-bit instruction which is not a branch.
651 // To do the fix up, we need to store the address of the branch instruction
652 // and its target at least. We also need to store the original branch
653 // instruction bits for the condition code in a conditional branch. The
654 // condition code is used in a special instruction template. We also want
655 // to identify input sections needing Cortex-A8 workaround quickly. We store
656 // extra information about object and section index of the code section
657 // containing a branch being fixed up. The information is used to mark
658 // the code section when we finalize the Cortex-A8 stubs.
661 class Cortex_a8_stub
: public Stub
667 // Return the object of the code section containing the branch being fixed
671 { return this->relobj_
; }
673 // Return the section index of the code section containing the branch being
677 { return this->shndx_
; }
679 // Return the source address of stub. This is the address of the original
680 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
683 source_address() const
684 { return this->source_address_
; }
686 // Return the destination address of the stub. This is the branch taken
687 // address of the original branch instruction. LSB is 1 if it is a THUMB
688 // instruction address.
690 destination_address() const
691 { return this->destination_address_
; }
693 // Return the instruction being fixed up.
695 original_insn() const
696 { return this->original_insn_
; }
699 // Cortex_a8_stubs are created via a stub factory. So these are protected.
700 Cortex_a8_stub(const Stub_template
* stub_template
, Relobj
* relobj
,
701 unsigned int shndx
, Arm_address source_address
,
702 Arm_address destination_address
, uint32_t original_insn
)
703 : Stub(stub_template
), relobj_(relobj
), shndx_(shndx
),
704 source_address_(source_address
| 1U),
705 destination_address_(destination_address
),
706 original_insn_(original_insn
)
709 friend class Stub_factory
;
711 // Return the relocation target address of the i-th relocation in the
714 do_reloc_target(size_t i
)
716 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond
)
718 // The conditional branch veneer has two relocations.
720 return i
== 0 ? this->source_address_
+ 4 : this->destination_address_
;
724 // All other Cortex-A8 stubs have only one relocation.
726 return this->destination_address_
;
730 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
732 do_thumb16_special(size_t);
735 // Object of the code section containing the branch being fixed up.
737 // Section index of the code section containing the branch begin fixed up.
739 // Source address of original branch.
740 Arm_address source_address_
;
741 // Destination address of the original branch.
742 Arm_address destination_address_
;
743 // Original branch instruction. This is needed for copying the condition
744 // code from a condition branch to its stub.
745 uint32_t original_insn_
;
748 // ARMv4 BX Rx branch relocation stub class.
749 class Arm_v4bx_stub
: public Stub
755 // Return the associated register.
758 { return this->reg_
; }
761 // Arm V4BX stubs are created via a stub factory. So these are protected.
762 Arm_v4bx_stub(const Stub_template
* stub_template
, const uint32_t reg
)
763 : Stub(stub_template
), reg_(reg
)
766 friend class Stub_factory
;
768 // Return the relocation target address of the i-th relocation in the
771 do_reloc_target(size_t)
772 { gold_unreachable(); }
774 // This may be overridden in the child class.
776 do_write(unsigned char* view
, section_size_type view_size
, bool big_endian
)
779 this->do_fixed_endian_v4bx_write
<true>(view
, view_size
);
781 this->do_fixed_endian_v4bx_write
<false>(view
, view_size
);
785 // A template to implement do_write.
786 template<bool big_endian
>
788 do_fixed_endian_v4bx_write(unsigned char* view
, section_size_type
)
790 const Insn_template
* insns
= this->stub_template()->insns();
791 elfcpp::Swap
<32, big_endian
>::writeval(view
,
793 + (this->reg_
<< 16)));
794 view
+= insns
[0].size();
795 elfcpp::Swap
<32, big_endian
>::writeval(view
,
796 (insns
[1].data() + this->reg_
));
797 view
+= insns
[1].size();
798 elfcpp::Swap
<32, big_endian
>::writeval(view
,
799 (insns
[2].data() + this->reg_
));
802 // A register index (r0-r14), which is associated with the stub.
806 // Stub factory class.
811 // Return the unique instance of this class.
812 static const Stub_factory
&
815 static Stub_factory singleton
;
819 // Make a relocation stub.
821 make_reloc_stub(Stub_type stub_type
) const
823 gold_assert(stub_type
>= arm_stub_reloc_first
824 && stub_type
<= arm_stub_reloc_last
);
825 return new Reloc_stub(this->stub_templates_
[stub_type
]);
828 // Make a Cortex-A8 stub.
830 make_cortex_a8_stub(Stub_type stub_type
, Relobj
* relobj
, unsigned int shndx
,
831 Arm_address source
, Arm_address destination
,
832 uint32_t original_insn
) const
834 gold_assert(stub_type
>= arm_stub_cortex_a8_first
835 && stub_type
<= arm_stub_cortex_a8_last
);
836 return new Cortex_a8_stub(this->stub_templates_
[stub_type
], relobj
, shndx
,
837 source
, destination
, original_insn
);
840 // Make an ARM V4BX relocation stub.
841 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
843 make_arm_v4bx_stub(uint32_t reg
) const
845 gold_assert(reg
< 0xf);
846 return new Arm_v4bx_stub(this->stub_templates_
[arm_stub_v4_veneer_bx
],
851 // Constructor and destructor are protected since we only return a single
852 // instance created in Stub_factory::get_instance().
856 // A Stub_factory may not be copied since it is a singleton.
857 Stub_factory(const Stub_factory
&);
858 Stub_factory
& operator=(Stub_factory
&);
860 // Stub templates. These are initialized in the constructor.
861 const Stub_template
* stub_templates_
[arm_stub_type_last
+1];
864 // A class to hold stubs for the ARM target.
866 template<bool big_endian
>
867 class Stub_table
: public Output_data
870 Stub_table(Arm_input_section
<big_endian
>* owner
)
871 : Output_data(), owner_(owner
), reloc_stubs_(), reloc_stubs_size_(0),
872 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
873 prev_data_size_(0), prev_addralign_(1)
879 // Owner of this stub table.
880 Arm_input_section
<big_endian
>*
882 { return this->owner_
; }
884 // Whether this stub table is empty.
888 return (this->reloc_stubs_
.empty()
889 && this->cortex_a8_stubs_
.empty()
890 && this->arm_v4bx_stubs_
.empty());
893 // Return the current data size.
895 current_data_size() const
896 { return this->current_data_size_for_child(); }
898 // Add a STUB using KEY. The caller is responsible for avoiding addition
899 // if a STUB with the same key has already been added.
901 add_reloc_stub(Reloc_stub
* stub
, const Reloc_stub::Key
& key
)
903 const Stub_template
* stub_template
= stub
->stub_template();
904 gold_assert(stub_template
->type() == key
.stub_type());
905 this->reloc_stubs_
[key
] = stub
;
907 // Assign stub offset early. We can do this because we never remove
908 // reloc stubs and they are in the beginning of the stub table.
909 uint64_t align
= stub_template
->alignment();
910 this->reloc_stubs_size_
= align_address(this->reloc_stubs_size_
, align
);
911 stub
->set_offset(this->reloc_stubs_size_
);
912 this->reloc_stubs_size_
+= stub_template
->size();
913 this->reloc_stubs_addralign_
=
914 std::max(this->reloc_stubs_addralign_
, align
);
917 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
918 // The caller is responsible for avoiding addition if a STUB with the same
919 // address has already been added.
921 add_cortex_a8_stub(Arm_address address
, Cortex_a8_stub
* stub
)
923 std::pair
<Arm_address
, Cortex_a8_stub
*> value(address
, stub
);
924 this->cortex_a8_stubs_
.insert(value
);
927 // Add an ARM V4BX relocation stub. A register index will be retrieved
930 add_arm_v4bx_stub(Arm_v4bx_stub
* stub
)
932 gold_assert(stub
!= NULL
&& this->arm_v4bx_stubs_
[stub
->reg()] == NULL
);
933 this->arm_v4bx_stubs_
[stub
->reg()] = stub
;
936 // Remove all Cortex-A8 stubs.
938 remove_all_cortex_a8_stubs();
940 // Look up a relocation stub using KEY. Return NULL if there is none.
942 find_reloc_stub(const Reloc_stub::Key
& key
) const
944 typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.find(key
);
945 return (p
!= this->reloc_stubs_
.end()) ? p
->second
: NULL
;
948 // Look up an arm v4bx relocation stub using the register index.
949 // Return NULL if there is none.
951 find_arm_v4bx_stub(const uint32_t reg
) const
953 gold_assert(reg
< 0xf);
954 return this->arm_v4bx_stubs_
[reg
];
957 // Relocate stubs in this stub table.
959 relocate_stubs(const Relocate_info
<32, big_endian
>*,
960 Target_arm
<big_endian
>*, Output_section
*,
961 unsigned char*, Arm_address
, section_size_type
);
963 // Update data size and alignment at the end of a relaxation pass. Return
964 // true if either data size or alignment is different from that of the
965 // previous relaxation pass.
967 update_data_size_and_addralign();
969 // Finalize stubs. Set the offsets of all stubs and mark input sections
970 // needing the Cortex-A8 workaround.
974 // Apply Cortex-A8 workaround to an address range.
976 apply_cortex_a8_workaround_to_address_range(Target_arm
<big_endian
>*,
977 unsigned char*, Arm_address
,
981 // Write out section contents.
983 do_write(Output_file
*);
985 // Return the required alignment.
988 { return this->prev_addralign_
; }
990 // Reset address and file offset.
992 do_reset_address_and_file_offset()
993 { this->set_current_data_size_for_child(this->prev_data_size_
); }
995 // Set final data size.
997 set_final_data_size()
998 { this->set_data_size(this->current_data_size()); }
1001 // Relocate one stub.
1003 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
1004 Target_arm
<big_endian
>*, Output_section
*,
1005 unsigned char*, Arm_address
, section_size_type
);
1007 // Unordered map of relocation stubs.
1009 Unordered_map
<Reloc_stub::Key
, Reloc_stub
*, Reloc_stub::Key::hash
,
1010 Reloc_stub::Key::equal_to
>
1013 // List of Cortex-A8 stubs ordered by addresses of branches being
1014 // fixed up in output.
1015 typedef std::map
<Arm_address
, Cortex_a8_stub
*> Cortex_a8_stub_list
;
1016 // List of Arm V4BX relocation stubs ordered by associated registers.
1017 typedef std::vector
<Arm_v4bx_stub
*> Arm_v4bx_stub_list
;
1019 // Owner of this stub table.
1020 Arm_input_section
<big_endian
>* owner_
;
1021 // The relocation stubs.
1022 Reloc_stub_map reloc_stubs_
;
1023 // Size of reloc stubs.
1024 off_t reloc_stubs_size_
;
1025 // Maximum address alignment of reloc stubs.
1026 uint64_t reloc_stubs_addralign_
;
1027 // The cortex_a8_stubs.
1028 Cortex_a8_stub_list cortex_a8_stubs_
;
1029 // The Arm V4BX relocation stubs.
1030 Arm_v4bx_stub_list arm_v4bx_stubs_
;
1031 // data size of this in the previous pass.
1032 off_t prev_data_size_
;
1033 // address alignment of this in the previous pass.
1034 uint64_t prev_addralign_
;
1037 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1038 // we add to the end of an EXIDX input section that goes into the output.
1040 class Arm_exidx_cantunwind
: public Output_section_data
1043 Arm_exidx_cantunwind(Relobj
* relobj
, unsigned int shndx
)
1044 : Output_section_data(8, 4, true), relobj_(relobj
), shndx_(shndx
)
1047 // Return the object containing the section pointed by this.
1050 { return this->relobj_
; }
1052 // Return the section index of the section pointed by this.
1055 { return this->shndx_
; }
1059 do_write(Output_file
* of
)
1061 if (parameters
->target().is_big_endian())
1062 this->do_fixed_endian_write
<true>(of
);
1064 this->do_fixed_endian_write
<false>(of
);
1067 // Write to a map file.
1069 do_print_to_mapfile(Mapfile
* mapfile
) const
1070 { mapfile
->print_output_data(this, _("** ARM cantunwind")); }
1073 // Implement do_write for a given endianness.
1074 template<bool big_endian
>
1076 do_fixed_endian_write(Output_file
*);
1078 // The object containing the section pointed by this.
1080 // The section index of the section pointed by this.
1081 unsigned int shndx_
;
1084 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1085 // Offset map is used to map input section offset within the EXIDX section
1086 // to the output offset from the start of this EXIDX section.
1088 typedef std::map
<section_offset_type
, section_offset_type
>
1089 Arm_exidx_section_offset_map
;
1091 // Arm_exidx_merged_section class. This represents an EXIDX input section
1092 // with some of its entries merged.
1094 class Arm_exidx_merged_section
: public Output_relaxed_input_section
1097 // Constructor for Arm_exidx_merged_section.
1098 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1099 // SECTION_OFFSET_MAP points to a section offset map describing how
1100 // parts of the input section are mapped to output. DELETED_BYTES is
1101 // the number of bytes deleted from the EXIDX input section.
1102 Arm_exidx_merged_section(
1103 const Arm_exidx_input_section
& exidx_input_section
,
1104 const Arm_exidx_section_offset_map
& section_offset_map
,
1105 uint32_t deleted_bytes
);
1107 // Build output contents.
1109 build_contents(const unsigned char*, section_size_type
);
1111 // Return the original EXIDX input section.
1112 const Arm_exidx_input_section
&
1113 exidx_input_section() const
1114 { return this->exidx_input_section_
; }
1116 // Return the section offset map.
1117 const Arm_exidx_section_offset_map
&
1118 section_offset_map() const
1119 { return this->section_offset_map_
; }
1122 // Write merged section into file OF.
1124 do_write(Output_file
* of
);
1127 do_output_offset(const Relobj
*, unsigned int, section_offset_type
,
1128 section_offset_type
*) const;
1131 // Original EXIDX input section.
1132 const Arm_exidx_input_section
& exidx_input_section_
;
1133 // Section offset map.
1134 const Arm_exidx_section_offset_map
& section_offset_map_
;
1135 // Merged section contents. We need to keep build the merged section
1136 // and save it here to avoid accessing the original EXIDX section when
1137 // we cannot lock the sections' object.
1138 unsigned char* section_contents_
;
1141 // A class to wrap an ordinary input section containing executable code.
1143 template<bool big_endian
>
1144 class Arm_input_section
: public Output_relaxed_input_section
1147 Arm_input_section(Relobj
* relobj
, unsigned int shndx
)
1148 : Output_relaxed_input_section(relobj
, shndx
, 1),
1149 original_addralign_(1), original_size_(0), stub_table_(NULL
),
1150 original_contents_(NULL
)
1153 ~Arm_input_section()
1154 { delete[] this->original_contents_
; }
1160 // Whether this is a stub table owner.
1162 is_stub_table_owner() const
1163 { return this->stub_table_
!= NULL
&& this->stub_table_
->owner() == this; }
1165 // Return the stub table.
1166 Stub_table
<big_endian
>*
1168 { return this->stub_table_
; }
1170 // Set the stub_table.
1172 set_stub_table(Stub_table
<big_endian
>* stub_table
)
1173 { this->stub_table_
= stub_table
; }
1175 // Downcast a base pointer to an Arm_input_section pointer. This is
1176 // not type-safe but we only use Arm_input_section not the base class.
1177 static Arm_input_section
<big_endian
>*
1178 as_arm_input_section(Output_relaxed_input_section
* poris
)
1179 { return static_cast<Arm_input_section
<big_endian
>*>(poris
); }
1181 // Return the original size of the section.
1183 original_size() const
1184 { return this->original_size_
; }
1187 // Write data to output file.
1189 do_write(Output_file
*);
1191 // Return required alignment of this.
1193 do_addralign() const
1195 if (this->is_stub_table_owner())
1196 return std::max(this->stub_table_
->addralign(),
1197 static_cast<uint64_t>(this->original_addralign_
));
1199 return this->original_addralign_
;
1202 // Finalize data size.
1204 set_final_data_size();
1206 // Reset address and file offset.
1208 do_reset_address_and_file_offset();
1212 do_output_offset(const Relobj
* object
, unsigned int shndx
,
1213 section_offset_type offset
,
1214 section_offset_type
* poutput
) const
1216 if ((object
== this->relobj())
1217 && (shndx
== this->shndx())
1220 convert_types
<section_offset_type
, uint32_t>(this->original_size_
)))
1230 // Copying is not allowed.
1231 Arm_input_section(const Arm_input_section
&);
1232 Arm_input_section
& operator=(const Arm_input_section
&);
1234 // Address alignment of the original input section.
1235 uint32_t original_addralign_
;
1236 // Section size of the original input section.
1237 uint32_t original_size_
;
1239 Stub_table
<big_endian
>* stub_table_
;
1240 // Original section contents. We have to make a copy here since the file
1241 // containing the original section may not be locked when we need to access
1243 unsigned char* original_contents_
;
1246 // Arm_exidx_fixup class. This is used to define a number of methods
1247 // and keep states for fixing up EXIDX coverage.
1249 class Arm_exidx_fixup
1252 Arm_exidx_fixup(Output_section
* exidx_output_section
,
1253 bool merge_exidx_entries
= true)
1254 : exidx_output_section_(exidx_output_section
), last_unwind_type_(UT_NONE
),
1255 last_inlined_entry_(0), last_input_section_(NULL
),
1256 section_offset_map_(NULL
), first_output_text_section_(NULL
),
1257 merge_exidx_entries_(merge_exidx_entries
)
1261 { delete this->section_offset_map_
; }
1263 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1264 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1265 // number of bytes to be deleted in output. If parts of the input EXIDX
1266 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1267 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1268 // responsible for releasing it.
1269 template<bool big_endian
>
1271 process_exidx_section(const Arm_exidx_input_section
* exidx_input_section
,
1272 const unsigned char* section_contents
,
1273 section_size_type section_size
,
1274 Arm_exidx_section_offset_map
** psection_offset_map
);
1276 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1277 // input section, if there is not one already.
1279 add_exidx_cantunwind_as_needed();
1281 // Return the output section for the text section which is linked to the
1282 // first exidx input in output.
1284 first_output_text_section() const
1285 { return this->first_output_text_section_
; }
1288 // Copying is not allowed.
1289 Arm_exidx_fixup(const Arm_exidx_fixup
&);
1290 Arm_exidx_fixup
& operator=(const Arm_exidx_fixup
&);
1292 // Type of EXIDX unwind entry.
1297 // EXIDX_CANTUNWIND.
1298 UT_EXIDX_CANTUNWIND
,
1305 // Process an EXIDX entry. We only care about the second word of the
1306 // entry. Return true if the entry can be deleted.
1308 process_exidx_entry(uint32_t second_word
);
1310 // Update the current section offset map during EXIDX section fix-up.
1311 // If there is no map, create one. INPUT_OFFSET is the offset of a
1312 // reference point, DELETED_BYTES is the number of deleted by in the
1313 // section so far. If DELETE_ENTRY is true, the reference point and
1314 // all offsets after the previous reference point are discarded.
1316 update_offset_map(section_offset_type input_offset
,
1317 section_size_type deleted_bytes
, bool delete_entry
);
1319 // EXIDX output section.
1320 Output_section
* exidx_output_section_
;
1321 // Unwind type of the last EXIDX entry processed.
1322 Unwind_type last_unwind_type_
;
1323 // Last seen inlined EXIDX entry.
1324 uint32_t last_inlined_entry_
;
1325 // Last processed EXIDX input section.
1326 const Arm_exidx_input_section
* last_input_section_
;
1327 // Section offset map created in process_exidx_section.
1328 Arm_exidx_section_offset_map
* section_offset_map_
;
1329 // Output section for the text section which is linked to the first exidx
1331 Output_section
* first_output_text_section_
;
1333 bool merge_exidx_entries_
;
1336 // Arm output section class. This is defined mainly to add a number of
1337 // stub generation methods.
1339 template<bool big_endian
>
1340 class Arm_output_section
: public Output_section
1343 typedef std::vector
<std::pair
<Relobj
*, unsigned int> > Text_section_list
;
1345 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1346 Arm_output_section(const char* name
, elfcpp::Elf_Word type
,
1347 elfcpp::Elf_Xword flags
)
1348 : Output_section(name
, type
,
1349 (type
== elfcpp::SHT_ARM_EXIDX
1350 ? flags
| elfcpp::SHF_LINK_ORDER
1353 if (type
== elfcpp::SHT_ARM_EXIDX
)
1354 this->set_always_keeps_input_sections();
1357 ~Arm_output_section()
1360 // Group input sections for stub generation.
1362 group_sections(section_size_type
, bool, Target_arm
<big_endian
>*, const Task
*);
1364 // Downcast a base pointer to an Arm_output_section pointer. This is
1365 // not type-safe but we only use Arm_output_section not the base class.
1366 static Arm_output_section
<big_endian
>*
1367 as_arm_output_section(Output_section
* os
)
1368 { return static_cast<Arm_output_section
<big_endian
>*>(os
); }
1370 // Append all input text sections in this into LIST.
1372 append_text_sections_to_list(Text_section_list
* list
);
1374 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1375 // is a list of text input sections sorted in ascending order of their
1376 // output addresses.
1378 fix_exidx_coverage(Layout
* layout
,
1379 const Text_section_list
& sorted_text_section
,
1380 Symbol_table
* symtab
,
1381 bool merge_exidx_entries
,
1384 // Link an EXIDX section into its corresponding text section.
1386 set_exidx_section_link();
1390 typedef Output_section::Input_section Input_section
;
1391 typedef Output_section::Input_section_list Input_section_list
;
1393 // Create a stub group.
1394 void create_stub_group(Input_section_list::const_iterator
,
1395 Input_section_list::const_iterator
,
1396 Input_section_list::const_iterator
,
1397 Target_arm
<big_endian
>*,
1398 std::vector
<Output_relaxed_input_section
*>*,
1402 // Arm_exidx_input_section class. This represents an EXIDX input section.
1404 class Arm_exidx_input_section
1407 static const section_offset_type invalid_offset
=
1408 static_cast<section_offset_type
>(-1);
1410 Arm_exidx_input_section(Relobj
* relobj
, unsigned int shndx
,
1411 unsigned int link
, uint32_t size
,
1412 uint32_t addralign
, uint32_t text_size
)
1413 : relobj_(relobj
), shndx_(shndx
), link_(link
), size_(size
),
1414 addralign_(addralign
), text_size_(text_size
), has_errors_(false)
1417 ~Arm_exidx_input_section()
1420 // Accessors: This is a read-only class.
1422 // Return the object containing this EXIDX input section.
1425 { return this->relobj_
; }
1427 // Return the section index of this EXIDX input section.
1430 { return this->shndx_
; }
1432 // Return the section index of linked text section in the same object.
1435 { return this->link_
; }
1437 // Return size of the EXIDX input section.
1440 { return this->size_
; }
1442 // Return address alignment of EXIDX input section.
1445 { return this->addralign_
; }
1447 // Return size of the associated text input section.
1450 { return this->text_size_
; }
1452 // Whether there are any errors in the EXIDX input section.
1455 { return this->has_errors_
; }
1457 // Set has-errors flag.
1460 { this->has_errors_
= true; }
1463 // Object containing this.
1465 // Section index of this.
1466 unsigned int shndx_
;
1467 // text section linked to this in the same object.
1469 // Size of this. For ARM 32-bit is sufficient.
1471 // Address alignment of this. For ARM 32-bit is sufficient.
1472 uint32_t addralign_
;
1473 // Size of associated text section.
1474 uint32_t text_size_
;
1475 // Whether this has any errors.
1479 // Arm_relobj class.
1481 template<bool big_endian
>
1482 class Arm_relobj
: public Sized_relobj_file
<32, big_endian
>
1485 static const Arm_address invalid_address
= static_cast<Arm_address
>(-1);
1487 Arm_relobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1488 const typename
elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1489 : Sized_relobj_file
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1490 stub_tables_(), local_symbol_is_thumb_function_(),
1491 attributes_section_data_(NULL
), mapping_symbols_info_(),
1492 section_has_cortex_a8_workaround_(NULL
), exidx_section_map_(),
1493 output_local_symbol_count_needs_update_(false),
1494 merge_flags_and_attributes_(true)
1498 { delete this->attributes_section_data_
; }
1500 // Return the stub table of the SHNDX-th section if there is one.
1501 Stub_table
<big_endian
>*
1502 stub_table(unsigned int shndx
) const
1504 gold_assert(shndx
< this->stub_tables_
.size());
1505 return this->stub_tables_
[shndx
];
1508 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1510 set_stub_table(unsigned int shndx
, Stub_table
<big_endian
>* stub_table
)
1512 gold_assert(shndx
< this->stub_tables_
.size());
1513 this->stub_tables_
[shndx
] = stub_table
;
1516 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1517 // index. This is only valid after do_count_local_symbol is called.
1519 local_symbol_is_thumb_function(unsigned int r_sym
) const
1521 gold_assert(r_sym
< this->local_symbol_is_thumb_function_
.size());
1522 return this->local_symbol_is_thumb_function_
[r_sym
];
1525 // Scan all relocation sections for stub generation.
1527 scan_sections_for_stubs(Target_arm
<big_endian
>*, const Symbol_table
*,
1530 // Convert regular input section with index SHNDX to a relaxed section.
1532 convert_input_section_to_relaxed_section(unsigned shndx
)
1534 // The stubs have relocations and we need to process them after writing
1535 // out the stubs. So relocation now must follow section write.
1536 this->set_section_offset(shndx
, -1ULL);
1537 this->set_relocs_must_follow_section_writes();
1540 // Downcast a base pointer to an Arm_relobj pointer. This is
1541 // not type-safe but we only use Arm_relobj not the base class.
1542 static Arm_relobj
<big_endian
>*
1543 as_arm_relobj(Relobj
* relobj
)
1544 { return static_cast<Arm_relobj
<big_endian
>*>(relobj
); }
1546 // Processor-specific flags in ELF file header. This is valid only after
1549 processor_specific_flags() const
1550 { return this->processor_specific_flags_
; }
1552 // Attribute section data This is the contents of the .ARM.attribute section
1554 const Attributes_section_data
*
1555 attributes_section_data() const
1556 { return this->attributes_section_data_
; }
1558 // Mapping symbol location.
1559 typedef std::pair
<unsigned int, Arm_address
> Mapping_symbol_position
;
1561 // Functor for STL container.
1562 struct Mapping_symbol_position_less
1565 operator()(const Mapping_symbol_position
& p1
,
1566 const Mapping_symbol_position
& p2
) const
1568 return (p1
.first
< p2
.first
1569 || (p1
.first
== p2
.first
&& p1
.second
< p2
.second
));
1573 // We only care about the first character of a mapping symbol, so
1574 // we only store that instead of the whole symbol name.
1575 typedef std::map
<Mapping_symbol_position
, char,
1576 Mapping_symbol_position_less
> Mapping_symbols_info
;
1578 // Whether a section contains any Cortex-A8 workaround.
1580 section_has_cortex_a8_workaround(unsigned int shndx
) const
1582 return (this->section_has_cortex_a8_workaround_
!= NULL
1583 && (*this->section_has_cortex_a8_workaround_
)[shndx
]);
1586 // Mark a section that has Cortex-A8 workaround.
1588 mark_section_for_cortex_a8_workaround(unsigned int shndx
)
1590 if (this->section_has_cortex_a8_workaround_
== NULL
)
1591 this->section_has_cortex_a8_workaround_
=
1592 new std::vector
<bool>(this->shnum(), false);
1593 (*this->section_has_cortex_a8_workaround_
)[shndx
] = true;
1596 // Return the EXIDX section of an text section with index SHNDX or NULL
1597 // if the text section has no associated EXIDX section.
1598 const Arm_exidx_input_section
*
1599 exidx_input_section_by_link(unsigned int shndx
) const
1601 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1602 return ((p
!= this->exidx_section_map_
.end()
1603 && p
->second
->link() == shndx
)
1608 // Return the EXIDX section with index SHNDX or NULL if there is none.
1609 const Arm_exidx_input_section
*
1610 exidx_input_section_by_shndx(unsigned shndx
) const
1612 Exidx_section_map::const_iterator p
= this->exidx_section_map_
.find(shndx
);
1613 return ((p
!= this->exidx_section_map_
.end()
1614 && p
->second
->shndx() == shndx
)
1619 // Whether output local symbol count needs updating.
1621 output_local_symbol_count_needs_update() const
1622 { return this->output_local_symbol_count_needs_update_
; }
1624 // Set output_local_symbol_count_needs_update flag to be true.
1626 set_output_local_symbol_count_needs_update()
1627 { this->output_local_symbol_count_needs_update_
= true; }
1629 // Update output local symbol count at the end of relaxation.
1631 update_output_local_symbol_count();
1633 // Whether we want to merge processor-specific flags and attributes.
1635 merge_flags_and_attributes() const
1636 { return this->merge_flags_and_attributes_
; }
1638 // Export list of EXIDX section indices.
1640 get_exidx_shndx_list(std::vector
<unsigned int>* list
) const
1643 for (Exidx_section_map::const_iterator p
= this->exidx_section_map_
.begin();
1644 p
!= this->exidx_section_map_
.end();
1647 if (p
->second
->shndx() == p
->first
)
1648 list
->push_back(p
->first
);
1650 // Sort list to make result independent of implementation of map.
1651 std::sort(list
->begin(), list
->end());
1655 // Post constructor setup.
1659 // Call parent's setup method.
1660 Sized_relobj_file
<32, big_endian
>::do_setup();
1662 // Initialize look-up tables.
1663 Stub_table_list
empty_stub_table_list(this->shnum(), NULL
);
1664 this->stub_tables_
.swap(empty_stub_table_list
);
1667 // Count the local symbols.
1669 do_count_local_symbols(Stringpool_template
<char>*,
1670 Stringpool_template
<char>*);
1673 do_relocate_sections(
1674 const Symbol_table
* symtab
, const Layout
* layout
,
1675 const unsigned char* pshdrs
, Output_file
* of
,
1676 typename Sized_relobj_file
<32, big_endian
>::Views
* pivews
);
1678 // Read the symbol information.
1680 do_read_symbols(Read_symbols_data
* sd
);
1682 // Process relocs for garbage collection.
1684 do_gc_process_relocs(Symbol_table
*, Layout
*, Read_relocs_data
*);
1688 // Whether a section needs to be scanned for relocation stubs.
1690 section_needs_reloc_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1691 const Relobj::Output_sections
&,
1692 const Symbol_table
*, const unsigned char*);
1694 // Whether a section is a scannable text section.
1696 section_is_scannable(const elfcpp::Shdr
<32, big_endian
>&, unsigned int,
1697 const Output_section
*, const Symbol_table
*);
1699 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1701 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr
<32, big_endian
>&,
1702 unsigned int, Output_section
*,
1703 const Symbol_table
*);
1705 // Scan a section for the Cortex-A8 erratum.
1707 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr
<32, big_endian
>&,
1708 unsigned int, Output_section
*,
1709 Target_arm
<big_endian
>*);
1711 // Find the linked text section of an EXIDX section by looking at the
1712 // first relocation of the EXIDX section. PSHDR points to the section
1713 // headers of a relocation section and PSYMS points to the local symbols.
1714 // PSHNDX points to a location storing the text section index if found.
1715 // Return whether we can find the linked section.
1717 find_linked_text_section(const unsigned char* pshdr
,
1718 const unsigned char* psyms
, unsigned int* pshndx
);
1721 // Make a new Arm_exidx_input_section object for EXIDX section with
1722 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1723 // index of the linked text section.
1725 make_exidx_input_section(unsigned int shndx
,
1726 const elfcpp::Shdr
<32, big_endian
>& shdr
,
1727 unsigned int text_shndx
,
1728 const elfcpp::Shdr
<32, big_endian
>& text_shdr
);
1730 // Return the output address of either a plain input section or a
1731 // relaxed input section. SHNDX is the section index.
1733 simple_input_section_output_address(unsigned int, Output_section
*);
1735 typedef std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
1736 typedef Unordered_map
<unsigned int, const Arm_exidx_input_section
*>
1739 // List of stub tables.
1740 Stub_table_list stub_tables_
;
1741 // Bit vector to tell if a local symbol is a thumb function or not.
1742 // This is only valid after do_count_local_symbol is called.
1743 std::vector
<bool> local_symbol_is_thumb_function_
;
1744 // processor-specific flags in ELF file header.
1745 elfcpp::Elf_Word processor_specific_flags_
;
1746 // Object attributes if there is an .ARM.attributes section or NULL.
1747 Attributes_section_data
* attributes_section_data_
;
1748 // Mapping symbols information.
1749 Mapping_symbols_info mapping_symbols_info_
;
1750 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1751 std::vector
<bool>* section_has_cortex_a8_workaround_
;
1752 // Map a text section to its associated .ARM.exidx section, if there is one.
1753 Exidx_section_map exidx_section_map_
;
1754 // Whether output local symbol count needs updating.
1755 bool output_local_symbol_count_needs_update_
;
1756 // Whether we merge processor flags and attributes of this object to
1758 bool merge_flags_and_attributes_
;
1761 // Arm_dynobj class.
1763 template<bool big_endian
>
1764 class Arm_dynobj
: public Sized_dynobj
<32, big_endian
>
1767 Arm_dynobj(const std::string
& name
, Input_file
* input_file
, off_t offset
,
1768 const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
1769 : Sized_dynobj
<32, big_endian
>(name
, input_file
, offset
, ehdr
),
1770 processor_specific_flags_(0), attributes_section_data_(NULL
)
1774 { delete this->attributes_section_data_
; }
1776 // Downcast a base pointer to an Arm_relobj pointer. This is
1777 // not type-safe but we only use Arm_relobj not the base class.
1778 static Arm_dynobj
<big_endian
>*
1779 as_arm_dynobj(Dynobj
* dynobj
)
1780 { return static_cast<Arm_dynobj
<big_endian
>*>(dynobj
); }
1782 // Processor-specific flags in ELF file header. This is valid only after
1785 processor_specific_flags() const
1786 { return this->processor_specific_flags_
; }
1788 // Attributes section data.
1789 const Attributes_section_data
*
1790 attributes_section_data() const
1791 { return this->attributes_section_data_
; }
1794 // Read the symbol information.
1796 do_read_symbols(Read_symbols_data
* sd
);
1799 // processor-specific flags in ELF file header.
1800 elfcpp::Elf_Word processor_specific_flags_
;
1801 // Object attributes if there is an .ARM.attributes section or NULL.
1802 Attributes_section_data
* attributes_section_data_
;
1805 // Functor to read reloc addends during stub generation.
1807 template<int sh_type
, bool big_endian
>
1808 struct Stub_addend_reader
1810 // Return the addend for a relocation of a particular type. Depending
1811 // on whether this is a REL or RELA relocation, read the addend from a
1812 // view or from a Reloc object.
1813 elfcpp::Elf_types
<32>::Elf_Swxword
1815 unsigned int /* r_type */,
1816 const unsigned char* /* view */,
1817 const typename Reloc_types
<sh_type
,
1818 32, big_endian
>::Reloc
& /* reloc */) const;
1821 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1823 template<bool big_endian
>
1824 struct Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>
1826 elfcpp::Elf_types
<32>::Elf_Swxword
1829 const unsigned char*,
1830 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const;
1833 // Specialized Stub_addend_reader for RELA type relocation sections.
1834 // We currently do not handle RELA type relocation sections but it is trivial
1835 // to implement the addend reader. This is provided for completeness and to
1836 // make it easier to add support for RELA relocation sections in the future.
1838 template<bool big_endian
>
1839 struct Stub_addend_reader
<elfcpp::SHT_RELA
, big_endian
>
1841 elfcpp::Elf_types
<32>::Elf_Swxword
1844 const unsigned char*,
1845 const typename Reloc_types
<elfcpp::SHT_RELA
, 32,
1846 big_endian
>::Reloc
& reloc
) const
1847 { return reloc
.get_r_addend(); }
1850 // Cortex_a8_reloc class. We keep record of relocation that may need
1851 // the Cortex-A8 erratum workaround.
1853 class Cortex_a8_reloc
1856 Cortex_a8_reloc(Reloc_stub
* reloc_stub
, unsigned r_type
,
1857 Arm_address destination
)
1858 : reloc_stub_(reloc_stub
), r_type_(r_type
), destination_(destination
)
1864 // Accessors: This is a read-only class.
1866 // Return the relocation stub associated with this relocation if there is
1870 { return this->reloc_stub_
; }
1872 // Return the relocation type.
1875 { return this->r_type_
; }
1877 // Return the destination address of the relocation. LSB stores the THUMB
1881 { return this->destination_
; }
1884 // Associated relocation stub if there is one, or NULL.
1885 const Reloc_stub
* reloc_stub_
;
1887 unsigned int r_type_
;
1888 // Destination address of this relocation. LSB is used to distinguish
1890 Arm_address destination_
;
1893 // Arm_output_data_got class. We derive this from Output_data_got to add
1894 // extra methods to handle TLS relocations in a static link.
1896 template<bool big_endian
>
1897 class Arm_output_data_got
: public Output_data_got
<32, big_endian
>
1900 Arm_output_data_got(Symbol_table
* symtab
, Layout
* layout
)
1901 : Output_data_got
<32, big_endian
>(), symbol_table_(symtab
), layout_(layout
)
1904 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1905 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1906 // applied in a static link.
1908 add_static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1909 { this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, gsym
)); }
1911 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1912 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1913 // relocation that needs to be applied in a static link.
1915 add_static_reloc(unsigned int got_offset
, unsigned int r_type
,
1916 Sized_relobj_file
<32, big_endian
>* relobj
,
1919 this->static_relocs_
.push_back(Static_reloc(got_offset
, r_type
, relobj
,
1923 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1924 // The first one is initialized to be 1, which is the module index for
1925 // the main executable and the second one 0. A reloc of the type
1926 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1927 // be applied by gold. GSYM is a global symbol.
1929 add_tls_gd32_with_static_reloc(unsigned int got_type
, Symbol
* gsym
);
1931 // Same as the above but for a local symbol in OBJECT with INDEX.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type
,
1934 Sized_relobj_file
<32, big_endian
>* object
,
1935 unsigned int index
);
1938 // Write out the GOT table.
1940 do_write(Output_file
*);
1943 // This class represent dynamic relocations that need to be applied by
1944 // gold because we are using TLS relocations in a static link.
1948 Static_reloc(unsigned int got_offset
, unsigned int r_type
, Symbol
* gsym
)
1949 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(true)
1950 { this->u_
.global
.symbol
= gsym
; }
1952 Static_reloc(unsigned int got_offset
, unsigned int r_type
,
1953 Sized_relobj_file
<32, big_endian
>* relobj
, unsigned int index
)
1954 : got_offset_(got_offset
), r_type_(r_type
), symbol_is_global_(false)
1956 this->u_
.local
.relobj
= relobj
;
1957 this->u_
.local
.index
= index
;
1960 // Return the GOT offset.
1963 { return this->got_offset_
; }
1968 { return this->r_type_
; }
1970 // Whether the symbol is global or not.
1972 symbol_is_global() const
1973 { return this->symbol_is_global_
; }
1975 // For a relocation against a global symbol, the global symbol.
1979 gold_assert(this->symbol_is_global_
);
1980 return this->u_
.global
.symbol
;
1983 // For a relocation against a local symbol, the defining object.
1984 Sized_relobj_file
<32, big_endian
>*
1987 gold_assert(!this->symbol_is_global_
);
1988 return this->u_
.local
.relobj
;
1991 // For a relocation against a local symbol, the local symbol index.
1995 gold_assert(!this->symbol_is_global_
);
1996 return this->u_
.local
.index
;
2000 // GOT offset of the entry to which this relocation is applied.
2001 unsigned int got_offset_
;
2002 // Type of relocation.
2003 unsigned int r_type_
;
2004 // Whether this relocation is against a global symbol.
2005 bool symbol_is_global_
;
2006 // A global or local symbol.
2011 // For a global symbol, the symbol itself.
2016 // For a local symbol, the object defining object.
2017 Sized_relobj_file
<32, big_endian
>* relobj
;
2018 // For a local symbol, the symbol index.
2024 // Symbol table of the output object.
2025 Symbol_table
* symbol_table_
;
2026 // Layout of the output object.
2028 // Static relocs to be applied to the GOT.
2029 std::vector
<Static_reloc
> static_relocs_
;
2032 // The ARM target has many relocation types with odd-sizes or noncontiguous
2033 // bits. The default handling of relocatable relocation cannot process these
2034 // relocations. So we have to extend the default code.
2036 template<bool big_endian
, int sh_type
, typename Classify_reloc
>
2037 class Arm_scan_relocatable_relocs
:
2038 public Default_scan_relocatable_relocs
<sh_type
, Classify_reloc
>
2041 // Return the strategy to use for a local symbol which is a section
2042 // symbol, given the relocation type.
2043 inline Relocatable_relocs::Reloc_strategy
2044 local_section_strategy(unsigned int r_type
, Relobj
*)
2046 if (sh_type
== elfcpp::SHT_RELA
)
2047 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA
;
2050 if (r_type
== elfcpp::R_ARM_TARGET1
2051 || r_type
== elfcpp::R_ARM_TARGET2
)
2053 const Target_arm
<big_endian
>* arm_target
=
2054 Target_arm
<big_endian
>::default_target();
2055 r_type
= arm_target
->get_real_reloc_type(r_type
);
2060 // Relocations that write nothing. These exclude R_ARM_TARGET1
2061 // and R_ARM_TARGET2.
2062 case elfcpp::R_ARM_NONE
:
2063 case elfcpp::R_ARM_V4BX
:
2064 case elfcpp::R_ARM_TLS_GOTDESC
:
2065 case elfcpp::R_ARM_TLS_CALL
:
2066 case elfcpp::R_ARM_TLS_DESCSEQ
:
2067 case elfcpp::R_ARM_THM_TLS_CALL
:
2068 case elfcpp::R_ARM_GOTRELAX
:
2069 case elfcpp::R_ARM_GNU_VTENTRY
:
2070 case elfcpp::R_ARM_GNU_VTINHERIT
:
2071 case elfcpp::R_ARM_THM_TLS_DESCSEQ16
:
2072 case elfcpp::R_ARM_THM_TLS_DESCSEQ32
:
2073 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0
;
2074 // These should have been converted to something else above.
2075 case elfcpp::R_ARM_TARGET1
:
2076 case elfcpp::R_ARM_TARGET2
:
2078 // Relocations that write full 32 bits and
2079 // have alignment of 1.
2080 case elfcpp::R_ARM_ABS32
:
2081 case elfcpp::R_ARM_REL32
:
2082 case elfcpp::R_ARM_SBREL32
:
2083 case elfcpp::R_ARM_GOTOFF32
:
2084 case elfcpp::R_ARM_BASE_PREL
:
2085 case elfcpp::R_ARM_GOT_BREL
:
2086 case elfcpp::R_ARM_BASE_ABS
:
2087 case elfcpp::R_ARM_ABS32_NOI
:
2088 case elfcpp::R_ARM_REL32_NOI
:
2089 case elfcpp::R_ARM_PLT32_ABS
:
2090 case elfcpp::R_ARM_GOT_ABS
:
2091 case elfcpp::R_ARM_GOT_PREL
:
2092 case elfcpp::R_ARM_TLS_GD32
:
2093 case elfcpp::R_ARM_TLS_LDM32
:
2094 case elfcpp::R_ARM_TLS_LDO32
:
2095 case elfcpp::R_ARM_TLS_IE32
:
2096 case elfcpp::R_ARM_TLS_LE32
:
2097 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED
;
2099 // For all other static relocations, return RELOC_SPECIAL.
2100 return Relocatable_relocs::RELOC_SPECIAL
;
2106 template<bool big_endian
>
2107 class Target_arm
: public Sized_target
<32, big_endian
>
2110 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
2113 // When were are relocating a stub, we pass this as the relocation number.
2114 static const size_t fake_relnum_for_stubs
= static_cast<size_t>(-1);
2117 : Sized_target
<32, big_endian
>(&arm_info
),
2118 got_(NULL
), plt_(NULL
), got_plt_(NULL
), rel_dyn_(NULL
),
2119 copy_relocs_(elfcpp::R_ARM_COPY
), dynbss_(NULL
),
2120 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2121 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2122 should_force_pic_veneer_(false),
2123 arm_input_section_map_(), attributes_section_data_(NULL
),
2124 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2127 // Whether we force PCI branch veneers.
2129 should_force_pic_veneer() const
2130 { return this->should_force_pic_veneer_
; }
2132 // Set PIC veneer flag.
2134 set_should_force_pic_veneer(bool value
)
2135 { this->should_force_pic_veneer_
= value
; }
2137 // Whether we use THUMB-2 instructions.
2139 using_thumb2() const
2141 Object_attribute
* attr
=
2142 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2143 int arch
= attr
->int_value();
2144 return arch
== elfcpp::TAG_CPU_ARCH_V6T2
|| arch
>= elfcpp::TAG_CPU_ARCH_V7
;
2147 // Whether we use THUMB/THUMB-2 instructions only.
2149 using_thumb_only() const
2151 Object_attribute
* attr
=
2152 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2154 if (attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2155 || attr
->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M
)
2157 if (attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7
2158 && attr
->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M
)
2160 attr
= this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
2161 return attr
->int_value() == 'M';
2164 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2166 may_use_arm_nop() const
2168 Object_attribute
* attr
=
2169 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2170 int arch
= attr
->int_value();
2171 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2172 || arch
== elfcpp::TAG_CPU_ARCH_V6K
2173 || arch
== elfcpp::TAG_CPU_ARCH_V7
2174 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2177 // Whether we have THUMB-2 NOP.W instruction.
2179 may_use_thumb2_nop() const
2181 Object_attribute
* attr
=
2182 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2183 int arch
= attr
->int_value();
2184 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2185 || arch
== elfcpp::TAG_CPU_ARCH_V7
2186 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2189 // Whether we have v4T interworking instructions available.
2191 may_use_v4t_interworking() const
2193 Object_attribute
* attr
=
2194 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2195 int arch
= attr
->int_value();
2196 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2197 && arch
!= elfcpp::TAG_CPU_ARCH_V4
);
2200 // Whether we have v5T interworking instructions available.
2202 may_use_v5t_interworking() const
2204 Object_attribute
* attr
=
2205 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
2206 int arch
= attr
->int_value();
2207 if (parameters
->options().fix_arm1176())
2208 return (arch
== elfcpp::TAG_CPU_ARCH_V6T2
2209 || arch
== elfcpp::TAG_CPU_ARCH_V7
2210 || arch
== elfcpp::TAG_CPU_ARCH_V6_M
2211 || arch
== elfcpp::TAG_CPU_ARCH_V6S_M
2212 || arch
== elfcpp::TAG_CPU_ARCH_V7E_M
);
2214 return (arch
!= elfcpp::TAG_CPU_ARCH_PRE_V4
2215 && arch
!= elfcpp::TAG_CPU_ARCH_V4
2216 && arch
!= elfcpp::TAG_CPU_ARCH_V4T
);
2219 // Process the relocations to determine unreferenced sections for
2220 // garbage collection.
2222 gc_process_relocs(Symbol_table
* symtab
,
2224 Sized_relobj_file
<32, big_endian
>* object
,
2225 unsigned int data_shndx
,
2226 unsigned int sh_type
,
2227 const unsigned char* prelocs
,
2229 Output_section
* output_section
,
2230 bool needs_special_offset_handling
,
2231 size_t local_symbol_count
,
2232 const unsigned char* plocal_symbols
);
2234 // Scan the relocations to look for symbol adjustments.
2236 scan_relocs(Symbol_table
* symtab
,
2238 Sized_relobj_file
<32, big_endian
>* object
,
2239 unsigned int data_shndx
,
2240 unsigned int sh_type
,
2241 const unsigned char* prelocs
,
2243 Output_section
* output_section
,
2244 bool needs_special_offset_handling
,
2245 size_t local_symbol_count
,
2246 const unsigned char* plocal_symbols
);
2248 // Finalize the sections.
2250 do_finalize_sections(Layout
*, const Input_objects
*, Symbol_table
*);
2252 // Return the value to use for a dynamic symbol which requires special
2255 do_dynsym_value(const Symbol
*) const;
2257 // Relocate a section.
2259 relocate_section(const Relocate_info
<32, big_endian
>*,
2260 unsigned int sh_type
,
2261 const unsigned char* prelocs
,
2263 Output_section
* output_section
,
2264 bool needs_special_offset_handling
,
2265 unsigned char* view
,
2266 Arm_address view_address
,
2267 section_size_type view_size
,
2268 const Reloc_symbol_changes
*);
2270 // Scan the relocs during a relocatable link.
2272 scan_relocatable_relocs(Symbol_table
* symtab
,
2274 Sized_relobj_file
<32, big_endian
>* object
,
2275 unsigned int data_shndx
,
2276 unsigned int sh_type
,
2277 const unsigned char* prelocs
,
2279 Output_section
* output_section
,
2280 bool needs_special_offset_handling
,
2281 size_t local_symbol_count
,
2282 const unsigned char* plocal_symbols
,
2283 Relocatable_relocs
*);
2285 // Relocate a section during a relocatable link.
2287 relocate_for_relocatable(const Relocate_info
<32, big_endian
>*,
2288 unsigned int sh_type
,
2289 const unsigned char* prelocs
,
2291 Output_section
* output_section
,
2292 off_t offset_in_output_section
,
2293 const Relocatable_relocs
*,
2294 unsigned char* view
,
2295 Arm_address view_address
,
2296 section_size_type view_size
,
2297 unsigned char* reloc_view
,
2298 section_size_type reloc_view_size
);
2300 // Perform target-specific processing in a relocatable link. This is
2301 // only used if we use the relocation strategy RELOC_SPECIAL.
2303 relocate_special_relocatable(const Relocate_info
<32, big_endian
>* relinfo
,
2304 unsigned int sh_type
,
2305 const unsigned char* preloc_in
,
2307 Output_section
* output_section
,
2308 off_t offset_in_output_section
,
2309 unsigned char* view
,
2310 typename
elfcpp::Elf_types
<32>::Elf_Addr
2312 section_size_type view_size
,
2313 unsigned char* preloc_out
);
2315 // Return whether SYM is defined by the ABI.
2317 do_is_defined_by_abi(Symbol
* sym
) const
2318 { return strcmp(sym
->name(), "__tls_get_addr") == 0; }
2320 // Return whether there is a GOT section.
2322 has_got_section() const
2323 { return this->got_
!= NULL
; }
2325 // Return the size of the GOT section.
2329 gold_assert(this->got_
!= NULL
);
2330 return this->got_
->data_size();
2333 // Return the number of entries in the GOT.
2335 got_entry_count() const
2337 if (!this->has_got_section())
2339 return this->got_size() / 4;
2342 // Return the number of entries in the PLT.
2344 plt_entry_count() const;
2346 // Return the offset of the first non-reserved PLT entry.
2348 first_plt_entry_offset() const;
2350 // Return the size of each PLT entry.
2352 plt_entry_size() const;
2354 // Map platform-specific reloc types
2356 get_real_reloc_type(unsigned int r_type
);
2359 // Methods to support stub-generations.
2362 // Return the stub factory
2364 stub_factory() const
2365 { return this->stub_factory_
; }
2367 // Make a new Arm_input_section object.
2368 Arm_input_section
<big_endian
>*
2369 new_arm_input_section(Relobj
*, unsigned int);
2371 // Find the Arm_input_section object corresponding to the SHNDX-th input
2372 // section of RELOBJ.
2373 Arm_input_section
<big_endian
>*
2374 find_arm_input_section(Relobj
* relobj
, unsigned int shndx
) const;
2376 // Make a new Stub_table
2377 Stub_table
<big_endian
>*
2378 new_stub_table(Arm_input_section
<big_endian
>*);
2380 // Scan a section for stub generation.
2382 scan_section_for_stubs(const Relocate_info
<32, big_endian
>*, unsigned int,
2383 const unsigned char*, size_t, Output_section
*,
2384 bool, const unsigned char*, Arm_address
,
2389 relocate_stub(Stub
*, const Relocate_info
<32, big_endian
>*,
2390 Output_section
*, unsigned char*, Arm_address
,
2393 // Get the default ARM target.
2394 static Target_arm
<big_endian
>*
2397 gold_assert(parameters
->target().machine_code() == elfcpp::EM_ARM
2398 && parameters
->target().is_big_endian() == big_endian
);
2399 return static_cast<Target_arm
<big_endian
>*>(
2400 parameters
->sized_target
<32, big_endian
>());
2403 // Whether NAME belongs to a mapping symbol.
2405 is_mapping_symbol_name(const char* name
)
2409 && (name
[1] == 'a' || name
[1] == 't' || name
[1] == 'd')
2410 && (name
[2] == '\0' || name
[2] == '.'));
2413 // Whether we work around the Cortex-A8 erratum.
2415 fix_cortex_a8() const
2416 { return this->fix_cortex_a8_
; }
2418 // Whether we merge exidx entries in debuginfo.
2420 merge_exidx_entries() const
2421 { return parameters
->options().merge_exidx_entries(); }
2423 // Whether we fix R_ARM_V4BX relocation.
2425 // 1 - replace with MOV instruction (armv4 target)
2426 // 2 - make interworking veneer (>= armv4t targets only)
2427 General_options::Fix_v4bx
2429 { return parameters
->options().fix_v4bx(); }
2431 // Scan a span of THUMB code section for Cortex-A8 erratum.
2433 scan_span_for_cortex_a8_erratum(Arm_relobj
<big_endian
>*, unsigned int,
2434 section_size_type
, section_size_type
,
2435 const unsigned char*, Arm_address
);
2437 // Apply Cortex-A8 workaround to a branch.
2439 apply_cortex_a8_workaround(const Cortex_a8_stub
*, Arm_address
,
2440 unsigned char*, Arm_address
);
2443 // Make an ELF object.
2445 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2446 const elfcpp::Ehdr
<32, big_endian
>& ehdr
);
2449 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2450 const elfcpp::Ehdr
<32, !big_endian
>&)
2451 { gold_unreachable(); }
2454 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2455 const elfcpp::Ehdr
<64, false>&)
2456 { gold_unreachable(); }
2459 do_make_elf_object(const std::string
&, Input_file
*, off_t
,
2460 const elfcpp::Ehdr
<64, true>&)
2461 { gold_unreachable(); }
2463 // Make an output section.
2465 do_make_output_section(const char* name
, elfcpp::Elf_Word type
,
2466 elfcpp::Elf_Xword flags
)
2467 { return new Arm_output_section
<big_endian
>(name
, type
, flags
); }
2470 do_adjust_elf_header(unsigned char* view
, int len
) const;
2472 // We only need to generate stubs, and hence perform relaxation if we are
2473 // not doing relocatable linking.
2475 do_may_relax() const
2476 { return !parameters
->options().relocatable(); }
2479 do_relax(int, const Input_objects
*, Symbol_table
*, Layout
*, const Task
*);
2481 // Determine whether an object attribute tag takes an integer, a
2484 do_attribute_arg_type(int tag
) const;
2486 // Reorder tags during output.
2488 do_attributes_order(int num
) const;
2490 // This is called when the target is selected as the default.
2492 do_select_as_default_target()
2494 // No locking is required since there should only be one default target.
2495 // We cannot have both the big-endian and little-endian ARM targets
2497 gold_assert(arm_reloc_property_table
== NULL
);
2498 arm_reloc_property_table
= new Arm_reloc_property_table();
2501 // Virtual function which is set to return true by a target if
2502 // it can use relocation types to determine if a function's
2503 // pointer is taken.
2505 do_can_check_for_function_pointers() const
2508 // Whether a section called SECTION_NAME may have function pointers to
2509 // sections not eligible for safe ICF folding.
2511 do_section_may_have_icf_unsafe_pointers(const char* section_name
) const
2513 return (!is_prefix_of(".ARM.exidx", section_name
)
2514 && !is_prefix_of(".ARM.extab", section_name
)
2515 && Target::do_section_may_have_icf_unsafe_pointers(section_name
));
2519 // The class which scans relocations.
2524 : issued_non_pic_error_(false)
2528 get_reference_flags(unsigned int r_type
);
2531 local(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2532 Sized_relobj_file
<32, big_endian
>* object
,
2533 unsigned int data_shndx
,
2534 Output_section
* output_section
,
2535 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2536 const elfcpp::Sym
<32, big_endian
>& lsym
);
2539 global(Symbol_table
* symtab
, Layout
* layout
, Target_arm
* target
,
2540 Sized_relobj_file
<32, big_endian
>* object
,
2541 unsigned int data_shndx
,
2542 Output_section
* output_section
,
2543 const elfcpp::Rel
<32, big_endian
>& reloc
, unsigned int r_type
,
2547 local_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2548 Sized_relobj_file
<32, big_endian
>* ,
2551 const elfcpp::Rel
<32, big_endian
>& ,
2553 const elfcpp::Sym
<32, big_endian
>&);
2556 global_reloc_may_be_function_pointer(Symbol_table
* , Layout
* , Target_arm
* ,
2557 Sized_relobj_file
<32, big_endian
>* ,
2560 const elfcpp::Rel
<32, big_endian
>& ,
2561 unsigned int , Symbol
*);
2565 unsupported_reloc_local(Sized_relobj_file
<32, big_endian
>*,
2566 unsigned int r_type
);
2569 unsupported_reloc_global(Sized_relobj_file
<32, big_endian
>*,
2570 unsigned int r_type
, Symbol
*);
2573 check_non_pic(Relobj
*, unsigned int r_type
);
2575 // Almost identical to Symbol::needs_plt_entry except that it also
2576 // handles STT_ARM_TFUNC.
2578 symbol_needs_plt_entry(const Symbol
* sym
)
2580 // An undefined symbol from an executable does not need a PLT entry.
2581 if (sym
->is_undefined() && !parameters
->options().shared())
2584 return (!parameters
->doing_static_link()
2585 && (sym
->type() == elfcpp::STT_FUNC
2586 || sym
->type() == elfcpp::STT_ARM_TFUNC
)
2587 && (sym
->is_from_dynobj()
2588 || sym
->is_undefined()
2589 || sym
->is_preemptible()));
2593 possible_function_pointer_reloc(unsigned int r_type
);
2595 // Whether we have issued an error about a non-PIC compilation.
2596 bool issued_non_pic_error_
;
2599 // The class which implements relocation.
2609 // Return whether the static relocation needs to be applied.
2611 should_apply_static_reloc(const Sized_symbol
<32>* gsym
,
2612 unsigned int r_type
,
2614 Output_section
* output_section
);
2616 // Do a relocation. Return false if the caller should not issue
2617 // any warnings about this relocation.
2619 relocate(const Relocate_info
<32, big_endian
>*, Target_arm
*,
2620 Output_section
*, size_t relnum
,
2621 const elfcpp::Rel
<32, big_endian
>&,
2622 unsigned int r_type
, const Sized_symbol
<32>*,
2623 const Symbol_value
<32>*,
2624 unsigned char*, Arm_address
,
2627 // Return whether we want to pass flag NON_PIC_REF for this
2628 // reloc. This means the relocation type accesses a symbol not via
2631 reloc_is_non_pic(unsigned int r_type
)
2635 // These relocation types reference GOT or PLT entries explicitly.
2636 case elfcpp::R_ARM_GOT_BREL
:
2637 case elfcpp::R_ARM_GOT_ABS
:
2638 case elfcpp::R_ARM_GOT_PREL
:
2639 case elfcpp::R_ARM_GOT_BREL12
:
2640 case elfcpp::R_ARM_PLT32_ABS
:
2641 case elfcpp::R_ARM_TLS_GD32
:
2642 case elfcpp::R_ARM_TLS_LDM32
:
2643 case elfcpp::R_ARM_TLS_IE32
:
2644 case elfcpp::R_ARM_TLS_IE12GP
:
2646 // These relocate types may use PLT entries.
2647 case elfcpp::R_ARM_CALL
:
2648 case elfcpp::R_ARM_THM_CALL
:
2649 case elfcpp::R_ARM_JUMP24
:
2650 case elfcpp::R_ARM_THM_JUMP24
:
2651 case elfcpp::R_ARM_THM_JUMP19
:
2652 case elfcpp::R_ARM_PLT32
:
2653 case elfcpp::R_ARM_THM_XPC22
:
2654 case elfcpp::R_ARM_PREL31
:
2655 case elfcpp::R_ARM_SBREL31
:
2664 // Do a TLS relocation.
2665 inline typename Arm_relocate_functions
<big_endian
>::Status
2666 relocate_tls(const Relocate_info
<32, big_endian
>*, Target_arm
<big_endian
>*,
2667 size_t, const elfcpp::Rel
<32, big_endian
>&, unsigned int,
2668 const Sized_symbol
<32>*, const Symbol_value
<32>*,
2669 unsigned char*, elfcpp::Elf_types
<32>::Elf_Addr
,
2674 // A class which returns the size required for a relocation type,
2675 // used while scanning relocs during a relocatable link.
2676 class Relocatable_size_for_reloc
2680 get_size_for_reloc(unsigned int, Relobj
*);
2683 // Adjust TLS relocation type based on the options and whether this
2684 // is a local symbol.
2685 static tls::Tls_optimization
2686 optimize_tls_reloc(bool is_final
, int r_type
);
2688 // Get the GOT section, creating it if necessary.
2689 Arm_output_data_got
<big_endian
>*
2690 got_section(Symbol_table
*, Layout
*);
2692 // Get the GOT PLT section.
2694 got_plt_section() const
2696 gold_assert(this->got_plt_
!= NULL
);
2697 return this->got_plt_
;
2700 // Create a PLT entry for a global symbol.
2702 make_plt_entry(Symbol_table
*, Layout
*, Symbol
*);
2704 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2706 define_tls_base_symbol(Symbol_table
*, Layout
*);
2708 // Create a GOT entry for the TLS module index.
2710 got_mod_index_entry(Symbol_table
* symtab
, Layout
* layout
,
2711 Sized_relobj_file
<32, big_endian
>* object
);
2713 // Get the PLT section.
2714 const Output_data_plt_arm
<big_endian
>*
2717 gold_assert(this->plt_
!= NULL
);
2721 // Get the dynamic reloc section, creating it if necessary.
2723 rel_dyn_section(Layout
*);
2725 // Get the section to use for TLS_DESC relocations.
2727 rel_tls_desc_section(Layout
*) const;
2729 // Return true if the symbol may need a COPY relocation.
2730 // References from an executable object to non-function symbols
2731 // defined in a dynamic object may need a COPY relocation.
2733 may_need_copy_reloc(Symbol
* gsym
)
2735 return (gsym
->type() != elfcpp::STT_ARM_TFUNC
2736 && gsym
->may_need_copy_reloc());
2739 // Add a potential copy relocation.
2741 copy_reloc(Symbol_table
* symtab
, Layout
* layout
,
2742 Sized_relobj_file
<32, big_endian
>* object
,
2743 unsigned int shndx
, Output_section
* output_section
,
2744 Symbol
* sym
, const elfcpp::Rel
<32, big_endian
>& reloc
)
2746 this->copy_relocs_
.copy_reloc(symtab
, layout
,
2747 symtab
->get_sized_symbol
<32>(sym
),
2748 object
, shndx
, output_section
, reloc
,
2749 this->rel_dyn_section(layout
));
2752 // Whether two EABI versions are compatible.
2754 are_eabi_versions_compatible(elfcpp::Elf_Word v1
, elfcpp::Elf_Word v2
);
2756 // Merge processor-specific flags from input object and those in the ELF
2757 // header of the output.
2759 merge_processor_specific_flags(const std::string
&, elfcpp::Elf_Word
);
2761 // Get the secondary compatible architecture.
2763 get_secondary_compatible_arch(const Attributes_section_data
*);
2765 // Set the secondary compatible architecture.
2767 set_secondary_compatible_arch(Attributes_section_data
*, int);
2770 tag_cpu_arch_combine(const char*, int, int*, int, int);
2772 // Helper to print AEABI enum tag value.
2774 aeabi_enum_name(unsigned int);
2776 // Return string value for TAG_CPU_name.
2778 tag_cpu_name_value(unsigned int);
2780 // Merge object attributes from input object and those in the output.
2782 merge_object_attributes(const char*, const Attributes_section_data
*);
2784 // Helper to get an AEABI object attribute
2786 get_aeabi_object_attribute(int tag
) const
2788 Attributes_section_data
* pasd
= this->attributes_section_data_
;
2789 gold_assert(pasd
!= NULL
);
2790 Object_attribute
* attr
=
2791 pasd
->get_attribute(Object_attribute::OBJ_ATTR_PROC
, tag
);
2792 gold_assert(attr
!= NULL
);
2797 // Methods to support stub-generations.
2800 // Group input sections for stub generation.
2802 group_sections(Layout
*, section_size_type
, bool, const Task
*);
2804 // Scan a relocation for stub generation.
2806 scan_reloc_for_stub(const Relocate_info
<32, big_endian
>*, unsigned int,
2807 const Sized_symbol
<32>*, unsigned int,
2808 const Symbol_value
<32>*,
2809 elfcpp::Elf_types
<32>::Elf_Swxword
, Arm_address
);
2811 // Scan a relocation section for stub.
2812 template<int sh_type
>
2814 scan_reloc_section_for_stubs(
2815 const Relocate_info
<32, big_endian
>* relinfo
,
2816 const unsigned char* prelocs
,
2818 Output_section
* output_section
,
2819 bool needs_special_offset_handling
,
2820 const unsigned char* view
,
2821 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
2824 // Fix .ARM.exidx section coverage.
2826 fix_exidx_coverage(Layout
*, const Input_objects
*,
2827 Arm_output_section
<big_endian
>*, Symbol_table
*,
2830 // Functors for STL set.
2831 struct output_section_address_less_than
2834 operator()(const Output_section
* s1
, const Output_section
* s2
) const
2835 { return s1
->address() < s2
->address(); }
2838 // Information about this specific target which we pass to the
2839 // general Target structure.
2840 static const Target::Target_info arm_info
;
2842 // The types of GOT entries needed for this platform.
2843 // These values are exposed to the ABI in an incremental link.
2844 // Do not renumber existing values without changing the version
2845 // number of the .gnu_incremental_inputs section.
2848 GOT_TYPE_STANDARD
= 0, // GOT entry for a regular symbol
2849 GOT_TYPE_TLS_NOFFSET
= 1, // GOT entry for negative TLS offset
2850 GOT_TYPE_TLS_OFFSET
= 2, // GOT entry for positive TLS offset
2851 GOT_TYPE_TLS_PAIR
= 3, // GOT entry for TLS module/offset pair
2852 GOT_TYPE_TLS_DESC
= 4 // GOT entry for TLS_DESC pair
2855 typedef typename
std::vector
<Stub_table
<big_endian
>*> Stub_table_list
;
2857 // Map input section to Arm_input_section.
2858 typedef Unordered_map
<Section_id
,
2859 Arm_input_section
<big_endian
>*,
2861 Arm_input_section_map
;
2863 // Map output addresses to relocs for Cortex-A8 erratum.
2864 typedef Unordered_map
<Arm_address
, const Cortex_a8_reloc
*>
2865 Cortex_a8_relocs_info
;
2868 Arm_output_data_got
<big_endian
>* got_
;
2870 Output_data_plt_arm
<big_endian
>* plt_
;
2871 // The GOT PLT section.
2872 Output_data_space
* got_plt_
;
2873 // The dynamic reloc section.
2874 Reloc_section
* rel_dyn_
;
2875 // Relocs saved to avoid a COPY reloc.
2876 Copy_relocs
<elfcpp::SHT_REL
, 32, big_endian
> copy_relocs_
;
2877 // Space for variables copied with a COPY reloc.
2878 Output_data_space
* dynbss_
;
2879 // Offset of the GOT entry for the TLS module index.
2880 unsigned int got_mod_index_offset_
;
2881 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2882 bool tls_base_symbol_defined_
;
2883 // Vector of Stub_tables created.
2884 Stub_table_list stub_tables_
;
2886 const Stub_factory
&stub_factory_
;
2887 // Whether we force PIC branch veneers.
2888 bool should_force_pic_veneer_
;
2889 // Map for locating Arm_input_sections.
2890 Arm_input_section_map arm_input_section_map_
;
2891 // Attributes section data in output.
2892 Attributes_section_data
* attributes_section_data_
;
2893 // Whether we want to fix code for Cortex-A8 erratum.
2894 bool fix_cortex_a8_
;
2895 // Map addresses to relocs for Cortex-A8 erratum.
2896 Cortex_a8_relocs_info cortex_a8_relocs_info_
;
2899 template<bool big_endian
>
2900 const Target::Target_info Target_arm
<big_endian
>::arm_info
=
2903 big_endian
, // is_big_endian
2904 elfcpp::EM_ARM
, // machine_code
2905 false, // has_make_symbol
2906 false, // has_resolve
2907 false, // has_code_fill
2908 true, // is_default_stack_executable
2909 false, // can_icf_inline_merge_sections
2911 "/usr/lib/libc.so.1", // dynamic_linker
2912 0x8000, // default_text_segment_address
2913 0x1000, // abi_pagesize (overridable by -z max-page-size)
2914 0x1000, // common_pagesize (overridable by -z common-page-size)
2915 elfcpp::SHN_UNDEF
, // small_common_shndx
2916 elfcpp::SHN_UNDEF
, // large_common_shndx
2917 0, // small_common_section_flags
2918 0, // large_common_section_flags
2919 ".ARM.attributes", // attributes_section
2920 "aeabi" // attributes_vendor
2923 // Arm relocate functions class
2926 template<bool big_endian
>
2927 class Arm_relocate_functions
: public Relocate_functions
<32, big_endian
>
2932 STATUS_OKAY
, // No error during relocation.
2933 STATUS_OVERFLOW
, // Relocation overflow.
2934 STATUS_BAD_RELOC
// Relocation cannot be applied.
2938 typedef Relocate_functions
<32, big_endian
> Base
;
2939 typedef Arm_relocate_functions
<big_endian
> This
;
2941 // Encoding of imm16 argument for movt and movw ARM instructions
2944 // imm16 := imm4 | imm12
2946 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2947 // +-------+---------------+-------+-------+-----------------------+
2948 // | | |imm4 | |imm12 |
2949 // +-------+---------------+-------+-------+-----------------------+
2951 // Extract the relocation addend from VAL based on the ARM
2952 // instruction encoding described above.
2953 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2954 extract_arm_movw_movt_addend(
2955 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2957 // According to the Elf ABI for ARM Architecture the immediate
2958 // field is sign-extended to form the addend.
2959 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000) | (val
& 0xfff));
2962 // Insert X into VAL based on the ARM instruction encoding described
2964 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2965 insert_val_arm_movw_movt(
2966 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
2967 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
2971 val
|= (x
& 0xf000) << 4;
2975 // Encoding of imm16 argument for movt and movw Thumb2 instructions
2978 // imm16 := imm4 | i | imm3 | imm8
2980 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2981 // +---------+-+-----------+-------++-+-----+-------+---------------+
2982 // | |i| |imm4 || |imm3 | |imm8 |
2983 // +---------+-+-----------+-------++-+-----+-------+---------------+
2985 // Extract the relocation addend from VAL based on the Thumb2
2986 // instruction encoding described above.
2987 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
2988 extract_thumb_movw_movt_addend(
2989 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
)
2991 // According to the Elf ABI for ARM Architecture the immediate
2992 // field is sign-extended to form the addend.
2993 return Bits
<16>::sign_extend32(((val
>> 4) & 0xf000)
2994 | ((val
>> 15) & 0x0800)
2995 | ((val
>> 4) & 0x0700)
2999 // Insert X into VAL based on the Thumb2 instruction encoding
3001 static inline typename
elfcpp::Swap
<32, big_endian
>::Valtype
3002 insert_val_thumb_movw_movt(
3003 typename
elfcpp::Swap
<32, big_endian
>::Valtype val
,
3004 typename
elfcpp::Swap
<32, big_endian
>::Valtype x
)
3007 val
|= (x
& 0xf000) << 4;
3008 val
|= (x
& 0x0800) << 15;
3009 val
|= (x
& 0x0700) << 4;
3010 val
|= (x
& 0x00ff);
3014 // Calculate the smallest constant Kn for the specified residual.
3015 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3017 calc_grp_kn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
)
3023 // Determine the most significant bit in the residual and
3024 // align the resulting value to a 2-bit boundary.
3025 for (msb
= 30; (msb
>= 0) && !(residual
& (3 << msb
)); msb
-= 2)
3027 // The desired shift is now (msb - 6), or zero, whichever
3029 return (((msb
- 6) < 0) ? 0 : (msb
- 6));
3032 // Calculate the final residual for the specified group index.
3033 // If the passed group index is less than zero, the method will return
3034 // the value of the specified residual without any change.
3035 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3036 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3037 calc_grp_residual(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3040 for (int n
= 0; n
<= group
; n
++)
3042 // Calculate which part of the value to mask.
3043 uint32_t shift
= calc_grp_kn(residual
);
3044 // Calculate the residual for the next time around.
3045 residual
&= ~(residual
& (0xff << shift
));
3051 // Calculate the value of Gn for the specified group index.
3052 // We return it in the form of an encoded constant-and-rotation.
3053 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3054 static typename
elfcpp::Swap
<32, big_endian
>::Valtype
3055 calc_grp_gn(typename
elfcpp::Swap
<32, big_endian
>::Valtype residual
,
3058 typename
elfcpp::Swap
<32, big_endian
>::Valtype gn
= 0;
3061 for (int n
= 0; n
<= group
; n
++)
3063 // Calculate which part of the value to mask.
3064 shift
= calc_grp_kn(residual
);
3065 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3066 gn
= residual
& (0xff << shift
);
3067 // Calculate the residual for the next time around.
3070 // Return Gn in the form of an encoded constant-and-rotation.
3071 return ((gn
>> shift
) | ((gn
<= 0xff ? 0 : (32 - shift
) / 2) << 8));
3075 // Handle ARM long branches.
3076 static typename
This::Status
3077 arm_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3078 unsigned char*, const Sized_symbol
<32>*,
3079 const Arm_relobj
<big_endian
>*, unsigned int,
3080 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3082 // Handle THUMB long branches.
3083 static typename
This::Status
3084 thumb_branch_common(unsigned int, const Relocate_info
<32, big_endian
>*,
3085 unsigned char*, const Sized_symbol
<32>*,
3086 const Arm_relobj
<big_endian
>*, unsigned int,
3087 const Symbol_value
<32>*, Arm_address
, Arm_address
, bool);
3090 // Return the branch offset of a 32-bit THUMB branch.
3091 static inline int32_t
3092 thumb32_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3094 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3095 // involving the J1 and J2 bits.
3096 uint32_t s
= (upper_insn
& (1U << 10)) >> 10;
3097 uint32_t upper
= upper_insn
& 0x3ffU
;
3098 uint32_t lower
= lower_insn
& 0x7ffU
;
3099 uint32_t j1
= (lower_insn
& (1U << 13)) >> 13;
3100 uint32_t j2
= (lower_insn
& (1U << 11)) >> 11;
3101 uint32_t i1
= j1
^ s
? 0 : 1;
3102 uint32_t i2
= j2
^ s
? 0 : 1;
3104 return Bits
<25>::sign_extend32((s
<< 24) | (i1
<< 23) | (i2
<< 22)
3105 | (upper
<< 12) | (lower
<< 1));
3108 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3109 // UPPER_INSN is the original upper instruction of the branch. Caller is
3110 // responsible for overflow checking and BLX offset adjustment.
3111 static inline uint16_t
3112 thumb32_branch_upper(uint16_t upper_insn
, int32_t offset
)
3114 uint32_t s
= offset
< 0 ? 1 : 0;
3115 uint32_t bits
= static_cast<uint32_t>(offset
);
3116 return (upper_insn
& ~0x7ffU
) | ((bits
>> 12) & 0x3ffU
) | (s
<< 10);
3119 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3120 // LOWER_INSN is the original lower instruction of the branch. Caller is
3121 // responsible for overflow checking and BLX offset adjustment.
3122 static inline uint16_t
3123 thumb32_branch_lower(uint16_t lower_insn
, int32_t offset
)
3125 uint32_t s
= offset
< 0 ? 1 : 0;
3126 uint32_t bits
= static_cast<uint32_t>(offset
);
3127 return ((lower_insn
& ~0x2fffU
)
3128 | ((((bits
>> 23) & 1) ^ !s
) << 13)
3129 | ((((bits
>> 22) & 1) ^ !s
) << 11)
3130 | ((bits
>> 1) & 0x7ffU
));
3133 // Return the branch offset of a 32-bit THUMB conditional branch.
3134 static inline int32_t
3135 thumb32_cond_branch_offset(uint16_t upper_insn
, uint16_t lower_insn
)
3137 uint32_t s
= (upper_insn
& 0x0400U
) >> 10;
3138 uint32_t j1
= (lower_insn
& 0x2000U
) >> 13;
3139 uint32_t j2
= (lower_insn
& 0x0800U
) >> 11;
3140 uint32_t lower
= (lower_insn
& 0x07ffU
);
3141 uint32_t upper
= (s
<< 8) | (j2
<< 7) | (j1
<< 6) | (upper_insn
& 0x003fU
);
3143 return Bits
<21>::sign_extend32((upper
<< 12) | (lower
<< 1));
3146 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3147 // instruction. UPPER_INSN is the original upper instruction of the branch.
3148 // Caller is responsible for overflow checking.
3149 static inline uint16_t
3150 thumb32_cond_branch_upper(uint16_t upper_insn
, int32_t offset
)
3152 uint32_t s
= offset
< 0 ? 1 : 0;
3153 uint32_t bits
= static_cast<uint32_t>(offset
);
3154 return (upper_insn
& 0xfbc0U
) | (s
<< 10) | ((bits
& 0x0003f000U
) >> 12);
3157 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3158 // instruction. LOWER_INSN is the original lower instruction of the branch.
3159 // The caller is responsible for overflow checking.
3160 static inline uint16_t
3161 thumb32_cond_branch_lower(uint16_t lower_insn
, int32_t offset
)
3163 uint32_t bits
= static_cast<uint32_t>(offset
);
3164 uint32_t j2
= (bits
& 0x00080000U
) >> 19;
3165 uint32_t j1
= (bits
& 0x00040000U
) >> 18;
3166 uint32_t lo
= (bits
& 0x00000ffeU
) >> 1;
3168 return (lower_insn
& 0xd000U
) | (j1
<< 13) | (j2
<< 11) | lo
;
3171 // R_ARM_ABS8: S + A
3172 static inline typename
This::Status
3173 abs8(unsigned char* view
,
3174 const Sized_relobj_file
<32, big_endian
>* object
,
3175 const Symbol_value
<32>* psymval
)
3177 typedef typename
elfcpp::Swap
<8, big_endian
>::Valtype Valtype
;
3178 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3179 Valtype val
= elfcpp::Swap
<8, big_endian
>::readval(wv
);
3180 int32_t addend
= Bits
<8>::sign_extend32(val
);
3181 Arm_address x
= psymval
->value(object
, addend
);
3182 val
= Bits
<32>::bit_select32(val
, x
, 0xffU
);
3183 elfcpp::Swap
<8, big_endian
>::writeval(wv
, val
);
3185 // R_ARM_ABS8 permits signed or unsigned results.
3186 int signed_x
= static_cast<int32_t>(x
);
3187 return ((signed_x
< -128 || signed_x
> 255)
3188 ? This::STATUS_OVERFLOW
3189 : This::STATUS_OKAY
);
3192 // R_ARM_THM_ABS5: S + A
3193 static inline typename
This::Status
3194 thm_abs5(unsigned char* view
,
3195 const Sized_relobj_file
<32, big_endian
>* object
,
3196 const Symbol_value
<32>* psymval
)
3198 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3199 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3200 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3201 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3202 Reltype addend
= (val
& 0x7e0U
) >> 6;
3203 Reltype x
= psymval
->value(object
, addend
);
3204 val
= Bits
<32>::bit_select32(val
, x
<< 6, 0x7e0U
);
3205 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3207 // R_ARM_ABS16 permits signed or unsigned results.
3208 int signed_x
= static_cast<int32_t>(x
);
3209 return ((signed_x
< -32768 || signed_x
> 65535)
3210 ? This::STATUS_OVERFLOW
3211 : This::STATUS_OKAY
);
3214 // R_ARM_ABS12: S + A
3215 static inline typename
This::Status
3216 abs12(unsigned char* view
,
3217 const Sized_relobj_file
<32, big_endian
>* object
,
3218 const Symbol_value
<32>* psymval
)
3220 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3221 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3222 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3223 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3224 Reltype addend
= val
& 0x0fffU
;
3225 Reltype x
= psymval
->value(object
, addend
);
3226 val
= Bits
<32>::bit_select32(val
, x
, 0x0fffU
);
3227 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3228 return (Bits
<12>::has_overflow32(x
)
3229 ? This::STATUS_OVERFLOW
3230 : This::STATUS_OKAY
);
3233 // R_ARM_ABS16: S + A
3234 static inline typename
This::Status
3235 abs16(unsigned char* view
,
3236 const Sized_relobj_file
<32, big_endian
>* object
,
3237 const Symbol_value
<32>* psymval
)
3239 typedef typename
elfcpp::Swap_unaligned
<16, big_endian
>::Valtype Valtype
;
3240 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3241 Valtype val
= elfcpp::Swap_unaligned
<16, big_endian
>::readval(view
);
3242 int32_t addend
= Bits
<16>::sign_extend32(val
);
3243 Arm_address x
= psymval
->value(object
, addend
);
3244 val
= Bits
<32>::bit_select32(val
, x
, 0xffffU
);
3245 elfcpp::Swap_unaligned
<16, big_endian
>::writeval(view
, val
);
3247 // R_ARM_ABS16 permits signed or unsigned results.
3248 int signed_x
= static_cast<int32_t>(x
);
3249 return ((signed_x
< -32768 || signed_x
> 65536)
3250 ? This::STATUS_OVERFLOW
3251 : This::STATUS_OKAY
);
3254 // R_ARM_ABS32: (S + A) | T
3255 static inline typename
This::Status
3256 abs32(unsigned char* view
,
3257 const Sized_relobj_file
<32, big_endian
>* object
,
3258 const Symbol_value
<32>* psymval
,
3259 Arm_address thumb_bit
)
3261 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3262 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3263 Valtype x
= psymval
->value(object
, addend
) | thumb_bit
;
3264 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3265 return This::STATUS_OKAY
;
3268 // R_ARM_REL32: (S + A) | T - P
3269 static inline typename
This::Status
3270 rel32(unsigned char* view
,
3271 const Sized_relobj_file
<32, big_endian
>* object
,
3272 const Symbol_value
<32>* psymval
,
3273 Arm_address address
,
3274 Arm_address thumb_bit
)
3276 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3277 Valtype addend
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3278 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3279 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, x
);
3280 return This::STATUS_OKAY
;
3283 // R_ARM_THM_JUMP24: (S + A) | T - P
3284 static typename
This::Status
3285 thm_jump19(unsigned char* view
, const Arm_relobj
<big_endian
>* object
,
3286 const Symbol_value
<32>* psymval
, Arm_address address
,
3287 Arm_address thumb_bit
);
3289 // R_ARM_THM_JUMP6: S + A – P
3290 static inline typename
This::Status
3291 thm_jump6(unsigned char* view
,
3292 const Sized_relobj_file
<32, big_endian
>* object
,
3293 const Symbol_value
<32>* psymval
,
3294 Arm_address address
)
3296 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3297 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3298 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3299 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3300 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3301 Reltype addend
= (((val
& 0x0200) >> 3) | ((val
& 0x00f8) >> 2));
3302 Reltype x
= (psymval
->value(object
, addend
) - address
);
3303 val
= (val
& 0xfd07) | ((x
& 0x0040) << 3) | ((val
& 0x003e) << 2);
3304 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
);
3305 // CZB does only forward jumps.
3306 return ((x
> 0x007e)
3307 ? This::STATUS_OVERFLOW
3308 : This::STATUS_OKAY
);
3311 // R_ARM_THM_JUMP8: S + A – P
3312 static inline typename
This::Status
3313 thm_jump8(unsigned char* view
,
3314 const Sized_relobj_file
<32, big_endian
>* object
,
3315 const Symbol_value
<32>* psymval
,
3316 Arm_address address
)
3318 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3319 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3320 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3321 int32_t addend
= Bits
<8>::sign_extend32((val
& 0x00ff) << 1);
3322 int32_t x
= (psymval
->value(object
, addend
) - address
);
3323 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xff00)
3324 | ((x
& 0x01fe) >> 1)));
3325 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3326 return (Bits
<9>::has_overflow32(x
)
3327 ? This::STATUS_OVERFLOW
3328 : This::STATUS_OKAY
);
3331 // R_ARM_THM_JUMP11: S + A – P
3332 static inline typename
This::Status
3333 thm_jump11(unsigned char* view
,
3334 const Sized_relobj_file
<32, big_endian
>* object
,
3335 const Symbol_value
<32>* psymval
,
3336 Arm_address address
)
3338 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3339 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3340 Valtype val
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3341 int32_t addend
= Bits
<11>::sign_extend32((val
& 0x07ff) << 1);
3342 int32_t x
= (psymval
->value(object
, addend
) - address
);
3343 elfcpp::Swap
<16, big_endian
>::writeval(wv
, ((val
& 0xf800)
3344 | ((x
& 0x0ffe) >> 1)));
3345 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3346 return (Bits
<12>::has_overflow32(x
)
3347 ? This::STATUS_OVERFLOW
3348 : This::STATUS_OKAY
);
3351 // R_ARM_BASE_PREL: B(S) + A - P
3352 static inline typename
This::Status
3353 base_prel(unsigned char* view
,
3355 Arm_address address
)
3357 Base::rel32(view
, origin
- address
);
3361 // R_ARM_BASE_ABS: B(S) + A
3362 static inline typename
This::Status
3363 base_abs(unsigned char* view
,
3366 Base::rel32(view
, origin
);
3370 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3371 static inline typename
This::Status
3372 got_brel(unsigned char* view
,
3373 typename
elfcpp::Swap
<32, big_endian
>::Valtype got_offset
)
3375 Base::rel32(view
, got_offset
);
3376 return This::STATUS_OKAY
;
3379 // R_ARM_GOT_PREL: GOT(S) + A - P
3380 static inline typename
This::Status
3381 got_prel(unsigned char* view
,
3382 Arm_address got_entry
,
3383 Arm_address address
)
3385 Base::rel32(view
, got_entry
- address
);
3386 return This::STATUS_OKAY
;
3389 // R_ARM_PREL: (S + A) | T - P
3390 static inline typename
This::Status
3391 prel31(unsigned char* view
,
3392 const Sized_relobj_file
<32, big_endian
>* object
,
3393 const Symbol_value
<32>* psymval
,
3394 Arm_address address
,
3395 Arm_address thumb_bit
)
3397 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
3398 Valtype val
= elfcpp::Swap_unaligned
<32, big_endian
>::readval(view
);
3399 Valtype addend
= Bits
<31>::sign_extend32(val
);
3400 Valtype x
= (psymval
->value(object
, addend
) | thumb_bit
) - address
;
3401 val
= Bits
<32>::bit_select32(val
, x
, 0x7fffffffU
);
3402 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(view
, val
);
3403 return (Bits
<31>::has_overflow32(x
)
3404 ? This::STATUS_OVERFLOW
3405 : This::STATUS_OKAY
);
3408 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3409 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3410 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3411 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3412 static inline typename
This::Status
3413 movw(unsigned char* view
,
3414 const Sized_relobj_file
<32, big_endian
>* object
,
3415 const Symbol_value
<32>* psymval
,
3416 Arm_address relative_address_base
,
3417 Arm_address thumb_bit
,
3418 bool check_overflow
)
3420 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3421 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3422 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3423 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3424 Valtype x
= ((psymval
->value(object
, addend
) | thumb_bit
)
3425 - relative_address_base
);
3426 val
= This::insert_val_arm_movw_movt(val
, x
);
3427 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3428 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3429 ? This::STATUS_OVERFLOW
3430 : This::STATUS_OKAY
);
3433 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3434 // R_ARM_MOVT_PREL: S + A - P
3435 // R_ARM_MOVT_BREL: S + A - B(S)
3436 static inline typename
This::Status
3437 movt(unsigned char* view
,
3438 const Sized_relobj_file
<32, big_endian
>* object
,
3439 const Symbol_value
<32>* psymval
,
3440 Arm_address relative_address_base
)
3442 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3443 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3444 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3445 Valtype addend
= This::extract_arm_movw_movt_addend(val
);
3446 Valtype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3447 val
= This::insert_val_arm_movw_movt(val
, x
);
3448 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3449 // FIXME: IHI0044D says that we should check for overflow.
3450 return This::STATUS_OKAY
;
3453 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3454 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3455 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3456 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3457 static inline typename
This::Status
3458 thm_movw(unsigned char* view
,
3459 const Sized_relobj_file
<32, big_endian
>* object
,
3460 const Symbol_value
<32>* psymval
,
3461 Arm_address relative_address_base
,
3462 Arm_address thumb_bit
,
3463 bool check_overflow
)
3465 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3466 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3467 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3468 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3469 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3470 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3472 (psymval
->value(object
, addend
) | thumb_bit
) - relative_address_base
;
3473 val
= This::insert_val_thumb_movw_movt(val
, x
);
3474 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3475 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3476 return ((check_overflow
&& Bits
<16>::has_overflow32(x
))
3477 ? This::STATUS_OVERFLOW
3478 : This::STATUS_OKAY
);
3481 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3482 // R_ARM_THM_MOVT_PREL: S + A - P
3483 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3484 static inline typename
This::Status
3485 thm_movt(unsigned char* view
,
3486 const Sized_relobj_file
<32, big_endian
>* object
,
3487 const Symbol_value
<32>* psymval
,
3488 Arm_address relative_address_base
)
3490 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3491 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3492 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3493 Reltype val
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3494 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3495 Reltype addend
= This::extract_thumb_movw_movt_addend(val
);
3496 Reltype x
= (psymval
->value(object
, addend
) - relative_address_base
) >> 16;
3497 val
= This::insert_val_thumb_movw_movt(val
, x
);
3498 elfcpp::Swap
<16, big_endian
>::writeval(wv
, val
>> 16);
3499 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, val
& 0xffff);
3500 return This::STATUS_OKAY
;
3503 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3504 static inline typename
This::Status
3505 thm_alu11(unsigned char* view
,
3506 const Sized_relobj_file
<32, big_endian
>* object
,
3507 const Symbol_value
<32>* psymval
,
3508 Arm_address address
,
3509 Arm_address thumb_bit
)
3511 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3512 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3513 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3514 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3515 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3517 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3518 // -----------------------------------------------------------------------
3519 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3520 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3521 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3522 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3523 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3524 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3526 // Determine a sign for the addend.
3527 const int sign
= ((insn
& 0xf8ef0000) == 0xf0ad0000
3528 || (insn
& 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3529 // Thumb2 addend encoding:
3530 // imm12 := i | imm3 | imm8
3531 int32_t addend
= (insn
& 0xff)
3532 | ((insn
& 0x00007000) >> 4)
3533 | ((insn
& 0x04000000) >> 15);
3534 // Apply a sign to the added.
3537 int32_t x
= (psymval
->value(object
, addend
) | thumb_bit
)
3538 - (address
& 0xfffffffc);
3539 Reltype val
= abs(x
);
3540 // Mask out the value and a distinct part of the ADD/SUB opcode
3541 // (bits 7:5 of opword).
3542 insn
= (insn
& 0xfb0f8f00)
3544 | ((val
& 0x700) << 4)
3545 | ((val
& 0x800) << 15);
3546 // Set the opcode according to whether the value to go in the
3547 // place is negative.
3551 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3552 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3553 return ((val
> 0xfff) ?
3554 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3557 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3558 static inline typename
This::Status
3559 thm_pc8(unsigned char* view
,
3560 const Sized_relobj_file
<32, big_endian
>* object
,
3561 const Symbol_value
<32>* psymval
,
3562 Arm_address address
)
3564 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3565 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Reltype
;
3566 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3567 Valtype insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3568 Reltype addend
= ((insn
& 0x00ff) << 2);
3569 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3570 Reltype val
= abs(x
);
3571 insn
= (insn
& 0xff00) | ((val
& 0x03fc) >> 2);
3573 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
);
3574 return ((val
> 0x03fc)
3575 ? This::STATUS_OVERFLOW
3576 : This::STATUS_OKAY
);
3579 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3580 static inline typename
This::Status
3581 thm_pc12(unsigned char* view
,
3582 const Sized_relobj_file
<32, big_endian
>* object
,
3583 const Symbol_value
<32>* psymval
,
3584 Arm_address address
)
3586 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3587 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Reltype
;
3588 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3589 Reltype insn
= (elfcpp::Swap
<16, big_endian
>::readval(wv
) << 16)
3590 | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3591 // Determine a sign for the addend (positive if the U bit is 1).
3592 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3593 int32_t addend
= (insn
& 0xfff);
3594 // Apply a sign to the added.
3597 int32_t x
= (psymval
->value(object
, addend
) - (address
& 0xfffffffc));
3598 Reltype val
= abs(x
);
3599 // Mask out and apply the value and the U bit.
3600 insn
= (insn
& 0xff7ff000) | (val
& 0xfff);
3601 // Set the U bit according to whether the value to go in the
3602 // place is positive.
3606 elfcpp::Swap
<16, big_endian
>::writeval(wv
, insn
>> 16);
3607 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, insn
& 0xffff);
3608 return ((val
> 0xfff) ?
3609 This::STATUS_OVERFLOW
: This::STATUS_OKAY
);
3613 static inline typename
This::Status
3614 v4bx(const Relocate_info
<32, big_endian
>* relinfo
,
3615 unsigned char* view
,
3616 const Arm_relobj
<big_endian
>* object
,
3617 const Arm_address address
,
3618 const bool is_interworking
)
3621 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3622 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3623 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3625 // Ensure that we have a BX instruction.
3626 gold_assert((val
& 0x0ffffff0) == 0x012fff10);
3627 const uint32_t reg
= (val
& 0xf);
3628 if (is_interworking
&& reg
!= 0xf)
3630 Stub_table
<big_endian
>* stub_table
=
3631 object
->stub_table(relinfo
->data_shndx
);
3632 gold_assert(stub_table
!= NULL
);
3634 Arm_v4bx_stub
* stub
= stub_table
->find_arm_v4bx_stub(reg
);
3635 gold_assert(stub
!= NULL
);
3637 int32_t veneer_address
=
3638 stub_table
->address() + stub
->offset() - 8 - address
;
3639 gold_assert((veneer_address
<= ARM_MAX_FWD_BRANCH_OFFSET
)
3640 && (veneer_address
>= ARM_MAX_BWD_BRANCH_OFFSET
));
3641 // Replace with a branch to veneer (B <addr>)
3642 val
= (val
& 0xf0000000) | 0x0a000000
3643 | ((veneer_address
>> 2) & 0x00ffffff);
3647 // Preserve Rm (lowest four bits) and the condition code
3648 // (highest four bits). Other bits encode MOV PC,Rm.
3649 val
= (val
& 0xf000000f) | 0x01a0f000;
3651 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3652 return This::STATUS_OKAY
;
3655 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3656 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3657 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3658 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3659 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3660 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3661 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3662 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3663 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3664 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3665 static inline typename
This::Status
3666 arm_grp_alu(unsigned char* view
,
3667 const Sized_relobj_file
<32, big_endian
>* object
,
3668 const Symbol_value
<32>* psymval
,
3670 Arm_address address
,
3671 Arm_address thumb_bit
,
3672 bool check_overflow
)
3674 gold_assert(group
>= 0 && group
< 3);
3675 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3676 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3677 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3679 // ALU group relocations are allowed only for the ADD/SUB instructions.
3680 // (0x00800000 - ADD, 0x00400000 - SUB)
3681 const Valtype opcode
= insn
& 0x01e00000;
3682 if (opcode
!= 0x00800000 && opcode
!= 0x00400000)
3683 return This::STATUS_BAD_RELOC
;
3685 // Determine a sign for the addend.
3686 const int sign
= (opcode
== 0x00800000) ? 1 : -1;
3687 // shifter = rotate_imm * 2
3688 const uint32_t shifter
= (insn
& 0xf00) >> 7;
3689 // Initial addend value.
3690 int32_t addend
= insn
& 0xff;
3691 // Rotate addend right by shifter.
3692 addend
= (addend
>> shifter
) | (addend
<< (32 - shifter
));
3693 // Apply a sign to the added.
3696 int32_t x
= ((psymval
->value(object
, addend
) | thumb_bit
) - address
);
3697 Valtype gn
= Arm_relocate_functions::calc_grp_gn(abs(x
), group
);
3698 // Check for overflow if required
3700 && (Arm_relocate_functions::calc_grp_residual(abs(x
), group
) != 0))
3701 return This::STATUS_OVERFLOW
;
3703 // Mask out the value and the ADD/SUB part of the opcode; take care
3704 // not to destroy the S bit.
3706 // Set the opcode according to whether the value to go in the
3707 // place is negative.
3708 insn
|= ((x
< 0) ? 0x00400000 : 0x00800000);
3709 // Encode the offset (encoded Gn).
3712 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3713 return This::STATUS_OKAY
;
3716 // R_ARM_LDR_PC_G0: S + A - P
3717 // R_ARM_LDR_PC_G1: S + A - P
3718 // R_ARM_LDR_PC_G2: S + A - P
3719 // R_ARM_LDR_SB_G0: S + A - B(S)
3720 // R_ARM_LDR_SB_G1: S + A - B(S)
3721 // R_ARM_LDR_SB_G2: S + A - B(S)
3722 static inline typename
This::Status
3723 arm_grp_ldr(unsigned char* view
,
3724 const Sized_relobj_file
<32, big_endian
>* object
,
3725 const Symbol_value
<32>* psymval
,
3727 Arm_address address
)
3729 gold_assert(group
>= 0 && group
< 3);
3730 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3731 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3732 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3734 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3735 int32_t addend
= (insn
& 0xfff) * sign
;
3736 int32_t x
= (psymval
->value(object
, addend
) - address
);
3737 // Calculate the relevant G(n-1) value to obtain this stage residual.
3739 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3740 if (residual
>= 0x1000)
3741 return This::STATUS_OVERFLOW
;
3743 // Mask out the value and U bit.
3745 // Set the U bit for non-negative values.
3750 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3751 return This::STATUS_OKAY
;
3754 // R_ARM_LDRS_PC_G0: S + A - P
3755 // R_ARM_LDRS_PC_G1: S + A - P
3756 // R_ARM_LDRS_PC_G2: S + A - P
3757 // R_ARM_LDRS_SB_G0: S + A - B(S)
3758 // R_ARM_LDRS_SB_G1: S + A - B(S)
3759 // R_ARM_LDRS_SB_G2: S + A - B(S)
3760 static inline typename
This::Status
3761 arm_grp_ldrs(unsigned char* view
,
3762 const Sized_relobj_file
<32, big_endian
>* object
,
3763 const Symbol_value
<32>* psymval
,
3765 Arm_address address
)
3767 gold_assert(group
>= 0 && group
< 3);
3768 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3769 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3770 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3772 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3773 int32_t addend
= (((insn
& 0xf00) >> 4) + (insn
& 0xf)) * sign
;
3774 int32_t x
= (psymval
->value(object
, addend
) - address
);
3775 // Calculate the relevant G(n-1) value to obtain this stage residual.
3777 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3778 if (residual
>= 0x100)
3779 return This::STATUS_OVERFLOW
;
3781 // Mask out the value and U bit.
3783 // Set the U bit for non-negative values.
3786 insn
|= ((residual
& 0xf0) << 4) | (residual
& 0xf);
3788 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3789 return This::STATUS_OKAY
;
3792 // R_ARM_LDC_PC_G0: S + A - P
3793 // R_ARM_LDC_PC_G1: S + A - P
3794 // R_ARM_LDC_PC_G2: S + A - P
3795 // R_ARM_LDC_SB_G0: S + A - B(S)
3796 // R_ARM_LDC_SB_G1: S + A - B(S)
3797 // R_ARM_LDC_SB_G2: S + A - B(S)
3798 static inline typename
This::Status
3799 arm_grp_ldc(unsigned char* view
,
3800 const Sized_relobj_file
<32, big_endian
>* object
,
3801 const Symbol_value
<32>* psymval
,
3803 Arm_address address
)
3805 gold_assert(group
>= 0 && group
< 3);
3806 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3807 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3808 Valtype insn
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3810 const int sign
= (insn
& 0x00800000) ? 1 : -1;
3811 int32_t addend
= ((insn
& 0xff) << 2) * sign
;
3812 int32_t x
= (psymval
->value(object
, addend
) - address
);
3813 // Calculate the relevant G(n-1) value to obtain this stage residual.
3815 Arm_relocate_functions::calc_grp_residual(abs(x
), group
- 1);
3816 if ((residual
& 0x3) != 0 || residual
>= 0x400)
3817 return This::STATUS_OVERFLOW
;
3819 // Mask out the value and U bit.
3821 // Set the U bit for non-negative values.
3824 insn
|= (residual
>> 2);
3826 elfcpp::Swap
<32, big_endian
>::writeval(wv
, insn
);
3827 return This::STATUS_OKAY
;
3831 // Relocate ARM long branches. This handles relocation types
3832 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3833 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3834 // undefined and we do not use PLT in this relocation. In such a case,
3835 // the branch is converted into an NOP.
3837 template<bool big_endian
>
3838 typename Arm_relocate_functions
<big_endian
>::Status
3839 Arm_relocate_functions
<big_endian
>::arm_branch_common(
3840 unsigned int r_type
,
3841 const Relocate_info
<32, big_endian
>* relinfo
,
3842 unsigned char* view
,
3843 const Sized_symbol
<32>* gsym
,
3844 const Arm_relobj
<big_endian
>* object
,
3846 const Symbol_value
<32>* psymval
,
3847 Arm_address address
,
3848 Arm_address thumb_bit
,
3849 bool is_weakly_undefined_without_plt
)
3851 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
3852 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3853 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
3855 bool insn_is_b
= (((val
>> 28) & 0xf) <= 0xe)
3856 && ((val
& 0x0f000000UL
) == 0x0a000000UL
);
3857 bool insn_is_uncond_bl
= (val
& 0xff000000UL
) == 0xeb000000UL
;
3858 bool insn_is_cond_bl
= (((val
>> 28) & 0xf) < 0xe)
3859 && ((val
& 0x0f000000UL
) == 0x0b000000UL
);
3860 bool insn_is_blx
= (val
& 0xfe000000UL
) == 0xfa000000UL
;
3861 bool insn_is_any_branch
= (val
& 0x0e000000UL
) == 0x0a000000UL
;
3863 // Check that the instruction is valid.
3864 if (r_type
== elfcpp::R_ARM_CALL
)
3866 if (!insn_is_uncond_bl
&& !insn_is_blx
)
3867 return This::STATUS_BAD_RELOC
;
3869 else if (r_type
== elfcpp::R_ARM_JUMP24
)
3871 if (!insn_is_b
&& !insn_is_cond_bl
)
3872 return This::STATUS_BAD_RELOC
;
3874 else if (r_type
== elfcpp::R_ARM_PLT32
)
3876 if (!insn_is_any_branch
)
3877 return This::STATUS_BAD_RELOC
;
3879 else if (r_type
== elfcpp::R_ARM_XPC25
)
3881 // FIXME: AAELF document IH0044C does not say much about it other
3882 // than it being obsolete.
3883 if (!insn_is_any_branch
)
3884 return This::STATUS_BAD_RELOC
;
3889 // A branch to an undefined weak symbol is turned into a jump to
3890 // the next instruction unless a PLT entry will be created.
3891 // Do the same for local undefined symbols.
3892 // The jump to the next instruction is optimized as a NOP depending
3893 // on the architecture.
3894 const Target_arm
<big_endian
>* arm_target
=
3895 Target_arm
<big_endian
>::default_target();
3896 if (is_weakly_undefined_without_plt
)
3898 gold_assert(!parameters
->options().relocatable());
3899 Valtype cond
= val
& 0xf0000000U
;
3900 if (arm_target
->may_use_arm_nop())
3901 val
= cond
| 0x0320f000;
3903 val
= cond
| 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3904 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3905 return This::STATUS_OKAY
;
3908 Valtype addend
= Bits
<26>::sign_extend32(val
<< 2);
3909 Valtype branch_target
= psymval
->value(object
, addend
);
3910 int32_t branch_offset
= branch_target
- address
;
3912 // We need a stub if the branch offset is too large or if we need
3914 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
3915 Reloc_stub
* stub
= NULL
;
3917 if (!parameters
->options().relocatable()
3918 && (Bits
<26>::has_overflow32(branch_offset
)
3919 || ((thumb_bit
!= 0)
3920 && !(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
))))
3922 Valtype unadjusted_branch_target
= psymval
->value(object
, 0);
3924 Stub_type stub_type
=
3925 Reloc_stub::stub_type_for_reloc(r_type
, address
,
3926 unadjusted_branch_target
,
3928 if (stub_type
!= arm_stub_none
)
3930 Stub_table
<big_endian
>* stub_table
=
3931 object
->stub_table(relinfo
->data_shndx
);
3932 gold_assert(stub_table
!= NULL
);
3934 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
3935 stub
= stub_table
->find_reloc_stub(stub_key
);
3936 gold_assert(stub
!= NULL
);
3937 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3938 branch_target
= stub_table
->address() + stub
->offset() + addend
;
3939 branch_offset
= branch_target
- address
;
3940 gold_assert(!Bits
<26>::has_overflow32(branch_offset
));
3944 // At this point, if we still need to switch mode, the instruction
3945 // must either be a BLX or a BL that can be converted to a BLX.
3949 gold_assert(may_use_blx
&& r_type
== elfcpp::R_ARM_CALL
);
3950 val
= (val
& 0xffffff) | 0xfa000000 | ((branch_offset
& 2) << 23);
3953 val
= Bits
<32>::bit_select32(val
, (branch_offset
>> 2), 0xffffffUL
);
3954 elfcpp::Swap
<32, big_endian
>::writeval(wv
, val
);
3955 return (Bits
<26>::has_overflow32(branch_offset
)
3956 ? This::STATUS_OVERFLOW
3957 : This::STATUS_OKAY
);
3960 // Relocate THUMB long branches. This handles relocation types
3961 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3962 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3963 // undefined and we do not use PLT in this relocation. In such a case,
3964 // the branch is converted into an NOP.
3966 template<bool big_endian
>
3967 typename Arm_relocate_functions
<big_endian
>::Status
3968 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
3969 unsigned int r_type
,
3970 const Relocate_info
<32, big_endian
>* relinfo
,
3971 unsigned char* view
,
3972 const Sized_symbol
<32>* gsym
,
3973 const Arm_relobj
<big_endian
>* object
,
3975 const Symbol_value
<32>* psymval
,
3976 Arm_address address
,
3977 Arm_address thumb_bit
,
3978 bool is_weakly_undefined_without_plt
)
3980 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
3981 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
3982 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
3983 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
3985 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
3987 bool is_bl_insn
= (lower_insn
& 0x1000U
) == 0x1000U
;
3988 bool is_blx_insn
= (lower_insn
& 0x1000U
) == 0x0000U
;
3990 // Check that the instruction is valid.
3991 if (r_type
== elfcpp::R_ARM_THM_CALL
)
3993 if (!is_bl_insn
&& !is_blx_insn
)
3994 return This::STATUS_BAD_RELOC
;
3996 else if (r_type
== elfcpp::R_ARM_THM_JUMP24
)
3998 // This cannot be a BLX.
4000 return This::STATUS_BAD_RELOC
;
4002 else if (r_type
== elfcpp::R_ARM_THM_XPC22
)
4004 // Check for Thumb to Thumb call.
4006 return This::STATUS_BAD_RELOC
;
4009 gold_warning(_("%s: Thumb BLX instruction targets "
4010 "thumb function '%s'."),
4011 object
->name().c_str(),
4012 (gsym
? gsym
->name() : "(local)"));
4013 // Convert BLX to BL.
4014 lower_insn
|= 0x1000U
;
4020 // A branch to an undefined weak symbol is turned into a jump to
4021 // the next instruction unless a PLT entry will be created.
4022 // The jump to the next instruction is optimized as a NOP.W for
4023 // Thumb-2 enabled architectures.
4024 const Target_arm
<big_endian
>* arm_target
=
4025 Target_arm
<big_endian
>::default_target();
4026 if (is_weakly_undefined_without_plt
)
4028 gold_assert(!parameters
->options().relocatable());
4029 if (arm_target
->may_use_thumb2_nop())
4031 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xf3af);
4032 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0x8000);
4036 elfcpp::Swap
<16, big_endian
>::writeval(wv
, 0xe000);
4037 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, 0xbf00);
4039 return This::STATUS_OKAY
;
4042 int32_t addend
= This::thumb32_branch_offset(upper_insn
, lower_insn
);
4043 Arm_address branch_target
= psymval
->value(object
, addend
);
4045 // For BLX, bit 1 of target address comes from bit 1 of base address.
4046 bool may_use_blx
= arm_target
->may_use_v5t_interworking();
4047 if (thumb_bit
== 0 && may_use_blx
)
4048 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4050 int32_t branch_offset
= branch_target
- address
;
4052 // We need a stub if the branch offset is too large or if we need
4054 bool thumb2
= arm_target
->using_thumb2();
4055 if (!parameters
->options().relocatable()
4056 && ((!thumb2
&& Bits
<23>::has_overflow32(branch_offset
))
4057 || (thumb2
&& Bits
<25>::has_overflow32(branch_offset
))
4058 || ((thumb_bit
== 0)
4059 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4060 || r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4062 Arm_address unadjusted_branch_target
= psymval
->value(object
, 0);
4064 Stub_type stub_type
=
4065 Reloc_stub::stub_type_for_reloc(r_type
, address
,
4066 unadjusted_branch_target
,
4069 if (stub_type
!= arm_stub_none
)
4071 Stub_table
<big_endian
>* stub_table
=
4072 object
->stub_table(relinfo
->data_shndx
);
4073 gold_assert(stub_table
!= NULL
);
4075 Reloc_stub::Key
stub_key(stub_type
, gsym
, object
, r_sym
, addend
);
4076 Reloc_stub
* stub
= stub_table
->find_reloc_stub(stub_key
);
4077 gold_assert(stub
!= NULL
);
4078 thumb_bit
= stub
->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4079 branch_target
= stub_table
->address() + stub
->offset() + addend
;
4080 if (thumb_bit
== 0 && may_use_blx
)
4081 branch_target
= Bits
<32>::bit_select32(branch_target
, address
, 0x2);
4082 branch_offset
= branch_target
- address
;
4086 // At this point, if we still need to switch mode, the instruction
4087 // must either be a BLX or a BL that can be converted to a BLX.
4090 gold_assert(may_use_blx
4091 && (r_type
== elfcpp::R_ARM_THM_CALL
4092 || r_type
== elfcpp::R_ARM_THM_XPC22
));
4093 // Make sure this is a BLX.
4094 lower_insn
&= ~0x1000U
;
4098 // Make sure this is a BL.
4099 lower_insn
|= 0x1000U
;
4102 // For a BLX instruction, make sure that the relocation is rounded up
4103 // to a word boundary. This follows the semantics of the instruction
4104 // which specifies that bit 1 of the target address will come from bit
4105 // 1 of the base address.
4106 if ((lower_insn
& 0x5000U
) == 0x4000U
)
4107 gold_assert((branch_offset
& 3) == 0);
4109 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4110 // We use the Thumb-2 encoding, which is safe even if dealing with
4111 // a Thumb-1 instruction by virtue of our overflow check above. */
4112 upper_insn
= This::thumb32_branch_upper(upper_insn
, branch_offset
);
4113 lower_insn
= This::thumb32_branch_lower(lower_insn
, branch_offset
);
4115 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4116 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4118 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
4121 ? Bits
<25>::has_overflow32(branch_offset
)
4122 : Bits
<23>::has_overflow32(branch_offset
))
4123 ? This::STATUS_OVERFLOW
4124 : This::STATUS_OKAY
);
4127 // Relocate THUMB-2 long conditional branches.
4128 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4129 // undefined and we do not use PLT in this relocation. In such a case,
4130 // the branch is converted into an NOP.
4132 template<bool big_endian
>
4133 typename Arm_relocate_functions
<big_endian
>::Status
4134 Arm_relocate_functions
<big_endian
>::thm_jump19(
4135 unsigned char* view
,
4136 const Arm_relobj
<big_endian
>* object
,
4137 const Symbol_value
<32>* psymval
,
4138 Arm_address address
,
4139 Arm_address thumb_bit
)
4141 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
4142 Valtype
* wv
= reinterpret_cast<Valtype
*>(view
);
4143 uint32_t upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
4144 uint32_t lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
4145 int32_t addend
= This::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
4147 Arm_address branch_target
= psymval
->value(object
, addend
);
4148 int32_t branch_offset
= branch_target
- address
;
4150 // ??? Should handle interworking? GCC might someday try to
4151 // use this for tail calls.
4152 // FIXME: We do support thumb entry to PLT yet.
4155 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4156 return This::STATUS_BAD_RELOC
;
4159 // Put RELOCATION back into the insn.
4160 upper_insn
= This::thumb32_cond_branch_upper(upper_insn
, branch_offset
);
4161 lower_insn
= This::thumb32_cond_branch_lower(lower_insn
, branch_offset
);
4163 // Put the relocated value back in the object file:
4164 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
4165 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
4167 return (Bits
<21>::has_overflow32(branch_offset
)
4168 ? This::STATUS_OVERFLOW
4169 : This::STATUS_OKAY
);
4172 // Get the GOT section, creating it if necessary.
4174 template<bool big_endian
>
4175 Arm_output_data_got
<big_endian
>*
4176 Target_arm
<big_endian
>::got_section(Symbol_table
* symtab
, Layout
* layout
)
4178 if (this->got_
== NULL
)
4180 gold_assert(symtab
!= NULL
&& layout
!= NULL
);
4182 this->got_
= new Arm_output_data_got
<big_endian
>(symtab
, layout
);
4184 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4185 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4186 this->got_
, ORDER_DATA
, false);
4188 // The old GNU linker creates a .got.plt section. We just
4189 // create another set of data in the .got section. Note that we
4190 // always create a PLT if we create a GOT, although the PLT
4192 this->got_plt_
= new Output_data_space(4, "** GOT PLT");
4193 layout
->add_output_section_data(".got", elfcpp::SHT_PROGBITS
,
4194 (elfcpp::SHF_ALLOC
| elfcpp::SHF_WRITE
),
4195 this->got_plt_
, ORDER_DATA
, false);
4197 // The first three entries are reserved.
4198 this->got_plt_
->set_current_data_size(3 * 4);
4200 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4201 symtab
->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL
,
4202 Symbol_table::PREDEFINED
,
4204 0, 0, elfcpp::STT_OBJECT
,
4206 elfcpp::STV_HIDDEN
, 0,
4212 // Get the dynamic reloc section, creating it if necessary.
4214 template<bool big_endian
>
4215 typename Target_arm
<big_endian
>::Reloc_section
*
4216 Target_arm
<big_endian
>::rel_dyn_section(Layout
* layout
)
4218 if (this->rel_dyn_
== NULL
)
4220 gold_assert(layout
!= NULL
);
4221 this->rel_dyn_
= new Reloc_section(parameters
->options().combreloc());
4222 layout
->add_output_section_data(".rel.dyn", elfcpp::SHT_REL
,
4223 elfcpp::SHF_ALLOC
, this->rel_dyn_
,
4224 ORDER_DYNAMIC_RELOCS
, false);
4226 return this->rel_dyn_
;
4229 // Insn_template methods.
4231 // Return byte size of an instruction template.
4234 Insn_template::size() const
4236 switch (this->type())
4239 case THUMB16_SPECIAL_TYPE
:
4250 // Return alignment of an instruction template.
4253 Insn_template::alignment() const
4255 switch (this->type())
4258 case THUMB16_SPECIAL_TYPE
:
4269 // Stub_template methods.
4271 Stub_template::Stub_template(
4272 Stub_type type
, const Insn_template
* insns
,
4274 : type_(type
), insns_(insns
), insn_count_(insn_count
), alignment_(1),
4275 entry_in_thumb_mode_(false), relocs_()
4279 // Compute byte size and alignment of stub template.
4280 for (size_t i
= 0; i
< insn_count
; i
++)
4282 unsigned insn_alignment
= insns
[i
].alignment();
4283 size_t insn_size
= insns
[i
].size();
4284 gold_assert((offset
& (insn_alignment
- 1)) == 0);
4285 this->alignment_
= std::max(this->alignment_
, insn_alignment
);
4286 switch (insns
[i
].type())
4288 case Insn_template::THUMB16_TYPE
:
4289 case Insn_template::THUMB16_SPECIAL_TYPE
:
4291 this->entry_in_thumb_mode_
= true;
4294 case Insn_template::THUMB32_TYPE
:
4295 if (insns
[i
].r_type() != elfcpp::R_ARM_NONE
)
4296 this->relocs_
.push_back(Reloc(i
, offset
));
4298 this->entry_in_thumb_mode_
= true;
4301 case Insn_template::ARM_TYPE
:
4302 // Handle cases where the target is encoded within the
4304 if (insns
[i
].r_type() == elfcpp::R_ARM_JUMP24
)
4305 this->relocs_
.push_back(Reloc(i
, offset
));
4308 case Insn_template::DATA_TYPE
:
4309 // Entry point cannot be data.
4310 gold_assert(i
!= 0);
4311 this->relocs_
.push_back(Reloc(i
, offset
));
4317 offset
+= insn_size
;
4319 this->size_
= offset
;
4324 // Template to implement do_write for a specific target endianness.
4326 template<bool big_endian
>
4328 Stub::do_fixed_endian_write(unsigned char* view
, section_size_type view_size
)
4330 const Stub_template
* stub_template
= this->stub_template();
4331 const Insn_template
* insns
= stub_template
->insns();
4333 // FIXME: We do not handle BE8 encoding yet.
4334 unsigned char* pov
= view
;
4335 for (size_t i
= 0; i
< stub_template
->insn_count(); i
++)
4337 switch (insns
[i
].type())
4339 case Insn_template::THUMB16_TYPE
:
4340 elfcpp::Swap
<16, big_endian
>::writeval(pov
, insns
[i
].data() & 0xffff);
4342 case Insn_template::THUMB16_SPECIAL_TYPE
:
4343 elfcpp::Swap
<16, big_endian
>::writeval(
4345 this->thumb16_special(i
));
4347 case Insn_template::THUMB32_TYPE
:
4349 uint32_t hi
= (insns
[i
].data() >> 16) & 0xffff;
4350 uint32_t lo
= insns
[i
].data() & 0xffff;
4351 elfcpp::Swap
<16, big_endian
>::writeval(pov
, hi
);
4352 elfcpp::Swap
<16, big_endian
>::writeval(pov
+ 2, lo
);
4355 case Insn_template::ARM_TYPE
:
4356 case Insn_template::DATA_TYPE
:
4357 elfcpp::Swap
<32, big_endian
>::writeval(pov
, insns
[i
].data());
4362 pov
+= insns
[i
].size();
4364 gold_assert(static_cast<section_size_type
>(pov
- view
) == view_size
);
4367 // Reloc_stub::Key methods.
4369 // Dump a Key as a string for debugging.
4372 Reloc_stub::Key::name() const
4374 if (this->r_sym_
== invalid_index
)
4376 // Global symbol key name
4377 // <stub-type>:<symbol name>:<addend>.
4378 const std::string sym_name
= this->u_
.symbol
->name();
4379 // We need to print two hex number and two colons. So just add 100 bytes
4380 // to the symbol name size.
4381 size_t len
= sym_name
.size() + 100;
4382 char* buffer
= new char[len
];
4383 int c
= snprintf(buffer
, len
, "%d:%s:%x", this->stub_type_
,
4384 sym_name
.c_str(), this->addend_
);
4385 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4387 return std::string(buffer
);
4391 // local symbol key name
4392 // <stub-type>:<object>:<r_sym>:<addend>.
4393 const size_t len
= 200;
4395 int c
= snprintf(buffer
, len
, "%d:%p:%u:%x", this->stub_type_
,
4396 this->u_
.relobj
, this->r_sym_
, this->addend_
);
4397 gold_assert(c
> 0 && c
< static_cast<int>(len
));
4398 return std::string(buffer
);
4402 // Reloc_stub methods.
4404 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4405 // LOCATION to DESTINATION.
4406 // This code is based on the arm_type_of_stub function in
4407 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4411 Reloc_stub::stub_type_for_reloc(
4412 unsigned int r_type
,
4413 Arm_address location
,
4414 Arm_address destination
,
4415 bool target_is_thumb
)
4417 Stub_type stub_type
= arm_stub_none
;
4419 // This is a bit ugly but we want to avoid using a templated class for
4420 // big and little endianities.
4422 bool should_force_pic_veneer
;
4425 if (parameters
->target().is_big_endian())
4427 const Target_arm
<true>* big_endian_target
=
4428 Target_arm
<true>::default_target();
4429 may_use_blx
= big_endian_target
->may_use_v5t_interworking();
4430 should_force_pic_veneer
= big_endian_target
->should_force_pic_veneer();
4431 thumb2
= big_endian_target
->using_thumb2();
4432 thumb_only
= big_endian_target
->using_thumb_only();
4436 const Target_arm
<false>* little_endian_target
=
4437 Target_arm
<false>::default_target();
4438 may_use_blx
= little_endian_target
->may_use_v5t_interworking();
4439 should_force_pic_veneer
= little_endian_target
->should_force_pic_veneer();
4440 thumb2
= little_endian_target
->using_thumb2();
4441 thumb_only
= little_endian_target
->using_thumb_only();
4444 int64_t branch_offset
;
4445 if (r_type
== elfcpp::R_ARM_THM_CALL
|| r_type
== elfcpp::R_ARM_THM_JUMP24
)
4447 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4448 // base address (instruction address + 4).
4449 if ((r_type
== elfcpp::R_ARM_THM_CALL
) && may_use_blx
&& !target_is_thumb
)
4450 destination
= Bits
<32>::bit_select32(destination
, location
, 0x2);
4451 branch_offset
= static_cast<int64_t>(destination
) - location
;
4453 // Handle cases where:
4454 // - this call goes too far (different Thumb/Thumb2 max
4456 // - it's a Thumb->Arm call and blx is not available, or it's a
4457 // Thumb->Arm branch (not bl). A stub is needed in this case.
4459 && (branch_offset
> THM_MAX_FWD_BRANCH_OFFSET
4460 || (branch_offset
< THM_MAX_BWD_BRANCH_OFFSET
)))
4462 && (branch_offset
> THM2_MAX_FWD_BRANCH_OFFSET
4463 || (branch_offset
< THM2_MAX_BWD_BRANCH_OFFSET
)))
4464 || ((!target_is_thumb
)
4465 && (((r_type
== elfcpp::R_ARM_THM_CALL
) && !may_use_blx
)
4466 || (r_type
== elfcpp::R_ARM_THM_JUMP24
))))
4468 if (target_is_thumb
)
4473 stub_type
= (parameters
->options().shared()
4474 || should_force_pic_veneer
)
4477 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4478 // V5T and above. Stub starts with ARM code, so
4479 // we must be able to switch mode before
4480 // reaching it, which is only possible for 'bl'
4481 // (ie R_ARM_THM_CALL relocation).
4482 ? arm_stub_long_branch_any_thumb_pic
4483 // On V4T, use Thumb code only.
4484 : arm_stub_long_branch_v4t_thumb_thumb_pic
)
4488 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4489 ? arm_stub_long_branch_any_any
// V5T and above.
4490 : arm_stub_long_branch_v4t_thumb_thumb
); // V4T.
4494 stub_type
= (parameters
->options().shared()
4495 || should_force_pic_veneer
)
4496 ? arm_stub_long_branch_thumb_only_pic
// PIC stub.
4497 : arm_stub_long_branch_thumb_only
; // non-PIC stub.
4504 // FIXME: We should check that the input section is from an
4505 // object that has interwork enabled.
4507 stub_type
= (parameters
->options().shared()
4508 || should_force_pic_veneer
)
4511 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4512 ? arm_stub_long_branch_any_arm_pic
// V5T and above.
4513 : arm_stub_long_branch_v4t_thumb_arm_pic
) // V4T.
4517 && (r_type
== elfcpp::R_ARM_THM_CALL
))
4518 ? arm_stub_long_branch_any_any
// V5T and above.
4519 : arm_stub_long_branch_v4t_thumb_arm
); // V4T.
4521 // Handle v4t short branches.
4522 if ((stub_type
== arm_stub_long_branch_v4t_thumb_arm
)
4523 && (branch_offset
<= THM_MAX_FWD_BRANCH_OFFSET
)
4524 && (branch_offset
>= THM_MAX_BWD_BRANCH_OFFSET
))
4525 stub_type
= arm_stub_short_branch_v4t_thumb_arm
;
4529 else if (r_type
== elfcpp::R_ARM_CALL
4530 || r_type
== elfcpp::R_ARM_JUMP24
4531 || r_type
== elfcpp::R_ARM_PLT32
)
4533 branch_offset
= static_cast<int64_t>(destination
) - location
;
4534 if (target_is_thumb
)
4538 // FIXME: We should check that the input section is from an
4539 // object that has interwork enabled.
4541 // We have an extra 2-bytes reach because of
4542 // the mode change (bit 24 (H) of BLX encoding).
4543 if (branch_offset
> (ARM_MAX_FWD_BRANCH_OFFSET
+ 2)
4544 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
)
4545 || ((r_type
== elfcpp::R_ARM_CALL
) && !may_use_blx
)
4546 || (r_type
== elfcpp::R_ARM_JUMP24
)
4547 || (r_type
== elfcpp::R_ARM_PLT32
))
4549 stub_type
= (parameters
->options().shared()
4550 || should_force_pic_veneer
)
4553 ? arm_stub_long_branch_any_thumb_pic
// V5T and above.
4554 : arm_stub_long_branch_v4t_arm_thumb_pic
) // V4T stub.
4558 ? arm_stub_long_branch_any_any
// V5T and above.
4559 : arm_stub_long_branch_v4t_arm_thumb
); // V4T.
4565 if (branch_offset
> ARM_MAX_FWD_BRANCH_OFFSET
4566 || (branch_offset
< ARM_MAX_BWD_BRANCH_OFFSET
))
4568 stub_type
= (parameters
->options().shared()
4569 || should_force_pic_veneer
)
4570 ? arm_stub_long_branch_any_arm_pic
// PIC stubs.
4571 : arm_stub_long_branch_any_any
; /// non-PIC.
4579 // Cortex_a8_stub methods.
4581 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4582 // I is the position of the instruction template in the stub template.
4585 Cortex_a8_stub::do_thumb16_special(size_t i
)
4587 // The only use of this is to copy condition code from a conditional
4588 // branch being worked around to the corresponding conditional branch in
4590 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4592 uint16_t data
= this->stub_template()->insns()[i
].data();
4593 gold_assert((data
& 0xff00U
) == 0xd000U
);
4594 data
|= ((this->original_insn_
>> 22) & 0xf) << 8;
4598 // Stub_factory methods.
4600 Stub_factory::Stub_factory()
4602 // The instruction template sequences are declared as static
4603 // objects and initialized first time the constructor runs.
4605 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4606 // to reach the stub if necessary.
4607 static const Insn_template elf32_arm_stub_long_branch_any_any
[] =
4609 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4610 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4611 // dcd R_ARM_ABS32(X)
4614 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4616 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb
[] =
4618 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4619 Insn_template::arm_insn(0xe12fff1c), // bx ip
4620 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4621 // dcd R_ARM_ABS32(X)
4624 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4625 static const Insn_template elf32_arm_stub_long_branch_thumb_only
[] =
4627 Insn_template::thumb16_insn(0xb401), // push {r0}
4628 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4629 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4630 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4631 Insn_template::thumb16_insn(0x4760), // bx ip
4632 Insn_template::thumb16_insn(0xbf00), // nop
4633 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4634 // dcd R_ARM_ABS32(X)
4637 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4639 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb
[] =
4641 Insn_template::thumb16_insn(0x4778), // bx pc
4642 Insn_template::thumb16_insn(0x46c0), // nop
4643 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4644 Insn_template::arm_insn(0xe12fff1c), // bx ip
4645 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4646 // dcd R_ARM_ABS32(X)
4649 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4651 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm
[] =
4653 Insn_template::thumb16_insn(0x4778), // bx pc
4654 Insn_template::thumb16_insn(0x46c0), // nop
4655 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4656 Insn_template::data_word(0, elfcpp::R_ARM_ABS32
, 0),
4657 // dcd R_ARM_ABS32(X)
4660 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4661 // one, when the destination is close enough.
4662 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm
[] =
4664 Insn_template::thumb16_insn(0x4778), // bx pc
4665 Insn_template::thumb16_insn(0x46c0), // nop
4666 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4669 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4670 // blx to reach the stub if necessary.
4671 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic
[] =
4673 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4674 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4675 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4676 // dcd R_ARM_REL32(X-4)
4679 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4680 // blx to reach the stub if necessary. We can not add into pc;
4681 // it is not guaranteed to mode switch (different in ARMv6 and
4683 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic
[] =
4685 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4686 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4687 Insn_template::arm_insn(0xe12fff1c), // bx ip
4688 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4689 // dcd R_ARM_REL32(X)
4692 // V4T ARM -> ARM long branch stub, PIC.
4693 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic
[] =
4695 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4696 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4697 Insn_template::arm_insn(0xe12fff1c), // bx ip
4698 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4699 // dcd R_ARM_REL32(X)
4702 // V4T Thumb -> ARM long branch stub, PIC.
4703 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic
[] =
4705 Insn_template::thumb16_insn(0x4778), // bx pc
4706 Insn_template::thumb16_insn(0x46c0), // nop
4707 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4708 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4709 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, -4),
4710 // dcd R_ARM_REL32(X)
4713 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4715 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic
[] =
4717 Insn_template::thumb16_insn(0xb401), // push {r0}
4718 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4719 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4720 Insn_template::thumb16_insn(0x4484), // add ip, r0
4721 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4722 Insn_template::thumb16_insn(0x4760), // bx ip
4723 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 4),
4724 // dcd R_ARM_REL32(X)
4727 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4729 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic
[] =
4731 Insn_template::thumb16_insn(0x4778), // bx pc
4732 Insn_template::thumb16_insn(0x46c0), // nop
4733 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4734 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4735 Insn_template::arm_insn(0xe12fff1c), // bx ip
4736 Insn_template::data_word(0, elfcpp::R_ARM_REL32
, 0),
4737 // dcd R_ARM_REL32(X)
4740 // Cortex-A8 erratum-workaround stubs.
4742 // Stub used for conditional branches (which may be beyond +/-1MB away,
4743 // so we can't use a conditional branch to reach this stub).
4750 static const Insn_template elf32_arm_stub_a8_veneer_b_cond
[] =
4752 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4753 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4754 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4758 // Stub used for b.w and bl.w instructions.
4760 static const Insn_template elf32_arm_stub_a8_veneer_b
[] =
4762 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4765 static const Insn_template elf32_arm_stub_a8_veneer_bl
[] =
4767 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4770 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4771 // instruction (which switches to ARM mode) to point to this stub. Jump to
4772 // the real destination using an ARM-mode branch.
4773 static const Insn_template elf32_arm_stub_a8_veneer_blx
[] =
4775 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4778 // Stub used to provide an interworking for R_ARM_V4BX relocation
4779 // (bx r[n] instruction).
4780 static const Insn_template elf32_arm_stub_v4_veneer_bx
[] =
4782 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4783 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4784 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4787 // Fill in the stub template look-up table. Stub templates are constructed
4788 // per instance of Stub_factory for fast look-up without locking
4789 // in a thread-enabled environment.
4791 this->stub_templates_
[arm_stub_none
] =
4792 new Stub_template(arm_stub_none
, NULL
, 0);
4794 #define DEF_STUB(x) \
4798 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4799 Stub_type type = arm_stub_##x; \
4800 this->stub_templates_[type] = \
4801 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4809 // Stub_table methods.
4811 // Remove all Cortex-A8 stub.
4813 template<bool big_endian
>
4815 Stub_table
<big_endian
>::remove_all_cortex_a8_stubs()
4817 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4818 p
!= this->cortex_a8_stubs_
.end();
4821 this->cortex_a8_stubs_
.clear();
4824 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4826 template<bool big_endian
>
4828 Stub_table
<big_endian
>::relocate_stub(
4830 const Relocate_info
<32, big_endian
>* relinfo
,
4831 Target_arm
<big_endian
>* arm_target
,
4832 Output_section
* output_section
,
4833 unsigned char* view
,
4834 Arm_address address
,
4835 section_size_type view_size
)
4837 const Stub_template
* stub_template
= stub
->stub_template();
4838 if (stub_template
->reloc_count() != 0)
4840 // Adjust view to cover the stub only.
4841 section_size_type offset
= stub
->offset();
4842 section_size_type stub_size
= stub_template
->size();
4843 gold_assert(offset
+ stub_size
<= view_size
);
4845 arm_target
->relocate_stub(stub
, relinfo
, output_section
, view
+ offset
,
4846 address
+ offset
, stub_size
);
4850 // Relocate all stubs in this stub table.
4852 template<bool big_endian
>
4854 Stub_table
<big_endian
>::relocate_stubs(
4855 const Relocate_info
<32, big_endian
>* relinfo
,
4856 Target_arm
<big_endian
>* arm_target
,
4857 Output_section
* output_section
,
4858 unsigned char* view
,
4859 Arm_address address
,
4860 section_size_type view_size
)
4862 // If we are passed a view bigger than the stub table's. we need to
4864 gold_assert(address
== this->address()
4866 == static_cast<section_size_type
>(this->data_size())));
4868 // Relocate all relocation stubs.
4869 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4870 p
!= this->reloc_stubs_
.end();
4872 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4873 address
, view_size
);
4875 // Relocate all Cortex-A8 stubs.
4876 for (Cortex_a8_stub_list::iterator p
= this->cortex_a8_stubs_
.begin();
4877 p
!= this->cortex_a8_stubs_
.end();
4879 this->relocate_stub(p
->second
, relinfo
, arm_target
, output_section
, view
,
4880 address
, view_size
);
4882 // Relocate all ARM V4BX stubs.
4883 for (Arm_v4bx_stub_list::iterator p
= this->arm_v4bx_stubs_
.begin();
4884 p
!= this->arm_v4bx_stubs_
.end();
4888 this->relocate_stub(*p
, relinfo
, arm_target
, output_section
, view
,
4889 address
, view_size
);
4893 // Write out the stubs to file.
4895 template<bool big_endian
>
4897 Stub_table
<big_endian
>::do_write(Output_file
* of
)
4899 off_t offset
= this->offset();
4900 const section_size_type oview_size
=
4901 convert_to_section_size_type(this->data_size());
4902 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
4904 // Write relocation stubs.
4905 for (typename
Reloc_stub_map::const_iterator p
= this->reloc_stubs_
.begin();
4906 p
!= this->reloc_stubs_
.end();
4909 Reloc_stub
* stub
= p
->second
;
4910 Arm_address address
= this->address() + stub
->offset();
4912 == align_address(address
,
4913 stub
->stub_template()->alignment()));
4914 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4918 // Write Cortex-A8 stubs.
4919 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4920 p
!= this->cortex_a8_stubs_
.end();
4923 Cortex_a8_stub
* stub
= p
->second
;
4924 Arm_address address
= this->address() + stub
->offset();
4926 == align_address(address
,
4927 stub
->stub_template()->alignment()));
4928 stub
->write(oview
+ stub
->offset(), stub
->stub_template()->size(),
4932 // Write ARM V4BX relocation stubs.
4933 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4934 p
!= this->arm_v4bx_stubs_
.end();
4940 Arm_address address
= this->address() + (*p
)->offset();
4942 == align_address(address
,
4943 (*p
)->stub_template()->alignment()));
4944 (*p
)->write(oview
+ (*p
)->offset(), (*p
)->stub_template()->size(),
4948 of
->write_output_view(this->offset(), oview_size
, oview
);
4951 // Update the data size and address alignment of the stub table at the end
4952 // of a relaxation pass. Return true if either the data size or the
4953 // alignment changed in this relaxation pass.
4955 template<bool big_endian
>
4957 Stub_table
<big_endian
>::update_data_size_and_addralign()
4959 // Go over all stubs in table to compute data size and address alignment.
4960 off_t size
= this->reloc_stubs_size_
;
4961 unsigned addralign
= this->reloc_stubs_addralign_
;
4963 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
4964 p
!= this->cortex_a8_stubs_
.end();
4967 const Stub_template
* stub_template
= p
->second
->stub_template();
4968 addralign
= std::max(addralign
, stub_template
->alignment());
4969 size
= (align_address(size
, stub_template
->alignment())
4970 + stub_template
->size());
4973 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
4974 p
!= this->arm_v4bx_stubs_
.end();
4980 const Stub_template
* stub_template
= (*p
)->stub_template();
4981 addralign
= std::max(addralign
, stub_template
->alignment());
4982 size
= (align_address(size
, stub_template
->alignment())
4983 + stub_template
->size());
4986 // Check if either data size or alignment changed in this pass.
4987 // Update prev_data_size_ and prev_addralign_. These will be used
4988 // as the current data size and address alignment for the next pass.
4989 bool changed
= size
!= this->prev_data_size_
;
4990 this->prev_data_size_
= size
;
4992 if (addralign
!= this->prev_addralign_
)
4994 this->prev_addralign_
= addralign
;
4999 // Finalize the stubs. This sets the offsets of the stubs within the stub
5000 // table. It also marks all input sections needing Cortex-A8 workaround.
5002 template<bool big_endian
>
5004 Stub_table
<big_endian
>::finalize_stubs()
5006 off_t off
= this->reloc_stubs_size_
;
5007 for (Cortex_a8_stub_list::const_iterator p
= this->cortex_a8_stubs_
.begin();
5008 p
!= this->cortex_a8_stubs_
.end();
5011 Cortex_a8_stub
* stub
= p
->second
;
5012 const Stub_template
* stub_template
= stub
->stub_template();
5013 uint64_t stub_addralign
= stub_template
->alignment();
5014 off
= align_address(off
, stub_addralign
);
5015 stub
->set_offset(off
);
5016 off
+= stub_template
->size();
5018 // Mark input section so that we can determine later if a code section
5019 // needs the Cortex-A8 workaround quickly.
5020 Arm_relobj
<big_endian
>* arm_relobj
=
5021 Arm_relobj
<big_endian
>::as_arm_relobj(stub
->relobj());
5022 arm_relobj
->mark_section_for_cortex_a8_workaround(stub
->shndx());
5025 for (Arm_v4bx_stub_list::const_iterator p
= this->arm_v4bx_stubs_
.begin();
5026 p
!= this->arm_v4bx_stubs_
.end();
5032 const Stub_template
* stub_template
= (*p
)->stub_template();
5033 uint64_t stub_addralign
= stub_template
->alignment();
5034 off
= align_address(off
, stub_addralign
);
5035 (*p
)->set_offset(off
);
5036 off
+= stub_template
->size();
5039 gold_assert(off
<= this->prev_data_size_
);
5042 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5043 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5044 // of the address range seen by the linker.
5046 template<bool big_endian
>
5048 Stub_table
<big_endian
>::apply_cortex_a8_workaround_to_address_range(
5049 Target_arm
<big_endian
>* arm_target
,
5050 unsigned char* view
,
5051 Arm_address view_address
,
5052 section_size_type view_size
)
5054 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5055 for (Cortex_a8_stub_list::const_iterator p
=
5056 this->cortex_a8_stubs_
.lower_bound(view_address
);
5057 ((p
!= this->cortex_a8_stubs_
.end())
5058 && (p
->first
< (view_address
+ view_size
)));
5061 // We do not store the THUMB bit in the LSB of either the branch address
5062 // or the stub offset. There is no need to strip the LSB.
5063 Arm_address branch_address
= p
->first
;
5064 const Cortex_a8_stub
* stub
= p
->second
;
5065 Arm_address stub_address
= this->address() + stub
->offset();
5067 // Offset of the branch instruction relative to this view.
5068 section_size_type offset
=
5069 convert_to_section_size_type(branch_address
- view_address
);
5070 gold_assert((offset
+ 4) <= view_size
);
5072 arm_target
->apply_cortex_a8_workaround(stub
, stub_address
,
5073 view
+ offset
, branch_address
);
5077 // Arm_input_section methods.
5079 // Initialize an Arm_input_section.
5081 template<bool big_endian
>
5083 Arm_input_section
<big_endian
>::init()
5085 Relobj
* relobj
= this->relobj();
5086 unsigned int shndx
= this->shndx();
5088 // We have to cache original size, alignment and contents to avoid locking
5089 // the original file.
5090 this->original_addralign_
=
5091 convert_types
<uint32_t, uint64_t>(relobj
->section_addralign(shndx
));
5093 // This is not efficient but we expect only a small number of relaxed
5094 // input sections for stubs.
5095 section_size_type section_size
;
5096 const unsigned char* section_contents
=
5097 relobj
->section_contents(shndx
, §ion_size
, false);
5098 this->original_size_
=
5099 convert_types
<uint32_t, uint64_t>(relobj
->section_size(shndx
));
5101 gold_assert(this->original_contents_
== NULL
);
5102 this->original_contents_
= new unsigned char[section_size
];
5103 memcpy(this->original_contents_
, section_contents
, section_size
);
5105 // We want to make this look like the original input section after
5106 // output sections are finalized.
5107 Output_section
* os
= relobj
->output_section(shndx
);
5108 off_t offset
= relobj
->output_section_offset(shndx
);
5109 gold_assert(os
!= NULL
&& !relobj
->is_output_section_offset_invalid(shndx
));
5110 this->set_address(os
->address() + offset
);
5111 this->set_file_offset(os
->offset() + offset
);
5113 this->set_current_data_size(this->original_size_
);
5114 this->finalize_data_size();
5117 template<bool big_endian
>
5119 Arm_input_section
<big_endian
>::do_write(Output_file
* of
)
5121 // We have to write out the original section content.
5122 gold_assert(this->original_contents_
!= NULL
);
5123 of
->write(this->offset(), this->original_contents_
,
5124 this->original_size_
);
5126 // If this owns a stub table and it is not empty, write it.
5127 if (this->is_stub_table_owner() && !this->stub_table_
->empty())
5128 this->stub_table_
->write(of
);
5131 // Finalize data size.
5133 template<bool big_endian
>
5135 Arm_input_section
<big_endian
>::set_final_data_size()
5137 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5139 if (this->is_stub_table_owner())
5141 this->stub_table_
->finalize_data_size();
5142 off
= align_address(off
, this->stub_table_
->addralign());
5143 off
+= this->stub_table_
->data_size();
5145 this->set_data_size(off
);
5148 // Reset address and file offset.
5150 template<bool big_endian
>
5152 Arm_input_section
<big_endian
>::do_reset_address_and_file_offset()
5154 // Size of the original input section contents.
5155 off_t off
= convert_types
<off_t
, uint64_t>(this->original_size_
);
5157 // If this is a stub table owner, account for the stub table size.
5158 if (this->is_stub_table_owner())
5160 Stub_table
<big_endian
>* stub_table
= this->stub_table_
;
5162 // Reset the stub table's address and file offset. The
5163 // current data size for child will be updated after that.
5164 stub_table_
->reset_address_and_file_offset();
5165 off
= align_address(off
, stub_table_
->addralign());
5166 off
+= stub_table
->current_data_size();
5169 this->set_current_data_size(off
);
5172 // Arm_exidx_cantunwind methods.
5174 // Write this to Output file OF for a fixed endianness.
5176 template<bool big_endian
>
5178 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file
* of
)
5180 off_t offset
= this->offset();
5181 const section_size_type oview_size
= 8;
5182 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5184 typedef typename
elfcpp::Swap_unaligned
<32, big_endian
>::Valtype Valtype
;
5186 Output_section
* os
= this->relobj_
->output_section(this->shndx_
);
5187 gold_assert(os
!= NULL
);
5189 Arm_relobj
<big_endian
>* arm_relobj
=
5190 Arm_relobj
<big_endian
>::as_arm_relobj(this->relobj_
);
5191 Arm_address output_offset
=
5192 arm_relobj
->get_output_section_offset(this->shndx_
);
5193 Arm_address section_start
;
5194 section_size_type section_size
;
5196 // Find out the end of the text section referred by this.
5197 if (output_offset
!= Arm_relobj
<big_endian
>::invalid_address
)
5199 section_start
= os
->address() + output_offset
;
5200 const Arm_exidx_input_section
* exidx_input_section
=
5201 arm_relobj
->exidx_input_section_by_link(this->shndx_
);
5202 gold_assert(exidx_input_section
!= NULL
);
5204 convert_to_section_size_type(exidx_input_section
->text_size());
5208 // Currently this only happens for a relaxed section.
5209 const Output_relaxed_input_section
* poris
=
5210 os
->find_relaxed_input_section(this->relobj_
, this->shndx_
);
5211 gold_assert(poris
!= NULL
);
5212 section_start
= poris
->address();
5213 section_size
= convert_to_section_size_type(poris
->data_size());
5216 // We always append this to the end of an EXIDX section.
5217 Arm_address output_address
= section_start
+ section_size
;
5219 // Write out the entry. The first word either points to the beginning
5220 // or after the end of a text section. The second word is the special
5221 // EXIDX_CANTUNWIND value.
5222 uint32_t prel31_offset
= output_address
- this->address();
5223 if (Bits
<31>::has_overflow32(offset
))
5224 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5225 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
,
5226 prel31_offset
& 0x7fffffffU
);
5227 elfcpp::Swap_unaligned
<32, big_endian
>::writeval(oview
+ 4,
5228 elfcpp::EXIDX_CANTUNWIND
);
5230 of
->write_output_view(this->offset(), oview_size
, oview
);
5233 // Arm_exidx_merged_section methods.
5235 // Constructor for Arm_exidx_merged_section.
5236 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5237 // SECTION_OFFSET_MAP points to a section offset map describing how
5238 // parts of the input section are mapped to output. DELETED_BYTES is
5239 // the number of bytes deleted from the EXIDX input section.
5241 Arm_exidx_merged_section::Arm_exidx_merged_section(
5242 const Arm_exidx_input_section
& exidx_input_section
,
5243 const Arm_exidx_section_offset_map
& section_offset_map
,
5244 uint32_t deleted_bytes
)
5245 : Output_relaxed_input_section(exidx_input_section
.relobj(),
5246 exidx_input_section
.shndx(),
5247 exidx_input_section
.addralign()),
5248 exidx_input_section_(exidx_input_section
),
5249 section_offset_map_(section_offset_map
)
5251 // If we retain or discard the whole EXIDX input section, we would
5253 gold_assert(deleted_bytes
!= 0
5254 && deleted_bytes
!= this->exidx_input_section_
.size());
5256 // Fix size here so that we do not need to implement set_final_data_size.
5257 uint32_t size
= exidx_input_section
.size() - deleted_bytes
;
5258 this->set_data_size(size
);
5259 this->fix_data_size();
5261 // Allocate buffer for section contents and build contents.
5262 this->section_contents_
= new unsigned char[size
];
5265 // Build the contents of a merged EXIDX output section.
5268 Arm_exidx_merged_section::build_contents(
5269 const unsigned char* original_contents
,
5270 section_size_type original_size
)
5272 // Go over spans of input offsets and write only those that are not
5274 section_offset_type in_start
= 0;
5275 section_offset_type out_start
= 0;
5276 section_offset_type in_max
=
5277 convert_types
<section_offset_type
>(original_size
);
5278 section_offset_type out_max
=
5279 convert_types
<section_offset_type
>(this->data_size());
5280 for (Arm_exidx_section_offset_map::const_iterator p
=
5281 this->section_offset_map_
.begin();
5282 p
!= this->section_offset_map_
.end();
5285 section_offset_type in_end
= p
->first
;
5286 gold_assert(in_end
>= in_start
);
5287 section_offset_type out_end
= p
->second
;
5288 size_t in_chunk_size
= convert_types
<size_t>(in_end
- in_start
+ 1);
5291 size_t out_chunk_size
=
5292 convert_types
<size_t>(out_end
- out_start
+ 1);
5294 gold_assert(out_chunk_size
== in_chunk_size
5295 && in_end
< in_max
&& out_end
< out_max
);
5297 memcpy(this->section_contents_
+ out_start
,
5298 original_contents
+ in_start
,
5300 out_start
+= out_chunk_size
;
5302 in_start
+= in_chunk_size
;
5306 // Given an input OBJECT, an input section index SHNDX within that
5307 // object, and an OFFSET relative to the start of that input
5308 // section, return whether or not the corresponding offset within
5309 // the output section is known. If this function returns true, it
5310 // sets *POUTPUT to the output offset. The value -1 indicates that
5311 // this input offset is being discarded.
5314 Arm_exidx_merged_section::do_output_offset(
5315 const Relobj
* relobj
,
5317 section_offset_type offset
,
5318 section_offset_type
* poutput
) const
5320 // We only handle offsets for the original EXIDX input section.
5321 if (relobj
!= this->exidx_input_section_
.relobj()
5322 || shndx
!= this->exidx_input_section_
.shndx())
5325 section_offset_type section_size
=
5326 convert_types
<section_offset_type
>(this->exidx_input_section_
.size());
5327 if (offset
< 0 || offset
>= section_size
)
5328 // Input offset is out of valid range.
5332 // We need to look up the section offset map to determine the output
5333 // offset. Find the reference point in map that is first offset
5334 // bigger than or equal to this offset.
5335 Arm_exidx_section_offset_map::const_iterator p
=
5336 this->section_offset_map_
.lower_bound(offset
);
5338 // The section offset maps are build such that this should not happen if
5339 // input offset is in the valid range.
5340 gold_assert(p
!= this->section_offset_map_
.end());
5342 // We need to check if this is dropped.
5343 section_offset_type ref
= p
->first
;
5344 section_offset_type mapped_ref
= p
->second
;
5346 if (mapped_ref
!= Arm_exidx_input_section::invalid_offset
)
5347 // Offset is present in output.
5348 *poutput
= mapped_ref
+ (offset
- ref
);
5350 // Offset is discarded owing to EXIDX entry merging.
5357 // Write this to output file OF.
5360 Arm_exidx_merged_section::do_write(Output_file
* of
)
5362 off_t offset
= this->offset();
5363 const section_size_type oview_size
= this->data_size();
5364 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
5366 Output_section
* os
= this->relobj()->output_section(this->shndx());
5367 gold_assert(os
!= NULL
);
5369 memcpy(oview
, this->section_contents_
, oview_size
);
5370 of
->write_output_view(this->offset(), oview_size
, oview
);
5373 // Arm_exidx_fixup methods.
5375 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5376 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5377 // points to the end of the last seen EXIDX section.
5380 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5382 if (this->last_unwind_type_
!= UT_EXIDX_CANTUNWIND
5383 && this->last_input_section_
!= NULL
)
5385 Relobj
* relobj
= this->last_input_section_
->relobj();
5386 unsigned int text_shndx
= this->last_input_section_
->link();
5387 Arm_exidx_cantunwind
* cantunwind
=
5388 new Arm_exidx_cantunwind(relobj
, text_shndx
);
5389 this->exidx_output_section_
->add_output_section_data(cantunwind
);
5390 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5394 // Process an EXIDX section entry in input. Return whether this entry
5395 // can be deleted in the output. SECOND_WORD in the second word of the
5399 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word
)
5402 if (second_word
== elfcpp::EXIDX_CANTUNWIND
)
5404 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5405 delete_entry
= this->last_unwind_type_
== UT_EXIDX_CANTUNWIND
;
5406 this->last_unwind_type_
= UT_EXIDX_CANTUNWIND
;
5408 else if ((second_word
& 0x80000000) != 0)
5410 // Inlined unwinding data. Merge if equal to previous.
5411 delete_entry
= (merge_exidx_entries_
5412 && this->last_unwind_type_
== UT_INLINED_ENTRY
5413 && this->last_inlined_entry_
== second_word
);
5414 this->last_unwind_type_
= UT_INLINED_ENTRY
;
5415 this->last_inlined_entry_
= second_word
;
5419 // Normal table entry. In theory we could merge these too,
5420 // but duplicate entries are likely to be much less common.
5421 delete_entry
= false;
5422 this->last_unwind_type_
= UT_NORMAL_ENTRY
;
5424 return delete_entry
;
5427 // Update the current section offset map during EXIDX section fix-up.
5428 // If there is no map, create one. INPUT_OFFSET is the offset of a
5429 // reference point, DELETED_BYTES is the number of deleted by in the
5430 // section so far. If DELETE_ENTRY is true, the reference point and
5431 // all offsets after the previous reference point are discarded.
5434 Arm_exidx_fixup::update_offset_map(
5435 section_offset_type input_offset
,
5436 section_size_type deleted_bytes
,
5439 if (this->section_offset_map_
== NULL
)
5440 this->section_offset_map_
= new Arm_exidx_section_offset_map();
5441 section_offset_type output_offset
;
5443 output_offset
= Arm_exidx_input_section::invalid_offset
;
5445 output_offset
= input_offset
- deleted_bytes
;
5446 (*this->section_offset_map_
)[input_offset
] = output_offset
;
5449 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5450 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5451 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5452 // If some entries are merged, also store a pointer to a newly created
5453 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5454 // owns the map and is responsible for releasing it after use.
5456 template<bool big_endian
>
5458 Arm_exidx_fixup::process_exidx_section(
5459 const Arm_exidx_input_section
* exidx_input_section
,
5460 const unsigned char* section_contents
,
5461 section_size_type section_size
,
5462 Arm_exidx_section_offset_map
** psection_offset_map
)
5464 Relobj
* relobj
= exidx_input_section
->relobj();
5465 unsigned shndx
= exidx_input_section
->shndx();
5467 if ((section_size
% 8) != 0)
5469 // Something is wrong with this section. Better not touch it.
5470 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5471 relobj
->name().c_str(), shndx
);
5472 this->last_input_section_
= exidx_input_section
;
5473 this->last_unwind_type_
= UT_NONE
;
5477 uint32_t deleted_bytes
= 0;
5478 bool prev_delete_entry
= false;
5479 gold_assert(this->section_offset_map_
== NULL
);
5481 for (section_size_type i
= 0; i
< section_size
; i
+= 8)
5483 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
5485 reinterpret_cast<const Valtype
*>(section_contents
+ i
+ 4);
5486 uint32_t second_word
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
5488 bool delete_entry
= this->process_exidx_entry(second_word
);
5490 // Entry deletion causes changes in output offsets. We use a std::map
5491 // to record these. And entry (x, y) means input offset x
5492 // is mapped to output offset y. If y is invalid_offset, then x is
5493 // dropped in the output. Because of the way std::map::lower_bound
5494 // works, we record the last offset in a region w.r.t to keeping or
5495 // dropping. If there is no entry (x0, y0) for an input offset x0,
5496 // the output offset y0 of it is determined by the output offset y1 of
5497 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5498 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5500 if (delete_entry
!= prev_delete_entry
&& i
!= 0)
5501 this->update_offset_map(i
- 1, deleted_bytes
, prev_delete_entry
);
5503 // Update total deleted bytes for this entry.
5507 prev_delete_entry
= delete_entry
;
5510 // If section offset map is not NULL, make an entry for the end of
5512 if (this->section_offset_map_
!= NULL
)
5513 update_offset_map(section_size
- 1, deleted_bytes
, prev_delete_entry
);
5515 *psection_offset_map
= this->section_offset_map_
;
5516 this->section_offset_map_
= NULL
;
5517 this->last_input_section_
= exidx_input_section
;
5519 // Set the first output text section so that we can link the EXIDX output
5520 // section to it. Ignore any EXIDX input section that is completely merged.
5521 if (this->first_output_text_section_
== NULL
5522 && deleted_bytes
!= section_size
)
5524 unsigned int link
= exidx_input_section
->link();
5525 Output_section
* os
= relobj
->output_section(link
);
5526 gold_assert(os
!= NULL
);
5527 this->first_output_text_section_
= os
;
5530 return deleted_bytes
;
5533 // Arm_output_section methods.
5535 // Create a stub group for input sections from BEGIN to END. OWNER
5536 // points to the input section to be the owner a new stub table.
5538 template<bool big_endian
>
5540 Arm_output_section
<big_endian
>::create_stub_group(
5541 Input_section_list::const_iterator begin
,
5542 Input_section_list::const_iterator end
,
5543 Input_section_list::const_iterator owner
,
5544 Target_arm
<big_endian
>* target
,
5545 std::vector
<Output_relaxed_input_section
*>* new_relaxed_sections
,
5548 // We use a different kind of relaxed section in an EXIDX section.
5549 // The static casting from Output_relaxed_input_section to
5550 // Arm_input_section is invalid in an EXIDX section. We are okay
5551 // because we should not be calling this for an EXIDX section.
5552 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX
);
5554 // Currently we convert ordinary input sections into relaxed sections only
5555 // at this point but we may want to support creating relaxed input section
5556 // very early. So we check here to see if owner is already a relaxed
5559 Arm_input_section
<big_endian
>* arm_input_section
;
5560 if (owner
->is_relaxed_input_section())
5563 Arm_input_section
<big_endian
>::as_arm_input_section(
5564 owner
->relaxed_input_section());
5568 gold_assert(owner
->is_input_section());
5569 // Create a new relaxed input section. We need to lock the original
5571 Task_lock_obj
<Object
> tl(task
, owner
->relobj());
5573 target
->new_arm_input_section(owner
->relobj(), owner
->shndx());
5574 new_relaxed_sections
->push_back(arm_input_section
);
5577 // Create a stub table.
5578 Stub_table
<big_endian
>* stub_table
=
5579 target
->new_stub_table(arm_input_section
);
5581 arm_input_section
->set_stub_table(stub_table
);
5583 Input_section_list::const_iterator p
= begin
;
5584 Input_section_list::const_iterator prev_p
;
5586 // Look for input sections or relaxed input sections in [begin ... end].
5589 if (p
->is_input_section() || p
->is_relaxed_input_section())
5591 // The stub table information for input sections live
5592 // in their objects.
5593 Arm_relobj
<big_endian
>* arm_relobj
=
5594 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5595 arm_relobj
->set_stub_table(p
->shndx(), stub_table
);
5599 while (prev_p
!= end
);
5602 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5603 // of stub groups. We grow a stub group by adding input section until the
5604 // size is just below GROUP_SIZE. The last input section will be converted
5605 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5606 // input section after the stub table, effectively double the group size.
5608 // This is similar to the group_sections() function in elf32-arm.c but is
5609 // implemented differently.
5611 template<bool big_endian
>
5613 Arm_output_section
<big_endian
>::group_sections(
5614 section_size_type group_size
,
5615 bool stubs_always_after_branch
,
5616 Target_arm
<big_endian
>* target
,
5619 // We only care about sections containing code.
5620 if ((this->flags() & elfcpp::SHF_EXECINSTR
) == 0)
5623 // States for grouping.
5626 // No group is being built.
5628 // A group is being built but the stub table is not found yet.
5629 // We keep group a stub group until the size is just under GROUP_SIZE.
5630 // The last input section in the group will be used as the stub table.
5631 FINDING_STUB_SECTION
,
5632 // A group is being built and we have already found a stub table.
5633 // We enter this state to grow a stub group by adding input section
5634 // after the stub table. This effectively doubles the group size.
5638 // Any newly created relaxed sections are stored here.
5639 std::vector
<Output_relaxed_input_section
*> new_relaxed_sections
;
5641 State state
= NO_GROUP
;
5642 section_size_type off
= 0;
5643 section_size_type group_begin_offset
= 0;
5644 section_size_type group_end_offset
= 0;
5645 section_size_type stub_table_end_offset
= 0;
5646 Input_section_list::const_iterator group_begin
=
5647 this->input_sections().end();
5648 Input_section_list::const_iterator stub_table
=
5649 this->input_sections().end();
5650 Input_section_list::const_iterator group_end
= this->input_sections().end();
5651 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5652 p
!= this->input_sections().end();
5655 section_size_type section_begin_offset
=
5656 align_address(off
, p
->addralign());
5657 section_size_type section_end_offset
=
5658 section_begin_offset
+ p
->data_size();
5660 // Check to see if we should group the previously seen sections.
5666 case FINDING_STUB_SECTION
:
5667 // Adding this section makes the group larger than GROUP_SIZE.
5668 if (section_end_offset
- group_begin_offset
>= group_size
)
5670 if (stubs_always_after_branch
)
5672 gold_assert(group_end
!= this->input_sections().end());
5673 this->create_stub_group(group_begin
, group_end
, group_end
,
5674 target
, &new_relaxed_sections
,
5680 // But wait, there's more! Input sections up to
5681 // stub_group_size bytes after the stub table can be
5682 // handled by it too.
5683 state
= HAS_STUB_SECTION
;
5684 stub_table
= group_end
;
5685 stub_table_end_offset
= group_end_offset
;
5690 case HAS_STUB_SECTION
:
5691 // Adding this section makes the post stub-section group larger
5693 if (section_end_offset
- stub_table_end_offset
>= group_size
)
5695 gold_assert(group_end
!= this->input_sections().end());
5696 this->create_stub_group(group_begin
, group_end
, stub_table
,
5697 target
, &new_relaxed_sections
, task
);
5706 // If we see an input section and currently there is no group, start
5707 // a new one. Skip any empty sections. We look at the data size
5708 // instead of calling p->relobj()->section_size() to avoid locking.
5709 if ((p
->is_input_section() || p
->is_relaxed_input_section())
5710 && (p
->data_size() != 0))
5712 if (state
== NO_GROUP
)
5714 state
= FINDING_STUB_SECTION
;
5716 group_begin_offset
= section_begin_offset
;
5719 // Keep track of the last input section seen.
5721 group_end_offset
= section_end_offset
;
5724 off
= section_end_offset
;
5727 // Create a stub group for any ungrouped sections.
5728 if (state
== FINDING_STUB_SECTION
|| state
== HAS_STUB_SECTION
)
5730 gold_assert(group_end
!= this->input_sections().end());
5731 this->create_stub_group(group_begin
, group_end
,
5732 (state
== FINDING_STUB_SECTION
5735 target
, &new_relaxed_sections
, task
);
5738 // Convert input section into relaxed input section in a batch.
5739 if (!new_relaxed_sections
.empty())
5740 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections
);
5742 // Update the section offsets
5743 for (size_t i
= 0; i
< new_relaxed_sections
.size(); ++i
)
5745 Arm_relobj
<big_endian
>* arm_relobj
=
5746 Arm_relobj
<big_endian
>::as_arm_relobj(
5747 new_relaxed_sections
[i
]->relobj());
5748 unsigned int shndx
= new_relaxed_sections
[i
]->shndx();
5749 // Tell Arm_relobj that this input section is converted.
5750 arm_relobj
->convert_input_section_to_relaxed_section(shndx
);
5754 // Append non empty text sections in this to LIST in ascending
5755 // order of their position in this.
5757 template<bool big_endian
>
5759 Arm_output_section
<big_endian
>::append_text_sections_to_list(
5760 Text_section_list
* list
)
5762 gold_assert((this->flags() & elfcpp::SHF_ALLOC
) != 0);
5764 for (Input_section_list::const_iterator p
= this->input_sections().begin();
5765 p
!= this->input_sections().end();
5768 // We only care about plain or relaxed input sections. We also
5769 // ignore any merged sections.
5770 if (p
->is_input_section() || p
->is_relaxed_input_section())
5771 list
->push_back(Text_section_list::value_type(p
->relobj(),
5776 template<bool big_endian
>
5778 Arm_output_section
<big_endian
>::fix_exidx_coverage(
5780 const Text_section_list
& sorted_text_sections
,
5781 Symbol_table
* symtab
,
5782 bool merge_exidx_entries
,
5785 // We should only do this for the EXIDX output section.
5786 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5788 // We don't want the relaxation loop to undo these changes, so we discard
5789 // the current saved states and take another one after the fix-up.
5790 this->discard_states();
5792 // Remove all input sections.
5793 uint64_t address
= this->address();
5794 typedef std::list
<Output_section::Input_section
> Input_section_list
;
5795 Input_section_list input_sections
;
5796 this->reset_address_and_file_offset();
5797 this->get_input_sections(address
, std::string(""), &input_sections
);
5799 if (!this->input_sections().empty())
5800 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5802 // Go through all the known input sections and record them.
5803 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5804 typedef Unordered_map
<Section_id
, const Output_section::Input_section
*,
5805 Section_id_hash
> Text_to_exidx_map
;
5806 Text_to_exidx_map text_to_exidx_map
;
5807 for (Input_section_list::const_iterator p
= input_sections
.begin();
5808 p
!= input_sections
.end();
5811 // This should never happen. At this point, we should only see
5812 // plain EXIDX input sections.
5813 gold_assert(!p
->is_relaxed_input_section());
5814 text_to_exidx_map
[Section_id(p
->relobj(), p
->shndx())] = &(*p
);
5817 Arm_exidx_fixup
exidx_fixup(this, merge_exidx_entries
);
5819 // Go over the sorted text sections.
5820 typedef Unordered_set
<Section_id
, Section_id_hash
> Section_id_set
;
5821 Section_id_set processed_input_sections
;
5822 for (Text_section_list::const_iterator p
= sorted_text_sections
.begin();
5823 p
!= sorted_text_sections
.end();
5826 Relobj
* relobj
= p
->first
;
5827 unsigned int shndx
= p
->second
;
5829 Arm_relobj
<big_endian
>* arm_relobj
=
5830 Arm_relobj
<big_endian
>::as_arm_relobj(relobj
);
5831 const Arm_exidx_input_section
* exidx_input_section
=
5832 arm_relobj
->exidx_input_section_by_link(shndx
);
5834 // If this text section has no EXIDX section or if the EXIDX section
5835 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5836 // of the last seen EXIDX section.
5837 if (exidx_input_section
== NULL
|| exidx_input_section
->has_errors())
5839 exidx_fixup
.add_exidx_cantunwind_as_needed();
5843 Relobj
* exidx_relobj
= exidx_input_section
->relobj();
5844 unsigned int exidx_shndx
= exidx_input_section
->shndx();
5845 Section_id
sid(exidx_relobj
, exidx_shndx
);
5846 Text_to_exidx_map::const_iterator iter
= text_to_exidx_map
.find(sid
);
5847 if (iter
== text_to_exidx_map
.end())
5849 // This is odd. We have not seen this EXIDX input section before.
5850 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5851 // issue a warning instead. We assume the user knows what he
5852 // or she is doing. Otherwise, this is an error.
5853 if (layout
->script_options()->saw_sections_clause())
5854 gold_warning(_("unwinding may not work because EXIDX input section"
5855 " %u of %s is not in EXIDX output section"),
5856 exidx_shndx
, exidx_relobj
->name().c_str());
5858 gold_error(_("unwinding may not work because EXIDX input section"
5859 " %u of %s is not in EXIDX output section"),
5860 exidx_shndx
, exidx_relobj
->name().c_str());
5862 exidx_fixup
.add_exidx_cantunwind_as_needed();
5866 // We need to access the contents of the EXIDX section, lock the
5868 Task_lock_obj
<Object
> tl(task
, exidx_relobj
);
5869 section_size_type exidx_size
;
5870 const unsigned char* exidx_contents
=
5871 exidx_relobj
->section_contents(exidx_shndx
, &exidx_size
, false);
5873 // Fix up coverage and append input section to output data list.
5874 Arm_exidx_section_offset_map
* section_offset_map
= NULL
;
5875 uint32_t deleted_bytes
=
5876 exidx_fixup
.process_exidx_section
<big_endian
>(exidx_input_section
,
5879 §ion_offset_map
);
5881 if (deleted_bytes
== exidx_input_section
->size())
5883 // The whole EXIDX section got merged. Remove it from output.
5884 gold_assert(section_offset_map
== NULL
);
5885 exidx_relobj
->set_output_section(exidx_shndx
, NULL
);
5887 // All local symbols defined in this input section will be dropped.
5888 // We need to adjust output local symbol count.
5889 arm_relobj
->set_output_local_symbol_count_needs_update();
5891 else if (deleted_bytes
> 0)
5893 // Some entries are merged. We need to convert this EXIDX input
5894 // section into a relaxed section.
5895 gold_assert(section_offset_map
!= NULL
);
5897 Arm_exidx_merged_section
* merged_section
=
5898 new Arm_exidx_merged_section(*exidx_input_section
,
5899 *section_offset_map
, deleted_bytes
);
5900 merged_section
->build_contents(exidx_contents
, exidx_size
);
5902 const std::string secname
= exidx_relobj
->section_name(exidx_shndx
);
5903 this->add_relaxed_input_section(layout
, merged_section
, secname
);
5904 arm_relobj
->convert_input_section_to_relaxed_section(exidx_shndx
);
5906 // All local symbols defined in discarded portions of this input
5907 // section will be dropped. We need to adjust output local symbol
5909 arm_relobj
->set_output_local_symbol_count_needs_update();
5913 // Just add back the EXIDX input section.
5914 gold_assert(section_offset_map
== NULL
);
5915 const Output_section::Input_section
* pis
= iter
->second
;
5916 gold_assert(pis
->is_input_section());
5917 this->add_script_input_section(*pis
);
5920 processed_input_sections
.insert(Section_id(exidx_relobj
, exidx_shndx
));
5923 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5924 exidx_fixup
.add_exidx_cantunwind_as_needed();
5926 // Remove any known EXIDX input sections that are not processed.
5927 for (Input_section_list::const_iterator p
= input_sections
.begin();
5928 p
!= input_sections
.end();
5931 if (processed_input_sections
.find(Section_id(p
->relobj(), p
->shndx()))
5932 == processed_input_sections
.end())
5934 // We discard a known EXIDX section because its linked
5935 // text section has been folded by ICF. We also discard an
5936 // EXIDX section with error, the output does not matter in this
5937 // case. We do this to avoid triggering asserts.
5938 Arm_relobj
<big_endian
>* arm_relobj
=
5939 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5940 const Arm_exidx_input_section
* exidx_input_section
=
5941 arm_relobj
->exidx_input_section_by_shndx(p
->shndx());
5942 gold_assert(exidx_input_section
!= NULL
);
5943 if (!exidx_input_section
->has_errors())
5945 unsigned int text_shndx
= exidx_input_section
->link();
5946 gold_assert(symtab
->is_section_folded(p
->relobj(), text_shndx
));
5949 // Remove this from link. We also need to recount the
5951 p
->relobj()->set_output_section(p
->shndx(), NULL
);
5952 arm_relobj
->set_output_local_symbol_count_needs_update();
5956 // Link exidx output section to the first seen output section and
5957 // set correct entry size.
5958 this->set_link_section(exidx_fixup
.first_output_text_section());
5959 this->set_entsize(8);
5961 // Make changes permanent.
5962 this->save_states();
5963 this->set_section_offsets_need_adjustment();
5966 // Link EXIDX output sections to text output sections.
5968 template<bool big_endian
>
5970 Arm_output_section
<big_endian
>::set_exidx_section_link()
5972 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX
);
5973 if (!this->input_sections().empty())
5975 Input_section_list::const_iterator p
= this->input_sections().begin();
5976 Arm_relobj
<big_endian
>* arm_relobj
=
5977 Arm_relobj
<big_endian
>::as_arm_relobj(p
->relobj());
5978 unsigned exidx_shndx
= p
->shndx();
5979 const Arm_exidx_input_section
* exidx_input_section
=
5980 arm_relobj
->exidx_input_section_by_shndx(exidx_shndx
);
5981 gold_assert(exidx_input_section
!= NULL
);
5982 unsigned int text_shndx
= exidx_input_section
->link();
5983 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
5984 this->set_link_section(os
);
5988 // Arm_relobj methods.
5990 // Determine if an input section is scannable for stub processing. SHDR is
5991 // the header of the section and SHNDX is the section index. OS is the output
5992 // section for the input section and SYMTAB is the global symbol table used to
5993 // look up ICF information.
5995 template<bool big_endian
>
5997 Arm_relobj
<big_endian
>::section_is_scannable(
5998 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6000 const Output_section
* os
,
6001 const Symbol_table
* symtab
)
6003 // Skip any empty sections, unallocated sections or sections whose
6004 // type are not SHT_PROGBITS.
6005 if (shdr
.get_sh_size() == 0
6006 || (shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0
6007 || shdr
.get_sh_type() != elfcpp::SHT_PROGBITS
)
6010 // Skip any discarded or ICF'ed sections.
6011 if (os
== NULL
|| symtab
->is_section_folded(this, shndx
))
6014 // If this requires special offset handling, check to see if it is
6015 // a relaxed section. If this is not, then it is a merged section that
6016 // we cannot handle.
6017 if (this->is_output_section_offset_invalid(shndx
))
6019 const Output_relaxed_input_section
* poris
=
6020 os
->find_relaxed_input_section(this, shndx
);
6028 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6029 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6031 template<bool big_endian
>
6033 Arm_relobj
<big_endian
>::section_needs_reloc_stub_scanning(
6034 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6035 const Relobj::Output_sections
& out_sections
,
6036 const Symbol_table
* symtab
,
6037 const unsigned char* pshdrs
)
6039 unsigned int sh_type
= shdr
.get_sh_type();
6040 if (sh_type
!= elfcpp::SHT_REL
&& sh_type
!= elfcpp::SHT_RELA
)
6043 // Ignore empty section.
6044 off_t sh_size
= shdr
.get_sh_size();
6048 // Ignore reloc section with unexpected symbol table. The
6049 // error will be reported in the final link.
6050 if (this->adjust_shndx(shdr
.get_sh_link()) != this->symtab_shndx())
6053 unsigned int reloc_size
;
6054 if (sh_type
== elfcpp::SHT_REL
)
6055 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6057 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6059 // Ignore reloc section with unexpected entsize or uneven size.
6060 // The error will be reported in the final link.
6061 if (reloc_size
!= shdr
.get_sh_entsize() || sh_size
% reloc_size
!= 0)
6064 // Ignore reloc section with bad info. This error will be
6065 // reported in the final link.
6066 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6067 if (index
>= this->shnum())
6070 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6071 const elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
+ index
* shdr_size
);
6072 return this->section_is_scannable(text_shdr
, index
,
6073 out_sections
[index
], symtab
);
6076 // Return the output address of either a plain input section or a relaxed
6077 // input section. SHNDX is the section index. We define and use this
6078 // instead of calling Output_section::output_address because that is slow
6079 // for large output.
6081 template<bool big_endian
>
6083 Arm_relobj
<big_endian
>::simple_input_section_output_address(
6087 if (this->is_output_section_offset_invalid(shndx
))
6089 const Output_relaxed_input_section
* poris
=
6090 os
->find_relaxed_input_section(this, shndx
);
6091 // We do not handle merged sections here.
6092 gold_assert(poris
!= NULL
);
6093 return poris
->address();
6096 return os
->address() + this->get_output_section_offset(shndx
);
6099 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6100 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6102 template<bool big_endian
>
6104 Arm_relobj
<big_endian
>::section_needs_cortex_a8_stub_scanning(
6105 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6108 const Symbol_table
* symtab
)
6110 if (!this->section_is_scannable(shdr
, shndx
, os
, symtab
))
6113 // If the section does not cross any 4K-boundaries, it does not need to
6115 Arm_address address
= this->simple_input_section_output_address(shndx
, os
);
6116 if ((address
& ~0xfffU
) == ((address
+ shdr
.get_sh_size() - 1) & ~0xfffU
))
6122 // Scan a section for Cortex-A8 workaround.
6124 template<bool big_endian
>
6126 Arm_relobj
<big_endian
>::scan_section_for_cortex_a8_erratum(
6127 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6130 Target_arm
<big_endian
>* arm_target
)
6132 // Look for the first mapping symbol in this section. It should be
6134 Mapping_symbol_position
section_start(shndx
, 0);
6135 typename
Mapping_symbols_info::const_iterator p
=
6136 this->mapping_symbols_info_
.lower_bound(section_start
);
6138 // There are no mapping symbols for this section. Treat it as a data-only
6139 // section. Issue a warning if section is marked as containing
6141 if (p
== this->mapping_symbols_info_
.end() || p
->first
.first
!= shndx
)
6143 if ((this->section_flags(shndx
) & elfcpp::SHF_EXECINSTR
) != 0)
6144 gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6145 "erratum because it has no mapping symbols."),
6146 shndx
, this->name().c_str());
6150 Arm_address output_address
=
6151 this->simple_input_section_output_address(shndx
, os
);
6153 // Get the section contents.
6154 section_size_type input_view_size
= 0;
6155 const unsigned char* input_view
=
6156 this->section_contents(shndx
, &input_view_size
, false);
6158 // We need to go through the mapping symbols to determine what to
6159 // scan. There are two reasons. First, we should look at THUMB code and
6160 // THUMB code only. Second, we only want to look at the 4K-page boundary
6161 // to speed up the scanning.
6163 while (p
!= this->mapping_symbols_info_
.end()
6164 && p
->first
.first
== shndx
)
6166 typename
Mapping_symbols_info::const_iterator next
=
6167 this->mapping_symbols_info_
.upper_bound(p
->first
);
6169 // Only scan part of a section with THUMB code.
6170 if (p
->second
== 't')
6172 // Determine the end of this range.
6173 section_size_type span_start
=
6174 convert_to_section_size_type(p
->first
.second
);
6175 section_size_type span_end
;
6176 if (next
!= this->mapping_symbols_info_
.end()
6177 && next
->first
.first
== shndx
)
6178 span_end
= convert_to_section_size_type(next
->first
.second
);
6180 span_end
= convert_to_section_size_type(shdr
.get_sh_size());
6182 if (((span_start
+ output_address
) & ~0xfffUL
)
6183 != ((span_end
+ output_address
- 1) & ~0xfffUL
))
6185 arm_target
->scan_span_for_cortex_a8_erratum(this, shndx
,
6186 span_start
, span_end
,
6196 // Scan relocations for stub generation.
6198 template<bool big_endian
>
6200 Arm_relobj
<big_endian
>::scan_sections_for_stubs(
6201 Target_arm
<big_endian
>* arm_target
,
6202 const Symbol_table
* symtab
,
6203 const Layout
* layout
)
6205 unsigned int shnum
= this->shnum();
6206 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6208 // Read the section headers.
6209 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6213 // To speed up processing, we set up hash tables for fast lookup of
6214 // input offsets to output addresses.
6215 this->initialize_input_to_output_maps();
6217 const Relobj::Output_sections
& out_sections(this->output_sections());
6219 Relocate_info
<32, big_endian
> relinfo
;
6220 relinfo
.symtab
= symtab
;
6221 relinfo
.layout
= layout
;
6222 relinfo
.object
= this;
6224 // Do relocation stubs scanning.
6225 const unsigned char* p
= pshdrs
+ shdr_size
;
6226 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6228 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6229 if (this->section_needs_reloc_stub_scanning(shdr
, out_sections
, symtab
,
6232 unsigned int index
= this->adjust_shndx(shdr
.get_sh_info());
6233 Arm_address output_offset
= this->get_output_section_offset(index
);
6234 Arm_address output_address
;
6235 if (output_offset
!= invalid_address
)
6236 output_address
= out_sections
[index
]->address() + output_offset
;
6239 // Currently this only happens for a relaxed section.
6240 const Output_relaxed_input_section
* poris
=
6241 out_sections
[index
]->find_relaxed_input_section(this, index
);
6242 gold_assert(poris
!= NULL
);
6243 output_address
= poris
->address();
6246 // Get the relocations.
6247 const unsigned char* prelocs
= this->get_view(shdr
.get_sh_offset(),
6251 // Get the section contents. This does work for the case in which
6252 // we modify the contents of an input section. We need to pass the
6253 // output view under such circumstances.
6254 section_size_type input_view_size
= 0;
6255 const unsigned char* input_view
=
6256 this->section_contents(index
, &input_view_size
, false);
6258 relinfo
.reloc_shndx
= i
;
6259 relinfo
.data_shndx
= index
;
6260 unsigned int sh_type
= shdr
.get_sh_type();
6261 unsigned int reloc_size
;
6262 if (sh_type
== elfcpp::SHT_REL
)
6263 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6265 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6267 Output_section
* os
= out_sections
[index
];
6268 arm_target
->scan_section_for_stubs(&relinfo
, sh_type
, prelocs
,
6269 shdr
.get_sh_size() / reloc_size
,
6271 output_offset
== invalid_address
,
6272 input_view
, output_address
,
6277 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6278 // after its relocation section, if there is one, is processed for
6279 // relocation stubs. Merging this loop with the one above would have been
6280 // complicated since we would have had to make sure that relocation stub
6281 // scanning is done first.
6282 if (arm_target
->fix_cortex_a8())
6284 const unsigned char* p
= pshdrs
+ shdr_size
;
6285 for (unsigned int i
= 1; i
< shnum
; ++i
, p
+= shdr_size
)
6287 const elfcpp::Shdr
<32, big_endian
> shdr(p
);
6288 if (this->section_needs_cortex_a8_stub_scanning(shdr
, i
,
6291 this->scan_section_for_cortex_a8_erratum(shdr
, i
, out_sections
[i
],
6296 // After we've done the relocations, we release the hash tables,
6297 // since we no longer need them.
6298 this->free_input_to_output_maps();
6301 // Count the local symbols. The ARM backend needs to know if a symbol
6302 // is a THUMB function or not. For global symbols, it is easy because
6303 // the Symbol object keeps the ELF symbol type. For local symbol it is
6304 // harder because we cannot access this information. So we override the
6305 // do_count_local_symbol in parent and scan local symbols to mark
6306 // THUMB functions. This is not the most efficient way but I do not want to
6307 // slow down other ports by calling a per symbol target hook inside
6308 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6310 template<bool big_endian
>
6312 Arm_relobj
<big_endian
>::do_count_local_symbols(
6313 Stringpool_template
<char>* pool
,
6314 Stringpool_template
<char>* dynpool
)
6316 // We need to fix-up the values of any local symbols whose type are
6319 // Ask parent to count the local symbols.
6320 Sized_relobj_file
<32, big_endian
>::do_count_local_symbols(pool
, dynpool
);
6321 const unsigned int loccount
= this->local_symbol_count();
6325 // Initialize the thumb function bit-vector.
6326 std::vector
<bool> empty_vector(loccount
, false);
6327 this->local_symbol_is_thumb_function_
.swap(empty_vector
);
6329 // Read the symbol table section header.
6330 const unsigned int symtab_shndx
= this->symtab_shndx();
6331 elfcpp::Shdr
<32, big_endian
>
6332 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6333 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6335 // Read the local symbols.
6336 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6337 gold_assert(loccount
== symtabshdr
.get_sh_info());
6338 off_t locsize
= loccount
* sym_size
;
6339 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6340 locsize
, true, true);
6342 // For mapping symbol processing, we need to read the symbol names.
6343 unsigned int strtab_shndx
= this->adjust_shndx(symtabshdr
.get_sh_link());
6344 if (strtab_shndx
>= this->shnum())
6346 this->error(_("invalid symbol table name index: %u"), strtab_shndx
);
6350 elfcpp::Shdr
<32, big_endian
>
6351 strtabshdr(this, this->elf_file()->section_header(strtab_shndx
));
6352 if (strtabshdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6354 this->error(_("symbol table name section has wrong type: %u"),
6355 static_cast<unsigned int>(strtabshdr
.get_sh_type()));
6358 const char* pnames
=
6359 reinterpret_cast<const char*>(this->get_view(strtabshdr
.get_sh_offset(),
6360 strtabshdr
.get_sh_size(),
6363 // Loop over the local symbols and mark any local symbols pointing
6364 // to THUMB functions.
6366 // Skip the first dummy symbol.
6368 typename Sized_relobj_file
<32, big_endian
>::Local_values
* plocal_values
=
6369 this->local_values();
6370 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6372 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6373 elfcpp::STT st_type
= sym
.get_st_type();
6374 Symbol_value
<32>& lv((*plocal_values
)[i
]);
6375 Arm_address input_value
= lv
.input_value();
6377 // Check to see if this is a mapping symbol.
6378 const char* sym_name
= pnames
+ sym
.get_st_name();
6379 if (Target_arm
<big_endian
>::is_mapping_symbol_name(sym_name
))
6382 unsigned int input_shndx
=
6383 this->adjust_sym_shndx(i
, sym
.get_st_shndx(), &is_ordinary
);
6384 gold_assert(is_ordinary
);
6386 // Strip of LSB in case this is a THUMB symbol.
6387 Mapping_symbol_position
msp(input_shndx
, input_value
& ~1U);
6388 this->mapping_symbols_info_
[msp
] = sym_name
[1];
6391 if (st_type
== elfcpp::STT_ARM_TFUNC
6392 || (st_type
== elfcpp::STT_FUNC
&& ((input_value
& 1) != 0)))
6394 // This is a THUMB function. Mark this and canonicalize the
6395 // symbol value by setting LSB.
6396 this->local_symbol_is_thumb_function_
[i
] = true;
6397 if ((input_value
& 1) == 0)
6398 lv
.set_input_value(input_value
| 1);
6403 // Relocate sections.
6404 template<bool big_endian
>
6406 Arm_relobj
<big_endian
>::do_relocate_sections(
6407 const Symbol_table
* symtab
,
6408 const Layout
* layout
,
6409 const unsigned char* pshdrs
,
6411 typename Sized_relobj_file
<32, big_endian
>::Views
* pviews
)
6413 // Call parent to relocate sections.
6414 Sized_relobj_file
<32, big_endian
>::do_relocate_sections(symtab
, layout
,
6415 pshdrs
, of
, pviews
);
6417 // We do not generate stubs if doing a relocatable link.
6418 if (parameters
->options().relocatable())
6421 // Relocate stub tables.
6422 unsigned int shnum
= this->shnum();
6424 Target_arm
<big_endian
>* arm_target
=
6425 Target_arm
<big_endian
>::default_target();
6427 Relocate_info
<32, big_endian
> relinfo
;
6428 relinfo
.symtab
= symtab
;
6429 relinfo
.layout
= layout
;
6430 relinfo
.object
= this;
6432 for (unsigned int i
= 1; i
< shnum
; ++i
)
6434 Arm_input_section
<big_endian
>* arm_input_section
=
6435 arm_target
->find_arm_input_section(this, i
);
6437 if (arm_input_section
!= NULL
6438 && arm_input_section
->is_stub_table_owner()
6439 && !arm_input_section
->stub_table()->empty())
6441 // We cannot discard a section if it owns a stub table.
6442 Output_section
* os
= this->output_section(i
);
6443 gold_assert(os
!= NULL
);
6445 relinfo
.reloc_shndx
= elfcpp::SHN_UNDEF
;
6446 relinfo
.reloc_shdr
= NULL
;
6447 relinfo
.data_shndx
= i
;
6448 relinfo
.data_shdr
= pshdrs
+ i
* elfcpp::Elf_sizes
<32>::shdr_size
;
6450 gold_assert((*pviews
)[i
].view
!= NULL
);
6452 // We are passed the output section view. Adjust it to cover the
6454 Stub_table
<big_endian
>* stub_table
= arm_input_section
->stub_table();
6455 gold_assert((stub_table
->address() >= (*pviews
)[i
].address
)
6456 && ((stub_table
->address() + stub_table
->data_size())
6457 <= (*pviews
)[i
].address
+ (*pviews
)[i
].view_size
));
6459 off_t offset
= stub_table
->address() - (*pviews
)[i
].address
;
6460 unsigned char* view
= (*pviews
)[i
].view
+ offset
;
6461 Arm_address address
= stub_table
->address();
6462 section_size_type view_size
= stub_table
->data_size();
6464 stub_table
->relocate_stubs(&relinfo
, arm_target
, os
, view
, address
,
6468 // Apply Cortex A8 workaround if applicable.
6469 if (this->section_has_cortex_a8_workaround(i
))
6471 unsigned char* view
= (*pviews
)[i
].view
;
6472 Arm_address view_address
= (*pviews
)[i
].address
;
6473 section_size_type view_size
= (*pviews
)[i
].view_size
;
6474 Stub_table
<big_endian
>* stub_table
= this->stub_tables_
[i
];
6476 // Adjust view to cover section.
6477 Output_section
* os
= this->output_section(i
);
6478 gold_assert(os
!= NULL
);
6479 Arm_address section_address
=
6480 this->simple_input_section_output_address(i
, os
);
6481 uint64_t section_size
= this->section_size(i
);
6483 gold_assert(section_address
>= view_address
6484 && ((section_address
+ section_size
)
6485 <= (view_address
+ view_size
)));
6487 unsigned char* section_view
= view
+ (section_address
- view_address
);
6489 // Apply the Cortex-A8 workaround to the output address range
6490 // corresponding to this input section.
6491 stub_table
->apply_cortex_a8_workaround_to_address_range(
6500 // Find the linked text section of an EXIDX section by looking at the first
6501 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6502 // must be linked to its associated code section via the sh_link field of
6503 // its section header. However, some tools are broken and the link is not
6504 // always set. LD just drops such an EXIDX section silently, causing the
6505 // associated code not unwindabled. Here we try a little bit harder to
6506 // discover the linked code section.
6508 // PSHDR points to the section header of a relocation section of an EXIDX
6509 // section. If we can find a linked text section, return true and
6510 // store the text section index in the location PSHNDX. Otherwise
6513 template<bool big_endian
>
6515 Arm_relobj
<big_endian
>::find_linked_text_section(
6516 const unsigned char* pshdr
,
6517 const unsigned char* psyms
,
6518 unsigned int* pshndx
)
6520 elfcpp::Shdr
<32, big_endian
> shdr(pshdr
);
6522 // If there is no relocation, we cannot find the linked text section.
6524 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6525 reloc_size
= elfcpp::Elf_sizes
<32>::rel_size
;
6527 reloc_size
= elfcpp::Elf_sizes
<32>::rela_size
;
6528 size_t reloc_count
= shdr
.get_sh_size() / reloc_size
;
6530 // Get the relocations.
6531 const unsigned char* prelocs
=
6532 this->get_view(shdr
.get_sh_offset(), shdr
.get_sh_size(), true, false);
6534 // Find the REL31 relocation for the first word of the first EXIDX entry.
6535 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
6537 Arm_address r_offset
;
6538 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
;
6539 if (shdr
.get_sh_type() == elfcpp::SHT_REL
)
6541 typename
elfcpp::Rel
<32, big_endian
> reloc(prelocs
);
6542 r_info
= reloc
.get_r_info();
6543 r_offset
= reloc
.get_r_offset();
6547 typename
elfcpp::Rela
<32, big_endian
> reloc(prelocs
);
6548 r_info
= reloc
.get_r_info();
6549 r_offset
= reloc
.get_r_offset();
6552 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
6553 if (r_type
!= elfcpp::R_ARM_PREL31
&& r_type
!= elfcpp::R_ARM_SBREL31
)
6556 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
6558 || r_sym
>= this->local_symbol_count()
6562 // This is the relocation for the first word of the first EXIDX entry.
6563 // We expect to see a local section symbol.
6564 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6565 elfcpp::Sym
<32, big_endian
> sym(psyms
+ r_sym
* sym_size
);
6566 if (sym
.get_st_type() == elfcpp::STT_SECTION
)
6570 this->adjust_sym_shndx(r_sym
, sym
.get_st_shndx(), &is_ordinary
);
6571 gold_assert(is_ordinary
);
6581 // Make an EXIDX input section object for an EXIDX section whose index is
6582 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6583 // is the section index of the linked text section.
6585 template<bool big_endian
>
6587 Arm_relobj
<big_endian
>::make_exidx_input_section(
6589 const elfcpp::Shdr
<32, big_endian
>& shdr
,
6590 unsigned int text_shndx
,
6591 const elfcpp::Shdr
<32, big_endian
>& text_shdr
)
6593 // Create an Arm_exidx_input_section object for this EXIDX section.
6594 Arm_exidx_input_section
* exidx_input_section
=
6595 new Arm_exidx_input_section(this, shndx
, text_shndx
, shdr
.get_sh_size(),
6596 shdr
.get_sh_addralign(),
6597 text_shdr
.get_sh_size());
6599 gold_assert(this->exidx_section_map_
[shndx
] == NULL
);
6600 this->exidx_section_map_
[shndx
] = exidx_input_section
;
6602 if (text_shndx
== elfcpp::SHN_UNDEF
|| text_shndx
>= this->shnum())
6604 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6605 this->section_name(shndx
).c_str(), shndx
, text_shndx
,
6606 this->name().c_str());
6607 exidx_input_section
->set_has_errors();
6609 else if (this->exidx_section_map_
[text_shndx
] != NULL
)
6611 unsigned other_exidx_shndx
=
6612 this->exidx_section_map_
[text_shndx
]->shndx();
6613 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6615 this->section_name(shndx
).c_str(), shndx
,
6616 this->section_name(other_exidx_shndx
).c_str(),
6617 other_exidx_shndx
, this->section_name(text_shndx
).c_str(),
6618 text_shndx
, this->name().c_str());
6619 exidx_input_section
->set_has_errors();
6622 this->exidx_section_map_
[text_shndx
] = exidx_input_section
;
6624 // Check section flags of text section.
6625 if ((text_shdr
.get_sh_flags() & elfcpp::SHF_ALLOC
) == 0)
6627 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6629 this->section_name(shndx
).c_str(), shndx
,
6630 this->section_name(text_shndx
).c_str(), text_shndx
,
6631 this->name().c_str());
6632 exidx_input_section
->set_has_errors();
6634 else if ((text_shdr
.get_sh_flags() & elfcpp::SHF_EXECINSTR
) == 0)
6635 // I would like to make this an error but currently ld just ignores
6637 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6639 this->section_name(shndx
).c_str(), shndx
,
6640 this->section_name(text_shndx
).c_str(), text_shndx
,
6641 this->name().c_str());
6644 // Read the symbol information.
6646 template<bool big_endian
>
6648 Arm_relobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6650 // Call parent class to read symbol information.
6651 Sized_relobj_file
<32, big_endian
>::do_read_symbols(sd
);
6653 // If this input file is a binary file, it has no processor
6654 // specific flags and attributes section.
6655 Input_file::Format format
= this->input_file()->format();
6656 if (format
!= Input_file::FORMAT_ELF
)
6658 gold_assert(format
== Input_file::FORMAT_BINARY
);
6659 this->merge_flags_and_attributes_
= false;
6663 // Read processor-specific flags in ELF file header.
6664 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6665 elfcpp::Elf_sizes
<32>::ehdr_size
,
6667 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6668 this->processor_specific_flags_
= ehdr
.get_e_flags();
6670 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6672 std::vector
<unsigned int> deferred_exidx_sections
;
6673 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6674 const unsigned char* pshdrs
= sd
->section_headers
->data();
6675 const unsigned char* ps
= pshdrs
+ shdr_size
;
6676 bool must_merge_flags_and_attributes
= false;
6677 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6679 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6681 // Sometimes an object has no contents except the section name string
6682 // table and an empty symbol table with the undefined symbol. We
6683 // don't want to merge processor-specific flags from such an object.
6684 if (shdr
.get_sh_type() == elfcpp::SHT_SYMTAB
)
6686 // Symbol table is not empty.
6687 const elfcpp::Elf_types
<32>::Elf_WXword sym_size
=
6688 elfcpp::Elf_sizes
<32>::sym_size
;
6689 if (shdr
.get_sh_size() > sym_size
)
6690 must_merge_flags_and_attributes
= true;
6692 else if (shdr
.get_sh_type() != elfcpp::SHT_STRTAB
)
6693 // If this is neither an empty symbol table nor a string table,
6695 must_merge_flags_and_attributes
= true;
6697 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6699 gold_assert(this->attributes_section_data_
== NULL
);
6700 section_offset_type section_offset
= shdr
.get_sh_offset();
6701 section_size_type section_size
=
6702 convert_to_section_size_type(shdr
.get_sh_size());
6703 const unsigned char* view
=
6704 this->get_view(section_offset
, section_size
, true, false);
6705 this->attributes_section_data_
=
6706 new Attributes_section_data(view
, section_size
);
6708 else if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6710 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6711 if (text_shndx
== elfcpp::SHN_UNDEF
)
6712 deferred_exidx_sections
.push_back(i
);
6715 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6716 + text_shndx
* shdr_size
);
6717 this->make_exidx_input_section(i
, shdr
, text_shndx
, text_shdr
);
6719 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6720 if ((shdr
.get_sh_flags() & elfcpp::SHF_LINK_ORDER
) == 0)
6721 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6722 this->section_name(i
).c_str(), this->name().c_str());
6727 if (!must_merge_flags_and_attributes
)
6729 gold_assert(deferred_exidx_sections
.empty());
6730 this->merge_flags_and_attributes_
= false;
6734 // Some tools are broken and they do not set the link of EXIDX sections.
6735 // We look at the first relocation to figure out the linked sections.
6736 if (!deferred_exidx_sections
.empty())
6738 // We need to go over the section headers again to find the mapping
6739 // from sections being relocated to their relocation sections. This is
6740 // a bit inefficient as we could do that in the loop above. However,
6741 // we do not expect any deferred EXIDX sections normally. So we do not
6742 // want to slow down the most common path.
6743 typedef Unordered_map
<unsigned int, unsigned int> Reloc_map
;
6744 Reloc_map reloc_map
;
6745 ps
= pshdrs
+ shdr_size
;
6746 for (unsigned int i
= 1; i
< this->shnum(); ++i
, ps
+= shdr_size
)
6748 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6749 elfcpp::Elf_Word sh_type
= shdr
.get_sh_type();
6750 if (sh_type
== elfcpp::SHT_REL
|| sh_type
== elfcpp::SHT_RELA
)
6752 unsigned int info_shndx
= this->adjust_shndx(shdr
.get_sh_info());
6753 if (info_shndx
>= this->shnum())
6754 gold_error(_("relocation section %u has invalid info %u"),
6756 Reloc_map::value_type
value(info_shndx
, i
);
6757 std::pair
<Reloc_map::iterator
, bool> result
=
6758 reloc_map
.insert(value
);
6760 gold_error(_("section %u has multiple relocation sections "
6762 info_shndx
, i
, reloc_map
[info_shndx
]);
6766 // Read the symbol table section header.
6767 const unsigned int symtab_shndx
= this->symtab_shndx();
6768 elfcpp::Shdr
<32, big_endian
>
6769 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6770 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6772 // Read the local symbols.
6773 const int sym_size
=elfcpp::Elf_sizes
<32>::sym_size
;
6774 const unsigned int loccount
= this->local_symbol_count();
6775 gold_assert(loccount
== symtabshdr
.get_sh_info());
6776 off_t locsize
= loccount
* sym_size
;
6777 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6778 locsize
, true, true);
6780 // Process the deferred EXIDX sections.
6781 for (unsigned int i
= 0; i
< deferred_exidx_sections
.size(); ++i
)
6783 unsigned int shndx
= deferred_exidx_sections
[i
];
6784 elfcpp::Shdr
<32, big_endian
> shdr(pshdrs
+ shndx
* shdr_size
);
6785 unsigned int text_shndx
= elfcpp::SHN_UNDEF
;
6786 Reloc_map::const_iterator it
= reloc_map
.find(shndx
);
6787 if (it
!= reloc_map
.end())
6788 find_linked_text_section(pshdrs
+ it
->second
* shdr_size
,
6789 psyms
, &text_shndx
);
6790 elfcpp::Shdr
<32, big_endian
> text_shdr(pshdrs
6791 + text_shndx
* shdr_size
);
6792 this->make_exidx_input_section(shndx
, shdr
, text_shndx
, text_shdr
);
6797 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6798 // sections for unwinding. These sections are referenced implicitly by
6799 // text sections linked in the section headers. If we ignore these implicit
6800 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6801 // will be garbage-collected incorrectly. Hence we override the same function
6802 // in the base class to handle these implicit references.
6804 template<bool big_endian
>
6806 Arm_relobj
<big_endian
>::do_gc_process_relocs(Symbol_table
* symtab
,
6808 Read_relocs_data
* rd
)
6810 // First, call base class method to process relocations in this object.
6811 Sized_relobj_file
<32, big_endian
>::do_gc_process_relocs(symtab
, layout
, rd
);
6813 // If --gc-sections is not specified, there is nothing more to do.
6814 // This happens when --icf is used but --gc-sections is not.
6815 if (!parameters
->options().gc_sections())
6818 unsigned int shnum
= this->shnum();
6819 const unsigned int shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6820 const unsigned char* pshdrs
= this->get_view(this->elf_file()->shoff(),
6824 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6825 // to these from the linked text sections.
6826 const unsigned char* ps
= pshdrs
+ shdr_size
;
6827 for (unsigned int i
= 1; i
< shnum
; ++i
, ps
+= shdr_size
)
6829 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6830 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_EXIDX
)
6832 // Found an .ARM.exidx section, add it to the set of reachable
6833 // sections from its linked text section.
6834 unsigned int text_shndx
= this->adjust_shndx(shdr
.get_sh_link());
6835 symtab
->gc()->add_reference(this, text_shndx
, this, i
);
6840 // Update output local symbol count. Owing to EXIDX entry merging, some local
6841 // symbols will be removed in output. Adjust output local symbol count
6842 // accordingly. We can only changed the static output local symbol count. It
6843 // is too late to change the dynamic symbols.
6845 template<bool big_endian
>
6847 Arm_relobj
<big_endian
>::update_output_local_symbol_count()
6849 // Caller should check that this needs updating. We want caller checking
6850 // because output_local_symbol_count_needs_update() is most likely inlined.
6851 gold_assert(this->output_local_symbol_count_needs_update_
);
6853 gold_assert(this->symtab_shndx() != -1U);
6854 if (this->symtab_shndx() == 0)
6856 // This object has no symbols. Weird but legal.
6860 // Read the symbol table section header.
6861 const unsigned int symtab_shndx
= this->symtab_shndx();
6862 elfcpp::Shdr
<32, big_endian
>
6863 symtabshdr(this, this->elf_file()->section_header(symtab_shndx
));
6864 gold_assert(symtabshdr
.get_sh_type() == elfcpp::SHT_SYMTAB
);
6866 // Read the local symbols.
6867 const int sym_size
= elfcpp::Elf_sizes
<32>::sym_size
;
6868 const unsigned int loccount
= this->local_symbol_count();
6869 gold_assert(loccount
== symtabshdr
.get_sh_info());
6870 off_t locsize
= loccount
* sym_size
;
6871 const unsigned char* psyms
= this->get_view(symtabshdr
.get_sh_offset(),
6872 locsize
, true, true);
6874 // Loop over the local symbols.
6876 typedef typename Sized_relobj_file
<32, big_endian
>::Output_sections
6878 const Output_sections
& out_sections(this->output_sections());
6879 unsigned int shnum
= this->shnum();
6880 unsigned int count
= 0;
6881 // Skip the first, dummy, symbol.
6883 for (unsigned int i
= 1; i
< loccount
; ++i
, psyms
+= sym_size
)
6885 elfcpp::Sym
<32, big_endian
> sym(psyms
);
6887 Symbol_value
<32>& lv((*this->local_values())[i
]);
6889 // This local symbol was already discarded by do_count_local_symbols.
6890 if (lv
.is_output_symtab_index_set() && !lv
.has_output_symtab_entry())
6894 unsigned int shndx
= this->adjust_sym_shndx(i
, sym
.get_st_shndx(),
6899 Output_section
* os
= out_sections
[shndx
];
6901 // This local symbol no longer has an output section. Discard it.
6904 lv
.set_no_output_symtab_entry();
6908 // Currently we only discard parts of EXIDX input sections.
6909 // We explicitly check for a merged EXIDX input section to avoid
6910 // calling Output_section_data::output_offset unless necessary.
6911 if ((this->get_output_section_offset(shndx
) == invalid_address
)
6912 && (this->exidx_input_section_by_shndx(shndx
) != NULL
))
6914 section_offset_type output_offset
=
6915 os
->output_offset(this, shndx
, lv
.input_value());
6916 if (output_offset
== -1)
6918 // This symbol is defined in a part of an EXIDX input section
6919 // that is discarded due to entry merging.
6920 lv
.set_no_output_symtab_entry();
6929 this->set_output_local_symbol_count(count
);
6930 this->output_local_symbol_count_needs_update_
= false;
6933 // Arm_dynobj methods.
6935 // Read the symbol information.
6937 template<bool big_endian
>
6939 Arm_dynobj
<big_endian
>::do_read_symbols(Read_symbols_data
* sd
)
6941 // Call parent class to read symbol information.
6942 Sized_dynobj
<32, big_endian
>::do_read_symbols(sd
);
6944 // Read processor-specific flags in ELF file header.
6945 const unsigned char* pehdr
= this->get_view(elfcpp::file_header_offset
,
6946 elfcpp::Elf_sizes
<32>::ehdr_size
,
6948 elfcpp::Ehdr
<32, big_endian
> ehdr(pehdr
);
6949 this->processor_specific_flags_
= ehdr
.get_e_flags();
6951 // Read the attributes section if there is one.
6952 // We read from the end because gas seems to put it near the end of
6953 // the section headers.
6954 const size_t shdr_size
= elfcpp::Elf_sizes
<32>::shdr_size
;
6955 const unsigned char* ps
=
6956 sd
->section_headers
->data() + shdr_size
* (this->shnum() - 1);
6957 for (unsigned int i
= this->shnum(); i
> 0; --i
, ps
-= shdr_size
)
6959 elfcpp::Shdr
<32, big_endian
> shdr(ps
);
6960 if (shdr
.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES
)
6962 section_offset_type section_offset
= shdr
.get_sh_offset();
6963 section_size_type section_size
=
6964 convert_to_section_size_type(shdr
.get_sh_size());
6965 const unsigned char* view
=
6966 this->get_view(section_offset
, section_size
, true, false);
6967 this->attributes_section_data_
=
6968 new Attributes_section_data(view
, section_size
);
6974 // Stub_addend_reader methods.
6976 // Read the addend of a REL relocation of type R_TYPE at VIEW.
6978 template<bool big_endian
>
6979 elfcpp::Elf_types
<32>::Elf_Swxword
6980 Stub_addend_reader
<elfcpp::SHT_REL
, big_endian
>::operator()(
6981 unsigned int r_type
,
6982 const unsigned char* view
,
6983 const typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc
&) const
6985 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
6989 case elfcpp::R_ARM_CALL
:
6990 case elfcpp::R_ARM_JUMP24
:
6991 case elfcpp::R_ARM_PLT32
:
6993 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
6994 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
6995 Valtype val
= elfcpp::Swap
<32, big_endian
>::readval(wv
);
6996 return Bits
<26>::sign_extend32(val
<< 2);
6999 case elfcpp::R_ARM_THM_CALL
:
7000 case elfcpp::R_ARM_THM_JUMP24
:
7001 case elfcpp::R_ARM_THM_XPC22
:
7003 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7004 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7005 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7006 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7007 return RelocFuncs::thumb32_branch_offset(upper_insn
, lower_insn
);
7010 case elfcpp::R_ARM_THM_JUMP19
:
7012 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
7013 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
);
7014 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
7015 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
7016 return RelocFuncs::thumb32_cond_branch_offset(upper_insn
, lower_insn
);
7024 // Arm_output_data_got methods.
7026 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7027 // The first one is initialized to be 1, which is the module index for
7028 // the main executable and the second one 0. A reloc of the type
7029 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7030 // be applied by gold. GSYM is a global symbol.
7032 template<bool big_endian
>
7034 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7035 unsigned int got_type
,
7038 if (gsym
->has_got_offset(got_type
))
7041 // We are doing a static link. Just mark it as belong to module 1,
7043 unsigned int got_offset
= this->add_constant(1);
7044 gsym
->set_got_offset(got_type
, got_offset
);
7045 got_offset
= this->add_constant(0);
7046 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7047 elfcpp::R_ARM_TLS_DTPOFF32
,
7051 // Same as the above but for a local symbol.
7053 template<bool big_endian
>
7055 Arm_output_data_got
<big_endian
>::add_tls_gd32_with_static_reloc(
7056 unsigned int got_type
,
7057 Sized_relobj_file
<32, big_endian
>* object
,
7060 if (object
->local_has_got_offset(index
, got_type
))
7063 // We are doing a static link. Just mark it as belong to module 1,
7065 unsigned int got_offset
= this->add_constant(1);
7066 object
->set_local_got_offset(index
, got_type
, got_offset
);
7067 got_offset
= this->add_constant(0);
7068 this->static_relocs_
.push_back(Static_reloc(got_offset
,
7069 elfcpp::R_ARM_TLS_DTPOFF32
,
7073 template<bool big_endian
>
7075 Arm_output_data_got
<big_endian
>::do_write(Output_file
* of
)
7077 // Call parent to write out GOT.
7078 Output_data_got
<32, big_endian
>::do_write(of
);
7080 // We are done if there is no fix up.
7081 if (this->static_relocs_
.empty())
7084 gold_assert(parameters
->doing_static_link());
7086 const off_t offset
= this->offset();
7087 const section_size_type oview_size
=
7088 convert_to_section_size_type(this->data_size());
7089 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7091 Output_segment
* tls_segment
= this->layout_
->tls_segment();
7092 gold_assert(tls_segment
!= NULL
);
7094 // The thread pointer $tp points to the TCB, which is followed by the
7095 // TLS. So we need to adjust $tp relative addressing by this amount.
7096 Arm_address aligned_tcb_size
=
7097 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
7099 for (size_t i
= 0; i
< this->static_relocs_
.size(); ++i
)
7101 Static_reloc
& reloc(this->static_relocs_
[i
]);
7104 if (!reloc
.symbol_is_global())
7106 Sized_relobj_file
<32, big_endian
>* object
= reloc
.relobj();
7107 const Symbol_value
<32>* psymval
=
7108 reloc
.relobj()->local_symbol(reloc
.index());
7110 // We are doing static linking. Issue an error and skip this
7111 // relocation if the symbol is undefined or in a discarded_section.
7113 unsigned int shndx
= psymval
->input_shndx(&is_ordinary
);
7114 if ((shndx
== elfcpp::SHN_UNDEF
)
7116 && shndx
!= elfcpp::SHN_UNDEF
7117 && !object
->is_section_included(shndx
)
7118 && !this->symbol_table_
->is_section_folded(object
, shndx
)))
7120 gold_error(_("undefined or discarded local symbol %u from "
7121 " object %s in GOT"),
7122 reloc
.index(), reloc
.relobj()->name().c_str());
7126 value
= psymval
->value(object
, 0);
7130 const Symbol
* gsym
= reloc
.symbol();
7131 gold_assert(gsym
!= NULL
);
7132 if (gsym
->is_forwarder())
7133 gsym
= this->symbol_table_
->resolve_forwards(gsym
);
7135 // We are doing static linking. Issue an error and skip this
7136 // relocation if the symbol is undefined or in a discarded_section
7137 // unless it is a weakly_undefined symbol.
7138 if ((gsym
->is_defined_in_discarded_section()
7139 || gsym
->is_undefined())
7140 && !gsym
->is_weak_undefined())
7142 gold_error(_("undefined or discarded symbol %s in GOT"),
7147 if (!gsym
->is_weak_undefined())
7149 const Sized_symbol
<32>* sym
=
7150 static_cast<const Sized_symbol
<32>*>(gsym
);
7151 value
= sym
->value();
7157 unsigned got_offset
= reloc
.got_offset();
7158 gold_assert(got_offset
< oview_size
);
7160 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
7161 Valtype
* wv
= reinterpret_cast<Valtype
*>(oview
+ got_offset
);
7163 switch (reloc
.r_type())
7165 case elfcpp::R_ARM_TLS_DTPOFF32
:
7168 case elfcpp::R_ARM_TLS_TPOFF32
:
7169 x
= value
+ aligned_tcb_size
;
7174 elfcpp::Swap
<32, big_endian
>::writeval(wv
, x
);
7177 of
->write_output_view(offset
, oview_size
, oview
);
7180 // A class to handle the PLT data.
7182 template<bool big_endian
>
7183 class Output_data_plt_arm
: public Output_section_data
7186 typedef Output_data_reloc
<elfcpp::SHT_REL
, true, 32, big_endian
>
7189 Output_data_plt_arm(Layout
*, Output_data_space
*);
7191 // Add an entry to the PLT.
7193 add_entry(Symbol
* gsym
);
7195 // Return the .rel.plt section data.
7196 const Reloc_section
*
7198 { return this->rel_
; }
7200 // Return the number of PLT entries.
7203 { return this->count_
; }
7205 // Return the offset of the first non-reserved PLT entry.
7207 first_plt_entry_offset()
7208 { return sizeof(first_plt_entry
); }
7210 // Return the size of a PLT entry.
7212 get_plt_entry_size()
7213 { return sizeof(plt_entry
); }
7217 do_adjust_output_section(Output_section
* os
);
7219 // Write to a map file.
7221 do_print_to_mapfile(Mapfile
* mapfile
) const
7222 { mapfile
->print_output_data(this, _("** PLT")); }
7225 // Template for the first PLT entry.
7226 static const uint32_t first_plt_entry
[5];
7228 // Template for subsequent PLT entries.
7229 static const uint32_t plt_entry
[3];
7231 // Set the final size.
7233 set_final_data_size()
7235 this->set_data_size(sizeof(first_plt_entry
)
7236 + this->count_
* sizeof(plt_entry
));
7239 // Write out the PLT data.
7241 do_write(Output_file
*);
7243 // The reloc section.
7244 Reloc_section
* rel_
;
7245 // The .got.plt section.
7246 Output_data_space
* got_plt_
;
7247 // The number of PLT entries.
7248 unsigned int count_
;
7251 // Create the PLT section. The ordinary .got section is an argument,
7252 // since we need to refer to the start. We also create our own .got
7253 // section just for PLT entries.
7255 template<bool big_endian
>
7256 Output_data_plt_arm
<big_endian
>::Output_data_plt_arm(Layout
* layout
,
7257 Output_data_space
* got_plt
)
7258 : Output_section_data(4), got_plt_(got_plt
), count_(0)
7260 this->rel_
= new Reloc_section(false);
7261 layout
->add_output_section_data(".rel.plt", elfcpp::SHT_REL
,
7262 elfcpp::SHF_ALLOC
, this->rel_
,
7263 ORDER_DYNAMIC_PLT_RELOCS
, false);
7266 template<bool big_endian
>
7268 Output_data_plt_arm
<big_endian
>::do_adjust_output_section(Output_section
* os
)
7273 // Add an entry to the PLT.
7275 template<bool big_endian
>
7277 Output_data_plt_arm
<big_endian
>::add_entry(Symbol
* gsym
)
7279 gold_assert(!gsym
->has_plt_offset());
7281 // Note that when setting the PLT offset we skip the initial
7282 // reserved PLT entry.
7283 gsym
->set_plt_offset((this->count_
) * sizeof(plt_entry
)
7284 + sizeof(first_plt_entry
));
7288 section_offset_type got_offset
= this->got_plt_
->current_data_size();
7290 // Every PLT entry needs a GOT entry which points back to the PLT
7291 // entry (this will be changed by the dynamic linker, normally
7292 // lazily when the function is called).
7293 this->got_plt_
->set_current_data_size(got_offset
+ 4);
7295 // Every PLT entry needs a reloc.
7296 gsym
->set_needs_dynsym_entry();
7297 this->rel_
->add_global(gsym
, elfcpp::R_ARM_JUMP_SLOT
, this->got_plt_
,
7300 // Note that we don't need to save the symbol. The contents of the
7301 // PLT are independent of which symbols are used. The symbols only
7302 // appear in the relocations.
7306 // FIXME: This is not very flexible. Right now this has only been tested
7307 // on armv5te. If we are to support additional architecture features like
7308 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7310 // The first entry in the PLT.
7311 template<bool big_endian
>
7312 const uint32_t Output_data_plt_arm
<big_endian
>::first_plt_entry
[5] =
7314 0xe52de004, // str lr, [sp, #-4]!
7315 0xe59fe004, // ldr lr, [pc, #4]
7316 0xe08fe00e, // add lr, pc, lr
7317 0xe5bef008, // ldr pc, [lr, #8]!
7318 0x00000000, // &GOT[0] - .
7321 // Subsequent entries in the PLT.
7323 template<bool big_endian
>
7324 const uint32_t Output_data_plt_arm
<big_endian
>::plt_entry
[3] =
7326 0xe28fc600, // add ip, pc, #0xNN00000
7327 0xe28cca00, // add ip, ip, #0xNN000
7328 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7331 // Write out the PLT. This uses the hand-coded instructions above,
7332 // and adjusts them as needed. This is all specified by the arm ELF
7333 // Processor Supplement.
7335 template<bool big_endian
>
7337 Output_data_plt_arm
<big_endian
>::do_write(Output_file
* of
)
7339 const off_t offset
= this->offset();
7340 const section_size_type oview_size
=
7341 convert_to_section_size_type(this->data_size());
7342 unsigned char* const oview
= of
->get_output_view(offset
, oview_size
);
7344 const off_t got_file_offset
= this->got_plt_
->offset();
7345 const section_size_type got_size
=
7346 convert_to_section_size_type(this->got_plt_
->data_size());
7347 unsigned char* const got_view
= of
->get_output_view(got_file_offset
,
7349 unsigned char* pov
= oview
;
7351 Arm_address plt_address
= this->address();
7352 Arm_address got_address
= this->got_plt_
->address();
7354 // Write first PLT entry. All but the last word are constants.
7355 const size_t num_first_plt_words
= (sizeof(first_plt_entry
)
7356 / sizeof(plt_entry
[0]));
7357 for (size_t i
= 0; i
< num_first_plt_words
- 1; i
++)
7358 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ i
* 4, first_plt_entry
[i
]);
7359 // Last word in first PLT entry is &GOT[0] - .
7360 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 16,
7361 got_address
- (plt_address
+ 16));
7362 pov
+= sizeof(first_plt_entry
);
7364 unsigned char* got_pov
= got_view
;
7366 memset(got_pov
, 0, 12);
7369 const int rel_size
= elfcpp::Elf_sizes
<32>::rel_size
;
7370 unsigned int plt_offset
= sizeof(first_plt_entry
);
7371 unsigned int plt_rel_offset
= 0;
7372 unsigned int got_offset
= 12;
7373 const unsigned int count
= this->count_
;
7374 for (unsigned int i
= 0;
7377 pov
+= sizeof(plt_entry
),
7379 plt_offset
+= sizeof(plt_entry
),
7380 plt_rel_offset
+= rel_size
,
7383 // Set and adjust the PLT entry itself.
7384 int32_t offset
= ((got_address
+ got_offset
)
7385 - (plt_address
+ plt_offset
+ 8));
7387 gold_assert(offset
>= 0 && offset
< 0x0fffffff);
7388 uint32_t plt_insn0
= plt_entry
[0] | ((offset
>> 20) & 0xff);
7389 elfcpp::Swap
<32, big_endian
>::writeval(pov
, plt_insn0
);
7390 uint32_t plt_insn1
= plt_entry
[1] | ((offset
>> 12) & 0xff);
7391 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 4, plt_insn1
);
7392 uint32_t plt_insn2
= plt_entry
[2] | (offset
& 0xfff);
7393 elfcpp::Swap
<32, big_endian
>::writeval(pov
+ 8, plt_insn2
);
7395 // Set the entry in the GOT.
7396 elfcpp::Swap
<32, big_endian
>::writeval(got_pov
, plt_address
);
7399 gold_assert(static_cast<section_size_type
>(pov
- oview
) == oview_size
);
7400 gold_assert(static_cast<section_size_type
>(got_pov
- got_view
) == got_size
);
7402 of
->write_output_view(offset
, oview_size
, oview
);
7403 of
->write_output_view(got_file_offset
, got_size
, got_view
);
7406 // Create a PLT entry for a global symbol.
7408 template<bool big_endian
>
7410 Target_arm
<big_endian
>::make_plt_entry(Symbol_table
* symtab
, Layout
* layout
,
7413 if (gsym
->has_plt_offset())
7416 if (this->plt_
== NULL
)
7418 // Create the GOT sections first.
7419 this->got_section(symtab
, layout
);
7421 this->plt_
= new Output_data_plt_arm
<big_endian
>(layout
, this->got_plt_
);
7422 layout
->add_output_section_data(".plt", elfcpp::SHT_PROGBITS
,
7424 | elfcpp::SHF_EXECINSTR
),
7425 this->plt_
, ORDER_PLT
, false);
7427 this->plt_
->add_entry(gsym
);
7430 // Return the number of entries in the PLT.
7432 template<bool big_endian
>
7434 Target_arm
<big_endian
>::plt_entry_count() const
7436 if (this->plt_
== NULL
)
7438 return this->plt_
->entry_count();
7441 // Return the offset of the first non-reserved PLT entry.
7443 template<bool big_endian
>
7445 Target_arm
<big_endian
>::first_plt_entry_offset() const
7447 return Output_data_plt_arm
<big_endian
>::first_plt_entry_offset();
7450 // Return the size of each PLT entry.
7452 template<bool big_endian
>
7454 Target_arm
<big_endian
>::plt_entry_size() const
7456 return Output_data_plt_arm
<big_endian
>::get_plt_entry_size();
7459 // Get the section to use for TLS_DESC relocations.
7461 template<bool big_endian
>
7462 typename Target_arm
<big_endian
>::Reloc_section
*
7463 Target_arm
<big_endian
>::rel_tls_desc_section(Layout
* layout
) const
7465 return this->plt_section()->rel_tls_desc(layout
);
7468 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7470 template<bool big_endian
>
7472 Target_arm
<big_endian
>::define_tls_base_symbol(
7473 Symbol_table
* symtab
,
7476 if (this->tls_base_symbol_defined_
)
7479 Output_segment
* tls_segment
= layout
->tls_segment();
7480 if (tls_segment
!= NULL
)
7482 bool is_exec
= parameters
->options().output_is_executable();
7483 symtab
->define_in_output_segment("_TLS_MODULE_BASE_", NULL
,
7484 Symbol_table::PREDEFINED
,
7488 elfcpp::STV_HIDDEN
, 0,
7490 ? Symbol::SEGMENT_END
7491 : Symbol::SEGMENT_START
),
7494 this->tls_base_symbol_defined_
= true;
7497 // Create a GOT entry for the TLS module index.
7499 template<bool big_endian
>
7501 Target_arm
<big_endian
>::got_mod_index_entry(
7502 Symbol_table
* symtab
,
7504 Sized_relobj_file
<32, big_endian
>* object
)
7506 if (this->got_mod_index_offset_
== -1U)
7508 gold_assert(symtab
!= NULL
&& layout
!= NULL
&& object
!= NULL
);
7509 Arm_output_data_got
<big_endian
>* got
= this->got_section(symtab
, layout
);
7510 unsigned int got_offset
;
7511 if (!parameters
->doing_static_link())
7513 got_offset
= got
->add_constant(0);
7514 Reloc_section
* rel_dyn
= this->rel_dyn_section(layout
);
7515 rel_dyn
->add_local(object
, 0, elfcpp::R_ARM_TLS_DTPMOD32
, got
,
7520 // We are doing a static link. Just mark it as belong to module 1,
7522 got_offset
= got
->add_constant(1);
7525 got
->add_constant(0);
7526 this->got_mod_index_offset_
= got_offset
;
7528 return this->got_mod_index_offset_
;
7531 // Optimize the TLS relocation type based on what we know about the
7532 // symbol. IS_FINAL is true if the final address of this symbol is
7533 // known at link time.
7535 template<bool big_endian
>
7536 tls::Tls_optimization
7537 Target_arm
<big_endian
>::optimize_tls_reloc(bool, int)
7539 // FIXME: Currently we do not do any TLS optimization.
7540 return tls::TLSOPT_NONE
;
7543 // Get the Reference_flags for a particular relocation.
7545 template<bool big_endian
>
7547 Target_arm
<big_endian
>::Scan::get_reference_flags(unsigned int r_type
)
7551 case elfcpp::R_ARM_NONE
:
7552 case elfcpp::R_ARM_V4BX
:
7553 case elfcpp::R_ARM_GNU_VTENTRY
:
7554 case elfcpp::R_ARM_GNU_VTINHERIT
:
7555 // No symbol reference.
7558 case elfcpp::R_ARM_ABS32
:
7559 case elfcpp::R_ARM_ABS16
:
7560 case elfcpp::R_ARM_ABS12
:
7561 case elfcpp::R_ARM_THM_ABS5
:
7562 case elfcpp::R_ARM_ABS8
:
7563 case elfcpp::R_ARM_BASE_ABS
:
7564 case elfcpp::R_ARM_MOVW_ABS_NC
:
7565 case elfcpp::R_ARM_MOVT_ABS
:
7566 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7567 case elfcpp::R_ARM_THM_MOVT_ABS
:
7568 case elfcpp::R_ARM_ABS32_NOI
:
7569 return Symbol::ABSOLUTE_REF
;
7571 case elfcpp::R_ARM_REL32
:
7572 case elfcpp::R_ARM_LDR_PC_G0
:
7573 case elfcpp::R_ARM_SBREL32
:
7574 case elfcpp::R_ARM_THM_PC8
:
7575 case elfcpp::R_ARM_BASE_PREL
:
7576 case elfcpp::R_ARM_MOVW_PREL_NC
:
7577 case elfcpp::R_ARM_MOVT_PREL
:
7578 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7579 case elfcpp::R_ARM_THM_MOVT_PREL
:
7580 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7581 case elfcpp::R_ARM_THM_PC12
:
7582 case elfcpp::R_ARM_REL32_NOI
:
7583 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7584 case elfcpp::R_ARM_ALU_PC_G0
:
7585 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7586 case elfcpp::R_ARM_ALU_PC_G1
:
7587 case elfcpp::R_ARM_ALU_PC_G2
:
7588 case elfcpp::R_ARM_LDR_PC_G1
:
7589 case elfcpp::R_ARM_LDR_PC_G2
:
7590 case elfcpp::R_ARM_LDRS_PC_G0
:
7591 case elfcpp::R_ARM_LDRS_PC_G1
:
7592 case elfcpp::R_ARM_LDRS_PC_G2
:
7593 case elfcpp::R_ARM_LDC_PC_G0
:
7594 case elfcpp::R_ARM_LDC_PC_G1
:
7595 case elfcpp::R_ARM_LDC_PC_G2
:
7596 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7597 case elfcpp::R_ARM_ALU_SB_G0
:
7598 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7599 case elfcpp::R_ARM_ALU_SB_G1
:
7600 case elfcpp::R_ARM_ALU_SB_G2
:
7601 case elfcpp::R_ARM_LDR_SB_G0
:
7602 case elfcpp::R_ARM_LDR_SB_G1
:
7603 case elfcpp::R_ARM_LDR_SB_G2
:
7604 case elfcpp::R_ARM_LDRS_SB_G0
:
7605 case elfcpp::R_ARM_LDRS_SB_G1
:
7606 case elfcpp::R_ARM_LDRS_SB_G2
:
7607 case elfcpp::R_ARM_LDC_SB_G0
:
7608 case elfcpp::R_ARM_LDC_SB_G1
:
7609 case elfcpp::R_ARM_LDC_SB_G2
:
7610 case elfcpp::R_ARM_MOVW_BREL_NC
:
7611 case elfcpp::R_ARM_MOVT_BREL
:
7612 case elfcpp::R_ARM_MOVW_BREL
:
7613 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7614 case elfcpp::R_ARM_THM_MOVT_BREL
:
7615 case elfcpp::R_ARM_THM_MOVW_BREL
:
7616 case elfcpp::R_ARM_GOTOFF32
:
7617 case elfcpp::R_ARM_GOTOFF12
:
7618 case elfcpp::R_ARM_SBREL31
:
7619 return Symbol::RELATIVE_REF
;
7621 case elfcpp::R_ARM_PLT32
:
7622 case elfcpp::R_ARM_CALL
:
7623 case elfcpp::R_ARM_JUMP24
:
7624 case elfcpp::R_ARM_THM_CALL
:
7625 case elfcpp::R_ARM_THM_JUMP24
:
7626 case elfcpp::R_ARM_THM_JUMP19
:
7627 case elfcpp::R_ARM_THM_JUMP6
:
7628 case elfcpp::R_ARM_THM_JUMP11
:
7629 case elfcpp::R_ARM_THM_JUMP8
:
7630 // R_ARM_PREL31 is not used to relocate call/jump instructions but
7631 // in unwind tables. It may point to functions via PLTs.
7632 // So we treat it like call/jump relocations above.
7633 case elfcpp::R_ARM_PREL31
:
7634 return Symbol::FUNCTION_CALL
| Symbol::RELATIVE_REF
;
7636 case elfcpp::R_ARM_GOT_BREL
:
7637 case elfcpp::R_ARM_GOT_ABS
:
7638 case elfcpp::R_ARM_GOT_PREL
:
7640 return Symbol::ABSOLUTE_REF
;
7642 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7643 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7644 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7645 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7646 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7647 return Symbol::TLS_REF
;
7649 case elfcpp::R_ARM_TARGET1
:
7650 case elfcpp::R_ARM_TARGET2
:
7651 case elfcpp::R_ARM_COPY
:
7652 case elfcpp::R_ARM_GLOB_DAT
:
7653 case elfcpp::R_ARM_JUMP_SLOT
:
7654 case elfcpp::R_ARM_RELATIVE
:
7655 case elfcpp::R_ARM_PC24
:
7656 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
7657 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
7658 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
7660 // Not expected. We will give an error later.
7665 // Report an unsupported relocation against a local symbol.
7667 template<bool big_endian
>
7669 Target_arm
<big_endian
>::Scan::unsupported_reloc_local(
7670 Sized_relobj_file
<32, big_endian
>* object
,
7671 unsigned int r_type
)
7673 gold_error(_("%s: unsupported reloc %u against local symbol"),
7674 object
->name().c_str(), r_type
);
7677 // We are about to emit a dynamic relocation of type R_TYPE. If the
7678 // dynamic linker does not support it, issue an error. The GNU linker
7679 // only issues a non-PIC error for an allocated read-only section.
7680 // Here we know the section is allocated, but we don't know that it is
7681 // read-only. But we check for all the relocation types which the
7682 // glibc dynamic linker supports, so it seems appropriate to issue an
7683 // error even if the section is not read-only.
7685 template<bool big_endian
>
7687 Target_arm
<big_endian
>::Scan::check_non_pic(Relobj
* object
,
7688 unsigned int r_type
)
7692 // These are the relocation types supported by glibc for ARM.
7693 case elfcpp::R_ARM_RELATIVE
:
7694 case elfcpp::R_ARM_COPY
:
7695 case elfcpp::R_ARM_GLOB_DAT
:
7696 case elfcpp::R_ARM_JUMP_SLOT
:
7697 case elfcpp::R_ARM_ABS32
:
7698 case elfcpp::R_ARM_ABS32_NOI
:
7699 case elfcpp::R_ARM_PC24
:
7700 // FIXME: The following 3 types are not supported by Android's dynamic
7702 case elfcpp::R_ARM_TLS_DTPMOD32
:
7703 case elfcpp::R_ARM_TLS_DTPOFF32
:
7704 case elfcpp::R_ARM_TLS_TPOFF32
:
7709 // This prevents us from issuing more than one error per reloc
7710 // section. But we can still wind up issuing more than one
7711 // error per object file.
7712 if (this->issued_non_pic_error_
)
7714 const Arm_reloc_property
* reloc_property
=
7715 arm_reloc_property_table
->get_reloc_property(r_type
);
7716 gold_assert(reloc_property
!= NULL
);
7717 object
->error(_("requires unsupported dynamic reloc %s; "
7718 "recompile with -fPIC"),
7719 reloc_property
->name().c_str());
7720 this->issued_non_pic_error_
= true;
7724 case elfcpp::R_ARM_NONE
:
7729 // Scan a relocation for a local symbol.
7730 // FIXME: This only handles a subset of relocation types used by Android
7731 // on ARM v5te devices.
7733 template<bool big_endian
>
7735 Target_arm
<big_endian
>::Scan::local(Symbol_table
* symtab
,
7738 Sized_relobj_file
<32, big_endian
>* object
,
7739 unsigned int data_shndx
,
7740 Output_section
* output_section
,
7741 const elfcpp::Rel
<32, big_endian
>& reloc
,
7742 unsigned int r_type
,
7743 const elfcpp::Sym
<32, big_endian
>& lsym
)
7745 r_type
= get_real_reloc_type(r_type
);
7748 case elfcpp::R_ARM_NONE
:
7749 case elfcpp::R_ARM_V4BX
:
7750 case elfcpp::R_ARM_GNU_VTENTRY
:
7751 case elfcpp::R_ARM_GNU_VTINHERIT
:
7754 case elfcpp::R_ARM_ABS32
:
7755 case elfcpp::R_ARM_ABS32_NOI
:
7756 // If building a shared library (or a position-independent
7757 // executable), we need to create a dynamic relocation for
7758 // this location. The relocation applied at link time will
7759 // apply the link-time value, so we flag the location with
7760 // an R_ARM_RELATIVE relocation so the dynamic loader can
7761 // relocate it easily.
7762 if (parameters
->options().output_is_position_independent())
7764 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7765 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7766 // If we are to add more other reloc types than R_ARM_ABS32,
7767 // we need to add check_non_pic(object, r_type) here.
7768 rel_dyn
->add_local_relative(object
, r_sym
, elfcpp::R_ARM_RELATIVE
,
7769 output_section
, data_shndx
,
7770 reloc
.get_r_offset());
7774 case elfcpp::R_ARM_ABS16
:
7775 case elfcpp::R_ARM_ABS12
:
7776 case elfcpp::R_ARM_THM_ABS5
:
7777 case elfcpp::R_ARM_ABS8
:
7778 case elfcpp::R_ARM_BASE_ABS
:
7779 case elfcpp::R_ARM_MOVW_ABS_NC
:
7780 case elfcpp::R_ARM_MOVT_ABS
:
7781 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
7782 case elfcpp::R_ARM_THM_MOVT_ABS
:
7783 // If building a shared library (or a position-independent
7784 // executable), we need to create a dynamic relocation for
7785 // this location. Because the addend needs to remain in the
7786 // data section, we need to be careful not to apply this
7787 // relocation statically.
7788 if (parameters
->options().output_is_position_independent())
7790 check_non_pic(object
, r_type
);
7791 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7792 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7793 if (lsym
.get_st_type() != elfcpp::STT_SECTION
)
7794 rel_dyn
->add_local(object
, r_sym
, r_type
, output_section
,
7795 data_shndx
, reloc
.get_r_offset());
7798 gold_assert(lsym
.get_st_value() == 0);
7799 unsigned int shndx
= lsym
.get_st_shndx();
7801 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
,
7804 object
->error(_("section symbol %u has bad shndx %u"),
7807 rel_dyn
->add_local_section(object
, shndx
,
7808 r_type
, output_section
,
7809 data_shndx
, reloc
.get_r_offset());
7814 case elfcpp::R_ARM_REL32
:
7815 case elfcpp::R_ARM_LDR_PC_G0
:
7816 case elfcpp::R_ARM_SBREL32
:
7817 case elfcpp::R_ARM_THM_CALL
:
7818 case elfcpp::R_ARM_THM_PC8
:
7819 case elfcpp::R_ARM_BASE_PREL
:
7820 case elfcpp::R_ARM_PLT32
:
7821 case elfcpp::R_ARM_CALL
:
7822 case elfcpp::R_ARM_JUMP24
:
7823 case elfcpp::R_ARM_THM_JUMP24
:
7824 case elfcpp::R_ARM_SBREL31
:
7825 case elfcpp::R_ARM_PREL31
:
7826 case elfcpp::R_ARM_MOVW_PREL_NC
:
7827 case elfcpp::R_ARM_MOVT_PREL
:
7828 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
7829 case elfcpp::R_ARM_THM_MOVT_PREL
:
7830 case elfcpp::R_ARM_THM_JUMP19
:
7831 case elfcpp::R_ARM_THM_JUMP6
:
7832 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
7833 case elfcpp::R_ARM_THM_PC12
:
7834 case elfcpp::R_ARM_REL32_NOI
:
7835 case elfcpp::R_ARM_ALU_PC_G0_NC
:
7836 case elfcpp::R_ARM_ALU_PC_G0
:
7837 case elfcpp::R_ARM_ALU_PC_G1_NC
:
7838 case elfcpp::R_ARM_ALU_PC_G1
:
7839 case elfcpp::R_ARM_ALU_PC_G2
:
7840 case elfcpp::R_ARM_LDR_PC_G1
:
7841 case elfcpp::R_ARM_LDR_PC_G2
:
7842 case elfcpp::R_ARM_LDRS_PC_G0
:
7843 case elfcpp::R_ARM_LDRS_PC_G1
:
7844 case elfcpp::R_ARM_LDRS_PC_G2
:
7845 case elfcpp::R_ARM_LDC_PC_G0
:
7846 case elfcpp::R_ARM_LDC_PC_G1
:
7847 case elfcpp::R_ARM_LDC_PC_G2
:
7848 case elfcpp::R_ARM_ALU_SB_G0_NC
:
7849 case elfcpp::R_ARM_ALU_SB_G0
:
7850 case elfcpp::R_ARM_ALU_SB_G1_NC
:
7851 case elfcpp::R_ARM_ALU_SB_G1
:
7852 case elfcpp::R_ARM_ALU_SB_G2
:
7853 case elfcpp::R_ARM_LDR_SB_G0
:
7854 case elfcpp::R_ARM_LDR_SB_G1
:
7855 case elfcpp::R_ARM_LDR_SB_G2
:
7856 case elfcpp::R_ARM_LDRS_SB_G0
:
7857 case elfcpp::R_ARM_LDRS_SB_G1
:
7858 case elfcpp::R_ARM_LDRS_SB_G2
:
7859 case elfcpp::R_ARM_LDC_SB_G0
:
7860 case elfcpp::R_ARM_LDC_SB_G1
:
7861 case elfcpp::R_ARM_LDC_SB_G2
:
7862 case elfcpp::R_ARM_MOVW_BREL_NC
:
7863 case elfcpp::R_ARM_MOVT_BREL
:
7864 case elfcpp::R_ARM_MOVW_BREL
:
7865 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
7866 case elfcpp::R_ARM_THM_MOVT_BREL
:
7867 case elfcpp::R_ARM_THM_MOVW_BREL
:
7868 case elfcpp::R_ARM_THM_JUMP11
:
7869 case elfcpp::R_ARM_THM_JUMP8
:
7870 // We don't need to do anything for a relative addressing relocation
7871 // against a local symbol if it does not reference the GOT.
7874 case elfcpp::R_ARM_GOTOFF32
:
7875 case elfcpp::R_ARM_GOTOFF12
:
7876 // We need a GOT section:
7877 target
->got_section(symtab
, layout
);
7880 case elfcpp::R_ARM_GOT_BREL
:
7881 case elfcpp::R_ARM_GOT_PREL
:
7883 // The symbol requires a GOT entry.
7884 Arm_output_data_got
<big_endian
>* got
=
7885 target
->got_section(symtab
, layout
);
7886 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7887 if (got
->add_local(object
, r_sym
, GOT_TYPE_STANDARD
))
7889 // If we are generating a shared object, we need to add a
7890 // dynamic RELATIVE relocation for this symbol's GOT entry.
7891 if (parameters
->options().output_is_position_independent())
7893 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
7894 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7895 rel_dyn
->add_local_relative(
7896 object
, r_sym
, elfcpp::R_ARM_RELATIVE
, got
,
7897 object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
));
7903 case elfcpp::R_ARM_TARGET1
:
7904 case elfcpp::R_ARM_TARGET2
:
7905 // This should have been mapped to another type already.
7907 case elfcpp::R_ARM_COPY
:
7908 case elfcpp::R_ARM_GLOB_DAT
:
7909 case elfcpp::R_ARM_JUMP_SLOT
:
7910 case elfcpp::R_ARM_RELATIVE
:
7911 // These are relocations which should only be seen by the
7912 // dynamic linker, and should never be seen here.
7913 gold_error(_("%s: unexpected reloc %u in object file"),
7914 object
->name().c_str(), r_type
);
7918 // These are initial TLS relocs, which are expected when
7920 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7921 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7922 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7923 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7924 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
7926 bool output_is_shared
= parameters
->options().shared();
7927 const tls::Tls_optimization optimized_type
7928 = Target_arm
<big_endian
>::optimize_tls_reloc(!output_is_shared
,
7932 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
7933 if (optimized_type
== tls::TLSOPT_NONE
)
7935 // Create a pair of GOT entries for the module index and
7936 // dtv-relative offset.
7937 Arm_output_data_got
<big_endian
>* got
7938 = target
->got_section(symtab
, layout
);
7939 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7940 unsigned int shndx
= lsym
.get_st_shndx();
7942 shndx
= object
->adjust_sym_shndx(r_sym
, shndx
, &is_ordinary
);
7945 object
->error(_("local symbol %u has bad shndx %u"),
7950 if (!parameters
->doing_static_link())
7951 got
->add_local_pair_with_rel(object
, r_sym
, shndx
,
7953 target
->rel_dyn_section(layout
),
7954 elfcpp::R_ARM_TLS_DTPMOD32
, 0);
7956 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
,
7960 // FIXME: TLS optimization not supported yet.
7964 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
7965 if (optimized_type
== tls::TLSOPT_NONE
)
7967 // Create a GOT entry for the module index.
7968 target
->got_mod_index_entry(symtab
, layout
, object
);
7971 // FIXME: TLS optimization not supported yet.
7975 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
7978 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
7979 layout
->set_has_static_tls();
7980 if (optimized_type
== tls::TLSOPT_NONE
)
7982 // Create a GOT entry for the tp-relative offset.
7983 Arm_output_data_got
<big_endian
>* got
7984 = target
->got_section(symtab
, layout
);
7985 unsigned int r_sym
=
7986 elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
7987 if (!parameters
->doing_static_link())
7988 got
->add_local_with_rel(object
, r_sym
, GOT_TYPE_TLS_OFFSET
,
7989 target
->rel_dyn_section(layout
),
7990 elfcpp::R_ARM_TLS_TPOFF32
);
7991 else if (!object
->local_has_got_offset(r_sym
,
7992 GOT_TYPE_TLS_OFFSET
))
7994 got
->add_local(object
, r_sym
, GOT_TYPE_TLS_OFFSET
);
7995 unsigned int got_offset
=
7996 object
->local_got_offset(r_sym
, GOT_TYPE_TLS_OFFSET
);
7997 got
->add_static_reloc(got_offset
,
7998 elfcpp::R_ARM_TLS_TPOFF32
, object
,
8003 // FIXME: TLS optimization not supported yet.
8007 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8008 layout
->set_has_static_tls();
8009 if (output_is_shared
)
8011 // We need to create a dynamic relocation.
8012 gold_assert(lsym
.get_st_type() != elfcpp::STT_SECTION
);
8013 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(reloc
.get_r_info());
8014 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8015 rel_dyn
->add_local(object
, r_sym
, elfcpp::R_ARM_TLS_TPOFF32
,
8016 output_section
, data_shndx
,
8017 reloc
.get_r_offset());
8027 case elfcpp::R_ARM_PC24
:
8028 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8029 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8030 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8032 unsupported_reloc_local(object
, r_type
);
8037 // Report an unsupported relocation against a global symbol.
8039 template<bool big_endian
>
8041 Target_arm
<big_endian
>::Scan::unsupported_reloc_global(
8042 Sized_relobj_file
<32, big_endian
>* object
,
8043 unsigned int r_type
,
8046 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8047 object
->name().c_str(), r_type
, gsym
->demangled_name().c_str());
8050 template<bool big_endian
>
8052 Target_arm
<big_endian
>::Scan::possible_function_pointer_reloc(
8053 unsigned int r_type
)
8057 case elfcpp::R_ARM_PC24
:
8058 case elfcpp::R_ARM_THM_CALL
:
8059 case elfcpp::R_ARM_PLT32
:
8060 case elfcpp::R_ARM_CALL
:
8061 case elfcpp::R_ARM_JUMP24
:
8062 case elfcpp::R_ARM_THM_JUMP24
:
8063 case elfcpp::R_ARM_SBREL31
:
8064 case elfcpp::R_ARM_PREL31
:
8065 case elfcpp::R_ARM_THM_JUMP19
:
8066 case elfcpp::R_ARM_THM_JUMP6
:
8067 case elfcpp::R_ARM_THM_JUMP11
:
8068 case elfcpp::R_ARM_THM_JUMP8
:
8069 // All the relocations above are branches except SBREL31 and PREL31.
8073 // Be conservative and assume this is a function pointer.
8078 template<bool big_endian
>
8080 Target_arm
<big_endian
>::Scan::local_reloc_may_be_function_pointer(
8083 Target_arm
<big_endian
>* target
,
8084 Sized_relobj_file
<32, big_endian
>*,
8087 const elfcpp::Rel
<32, big_endian
>&,
8088 unsigned int r_type
,
8089 const elfcpp::Sym
<32, big_endian
>&)
8091 r_type
= target
->get_real_reloc_type(r_type
);
8092 return possible_function_pointer_reloc(r_type
);
8095 template<bool big_endian
>
8097 Target_arm
<big_endian
>::Scan::global_reloc_may_be_function_pointer(
8100 Target_arm
<big_endian
>* target
,
8101 Sized_relobj_file
<32, big_endian
>*,
8104 const elfcpp::Rel
<32, big_endian
>&,
8105 unsigned int r_type
,
8108 // GOT is not a function.
8109 if (strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8112 r_type
= target
->get_real_reloc_type(r_type
);
8113 return possible_function_pointer_reloc(r_type
);
8116 // Scan a relocation for a global symbol.
8118 template<bool big_endian
>
8120 Target_arm
<big_endian
>::Scan::global(Symbol_table
* symtab
,
8123 Sized_relobj_file
<32, big_endian
>* object
,
8124 unsigned int data_shndx
,
8125 Output_section
* output_section
,
8126 const elfcpp::Rel
<32, big_endian
>& reloc
,
8127 unsigned int r_type
,
8130 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8131 // section. We check here to avoid creating a dynamic reloc against
8132 // _GLOBAL_OFFSET_TABLE_.
8133 if (!target
->has_got_section()
8134 && strcmp(gsym
->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8135 target
->got_section(symtab
, layout
);
8137 r_type
= get_real_reloc_type(r_type
);
8140 case elfcpp::R_ARM_NONE
:
8141 case elfcpp::R_ARM_V4BX
:
8142 case elfcpp::R_ARM_GNU_VTENTRY
:
8143 case elfcpp::R_ARM_GNU_VTINHERIT
:
8146 case elfcpp::R_ARM_ABS32
:
8147 case elfcpp::R_ARM_ABS16
:
8148 case elfcpp::R_ARM_ABS12
:
8149 case elfcpp::R_ARM_THM_ABS5
:
8150 case elfcpp::R_ARM_ABS8
:
8151 case elfcpp::R_ARM_BASE_ABS
:
8152 case elfcpp::R_ARM_MOVW_ABS_NC
:
8153 case elfcpp::R_ARM_MOVT_ABS
:
8154 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8155 case elfcpp::R_ARM_THM_MOVT_ABS
:
8156 case elfcpp::R_ARM_ABS32_NOI
:
8157 // Absolute addressing relocations.
8159 // Make a PLT entry if necessary.
8160 if (this->symbol_needs_plt_entry(gsym
))
8162 target
->make_plt_entry(symtab
, layout
, gsym
);
8163 // Since this is not a PC-relative relocation, we may be
8164 // taking the address of a function. In that case we need to
8165 // set the entry in the dynamic symbol table to the address of
8167 if (gsym
->is_from_dynobj() && !parameters
->options().shared())
8168 gsym
->set_needs_dynsym_value();
8170 // Make a dynamic relocation if necessary.
8171 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8173 if (gsym
->may_need_copy_reloc())
8175 target
->copy_reloc(symtab
, layout
, object
,
8176 data_shndx
, output_section
, gsym
, reloc
);
8178 else if ((r_type
== elfcpp::R_ARM_ABS32
8179 || r_type
== elfcpp::R_ARM_ABS32_NOI
)
8180 && gsym
->can_use_relative_reloc(false))
8182 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8183 rel_dyn
->add_global_relative(gsym
, elfcpp::R_ARM_RELATIVE
,
8184 output_section
, object
,
8185 data_shndx
, reloc
.get_r_offset());
8189 check_non_pic(object
, r_type
);
8190 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8191 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8192 data_shndx
, reloc
.get_r_offset());
8198 case elfcpp::R_ARM_GOTOFF32
:
8199 case elfcpp::R_ARM_GOTOFF12
:
8200 // We need a GOT section.
8201 target
->got_section(symtab
, layout
);
8204 case elfcpp::R_ARM_REL32
:
8205 case elfcpp::R_ARM_LDR_PC_G0
:
8206 case elfcpp::R_ARM_SBREL32
:
8207 case elfcpp::R_ARM_THM_PC8
:
8208 case elfcpp::R_ARM_BASE_PREL
:
8209 case elfcpp::R_ARM_MOVW_PREL_NC
:
8210 case elfcpp::R_ARM_MOVT_PREL
:
8211 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8212 case elfcpp::R_ARM_THM_MOVT_PREL
:
8213 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
8214 case elfcpp::R_ARM_THM_PC12
:
8215 case elfcpp::R_ARM_REL32_NOI
:
8216 case elfcpp::R_ARM_ALU_PC_G0_NC
:
8217 case elfcpp::R_ARM_ALU_PC_G0
:
8218 case elfcpp::R_ARM_ALU_PC_G1_NC
:
8219 case elfcpp::R_ARM_ALU_PC_G1
:
8220 case elfcpp::R_ARM_ALU_PC_G2
:
8221 case elfcpp::R_ARM_LDR_PC_G1
:
8222 case elfcpp::R_ARM_LDR_PC_G2
:
8223 case elfcpp::R_ARM_LDRS_PC_G0
:
8224 case elfcpp::R_ARM_LDRS_PC_G1
:
8225 case elfcpp::R_ARM_LDRS_PC_G2
:
8226 case elfcpp::R_ARM_LDC_PC_G0
:
8227 case elfcpp::R_ARM_LDC_PC_G1
:
8228 case elfcpp::R_ARM_LDC_PC_G2
:
8229 case elfcpp::R_ARM_ALU_SB_G0_NC
:
8230 case elfcpp::R_ARM_ALU_SB_G0
:
8231 case elfcpp::R_ARM_ALU_SB_G1_NC
:
8232 case elfcpp::R_ARM_ALU_SB_G1
:
8233 case elfcpp::R_ARM_ALU_SB_G2
:
8234 case elfcpp::R_ARM_LDR_SB_G0
:
8235 case elfcpp::R_ARM_LDR_SB_G1
:
8236 case elfcpp::R_ARM_LDR_SB_G2
:
8237 case elfcpp::R_ARM_LDRS_SB_G0
:
8238 case elfcpp::R_ARM_LDRS_SB_G1
:
8239 case elfcpp::R_ARM_LDRS_SB_G2
:
8240 case elfcpp::R_ARM_LDC_SB_G0
:
8241 case elfcpp::R_ARM_LDC_SB_G1
:
8242 case elfcpp::R_ARM_LDC_SB_G2
:
8243 case elfcpp::R_ARM_MOVW_BREL_NC
:
8244 case elfcpp::R_ARM_MOVT_BREL
:
8245 case elfcpp::R_ARM_MOVW_BREL
:
8246 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8247 case elfcpp::R_ARM_THM_MOVT_BREL
:
8248 case elfcpp::R_ARM_THM_MOVW_BREL
:
8249 // Relative addressing relocations.
8251 // Make a dynamic relocation if necessary.
8252 if (gsym
->needs_dynamic_reloc(Scan::get_reference_flags(r_type
)))
8254 if (target
->may_need_copy_reloc(gsym
))
8256 target
->copy_reloc(symtab
, layout
, object
,
8257 data_shndx
, output_section
, gsym
, reloc
);
8261 check_non_pic(object
, r_type
);
8262 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8263 rel_dyn
->add_global(gsym
, r_type
, output_section
, object
,
8264 data_shndx
, reloc
.get_r_offset());
8270 case elfcpp::R_ARM_THM_CALL
:
8271 case elfcpp::R_ARM_PLT32
:
8272 case elfcpp::R_ARM_CALL
:
8273 case elfcpp::R_ARM_JUMP24
:
8274 case elfcpp::R_ARM_THM_JUMP24
:
8275 case elfcpp::R_ARM_SBREL31
:
8276 case elfcpp::R_ARM_PREL31
:
8277 case elfcpp::R_ARM_THM_JUMP19
:
8278 case elfcpp::R_ARM_THM_JUMP6
:
8279 case elfcpp::R_ARM_THM_JUMP11
:
8280 case elfcpp::R_ARM_THM_JUMP8
:
8281 // All the relocation above are branches except for the PREL31 ones.
8282 // A PREL31 relocation can point to a personality function in a shared
8283 // library. In that case we want to use a PLT because we want to
8284 // call the personality routine and the dynamic linkers we care about
8285 // do not support dynamic PREL31 relocations. An REL31 relocation may
8286 // point to a function whose unwinding behaviour is being described but
8287 // we will not mistakenly generate a PLT for that because we should use
8288 // a local section symbol.
8290 // If the symbol is fully resolved, this is just a relative
8291 // local reloc. Otherwise we need a PLT entry.
8292 if (gsym
->final_value_is_known())
8294 // If building a shared library, we can also skip the PLT entry
8295 // if the symbol is defined in the output file and is protected
8297 if (gsym
->is_defined()
8298 && !gsym
->is_from_dynobj()
8299 && !gsym
->is_preemptible())
8301 target
->make_plt_entry(symtab
, layout
, gsym
);
8304 case elfcpp::R_ARM_GOT_BREL
:
8305 case elfcpp::R_ARM_GOT_ABS
:
8306 case elfcpp::R_ARM_GOT_PREL
:
8308 // The symbol requires a GOT entry.
8309 Arm_output_data_got
<big_endian
>* got
=
8310 target
->got_section(symtab
, layout
);
8311 if (gsym
->final_value_is_known())
8312 got
->add_global(gsym
, GOT_TYPE_STANDARD
);
8315 // If this symbol is not fully resolved, we need to add a
8316 // GOT entry with a dynamic relocation.
8317 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8318 if (gsym
->is_from_dynobj()
8319 || gsym
->is_undefined()
8320 || gsym
->is_preemptible())
8321 got
->add_global_with_rel(gsym
, GOT_TYPE_STANDARD
,
8322 rel_dyn
, elfcpp::R_ARM_GLOB_DAT
);
8325 if (got
->add_global(gsym
, GOT_TYPE_STANDARD
))
8326 rel_dyn
->add_global_relative(
8327 gsym
, elfcpp::R_ARM_RELATIVE
, got
,
8328 gsym
->got_offset(GOT_TYPE_STANDARD
));
8334 case elfcpp::R_ARM_TARGET1
:
8335 case elfcpp::R_ARM_TARGET2
:
8336 // These should have been mapped to other types already.
8338 case elfcpp::R_ARM_COPY
:
8339 case elfcpp::R_ARM_GLOB_DAT
:
8340 case elfcpp::R_ARM_JUMP_SLOT
:
8341 case elfcpp::R_ARM_RELATIVE
:
8342 // These are relocations which should only be seen by the
8343 // dynamic linker, and should never be seen here.
8344 gold_error(_("%s: unexpected reloc %u in object file"),
8345 object
->name().c_str(), r_type
);
8348 // These are initial tls relocs, which are expected when
8350 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8351 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8352 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8353 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8354 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8356 const bool is_final
= gsym
->final_value_is_known();
8357 const tls::Tls_optimization optimized_type
8358 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
8361 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
8362 if (optimized_type
== tls::TLSOPT_NONE
)
8364 // Create a pair of GOT entries for the module index and
8365 // dtv-relative offset.
8366 Arm_output_data_got
<big_endian
>* got
8367 = target
->got_section(symtab
, layout
);
8368 if (!parameters
->doing_static_link())
8369 got
->add_global_pair_with_rel(gsym
, GOT_TYPE_TLS_PAIR
,
8370 target
->rel_dyn_section(layout
),
8371 elfcpp::R_ARM_TLS_DTPMOD32
,
8372 elfcpp::R_ARM_TLS_DTPOFF32
);
8374 got
->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR
, gsym
);
8377 // FIXME: TLS optimization not supported yet.
8381 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
8382 if (optimized_type
== tls::TLSOPT_NONE
)
8384 // Create a GOT entry for the module index.
8385 target
->got_mod_index_entry(symtab
, layout
, object
);
8388 // FIXME: TLS optimization not supported yet.
8392 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
8395 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
8396 layout
->set_has_static_tls();
8397 if (optimized_type
== tls::TLSOPT_NONE
)
8399 // Create a GOT entry for the tp-relative offset.
8400 Arm_output_data_got
<big_endian
>* got
8401 = target
->got_section(symtab
, layout
);
8402 if (!parameters
->doing_static_link())
8403 got
->add_global_with_rel(gsym
, GOT_TYPE_TLS_OFFSET
,
8404 target
->rel_dyn_section(layout
),
8405 elfcpp::R_ARM_TLS_TPOFF32
);
8406 else if (!gsym
->has_got_offset(GOT_TYPE_TLS_OFFSET
))
8408 got
->add_global(gsym
, GOT_TYPE_TLS_OFFSET
);
8409 unsigned int got_offset
=
8410 gsym
->got_offset(GOT_TYPE_TLS_OFFSET
);
8411 got
->add_static_reloc(got_offset
,
8412 elfcpp::R_ARM_TLS_TPOFF32
, gsym
);
8416 // FIXME: TLS optimization not supported yet.
8420 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
8421 layout
->set_has_static_tls();
8422 if (parameters
->options().shared())
8424 // We need to create a dynamic relocation.
8425 Reloc_section
* rel_dyn
= target
->rel_dyn_section(layout
);
8426 rel_dyn
->add_global(gsym
, elfcpp::R_ARM_TLS_TPOFF32
,
8427 output_section
, object
,
8428 data_shndx
, reloc
.get_r_offset());
8438 case elfcpp::R_ARM_PC24
:
8439 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
8440 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
8441 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
8443 unsupported_reloc_global(object
, r_type
, gsym
);
8448 // Process relocations for gc.
8450 template<bool big_endian
>
8452 Target_arm
<big_endian
>::gc_process_relocs(
8453 Symbol_table
* symtab
,
8455 Sized_relobj_file
<32, big_endian
>* object
,
8456 unsigned int data_shndx
,
8458 const unsigned char* prelocs
,
8460 Output_section
* output_section
,
8461 bool needs_special_offset_handling
,
8462 size_t local_symbol_count
,
8463 const unsigned char* plocal_symbols
)
8465 typedef Target_arm
<big_endian
> Arm
;
8466 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8468 gold::gc_process_relocs
<32, big_endian
, Arm
, elfcpp::SHT_REL
, Scan
,
8469 typename
Target_arm::Relocatable_size_for_reloc
>(
8478 needs_special_offset_handling
,
8483 // Scan relocations for a section.
8485 template<bool big_endian
>
8487 Target_arm
<big_endian
>::scan_relocs(Symbol_table
* symtab
,
8489 Sized_relobj_file
<32, big_endian
>* object
,
8490 unsigned int data_shndx
,
8491 unsigned int sh_type
,
8492 const unsigned char* prelocs
,
8494 Output_section
* output_section
,
8495 bool needs_special_offset_handling
,
8496 size_t local_symbol_count
,
8497 const unsigned char* plocal_symbols
)
8499 typedef typename Target_arm
<big_endian
>::Scan Scan
;
8500 if (sh_type
== elfcpp::SHT_RELA
)
8502 gold_error(_("%s: unsupported RELA reloc section"),
8503 object
->name().c_str());
8507 gold::scan_relocs
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
, Scan
>(
8516 needs_special_offset_handling
,
8521 // Finalize the sections.
8523 template<bool big_endian
>
8525 Target_arm
<big_endian
>::do_finalize_sections(
8527 const Input_objects
* input_objects
,
8528 Symbol_table
* symtab
)
8530 bool merged_any_attributes
= false;
8531 // Merge processor-specific flags.
8532 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
8533 p
!= input_objects
->relobj_end();
8536 Arm_relobj
<big_endian
>* arm_relobj
=
8537 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
8538 if (arm_relobj
->merge_flags_and_attributes())
8540 this->merge_processor_specific_flags(
8542 arm_relobj
->processor_specific_flags());
8543 this->merge_object_attributes(arm_relobj
->name().c_str(),
8544 arm_relobj
->attributes_section_data());
8545 merged_any_attributes
= true;
8549 for (Input_objects::Dynobj_iterator p
= input_objects
->dynobj_begin();
8550 p
!= input_objects
->dynobj_end();
8553 Arm_dynobj
<big_endian
>* arm_dynobj
=
8554 Arm_dynobj
<big_endian
>::as_arm_dynobj(*p
);
8555 this->merge_processor_specific_flags(
8557 arm_dynobj
->processor_specific_flags());
8558 this->merge_object_attributes(arm_dynobj
->name().c_str(),
8559 arm_dynobj
->attributes_section_data());
8560 merged_any_attributes
= true;
8563 // Create an empty uninitialized attribute section if we still don't have it
8564 // at this moment. This happens if there is no attributes sections in all
8566 if (this->attributes_section_data_
== NULL
)
8567 this->attributes_section_data_
= new Attributes_section_data(NULL
, 0);
8569 const Object_attribute
* cpu_arch_attr
=
8570 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch
);
8571 // Check if we need to use Cortex-A8 workaround.
8572 if (parameters
->options().user_set_fix_cortex_a8())
8573 this->fix_cortex_a8_
= parameters
->options().fix_cortex_a8();
8576 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8577 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8579 const Object_attribute
* cpu_arch_profile_attr
=
8580 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile
);
8581 this->fix_cortex_a8_
=
8582 (cpu_arch_attr
->int_value() == elfcpp::TAG_CPU_ARCH_V7
8583 && (cpu_arch_profile_attr
->int_value() == 'A'
8584 || cpu_arch_profile_attr
->int_value() == 0));
8587 // Check if we can use V4BX interworking.
8588 // The V4BX interworking stub contains BX instruction,
8589 // which is not specified for some profiles.
8590 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8591 && !this->may_use_v4t_interworking())
8592 gold_error(_("unable to provide V4BX reloc interworking fix up; "
8593 "the target profile does not support BX instruction"));
8595 // Fill in some more dynamic tags.
8596 const Reloc_section
* rel_plt
= (this->plt_
== NULL
8598 : this->plt_
->rel_plt());
8599 layout
->add_target_dynamic_tags(true, this->got_plt_
, rel_plt
,
8600 this->rel_dyn_
, true, false);
8602 // Emit any relocs we saved in an attempt to avoid generating COPY
8604 if (this->copy_relocs_
.any_saved_relocs())
8605 this->copy_relocs_
.emit(this->rel_dyn_section(layout
));
8607 // Handle the .ARM.exidx section.
8608 Output_section
* exidx_section
= layout
->find_output_section(".ARM.exidx");
8610 if (!parameters
->options().relocatable())
8612 if (exidx_section
!= NULL
8613 && exidx_section
->type() == elfcpp::SHT_ARM_EXIDX
)
8615 // Create __exidx_start and __exidx_end symbols.
8616 symtab
->define_in_output_data("__exidx_start", NULL
,
8617 Symbol_table::PREDEFINED
,
8618 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
8619 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
,
8621 symtab
->define_in_output_data("__exidx_end", NULL
,
8622 Symbol_table::PREDEFINED
,
8623 exidx_section
, 0, 0, elfcpp::STT_OBJECT
,
8624 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
,
8627 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
8628 // the .ARM.exidx section.
8629 if (!layout
->script_options()->saw_phdrs_clause())
8631 gold_assert(layout
->find_output_segment(elfcpp::PT_ARM_EXIDX
, 0,
8634 Output_segment
* exidx_segment
=
8635 layout
->make_output_segment(elfcpp::PT_ARM_EXIDX
, elfcpp::PF_R
);
8636 exidx_segment
->add_output_section_to_nonload(exidx_section
,
8642 symtab
->define_as_constant("__exidx_start", NULL
,
8643 Symbol_table::PREDEFINED
,
8644 0, 0, elfcpp::STT_OBJECT
,
8645 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
8647 symtab
->define_as_constant("__exidx_end", NULL
,
8648 Symbol_table::PREDEFINED
,
8649 0, 0, elfcpp::STT_OBJECT
,
8650 elfcpp::STB_GLOBAL
, elfcpp::STV_HIDDEN
, 0,
8655 // Create an .ARM.attributes section if we have merged any attributes
8657 if (merged_any_attributes
)
8659 Output_attributes_section_data
* attributes_section
=
8660 new Output_attributes_section_data(*this->attributes_section_data_
);
8661 layout
->add_output_section_data(".ARM.attributes",
8662 elfcpp::SHT_ARM_ATTRIBUTES
, 0,
8663 attributes_section
, ORDER_INVALID
,
8667 // Fix up links in section EXIDX headers.
8668 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
8669 p
!= layout
->section_list().end();
8671 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
8673 Arm_output_section
<big_endian
>* os
=
8674 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
8675 os
->set_exidx_section_link();
8679 // Return whether a direct absolute static relocation needs to be applied.
8680 // In cases where Scan::local() or Scan::global() has created
8681 // a dynamic relocation other than R_ARM_RELATIVE, the addend
8682 // of the relocation is carried in the data, and we must not
8683 // apply the static relocation.
8685 template<bool big_endian
>
8687 Target_arm
<big_endian
>::Relocate::should_apply_static_reloc(
8688 const Sized_symbol
<32>* gsym
,
8689 unsigned int r_type
,
8691 Output_section
* output_section
)
8693 // If the output section is not allocated, then we didn't call
8694 // scan_relocs, we didn't create a dynamic reloc, and we must apply
8696 if ((output_section
->flags() & elfcpp::SHF_ALLOC
) == 0)
8699 int ref_flags
= Scan::get_reference_flags(r_type
);
8701 // For local symbols, we will have created a non-RELATIVE dynamic
8702 // relocation only if (a) the output is position independent,
8703 // (b) the relocation is absolute (not pc- or segment-relative), and
8704 // (c) the relocation is not 32 bits wide.
8706 return !(parameters
->options().output_is_position_independent()
8707 && (ref_flags
& Symbol::ABSOLUTE_REF
)
8710 // For global symbols, we use the same helper routines used in the
8711 // scan pass. If we did not create a dynamic relocation, or if we
8712 // created a RELATIVE dynamic relocation, we should apply the static
8714 bool has_dyn
= gsym
->needs_dynamic_reloc(ref_flags
);
8715 bool is_rel
= (ref_flags
& Symbol::ABSOLUTE_REF
)
8716 && gsym
->can_use_relative_reloc(ref_flags
8717 & Symbol::FUNCTION_CALL
);
8718 return !has_dyn
|| is_rel
;
8721 // Perform a relocation.
8723 template<bool big_endian
>
8725 Target_arm
<big_endian
>::Relocate::relocate(
8726 const Relocate_info
<32, big_endian
>* relinfo
,
8728 Output_section
* output_section
,
8730 const elfcpp::Rel
<32, big_endian
>& rel
,
8731 unsigned int r_type
,
8732 const Sized_symbol
<32>* gsym
,
8733 const Symbol_value
<32>* psymval
,
8734 unsigned char* view
,
8735 Arm_address address
,
8736 section_size_type view_size
)
8738 typedef Arm_relocate_functions
<big_endian
> Arm_relocate_functions
;
8740 r_type
= get_real_reloc_type(r_type
);
8741 const Arm_reloc_property
* reloc_property
=
8742 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
8743 if (reloc_property
== NULL
)
8745 std::string reloc_name
=
8746 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
8747 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
8748 _("cannot relocate %s in object file"),
8749 reloc_name
.c_str());
8753 const Arm_relobj
<big_endian
>* object
=
8754 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
8756 // If the final branch target of a relocation is THUMB instruction, this
8757 // is 1. Otherwise it is 0.
8758 Arm_address thumb_bit
= 0;
8759 Symbol_value
<32> symval
;
8760 bool is_weakly_undefined_without_plt
= false;
8761 bool have_got_offset
= false;
8762 unsigned int got_offset
= 0;
8764 // If the relocation uses the GOT entry of a symbol instead of the symbol
8765 // itself, we don't care about whether the symbol is defined or what kind
8767 if (reloc_property
->uses_got_entry())
8769 // Get the GOT offset.
8770 // The GOT pointer points to the end of the GOT section.
8771 // We need to subtract the size of the GOT section to get
8772 // the actual offset to use in the relocation.
8773 // TODO: We should move GOT offset computing code in TLS relocations
8777 case elfcpp::R_ARM_GOT_BREL
:
8778 case elfcpp::R_ARM_GOT_PREL
:
8781 gold_assert(gsym
->has_got_offset(GOT_TYPE_STANDARD
));
8782 got_offset
= (gsym
->got_offset(GOT_TYPE_STANDARD
)
8783 - target
->got_size());
8787 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8788 gold_assert(object
->local_has_got_offset(r_sym
,
8789 GOT_TYPE_STANDARD
));
8790 got_offset
= (object
->local_got_offset(r_sym
, GOT_TYPE_STANDARD
)
8791 - target
->got_size());
8793 have_got_offset
= true;
8800 else if (relnum
!= Target_arm
<big_endian
>::fake_relnum_for_stubs
)
8804 // This is a global symbol. Determine if we use PLT and if the
8805 // final target is THUMB.
8806 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
8808 // This uses a PLT, change the symbol value.
8809 symval
.set_output_value(target
->plt_section()->address()
8810 + gsym
->plt_offset());
8813 else if (gsym
->is_weak_undefined())
8815 // This is a weakly undefined symbol and we do not use PLT
8816 // for this relocation. A branch targeting this symbol will
8817 // be converted into an NOP.
8818 is_weakly_undefined_without_plt
= true;
8820 else if (gsym
->is_undefined() && reloc_property
->uses_symbol())
8822 // This relocation uses the symbol value but the symbol is
8823 // undefined. Exit early and have the caller reporting an
8829 // Set thumb bit if symbol:
8830 // -Has type STT_ARM_TFUNC or
8831 // -Has type STT_FUNC, is defined and with LSB in value set.
8833 (((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
8834 || (gsym
->type() == elfcpp::STT_FUNC
8835 && !gsym
->is_undefined()
8836 && ((psymval
->value(object
, 0) & 1) != 0)))
8843 // This is a local symbol. Determine if the final target is THUMB.
8844 // We saved this information when all the local symbols were read.
8845 elfcpp::Elf_types
<32>::Elf_WXword r_info
= rel
.get_r_info();
8846 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
8847 thumb_bit
= object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
8852 // This is a fake relocation synthesized for a stub. It does not have
8853 // a real symbol. We just look at the LSB of the symbol value to
8854 // determine if the target is THUMB or not.
8855 thumb_bit
= ((psymval
->value(object
, 0) & 1) != 0);
8858 // Strip LSB if this points to a THUMB target.
8860 && reloc_property
->uses_thumb_bit()
8861 && ((psymval
->value(object
, 0) & 1) != 0))
8863 Arm_address stripped_value
=
8864 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
8865 symval
.set_output_value(stripped_value
);
8869 // To look up relocation stubs, we need to pass the symbol table index of
8871 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
8873 // Get the addressing origin of the output segment defining the
8874 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8875 Arm_address sym_origin
= 0;
8876 if (reloc_property
->uses_symbol_base())
8878 if (r_type
== elfcpp::R_ARM_BASE_ABS
&& gsym
== NULL
)
8879 // R_ARM_BASE_ABS with the NULL symbol will give the
8880 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8881 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8882 sym_origin
= target
->got_plt_section()->address();
8883 else if (gsym
== NULL
)
8885 else if (gsym
->source() == Symbol::IN_OUTPUT_SEGMENT
)
8886 sym_origin
= gsym
->output_segment()->vaddr();
8887 else if (gsym
->source() == Symbol::IN_OUTPUT_DATA
)
8888 sym_origin
= gsym
->output_data()->address();
8890 // TODO: Assumes the segment base to be zero for the global symbols
8891 // till the proper support for the segment-base-relative addressing
8892 // will be implemented. This is consistent with GNU ld.
8895 // For relative addressing relocation, find out the relative address base.
8896 Arm_address relative_address_base
= 0;
8897 switch(reloc_property
->relative_address_base())
8899 case Arm_reloc_property::RAB_NONE
:
8900 // Relocations with relative address bases RAB_TLS and RAB_tp are
8901 // handled by relocate_tls. So we do not need to do anything here.
8902 case Arm_reloc_property::RAB_TLS
:
8903 case Arm_reloc_property::RAB_tp
:
8905 case Arm_reloc_property::RAB_B_S
:
8906 relative_address_base
= sym_origin
;
8908 case Arm_reloc_property::RAB_GOT_ORG
:
8909 relative_address_base
= target
->got_plt_section()->address();
8911 case Arm_reloc_property::RAB_P
:
8912 relative_address_base
= address
;
8914 case Arm_reloc_property::RAB_Pa
:
8915 relative_address_base
= address
& 0xfffffffcU
;
8921 typename
Arm_relocate_functions::Status reloc_status
=
8922 Arm_relocate_functions::STATUS_OKAY
;
8923 bool check_overflow
= reloc_property
->checks_overflow();
8926 case elfcpp::R_ARM_NONE
:
8929 case elfcpp::R_ARM_ABS8
:
8930 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8931 reloc_status
= Arm_relocate_functions::abs8(view
, object
, psymval
);
8934 case elfcpp::R_ARM_ABS12
:
8935 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8936 reloc_status
= Arm_relocate_functions::abs12(view
, object
, psymval
);
8939 case elfcpp::R_ARM_ABS16
:
8940 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8941 reloc_status
= Arm_relocate_functions::abs16(view
, object
, psymval
);
8944 case elfcpp::R_ARM_ABS32
:
8945 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
8946 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
8950 case elfcpp::R_ARM_ABS32_NOI
:
8951 if (should_apply_static_reloc(gsym
, r_type
, true, output_section
))
8952 // No thumb bit for this relocation: (S + A)
8953 reloc_status
= Arm_relocate_functions::abs32(view
, object
, psymval
,
8957 case elfcpp::R_ARM_MOVW_ABS_NC
:
8958 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8959 reloc_status
= Arm_relocate_functions::movw(view
, object
, psymval
,
8964 case elfcpp::R_ARM_MOVT_ABS
:
8965 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8966 reloc_status
= Arm_relocate_functions::movt(view
, object
, psymval
, 0);
8969 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
8970 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8971 reloc_status
= Arm_relocate_functions::thm_movw(view
, object
, psymval
,
8972 0, thumb_bit
, false);
8975 case elfcpp::R_ARM_THM_MOVT_ABS
:
8976 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
8977 reloc_status
= Arm_relocate_functions::thm_movt(view
, object
,
8981 case elfcpp::R_ARM_MOVW_PREL_NC
:
8982 case elfcpp::R_ARM_MOVW_BREL_NC
:
8983 case elfcpp::R_ARM_MOVW_BREL
:
8985 Arm_relocate_functions::movw(view
, object
, psymval
,
8986 relative_address_base
, thumb_bit
,
8990 case elfcpp::R_ARM_MOVT_PREL
:
8991 case elfcpp::R_ARM_MOVT_BREL
:
8993 Arm_relocate_functions::movt(view
, object
, psymval
,
8994 relative_address_base
);
8997 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
8998 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
8999 case elfcpp::R_ARM_THM_MOVW_BREL
:
9001 Arm_relocate_functions::thm_movw(view
, object
, psymval
,
9002 relative_address_base
,
9003 thumb_bit
, check_overflow
);
9006 case elfcpp::R_ARM_THM_MOVT_PREL
:
9007 case elfcpp::R_ARM_THM_MOVT_BREL
:
9009 Arm_relocate_functions::thm_movt(view
, object
, psymval
,
9010 relative_address_base
);
9013 case elfcpp::R_ARM_REL32
:
9014 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9015 address
, thumb_bit
);
9018 case elfcpp::R_ARM_THM_ABS5
:
9019 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9020 reloc_status
= Arm_relocate_functions::thm_abs5(view
, object
, psymval
);
9023 // Thumb long branches.
9024 case elfcpp::R_ARM_THM_CALL
:
9025 case elfcpp::R_ARM_THM_XPC22
:
9026 case elfcpp::R_ARM_THM_JUMP24
:
9028 Arm_relocate_functions::thumb_branch_common(
9029 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9030 thumb_bit
, is_weakly_undefined_without_plt
);
9033 case elfcpp::R_ARM_GOTOFF32
:
9035 Arm_address got_origin
;
9036 got_origin
= target
->got_plt_section()->address();
9037 reloc_status
= Arm_relocate_functions::rel32(view
, object
, psymval
,
9038 got_origin
, thumb_bit
);
9042 case elfcpp::R_ARM_BASE_PREL
:
9043 gold_assert(gsym
!= NULL
);
9045 Arm_relocate_functions::base_prel(view
, sym_origin
, address
);
9048 case elfcpp::R_ARM_BASE_ABS
:
9049 if (should_apply_static_reloc(gsym
, r_type
, false, output_section
))
9050 reloc_status
= Arm_relocate_functions::base_abs(view
, sym_origin
);
9053 case elfcpp::R_ARM_GOT_BREL
:
9054 gold_assert(have_got_offset
);
9055 reloc_status
= Arm_relocate_functions::got_brel(view
, got_offset
);
9058 case elfcpp::R_ARM_GOT_PREL
:
9059 gold_assert(have_got_offset
);
9060 // Get the address origin for GOT PLT, which is allocated right
9061 // after the GOT section, to calculate an absolute address of
9062 // the symbol GOT entry (got_origin + got_offset).
9063 Arm_address got_origin
;
9064 got_origin
= target
->got_plt_section()->address();
9065 reloc_status
= Arm_relocate_functions::got_prel(view
,
9066 got_origin
+ got_offset
,
9070 case elfcpp::R_ARM_PLT32
:
9071 case elfcpp::R_ARM_CALL
:
9072 case elfcpp::R_ARM_JUMP24
:
9073 case elfcpp::R_ARM_XPC25
:
9074 gold_assert(gsym
== NULL
9075 || gsym
->has_plt_offset()
9076 || gsym
->final_value_is_known()
9077 || (gsym
->is_defined()
9078 && !gsym
->is_from_dynobj()
9079 && !gsym
->is_preemptible()));
9081 Arm_relocate_functions::arm_branch_common(
9082 r_type
, relinfo
, view
, gsym
, object
, r_sym
, psymval
, address
,
9083 thumb_bit
, is_weakly_undefined_without_plt
);
9086 case elfcpp::R_ARM_THM_JUMP19
:
9088 Arm_relocate_functions::thm_jump19(view
, object
, psymval
, address
,
9092 case elfcpp::R_ARM_THM_JUMP6
:
9094 Arm_relocate_functions::thm_jump6(view
, object
, psymval
, address
);
9097 case elfcpp::R_ARM_THM_JUMP8
:
9099 Arm_relocate_functions::thm_jump8(view
, object
, psymval
, address
);
9102 case elfcpp::R_ARM_THM_JUMP11
:
9104 Arm_relocate_functions::thm_jump11(view
, object
, psymval
, address
);
9107 case elfcpp::R_ARM_PREL31
:
9108 reloc_status
= Arm_relocate_functions::prel31(view
, object
, psymval
,
9109 address
, thumb_bit
);
9112 case elfcpp::R_ARM_V4BX
:
9113 if (target
->fix_v4bx() > General_options::FIX_V4BX_NONE
)
9115 const bool is_v4bx_interworking
=
9116 (target
->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
);
9118 Arm_relocate_functions::v4bx(relinfo
, view
, object
, address
,
9119 is_v4bx_interworking
);
9123 case elfcpp::R_ARM_THM_PC8
:
9125 Arm_relocate_functions::thm_pc8(view
, object
, psymval
, address
);
9128 case elfcpp::R_ARM_THM_PC12
:
9130 Arm_relocate_functions::thm_pc12(view
, object
, psymval
, address
);
9133 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9135 Arm_relocate_functions::thm_alu11(view
, object
, psymval
, address
,
9139 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9140 case elfcpp::R_ARM_ALU_PC_G0
:
9141 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9142 case elfcpp::R_ARM_ALU_PC_G1
:
9143 case elfcpp::R_ARM_ALU_PC_G2
:
9144 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9145 case elfcpp::R_ARM_ALU_SB_G0
:
9146 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9147 case elfcpp::R_ARM_ALU_SB_G1
:
9148 case elfcpp::R_ARM_ALU_SB_G2
:
9150 Arm_relocate_functions::arm_grp_alu(view
, object
, psymval
,
9151 reloc_property
->group_index(),
9152 relative_address_base
,
9153 thumb_bit
, check_overflow
);
9156 case elfcpp::R_ARM_LDR_PC_G0
:
9157 case elfcpp::R_ARM_LDR_PC_G1
:
9158 case elfcpp::R_ARM_LDR_PC_G2
:
9159 case elfcpp::R_ARM_LDR_SB_G0
:
9160 case elfcpp::R_ARM_LDR_SB_G1
:
9161 case elfcpp::R_ARM_LDR_SB_G2
:
9163 Arm_relocate_functions::arm_grp_ldr(view
, object
, psymval
,
9164 reloc_property
->group_index(),
9165 relative_address_base
);
9168 case elfcpp::R_ARM_LDRS_PC_G0
:
9169 case elfcpp::R_ARM_LDRS_PC_G1
:
9170 case elfcpp::R_ARM_LDRS_PC_G2
:
9171 case elfcpp::R_ARM_LDRS_SB_G0
:
9172 case elfcpp::R_ARM_LDRS_SB_G1
:
9173 case elfcpp::R_ARM_LDRS_SB_G2
:
9175 Arm_relocate_functions::arm_grp_ldrs(view
, object
, psymval
,
9176 reloc_property
->group_index(),
9177 relative_address_base
);
9180 case elfcpp::R_ARM_LDC_PC_G0
:
9181 case elfcpp::R_ARM_LDC_PC_G1
:
9182 case elfcpp::R_ARM_LDC_PC_G2
:
9183 case elfcpp::R_ARM_LDC_SB_G0
:
9184 case elfcpp::R_ARM_LDC_SB_G1
:
9185 case elfcpp::R_ARM_LDC_SB_G2
:
9187 Arm_relocate_functions::arm_grp_ldc(view
, object
, psymval
,
9188 reloc_property
->group_index(),
9189 relative_address_base
);
9192 // These are initial tls relocs, which are expected when
9194 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9195 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9196 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9197 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9198 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9200 this->relocate_tls(relinfo
, target
, relnum
, rel
, r_type
, gsym
, psymval
,
9201 view
, address
, view_size
);
9204 // The known and unknown unsupported and/or deprecated relocations.
9205 case elfcpp::R_ARM_PC24
:
9206 case elfcpp::R_ARM_LDR_SBREL_11_0_NC
:
9207 case elfcpp::R_ARM_ALU_SBREL_19_12_NC
:
9208 case elfcpp::R_ARM_ALU_SBREL_27_20_CK
:
9210 // Just silently leave the method. We should get an appropriate error
9211 // message in the scan methods.
9215 // Report any errors.
9216 switch (reloc_status
)
9218 case Arm_relocate_functions::STATUS_OKAY
:
9220 case Arm_relocate_functions::STATUS_OVERFLOW
:
9221 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9222 _("relocation overflow in %s"),
9223 reloc_property
->name().c_str());
9225 case Arm_relocate_functions::STATUS_BAD_RELOC
:
9226 gold_error_at_location(
9230 _("unexpected opcode while processing relocation %s"),
9231 reloc_property
->name().c_str());
9240 // Perform a TLS relocation.
9242 template<bool big_endian
>
9243 inline typename Arm_relocate_functions
<big_endian
>::Status
9244 Target_arm
<big_endian
>::Relocate::relocate_tls(
9245 const Relocate_info
<32, big_endian
>* relinfo
,
9246 Target_arm
<big_endian
>* target
,
9248 const elfcpp::Rel
<32, big_endian
>& rel
,
9249 unsigned int r_type
,
9250 const Sized_symbol
<32>* gsym
,
9251 const Symbol_value
<32>* psymval
,
9252 unsigned char* view
,
9253 elfcpp::Elf_types
<32>::Elf_Addr address
,
9254 section_size_type
/*view_size*/ )
9256 typedef Arm_relocate_functions
<big_endian
> ArmRelocFuncs
;
9257 typedef Relocate_functions
<32, big_endian
> RelocFuncs
;
9258 Output_segment
* tls_segment
= relinfo
->layout
->tls_segment();
9260 const Sized_relobj_file
<32, big_endian
>* object
= relinfo
->object
;
9262 elfcpp::Elf_types
<32>::Elf_Addr value
= psymval
->value(object
, 0);
9264 const bool is_final
= (gsym
== NULL
9265 ? !parameters
->options().shared()
9266 : gsym
->final_value_is_known());
9267 const tls::Tls_optimization optimized_type
9268 = Target_arm
<big_endian
>::optimize_tls_reloc(is_final
, r_type
);
9271 case elfcpp::R_ARM_TLS_GD32
: // Global-dynamic
9273 unsigned int got_type
= GOT_TYPE_TLS_PAIR
;
9274 unsigned int got_offset
;
9277 gold_assert(gsym
->has_got_offset(got_type
));
9278 got_offset
= gsym
->got_offset(got_type
) - target
->got_size();
9282 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9283 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9284 got_offset
= (object
->local_got_offset(r_sym
, got_type
)
9285 - target
->got_size());
9287 if (optimized_type
== tls::TLSOPT_NONE
)
9289 Arm_address got_entry
=
9290 target
->got_plt_section()->address() + got_offset
;
9292 // Relocate the field with the PC relative offset of the pair of
9294 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9295 return ArmRelocFuncs::STATUS_OKAY
;
9300 case elfcpp::R_ARM_TLS_LDM32
: // Local-dynamic
9301 if (optimized_type
== tls::TLSOPT_NONE
)
9303 // Relocate the field with the offset of the GOT entry for
9304 // the module index.
9305 unsigned int got_offset
;
9306 got_offset
= (target
->got_mod_index_entry(NULL
, NULL
, NULL
)
9307 - target
->got_size());
9308 Arm_address got_entry
=
9309 target
->got_plt_section()->address() + got_offset
;
9311 // Relocate the field with the PC relative offset of the pair of
9313 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9314 return ArmRelocFuncs::STATUS_OKAY
;
9318 case elfcpp::R_ARM_TLS_LDO32
: // Alternate local-dynamic
9319 RelocFuncs::rel32_unaligned(view
, value
);
9320 return ArmRelocFuncs::STATUS_OKAY
;
9322 case elfcpp::R_ARM_TLS_IE32
: // Initial-exec
9323 if (optimized_type
== tls::TLSOPT_NONE
)
9325 // Relocate the field with the offset of the GOT entry for
9326 // the tp-relative offset of the symbol.
9327 unsigned int got_type
= GOT_TYPE_TLS_OFFSET
;
9328 unsigned int got_offset
;
9331 gold_assert(gsym
->has_got_offset(got_type
));
9332 got_offset
= gsym
->got_offset(got_type
);
9336 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(rel
.get_r_info());
9337 gold_assert(object
->local_has_got_offset(r_sym
, got_type
));
9338 got_offset
= object
->local_got_offset(r_sym
, got_type
);
9341 // All GOT offsets are relative to the end of the GOT.
9342 got_offset
-= target
->got_size();
9344 Arm_address got_entry
=
9345 target
->got_plt_section()->address() + got_offset
;
9347 // Relocate the field with the PC relative offset of the GOT entry.
9348 RelocFuncs::pcrel32_unaligned(view
, got_entry
, address
);
9349 return ArmRelocFuncs::STATUS_OKAY
;
9353 case elfcpp::R_ARM_TLS_LE32
: // Local-exec
9354 // If we're creating a shared library, a dynamic relocation will
9355 // have been created for this location, so do not apply it now.
9356 if (!parameters
->options().shared())
9358 gold_assert(tls_segment
!= NULL
);
9360 // $tp points to the TCB, which is followed by the TLS, so we
9361 // need to add TCB size to the offset.
9362 Arm_address aligned_tcb_size
=
9363 align_address(ARM_TCB_SIZE
, tls_segment
->maximum_alignment());
9364 RelocFuncs::rel32_unaligned(view
, value
+ aligned_tcb_size
);
9367 return ArmRelocFuncs::STATUS_OKAY
;
9373 gold_error_at_location(relinfo
, relnum
, rel
.get_r_offset(),
9374 _("unsupported reloc %u"),
9376 return ArmRelocFuncs::STATUS_BAD_RELOC
;
9379 // Relocate section data.
9381 template<bool big_endian
>
9383 Target_arm
<big_endian
>::relocate_section(
9384 const Relocate_info
<32, big_endian
>* relinfo
,
9385 unsigned int sh_type
,
9386 const unsigned char* prelocs
,
9388 Output_section
* output_section
,
9389 bool needs_special_offset_handling
,
9390 unsigned char* view
,
9391 Arm_address address
,
9392 section_size_type view_size
,
9393 const Reloc_symbol_changes
* reloc_symbol_changes
)
9395 typedef typename Target_arm
<big_endian
>::Relocate Arm_relocate
;
9396 gold_assert(sh_type
== elfcpp::SHT_REL
);
9398 // See if we are relocating a relaxed input section. If so, the view
9399 // covers the whole output section and we need to adjust accordingly.
9400 if (needs_special_offset_handling
)
9402 const Output_relaxed_input_section
* poris
=
9403 output_section
->find_relaxed_input_section(relinfo
->object
,
9404 relinfo
->data_shndx
);
9407 Arm_address section_address
= poris
->address();
9408 section_size_type section_size
= poris
->data_size();
9410 gold_assert((section_address
>= address
)
9411 && ((section_address
+ section_size
)
9412 <= (address
+ view_size
)));
9414 off_t offset
= section_address
- address
;
9417 view_size
= section_size
;
9421 gold::relocate_section
<32, big_endian
, Target_arm
, elfcpp::SHT_REL
,
9428 needs_special_offset_handling
,
9432 reloc_symbol_changes
);
9435 // Return the size of a relocation while scanning during a relocatable
9438 template<bool big_endian
>
9440 Target_arm
<big_endian
>::Relocatable_size_for_reloc::get_size_for_reloc(
9441 unsigned int r_type
,
9444 r_type
= get_real_reloc_type(r_type
);
9445 const Arm_reloc_property
* arp
=
9446 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9451 std::string reloc_name
=
9452 arm_reloc_property_table
->reloc_name_in_error_message(r_type
);
9453 gold_error(_("%s: unexpected %s in object file"),
9454 object
->name().c_str(), reloc_name
.c_str());
9459 // Scan the relocs during a relocatable link.
9461 template<bool big_endian
>
9463 Target_arm
<big_endian
>::scan_relocatable_relocs(
9464 Symbol_table
* symtab
,
9466 Sized_relobj_file
<32, big_endian
>* object
,
9467 unsigned int data_shndx
,
9468 unsigned int sh_type
,
9469 const unsigned char* prelocs
,
9471 Output_section
* output_section
,
9472 bool needs_special_offset_handling
,
9473 size_t local_symbol_count
,
9474 const unsigned char* plocal_symbols
,
9475 Relocatable_relocs
* rr
)
9477 gold_assert(sh_type
== elfcpp::SHT_REL
);
9479 typedef Arm_scan_relocatable_relocs
<big_endian
, elfcpp::SHT_REL
,
9480 Relocatable_size_for_reloc
> Scan_relocatable_relocs
;
9482 gold::scan_relocatable_relocs
<32, big_endian
, elfcpp::SHT_REL
,
9483 Scan_relocatable_relocs
>(
9491 needs_special_offset_handling
,
9497 // Relocate a section during a relocatable link.
9499 template<bool big_endian
>
9501 Target_arm
<big_endian
>::relocate_for_relocatable(
9502 const Relocate_info
<32, big_endian
>* relinfo
,
9503 unsigned int sh_type
,
9504 const unsigned char* prelocs
,
9506 Output_section
* output_section
,
9507 off_t offset_in_output_section
,
9508 const Relocatable_relocs
* rr
,
9509 unsigned char* view
,
9510 Arm_address view_address
,
9511 section_size_type view_size
,
9512 unsigned char* reloc_view
,
9513 section_size_type reloc_view_size
)
9515 gold_assert(sh_type
== elfcpp::SHT_REL
);
9517 gold::relocate_for_relocatable
<32, big_endian
, elfcpp::SHT_REL
>(
9522 offset_in_output_section
,
9531 // Perform target-specific processing in a relocatable link. This is
9532 // only used if we use the relocation strategy RELOC_SPECIAL.
9534 template<bool big_endian
>
9536 Target_arm
<big_endian
>::relocate_special_relocatable(
9537 const Relocate_info
<32, big_endian
>* relinfo
,
9538 unsigned int sh_type
,
9539 const unsigned char* preloc_in
,
9541 Output_section
* output_section
,
9542 off_t offset_in_output_section
,
9543 unsigned char* view
,
9544 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
9546 unsigned char* preloc_out
)
9548 // We can only handle REL type relocation sections.
9549 gold_assert(sh_type
== elfcpp::SHT_REL
);
9551 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc Reltype
;
9552 typedef typename Reloc_types
<elfcpp::SHT_REL
, 32, big_endian
>::Reloc_write
9554 const Arm_address invalid_address
= static_cast<Arm_address
>(0) - 1;
9556 const Arm_relobj
<big_endian
>* object
=
9557 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
9558 const unsigned int local_count
= object
->local_symbol_count();
9560 Reltype
reloc(preloc_in
);
9561 Reltype_write
reloc_write(preloc_out
);
9563 elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
9564 const unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
9565 const unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
9567 const Arm_reloc_property
* arp
=
9568 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
9569 gold_assert(arp
!= NULL
);
9571 // Get the new symbol index.
9572 // We only use RELOC_SPECIAL strategy in local relocations.
9573 gold_assert(r_sym
< local_count
);
9575 // We are adjusting a section symbol. We need to find
9576 // the symbol table index of the section symbol for
9577 // the output section corresponding to input section
9578 // in which this symbol is defined.
9580 unsigned int shndx
= object
->local_symbol_input_shndx(r_sym
, &is_ordinary
);
9581 gold_assert(is_ordinary
);
9582 Output_section
* os
= object
->output_section(shndx
);
9583 gold_assert(os
!= NULL
);
9584 gold_assert(os
->needs_symtab_index());
9585 unsigned int new_symndx
= os
->symtab_index();
9587 // Get the new offset--the location in the output section where
9588 // this relocation should be applied.
9590 Arm_address offset
= reloc
.get_r_offset();
9591 Arm_address new_offset
;
9592 if (offset_in_output_section
!= invalid_address
)
9593 new_offset
= offset
+ offset_in_output_section
;
9596 section_offset_type sot_offset
=
9597 convert_types
<section_offset_type
, Arm_address
>(offset
);
9598 section_offset_type new_sot_offset
=
9599 output_section
->output_offset(object
, relinfo
->data_shndx
,
9601 gold_assert(new_sot_offset
!= -1);
9602 new_offset
= new_sot_offset
;
9605 // In an object file, r_offset is an offset within the section.
9606 // In an executable or dynamic object, generated by
9607 // --emit-relocs, r_offset is an absolute address.
9608 if (!parameters
->options().relocatable())
9610 new_offset
+= view_address
;
9611 if (offset_in_output_section
!= invalid_address
)
9612 new_offset
-= offset_in_output_section
;
9615 reloc_write
.put_r_offset(new_offset
);
9616 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(new_symndx
, r_type
));
9618 // Handle the reloc addend.
9619 // The relocation uses a section symbol in the input file.
9620 // We are adjusting it to use a section symbol in the output
9621 // file. The input section symbol refers to some address in
9622 // the input section. We need the relocation in the output
9623 // file to refer to that same address. This adjustment to
9624 // the addend is the same calculation we use for a simple
9625 // absolute relocation for the input section symbol.
9627 const Symbol_value
<32>* psymval
= object
->local_symbol(r_sym
);
9629 // Handle THUMB bit.
9630 Symbol_value
<32> symval
;
9631 Arm_address thumb_bit
=
9632 object
->local_symbol_is_thumb_function(r_sym
) ? 1 : 0;
9634 && arp
->uses_thumb_bit()
9635 && ((psymval
->value(object
, 0) & 1) != 0))
9637 Arm_address stripped_value
=
9638 psymval
->value(object
, 0) & ~static_cast<Arm_address
>(1);
9639 symval
.set_output_value(stripped_value
);
9643 unsigned char* paddend
= view
+ offset
;
9644 typename Arm_relocate_functions
<big_endian
>::Status reloc_status
=
9645 Arm_relocate_functions
<big_endian
>::STATUS_OKAY
;
9648 case elfcpp::R_ARM_ABS8
:
9649 reloc_status
= Arm_relocate_functions
<big_endian
>::abs8(paddend
, object
,
9653 case elfcpp::R_ARM_ABS12
:
9654 reloc_status
= Arm_relocate_functions
<big_endian
>::abs12(paddend
, object
,
9658 case elfcpp::R_ARM_ABS16
:
9659 reloc_status
= Arm_relocate_functions
<big_endian
>::abs16(paddend
, object
,
9663 case elfcpp::R_ARM_THM_ABS5
:
9664 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_abs5(paddend
,
9669 case elfcpp::R_ARM_MOVW_ABS_NC
:
9670 case elfcpp::R_ARM_MOVW_PREL_NC
:
9671 case elfcpp::R_ARM_MOVW_BREL_NC
:
9672 case elfcpp::R_ARM_MOVW_BREL
:
9673 reloc_status
= Arm_relocate_functions
<big_endian
>::movw(
9674 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9677 case elfcpp::R_ARM_THM_MOVW_ABS_NC
:
9678 case elfcpp::R_ARM_THM_MOVW_PREL_NC
:
9679 case elfcpp::R_ARM_THM_MOVW_BREL_NC
:
9680 case elfcpp::R_ARM_THM_MOVW_BREL
:
9681 reloc_status
= Arm_relocate_functions
<big_endian
>::thm_movw(
9682 paddend
, object
, psymval
, 0, thumb_bit
, arp
->checks_overflow());
9685 case elfcpp::R_ARM_THM_CALL
:
9686 case elfcpp::R_ARM_THM_XPC22
:
9687 case elfcpp::R_ARM_THM_JUMP24
:
9689 Arm_relocate_functions
<big_endian
>::thumb_branch_common(
9690 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9694 case elfcpp::R_ARM_PLT32
:
9695 case elfcpp::R_ARM_CALL
:
9696 case elfcpp::R_ARM_JUMP24
:
9697 case elfcpp::R_ARM_XPC25
:
9699 Arm_relocate_functions
<big_endian
>::arm_branch_common(
9700 r_type
, relinfo
, paddend
, NULL
, object
, 0, psymval
, 0, thumb_bit
,
9704 case elfcpp::R_ARM_THM_JUMP19
:
9706 Arm_relocate_functions
<big_endian
>::thm_jump19(paddend
, object
,
9707 psymval
, 0, thumb_bit
);
9710 case elfcpp::R_ARM_THM_JUMP6
:
9712 Arm_relocate_functions
<big_endian
>::thm_jump6(paddend
, object
, psymval
,
9716 case elfcpp::R_ARM_THM_JUMP8
:
9718 Arm_relocate_functions
<big_endian
>::thm_jump8(paddend
, object
, psymval
,
9722 case elfcpp::R_ARM_THM_JUMP11
:
9724 Arm_relocate_functions
<big_endian
>::thm_jump11(paddend
, object
, psymval
,
9728 case elfcpp::R_ARM_PREL31
:
9730 Arm_relocate_functions
<big_endian
>::prel31(paddend
, object
, psymval
, 0,
9734 case elfcpp::R_ARM_THM_PC8
:
9736 Arm_relocate_functions
<big_endian
>::thm_pc8(paddend
, object
, psymval
,
9740 case elfcpp::R_ARM_THM_PC12
:
9742 Arm_relocate_functions
<big_endian
>::thm_pc12(paddend
, object
, psymval
,
9746 case elfcpp::R_ARM_THM_ALU_PREL_11_0
:
9748 Arm_relocate_functions
<big_endian
>::thm_alu11(paddend
, object
, psymval
,
9752 // These relocation truncate relocation results so we cannot handle them
9753 // in a relocatable link.
9754 case elfcpp::R_ARM_MOVT_ABS
:
9755 case elfcpp::R_ARM_THM_MOVT_ABS
:
9756 case elfcpp::R_ARM_MOVT_PREL
:
9757 case elfcpp::R_ARM_MOVT_BREL
:
9758 case elfcpp::R_ARM_THM_MOVT_PREL
:
9759 case elfcpp::R_ARM_THM_MOVT_BREL
:
9760 case elfcpp::R_ARM_ALU_PC_G0_NC
:
9761 case elfcpp::R_ARM_ALU_PC_G0
:
9762 case elfcpp::R_ARM_ALU_PC_G1_NC
:
9763 case elfcpp::R_ARM_ALU_PC_G1
:
9764 case elfcpp::R_ARM_ALU_PC_G2
:
9765 case elfcpp::R_ARM_ALU_SB_G0_NC
:
9766 case elfcpp::R_ARM_ALU_SB_G0
:
9767 case elfcpp::R_ARM_ALU_SB_G1_NC
:
9768 case elfcpp::R_ARM_ALU_SB_G1
:
9769 case elfcpp::R_ARM_ALU_SB_G2
:
9770 case elfcpp::R_ARM_LDR_PC_G0
:
9771 case elfcpp::R_ARM_LDR_PC_G1
:
9772 case elfcpp::R_ARM_LDR_PC_G2
:
9773 case elfcpp::R_ARM_LDR_SB_G0
:
9774 case elfcpp::R_ARM_LDR_SB_G1
:
9775 case elfcpp::R_ARM_LDR_SB_G2
:
9776 case elfcpp::R_ARM_LDRS_PC_G0
:
9777 case elfcpp::R_ARM_LDRS_PC_G1
:
9778 case elfcpp::R_ARM_LDRS_PC_G2
:
9779 case elfcpp::R_ARM_LDRS_SB_G0
:
9780 case elfcpp::R_ARM_LDRS_SB_G1
:
9781 case elfcpp::R_ARM_LDRS_SB_G2
:
9782 case elfcpp::R_ARM_LDC_PC_G0
:
9783 case elfcpp::R_ARM_LDC_PC_G1
:
9784 case elfcpp::R_ARM_LDC_PC_G2
:
9785 case elfcpp::R_ARM_LDC_SB_G0
:
9786 case elfcpp::R_ARM_LDC_SB_G1
:
9787 case elfcpp::R_ARM_LDC_SB_G2
:
9788 gold_error(_("cannot handle %s in a relocatable link"),
9789 arp
->name().c_str());
9796 // Report any errors.
9797 switch (reloc_status
)
9799 case Arm_relocate_functions
<big_endian
>::STATUS_OKAY
:
9801 case Arm_relocate_functions
<big_endian
>::STATUS_OVERFLOW
:
9802 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9803 _("relocation overflow in %s"),
9804 arp
->name().c_str());
9806 case Arm_relocate_functions
<big_endian
>::STATUS_BAD_RELOC
:
9807 gold_error_at_location(relinfo
, relnum
, reloc
.get_r_offset(),
9808 _("unexpected opcode while processing relocation %s"),
9809 arp
->name().c_str());
9816 // Return the value to use for a dynamic symbol which requires special
9817 // treatment. This is how we support equality comparisons of function
9818 // pointers across shared library boundaries, as described in the
9819 // processor specific ABI supplement.
9821 template<bool big_endian
>
9823 Target_arm
<big_endian
>::do_dynsym_value(const Symbol
* gsym
) const
9825 gold_assert(gsym
->is_from_dynobj() && gsym
->has_plt_offset());
9826 return this->plt_section()->address() + gsym
->plt_offset();
9829 // Map platform-specific relocs to real relocs
9831 template<bool big_endian
>
9833 Target_arm
<big_endian
>::get_real_reloc_type(unsigned int r_type
)
9837 case elfcpp::R_ARM_TARGET1
:
9838 // This is either R_ARM_ABS32 or R_ARM_REL32;
9839 return elfcpp::R_ARM_ABS32
;
9841 case elfcpp::R_ARM_TARGET2
:
9842 // This can be any reloc type but usually is R_ARM_GOT_PREL
9843 return elfcpp::R_ARM_GOT_PREL
;
9850 // Whether if two EABI versions V1 and V2 are compatible.
9852 template<bool big_endian
>
9854 Target_arm
<big_endian
>::are_eabi_versions_compatible(
9855 elfcpp::Elf_Word v1
,
9856 elfcpp::Elf_Word v2
)
9858 // v4 and v5 are the same spec before and after it was released,
9859 // so allow mixing them.
9860 if ((v1
== elfcpp::EF_ARM_EABI_UNKNOWN
|| v2
== elfcpp::EF_ARM_EABI_UNKNOWN
)
9861 || (v1
== elfcpp::EF_ARM_EABI_VER4
&& v2
== elfcpp::EF_ARM_EABI_VER5
)
9862 || (v1
== elfcpp::EF_ARM_EABI_VER5
&& v2
== elfcpp::EF_ARM_EABI_VER4
))
9868 // Combine FLAGS from an input object called NAME and the processor-specific
9869 // flags in the ELF header of the output. Much of this is adapted from the
9870 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9871 // in bfd/elf32-arm.c.
9873 template<bool big_endian
>
9875 Target_arm
<big_endian
>::merge_processor_specific_flags(
9876 const std::string
& name
,
9877 elfcpp::Elf_Word flags
)
9879 if (this->are_processor_specific_flags_set())
9881 elfcpp::Elf_Word out_flags
= this->processor_specific_flags();
9883 // Nothing to merge if flags equal to those in output.
9884 if (flags
== out_flags
)
9887 // Complain about various flag mismatches.
9888 elfcpp::Elf_Word version1
= elfcpp::arm_eabi_version(flags
);
9889 elfcpp::Elf_Word version2
= elfcpp::arm_eabi_version(out_flags
);
9890 if (!this->are_eabi_versions_compatible(version1
, version2
)
9891 && parameters
->options().warn_mismatch())
9892 gold_error(_("Source object %s has EABI version %d but output has "
9893 "EABI version %d."),
9895 (flags
& elfcpp::EF_ARM_EABIMASK
) >> 24,
9896 (out_flags
& elfcpp::EF_ARM_EABIMASK
) >> 24);
9900 // If the input is the default architecture and had the default
9901 // flags then do not bother setting the flags for the output
9902 // architecture, instead allow future merges to do this. If no
9903 // future merges ever set these flags then they will retain their
9904 // uninitialised values, which surprise surprise, correspond
9905 // to the default values.
9909 // This is the first time, just copy the flags.
9910 // We only copy the EABI version for now.
9911 this->set_processor_specific_flags(flags
& elfcpp::EF_ARM_EABIMASK
);
9915 // Adjust ELF file header.
9916 template<bool big_endian
>
9918 Target_arm
<big_endian
>::do_adjust_elf_header(
9919 unsigned char* view
,
9922 gold_assert(len
== elfcpp::Elf_sizes
<32>::ehdr_size
);
9924 elfcpp::Ehdr
<32, big_endian
> ehdr(view
);
9925 unsigned char e_ident
[elfcpp::EI_NIDENT
];
9926 memcpy(e_ident
, ehdr
.get_e_ident(), elfcpp::EI_NIDENT
);
9928 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
9929 == elfcpp::EF_ARM_EABI_UNKNOWN
)
9930 e_ident
[elfcpp::EI_OSABI
] = elfcpp::ELFOSABI_ARM
;
9932 e_ident
[elfcpp::EI_OSABI
] = 0;
9933 e_ident
[elfcpp::EI_ABIVERSION
] = 0;
9935 // FIXME: Do EF_ARM_BE8 adjustment.
9937 elfcpp::Ehdr_write
<32, big_endian
> oehdr(view
);
9938 oehdr
.put_e_ident(e_ident
);
9941 // do_make_elf_object to override the same function in the base class.
9942 // We need to use a target-specific sub-class of
9943 // Sized_relobj_file<32, big_endian> to store ARM specific information.
9944 // Hence we need to have our own ELF object creation.
9946 template<bool big_endian
>
9948 Target_arm
<big_endian
>::do_make_elf_object(
9949 const std::string
& name
,
9950 Input_file
* input_file
,
9951 off_t offset
, const elfcpp::Ehdr
<32, big_endian
>& ehdr
)
9953 int et
= ehdr
.get_e_type();
9954 // ET_EXEC files are valid input for --just-symbols/-R,
9955 // and we treat them as relocatable objects.
9956 if (et
== elfcpp::ET_REL
9957 || (et
== elfcpp::ET_EXEC
&& input_file
->just_symbols()))
9959 Arm_relobj
<big_endian
>* obj
=
9960 new Arm_relobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
9964 else if (et
== elfcpp::ET_DYN
)
9966 Sized_dynobj
<32, big_endian
>* obj
=
9967 new Arm_dynobj
<big_endian
>(name
, input_file
, offset
, ehdr
);
9973 gold_error(_("%s: unsupported ELF file type %d"),
9979 // Read the architecture from the Tag_also_compatible_with attribute, if any.
9980 // Returns -1 if no architecture could be read.
9981 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
9983 template<bool big_endian
>
9985 Target_arm
<big_endian
>::get_secondary_compatible_arch(
9986 const Attributes_section_data
* pasd
)
9988 const Object_attribute
* known_attributes
=
9989 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
9991 // Note: the tag and its argument below are uleb128 values, though
9992 // currently-defined values fit in one byte for each.
9993 const std::string
& sv
=
9994 known_attributes
[elfcpp::Tag_also_compatible_with
].string_value();
9996 && sv
.data()[0] == elfcpp::Tag_CPU_arch
9997 && (sv
.data()[1] & 128) != 128)
9998 return sv
.data()[1];
10000 // This tag is "safely ignorable", so don't complain if it looks funny.
10004 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10005 // The tag is removed if ARCH is -1.
10006 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10008 template<bool big_endian
>
10010 Target_arm
<big_endian
>::set_secondary_compatible_arch(
10011 Attributes_section_data
* pasd
,
10014 Object_attribute
* known_attributes
=
10015 pasd
->known_attributes(Object_attribute::OBJ_ATTR_PROC
);
10019 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value("");
10023 // Note: the tag and its argument below are uleb128 values, though
10024 // currently-defined values fit in one byte for each.
10026 sv
[0] = elfcpp::Tag_CPU_arch
;
10027 gold_assert(arch
!= 0);
10031 known_attributes
[elfcpp::Tag_also_compatible_with
].set_string_value(sv
);
10034 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10036 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10038 template<bool big_endian
>
10040 Target_arm
<big_endian
>::tag_cpu_arch_combine(
10043 int* secondary_compat_out
,
10045 int secondary_compat
)
10047 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10048 static const int v6t2
[] =
10050 T(V6T2
), // PRE_V4.
10060 static const int v6k
[] =
10073 static const int v7
[] =
10087 static const int v6_m
[] =
10102 static const int v6s_m
[] =
10118 static const int v7e_m
[] =
10125 T(V7E_M
), // V5TEJ.
10132 T(V7E_M
), // V6S_M.
10135 static const int v4t_plus_v6_m
[] =
10142 T(V5TEJ
), // V5TEJ.
10149 T(V6S_M
), // V6S_M.
10150 T(V7E_M
), // V7E_M.
10151 T(V4T_PLUS_V6_M
) // V4T plus V6_M.
10153 static const int* comb
[] =
10161 // Pseudo-architecture.
10165 // Check we've not got a higher architecture than we know about.
10167 if (oldtag
> elfcpp::MAX_TAG_CPU_ARCH
|| newtag
> elfcpp::MAX_TAG_CPU_ARCH
)
10169 gold_error(_("%s: unknown CPU architecture"), name
);
10173 // Override old tag if we have a Tag_also_compatible_with on the output.
10175 if ((oldtag
== T(V6_M
) && *secondary_compat_out
== T(V4T
))
10176 || (oldtag
== T(V4T
) && *secondary_compat_out
== T(V6_M
)))
10177 oldtag
= T(V4T_PLUS_V6_M
);
10179 // And override the new tag if we have a Tag_also_compatible_with on the
10182 if ((newtag
== T(V6_M
) && secondary_compat
== T(V4T
))
10183 || (newtag
== T(V4T
) && secondary_compat
== T(V6_M
)))
10184 newtag
= T(V4T_PLUS_V6_M
);
10186 // Architectures before V6KZ add features monotonically.
10187 int tagh
= std::max(oldtag
, newtag
);
10188 if (tagh
<= elfcpp::TAG_CPU_ARCH_V6KZ
)
10191 int tagl
= std::min(oldtag
, newtag
);
10192 int result
= comb
[tagh
- T(V6T2
)][tagl
];
10194 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10195 // as the canonical version.
10196 if (result
== T(V4T_PLUS_V6_M
))
10199 *secondary_compat_out
= T(V6_M
);
10202 *secondary_compat_out
= -1;
10206 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10207 name
, oldtag
, newtag
);
10215 // Helper to print AEABI enum tag value.
10217 template<bool big_endian
>
10219 Target_arm
<big_endian
>::aeabi_enum_name(unsigned int value
)
10221 static const char* aeabi_enum_names
[] =
10222 { "", "variable-size", "32-bit", "" };
10223 const size_t aeabi_enum_names_size
=
10224 sizeof(aeabi_enum_names
) / sizeof(aeabi_enum_names
[0]);
10226 if (value
< aeabi_enum_names_size
)
10227 return std::string(aeabi_enum_names
[value
]);
10231 sprintf(buffer
, "<unknown value %u>", value
);
10232 return std::string(buffer
);
10236 // Return the string value to store in TAG_CPU_name.
10238 template<bool big_endian
>
10240 Target_arm
<big_endian
>::tag_cpu_name_value(unsigned int value
)
10242 static const char* name_table
[] = {
10243 // These aren't real CPU names, but we can't guess
10244 // that from the architecture version alone.
10260 const size_t name_table_size
= sizeof(name_table
) / sizeof(name_table
[0]);
10262 if (value
< name_table_size
)
10263 return std::string(name_table
[value
]);
10267 sprintf(buffer
, "<unknown CPU value %u>", value
);
10268 return std::string(buffer
);
10272 // Merge object attributes from input file called NAME with those of the
10273 // output. The input object attributes are in the object pointed by PASD.
10275 template<bool big_endian
>
10277 Target_arm
<big_endian
>::merge_object_attributes(
10279 const Attributes_section_data
* pasd
)
10281 // Return if there is no attributes section data.
10285 // If output has no object attributes, just copy.
10286 const int vendor
= Object_attribute::OBJ_ATTR_PROC
;
10287 if (this->attributes_section_data_
== NULL
)
10289 this->attributes_section_data_
= new Attributes_section_data(*pasd
);
10290 Object_attribute
* out_attr
=
10291 this->attributes_section_data_
->known_attributes(vendor
);
10293 // We do not output objects with Tag_MPextension_use_legacy - we move
10294 // the attribute's value to Tag_MPextension_use. */
10295 if (out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value() != 0)
10297 if (out_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0
10298 && out_attr
[elfcpp::Tag_MPextension_use_legacy
].int_value()
10299 != out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10301 gold_error(_("%s has both the current and legacy "
10302 "Tag_MPextension_use attributes"),
10306 out_attr
[elfcpp::Tag_MPextension_use
] =
10307 out_attr
[elfcpp::Tag_MPextension_use_legacy
];
10308 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_type(0);
10309 out_attr
[elfcpp::Tag_MPextension_use_legacy
].set_int_value(0);
10315 const Object_attribute
* in_attr
= pasd
->known_attributes(vendor
);
10316 Object_attribute
* out_attr
=
10317 this->attributes_section_data_
->known_attributes(vendor
);
10319 // This needs to happen before Tag_ABI_FP_number_model is merged. */
10320 if (in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value()
10321 != out_attr
[elfcpp::Tag_ABI_VFP_args
].int_value())
10323 // Ignore mismatches if the object doesn't use floating point. */
10324 if (out_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() == 0)
10325 out_attr
[elfcpp::Tag_ABI_VFP_args
].set_int_value(
10326 in_attr
[elfcpp::Tag_ABI_VFP_args
].int_value());
10327 else if (in_attr
[elfcpp::Tag_ABI_FP_number_model
].int_value() != 0
10328 && parameters
->options().warn_mismatch())
10329 gold_error(_("%s uses VFP register arguments, output does not"),
10333 for (int i
= 4; i
< Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES
; ++i
)
10335 // Merge this attribute with existing attributes.
10338 case elfcpp::Tag_CPU_raw_name
:
10339 case elfcpp::Tag_CPU_name
:
10340 // These are merged after Tag_CPU_arch.
10343 case elfcpp::Tag_ABI_optimization_goals
:
10344 case elfcpp::Tag_ABI_FP_optimization_goals
:
10345 // Use the first value seen.
10348 case elfcpp::Tag_CPU_arch
:
10350 unsigned int saved_out_attr
= out_attr
->int_value();
10351 // Merge Tag_CPU_arch and Tag_also_compatible_with.
10352 int secondary_compat
=
10353 this->get_secondary_compatible_arch(pasd
);
10354 int secondary_compat_out
=
10355 this->get_secondary_compatible_arch(
10356 this->attributes_section_data_
);
10357 out_attr
[i
].set_int_value(
10358 tag_cpu_arch_combine(name
, out_attr
[i
].int_value(),
10359 &secondary_compat_out
,
10360 in_attr
[i
].int_value(),
10361 secondary_compat
));
10362 this->set_secondary_compatible_arch(this->attributes_section_data_
,
10363 secondary_compat_out
);
10365 // Merge Tag_CPU_name and Tag_CPU_raw_name.
10366 if (out_attr
[i
].int_value() == saved_out_attr
)
10367 ; // Leave the names alone.
10368 else if (out_attr
[i
].int_value() == in_attr
[i
].int_value())
10370 // The output architecture has been changed to match the
10371 // input architecture. Use the input names.
10372 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(
10373 in_attr
[elfcpp::Tag_CPU_name
].string_value());
10374 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value(
10375 in_attr
[elfcpp::Tag_CPU_raw_name
].string_value());
10379 out_attr
[elfcpp::Tag_CPU_name
].set_string_value("");
10380 out_attr
[elfcpp::Tag_CPU_raw_name
].set_string_value("");
10383 // If we still don't have a value for Tag_CPU_name,
10384 // make one up now. Tag_CPU_raw_name remains blank.
10385 if (out_attr
[elfcpp::Tag_CPU_name
].string_value() == "")
10387 const std::string cpu_name
=
10388 this->tag_cpu_name_value(out_attr
[i
].int_value());
10389 // FIXME: If we see an unknown CPU, this will be set
10390 // to "<unknown CPU n>", where n is the attribute value.
10391 // This is different from BFD, which leaves the name alone.
10392 out_attr
[elfcpp::Tag_CPU_name
].set_string_value(cpu_name
);
10397 case elfcpp::Tag_ARM_ISA_use
:
10398 case elfcpp::Tag_THUMB_ISA_use
:
10399 case elfcpp::Tag_WMMX_arch
:
10400 case elfcpp::Tag_Advanced_SIMD_arch
:
10401 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
10402 case elfcpp::Tag_ABI_FP_rounding
:
10403 case elfcpp::Tag_ABI_FP_exceptions
:
10404 case elfcpp::Tag_ABI_FP_user_exceptions
:
10405 case elfcpp::Tag_ABI_FP_number_model
:
10406 case elfcpp::Tag_VFP_HP_extension
:
10407 case elfcpp::Tag_CPU_unaligned_access
:
10408 case elfcpp::Tag_T2EE_use
:
10409 case elfcpp::Tag_Virtualization_use
:
10410 case elfcpp::Tag_MPextension_use
:
10411 // Use the largest value specified.
10412 if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10413 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10416 case elfcpp::Tag_ABI_align8_preserved
:
10417 case elfcpp::Tag_ABI_PCS_RO_data
:
10418 // Use the smallest value specified.
10419 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10420 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10423 case elfcpp::Tag_ABI_align8_needed
:
10424 if ((in_attr
[i
].int_value() > 0 || out_attr
[i
].int_value() > 0)
10425 && (in_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value() == 0
10426 || (out_attr
[elfcpp::Tag_ABI_align8_preserved
].int_value()
10429 // This error message should be enabled once all non-conforming
10430 // binaries in the toolchain have had the attributes set
10432 // gold_error(_("output 8-byte data alignment conflicts with %s"),
10436 case elfcpp::Tag_ABI_FP_denormal
:
10437 case elfcpp::Tag_ABI_PCS_GOT_use
:
10439 // These tags have 0 = don't care, 1 = strong requirement,
10440 // 2 = weak requirement.
10441 static const int order_021
[3] = {0, 2, 1};
10443 // Use the "greatest" from the sequence 0, 2, 1, or the largest
10444 // value if greater than 2 (for future-proofing).
10445 if ((in_attr
[i
].int_value() > 2
10446 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10447 || (in_attr
[i
].int_value() <= 2
10448 && out_attr
[i
].int_value() <= 2
10449 && (order_021
[in_attr
[i
].int_value()]
10450 > order_021
[out_attr
[i
].int_value()])))
10451 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10455 case elfcpp::Tag_CPU_arch_profile
:
10456 if (out_attr
[i
].int_value() != in_attr
[i
].int_value())
10458 // 0 will merge with anything.
10459 // 'A' and 'S' merge to 'A'.
10460 // 'R' and 'S' merge to 'R'.
10461 // 'M' and 'A|R|S' is an error.
10462 if (out_attr
[i
].int_value() == 0
10463 || (out_attr
[i
].int_value() == 'S'
10464 && (in_attr
[i
].int_value() == 'A'
10465 || in_attr
[i
].int_value() == 'R')))
10466 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10467 else if (in_attr
[i
].int_value() == 0
10468 || (in_attr
[i
].int_value() == 'S'
10469 && (out_attr
[i
].int_value() == 'A'
10470 || out_attr
[i
].int_value() == 'R')))
10472 else if (parameters
->options().warn_mismatch())
10475 (_("conflicting architecture profiles %c/%c"),
10476 in_attr
[i
].int_value() ? in_attr
[i
].int_value() : '0',
10477 out_attr
[i
].int_value() ? out_attr
[i
].int_value() : '0');
10481 case elfcpp::Tag_VFP_arch
:
10483 static const struct
10487 } vfp_versions
[7] =
10498 // Values greater than 6 aren't defined, so just pick the
10500 if (in_attr
[i
].int_value() > 6
10501 && in_attr
[i
].int_value() > out_attr
[i
].int_value())
10503 *out_attr
= *in_attr
;
10506 // The output uses the superset of input features
10507 // (ISA version) and registers.
10508 int ver
= std::max(vfp_versions
[in_attr
[i
].int_value()].ver
,
10509 vfp_versions
[out_attr
[i
].int_value()].ver
);
10510 int regs
= std::max(vfp_versions
[in_attr
[i
].int_value()].regs
,
10511 vfp_versions
[out_attr
[i
].int_value()].regs
);
10512 // This assumes all possible supersets are also a valid
10515 for (newval
= 6; newval
> 0; newval
--)
10517 if (regs
== vfp_versions
[newval
].regs
10518 && ver
== vfp_versions
[newval
].ver
)
10521 out_attr
[i
].set_int_value(newval
);
10524 case elfcpp::Tag_PCS_config
:
10525 if (out_attr
[i
].int_value() == 0)
10526 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10527 else if (in_attr
[i
].int_value() != 0
10528 && out_attr
[i
].int_value() != 0
10529 && parameters
->options().warn_mismatch())
10531 // It's sometimes ok to mix different configs, so this is only
10533 gold_warning(_("%s: conflicting platform configuration"), name
);
10536 case elfcpp::Tag_ABI_PCS_R9_use
:
10537 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10538 && out_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10539 && in_attr
[i
].int_value() != elfcpp::AEABI_R9_unused
10540 && parameters
->options().warn_mismatch())
10542 gold_error(_("%s: conflicting use of R9"), name
);
10544 if (out_attr
[i
].int_value() == elfcpp::AEABI_R9_unused
)
10545 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10547 case elfcpp::Tag_ABI_PCS_RW_data
:
10548 if (in_attr
[i
].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10549 && (in_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10550 != elfcpp::AEABI_R9_SB
)
10551 && (out_attr
[elfcpp::Tag_ABI_PCS_R9_use
].int_value()
10552 != elfcpp::AEABI_R9_unused
)
10553 && parameters
->options().warn_mismatch())
10555 gold_error(_("%s: SB relative addressing conflicts with use "
10559 // Use the smallest value specified.
10560 if (in_attr
[i
].int_value() < out_attr
[i
].int_value())
10561 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10563 case elfcpp::Tag_ABI_PCS_wchar_t
:
10564 if (out_attr
[i
].int_value()
10565 && in_attr
[i
].int_value()
10566 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10567 && parameters
->options().warn_mismatch()
10568 && parameters
->options().wchar_size_warning())
10570 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10571 "use %u-byte wchar_t; use of wchar_t values "
10572 "across objects may fail"),
10573 name
, in_attr
[i
].int_value(),
10574 out_attr
[i
].int_value());
10576 else if (in_attr
[i
].int_value() && !out_attr
[i
].int_value())
10577 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10579 case elfcpp::Tag_ABI_enum_size
:
10580 if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_unused
)
10582 if (out_attr
[i
].int_value() == elfcpp::AEABI_enum_unused
10583 || out_attr
[i
].int_value() == elfcpp::AEABI_enum_forced_wide
)
10585 // The existing object is compatible with anything.
10586 // Use whatever requirements the new object has.
10587 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10589 else if (in_attr
[i
].int_value() != elfcpp::AEABI_enum_forced_wide
10590 && out_attr
[i
].int_value() != in_attr
[i
].int_value()
10591 && parameters
->options().warn_mismatch()
10592 && parameters
->options().enum_size_warning())
10594 unsigned int in_value
= in_attr
[i
].int_value();
10595 unsigned int out_value
= out_attr
[i
].int_value();
10596 gold_warning(_("%s uses %s enums yet the output is to use "
10597 "%s enums; use of enum values across objects "
10600 this->aeabi_enum_name(in_value
).c_str(),
10601 this->aeabi_enum_name(out_value
).c_str());
10605 case elfcpp::Tag_ABI_VFP_args
:
10608 case elfcpp::Tag_ABI_WMMX_args
:
10609 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10610 && parameters
->options().warn_mismatch())
10612 gold_error(_("%s uses iWMMXt register arguments, output does "
10617 case Object_attribute::Tag_compatibility
:
10618 // Merged in target-independent code.
10620 case elfcpp::Tag_ABI_HardFP_use
:
10621 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10622 if ((in_attr
[i
].int_value() == 1 && out_attr
[i
].int_value() == 2)
10623 || (in_attr
[i
].int_value() == 2 && out_attr
[i
].int_value() == 1))
10624 out_attr
[i
].set_int_value(3);
10625 else if (in_attr
[i
].int_value() > out_attr
[i
].int_value())
10626 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10628 case elfcpp::Tag_ABI_FP_16bit_format
:
10629 if (in_attr
[i
].int_value() != 0 && out_attr
[i
].int_value() != 0)
10631 if (in_attr
[i
].int_value() != out_attr
[i
].int_value()
10632 && parameters
->options().warn_mismatch())
10633 gold_error(_("fp16 format mismatch between %s and output"),
10636 if (in_attr
[i
].int_value() != 0)
10637 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10640 case elfcpp::Tag_DIV_use
:
10641 // This tag is set to zero if we can use UDIV and SDIV in Thumb
10642 // mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10643 // SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10644 // CPU. We will merge as follows: If the input attribute's value
10645 // is one then the output attribute's value remains unchanged. If
10646 // the input attribute's value is zero or two then if the output
10647 // attribute's value is one the output value is set to the input
10648 // value, otherwise the output value must be the same as the
10650 if (in_attr
[i
].int_value() != 1 && out_attr
[i
].int_value() != 1)
10652 if (in_attr
[i
].int_value() != out_attr
[i
].int_value())
10654 gold_error(_("DIV usage mismatch between %s and output"),
10659 if (in_attr
[i
].int_value() != 1)
10660 out_attr
[i
].set_int_value(in_attr
[i
].int_value());
10664 case elfcpp::Tag_MPextension_use_legacy
:
10665 // We don't output objects with Tag_MPextension_use_legacy - we
10666 // move the value to Tag_MPextension_use.
10667 if (in_attr
[i
].int_value() != 0
10668 && in_attr
[elfcpp::Tag_MPextension_use
].int_value() != 0)
10670 if (in_attr
[elfcpp::Tag_MPextension_use
].int_value()
10671 != in_attr
[i
].int_value())
10673 gold_error(_("%s has has both the current and legacy "
10674 "Tag_MPextension_use attributes"),
10679 if (in_attr
[i
].int_value()
10680 > out_attr
[elfcpp::Tag_MPextension_use
].int_value())
10681 out_attr
[elfcpp::Tag_MPextension_use
] = in_attr
[i
];
10685 case elfcpp::Tag_nodefaults
:
10686 // This tag is set if it exists, but the value is unused (and is
10687 // typically zero). We don't actually need to do anything here -
10688 // the merge happens automatically when the type flags are merged
10691 case elfcpp::Tag_also_compatible_with
:
10692 // Already done in Tag_CPU_arch.
10694 case elfcpp::Tag_conformance
:
10695 // Keep the attribute if it matches. Throw it away otherwise.
10696 // No attribute means no claim to conform.
10697 if (in_attr
[i
].string_value() != out_attr
[i
].string_value())
10698 out_attr
[i
].set_string_value("");
10703 const char* err_object
= NULL
;
10705 // The "known_obj_attributes" table does contain some undefined
10706 // attributes. Ensure that there are unused.
10707 if (out_attr
[i
].int_value() != 0
10708 || out_attr
[i
].string_value() != "")
10709 err_object
= "output";
10710 else if (in_attr
[i
].int_value() != 0
10711 || in_attr
[i
].string_value() != "")
10714 if (err_object
!= NULL
10715 && parameters
->options().warn_mismatch())
10717 // Attribute numbers >=64 (mod 128) can be safely ignored.
10718 if ((i
& 127) < 64)
10719 gold_error(_("%s: unknown mandatory EABI object attribute "
10723 gold_warning(_("%s: unknown EABI object attribute %d"),
10727 // Only pass on attributes that match in both inputs.
10728 if (!in_attr
[i
].matches(out_attr
[i
]))
10730 out_attr
[i
].set_int_value(0);
10731 out_attr
[i
].set_string_value("");
10736 // If out_attr was copied from in_attr then it won't have a type yet.
10737 if (in_attr
[i
].type() && !out_attr
[i
].type())
10738 out_attr
[i
].set_type(in_attr
[i
].type());
10741 // Merge Tag_compatibility attributes and any common GNU ones.
10742 this->attributes_section_data_
->merge(name
, pasd
);
10744 // Check for any attributes not known on ARM.
10745 typedef Vendor_object_attributes::Other_attributes Other_attributes
;
10746 const Other_attributes
* in_other_attributes
= pasd
->other_attributes(vendor
);
10747 Other_attributes::const_iterator in_iter
= in_other_attributes
->begin();
10748 Other_attributes
* out_other_attributes
=
10749 this->attributes_section_data_
->other_attributes(vendor
);
10750 Other_attributes::iterator out_iter
= out_other_attributes
->begin();
10752 while (in_iter
!= in_other_attributes
->end()
10753 || out_iter
!= out_other_attributes
->end())
10755 const char* err_object
= NULL
;
10758 // The tags for each list are in numerical order.
10759 // If the tags are equal, then merge.
10760 if (out_iter
!= out_other_attributes
->end()
10761 && (in_iter
== in_other_attributes
->end()
10762 || in_iter
->first
> out_iter
->first
))
10764 // This attribute only exists in output. We can't merge, and we
10765 // don't know what the tag means, so delete it.
10766 err_object
= "output";
10767 err_tag
= out_iter
->first
;
10768 int saved_tag
= out_iter
->first
;
10769 delete out_iter
->second
;
10770 out_other_attributes
->erase(out_iter
);
10771 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10773 else if (in_iter
!= in_other_attributes
->end()
10774 && (out_iter
!= out_other_attributes
->end()
10775 || in_iter
->first
< out_iter
->first
))
10777 // This attribute only exists in input. We can't merge, and we
10778 // don't know what the tag means, so ignore it.
10780 err_tag
= in_iter
->first
;
10783 else // The tags are equal.
10785 // As present, all attributes in the list are unknown, and
10786 // therefore can't be merged meaningfully.
10787 err_object
= "output";
10788 err_tag
= out_iter
->first
;
10790 // Only pass on attributes that match in both inputs.
10791 if (!in_iter
->second
->matches(*(out_iter
->second
)))
10793 // No match. Delete the attribute.
10794 int saved_tag
= out_iter
->first
;
10795 delete out_iter
->second
;
10796 out_other_attributes
->erase(out_iter
);
10797 out_iter
= out_other_attributes
->upper_bound(saved_tag
);
10801 // Matched. Keep the attribute and move to the next.
10807 if (err_object
&& parameters
->options().warn_mismatch())
10809 // Attribute numbers >=64 (mod 128) can be safely ignored. */
10810 if ((err_tag
& 127) < 64)
10812 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10813 err_object
, err_tag
);
10817 gold_warning(_("%s: unknown EABI object attribute %d"),
10818 err_object
, err_tag
);
10824 // Stub-generation methods for Target_arm.
10826 // Make a new Arm_input_section object.
10828 template<bool big_endian
>
10829 Arm_input_section
<big_endian
>*
10830 Target_arm
<big_endian
>::new_arm_input_section(
10832 unsigned int shndx
)
10834 Section_id
sid(relobj
, shndx
);
10836 Arm_input_section
<big_endian
>* arm_input_section
=
10837 new Arm_input_section
<big_endian
>(relobj
, shndx
);
10838 arm_input_section
->init();
10840 // Register new Arm_input_section in map for look-up.
10841 std::pair
<typename
Arm_input_section_map::iterator
, bool> ins
=
10842 this->arm_input_section_map_
.insert(std::make_pair(sid
, arm_input_section
));
10844 // Make sure that it we have not created another Arm_input_section
10845 // for this input section already.
10846 gold_assert(ins
.second
);
10848 return arm_input_section
;
10851 // Find the Arm_input_section object corresponding to the SHNDX-th input
10852 // section of RELOBJ.
10854 template<bool big_endian
>
10855 Arm_input_section
<big_endian
>*
10856 Target_arm
<big_endian
>::find_arm_input_section(
10858 unsigned int shndx
) const
10860 Section_id
sid(relobj
, shndx
);
10861 typename
Arm_input_section_map::const_iterator p
=
10862 this->arm_input_section_map_
.find(sid
);
10863 return (p
!= this->arm_input_section_map_
.end()) ? p
->second
: NULL
;
10866 // Make a new stub table.
10868 template<bool big_endian
>
10869 Stub_table
<big_endian
>*
10870 Target_arm
<big_endian
>::new_stub_table(Arm_input_section
<big_endian
>* owner
)
10872 Stub_table
<big_endian
>* stub_table
=
10873 new Stub_table
<big_endian
>(owner
);
10874 this->stub_tables_
.push_back(stub_table
);
10876 stub_table
->set_address(owner
->address() + owner
->data_size());
10877 stub_table
->set_file_offset(owner
->offset() + owner
->data_size());
10878 stub_table
->finalize_data_size();
10883 // Scan a relocation for stub generation.
10885 template<bool big_endian
>
10887 Target_arm
<big_endian
>::scan_reloc_for_stub(
10888 const Relocate_info
<32, big_endian
>* relinfo
,
10889 unsigned int r_type
,
10890 const Sized_symbol
<32>* gsym
,
10891 unsigned int r_sym
,
10892 const Symbol_value
<32>* psymval
,
10893 elfcpp::Elf_types
<32>::Elf_Swxword addend
,
10894 Arm_address address
)
10896 typedef typename Target_arm
<big_endian
>::Relocate Relocate
;
10898 const Arm_relobj
<big_endian
>* arm_relobj
=
10899 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
10901 bool target_is_thumb
;
10902 Symbol_value
<32> symval
;
10905 // This is a global symbol. Determine if we use PLT and if the
10906 // final target is THUMB.
10907 if (gsym
->use_plt_offset(Scan::get_reference_flags(r_type
)))
10909 // This uses a PLT, change the symbol value.
10910 symval
.set_output_value(this->plt_section()->address()
10911 + gsym
->plt_offset());
10913 target_is_thumb
= false;
10915 else if (gsym
->is_undefined())
10916 // There is no need to generate a stub symbol is undefined.
10921 ((gsym
->type() == elfcpp::STT_ARM_TFUNC
)
10922 || (gsym
->type() == elfcpp::STT_FUNC
10923 && !gsym
->is_undefined()
10924 && ((psymval
->value(arm_relobj
, 0) & 1) != 0)));
10929 // This is a local symbol. Determine if the final target is THUMB.
10930 target_is_thumb
= arm_relobj
->local_symbol_is_thumb_function(r_sym
);
10933 // Strip LSB if this points to a THUMB target.
10934 const Arm_reloc_property
* reloc_property
=
10935 arm_reloc_property_table
->get_implemented_static_reloc_property(r_type
);
10936 gold_assert(reloc_property
!= NULL
);
10937 if (target_is_thumb
10938 && reloc_property
->uses_thumb_bit()
10939 && ((psymval
->value(arm_relobj
, 0) & 1) != 0))
10941 Arm_address stripped_value
=
10942 psymval
->value(arm_relobj
, 0) & ~static_cast<Arm_address
>(1);
10943 symval
.set_output_value(stripped_value
);
10947 // Get the symbol value.
10948 Symbol_value
<32>::Value value
= psymval
->value(arm_relobj
, 0);
10950 // Owing to pipelining, the PC relative branches below actually skip
10951 // two instructions when the branch offset is 0.
10952 Arm_address destination
;
10955 case elfcpp::R_ARM_CALL
:
10956 case elfcpp::R_ARM_JUMP24
:
10957 case elfcpp::R_ARM_PLT32
:
10959 destination
= value
+ addend
+ 8;
10961 case elfcpp::R_ARM_THM_CALL
:
10962 case elfcpp::R_ARM_THM_XPC22
:
10963 case elfcpp::R_ARM_THM_JUMP24
:
10964 case elfcpp::R_ARM_THM_JUMP19
:
10966 destination
= value
+ addend
+ 4;
10969 gold_unreachable();
10972 Reloc_stub
* stub
= NULL
;
10973 Stub_type stub_type
=
10974 Reloc_stub::stub_type_for_reloc(r_type
, address
, destination
,
10976 if (stub_type
!= arm_stub_none
)
10978 // Try looking up an existing stub from a stub table.
10979 Stub_table
<big_endian
>* stub_table
=
10980 arm_relobj
->stub_table(relinfo
->data_shndx
);
10981 gold_assert(stub_table
!= NULL
);
10983 // Locate stub by destination.
10984 Reloc_stub::Key
stub_key(stub_type
, gsym
, arm_relobj
, r_sym
, addend
);
10986 // Create a stub if there is not one already
10987 stub
= stub_table
->find_reloc_stub(stub_key
);
10990 // create a new stub and add it to stub table.
10991 stub
= this->stub_factory().make_reloc_stub(stub_type
);
10992 stub_table
->add_reloc_stub(stub
, stub_key
);
10995 // Record the destination address.
10996 stub
->set_destination_address(destination
10997 | (target_is_thumb
? 1 : 0));
11000 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11001 if (this->fix_cortex_a8_
11002 && (r_type
== elfcpp::R_ARM_THM_JUMP24
11003 || r_type
== elfcpp::R_ARM_THM_JUMP19
11004 || r_type
== elfcpp::R_ARM_THM_CALL
11005 || r_type
== elfcpp::R_ARM_THM_XPC22
)
11006 && (address
& 0xfffU
) == 0xffeU
)
11008 // Found a candidate. Note we haven't checked the destination is
11009 // within 4K here: if we do so (and don't create a record) we can't
11010 // tell that a branch should have been relocated when scanning later.
11011 this->cortex_a8_relocs_info_
[address
] =
11012 new Cortex_a8_reloc(stub
, r_type
,
11013 destination
| (target_is_thumb
? 1 : 0));
11017 // This function scans a relocation sections for stub generation.
11018 // The template parameter Relocate must be a class type which provides
11019 // a single function, relocate(), which implements the machine
11020 // specific part of a relocation.
11022 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11023 // SHT_REL or SHT_RELA.
11025 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11026 // of relocs. OUTPUT_SECTION is the output section.
11027 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11028 // mapped to output offsets.
11030 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11031 // VIEW_SIZE is the size. These refer to the input section, unless
11032 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11033 // the output section.
11035 template<bool big_endian
>
11036 template<int sh_type
>
11038 Target_arm
<big_endian
>::scan_reloc_section_for_stubs(
11039 const Relocate_info
<32, big_endian
>* relinfo
,
11040 const unsigned char* prelocs
,
11041 size_t reloc_count
,
11042 Output_section
* output_section
,
11043 bool needs_special_offset_handling
,
11044 const unsigned char* view
,
11045 elfcpp::Elf_types
<32>::Elf_Addr view_address
,
11048 typedef typename Reloc_types
<sh_type
, 32, big_endian
>::Reloc Reltype
;
11049 const int reloc_size
=
11050 Reloc_types
<sh_type
, 32, big_endian
>::reloc_size
;
11052 Arm_relobj
<big_endian
>* arm_object
=
11053 Arm_relobj
<big_endian
>::as_arm_relobj(relinfo
->object
);
11054 unsigned int local_count
= arm_object
->local_symbol_count();
11056 Comdat_behavior comdat_behavior
= CB_UNDETERMINED
;
11058 for (size_t i
= 0; i
< reloc_count
; ++i
, prelocs
+= reloc_size
)
11060 Reltype
reloc(prelocs
);
11062 typename
elfcpp::Elf_types
<32>::Elf_WXword r_info
= reloc
.get_r_info();
11063 unsigned int r_sym
= elfcpp::elf_r_sym
<32>(r_info
);
11064 unsigned int r_type
= elfcpp::elf_r_type
<32>(r_info
);
11066 r_type
= this->get_real_reloc_type(r_type
);
11068 // Only a few relocation types need stubs.
11069 if ((r_type
!= elfcpp::R_ARM_CALL
)
11070 && (r_type
!= elfcpp::R_ARM_JUMP24
)
11071 && (r_type
!= elfcpp::R_ARM_PLT32
)
11072 && (r_type
!= elfcpp::R_ARM_THM_CALL
)
11073 && (r_type
!= elfcpp::R_ARM_THM_XPC22
)
11074 && (r_type
!= elfcpp::R_ARM_THM_JUMP24
)
11075 && (r_type
!= elfcpp::R_ARM_THM_JUMP19
)
11076 && (r_type
!= elfcpp::R_ARM_V4BX
))
11079 section_offset_type offset
=
11080 convert_to_section_size_type(reloc
.get_r_offset());
11082 if (needs_special_offset_handling
)
11084 offset
= output_section
->output_offset(relinfo
->object
,
11085 relinfo
->data_shndx
,
11091 // Create a v4bx stub if --fix-v4bx-interworking is used.
11092 if (r_type
== elfcpp::R_ARM_V4BX
)
11094 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
)
11096 // Get the BX instruction.
11097 typedef typename
elfcpp::Swap
<32, big_endian
>::Valtype Valtype
;
11098 const Valtype
* wv
=
11099 reinterpret_cast<const Valtype
*>(view
+ offset
);
11100 elfcpp::Elf_types
<32>::Elf_Swxword insn
=
11101 elfcpp::Swap
<32, big_endian
>::readval(wv
);
11102 const uint32_t reg
= (insn
& 0xf);
11106 // Try looking up an existing stub from a stub table.
11107 Stub_table
<big_endian
>* stub_table
=
11108 arm_object
->stub_table(relinfo
->data_shndx
);
11109 gold_assert(stub_table
!= NULL
);
11111 if (stub_table
->find_arm_v4bx_stub(reg
) == NULL
)
11113 // create a new stub and add it to stub table.
11114 Arm_v4bx_stub
* stub
=
11115 this->stub_factory().make_arm_v4bx_stub(reg
);
11116 gold_assert(stub
!= NULL
);
11117 stub_table
->add_arm_v4bx_stub(stub
);
11125 Stub_addend_reader
<sh_type
, big_endian
> stub_addend_reader
;
11126 elfcpp::Elf_types
<32>::Elf_Swxword addend
=
11127 stub_addend_reader(r_type
, view
+ offset
, reloc
);
11129 const Sized_symbol
<32>* sym
;
11131 Symbol_value
<32> symval
;
11132 const Symbol_value
<32> *psymval
;
11133 bool is_defined_in_discarded_section
;
11134 unsigned int shndx
;
11135 if (r_sym
< local_count
)
11138 psymval
= arm_object
->local_symbol(r_sym
);
11140 // If the local symbol belongs to a section we are discarding,
11141 // and that section is a debug section, try to find the
11142 // corresponding kept section and map this symbol to its
11143 // counterpart in the kept section. The symbol must not
11144 // correspond to a section we are folding.
11146 shndx
= psymval
->input_shndx(&is_ordinary
);
11147 is_defined_in_discarded_section
=
11149 && shndx
!= elfcpp::SHN_UNDEF
11150 && !arm_object
->is_section_included(shndx
)
11151 && !relinfo
->symtab
->is_section_folded(arm_object
, shndx
));
11153 // We need to compute the would-be final value of this local
11155 if (!is_defined_in_discarded_section
)
11157 typedef Sized_relobj_file
<32, big_endian
> ObjType
;
11158 typename
ObjType::Compute_final_local_value_status status
=
11159 arm_object
->compute_final_local_value(r_sym
, psymval
, &symval
,
11161 if (status
== ObjType::CFLV_OK
)
11163 // Currently we cannot handle a branch to a target in
11164 // a merged section. If this is the case, issue an error
11165 // and also free the merge symbol value.
11166 if (!symval
.has_output_value())
11168 const std::string
& section_name
=
11169 arm_object
->section_name(shndx
);
11170 arm_object
->error(_("cannot handle branch to local %u "
11171 "in a merged section %s"),
11172 r_sym
, section_name
.c_str());
11178 // We cannot determine the final value.
11185 const Symbol
* gsym
;
11186 gsym
= arm_object
->global_symbol(r_sym
);
11187 gold_assert(gsym
!= NULL
);
11188 if (gsym
->is_forwarder())
11189 gsym
= relinfo
->symtab
->resolve_forwards(gsym
);
11191 sym
= static_cast<const Sized_symbol
<32>*>(gsym
);
11192 if (sym
->has_symtab_index() && sym
->symtab_index() != -1U)
11193 symval
.set_output_symtab_index(sym
->symtab_index());
11195 symval
.set_no_output_symtab_entry();
11197 // We need to compute the would-be final value of this global
11199 const Symbol_table
* symtab
= relinfo
->symtab
;
11200 const Sized_symbol
<32>* sized_symbol
=
11201 symtab
->get_sized_symbol
<32>(gsym
);
11202 Symbol_table::Compute_final_value_status status
;
11203 Arm_address value
=
11204 symtab
->compute_final_value
<32>(sized_symbol
, &status
);
11206 // Skip this if the symbol has not output section.
11207 if (status
== Symbol_table::CFVS_NO_OUTPUT_SECTION
)
11209 symval
.set_output_value(value
);
11211 if (gsym
->type() == elfcpp::STT_TLS
)
11212 symval
.set_is_tls_symbol();
11213 else if (gsym
->type() == elfcpp::STT_GNU_IFUNC
)
11214 symval
.set_is_ifunc_symbol();
11217 is_defined_in_discarded_section
=
11218 (gsym
->is_defined_in_discarded_section()
11219 && gsym
->is_undefined());
11223 Symbol_value
<32> symval2
;
11224 if (is_defined_in_discarded_section
)
11226 if (comdat_behavior
== CB_UNDETERMINED
)
11228 std::string name
= arm_object
->section_name(relinfo
->data_shndx
);
11229 comdat_behavior
= get_comdat_behavior(name
.c_str());
11231 if (comdat_behavior
== CB_PRETEND
)
11233 // FIXME: This case does not work for global symbols.
11234 // We have no place to store the original section index.
11235 // Fortunately this does not matter for comdat sections,
11236 // only for sections explicitly discarded by a linker
11239 typename
elfcpp::Elf_types
<32>::Elf_Addr value
=
11240 arm_object
->map_to_kept_section(shndx
, &found
);
11242 symval2
.set_output_value(value
+ psymval
->input_value());
11244 symval2
.set_output_value(0);
11248 if (comdat_behavior
== CB_WARNING
)
11249 gold_warning_at_location(relinfo
, i
, offset
,
11250 _("relocation refers to discarded "
11252 symval2
.set_output_value(0);
11254 symval2
.set_no_output_symtab_entry();
11255 psymval
= &symval2
;
11258 // If symbol is a section symbol, we don't know the actual type of
11259 // destination. Give up.
11260 if (psymval
->is_section_symbol())
11263 this->scan_reloc_for_stub(relinfo
, r_type
, sym
, r_sym
, psymval
,
11264 addend
, view_address
+ offset
);
11268 // Scan an input section for stub generation.
11270 template<bool big_endian
>
11272 Target_arm
<big_endian
>::scan_section_for_stubs(
11273 const Relocate_info
<32, big_endian
>* relinfo
,
11274 unsigned int sh_type
,
11275 const unsigned char* prelocs
,
11276 size_t reloc_count
,
11277 Output_section
* output_section
,
11278 bool needs_special_offset_handling
,
11279 const unsigned char* view
,
11280 Arm_address view_address
,
11281 section_size_type view_size
)
11283 if (sh_type
== elfcpp::SHT_REL
)
11284 this->scan_reloc_section_for_stubs
<elfcpp::SHT_REL
>(
11289 needs_special_offset_handling
,
11293 else if (sh_type
== elfcpp::SHT_RELA
)
11294 // We do not support RELA type relocations yet. This is provided for
11296 this->scan_reloc_section_for_stubs
<elfcpp::SHT_RELA
>(
11301 needs_special_offset_handling
,
11306 gold_unreachable();
11309 // Group input sections for stub generation.
11311 // We group input sections in an output section so that the total size,
11312 // including any padding space due to alignment is smaller than GROUP_SIZE
11313 // unless the only input section in group is bigger than GROUP_SIZE already.
11314 // Then an ARM stub table is created to follow the last input section
11315 // in group. For each group an ARM stub table is created an is placed
11316 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
11317 // extend the group after the stub table.
11319 template<bool big_endian
>
11321 Target_arm
<big_endian
>::group_sections(
11323 section_size_type group_size
,
11324 bool stubs_always_after_branch
,
11327 // Group input sections and insert stub table
11328 Layout::Section_list section_list
;
11329 layout
->get_allocated_sections(§ion_list
);
11330 for (Layout::Section_list::const_iterator p
= section_list
.begin();
11331 p
!= section_list
.end();
11334 Arm_output_section
<big_endian
>* output_section
=
11335 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11336 output_section
->group_sections(group_size
, stubs_always_after_branch
,
11341 // Relaxation hook. This is where we do stub generation.
11343 template<bool big_endian
>
11345 Target_arm
<big_endian
>::do_relax(
11347 const Input_objects
* input_objects
,
11348 Symbol_table
* symtab
,
11352 // No need to generate stubs if this is a relocatable link.
11353 gold_assert(!parameters
->options().relocatable());
11355 // If this is the first pass, we need to group input sections into
11357 bool done_exidx_fixup
= false;
11358 typedef typename
Stub_table_list::iterator Stub_table_iterator
;
11361 // Determine the stub group size. The group size is the absolute
11362 // value of the parameter --stub-group-size. If --stub-group-size
11363 // is passed a negative value, we restrict stubs to be always after
11364 // the stubbed branches.
11365 int32_t stub_group_size_param
=
11366 parameters
->options().stub_group_size();
11367 bool stubs_always_after_branch
= stub_group_size_param
< 0;
11368 section_size_type stub_group_size
= abs(stub_group_size_param
);
11370 if (stub_group_size
== 1)
11373 // Thumb branch range is +-4MB has to be used as the default
11374 // maximum size (a given section can contain both ARM and Thumb
11375 // code, so the worst case has to be taken into account). If we are
11376 // fixing cortex-a8 errata, the branch range has to be even smaller,
11377 // since wide conditional branch has a range of +-1MB only.
11379 // This value is 48K less than that, which allows for 4096
11380 // 12-byte stubs. If we exceed that, then we will fail to link.
11381 // The user will have to relink with an explicit group size
11383 stub_group_size
= 4145152;
11386 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
11387 // page as the first half of a 32-bit branch straddling two 4K pages.
11388 // This is a crude way of enforcing that. In addition, long conditional
11389 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
11390 // erratum, limit the group size to (1M - 12k) to avoid unreachable
11391 // cortex-A8 stubs from long conditional branches.
11392 if (this->fix_cortex_a8_
)
11394 stubs_always_after_branch
= true;
11395 const section_size_type cortex_a8_group_size
= 1024 * (1024 - 12);
11396 stub_group_size
= std::max(stub_group_size
, cortex_a8_group_size
);
11399 group_sections(layout
, stub_group_size
, stubs_always_after_branch
, task
);
11401 // Also fix .ARM.exidx section coverage.
11402 Arm_output_section
<big_endian
>* exidx_output_section
= NULL
;
11403 for (Layout::Section_list::const_iterator p
=
11404 layout
->section_list().begin();
11405 p
!= layout
->section_list().end();
11407 if ((*p
)->type() == elfcpp::SHT_ARM_EXIDX
)
11409 if (exidx_output_section
== NULL
)
11410 exidx_output_section
=
11411 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11413 // We cannot handle this now.
11414 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
11415 "non-relocatable link"),
11416 exidx_output_section
->name(),
11420 if (exidx_output_section
!= NULL
)
11422 this->fix_exidx_coverage(layout
, input_objects
, exidx_output_section
,
11424 done_exidx_fixup
= true;
11429 // If this is not the first pass, addresses and file offsets have
11430 // been reset at this point, set them here.
11431 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11432 sp
!= this->stub_tables_
.end();
11435 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11436 off_t off
= align_address(owner
->original_size(),
11437 (*sp
)->addralign());
11438 (*sp
)->set_address_and_file_offset(owner
->address() + off
,
11439 owner
->offset() + off
);
11443 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
11444 // beginning of each relaxation pass, just blow away all the stubs.
11445 // Alternatively, we could selectively remove only the stubs and reloc
11446 // information for code sections that have moved since the last pass.
11447 // That would require more book-keeping.
11448 if (this->fix_cortex_a8_
)
11450 // Clear all Cortex-A8 reloc information.
11451 for (typename
Cortex_a8_relocs_info::const_iterator p
=
11452 this->cortex_a8_relocs_info_
.begin();
11453 p
!= this->cortex_a8_relocs_info_
.end();
11456 this->cortex_a8_relocs_info_
.clear();
11458 // Remove all Cortex-A8 stubs.
11459 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11460 sp
!= this->stub_tables_
.end();
11462 (*sp
)->remove_all_cortex_a8_stubs();
11465 // Scan relocs for relocation stubs
11466 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11467 op
!= input_objects
->relobj_end();
11470 Arm_relobj
<big_endian
>* arm_relobj
=
11471 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11472 // Lock the object so we can read from it. This is only called
11473 // single-threaded from Layout::finalize, so it is OK to lock.
11474 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11475 arm_relobj
->scan_sections_for_stubs(this, symtab
, layout
);
11478 // Check all stub tables to see if any of them have their data sizes
11479 // or addresses alignments changed. These are the only things that
11481 bool any_stub_table_changed
= false;
11482 Unordered_set
<const Output_section
*> sections_needing_adjustment
;
11483 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11484 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11487 if ((*sp
)->update_data_size_and_addralign())
11489 // Update data size of stub table owner.
11490 Arm_input_section
<big_endian
>* owner
= (*sp
)->owner();
11491 uint64_t address
= owner
->address();
11492 off_t offset
= owner
->offset();
11493 owner
->reset_address_and_file_offset();
11494 owner
->set_address_and_file_offset(address
, offset
);
11496 sections_needing_adjustment
.insert(owner
->output_section());
11497 any_stub_table_changed
= true;
11501 // Output_section_data::output_section() returns a const pointer but we
11502 // need to update output sections, so we record all output sections needing
11503 // update above and scan the sections here to find out what sections need
11505 for (Layout::Section_list::const_iterator p
= layout
->section_list().begin();
11506 p
!= layout
->section_list().end();
11509 if (sections_needing_adjustment
.find(*p
)
11510 != sections_needing_adjustment
.end())
11511 (*p
)->set_section_offsets_need_adjustment();
11514 // Stop relaxation if no EXIDX fix-up and no stub table change.
11515 bool continue_relaxation
= done_exidx_fixup
|| any_stub_table_changed
;
11517 // Finalize the stubs in the last relaxation pass.
11518 if (!continue_relaxation
)
11520 for (Stub_table_iterator sp
= this->stub_tables_
.begin();
11521 (sp
!= this->stub_tables_
.end()) && !any_stub_table_changed
;
11523 (*sp
)->finalize_stubs();
11525 // Update output local symbol counts of objects if necessary.
11526 for (Input_objects::Relobj_iterator op
= input_objects
->relobj_begin();
11527 op
!= input_objects
->relobj_end();
11530 Arm_relobj
<big_endian
>* arm_relobj
=
11531 Arm_relobj
<big_endian
>::as_arm_relobj(*op
);
11533 // Update output local symbol counts. We need to discard local
11534 // symbols defined in parts of input sections that are discarded by
11536 if (arm_relobj
->output_local_symbol_count_needs_update())
11538 // We need to lock the object's file to update it.
11539 Task_lock_obj
<Object
> tl(task
, arm_relobj
);
11540 arm_relobj
->update_output_local_symbol_count();
11545 return continue_relaxation
;
11548 // Relocate a stub.
11550 template<bool big_endian
>
11552 Target_arm
<big_endian
>::relocate_stub(
11554 const Relocate_info
<32, big_endian
>* relinfo
,
11555 Output_section
* output_section
,
11556 unsigned char* view
,
11557 Arm_address address
,
11558 section_size_type view_size
)
11561 const Stub_template
* stub_template
= stub
->stub_template();
11562 for (size_t i
= 0; i
< stub_template
->reloc_count(); i
++)
11564 size_t reloc_insn_index
= stub_template
->reloc_insn_index(i
);
11565 const Insn_template
* insn
= &stub_template
->insns()[reloc_insn_index
];
11567 unsigned int r_type
= insn
->r_type();
11568 section_size_type reloc_offset
= stub_template
->reloc_offset(i
);
11569 section_size_type reloc_size
= insn
->size();
11570 gold_assert(reloc_offset
+ reloc_size
<= view_size
);
11572 // This is the address of the stub destination.
11573 Arm_address target
= stub
->reloc_target(i
) + insn
->reloc_addend();
11574 Symbol_value
<32> symval
;
11575 symval
.set_output_value(target
);
11577 // Synthesize a fake reloc just in case. We don't have a symbol so
11579 unsigned char reloc_buffer
[elfcpp::Elf_sizes
<32>::rel_size
];
11580 memset(reloc_buffer
, 0, sizeof(reloc_buffer
));
11581 elfcpp::Rel_write
<32, big_endian
> reloc_write(reloc_buffer
);
11582 reloc_write
.put_r_offset(reloc_offset
);
11583 reloc_write
.put_r_info(elfcpp::elf_r_info
<32>(0, r_type
));
11584 elfcpp::Rel
<32, big_endian
> rel(reloc_buffer
);
11586 relocate
.relocate(relinfo
, this, output_section
,
11587 this->fake_relnum_for_stubs
, rel
, r_type
,
11588 NULL
, &symval
, view
+ reloc_offset
,
11589 address
+ reloc_offset
, reloc_size
);
11593 // Determine whether an object attribute tag takes an integer, a
11596 template<bool big_endian
>
11598 Target_arm
<big_endian
>::do_attribute_arg_type(int tag
) const
11600 if (tag
== Object_attribute::Tag_compatibility
)
11601 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11602 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL
);
11603 else if (tag
== elfcpp::Tag_nodefaults
)
11604 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11605 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT
);
11606 else if (tag
== elfcpp::Tag_CPU_raw_name
|| tag
== elfcpp::Tag_CPU_name
)
11607 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL
;
11609 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL
;
11611 return ((tag
& 1) != 0
11612 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11613 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL
);
11616 // Reorder attributes.
11618 // The ABI defines that Tag_conformance should be emitted first, and that
11619 // Tag_nodefaults should be second (if either is defined). This sets those
11620 // two positions, and bumps up the position of all the remaining tags to
11623 template<bool big_endian
>
11625 Target_arm
<big_endian
>::do_attributes_order(int num
) const
11627 // Reorder the known object attributes in output. We want to move
11628 // Tag_conformance to position 4 and Tag_conformance to position 5
11629 // and shift everything between 4 .. Tag_conformance - 1 to make room.
11631 return elfcpp::Tag_conformance
;
11633 return elfcpp::Tag_nodefaults
;
11634 if ((num
- 2) < elfcpp::Tag_nodefaults
)
11636 if ((num
- 1) < elfcpp::Tag_conformance
)
11641 // Scan a span of THUMB code for Cortex-A8 erratum.
11643 template<bool big_endian
>
11645 Target_arm
<big_endian
>::scan_span_for_cortex_a8_erratum(
11646 Arm_relobj
<big_endian
>* arm_relobj
,
11647 unsigned int shndx
,
11648 section_size_type span_start
,
11649 section_size_type span_end
,
11650 const unsigned char* view
,
11651 Arm_address address
)
11653 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11655 // The opcode is BLX.W, BL.W, B.W, Bcc.W
11656 // The branch target is in the same 4KB region as the
11657 // first half of the branch.
11658 // The instruction before the branch is a 32-bit
11659 // length non-branch instruction.
11660 section_size_type i
= span_start
;
11661 bool last_was_32bit
= false;
11662 bool last_was_branch
= false;
11663 while (i
< span_end
)
11665 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11666 const Valtype
* wv
= reinterpret_cast<const Valtype
*>(view
+ i
);
11667 uint32_t insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11668 bool is_blx
= false, is_b
= false;
11669 bool is_bl
= false, is_bcc
= false;
11671 bool insn_32bit
= (insn
& 0xe000) == 0xe000 && (insn
& 0x1800) != 0x0000;
11674 // Load the rest of the insn (in manual-friendly order).
11675 insn
= (insn
<< 16) | elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11677 // Encoding T4: B<c>.W.
11678 is_b
= (insn
& 0xf800d000U
) == 0xf0009000U
;
11679 // Encoding T1: BL<c>.W.
11680 is_bl
= (insn
& 0xf800d000U
) == 0xf000d000U
;
11681 // Encoding T2: BLX<c>.W.
11682 is_blx
= (insn
& 0xf800d000U
) == 0xf000c000U
;
11683 // Encoding T3: B<c>.W (not permitted in IT block).
11684 is_bcc
= ((insn
& 0xf800d000U
) == 0xf0008000U
11685 && (insn
& 0x07f00000U
) != 0x03800000U
);
11688 bool is_32bit_branch
= is_b
|| is_bl
|| is_blx
|| is_bcc
;
11690 // If this instruction is a 32-bit THUMB branch that crosses a 4K
11691 // page boundary and it follows 32-bit non-branch instruction,
11692 // we need to work around.
11693 if (is_32bit_branch
11694 && ((address
+ i
) & 0xfffU
) == 0xffeU
11696 && !last_was_branch
)
11698 // Check to see if there is a relocation stub for this branch.
11699 bool force_target_arm
= false;
11700 bool force_target_thumb
= false;
11701 const Cortex_a8_reloc
* cortex_a8_reloc
= NULL
;
11702 Cortex_a8_relocs_info::const_iterator p
=
11703 this->cortex_a8_relocs_info_
.find(address
+ i
);
11705 if (p
!= this->cortex_a8_relocs_info_
.end())
11707 cortex_a8_reloc
= p
->second
;
11708 bool target_is_thumb
= (cortex_a8_reloc
->destination() & 1) != 0;
11710 if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11711 && !target_is_thumb
)
11712 force_target_arm
= true;
11713 else if (cortex_a8_reloc
->r_type() == elfcpp::R_ARM_THM_CALL
11714 && target_is_thumb
)
11715 force_target_thumb
= true;
11719 Stub_type stub_type
= arm_stub_none
;
11721 // Check if we have an offending branch instruction.
11722 uint16_t upper_insn
= (insn
>> 16) & 0xffffU
;
11723 uint16_t lower_insn
= insn
& 0xffffU
;
11724 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
11726 if (cortex_a8_reloc
!= NULL
11727 && cortex_a8_reloc
->reloc_stub() != NULL
)
11728 // We've already made a stub for this instruction, e.g.
11729 // it's a long branch or a Thumb->ARM stub. Assume that
11730 // stub will suffice to work around the A8 erratum (see
11731 // setting of always_after_branch above).
11735 offset
= RelocFuncs::thumb32_cond_branch_offset(upper_insn
,
11737 stub_type
= arm_stub_a8_veneer_b_cond
;
11739 else if (is_b
|| is_bl
|| is_blx
)
11741 offset
= RelocFuncs::thumb32_branch_offset(upper_insn
,
11746 stub_type
= (is_blx
11747 ? arm_stub_a8_veneer_blx
11749 ? arm_stub_a8_veneer_bl
11750 : arm_stub_a8_veneer_b
));
11753 if (stub_type
!= arm_stub_none
)
11755 Arm_address pc_for_insn
= address
+ i
+ 4;
11757 // The original instruction is a BL, but the target is
11758 // an ARM instruction. If we were not making a stub,
11759 // the BL would have been converted to a BLX. Use the
11760 // BLX stub instead in that case.
11761 if (this->may_use_v5t_interworking() && force_target_arm
11762 && stub_type
== arm_stub_a8_veneer_bl
)
11764 stub_type
= arm_stub_a8_veneer_blx
;
11768 // Conversely, if the original instruction was
11769 // BLX but the target is Thumb mode, use the BL stub.
11770 else if (force_target_thumb
11771 && stub_type
== arm_stub_a8_veneer_blx
)
11773 stub_type
= arm_stub_a8_veneer_bl
;
11781 // If we found a relocation, use the proper destination,
11782 // not the offset in the (unrelocated) instruction.
11783 // Note this is always done if we switched the stub type above.
11784 if (cortex_a8_reloc
!= NULL
)
11785 offset
= (off_t
) (cortex_a8_reloc
->destination() - pc_for_insn
);
11787 Arm_address target
= (pc_for_insn
+ offset
) | (is_blx
? 0 : 1);
11789 // Add a new stub if destination address in in the same page.
11790 if (((address
+ i
) & ~0xfffU
) == (target
& ~0xfffU
))
11792 Cortex_a8_stub
* stub
=
11793 this->stub_factory_
.make_cortex_a8_stub(stub_type
,
11797 Stub_table
<big_endian
>* stub_table
=
11798 arm_relobj
->stub_table(shndx
);
11799 gold_assert(stub_table
!= NULL
);
11800 stub_table
->add_cortex_a8_stub(address
+ i
, stub
);
11805 i
+= insn_32bit
? 4 : 2;
11806 last_was_32bit
= insn_32bit
;
11807 last_was_branch
= is_32bit_branch
;
11811 // Apply the Cortex-A8 workaround.
11813 template<bool big_endian
>
11815 Target_arm
<big_endian
>::apply_cortex_a8_workaround(
11816 const Cortex_a8_stub
* stub
,
11817 Arm_address stub_address
,
11818 unsigned char* insn_view
,
11819 Arm_address insn_address
)
11821 typedef typename
elfcpp::Swap
<16, big_endian
>::Valtype Valtype
;
11822 Valtype
* wv
= reinterpret_cast<Valtype
*>(insn_view
);
11823 Valtype upper_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
);
11824 Valtype lower_insn
= elfcpp::Swap
<16, big_endian
>::readval(wv
+ 1);
11825 off_t branch_offset
= stub_address
- (insn_address
+ 4);
11827 typedef struct Arm_relocate_functions
<big_endian
> RelocFuncs
;
11828 switch (stub
->stub_template()->type())
11830 case arm_stub_a8_veneer_b_cond
:
11831 // For a conditional branch, we re-write it to be an unconditional
11832 // branch to the stub. We use the THUMB-2 encoding here.
11833 upper_insn
= 0xf000U
;
11834 lower_insn
= 0xb800U
;
11836 case arm_stub_a8_veneer_b
:
11837 case arm_stub_a8_veneer_bl
:
11838 case arm_stub_a8_veneer_blx
:
11839 if ((lower_insn
& 0x5000U
) == 0x4000U
)
11840 // For a BLX instruction, make sure that the relocation is
11841 // rounded up to a word boundary. This follows the semantics of
11842 // the instruction which specifies that bit 1 of the target
11843 // address will come from bit 1 of the base address.
11844 branch_offset
= (branch_offset
+ 2) & ~3;
11846 // Put BRANCH_OFFSET back into the insn.
11847 gold_assert(!Bits
<25>::has_overflow32(branch_offset
));
11848 upper_insn
= RelocFuncs::thumb32_branch_upper(upper_insn
, branch_offset
);
11849 lower_insn
= RelocFuncs::thumb32_branch_lower(lower_insn
, branch_offset
);
11853 gold_unreachable();
11856 // Put the relocated value back in the object file:
11857 elfcpp::Swap
<16, big_endian
>::writeval(wv
, upper_insn
);
11858 elfcpp::Swap
<16, big_endian
>::writeval(wv
+ 1, lower_insn
);
11861 template<bool big_endian
>
11862 class Target_selector_arm
: public Target_selector
11865 Target_selector_arm()
11866 : Target_selector(elfcpp::EM_ARM
, 32, big_endian
,
11867 (big_endian
? "elf32-bigarm" : "elf32-littlearm"),
11868 (big_endian
? "armelfb" : "armelf"))
11872 do_instantiate_target()
11873 { return new Target_arm
<big_endian
>(); }
11876 // Fix .ARM.exidx section coverage.
11878 template<bool big_endian
>
11880 Target_arm
<big_endian
>::fix_exidx_coverage(
11882 const Input_objects
* input_objects
,
11883 Arm_output_section
<big_endian
>* exidx_section
,
11884 Symbol_table
* symtab
,
11887 // We need to look at all the input sections in output in ascending
11888 // order of of output address. We do that by building a sorted list
11889 // of output sections by addresses. Then we looks at the output sections
11890 // in order. The input sections in an output section are already sorted
11891 // by addresses within the output section.
11893 typedef std::set
<Output_section
*, output_section_address_less_than
>
11894 Sorted_output_section_list
;
11895 Sorted_output_section_list sorted_output_sections
;
11897 // Find out all the output sections of input sections pointed by
11898 // EXIDX input sections.
11899 for (Input_objects::Relobj_iterator p
= input_objects
->relobj_begin();
11900 p
!= input_objects
->relobj_end();
11903 Arm_relobj
<big_endian
>* arm_relobj
=
11904 Arm_relobj
<big_endian
>::as_arm_relobj(*p
);
11905 std::vector
<unsigned int> shndx_list
;
11906 arm_relobj
->get_exidx_shndx_list(&shndx_list
);
11907 for (size_t i
= 0; i
< shndx_list
.size(); ++i
)
11909 const Arm_exidx_input_section
* exidx_input_section
=
11910 arm_relobj
->exidx_input_section_by_shndx(shndx_list
[i
]);
11911 gold_assert(exidx_input_section
!= NULL
);
11912 if (!exidx_input_section
->has_errors())
11914 unsigned int text_shndx
= exidx_input_section
->link();
11915 Output_section
* os
= arm_relobj
->output_section(text_shndx
);
11916 if (os
!= NULL
&& (os
->flags() & elfcpp::SHF_ALLOC
) != 0)
11917 sorted_output_sections
.insert(os
);
11922 // Go over the output sections in ascending order of output addresses.
11923 typedef typename Arm_output_section
<big_endian
>::Text_section_list
11925 Text_section_list sorted_text_sections
;
11926 for (typename
Sorted_output_section_list::iterator p
=
11927 sorted_output_sections
.begin();
11928 p
!= sorted_output_sections
.end();
11931 Arm_output_section
<big_endian
>* arm_output_section
=
11932 Arm_output_section
<big_endian
>::as_arm_output_section(*p
);
11933 arm_output_section
->append_text_sections_to_list(&sorted_text_sections
);
11936 exidx_section
->fix_exidx_coverage(layout
, sorted_text_sections
, symtab
,
11937 merge_exidx_entries(), task
);
11940 Target_selector_arm
<false> target_selector_arm
;
11941 Target_selector_arm
<true> target_selector_armbe
;
11943 } // End anonymous namespace.