include/ChangeLog

   1 2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
   2
   3         * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
   4         (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
   5         (ARM_ARCH_V8M_MAIN_DSP): Likewise.
   6
   7 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
   8
   9         * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
  10
  11 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  12
  13         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
  14         fields.
  15         (struct arc_long_opcode): Delete.
  16         (struct arc_operand): Change types for insert and extract
  17         handlers.
  18
  19 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  20
  21         * opcode/arc.h: Make macros 64-bit safe.
  22
  23 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  24
  25         * opcode/arc.h (arc_opcode_len): Declare.
  26         (ARC_SHORT): Delete.
  27
  28 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
  29             Andrew Waterman <andrew@sifive.com>
  30
  31         Add support for RISC-V architecture.
  32         * dis-asm.h: Add prototypes for print_insn_riscv and
  33         print_riscv_disassembler_options.
  34         * elf/riscv.h: New file.
  35         * opcode/riscv-opc.h: New file.
  36         * opcode/riscv.h: New file.
  37
  38 2016-10-17  Nick Clifton  <nickc@redhat.com>
  39
  40         * elf/common.h (DT_SYMTAB_SHNDX): Define.
  41         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
  42         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
  43         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
  44         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
  45         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
  46         (ELFOSABI_OPENVOS): Define.
  47         (GRP_MASKOS, GRP_MASKPROC): Define.
  48
  49 2016-10-14  Pedro Alves  <palves@redhat.com>
  50
  51         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
  52         OVERRIDE): Define as empty.
  53         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
  54         __final.
  55         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
  56         empty.
  57
  58 2016-10-14  Pedro Alves  <palves@redhat.com>
  59
  60         * ansidecl.h (GCC_FINAL): Delete.
  61         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
  62
  63 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
  64
  65         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
  66
  67 2016-09-29  Alan Modra  <amodra@gmail.com>
  68
  69         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
  70
  71 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
  72
  73         * opcode/arc.h (insn_class_t): Add two new classes.
  74
  75 2016-09-26  Alan Modra  <amodra@gmail.com>
  76
  77         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
  78
  79 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  80
  81         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
  82
  83 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  84
  85         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
  86         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
  87         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
  88         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
  89
  90 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  91
  92         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
  93         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
  94         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
  95         aarch64_insn_classes.
  96
  97 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  98
  99         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
 100         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
 101         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
 102
 103 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 104
 105         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
 106         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
 107         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
 108
 109 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 110
 111         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 112         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 113         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 114         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 115         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 116         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 117         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 118         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 119         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 120         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 121         (aarch64_sve_dupm_mov_immediate_p): Declare.
 122
 123 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 124
 125         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 126         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 127         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 128         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 129         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 130
 131 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 132
 133         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 134         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 135         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 136         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 137         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 138         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 139         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 140         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 141         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 142         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 143         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 144         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 145         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 146         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 147         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 148         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 149         Likewise.
 150
 151 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 152
 153         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 154         aarch64_opnd.
 155         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 156         (aarch64_opnd_info): Make shifter.amount an int64_t and
 157         rearrange the fields.
 158
 159 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 160
 161         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 162         (AARCH64_OPND_SVE_PRFOP): Likewise.
 163         (aarch64_sve_pattern_array): Declare.
 164         (aarch64_sve_prfop_array): Likewise.
 165
 166 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 167
 168         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 169         (AARCH64_OPND_QLF_P_M): Likewise.
 170
 171 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 172
 173         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 174         aarch64_operand_class.
 175         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 176         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 177         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 178         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 179         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 180         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 181         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 182         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 183
 184 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 185
 186         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 187         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 188
 189 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 190
 191         * opcode/aarch64.h (F_STRICT): New flag.
 192
 193 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 194
 195         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 196
 197 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 198         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 199         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 200         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 201         relocation.
 202
 203 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 204
 205         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 206         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 207
 208 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 209
 210         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 211
 212 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 213
 214         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 215
 216 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 217
 218         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 219         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 220         ARC_NUM_ADDRTYPES.
 221         * opcode/arc.h: Add BMU to insn_class_t enum.
 222         * opcode/arc.h: Add PMU to insn_class_t enum.
 223
 224 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 225
 226         * dis-asm.h: Declare print_arc_disassembler_options.
 227
 228 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 229
 230         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 231         out_implib_bfd fields.
 232
 233 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 234
 235         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 236
 237 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 238
 239         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 240         (SHF_ARM_PURECODE): ... this.
 241
 242 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 243
 244         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 245         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 246         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 247         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 248
 249 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 250
 251         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 252         of enabled FPU features.
 253
 254 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 255
 256         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 257         SPARC_OPCODE_ARCH_MAX into the enum.
 258
 259 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 260
 261         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 262
 263 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 264
 265         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 266
 267 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 268
 269         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 270
 271 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 272
 273         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 274         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 275         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 276         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 277
 278 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 279
 280         * opcode/arc.h: Make insn_class_t alphabetical again.
 281
 282 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 283
 284         * elf/dlx.h: Wrap in extern C.
 285         * elf/xtensa.h: Likewise.
 286         * opcode/arc.h: Likewise.
 287
 288 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 289
 290         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 291         tilegx_pipeline.
 292
 293 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 294
 295         * opcode/arc.h: Add nps400 extension and instruction
 296         subclass.
 297         Remove ARC_OPCODE_NPS400
 298         * elf/arc.h: Remove E_ARC_MACH_NPS400
 299
 300 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 301
 302         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 303         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 304         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 305         SPARC_OPCODE_ARCH_V9M.
 306
 307 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 308
 309         * opcode/msp430-decode.h (MSP430_Size): Remove.
 310         (Msp430_Opcode_Decoded): Change type of size to int.
 311
 312 2016-06-11  Alan Modra  <amodra@gmail.com>
 313
 314         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 315
 316 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 317
 318         * opcode/sparc.h: Add missing documentation for hyperprivileged
 319         registers in rd (%) and rs1 ($).
 320
 321 2016-06-07  Alan Modra  <amodra@gmail.com>
 322
 323         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 324         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 325         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 326         PPC_APUINFO_VLE: Define.
 327
 328 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 329
 330         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 331         entries.
 332         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 333
 334 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 335
 336         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 337         (struct arc_long_opcode): New structure.
 338         (arc_long_opcodes): Declare.
 339         (arc_num_long_opcodes): Declare.
 340
 341 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 342
 343         * elf/mips.h: Add extern "C".
 344         * elf/sh.h: Likewise.
 345         * opcode/d10v.h: Likewise.
 346         * opcode/d30v.h: Likewise.
 347         * opcode/ia64.h: Likewise.
 348         * opcode/mips.h: Likewise.
 349         * opcode/ppc.h: Likewise.
 350         * opcode/sparc.h: Likewise.
 351         * opcode/tic6x.h: Likewise.
 352         * opcode/v850.h: Likewise.
 353
 354 2016-05-28  Alan Modra  <amodra@gmail.com>
 355
 356         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 357         Return void from multiple_definition, multiple_common,
 358         add_to_set, constructor, warning, undefined_symbol,
 359         reloc_overflow, reloc_dangerous and unattached_reloc.
 360
 361 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 362
 363         * opcode/metag.h: wrap declarations in extern "C".
 364
 365 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 366
 367         * opcode/arc.h (insn_subclass_t): Add COND.
 368         (flag_class_t): Add F_CLASS_EXTEND.
 369
 370 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 371
 372         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 373         insn_class.
 374         (struct arc_flag_class): Renamed attribute class to flag_class.
 375
 376 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 377
 378         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 379         plain symbol.
 380
 381 2016-04-29  Tom Tromey  <tom@tromey.com>
 382
 383         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 384         DW_LANG_Rust_old>: New constants.
 385
 386 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 387
 388         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 389         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 390         * opcode/mips.h (ASE_DSPR3): New macro.
 391
 392 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 393             Nick Clifton  <nickc@redhat.com>
 394
 395         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 396         enumerator.
 397         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 398         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 399         (ARM_SYM_BRANCH_TYPE): Replace by ...
 400         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 401         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 402         BFD_ASSERT is defined or not.
 403
 404 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 405
 406         * elf/arm.h (Tag_DSP_extension): Define.
 407
 408 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 409
 410         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 411
 412 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 413
 414         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 415         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 416         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 417         for the high core bits.
 418
 419 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 420
 421         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 422         (ARC_SYNTAX_NOP): Likewsie.
 423         (ARC_OP1_MUST_BE_IMM): Update defined value.
 424         (ARC_OP1_IMM_IMPLIED): Likewise.
 425         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 426
 427 2016-04-28  Nick Clifton  <nickc@redhat.com>
 428
 429         PR target/19722
 430         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 431
 432 2016-04-27  Alan Modra  <amodra@gmail.com>
 433
 434         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 435         undef.  Formatting.
 436
 437 2016-04-21  Nick Clifton  <nickc@redhat.com>
 438
 439         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 440
 441 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 442
 443         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 444
 445 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 446
 447         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 448
 449 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 450
 451         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 452
 453 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 454
 455         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 456
 457 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 458
 459         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 460         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 461
 462 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 463
 464         * opcode/arc.h (flag_class_t): Update.
 465         (ARC_OPCODE_NONE): Define.
 466         (ARC_OPCODE_ARCALL): Likewise.
 467         (ARC_OPCODE_ARCFPX): Likewise.
 468         (ARC_REGISTER_READONLY): Likewise.
 469         (ARC_REGISTER_WRITEONLY): Likewise.
 470         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 471         (arc_aux_reg): Add cpu.
 472
 473 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 474
 475         * opcode/arc.h (arc_num_opcodes): Remove.
 476         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 477         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 478         (ARC_SUFFIX_FLAG): Define.
 479         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 480         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 481         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 482         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 483         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 484         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 485         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 486         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 487         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 488         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 489
 490 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 491
 492         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 493         (ARC_FPUDA): Define.
 494         (arc_aux_reg): Add new field.
 495
 496 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 497
 498         * opcode/arc-func.h (replace_bits24): Changed.
 499         (replace_bits24_be): Created.
 500
 501 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 502
 503         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 504         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 505         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 506         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 507         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 508         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 509         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 510         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 511         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 512         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 513         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 514         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 515         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 516         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 517
 518 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 519
 520         * opcode/i960.h: Add const qualifiers.
 521         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 522
 523 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 524
 525         * opcodes/arc.h (insn_class_t): Add BITOP type.
 526
 527 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 528
 529         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 530         new classes instead.
 531
 532 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 533
 534         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 535         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 536
 537 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 538
 539         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 540
 541 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 542
 543         * elf/arc.h (EF_ARC_MACH): Delete.
 544         (EF_ARC_MACH_MSK): Remove out of date comment.
 545
 546 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 547
 548         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 549
 550 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 551
 552         PR ld/19807
 553         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 554
 555 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 556             Andrew Burgess  <andrew.burgess@embecosm.com>
 557
 558         * elf/arc-reloc.def: Add a call to ME within the formula for each
 559         relocation that requires middle-endian correction.
 560
 561 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 562
 563         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 564         * opcode/h8300.h (struct h8_opcode): Likewise.
 565         * opcode/hppa.h (struct pa_opcode): Likewise.
 566         * opcode/msp430.h: Likewise.
 567         * opcode/spu.h (struct spu_opcode): Likewise.
 568         * opcode/tic30.h (struct _register): Likewise.
 569         * opcode/tic4x.h (struct tic4x_register): Likewise.
 570         (struct tic4x_cond): Likewise.
 571         (struct tic4x_indirect): Likewise.
 572         (struct tic4x_inst): Likewise.
 573         * opcode/visium.h (struct reg_entry): Likewise.
 574
 575 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 576
 577         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 578         (ARM_CPU_HAS_FEATURE): Add comment.
 579
 580 2016-03-03  Than McIntosh <thanm@google.com>
 581
 582         * plugin-api.h: Add new hooks to the plugin transfer vector to
 583         to support querying section alignment and section size.
 584         (ld_plugin_get_input_section_alignment): New hook.
 585         (ld_plugin_get_input_section_size): New hook.
 586         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 587         and LDPT_GET_INPUT_SECTION_SIZE.
 588         (ld_plugin_tv): Add tv_get_input_section_alignment and
 589         tv_get_input_section_size.
 590
 591 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 592
 593         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 594
 595 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 596
 597         PR ld/19645
 598         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 599         (bfd_link_info): Add elf_stt_common.
 600
 601 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 602
 603         PR ld/19636
 604         PR ld/19704
 605         PR ld/19719
 606         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 607
 608 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 609             Jiong Wang  <jiong.wang@arm.com>
 610
 611         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 612
 613 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 614             Janek van Oirschot  <jvanoirs@synopsys.com>
 615
 616         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 617         (arc_num_relax_opcodes): Declare.
 618
 619 2016-02-09  Nick Clifton  <nickc@redhat.com>
 620
 621         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 622         * opcode/nds32.h (nds32_r45map): Likewise.
 623         (nds32_r54map): Likewise.
 624         * opcode/visium.h (gen_reg_table): Likewise.
 625         (fp_reg_table, cc_table, opcode_table): Likewise.
 626
 627 2016-02-09  Alan Modra  <amodra@gmail.com>
 628
 629         PR 16583
 630         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 631
 632 2016-02-04  Nick Clifton  <nickc@redhat.com>
 633
 634         PR target/19561
 635         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 636         (RRUX): Synthesise using case 2 rather than 7.
 637
 638 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 639
 640         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 641         (NT_FREEBSD_PROCSTAT_PROC): Define.
 642         (NT_FREEBSD_PROCSTAT_FILES): Define.
 643         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 644         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 645         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 646         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 647         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 648         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 649         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 650
 651 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 652             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 653
 654         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 655         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 656         (ARC_TLS_LE_32): Fixed formula.
 657         (ARC_TLS_GD_LD): Use new special function.
 658         * opcode/arc-func.h: Changed all the replacement
 659         functions to clear the patching bits before doing an or it with the value
 660         argument.
 661
 662 2016-01-18  Nick Clifton  <nickc@redhat.com>
 663
 664         PR ld/19440
 665         * coff/internal.h (internal_syment): Use int to hold section
 666         number.
 667         (N_UNDEF): Cast to int not short.
 668         (N_ABS): Likewise.
 669         (N_DEBUG): Likewise.
 670         (N_TV): Likewise.
 671         (P_TV): Likewise.
 672
 673 2016-01-11  Nick Clifton  <nickc@redhat.com>
 674
 675         Import this change from GCC mainline:
 676
 677         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 678
 679         * longlong.h: Change !__SHMEDIA__ to
 680         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 681         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 682
 683 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 684
 685         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 686
 687 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 688
 689         * libiberty.h (dupargv): Change arg to char * const *.
 690         (writeargv, countargv): Likewise.
 691
 692 2016-01-01  Alan Modra  <amodra@gmail.com>
 693
 694         Update year range in copyright notice of all files.
 695
 696 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 697 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 698 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 699 som/ChangeLog-1015, and vms/ChangeLog-1015
 700 \f
 701 Copyright (C) 2016 Free Software Foundation, Inc.
 702
 703 Copying and distribution of this file, with or without modification,
 704 are permitted in any medium without royalty provided the copyright
 705 notice and this notice are preserved.
 706
 707 Local Variables:
 708 mode: change-log
 709 left-margin: 8
 710 fill-column: 74
 711 version-control: never
 712 End: