include/ChangeLog

   1 2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
   2
   3         * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
   4         instruction classes.
   5
   6 2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
   7
   8         * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
   9         hwcaps2.
  10
  11 2016-11-22  Alan Modra  <amodra@gmail.com>
  12
  13         PR 20744
  14         * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
  15
  16 2016-11-03  David Tolnay <dtolnay@gmail.com>
  17             Mark Wielaard  <mark@klomp.org>
  18
  19         * demangle.h (DMGL_RUST): New macro.
  20         (DMGL_STYLE_MASK): Add DMGL_RUST.
  21         (demangling_styles): Add dlang_rust.
  22         (RUST_DEMANGLING_STYLE_STRING): New macro.
  23         (RUST_DEMANGLING): New macro.
  24         (rust_demangle): New prototype.
  25         (rust_is_mangled): Likewise.
  26         (rust_demangle_sym): Likewise.
  27
  28 2016-11-07  Jason Merrill  <jason@redhat.com>
  29
  30         * demangle.h (enum demangle_component_type): Add
  31         DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
  32
  33 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  34
  35         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
  36         AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
  37         (enum aarch64_op): Add OP_FCMLA_ELEM.
  38
  39 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  40
  41         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
  42         (enum aarch64_insn_class): Add ldst_imm10.
  43
  44 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  45
  46         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
  47
  48 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  49
  50         * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
  51         (AARCH64_ARCH_V8_3): Define.
  52         (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
  53
  54 2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  55
  56         * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
  57         (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
  58         (ARM_ARCH_V8M_MAIN_DSP): Likewise.
  59
  60 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  61
  62         * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
  63
  64 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  65
  66         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
  67         fields.
  68         (struct arc_long_opcode): Delete.
  69         (struct arc_operand): Change types for insert and extract
  70         handlers.
  71
  72 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  73
  74         * opcode/arc.h: Make macros 64-bit safe.
  75
  76 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  77
  78         * opcode/arc.h (arc_opcode_len): Declare.
  79         (ARC_SHORT): Delete.
  80
  81 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
  82             Andrew Waterman <andrew@sifive.com>
  83
  84         Add support for RISC-V architecture.
  85         * dis-asm.h: Add prototypes for print_insn_riscv and
  86         print_riscv_disassembler_options.
  87         * elf/riscv.h: New file.
  88         * opcode/riscv-opc.h: New file.
  89         * opcode/riscv.h: New file.
  90
  91 2016-10-17  Nick Clifton  <nickc@redhat.com>
  92
  93         * elf/common.h (DT_SYMTAB_SHNDX): Define.
  94         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
  95         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
  96         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
  97         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
  98         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
  99         (ELFOSABI_OPENVOS): Define.
 100         (GRP_MASKOS, GRP_MASKPROC): Define.
 101
 102 2016-10-14  Pedro Alves  <palves@redhat.com>
 103
 104         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
 105         OVERRIDE): Define as empty.
 106         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
 107         __final.
 108         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
 109         empty.
 110
 111 2016-10-14  Pedro Alves  <palves@redhat.com>
 112
 113         * ansidecl.h (GCC_FINAL): Delete.
 114         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
 115
 116 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
 117
 118         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
 119
 120 2016-09-29  Alan Modra  <amodra@gmail.com>
 121
 122         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
 123
 124 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
 125
 126         * opcode/arc.h (insn_class_t): Add two new classes.
 127
 128 2016-09-26  Alan Modra  <amodra@gmail.com>
 129
 130         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
 131
 132 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 133
 134         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
 135
 136 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 137
 138         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
 139         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
 140         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
 141         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
 142
 143 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 144
 145         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
 146         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
 147         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
 148         aarch64_insn_classes.
 149
 150 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 151
 152         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
 153         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
 154         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
 155
 156 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 157
 158         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
 159         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
 160         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
 161
 162 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 163
 164         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 165         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 166         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 167         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 168         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 169         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 170         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 171         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 172         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 173         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 174         (aarch64_sve_dupm_mov_immediate_p): Declare.
 175
 176 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 177
 178         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 179         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 180         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 181         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 182         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 183
 184 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 185
 186         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 187         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 188         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 189         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 190         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 191         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 192         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 193         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 194         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 195         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 196         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 197         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 198         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 199         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 200         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 201         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 202         Likewise.
 203
 204 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 205
 206         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 207         aarch64_opnd.
 208         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 209         (aarch64_opnd_info): Make shifter.amount an int64_t and
 210         rearrange the fields.
 211
 212 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 213
 214         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 215         (AARCH64_OPND_SVE_PRFOP): Likewise.
 216         (aarch64_sve_pattern_array): Declare.
 217         (aarch64_sve_prfop_array): Likewise.
 218
 219 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 220
 221         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 222         (AARCH64_OPND_QLF_P_M): Likewise.
 223
 224 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 225
 226         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 227         aarch64_operand_class.
 228         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 229         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 230         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 231         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 232         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 233         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 234         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 235         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 236
 237 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 238
 239         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 240         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 241
 242 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 243
 244         * opcode/aarch64.h (F_STRICT): New flag.
 245
 246 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 247
 248         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 249
 250 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 251         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 252         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 253         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 254         relocation.
 255
 256 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 257
 258         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 259         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 260
 261 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 262
 263         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 264
 265 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 266
 267         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 268
 269 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 270
 271         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 272         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 273         ARC_NUM_ADDRTYPES.
 274         * opcode/arc.h: Add BMU to insn_class_t enum.
 275         * opcode/arc.h: Add PMU to insn_class_t enum.
 276
 277 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 278
 279         * dis-asm.h: Declare print_arc_disassembler_options.
 280
 281 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 282
 283         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 284         out_implib_bfd fields.
 285
 286 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 287
 288         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 289
 290 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 291
 292         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 293         (SHF_ARM_PURECODE): ... this.
 294
 295 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 296
 297         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 298         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 299         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 300         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 301
 302 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 303
 304         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 305         of enabled FPU features.
 306
 307 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 308
 309         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 310         SPARC_OPCODE_ARCH_MAX into the enum.
 311
 312 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 313
 314         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 315
 316 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 317
 318         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 319
 320 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 321
 322         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 323
 324 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 325
 326         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 327         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 328         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 329         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 330
 331 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 332
 333         * opcode/arc.h: Make insn_class_t alphabetical again.
 334
 335 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 336
 337         * elf/dlx.h: Wrap in extern C.
 338         * elf/xtensa.h: Likewise.
 339         * opcode/arc.h: Likewise.
 340
 341 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 342
 343         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 344         tilegx_pipeline.
 345
 346 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 347
 348         * opcode/arc.h: Add nps400 extension and instruction
 349         subclass.
 350         Remove ARC_OPCODE_NPS400
 351         * elf/arc.h: Remove E_ARC_MACH_NPS400
 352
 353 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 354
 355         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 356         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 357         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 358         SPARC_OPCODE_ARCH_V9M.
 359
 360 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 361
 362         * opcode/msp430-decode.h (MSP430_Size): Remove.
 363         (Msp430_Opcode_Decoded): Change type of size to int.
 364
 365 2016-06-11  Alan Modra  <amodra@gmail.com>
 366
 367         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 368
 369 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 370
 371         * opcode/sparc.h: Add missing documentation for hyperprivileged
 372         registers in rd (%) and rs1 ($).
 373
 374 2016-06-07  Alan Modra  <amodra@gmail.com>
 375
 376         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 377         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 378         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 379         PPC_APUINFO_VLE: Define.
 380
 381 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 382
 383         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 384         entries.
 385         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 386
 387 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 388
 389         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 390         (struct arc_long_opcode): New structure.
 391         (arc_long_opcodes): Declare.
 392         (arc_num_long_opcodes): Declare.
 393
 394 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 395
 396         * elf/mips.h: Add extern "C".
 397         * elf/sh.h: Likewise.
 398         * opcode/d10v.h: Likewise.
 399         * opcode/d30v.h: Likewise.
 400         * opcode/ia64.h: Likewise.
 401         * opcode/mips.h: Likewise.
 402         * opcode/ppc.h: Likewise.
 403         * opcode/sparc.h: Likewise.
 404         * opcode/tic6x.h: Likewise.
 405         * opcode/v850.h: Likewise.
 406
 407 2016-05-28  Alan Modra  <amodra@gmail.com>
 408
 409         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 410         Return void from multiple_definition, multiple_common,
 411         add_to_set, constructor, warning, undefined_symbol,
 412         reloc_overflow, reloc_dangerous and unattached_reloc.
 413
 414 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 415
 416         * opcode/metag.h: wrap declarations in extern "C".
 417
 418 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 419
 420         * opcode/arc.h (insn_subclass_t): Add COND.
 421         (flag_class_t): Add F_CLASS_EXTEND.
 422
 423 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 424
 425         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 426         insn_class.
 427         (struct arc_flag_class): Renamed attribute class to flag_class.
 428
 429 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 430
 431         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 432         plain symbol.
 433
 434 2016-04-29  Tom Tromey  <tom@tromey.com>
 435
 436         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 437         DW_LANG_Rust_old>: New constants.
 438
 439 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 440
 441         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 442         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 443         * opcode/mips.h (ASE_DSPR3): New macro.
 444
 445 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 446             Nick Clifton  <nickc@redhat.com>
 447
 448         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 449         enumerator.
 450         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 451         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 452         (ARM_SYM_BRANCH_TYPE): Replace by ...
 453         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 454         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 455         BFD_ASSERT is defined or not.
 456
 457 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 458
 459         * elf/arm.h (Tag_DSP_extension): Define.
 460
 461 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 462
 463         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 464
 465 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 466
 467         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 468         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 469         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 470         for the high core bits.
 471
 472 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 473
 474         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 475         (ARC_SYNTAX_NOP): Likewsie.
 476         (ARC_OP1_MUST_BE_IMM): Update defined value.
 477         (ARC_OP1_IMM_IMPLIED): Likewise.
 478         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 479
 480 2016-04-28  Nick Clifton  <nickc@redhat.com>
 481
 482         PR target/19722
 483         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 484
 485 2016-04-27  Alan Modra  <amodra@gmail.com>
 486
 487         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 488         undef.  Formatting.
 489
 490 2016-04-21  Nick Clifton  <nickc@redhat.com>
 491
 492         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 493
 494 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 495
 496         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 497
 498 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 499
 500         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 501
 502 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 503
 504         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 505
 506 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 507
 508         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 509
 510 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 511
 512         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 513         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 514
 515 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 516
 517         * opcode/arc.h (flag_class_t): Update.
 518         (ARC_OPCODE_NONE): Define.
 519         (ARC_OPCODE_ARCALL): Likewise.
 520         (ARC_OPCODE_ARCFPX): Likewise.
 521         (ARC_REGISTER_READONLY): Likewise.
 522         (ARC_REGISTER_WRITEONLY): Likewise.
 523         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 524         (arc_aux_reg): Add cpu.
 525
 526 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 527
 528         * opcode/arc.h (arc_num_opcodes): Remove.
 529         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 530         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 531         (ARC_SUFFIX_FLAG): Define.
 532         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 533         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 534         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 535         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 536         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 537         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 538         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 539         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 540         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 541         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 542
 543 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 544
 545         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 546         (ARC_FPUDA): Define.
 547         (arc_aux_reg): Add new field.
 548
 549 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 550
 551         * opcode/arc-func.h (replace_bits24): Changed.
 552         (replace_bits24_be): Created.
 553
 554 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 555
 556         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 557         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 558         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 559         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 560         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 561         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 562         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 563         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 564         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 565         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 566         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 567         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 568         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 569         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 570
 571 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 572
 573         * opcode/i960.h: Add const qualifiers.
 574         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 575
 576 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 577
 578         * opcodes/arc.h (insn_class_t): Add BITOP type.
 579
 580 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 581
 582         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 583         new classes instead.
 584
 585 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 586
 587         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 588         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 589
 590 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 591
 592         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 593
 594 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 595
 596         * elf/arc.h (EF_ARC_MACH): Delete.
 597         (EF_ARC_MACH_MSK): Remove out of date comment.
 598
 599 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 600
 601         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 602
 603 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 604
 605         PR ld/19807
 606         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 607
 608 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 609             Andrew Burgess  <andrew.burgess@embecosm.com>
 610
 611         * elf/arc-reloc.def: Add a call to ME within the formula for each
 612         relocation that requires middle-endian correction.
 613
 614 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 615
 616         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 617         * opcode/h8300.h (struct h8_opcode): Likewise.
 618         * opcode/hppa.h (struct pa_opcode): Likewise.
 619         * opcode/msp430.h: Likewise.
 620         * opcode/spu.h (struct spu_opcode): Likewise.
 621         * opcode/tic30.h (struct _register): Likewise.
 622         * opcode/tic4x.h (struct tic4x_register): Likewise.
 623         (struct tic4x_cond): Likewise.
 624         (struct tic4x_indirect): Likewise.
 625         (struct tic4x_inst): Likewise.
 626         * opcode/visium.h (struct reg_entry): Likewise.
 627
 628 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 629
 630         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 631         (ARM_CPU_HAS_FEATURE): Add comment.
 632
 633 2016-03-03  Than McIntosh <thanm@google.com>
 634
 635         * plugin-api.h: Add new hooks to the plugin transfer vector to
 636         to support querying section alignment and section size.
 637         (ld_plugin_get_input_section_alignment): New hook.
 638         (ld_plugin_get_input_section_size): New hook.
 639         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 640         and LDPT_GET_INPUT_SECTION_SIZE.
 641         (ld_plugin_tv): Add tv_get_input_section_alignment and
 642         tv_get_input_section_size.
 643
 644 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 645
 646         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 647
 648 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 649
 650         PR ld/19645
 651         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 652         (bfd_link_info): Add elf_stt_common.
 653
 654 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 655
 656         PR ld/19636
 657         PR ld/19704
 658         PR ld/19719
 659         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 660
 661 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 662             Jiong Wang  <jiong.wang@arm.com>
 663
 664         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 665
 666 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 667             Janek van Oirschot  <jvanoirs@synopsys.com>
 668
 669         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 670         (arc_num_relax_opcodes): Declare.
 671
 672 2016-02-09  Nick Clifton  <nickc@redhat.com>
 673
 674         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 675         * opcode/nds32.h (nds32_r45map): Likewise.
 676         (nds32_r54map): Likewise.
 677         * opcode/visium.h (gen_reg_table): Likewise.
 678         (fp_reg_table, cc_table, opcode_table): Likewise.
 679
 680 2016-02-09  Alan Modra  <amodra@gmail.com>
 681
 682         PR 16583
 683         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 684
 685 2016-02-04  Nick Clifton  <nickc@redhat.com>
 686
 687         PR target/19561
 688         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 689         (RRUX): Synthesise using case 2 rather than 7.
 690
 691 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 692
 693         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 694         (NT_FREEBSD_PROCSTAT_PROC): Define.
 695         (NT_FREEBSD_PROCSTAT_FILES): Define.
 696         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 697         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 698         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 699         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 700         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 701         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 702         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 703
 704 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 705             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 706
 707         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 708         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 709         (ARC_TLS_LE_32): Fixed formula.
 710         (ARC_TLS_GD_LD): Use new special function.
 711         * opcode/arc-func.h: Changed all the replacement
 712         functions to clear the patching bits before doing an or it with the value
 713         argument.
 714
 715 2016-01-18  Nick Clifton  <nickc@redhat.com>
 716
 717         PR ld/19440
 718         * coff/internal.h (internal_syment): Use int to hold section
 719         number.
 720         (N_UNDEF): Cast to int not short.
 721         (N_ABS): Likewise.
 722         (N_DEBUG): Likewise.
 723         (N_TV): Likewise.
 724         (P_TV): Likewise.
 725
 726 2016-01-11  Nick Clifton  <nickc@redhat.com>
 727
 728         Import this change from GCC mainline:
 729
 730         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 731
 732         * longlong.h: Change !__SHMEDIA__ to
 733         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 734         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 735
 736 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 737
 738         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 739
 740 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 741
 742         * libiberty.h (dupargv): Change arg to char * const *.
 743         (writeargv, countargv): Likewise.
 744
 745 2016-01-01  Alan Modra  <amodra@gmail.com>
 746
 747         Update year range in copyright notice of all files.
 748
 749 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 750 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 751 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 752 som/ChangeLog-1015, and vms/ChangeLog-1015
 753 \f
 754 Copyright (C) 2016 Free Software Foundation, Inc.
 755
 756 Copying and distribution of this file, with or without modification,
 757 are permitted in any medium without royalty provided the copyright
 758 notice and this notice are preserved.
 759
 760 Local Variables:
 761 mode: change-log
 762 left-margin: 8
 763 fill-column: 74
 764 version-control: never
 765 End: