include/ChangeLog

   1 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
   2
   3         * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
   4         (AARCH64_ARCH_V8_3): Define.
   5         (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
   6
   7 2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
   8
   9         * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
  10         (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
  11         (ARM_ARCH_V8M_MAIN_DSP): Likewise.
  12
  13 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  14
  15         * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
  16
  17 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  18
  19         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
  20         fields.
  21         (struct arc_long_opcode): Delete.
  22         (struct arc_operand): Change types for insert and extract
  23         handlers.
  24
  25 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  26
  27         * opcode/arc.h: Make macros 64-bit safe.
  28
  29 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  30
  31         * opcode/arc.h (arc_opcode_len): Declare.
  32         (ARC_SHORT): Delete.
  33
  34 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
  35             Andrew Waterman <andrew@sifive.com>
  36
  37         Add support for RISC-V architecture.
  38         * dis-asm.h: Add prototypes for print_insn_riscv and
  39         print_riscv_disassembler_options.
  40         * elf/riscv.h: New file.
  41         * opcode/riscv-opc.h: New file.
  42         * opcode/riscv.h: New file.
  43
  44 2016-10-17  Nick Clifton  <nickc@redhat.com>
  45
  46         * elf/common.h (DT_SYMTAB_SHNDX): Define.
  47         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
  48         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
  49         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
  50         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
  51         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
  52         (ELFOSABI_OPENVOS): Define.
  53         (GRP_MASKOS, GRP_MASKPROC): Define.
  54
  55 2016-10-14  Pedro Alves  <palves@redhat.com>
  56
  57         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
  58         OVERRIDE): Define as empty.
  59         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
  60         __final.
  61         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
  62         empty.
  63
  64 2016-10-14  Pedro Alves  <palves@redhat.com>
  65
  66         * ansidecl.h (GCC_FINAL): Delete.
  67         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
  68
  69 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
  70
  71         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
  72
  73 2016-09-29  Alan Modra  <amodra@gmail.com>
  74
  75         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
  76
  77 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
  78
  79         * opcode/arc.h (insn_class_t): Add two new classes.
  80
  81 2016-09-26  Alan Modra  <amodra@gmail.com>
  82
  83         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
  84
  85 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  86
  87         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
  88
  89 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  90
  91         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
  92         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
  93         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
  94         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
  95
  96 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
  97
  98         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
  99         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
 100         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
 101         aarch64_insn_classes.
 102
 103 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 104
 105         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
 106         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
 107         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
 108
 109 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 110
 111         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
 112         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
 113         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
 114
 115 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 116
 117         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 118         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 119         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 120         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 121         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 122         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 123         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 124         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 125         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 126         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 127         (aarch64_sve_dupm_mov_immediate_p): Declare.
 128
 129 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 130
 131         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 132         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 133         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 134         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 135         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 136
 137 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 138
 139         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 140         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 141         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 142         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 143         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 144         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 145         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 146         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 147         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 148         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 149         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 150         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 151         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 152         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 153         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 154         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 155         Likewise.
 156
 157 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 158
 159         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 160         aarch64_opnd.
 161         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 162         (aarch64_opnd_info): Make shifter.amount an int64_t and
 163         rearrange the fields.
 164
 165 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 166
 167         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 168         (AARCH64_OPND_SVE_PRFOP): Likewise.
 169         (aarch64_sve_pattern_array): Declare.
 170         (aarch64_sve_prfop_array): Likewise.
 171
 172 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 173
 174         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 175         (AARCH64_OPND_QLF_P_M): Likewise.
 176
 177 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 178
 179         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 180         aarch64_operand_class.
 181         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 182         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 183         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 184         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 185         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 186         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 187         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 188         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 189
 190 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 191
 192         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 193         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 194
 195 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 196
 197         * opcode/aarch64.h (F_STRICT): New flag.
 198
 199 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 200
 201         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 202
 203 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 204         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 205         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 206         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 207         relocation.
 208
 209 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 210
 211         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 212         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 213
 214 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 215
 216         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 217
 218 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 219
 220         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 221
 222 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 223
 224         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 225         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 226         ARC_NUM_ADDRTYPES.
 227         * opcode/arc.h: Add BMU to insn_class_t enum.
 228         * opcode/arc.h: Add PMU to insn_class_t enum.
 229
 230 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 231
 232         * dis-asm.h: Declare print_arc_disassembler_options.
 233
 234 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 235
 236         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 237         out_implib_bfd fields.
 238
 239 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 240
 241         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 242
 243 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 244
 245         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 246         (SHF_ARM_PURECODE): ... this.
 247
 248 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 249
 250         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 251         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 252         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 253         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 254
 255 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 256
 257         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 258         of enabled FPU features.
 259
 260 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 261
 262         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 263         SPARC_OPCODE_ARCH_MAX into the enum.
 264
 265 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 266
 267         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 268
 269 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 270
 271         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 272
 273 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 274
 275         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 276
 277 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 278
 279         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 280         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 281         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 282         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 283
 284 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 285
 286         * opcode/arc.h: Make insn_class_t alphabetical again.
 287
 288 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 289
 290         * elf/dlx.h: Wrap in extern C.
 291         * elf/xtensa.h: Likewise.
 292         * opcode/arc.h: Likewise.
 293
 294 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 295
 296         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 297         tilegx_pipeline.
 298
 299 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 300
 301         * opcode/arc.h: Add nps400 extension and instruction
 302         subclass.
 303         Remove ARC_OPCODE_NPS400
 304         * elf/arc.h: Remove E_ARC_MACH_NPS400
 305
 306 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 307
 308         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 309         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 310         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 311         SPARC_OPCODE_ARCH_V9M.
 312
 313 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 314
 315         * opcode/msp430-decode.h (MSP430_Size): Remove.
 316         (Msp430_Opcode_Decoded): Change type of size to int.
 317
 318 2016-06-11  Alan Modra  <amodra@gmail.com>
 319
 320         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 321
 322 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 323
 324         * opcode/sparc.h: Add missing documentation for hyperprivileged
 325         registers in rd (%) and rs1 ($).
 326
 327 2016-06-07  Alan Modra  <amodra@gmail.com>
 328
 329         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 330         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 331         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 332         PPC_APUINFO_VLE: Define.
 333
 334 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 335
 336         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 337         entries.
 338         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 339
 340 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 341
 342         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 343         (struct arc_long_opcode): New structure.
 344         (arc_long_opcodes): Declare.
 345         (arc_num_long_opcodes): Declare.
 346
 347 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 348
 349         * elf/mips.h: Add extern "C".
 350         * elf/sh.h: Likewise.
 351         * opcode/d10v.h: Likewise.
 352         * opcode/d30v.h: Likewise.
 353         * opcode/ia64.h: Likewise.
 354         * opcode/mips.h: Likewise.
 355         * opcode/ppc.h: Likewise.
 356         * opcode/sparc.h: Likewise.
 357         * opcode/tic6x.h: Likewise.
 358         * opcode/v850.h: Likewise.
 359
 360 2016-05-28  Alan Modra  <amodra@gmail.com>
 361
 362         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 363         Return void from multiple_definition, multiple_common,
 364         add_to_set, constructor, warning, undefined_symbol,
 365         reloc_overflow, reloc_dangerous and unattached_reloc.
 366
 367 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 368
 369         * opcode/metag.h: wrap declarations in extern "C".
 370
 371 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 372
 373         * opcode/arc.h (insn_subclass_t): Add COND.
 374         (flag_class_t): Add F_CLASS_EXTEND.
 375
 376 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 377
 378         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 379         insn_class.
 380         (struct arc_flag_class): Renamed attribute class to flag_class.
 381
 382 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 383
 384         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 385         plain symbol.
 386
 387 2016-04-29  Tom Tromey  <tom@tromey.com>
 388
 389         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 390         DW_LANG_Rust_old>: New constants.
 391
 392 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 393
 394         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 395         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 396         * opcode/mips.h (ASE_DSPR3): New macro.
 397
 398 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 399             Nick Clifton  <nickc@redhat.com>
 400
 401         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 402         enumerator.
 403         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 404         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 405         (ARM_SYM_BRANCH_TYPE): Replace by ...
 406         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 407         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 408         BFD_ASSERT is defined or not.
 409
 410 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 411
 412         * elf/arm.h (Tag_DSP_extension): Define.
 413
 414 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 415
 416         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 417
 418 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 419
 420         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 421         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 422         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 423         for the high core bits.
 424
 425 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 426
 427         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 428         (ARC_SYNTAX_NOP): Likewsie.
 429         (ARC_OP1_MUST_BE_IMM): Update defined value.
 430         (ARC_OP1_IMM_IMPLIED): Likewise.
 431         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 432
 433 2016-04-28  Nick Clifton  <nickc@redhat.com>
 434
 435         PR target/19722
 436         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 437
 438 2016-04-27  Alan Modra  <amodra@gmail.com>
 439
 440         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 441         undef.  Formatting.
 442
 443 2016-04-21  Nick Clifton  <nickc@redhat.com>
 444
 445         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 446
 447 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 448
 449         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 450
 451 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 452
 453         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 454
 455 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 456
 457         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 458
 459 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 460
 461         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 462
 463 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 464
 465         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 466         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 467
 468 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 469
 470         * opcode/arc.h (flag_class_t): Update.
 471         (ARC_OPCODE_NONE): Define.
 472         (ARC_OPCODE_ARCALL): Likewise.
 473         (ARC_OPCODE_ARCFPX): Likewise.
 474         (ARC_REGISTER_READONLY): Likewise.
 475         (ARC_REGISTER_WRITEONLY): Likewise.
 476         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 477         (arc_aux_reg): Add cpu.
 478
 479 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 480
 481         * opcode/arc.h (arc_num_opcodes): Remove.
 482         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 483         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 484         (ARC_SUFFIX_FLAG): Define.
 485         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 486         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 487         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 488         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 489         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 490         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 491         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 492         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 493         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 494         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 495
 496 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 497
 498         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 499         (ARC_FPUDA): Define.
 500         (arc_aux_reg): Add new field.
 501
 502 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 503
 504         * opcode/arc-func.h (replace_bits24): Changed.
 505         (replace_bits24_be): Created.
 506
 507 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 508
 509         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 510         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 511         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 512         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 513         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 514         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 515         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 516         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 517         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 518         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 519         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 520         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 521         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 522         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 523
 524 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 525
 526         * opcode/i960.h: Add const qualifiers.
 527         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 528
 529 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 530
 531         * opcodes/arc.h (insn_class_t): Add BITOP type.
 532
 533 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 534
 535         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 536         new classes instead.
 537
 538 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 539
 540         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 541         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 542
 543 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 544
 545         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 546
 547 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 548
 549         * elf/arc.h (EF_ARC_MACH): Delete.
 550         (EF_ARC_MACH_MSK): Remove out of date comment.
 551
 552 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 553
 554         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 555
 556 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 557
 558         PR ld/19807
 559         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 560
 561 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 562             Andrew Burgess  <andrew.burgess@embecosm.com>
 563
 564         * elf/arc-reloc.def: Add a call to ME within the formula for each
 565         relocation that requires middle-endian correction.
 566
 567 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 568
 569         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 570         * opcode/h8300.h (struct h8_opcode): Likewise.
 571         * opcode/hppa.h (struct pa_opcode): Likewise.
 572         * opcode/msp430.h: Likewise.
 573         * opcode/spu.h (struct spu_opcode): Likewise.
 574         * opcode/tic30.h (struct _register): Likewise.
 575         * opcode/tic4x.h (struct tic4x_register): Likewise.
 576         (struct tic4x_cond): Likewise.
 577         (struct tic4x_indirect): Likewise.
 578         (struct tic4x_inst): Likewise.
 579         * opcode/visium.h (struct reg_entry): Likewise.
 580
 581 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 582
 583         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 584         (ARM_CPU_HAS_FEATURE): Add comment.
 585
 586 2016-03-03  Than McIntosh <thanm@google.com>
 587
 588         * plugin-api.h: Add new hooks to the plugin transfer vector to
 589         to support querying section alignment and section size.
 590         (ld_plugin_get_input_section_alignment): New hook.
 591         (ld_plugin_get_input_section_size): New hook.
 592         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 593         and LDPT_GET_INPUT_SECTION_SIZE.
 594         (ld_plugin_tv): Add tv_get_input_section_alignment and
 595         tv_get_input_section_size.
 596
 597 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 598
 599         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 600
 601 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 602
 603         PR ld/19645
 604         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 605         (bfd_link_info): Add elf_stt_common.
 606
 607 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 608
 609         PR ld/19636
 610         PR ld/19704
 611         PR ld/19719
 612         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 613
 614 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 615             Jiong Wang  <jiong.wang@arm.com>
 616
 617         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 618
 619 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 620             Janek van Oirschot  <jvanoirs@synopsys.com>
 621
 622         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 623         (arc_num_relax_opcodes): Declare.
 624
 625 2016-02-09  Nick Clifton  <nickc@redhat.com>
 626
 627         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 628         * opcode/nds32.h (nds32_r45map): Likewise.
 629         (nds32_r54map): Likewise.
 630         * opcode/visium.h (gen_reg_table): Likewise.
 631         (fp_reg_table, cc_table, opcode_table): Likewise.
 632
 633 2016-02-09  Alan Modra  <amodra@gmail.com>
 634
 635         PR 16583
 636         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 637
 638 2016-02-04  Nick Clifton  <nickc@redhat.com>
 639
 640         PR target/19561
 641         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 642         (RRUX): Synthesise using case 2 rather than 7.
 643
 644 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 645
 646         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 647         (NT_FREEBSD_PROCSTAT_PROC): Define.
 648         (NT_FREEBSD_PROCSTAT_FILES): Define.
 649         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 650         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 651         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 652         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 653         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 654         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 655         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 656
 657 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 658             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 659
 660         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 661         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 662         (ARC_TLS_LE_32): Fixed formula.
 663         (ARC_TLS_GD_LD): Use new special function.
 664         * opcode/arc-func.h: Changed all the replacement
 665         functions to clear the patching bits before doing an or it with the value
 666         argument.
 667
 668 2016-01-18  Nick Clifton  <nickc@redhat.com>
 669
 670         PR ld/19440
 671         * coff/internal.h (internal_syment): Use int to hold section
 672         number.
 673         (N_UNDEF): Cast to int not short.
 674         (N_ABS): Likewise.
 675         (N_DEBUG): Likewise.
 676         (N_TV): Likewise.
 677         (P_TV): Likewise.
 678
 679 2016-01-11  Nick Clifton  <nickc@redhat.com>
 680
 681         Import this change from GCC mainline:
 682
 683         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 684
 685         * longlong.h: Change !__SHMEDIA__ to
 686         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 687         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 688
 689 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 690
 691         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 692
 693 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 694
 695         * libiberty.h (dupargv): Change arg to char * const *.
 696         (writeargv, countargv): Likewise.
 697
 698 2016-01-01  Alan Modra  <amodra@gmail.com>
 699
 700         Update year range in copyright notice of all files.
 701
 702 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 703 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 704 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 705 som/ChangeLog-1015, and vms/ChangeLog-1015
 706 \f
 707 Copyright (C) 2016 Free Software Foundation, Inc.
 708
 709 Copying and distribution of this file, with or without modification,
 710 are permitted in any medium without royalty provided the copyright
 711 notice and this notice are preserved.
 712
 713 Local Variables:
 714 mode: change-log
 715 left-margin: 8
 716 fill-column: 74
 717 version-control: never
 718 End: