include/ChangeLog

   1 2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
   2
   3         * opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New.
   4         (ARM_ARCH_V8_3A): New.
   5
   6 2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
   7
   8         * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
   9         instruction classes.
  10
  11 2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
  12
  13         * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
  14         hwcaps2.
  15
  16 2016-11-22  Alan Modra  <amodra@gmail.com>
  17
  18         PR 20744
  19         * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
  20
  21 2016-11-03  David Tolnay <dtolnay@gmail.com>
  22             Mark Wielaard  <mark@klomp.org>
  23
  24         * demangle.h (DMGL_RUST): New macro.
  25         (DMGL_STYLE_MASK): Add DMGL_RUST.
  26         (demangling_styles): Add dlang_rust.
  27         (RUST_DEMANGLING_STYLE_STRING): New macro.
  28         (RUST_DEMANGLING): New macro.
  29         (rust_demangle): New prototype.
  30         (rust_is_mangled): Likewise.
  31         (rust_demangle_sym): Likewise.
  32
  33 2016-11-07  Jason Merrill  <jason@redhat.com>
  34
  35         * demangle.h (enum demangle_component_type): Add
  36         DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
  37
  38 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  39
  40         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
  41         AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
  42         (enum aarch64_op): Add OP_FCMLA_ELEM.
  43
  44 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  45
  46         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
  47         (enum aarch64_insn_class): Add ldst_imm10.
  48
  49 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  50
  51         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
  52
  53 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  54
  55         * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
  56         (AARCH64_ARCH_V8_3): Define.
  57         (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
  58
  59 2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  60
  61         * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
  62         (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
  63         (ARM_ARCH_V8M_MAIN_DSP): Likewise.
  64
  65 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  66
  67         * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
  68
  69 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  70
  71         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
  72         fields.
  73         (struct arc_long_opcode): Delete.
  74         (struct arc_operand): Change types for insert and extract
  75         handlers.
  76
  77 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
  78
  79         * opcode/arc.h: Make macros 64-bit safe.
  80
  81 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
  82
  83         * opcode/arc.h (arc_opcode_len): Declare.
  84         (ARC_SHORT): Delete.
  85
  86 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
  87             Andrew Waterman <andrew@sifive.com>
  88
  89         Add support for RISC-V architecture.
  90         * dis-asm.h: Add prototypes for print_insn_riscv and
  91         print_riscv_disassembler_options.
  92         * elf/riscv.h: New file.
  93         * opcode/riscv-opc.h: New file.
  94         * opcode/riscv.h: New file.
  95
  96 2016-10-17  Nick Clifton  <nickc@redhat.com>
  97
  98         * elf/common.h (DT_SYMTAB_SHNDX): Define.
  99         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
 100         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
 101         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
 102         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
 103         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
 104         (ELFOSABI_OPENVOS): Define.
 105         (GRP_MASKOS, GRP_MASKPROC): Define.
 106
 107 2016-10-14  Pedro Alves  <palves@redhat.com>
 108
 109         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
 110         OVERRIDE): Define as empty.
 111         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
 112         __final.
 113         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
 114         empty.
 115
 116 2016-10-14  Pedro Alves  <palves@redhat.com>
 117
 118         * ansidecl.h (GCC_FINAL): Delete.
 119         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
 120
 121 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
 122
 123         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
 124
 125 2016-09-29  Alan Modra  <amodra@gmail.com>
 126
 127         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
 128
 129 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
 130
 131         * opcode/arc.h (insn_class_t): Add two new classes.
 132
 133 2016-09-26  Alan Modra  <amodra@gmail.com>
 134
 135         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
 136
 137 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 138
 139         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
 140
 141 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 142
 143         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
 144         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
 145         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
 146         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
 147
 148 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 149
 150         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
 151         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
 152         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
 153         aarch64_insn_classes.
 154
 155 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 156
 157         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
 158         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
 159         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
 160
 161 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 162
 163         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
 164         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
 165         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
 166
 167 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 168
 169         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 170         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 171         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 172         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 173         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 174         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 175         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 176         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 177         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 178         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 179         (aarch64_sve_dupm_mov_immediate_p): Declare.
 180
 181 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 182
 183         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 184         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 185         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 186         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 187         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 188
 189 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 190
 191         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 192         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 193         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 194         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 195         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 196         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 197         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 198         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 199         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 200         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 201         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 202         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 203         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 204         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 205         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 206         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 207         Likewise.
 208
 209 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 210
 211         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 212         aarch64_opnd.
 213         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 214         (aarch64_opnd_info): Make shifter.amount an int64_t and
 215         rearrange the fields.
 216
 217 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 218
 219         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 220         (AARCH64_OPND_SVE_PRFOP): Likewise.
 221         (aarch64_sve_pattern_array): Declare.
 222         (aarch64_sve_prfop_array): Likewise.
 223
 224 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 225
 226         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 227         (AARCH64_OPND_QLF_P_M): Likewise.
 228
 229 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 230
 231         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 232         aarch64_operand_class.
 233         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 234         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 235         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 236         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 237         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 238         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 239         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 240         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 241
 242 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 243
 244         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 245         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 246
 247 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 248
 249         * opcode/aarch64.h (F_STRICT): New flag.
 250
 251 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 252
 253         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 254
 255 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 256         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 257         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 258         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 259         relocation.
 260
 261 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 262
 263         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 264         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 265
 266 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 267
 268         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 269
 270 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 271
 272         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 273
 274 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 275
 276         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 277         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 278         ARC_NUM_ADDRTYPES.
 279         * opcode/arc.h: Add BMU to insn_class_t enum.
 280         * opcode/arc.h: Add PMU to insn_class_t enum.
 281
 282 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 283
 284         * dis-asm.h: Declare print_arc_disassembler_options.
 285
 286 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 287
 288         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 289         out_implib_bfd fields.
 290
 291 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 292
 293         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 294
 295 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 296
 297         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 298         (SHF_ARM_PURECODE): ... this.
 299
 300 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 301
 302         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 303         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 304         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 305         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 306
 307 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 308
 309         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 310         of enabled FPU features.
 311
 312 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 313
 314         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 315         SPARC_OPCODE_ARCH_MAX into the enum.
 316
 317 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 318
 319         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 320
 321 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 322
 323         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 324
 325 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 326
 327         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 328
 329 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 330
 331         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 332         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 333         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 334         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 335
 336 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 337
 338         * opcode/arc.h: Make insn_class_t alphabetical again.
 339
 340 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 341
 342         * elf/dlx.h: Wrap in extern C.
 343         * elf/xtensa.h: Likewise.
 344         * opcode/arc.h: Likewise.
 345
 346 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 347
 348         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 349         tilegx_pipeline.
 350
 351 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 352
 353         * opcode/arc.h: Add nps400 extension and instruction
 354         subclass.
 355         Remove ARC_OPCODE_NPS400
 356         * elf/arc.h: Remove E_ARC_MACH_NPS400
 357
 358 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 359
 360         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 361         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 362         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 363         SPARC_OPCODE_ARCH_V9M.
 364
 365 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 366
 367         * opcode/msp430-decode.h (MSP430_Size): Remove.
 368         (Msp430_Opcode_Decoded): Change type of size to int.
 369
 370 2016-06-11  Alan Modra  <amodra@gmail.com>
 371
 372         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 373
 374 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 375
 376         * opcode/sparc.h: Add missing documentation for hyperprivileged
 377         registers in rd (%) and rs1 ($).
 378
 379 2016-06-07  Alan Modra  <amodra@gmail.com>
 380
 381         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 382         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 383         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 384         PPC_APUINFO_VLE: Define.
 385
 386 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 387
 388         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 389         entries.
 390         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 391
 392 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 393
 394         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 395         (struct arc_long_opcode): New structure.
 396         (arc_long_opcodes): Declare.
 397         (arc_num_long_opcodes): Declare.
 398
 399 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 400
 401         * elf/mips.h: Add extern "C".
 402         * elf/sh.h: Likewise.
 403         * opcode/d10v.h: Likewise.
 404         * opcode/d30v.h: Likewise.
 405         * opcode/ia64.h: Likewise.
 406         * opcode/mips.h: Likewise.
 407         * opcode/ppc.h: Likewise.
 408         * opcode/sparc.h: Likewise.
 409         * opcode/tic6x.h: Likewise.
 410         * opcode/v850.h: Likewise.
 411
 412 2016-05-28  Alan Modra  <amodra@gmail.com>
 413
 414         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 415         Return void from multiple_definition, multiple_common,
 416         add_to_set, constructor, warning, undefined_symbol,
 417         reloc_overflow, reloc_dangerous and unattached_reloc.
 418
 419 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 420
 421         * opcode/metag.h: wrap declarations in extern "C".
 422
 423 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 424
 425         * opcode/arc.h (insn_subclass_t): Add COND.
 426         (flag_class_t): Add F_CLASS_EXTEND.
 427
 428 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 429
 430         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 431         insn_class.
 432         (struct arc_flag_class): Renamed attribute class to flag_class.
 433
 434 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 435
 436         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 437         plain symbol.
 438
 439 2016-04-29  Tom Tromey  <tom@tromey.com>
 440
 441         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 442         DW_LANG_Rust_old>: New constants.
 443
 444 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 445
 446         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 447         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 448         * opcode/mips.h (ASE_DSPR3): New macro.
 449
 450 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 451             Nick Clifton  <nickc@redhat.com>
 452
 453         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 454         enumerator.
 455         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 456         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 457         (ARM_SYM_BRANCH_TYPE): Replace by ...
 458         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 459         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 460         BFD_ASSERT is defined or not.
 461
 462 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 463
 464         * elf/arm.h (Tag_DSP_extension): Define.
 465
 466 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 467
 468         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 469
 470 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 471
 472         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 473         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 474         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 475         for the high core bits.
 476
 477 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 478
 479         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 480         (ARC_SYNTAX_NOP): Likewsie.
 481         (ARC_OP1_MUST_BE_IMM): Update defined value.
 482         (ARC_OP1_IMM_IMPLIED): Likewise.
 483         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 484
 485 2016-04-28  Nick Clifton  <nickc@redhat.com>
 486
 487         PR target/19722
 488         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 489
 490 2016-04-27  Alan Modra  <amodra@gmail.com>
 491
 492         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 493         undef.  Formatting.
 494
 495 2016-04-21  Nick Clifton  <nickc@redhat.com>
 496
 497         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 498
 499 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 500
 501         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 502
 503 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 504
 505         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 506
 507 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 508
 509         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 510
 511 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 512
 513         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 514
 515 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 516
 517         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 518         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 519
 520 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 521
 522         * opcode/arc.h (flag_class_t): Update.
 523         (ARC_OPCODE_NONE): Define.
 524         (ARC_OPCODE_ARCALL): Likewise.
 525         (ARC_OPCODE_ARCFPX): Likewise.
 526         (ARC_REGISTER_READONLY): Likewise.
 527         (ARC_REGISTER_WRITEONLY): Likewise.
 528         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 529         (arc_aux_reg): Add cpu.
 530
 531 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 532
 533         * opcode/arc.h (arc_num_opcodes): Remove.
 534         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 535         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 536         (ARC_SUFFIX_FLAG): Define.
 537         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 538         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 539         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 540         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 541         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 542         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 543         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 544         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 545         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 546         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 547
 548 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 549
 550         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 551         (ARC_FPUDA): Define.
 552         (arc_aux_reg): Add new field.
 553
 554 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 555
 556         * opcode/arc-func.h (replace_bits24): Changed.
 557         (replace_bits24_be): Created.
 558
 559 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 560
 561         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 562         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 563         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 564         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 565         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 566         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 567         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 568         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 569         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 570         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 571         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 572         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 573         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 574         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 575
 576 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 577
 578         * opcode/i960.h: Add const qualifiers.
 579         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 580
 581 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 582
 583         * opcodes/arc.h (insn_class_t): Add BITOP type.
 584
 585 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 586
 587         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 588         new classes instead.
 589
 590 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 591
 592         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 593         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 594
 595 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 596
 597         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 598
 599 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 600
 601         * elf/arc.h (EF_ARC_MACH): Delete.
 602         (EF_ARC_MACH_MSK): Remove out of date comment.
 603
 604 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 605
 606         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 607
 608 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 609
 610         PR ld/19807
 611         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 612
 613 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 614             Andrew Burgess  <andrew.burgess@embecosm.com>
 615
 616         * elf/arc-reloc.def: Add a call to ME within the formula for each
 617         relocation that requires middle-endian correction.
 618
 619 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 620
 621         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 622         * opcode/h8300.h (struct h8_opcode): Likewise.
 623         * opcode/hppa.h (struct pa_opcode): Likewise.
 624         * opcode/msp430.h: Likewise.
 625         * opcode/spu.h (struct spu_opcode): Likewise.
 626         * opcode/tic30.h (struct _register): Likewise.
 627         * opcode/tic4x.h (struct tic4x_register): Likewise.
 628         (struct tic4x_cond): Likewise.
 629         (struct tic4x_indirect): Likewise.
 630         (struct tic4x_inst): Likewise.
 631         * opcode/visium.h (struct reg_entry): Likewise.
 632
 633 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 634
 635         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 636         (ARM_CPU_HAS_FEATURE): Add comment.
 637
 638 2016-03-03  Than McIntosh <thanm@google.com>
 639
 640         * plugin-api.h: Add new hooks to the plugin transfer vector to
 641         to support querying section alignment and section size.
 642         (ld_plugin_get_input_section_alignment): New hook.
 643         (ld_plugin_get_input_section_size): New hook.
 644         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 645         and LDPT_GET_INPUT_SECTION_SIZE.
 646         (ld_plugin_tv): Add tv_get_input_section_alignment and
 647         tv_get_input_section_size.
 648
 649 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 650
 651         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 652
 653 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 654
 655         PR ld/19645
 656         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 657         (bfd_link_info): Add elf_stt_common.
 658
 659 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 660
 661         PR ld/19636
 662         PR ld/19704
 663         PR ld/19719
 664         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 665
 666 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 667             Jiong Wang  <jiong.wang@arm.com>
 668
 669         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 670
 671 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 672             Janek van Oirschot  <jvanoirs@synopsys.com>
 673
 674         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 675         (arc_num_relax_opcodes): Declare.
 676
 677 2016-02-09  Nick Clifton  <nickc@redhat.com>
 678
 679         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 680         * opcode/nds32.h (nds32_r45map): Likewise.
 681         (nds32_r54map): Likewise.
 682         * opcode/visium.h (gen_reg_table): Likewise.
 683         (fp_reg_table, cc_table, opcode_table): Likewise.
 684
 685 2016-02-09  Alan Modra  <amodra@gmail.com>
 686
 687         PR 16583
 688         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 689
 690 2016-02-04  Nick Clifton  <nickc@redhat.com>
 691
 692         PR target/19561
 693         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 694         (RRUX): Synthesise using case 2 rather than 7.
 695
 696 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 697
 698         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 699         (NT_FREEBSD_PROCSTAT_PROC): Define.
 700         (NT_FREEBSD_PROCSTAT_FILES): Define.
 701         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 702         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 703         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 704         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 705         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 706         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 707         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 708
 709 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 710             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 711
 712         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 713         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 714         (ARC_TLS_LE_32): Fixed formula.
 715         (ARC_TLS_GD_LD): Use new special function.
 716         * opcode/arc-func.h: Changed all the replacement
 717         functions to clear the patching bits before doing an or it with the value
 718         argument.
 719
 720 2016-01-18  Nick Clifton  <nickc@redhat.com>
 721
 722         PR ld/19440
 723         * coff/internal.h (internal_syment): Use int to hold section
 724         number.
 725         (N_UNDEF): Cast to int not short.
 726         (N_ABS): Likewise.
 727         (N_DEBUG): Likewise.
 728         (N_TV): Likewise.
 729         (P_TV): Likewise.
 730
 731 2016-01-11  Nick Clifton  <nickc@redhat.com>
 732
 733         Import this change from GCC mainline:
 734
 735         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 736
 737         * longlong.h: Change !__SHMEDIA__ to
 738         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 739         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 740
 741 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 742
 743         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 744
 745 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 746
 747         * libiberty.h (dupargv): Change arg to char * const *.
 748         (writeargv, countargv): Likewise.
 749
 750 2016-01-01  Alan Modra  <amodra@gmail.com>
 751
 752         Update year range in copyright notice of all files.
 753
 754 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 755 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 756 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 757 som/ChangeLog-1015, and vms/ChangeLog-1015
 758 \f
 759 Copyright (C) 2016 Free Software Foundation, Inc.
 760
 761 Copying and distribution of this file, with or without modification,
 762 are permitted in any medium without royalty provided the copyright
 763 notice and this notice are preserved.
 764
 765 Local Variables:
 766 mode: change-log
 767 left-margin: 8
 768 fill-column: 74
 769 version-control: never
 770 End: