include/ChangeLog

   1 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
   2
   3         * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
   4         (AARCH64_FEATURE_ID_PFR2): New.
   5         (AARCH64_ARCH_V8_5): Add both by default.
   6
   7 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
   8
   9         * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
  10         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
  11         (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
  12         (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
  13         define HINT #imm values.
  14         (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
  15
  16 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
  17
  18         * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
  19
  20 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
  21
  22         * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
  23
  24 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
  25
  26         * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
  27         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
  28         (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
  29         (aarch64_sys_regs_sr): Declare new table.
  30
  31 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
  32
  33         * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
  34         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
  35
  36 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
  37
  38         * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
  39         (AARCH64_FEATURE_FRINTTS): New.
  40         (AARCH64_ARCH_V8_5): Add both by default.
  41
  42 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
  43
  44         * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
  45         (AARCH64_ARCH_V8_5): New.
  46
  47 2018-10-08  Alan Modra  <amodra@gmail.com>
  48
  49         * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
  50
  51 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
  52
  53         * opcode/arm.h (ARM_EXT2_PREDRES): New.
  54         (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
  55
  56 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
  57
  58         * opcode/arm.h (ARM_EXT2_SB): New.
  59         (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
  60
  61 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
  62
  63         * opcode/arm.h (ARM_EXT2_V8_5A): New.
  64         (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
  65
  66 2018-10-05  Richard Henderson  <rth@twiddle.net>
  67
  68         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
  69         R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
  70         R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
  71         R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
  72         R_OR1K_SLO13, R_OR1K_PLTA26.
  73
  74 2018-10-05  Richard Henderson  <rth@twiddle.net>
  75
  76         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
  77         R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
  78         R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
  79
  80 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
  81
  82         * opcode/aarch64.h (aarch64_inst): Remove.
  83         (enum err_type): Add ERR_VFI.
  84         (aarch64_is_destructive_by_operands): New.
  85         (init_insn_sequence): New.
  86         (aarch64_decode_insn): Remove param name.
  87
  88 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
  89
  90         * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
  91         more arguments.
  92
  93 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
  94
  95         * opcode/aarch64.h (enum err_type): New.
  96         (aarch64_decode_insn): Use it.
  97
  98 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
  99
 100         * opcode/aarch64.h (struct aarch64_instr_sequence): New.
 101         (aarch64_opcode_encode): Use it.
 102
 103 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 104
 105         * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
 106         extend flags field size.
 107         (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
 108
 109 2018-10-03  John Darrington <john@darrington.wattle.id.au>
 110
 111         * dis-asm.h (print_insn_s12z): New declaration.
 112
 113 2018-10-02  Palmer Dabbelt  <palmer@sifive.com>
 114
 115         * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
 116         (MASK_FENCE_TSO): Likewise.
 117
 118 2018-10-01  Cupertino Miranda <cmiranda@synopsys.com>
 119
 120         * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
 121
 122 2018-09-21  H.J. Lu  <hongjiu.lu@intel.com>
 123
 124         PR binutils/23694
 125         * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
 126         include zero size sections at start of PT_NOTE segment.
 127
 128 2018-09-20  Nelson Chu <nelson.chu1990@gmail.com>
 129
 130         * elf/nds32.h: Remove the unused target features.
 131         * dis-asm.h (disassemble_init_nds32): Declared.
 132         * elf/nds32.h (E_NDS32_NULL): Removed.
 133         (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
 134         * opcode/nds32.h: Ident.
 135         (N32_SUB6, INSN_LW): New macros.
 136         (enum n32_opcodes): Updated.
 137         * elf/nds32.h: Doc fixes.
 138         * elf/nds32.h: Add R_NDS32_LSI.
 139         * elf/nds32.h: Add new relocations for TLS.
 140
 141 2018-09-20  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 142
 143         * elf/common.h (AT_SUN_HWCAP): Rename to ...
 144         (AT_SUN_CAP_HW1): ... this.  Retain old name for backward
 145         compatibility.
 146         (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
 147         (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
 148
 149 2018-09-05  Simon Marchi  <simon.marchi@ericsson.com>
 150
 151         * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
 152
 153 2018-08-31  Alan Modra  <amodra@gmail.com>
 154
 155         * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
 156         (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
 157         (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
 158         (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
 159
 160 2018-08-30  Kito Cheng  <kito@andestech.com>
 161
 162         * opcode/riscv.h (MAX_SUBSET_NUM): New.
 163         (riscv_opcode): Add xlen_requirement field and change type of
 164         subset.
 165
 166 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 167
 168         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
 169         * opcode/mips.h (CPU_XXX): New CPU_GS264E.
 170
 171 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 172
 173         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
 174         * opcode/mips.h (CPU_XXX): New CPU_GS464E.
 175
 176 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 177
 178         * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
 179         E_MIPS_MACH_GS464.
 180         (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
 181         * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
 182         (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
 183         * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
 184
 185 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 186
 187         * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
 188         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
 189         * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
 190
 191 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 192
 193          * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
 194          (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
 195          * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
 196
 197 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 198
 199         * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
 200         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
 201         * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
 202
 203 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 204
 205         * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
 206         (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
 207         (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
 208         (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
 209         (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
 210         (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
 211         (GNU_PROPERTY_X86_UINT32_AND_LO): New.
 212         (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
 213         (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
 214         (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
 215         (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
 216         (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
 217         (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
 218         (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
 219         (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
 220         (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
 221         (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
 222         (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
 223         (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
 224         (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
 225         (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
 226         (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
 227         (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
 228         (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
 229         (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
 230         (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
 231         (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
 232         (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
 233         (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
 234         (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
 235         (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
 236         (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
 237         (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
 238         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
 239         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
 240         (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
 241         (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
 242         (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
 243         (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
 244         (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
 245         (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
 246         (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
 247         (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
 248         (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
 249         (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
 250         (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
 251         (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
 252         (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
 253         (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
 254         (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
 255         (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New.  Defined to
 256         (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
 257         (GNU_PROPERTY_X86_ISA_1_USED): Defined to
 258         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
 259         (GNU_PROPERTY_X86_FEATURE_2_USED): New.  Defined to
 260         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
 261
 262 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 263
 264         * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
 265
 266 2018-08-21  John Darrington  <john@darrington.wattle.id.au>
 267
 268         * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
 269
 270 2018-08-21  Alan Modra  <amodra@gmail.com>
 271
 272         * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
 273         Mention use of "extract" function to provide default value.
 274         (PPC_OPERAND_OPTIONAL_VALUE): Delete.
 275         (ppc_optional_operand_value): Rewrite to use extract function.
 276
 277 2018-08-18  John Darrington  <john@darrington.wattle.id.au>
 278
 279         * opcode/s12z.h: New file.
 280
 281 2018-08-09  Richard Earnshaw  <rearnsha@arm.com>
 282
 283         * elf/arm.h: Updated comments for e_flags definitions.
 284
 285 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 286
 287         * elf/arc.h (Tag_ARC_ATR_version): New tag.
 288
 289 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 290
 291         * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
 292
 293 2018-08-01  Richard Earnshaw  <rearnsha@arm.com>
 294
 295         Copy over from GCC
 296         2018-07-26  Martin Liska  <mliska@suse.cz>
 297
 298         PR lto/86548
 299         * libiberty.h (make_temp_file_with_prefix): New function.
 300
 301 2018-07-30  Jim Wilson  <jimw@sifive.com>
 302
 303         * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
 304         (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
 305         (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
 306
 307 2018-07-30  Andrew Jenner  <andrew@codesourcery.com>
 308
 309         * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
 310         * elf/csky.h: New file.
 311
 312 2018-07-27  Chenghua Xu  <paul.hua.gm@gmail.com>
 313             Maciej W. Rozycki  <macro@linux-mips.org>
 314
 315         * elf/mips.h (AFL_ASE_MASK): Correct typo.
 316
 317 2018-07-26  Alex Chadwick  <Alex.Chadwick@cl.cam.ac.uk>
 318
 319         * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
 320
 321 2018-07-26  Alan Modra  <amodra@gmail.com>
 322
 323         * elf/ppc64.h: Specify byte offset to local entry for values
 324         of two to six in STO_PPC64_LOCAL_MASK.  Clarify r2 return
 325         value for such functions when entering via global entry point.
 326         Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
 327
 328 2018-07-24  Alan Modra  <amodra@gmail.com>
 329
 330         PR 23430
 331         * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
 332
 333 2018-07-20  Chenghua Xu  <paul.hua.gm@gmail.com>
 334             Maciej W. Rozycki  <macro@mips.com>
 335
 336         * elf/mips.h (AFL_ASE_MMI): New macro.
 337         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
 338         * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
 339
 340 2018-07-17  Maciej W. Rozycki  <macro@mips.com>
 341
 342         * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
 343
 344 2018-07-06  Alan Modra  <amodra@gmail.com>
 345
 346         * diagnostics.h: Comment on macro usage.
 347
 348 2018-07-05  Simon Marchi  <simon.marchi@polymtl.ca>
 349
 350         * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
 351         Define for clang.
 352
 353 2018-07-02  Maciej W. Rozycki  <macro@mips.com>
 354
 355         PR tdep/8282
 356         * dis-asm.h (disasm_option_arg_t): New typedef.
 357         (disasm_options_and_args_t): Likewise.
 358         (disasm_options_t): Add `arg' member, document members.
 359         (disassembler_options_mips): New prototype.
 360         (disassembler_options_arm, disassembler_options_powerpc)
 361         (disassembler_options_s390): Update prototypes.
 362
 363 2018-06-29  Tamar Christina  <tamar.christina@arm.com>
 364
 365         PR binutils/23192
 366         *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
 367
 368 2018-06-26  Alan Modra  <amodra@gmail.com>
 369
 370         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
 371
 372 2018-06-24  Nick Clifton  <nickc@redhat.com>
 373
 374         2.31 branch created.
 375
 376 2018-06-21  Alan Hayward  <alan.hayward@arm.com>
 377
 378         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
 379         for non SHT_NOBITS.
 380
 381 2018-06-19  Simon Marchi  <simon.marchi@ericsson.com>
 382
 383         Sync with GCC
 384
 385         2018-05-24  Tom Rix  <trix@juniper.net>
 386
 387         * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
 388
 389         2017-11-20  Kito Cheng  <kito.cheng@gmail.com>
 390
 391         * longlong.h [__riscv] (__umulsidi3): Define.
 392         [__riscv] (umul_ppmm): Likewise.
 393         [__riscv] (__muluw3): Likewise.
 394
 395 2018-06-14  Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 396
 397         * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
 398         (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
 399         * opcode/mips.h: Document "+\" operand format.
 400         (ASE_GINV): New macro.
 401
 402 2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
 403             Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 404
 405         * elf/mips.h (AFL_ASE_CRC): New macro.
 406         (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
 407         * opcode/mips.h (ASE_CRC): New macro.
 408         * opcode/mips.h (ASE_CRC64): Likewise.
 409
 410 2018-06-04  Max Filippov  <jcmvbkbc@gmail.com>
 411
 412         * elf/xtensa.h (xtensa_read_table_entries)
 413         (xtensa_compute_fill_extra_space): New declarations.
 414
 415 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 416
 417         * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
 418         define for GCC.
 419
 420 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 421
 422         * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
 423         (DIAGNOSTIC_STRINGIFY): Likewise.
 424         (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
 425         (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
 426         (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
 427         (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
 428         (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
 429         (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
 430
 431 2018-06-01  H.J. Lu  <hongjiu.lu@intel.com>
 432
 433         * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
 434
 435 2018-05-28  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 436
 437         * splay-tree.h (splay_tree_compare_strings,
 438         splay_tree_delete_pointers): Declare new utility functions.
 439
 440 2018-05-21  Peter Bergner  <bergner@vnet.ibm.com.com>
 441
 442         * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
 443
 444 2018-05-18  Kito Cheng  <kito.cheng@gmail.com>
 445
 446         * elf/riscv.h (EF_RISCV_RVE): New define.
 447
 448 2018-05-18  John Darrington  <john@darrington.wattle.id.au>
 449
 450         * elf/s12z.h: New header.
 451
 452 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 453
 454         PR binutils/21446
 455         * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
 456
 457 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 458
 459         PR binutils/21446
 460         * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
 461         (aarch64_print_operand): Support notes.
 462
 463 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 464
 465         PR binutils/21446
 466         * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
 467         (aarch64_decode_insn): Accept error struct.
 468
 469 2018-05-15  Francois H. Theron  <francois.theron@netronome.com>
 470
 471         * opcode/nfp.h: Use uint64_t instead of bfd_vma.
 472
 473 2018-05-10  John Darrington  <john@darrington.wattle.id.au>
 474
 475         * elf/common.h (EM_S12Z): New macro.
 476
 477 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 478
 479         * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
 480         Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
 481         (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
 482         MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
 483
 484 2018-05-08  Jim Wilson  <jimw@sifive.com>
 485
 486         * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
 487         (MATCH_C_SRAI64, MASK_C_SRAI64): New.
 488         (MATCH_C_SLLI64, MASK_C_SLLI64): New.
 489
 490 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
 491
 492         * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
 493         (vle_num_opcodes): Likewise.
 494         (spe2_num_opcodes): Likewise.
 495
 496 2018-05-04  Alan Modra  <amodra@gmail.com>
 497
 498         * ansidecl.h: Import from gcc.
 499         * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
 500         to s_name.
 501         (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
 502
 503 2018-04-30  Francois H. Theron <francois.theron@netronome.com>
 504
 505         * dis-asm.h: Added print_nfp_disassembler_options prototype.
 506         * elf/common.h: Added EM_NFP, officially assigned. See Google Group
 507         Generic System V Application Binary Interface.
 508         * elf/nfp.h: New, for NFP support.
 509         * opcode/nfp.h: New, for NFP support.
 510
 511 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 512         Mickaël Guêné  <mickael.guene@st.com>
 513
 514         * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
 515         R_ARM_TLS_IE32_FDPIC.
 516
 517 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 518         Mickaël Guêné  <mickael.guene@st.com>
 519
 520         * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
 521         (R_ARM_FUNCDESC)
 522         (R_ARM_FUNCDESC_VALUE): Define new relocations.
 523
 524 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 525         Mickaël Guêné  <mickael.guene@st.com>
 526
 527         * elf/arm.h (EF_ARM_FDPIC): New.
 528
 529 2018-04-18  Alan Modra  <amodra@gmail.com>
 530
 531         * coff/mipspe.h: Delete.
 532
 533 2018-04-18  Alan Modra  <amodra@gmail.com>
 534
 535         * aout/dynix3.h: Delete.
 536
 537 2018-04-17 Andrew Sadek  <andrew.sadek.se@gmail.com>
 538
 539         Microblaze Target: PIC data text relative
 540
 541         * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
 542         * elf/microblaze.h (Add 3 new relocations):
 543         R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
 544         and R_MICROBLAZE_TEXTREL_32_LO for relax function.
 545
 546 2018-04-17  Alan Modra  <amodra@gmail.com>
 547
 548         * elf/i370.h: Revert removal.
 549         * elf/i860.h: Likewise.
 550         * elf/i960.h: Likewise.
 551
 552 2018-04-16  Alan Modra  <amodra@gmail.com>
 553
 554         * coff/sparc.h: Delete.
 555
 556 2018-04-16  Alan Modra  <amodra@gmail.com>
 557
 558         * aout/host.h: Remove m68k-aout and m68k-coff support.
 559         * aout/hp300hpux.h: Delete.
 560         * coff/apollo.h: Delete.
 561         * coff/aux-coff.h: Delete.
 562         * coff/m68k.h: Delete.
 563
 564 2018-04-16  Alan Modra  <amodra@gmail.com>
 565
 566         * dis-asm.h: Remove sh5 and sh64 support.
 567
 568 2018-04-16  Alan Modra  <amodra@gmail.com>
 569
 570         * coff/internal.h: Remove w65 support.
 571         * coff/w65.h: Delete.
 572
 573 2018-04-16  Alan Modra  <amodra@gmail.com>
 574
 575         * coff/we32k.h: Delete.
 576
 577 2018-04-16  Alan Modra  <amodra@gmail.com>
 578
 579         * coff/internal.h: Remove m88k support.
 580         * coff/m88k.h: Delete.
 581         * opcode/m88k.h: Delete.
 582
 583 2018-04-16  Alan Modra  <amodra@gmail.com>
 584
 585         * elf/i370.h: Delete.
 586         * opcode/i370.h: Delete.
 587
 588 2018-04-16  Alan Modra  <amodra@gmail.com>
 589
 590         * coff/h8500.h: Delete.
 591         * coff/internal.h: Remove h8500 support.
 592
 593 2018-04-16  Alan Modra  <amodra@gmail.com>
 594
 595         * coff/h8300.h: Delete.
 596
 597 2018-04-16  Alan Modra  <amodra@gmail.com>
 598
 599         * ieee.h: Delete.
 600
 601 2018-04-16  Alan Modra  <amodra@gmail.com>
 602
 603         * aout/host.h: Remove newsos3 support.
 604
 605 2018-04-16  Alan Modra  <amodra@gmail.com>
 606
 607         * nlm/ChangeLog-9315: Delete.
 608         * nlm/alpha-ext.h: Delete.
 609         * nlm/common.h: Delete.
 610         * nlm/external.h: Delete.
 611         * nlm/i386-ext.h: Delete.
 612         * nlm/internal.h: Delete.
 613         * nlm/ppc-ext.h: Delete.
 614         * nlm/sparc32-ext.h: Delete.
 615
 616 2018-04-16  Alan Modra  <amodra@gmail.com>
 617
 618         * opcode/tahoe.h: Delete.
 619
 620 2018-04-11  Alan Modra  <amodra@gmail.com>
 621
 622         * aout/adobe.h: Delete.
 623         * aout/reloc.h: Delete.
 624         * coff/i860.h: Delete.
 625         * coff/i960.h: Delete.
 626         * elf/i860.h: Delete.
 627         * elf/i960.h: Delete.
 628         * opcode/i860.h: Delete.
 629         * opcode/i960.h: Delete.
 630         * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
 631         * aout/ar.h (ARMAGB): Remove.
 632         * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
 633         union internal_auxent): Remove i960 support.
 634
 635 2018-04-09  Alan Modra  <amodra@gmail.com>
 636
 637         * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
 638         * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
 639
 640 2018-03-28  Renlin Li  <renlin.li@arm.com>
 641
 642         PR ld/22970
 643         * elf/aarch64.h: Add relocation number for
 644         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
 645         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
 646         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
 647         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
 648         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
 649         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
 650         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
 651         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
 652
 653 2018-03-28  Nick Clifton  <nickc@redhat.com>
 654
 655         PR 22988
 656         * opcode/aarch64.h (enum aarch64_opnd): Add
 657         AARCH64_OPND_SVE_ADDR_R.
 658
 659 2018-03-21  H.J. Lu  <hongjiu.lu@intel.com>
 660
 661         * elf/common.h (DF_1_KMOD): New.
 662         (DF_1_WEAKFILTER): Likewise.
 663         (DF_1_NOCOMMON): Likewise.
 664
 665 2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
 666
 667         * opcode/riscv.h (OP_MASK_FUNCT3): New.
 668         (OP_SH_FUNCT3): Likewise.
 669         (OP_MASK_FUNCT7): Likewise.
 670         (OP_SH_FUNCT7): Likewise.
 671         (OP_MASK_OP2): Likewise.
 672         (OP_SH_OP2): Likewise.
 673         (OP_MASK_CFUNCT4): Likewise.
 674         (OP_SH_CFUNCT4): Likewise.
 675         (OP_MASK_CFUNCT3): Likewise.
 676         (OP_SH_CFUNCT3): Likewise.
 677         (riscv_insn_types): Likewise.
 678
 679 2018-03-13  Nick Clifton  <nickc@redhat.com>
 680
 681         PR 22113
 682         * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
 683         field.
 684
 685 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 686
 687         * opcode/i386 (OLDGCC_COMPAT): Removed.
 688
 689 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 690
 691         * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
 692
 693 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
 694
 695         * opcode/mips.h: Remove `M' operand code.
 696
 697 2018-02-12  Zebediah Figura  <z.figura12@gmail.com>
 698
 699         * coff/msdos.h: New header.
 700         * coff/pe.h: Move common defines to msdos.h.
 701         * coff/powerpc.h: Likewise.
 702
 703 2018-01-13  Nick Clifton  <nickc@redhat.com>
 704
 705         2.30 branch created.
 706
 707 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
 708
 709         PR ld/22393
 710         * bfdlink.h (bfd_link_info): Add separate_code.
 711
 712 2018-01-04  Jim Wilson  <jimw@sifive.com>
 713
 714         * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL.  Rename
 715         DECLARE_CSR entry.  Add alias to map sbadaddr to CSR_STVAL.
 716         (CSR_MBADADDR): Rename to CSR_MTVAL.  Rename DECLARE_CSR entry.
 717         Add alias to map mbadaddr to CSR_MTVAL.
 718
 719 2018-01-03  Alan Modra  <amodra@gmail.com>
 720
 721         Update year range in copyright notice of all files.
 722
 723 For older changes see ChangeLog-2017
 724 \f
 725 Copyright (C) 2018 Free Software Foundation, Inc.
 726
 727 Copying and distribution of this file, with or without modification,
 728 are permitted in any medium without royalty provided the copyright
 729 notice and this notice are preserved.
 730
 731 Local Variables:
 732 mode: change-log
 733 left-margin: 8
 734 fill-column: 74
 735 version-control: never
 736 End: