f57d20555dba73c568140292ecb7d00dde838c35
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2018-10-09 Sudakshina Das <sudi.das@arm.com>
2
3 * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
4 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
5 (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
6 (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
7 define HINT #imm values.
8 (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
9
10 2018-10-09 Sudakshina Das <sudi.das@arm.com>
11
12 * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
13
14 2018-10-09 Sudakshina Das <sudi.das@arm.com>
15
16 * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
17
18 2018-10-09 Sudakshina Das <sudi.das@arm.com>
19
20 * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
21 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
22 (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
23 (aarch64_sys_regs_sr): Declare new table.
24
25 2018-10-09 Sudakshina Das <sudi.das@arm.com>
26
27 * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
28 (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
29
30 2018-10-09 Sudakshina Das <sudi.das@arm.com>
31
32 * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
33 (AARCH64_FEATURE_FRINTTS): New.
34 (AARCH64_ARCH_V8_5): Add both by default.
35
36 2018-10-09 Sudakshina Das <sudi.das@arm.com>
37
38 * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
39 (AARCH64_ARCH_V8_5): New.
40
41 2018-10-08 Alan Modra <amodra@gmail.com>
42
43 * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
44
45 2018-10-05 Sudakshina Das <sudi.das@arm.com>
46
47 * opcode/arm.h (ARM_EXT2_PREDRES): New.
48 (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
49
50 2018-10-05 Sudakshina Das <sudi.das@arm.com>
51
52 * opcode/arm.h (ARM_EXT2_SB): New.
53 (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
54
55 2018-10-05 Sudakshina Das <sudi.das@arm.com>
56
57 * opcode/arm.h (ARM_EXT2_V8_5A): New.
58 (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
59
60 2018-10-05 Richard Henderson <rth@twiddle.net>
61
62 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
63 R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
64 R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
65 R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
66 R_OR1K_SLO13, R_OR1K_PLTA26.
67
68 2018-10-05 Richard Henderson <rth@twiddle.net>
69
70 * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
71 R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
72 R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
73
74 2018-10-03 Tamar Christina <tamar.christina@arm.com>
75
76 * opcode/aarch64.h (aarch64_inst): Remove.
77 (enum err_type): Add ERR_VFI.
78 (aarch64_is_destructive_by_operands): New.
79 (init_insn_sequence): New.
80 (aarch64_decode_insn): Remove param name.
81
82 2018-10-03 Tamar Christina <tamar.christina@arm.com>
83
84 * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
85 more arguments.
86
87 2018-10-03 Tamar Christina <tamar.christina@arm.com>
88
89 * opcode/aarch64.h (enum err_type): New.
90 (aarch64_decode_insn): Use it.
91
92 2018-10-03 Tamar Christina <tamar.christina@arm.com>
93
94 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
95 (aarch64_opcode_encode): Use it.
96
97 2018-10-03 Tamar Christina <tamar.christina@arm.com>
98
99 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
100 extend flags field size.
101 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
102
103 2018-10-03 John Darrington <john@darrington.wattle.id.au>
104
105 * dis-asm.h (print_insn_s12z): New declaration.
106
107 2018-10-02 Palmer Dabbelt <palmer@sifive.com>
108
109 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
110 (MASK_FENCE_TSO): Likewise.
111
112 2018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
113
114 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
115
116 2018-09-21 H.J. Lu <hongjiu.lu@intel.com>
117
118 PR binutils/23694
119 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
120 include zero size sections at start of PT_NOTE segment.
121
122 2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
123
124 * elf/nds32.h: Remove the unused target features.
125 * dis-asm.h (disassemble_init_nds32): Declared.
126 * elf/nds32.h (E_NDS32_NULL): Removed.
127 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
128 * opcode/nds32.h: Ident.
129 (N32_SUB6, INSN_LW): New macros.
130 (enum n32_opcodes): Updated.
131 * elf/nds32.h: Doc fixes.
132 * elf/nds32.h: Add R_NDS32_LSI.
133 * elf/nds32.h: Add new relocations for TLS.
134
135 2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
136
137 * elf/common.h (AT_SUN_HWCAP): Rename to ...
138 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
139 compatibility.
140 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
141 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
142
143 2018-09-05 Simon Marchi <simon.marchi@ericsson.com>
144
145 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
146
147 2018-08-31 Alan Modra <amodra@gmail.com>
148
149 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
150 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
151 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
152 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
153
154 2018-08-30 Kito Cheng <kito@andestech.com>
155
156 * opcode/riscv.h (MAX_SUBSET_NUM): New.
157 (riscv_opcode): Add xlen_requirement field and change type of
158 subset.
159
160 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
161
162 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
163 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
164
165 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
166
167 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
168 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
169
170 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
171
172 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
173 E_MIPS_MACH_GS464.
174 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
175 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
176 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
177 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
178
179 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
180
181 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
182 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
183 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
184
185 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
186
187 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
188 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
189 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
190
191 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
192
193 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
194 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
195 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
196
197 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
198
199 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
200 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
201 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
202 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
203 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
204 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
205 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
206 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
207 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
208 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
209 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
210 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
211 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
212 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
213 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
214 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
215 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
216 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
217 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
218 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
219 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
220 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
221 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
222 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
223 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
224 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
225 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
226 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
227 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
228 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
229 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
230 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
231 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
232 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
233 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
234 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
235 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
236 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
237 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
238 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
239 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
240 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
241 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
242 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
243 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
244 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
245 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
246 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
247 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
248 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
249 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
250 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
251 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
252 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
253 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
254 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
255
256 2018-08-24 H.J. Lu <hongjiu.lu@intel.com>
257
258 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
259
260 2018-08-21 John Darrington <john@darrington.wattle.id.au>
261
262 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
263
264 2018-08-21 Alan Modra <amodra@gmail.com>
265
266 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
267 Mention use of "extract" function to provide default value.
268 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
269 (ppc_optional_operand_value): Rewrite to use extract function.
270
271 2018-08-18 John Darrington <john@darrington.wattle.id.au>
272
273 * opcode/s12z.h: New file.
274
275 2018-08-09 Richard Earnshaw <rearnsha@arm.com>
276
277 * elf/arm.h: Updated comments for e_flags definitions.
278
279 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
280
281 * elf/arc.h (Tag_ARC_ATR_version): New tag.
282
283 2018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
284
285 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
286
287 2018-08-01 Richard Earnshaw <rearnsha@arm.com>
288
289 Copy over from GCC
290 2018-07-26 Martin Liska <mliska@suse.cz>
291
292 PR lto/86548
293 * libiberty.h (make_temp_file_with_prefix): New function.
294
295 2018-07-30 Jim Wilson <jimw@sifive.com>
296
297 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
298 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
299 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
300
301 2018-07-30 Andrew Jenner <andrew@codesourcery.com>
302
303 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
304 * elf/csky.h: New file.
305
306 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
307 Maciej W. Rozycki <macro@linux-mips.org>
308
309 * elf/mips.h (AFL_ASE_MASK): Correct typo.
310
311 2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
312
313 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
314
315 2018-07-26 Alan Modra <amodra@gmail.com>
316
317 * elf/ppc64.h: Specify byte offset to local entry for values
318 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
319 value for such functions when entering via global entry point.
320 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
321
322 2018-07-24 Alan Modra <amodra@gmail.com>
323
324 PR 23430
325 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
326
327 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
328 Maciej W. Rozycki <macro@mips.com>
329
330 * elf/mips.h (AFL_ASE_MMI): New macro.
331 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
332 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
333
334 2018-07-17 Maciej W. Rozycki <macro@mips.com>
335
336 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
337
338 2018-07-06 Alan Modra <amodra@gmail.com>
339
340 * diagnostics.h: Comment on macro usage.
341
342 2018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
343
344 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
345 Define for clang.
346
347 2018-07-02 Maciej W. Rozycki <macro@mips.com>
348
349 PR tdep/8282
350 * dis-asm.h (disasm_option_arg_t): New typedef.
351 (disasm_options_and_args_t): Likewise.
352 (disasm_options_t): Add `arg' member, document members.
353 (disassembler_options_mips): New prototype.
354 (disassembler_options_arm, disassembler_options_powerpc)
355 (disassembler_options_s390): Update prototypes.
356
357 2018-06-29 Tamar Christina <tamar.christina@arm.com>
358
359 PR binutils/23192
360 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
361
362 2018-06-26 Alan Modra <amodra@gmail.com>
363
364 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
365
366 2018-06-24 Nick Clifton <nickc@redhat.com>
367
368 2.31 branch created.
369
370 2018-06-21 Alan Hayward <alan.hayward@arm.com>
371
372 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
373 for non SHT_NOBITS.
374
375 2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
376
377 Sync with GCC
378
379 2018-05-24 Tom Rix <trix@juniper.net>
380
381 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
382
383 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
384
385 * longlong.h [__riscv] (__umulsidi3): Define.
386 [__riscv] (umul_ppmm): Likewise.
387 [__riscv] (__muluw3): Likewise.
388
389 2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
390
391 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
392 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
393 * opcode/mips.h: Document "+\" operand format.
394 (ASE_GINV): New macro.
395
396 2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
397 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
398
399 * elf/mips.h (AFL_ASE_CRC): New macro.
400 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
401 * opcode/mips.h (ASE_CRC): New macro.
402 * opcode/mips.h (ASE_CRC64): Likewise.
403
404 2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
405
406 * elf/xtensa.h (xtensa_read_table_entries)
407 (xtensa_compute_fill_extra_space): New declarations.
408
409 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
410
411 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
412 define for GCC.
413
414 2018-06-04 H.J. Lu <hongjiu.lu@intel.com>
415
416 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
417 (DIAGNOSTIC_STRINGIFY): Likewise.
418 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
419 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
420 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
421 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
422 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
423 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
424
425 2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
426
427 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
428
429 2018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
430
431 * splay-tree.h (splay_tree_compare_strings,
432 splay_tree_delete_pointers): Declare new utility functions.
433
434 2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
435
436 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
437
438 2018-05-18 Kito Cheng <kito.cheng@gmail.com>
439
440 * elf/riscv.h (EF_RISCV_RVE): New define.
441
442 2018-05-18 John Darrington <john@darrington.wattle.id.au>
443
444 * elf/s12z.h: New header.
445
446 2018-05-15 Tamar Christina <tamar.christina@arm.com>
447
448 PR binutils/21446
449 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
450
451 2018-05-15 Tamar Christina <tamar.christina@arm.com>
452
453 PR binutils/21446
454 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
455 (aarch64_print_operand): Support notes.
456
457 2018-05-15 Tamar Christina <tamar.christina@arm.com>
458
459 PR binutils/21446
460 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
461 (aarch64_decode_insn): Accept error struct.
462
463 2018-05-15 Francois H. Theron <francois.theron@netronome.com>
464
465 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
466
467 2018-05-10 John Darrington <john@darrington.wattle.id.au>
468
469 * elf/common.h (EM_S12Z): New macro.
470
471 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
472
473 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
474 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
475 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
476 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
477
478 2018-05-08 Jim Wilson <jimw@sifive.com>
479
480 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
481 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
482 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
483
484 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
485
486 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
487 (vle_num_opcodes): Likewise.
488 (spe2_num_opcodes): Likewise.
489
490 2018-05-04 Alan Modra <amodra@gmail.com>
491
492 * ansidecl.h: Import from gcc.
493 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
494 to s_name.
495 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
496
497 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
498
499 * dis-asm.h: Added print_nfp_disassembler_options prototype.
500 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
501 Generic System V Application Binary Interface.
502 * elf/nfp.h: New, for NFP support.
503 * opcode/nfp.h: New, for NFP support.
504
505 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
506 Mickaël Guêné <mickael.guene@st.com>
507
508 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
509 R_ARM_TLS_IE32_FDPIC.
510
511 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
512 Mickaël Guêné <mickael.guene@st.com>
513
514 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
515 (R_ARM_FUNCDESC)
516 (R_ARM_FUNCDESC_VALUE): Define new relocations.
517
518 2018-04-25 Christophe Lyon <christophe.lyon@st.com>
519 Mickaël Guêné <mickael.guene@st.com>
520
521 * elf/arm.h (EF_ARM_FDPIC): New.
522
523 2018-04-18 Alan Modra <amodra@gmail.com>
524
525 * coff/mipspe.h: Delete.
526
527 2018-04-18 Alan Modra <amodra@gmail.com>
528
529 * aout/dynix3.h: Delete.
530
531 2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
532
533 Microblaze Target: PIC data text relative
534
535 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
536 * elf/microblaze.h (Add 3 new relocations):
537 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
538 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
539
540 2018-04-17 Alan Modra <amodra@gmail.com>
541
542 * elf/i370.h: Revert removal.
543 * elf/i860.h: Likewise.
544 * elf/i960.h: Likewise.
545
546 2018-04-16 Alan Modra <amodra@gmail.com>
547
548 * coff/sparc.h: Delete.
549
550 2018-04-16 Alan Modra <amodra@gmail.com>
551
552 * aout/host.h: Remove m68k-aout and m68k-coff support.
553 * aout/hp300hpux.h: Delete.
554 * coff/apollo.h: Delete.
555 * coff/aux-coff.h: Delete.
556 * coff/m68k.h: Delete.
557
558 2018-04-16 Alan Modra <amodra@gmail.com>
559
560 * dis-asm.h: Remove sh5 and sh64 support.
561
562 2018-04-16 Alan Modra <amodra@gmail.com>
563
564 * coff/internal.h: Remove w65 support.
565 * coff/w65.h: Delete.
566
567 2018-04-16 Alan Modra <amodra@gmail.com>
568
569 * coff/we32k.h: Delete.
570
571 2018-04-16 Alan Modra <amodra@gmail.com>
572
573 * coff/internal.h: Remove m88k support.
574 * coff/m88k.h: Delete.
575 * opcode/m88k.h: Delete.
576
577 2018-04-16 Alan Modra <amodra@gmail.com>
578
579 * elf/i370.h: Delete.
580 * opcode/i370.h: Delete.
581
582 2018-04-16 Alan Modra <amodra@gmail.com>
583
584 * coff/h8500.h: Delete.
585 * coff/internal.h: Remove h8500 support.
586
587 2018-04-16 Alan Modra <amodra@gmail.com>
588
589 * coff/h8300.h: Delete.
590
591 2018-04-16 Alan Modra <amodra@gmail.com>
592
593 * ieee.h: Delete.
594
595 2018-04-16 Alan Modra <amodra@gmail.com>
596
597 * aout/host.h: Remove newsos3 support.
598
599 2018-04-16 Alan Modra <amodra@gmail.com>
600
601 * nlm/ChangeLog-9315: Delete.
602 * nlm/alpha-ext.h: Delete.
603 * nlm/common.h: Delete.
604 * nlm/external.h: Delete.
605 * nlm/i386-ext.h: Delete.
606 * nlm/internal.h: Delete.
607 * nlm/ppc-ext.h: Delete.
608 * nlm/sparc32-ext.h: Delete.
609
610 2018-04-16 Alan Modra <amodra@gmail.com>
611
612 * opcode/tahoe.h: Delete.
613
614 2018-04-11 Alan Modra <amodra@gmail.com>
615
616 * aout/adobe.h: Delete.
617 * aout/reloc.h: Delete.
618 * coff/i860.h: Delete.
619 * coff/i960.h: Delete.
620 * elf/i860.h: Delete.
621 * elf/i960.h: Delete.
622 * opcode/i860.h: Delete.
623 * opcode/i960.h: Delete.
624 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
625 * aout/ar.h (ARMAGB): Remove.
626 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
627 union internal_auxent): Remove i960 support.
628
629 2018-04-09 Alan Modra <amodra@gmail.com>
630
631 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
632 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
633
634 2018-03-28 Renlin Li <renlin.li@arm.com>
635
636 PR ld/22970
637 * elf/aarch64.h: Add relocation number for
638 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
639 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
640 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
641 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
642 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
643 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
644 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
645 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
646
647 2018-03-28 Nick Clifton <nickc@redhat.com>
648
649 PR 22988
650 * opcode/aarch64.h (enum aarch64_opnd): Add
651 AARCH64_OPND_SVE_ADDR_R.
652
653 2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
654
655 * elf/common.h (DF_1_KMOD): New.
656 (DF_1_WEAKFILTER): Likewise.
657 (DF_1_NOCOMMON): Likewise.
658
659 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
660
661 * opcode/riscv.h (OP_MASK_FUNCT3): New.
662 (OP_SH_FUNCT3): Likewise.
663 (OP_MASK_FUNCT7): Likewise.
664 (OP_SH_FUNCT7): Likewise.
665 (OP_MASK_OP2): Likewise.
666 (OP_SH_OP2): Likewise.
667 (OP_MASK_CFUNCT4): Likewise.
668 (OP_SH_CFUNCT4): Likewise.
669 (OP_MASK_CFUNCT3): Likewise.
670 (OP_SH_CFUNCT3): Likewise.
671 (riscv_insn_types): Likewise.
672
673 2018-03-13 Nick Clifton <nickc@redhat.com>
674
675 PR 22113
676 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
677 field.
678
679 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
680
681 * opcode/i386 (OLDGCC_COMPAT): Removed.
682
683 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
684
685 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
686
687 2018-02-20 Maciej W. Rozycki <macro@mips.com>
688
689 * opcode/mips.h: Remove `M' operand code.
690
691 2018-02-12 Zebediah Figura <z.figura12@gmail.com>
692
693 * coff/msdos.h: New header.
694 * coff/pe.h: Move common defines to msdos.h.
695 * coff/powerpc.h: Likewise.
696
697 2018-01-13 Nick Clifton <nickc@redhat.com>
698
699 2.30 branch created.
700
701 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
702
703 PR ld/22393
704 * bfdlink.h (bfd_link_info): Add separate_code.
705
706 2018-01-04 Jim Wilson <jimw@sifive.com>
707
708 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
709 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
710 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
711 Add alias to map mbadaddr to CSR_MTVAL.
712
713 2018-01-03 Alan Modra <amodra@gmail.com>
714
715 Update year range in copyright notice of all files.
716
717 For older changes see ChangeLog-2017
718 \f
719 Copyright (C) 2018 Free Software Foundation, Inc.
720
721 Copying and distribution of this file, with or without modification,
722 are permitted in any medium without royalty provided the copyright
723 notice and this notice are preserved.
724
725 Local Variables:
726 mode: change-log
727 left-margin: 8
728 fill-column: 74
729 version-control: never
730 End:
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