arc: Replace ARC_SHORT macro with arc_opcode_len function
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2016-11-03 Graham Markall <graham.markall@embecosm.com>
2
3 * opcode/arc.h (arc_opcode_len): Declare.
4 (ARC_SHORT): Delete.
5
6 2016-11-01 Palmer Dabbelt <palmer@dabbelt.com>
7 Andrew Waterman <andrew@sifive.com>
8
9 Add support for RISC-V architecture.
10 * dis-asm.h: Add prototypes for print_insn_riscv and
11 print_riscv_disassembler_options.
12 * elf/riscv.h: New file.
13 * opcode/riscv-opc.h: New file.
14 * opcode/riscv.h: New file.
15
16 2016-10-17 Nick Clifton <nickc@redhat.com>
17
18 * elf/common.h (DT_SYMTAB_SHNDX): Define.
19 (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
20 (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
21 (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
22 (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
23 (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
24 (ELFOSABI_OPENVOS): Define.
25 (GRP_MASKOS, GRP_MASKPROC): Define.
26
27 2016-10-14 Pedro Alves <palves@redhat.com>
28
29 * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
30 OVERRIDE): Define as empty.
31 [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
32 __final.
33 [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
34 empty.
35
36 2016-10-14 Pedro Alves <palves@redhat.com>
37
38 * ansidecl.h (GCC_FINAL): Delete.
39 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
40
41 2016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
42
43 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
44
45 2016-09-29 Alan Modra <amodra@gmail.com>
46
47 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
48
49 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
50
51 * opcode/arc.h (insn_class_t): Add two new classes.
52
53 2016-09-26 Alan Modra <amodra@gmail.com>
54
55 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
56
57 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
58
59 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
60
61 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
62
63 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
64 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
65 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
66 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
67
68 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
69
70 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
71 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
72 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
73 aarch64_insn_classes.
74
75 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
76
77 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
78 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
79 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
80
81 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
82
83 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
84 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
85 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
86
87 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
88
89 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
90 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
91 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
92 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
93 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
94 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
95 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
96 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
97 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
98 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
99 (aarch64_sve_dupm_mov_immediate_p): Declare.
100
101 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
102
103 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
104 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
105 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
106 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
107 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
108
109 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
110
111 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
112 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
113 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
114 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
115 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
116 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
117 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
118 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
119 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
120 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
121 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
122 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
123 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
124 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
125 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
126 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
127 Likewise.
128
129 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
130
131 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
132 aarch64_opnd.
133 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
134 (aarch64_opnd_info): Make shifter.amount an int64_t and
135 rearrange the fields.
136
137 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
138
139 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
140 (AARCH64_OPND_SVE_PRFOP): Likewise.
141 (aarch64_sve_pattern_array): Declare.
142 (aarch64_sve_prfop_array): Likewise.
143
144 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
145
146 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
147 (AARCH64_OPND_QLF_P_M): Likewise.
148
149 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
150
151 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
152 aarch64_operand_class.
153 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
154 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
155 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
156 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
157 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
158 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
159 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
160 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
161
162 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
163
164 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
165 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
166
167 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
168
169 * opcode/aarch64.h (F_STRICT): New flag.
170
171 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
172
173 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
174
175 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
176 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
177 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
178 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
179 relocation.
180
181 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
182
183 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
184 (ARM_SET_SYM_CMSE_SPCL): Likewise.
185
186 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
187
188 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
189
190 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
191
192 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
193
194 2016-07-27 Graham Markall <graham.markall@embecosm.com>
195
196 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
197 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
198 ARC_NUM_ADDRTYPES.
199 * opcode/arc.h: Add BMU to insn_class_t enum.
200 * opcode/arc.h: Add PMU to insn_class_t enum.
201
202 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
203
204 * dis-asm.h: Declare print_arc_disassembler_options.
205
206 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
207
208 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
209 out_implib_bfd fields.
210
211 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
212
213 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
214
215 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
216
217 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
218 (SHF_ARM_PURECODE): ... this.
219
220 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
221
222 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
223 (AARCH64_CPU_HAS_ANY_FEATURES): New.
224 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
225 (AARCH64_OPCODE_HAS_FEATURE): Remove.
226
227 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
228
229 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
230 of enabled FPU features.
231
232 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
233
234 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
235 SPARC_OPCODE_ARCH_MAX into the enum.
236
237 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
238
239 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
240
241 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
242
243 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
244
245 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
246
247 * elf/xtensa.h (xtensa_make_property_section): New prototype.
248
249 2016-06-24 John Baldwin <jhb@FreeBSD.org>
250
251 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
252 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
253 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
254 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
255
256 2016-06-23 Graham Markall <graham.markall@embecosm.com>
257
258 * opcode/arc.h: Make insn_class_t alphabetical again.
259
260 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
261
262 * elf/dlx.h: Wrap in extern C.
263 * elf/xtensa.h: Likewise.
264 * opcode/arc.h: Likewise.
265
266 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
267
268 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
269 tilegx_pipeline.
270
271 2016-06-21 Graham Markall <graham.markall@embecosm.com>
272
273 * opcode/arc.h: Add nps400 extension and instruction
274 subclass.
275 Remove ARC_OPCODE_NPS400
276 * elf/arc.h: Remove E_ARC_MACH_NPS400
277
278 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
279
280 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
281 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
282 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
283 SPARC_OPCODE_ARCH_V9M.
284
285 2016-06-14 John Baldwin <jhb@FreeBSD.org>
286
287 * opcode/msp430-decode.h (MSP430_Size): Remove.
288 (Msp430_Opcode_Decoded): Change type of size to int.
289
290 2016-06-11 Alan Modra <amodra@gmail.com>
291
292 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
293
294 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
295
296 * opcode/sparc.h: Add missing documentation for hyperprivileged
297 registers in rd (%) and rs1 ($).
298
299 2016-06-07 Alan Modra <amodra@gmail.com>
300
301 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
302 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
303 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
304 PPC_APUINFO_VLE: Define.
305
306 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
307
308 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
309 entries.
310 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
311
312 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
313
314 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
315 (struct arc_long_opcode): New structure.
316 (arc_long_opcodes): Declare.
317 (arc_num_long_opcodes): Declare.
318
319 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
320
321 * elf/mips.h: Add extern "C".
322 * elf/sh.h: Likewise.
323 * opcode/d10v.h: Likewise.
324 * opcode/d30v.h: Likewise.
325 * opcode/ia64.h: Likewise.
326 * opcode/mips.h: Likewise.
327 * opcode/ppc.h: Likewise.
328 * opcode/sparc.h: Likewise.
329 * opcode/tic6x.h: Likewise.
330 * opcode/v850.h: Likewise.
331
332 2016-05-28 Alan Modra <amodra@gmail.com>
333
334 * bfdlink.h (struct bfd_link_callbacks): Update comments.
335 Return void from multiple_definition, multiple_common,
336 add_to_set, constructor, warning, undefined_symbol,
337 reloc_overflow, reloc_dangerous and unattached_reloc.
338
339 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
340
341 * opcode/metag.h: wrap declarations in extern "C".
342
343 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
344
345 * opcode/arc.h (insn_subclass_t): Add COND.
346 (flag_class_t): Add F_CLASS_EXTEND.
347
348 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
349
350 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
351 insn_class.
352 (struct arc_flag_class): Renamed attribute class to flag_class.
353
354 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
355
356 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
357 plain symbol.
358
359 2016-04-29 Tom Tromey <tom@tromey.com>
360
361 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
362 DW_LANG_Rust_old>: New constants.
363
364 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
365
366 * elf/mips.h (AFL_ASE_DSPR3): New macro.
367 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
368 * opcode/mips.h (ASE_DSPR3): New macro.
369
370 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
371 Nick Clifton <nickc@redhat.com>
372
373 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
374 enumerator.
375 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
376 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
377 (ARM_SYM_BRANCH_TYPE): Replace by ...
378 (ARM_GET_SYM_BRANCH_TYPE): This and ...
379 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
380 BFD_ASSERT is defined or not.
381
382 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
383
384 * elf/arm.h (Tag_DSP_extension): Define.
385
386 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
387
388 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
389
390 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
391
392 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
393 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
394 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
395 for the high core bits.
396
397 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
398
399 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
400 (ARC_SYNTAX_NOP): Likewsie.
401 (ARC_OP1_MUST_BE_IMM): Update defined value.
402 (ARC_OP1_IMM_IMPLIED): Likewise.
403 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
404
405 2016-04-28 Nick Clifton <nickc@redhat.com>
406
407 PR target/19722
408 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
409
410 2016-04-27 Alan Modra <amodra@gmail.com>
411
412 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
413 undef. Formatting.
414
415 2016-04-21 Nick Clifton <nickc@redhat.com>
416
417 * bfdlink.h: Add prototype for bfd_link_check_relocs.
418
419 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
420
421 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
422
423 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
424
425 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
426
427 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
428
429 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
430
431 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
432
433 * opcode/arc.h (insn_class_t): Add NET and ACL class.
434
435 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
436
437 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
438 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
439
440 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
441
442 * opcode/arc.h (flag_class_t): Update.
443 (ARC_OPCODE_NONE): Define.
444 (ARC_OPCODE_ARCALL): Likewise.
445 (ARC_OPCODE_ARCFPX): Likewise.
446 (ARC_REGISTER_READONLY): Likewise.
447 (ARC_REGISTER_WRITEONLY): Likewise.
448 (ARC_REGISTER_NOSHORT_CUT): Likewise.
449 (arc_aux_reg): Add cpu.
450
451 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
452
453 * opcode/arc.h (arc_num_opcodes): Remove.
454 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
455 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
456 (ARC_SUFFIX_FLAG): Define.
457 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
458 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
459 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
460 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
461 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
462 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
463 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
464 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
465 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
466 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
467
468 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
469
470 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
471 (ARC_FPUDA): Define.
472 (arc_aux_reg): Add new field.
473
474 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
475
476 * opcode/arc-func.h (replace_bits24): Changed.
477 (replace_bits24_be): Created.
478
479 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
480
481 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
482 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
483 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
484 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
485 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
486 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
487 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
488 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
489 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
490 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
491 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
492 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
493 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
494 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
495
496 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
497
498 * opcode/i960.h: Add const qualifiers.
499 * opcode/tic4x.h (struct tic4x_inst): Likewise.
500
501 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
502
503 * opcodes/arc.h (insn_class_t): Add BITOP type.
504
505 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
506
507 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
508 new classes instead.
509
510 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
511
512 * elf/arc.h (E_ARC_MACH_NPS400): Define.
513 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
514
515 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
516
517 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
518
519 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
520
521 * elf/arc.h (EF_ARC_MACH): Delete.
522 (EF_ARC_MACH_MSK): Remove out of date comment.
523
524 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
525
526 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
527
528 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
529
530 PR ld/19807
531 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
532
533 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
534 Andrew Burgess <andrew.burgess@embecosm.com>
535
536 * elf/arc-reloc.def: Add a call to ME within the formula for each
537 relocation that requires middle-endian correction.
538
539 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
540
541 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
542 * opcode/h8300.h (struct h8_opcode): Likewise.
543 * opcode/hppa.h (struct pa_opcode): Likewise.
544 * opcode/msp430.h: Likewise.
545 * opcode/spu.h (struct spu_opcode): Likewise.
546 * opcode/tic30.h (struct _register): Likewise.
547 * opcode/tic4x.h (struct tic4x_register): Likewise.
548 (struct tic4x_cond): Likewise.
549 (struct tic4x_indirect): Likewise.
550 (struct tic4x_inst): Likewise.
551 * opcode/visium.h (struct reg_entry): Likewise.
552
553 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
554
555 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
556 (ARM_CPU_HAS_FEATURE): Add comment.
557
558 2016-03-03 Than McIntosh <thanm@google.com>
559
560 * plugin-api.h: Add new hooks to the plugin transfer vector to
561 to support querying section alignment and section size.
562 (ld_plugin_get_input_section_alignment): New hook.
563 (ld_plugin_get_input_section_size): New hook.
564 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
565 and LDPT_GET_INPUT_SECTION_SIZE.
566 (ld_plugin_tv): Add tv_get_input_section_alignment and
567 tv_get_input_section_size.
568
569 2016-03-03 Evgenii Stepanov <eugenis@google.com>
570
571 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
572
573 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
574
575 PR ld/19645
576 * bfdlink.h (bfd_link_elf_stt_common): New enum.
577 (bfd_link_info): Add elf_stt_common.
578
579 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
580
581 PR ld/19636
582 PR ld/19704
583 PR ld/19719
584 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
585
586 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
587 Jiong Wang <jiong.wang@arm.com>
588
589 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
590
591 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
592 Janek van Oirschot <jvanoirs@synopsys.com>
593
594 * opcode/arc.h (arc_opcode arc_relax_opcodes)
595 (arc_num_relax_opcodes): Declare.
596
597 2016-02-09 Nick Clifton <nickc@redhat.com>
598
599 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
600 * opcode/nds32.h (nds32_r45map): Likewise.
601 (nds32_r54map): Likewise.
602 * opcode/visium.h (gen_reg_table): Likewise.
603 (fp_reg_table, cc_table, opcode_table): Likewise.
604
605 2016-02-09 Alan Modra <amodra@gmail.com>
606
607 PR 16583
608 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
609
610 2016-02-04 Nick Clifton <nickc@redhat.com>
611
612 PR target/19561
613 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
614 (RRUX): Synthesise using case 2 rather than 7.
615
616 2016-01-19 John Baldwin <jhb@FreeBSD.org>
617
618 * elf/common.h (NT_FREEBSD_THRMISC): Define.
619 (NT_FREEBSD_PROCSTAT_PROC): Define.
620 (NT_FREEBSD_PROCSTAT_FILES): Define.
621 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
622 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
623 (NT_FREEBSD_PROCSTAT_UMASK): Define.
624 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
625 (NT_FREEBSD_PROCSTAT_OSREL): Define.
626 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
627 (NT_FREEBSD_PROCSTAT_AUXV): Define.
628
629 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
630 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
631
632 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
633 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
634 (ARC_TLS_LE_32): Fixed formula.
635 (ARC_TLS_GD_LD): Use new special function.
636 * opcode/arc-func.h: Changed all the replacement
637 functions to clear the patching bits before doing an or it with the value
638 argument.
639
640 2016-01-18 Nick Clifton <nickc@redhat.com>
641
642 PR ld/19440
643 * coff/internal.h (internal_syment): Use int to hold section
644 number.
645 (N_UNDEF): Cast to int not short.
646 (N_ABS): Likewise.
647 (N_DEBUG): Likewise.
648 (N_TV): Likewise.
649 (P_TV): Likewise.
650
651 2016-01-11 Nick Clifton <nickc@redhat.com>
652
653 Import this change from GCC mainline:
654
655 2016-01-07 Mike Frysinger <vapier@gentoo.org>
656
657 * longlong.h: Change !__SHMEDIA__ to
658 (!defined (__SHMEDIA__) || !__SHMEDIA__).
659 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
660
661 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
662
663 * opcode/mips.h: Add a summary of MIPS16 operand codes.
664
665 2016-01-05 Mike Frysinger <vapier@gentoo.org>
666
667 * libiberty.h (dupargv): Change arg to char * const *.
668 (writeargv, countargv): Likewise.
669
670 2016-01-01 Alan Modra <amodra@gmail.com>
671
672 Update year range in copyright notice of all files.
673
674 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
675 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
676 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
677 som/ChangeLog-1015, and vms/ChangeLog-1015
678 \f
679 Copyright (C) 2016 Free Software Foundation, Inc.
680
681 Copying and distribution of this file, with or without modification,
682 are permitted in any medium without royalty provided the copyright
683 notice and this notice are preserved.
684
685 Local Variables:
686 mode: change-log
687 left-margin: 8
688 fill-column: 74
689 version-control: never
690 End:
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