include/ChangeLog

   1 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
   2
   3         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
   4
   5 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
   6
   7         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
   8
   9 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  10
  11         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
  12
  13 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  14
  15         * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
  16
  17 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  18
  19         * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
  20
  21 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  22
  23         * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
  24
  25 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  26
  27         * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
  28
  29 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
  30
  31         * opcode/aarch64.h (AARCH64_FEATURE_SVE2
  32         AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
  33         AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
  34         feature macros.
  35
  36 2019-05-06  Andrew Bennett  <andrew.bennett@imgtec.com>
  37             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  38
  39         * opcode/mips.h (ASE_EVA_R6): New macro.
  40         (M_LLWPE_AB, M_SCWPE_AB): New enum values.
  41
  42 2019-05-01  Sudakshina Das  <sudi.das@arm.com>
  43
  44         * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
  45         (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
  46
  47 2019-04-26  Andrew Bennett  <andrew.bennett@imgtec.com>
  48             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  49
  50         * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
  51         (M_SCWP_AB, M_SCDP_AB): Likewise.
  52
  53 2019-04-25  Maciej W. Rozycki  <macro@linux-mips.org>
  54
  55         * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
  56
  57 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  58
  59         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
  60
  61 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  62
  63         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
  64
  65 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
  66
  67         * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
  68
  69 2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  70
  71         * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
  72         (MAX_TAG_CPU_ARCH): Set value to above macro.
  73         * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
  74         (ARM_AEXT_V8_1M_MAIN): Likewise.
  75         (ARM_AEXT2_V8_1M_MAIN): Likewise.
  76         (ARM_ARCH_V8_1M_MAIN): Likewise.
  77
  78 2019-04-11  Sudakshina Das  <sudi.das@arm.com>
  79
  80         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
  81
  82 2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>
  83
  84         * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
  85
  86 2019-04-07  Alan Modra  <amodra@gmail.com>
  87
  88         Merge from gcc.
  89         2019-04-03  Vineet Gupta  <vgupta@synopsys.com>
  90         PR89877
  91         * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
  92         (sub_ddmmss): Likewise.
  93
  94 2019-04-06  H.J. Lu  <hongjiu.lu@intel.com>
  95
  96         * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
  97
  98 2019-04-01  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  99
 100         * opcode/arm.h (FPU_NEON_ARMV8_1): New.
 101         (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
 102         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
 103         (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
 104         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
 105         (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
 106         (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
 107         (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
 108
 109 2019-03-28  Alan Modra  <amodra@gmail.com>
 110
 111         PR 24390
 112         * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
 113
 114 2019-03-25  Tamar Christina  <tamar.christina@arm.com>
 115
 116         * dis-asm.h (struct disassemble_info): Add stop_offset.
 117
 118 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 119
 120         * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
 121
 122 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 123             Szabolcs Nagy  <szabolcs.nagy@arm.com>
 124
 125         * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
 126
 127 2019-03-13  Sudakshina Das  <sudi.das@arm.com>
 128
 129         * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
 130         (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
 131         (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
 132
 133 2019-02-20  Alan Hayward  <alan.hayward@arm.com>
 134
 135         * elf/common.h (NT_ARM_PAC_MASK): Add define.
 136
 137 2019-02-15  Saagar Jha  <saagar@saagarjha.com>
 138
 139         * mach-o/loader.h: Use new OS names in comments.
 140
 141 2019-02-11  Philippe Waroquiers  <philippe.waroquiers@skynet.be>
 142
 143         * splay-tree.h (splay_tree_delete_key_fn): Update comment.
 144         (splay_tree_delete_value_fn): Likewise.
 145
 146 2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>
 147
 148         * opcode/s390.h (enum s390_opcode_cpu_val): Add
 149         S390_OPCODE_ARCH13.
 150
 151 2019-01-25  Sudakshina Das  <sudi.das@arm.com>
 152             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 153
 154         * opcode/aarch64.h (enum aarch64_opnd): Remove
 155         AARCH64_OPND_ADDR_SIMPLE_2.
 156         (enum aarch64_insn_class): Remove ldstgv_indexed.
 157
 158 2019-01-22  Tom Tromey  <tom@tromey.com>
 159
 160         * coff/ecoff.h: Include coff/sym.h.
 161
 162 2018-06-24  Nick Clifton  <nickc@redhat.com>
 163
 164         2.32 branch created.
 165
 166 2019-01-16  Kito Cheng  <kito@andestech.com>
 167
 168         * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
 169         (Tag_RISCV_arch): Likewise.
 170         (Tag_RISCV_priv_spec): Likewise.
 171         (Tag_RISCV_priv_spec_minor): Likewise.
 172         (Tag_RISCV_priv_spec_revision): Likewise.
 173         (Tag_RISCV_unaligned_access): Likewise.
 174         (Tag_RISCV_stack_align): Likewise.
 175
 176 2019-01-14  Pavel I. Kryukov  <kryukov@frtk.ru>
 177
 178         * dis-asm.h: include <string.h>
 179
 180 2019-01-10  Nick Clifton  <nickc@redhat.com>
 181
 182         * Merge from GCC:
 183         2018-12-22  Jason Merrill  <jason@redhat.com>
 184
 185         * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
 186         ARM, HP, and EDG demangling styles.
 187
 188 2019-01-09  Sandra Loosemore  <sandra@codesourcery.com>
 189
 190         Merge from GCC:
 191         PR other/16615
 192
 193         * libiberty.h: Mechanically replace "can not" with "cannot".
 194         * plugin-api.h: Likewise.
 195
 196 2018-12-25  Yoshinori Sato <ysato@users.sourceforge.jp>
 197
 198         * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
 199         (E_FLAG_RX_V3): New RXv3 type.
 200         * opcode/rx.h (RX_Size): Add double size.
 201         (RX_Operand_Type): Add double FPU registers.
 202         (RX_Opcode_ID): Add new instuctions.
 203
 204 2019-01-01  Alan Modra  <amodra@gmail.com>
 205
 206         Update year range in copyright notice of all files.
 207
 208 For older changes see ChangeLog-2018
 209 \f
 210 Copyright (C) 2019 Free Software Foundation, Inc.
 211
 212 Copying and distribution of this file, with or without modification,
 213 are permitted in any medium without royalty provided the copyright
 214 notice and this notice are preserved.
 215
 216 Local Variables:
 217 mode: change-log
 218 left-margin: 8
 219 fill-column: 74
 220 version-control: never
 221 End: