1 2016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
3 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
5 2016-09-29 Alan Modra <amodra@gmail.com>
7 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
9 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
11 * opcode/arc.h (insn_class_t): Add two new classes.
13 2016-09-26 Alan Modra <amodra@gmail.com>
15 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
17 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
19 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
21 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
23 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
24 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
25 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
26 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
28 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
30 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
31 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
32 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
35 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
37 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
38 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
39 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
41 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
43 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
44 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
45 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
47 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
49 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
50 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
51 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
52 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
53 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
54 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
55 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
56 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
57 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
58 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
59 (aarch64_sve_dupm_mov_immediate_p): Declare.
61 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
63 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
64 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
65 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
66 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
67 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
69 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
71 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
72 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
73 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
74 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
75 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
76 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
77 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
78 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
79 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
80 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
81 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
82 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
83 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
84 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
85 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
86 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
89 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
91 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
93 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
94 (aarch64_opnd_info): Make shifter.amount an int64_t and
97 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
99 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
100 (AARCH64_OPND_SVE_PRFOP): Likewise.
101 (aarch64_sve_pattern_array): Declare.
102 (aarch64_sve_prfop_array): Likewise.
104 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
106 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
107 (AARCH64_OPND_QLF_P_M): Likewise.
109 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
111 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
112 aarch64_operand_class.
113 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
114 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
115 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
116 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
117 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
118 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
119 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
120 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
122 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
124 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
125 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
127 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
129 * opcode/aarch64.h (F_STRICT): New flag.
131 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
133 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
135 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
136 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
137 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
138 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
141 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
143 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
144 (ARM_SET_SYM_CMSE_SPCL): Likewise.
146 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
148 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
150 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
152 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
154 2016-07-27 Graham Markall <graham.markall@embecosm.com>
156 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
157 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
159 * opcode/arc.h: Add BMU to insn_class_t enum.
160 * opcode/arc.h: Add PMU to insn_class_t enum.
162 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
164 * dis-asm.h: Declare print_arc_disassembler_options.
166 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
168 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
169 out_implib_bfd fields.
171 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
173 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
175 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
177 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
178 (SHF_ARM_PURECODE): ... this.
180 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
182 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
183 (AARCH64_CPU_HAS_ANY_FEATURES): New.
184 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
185 (AARCH64_OPCODE_HAS_FEATURE): Remove.
187 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
189 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
190 of enabled FPU features.
192 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
194 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
195 SPARC_OPCODE_ARCH_MAX into the enum.
197 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
199 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
201 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
203 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
205 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
207 * elf/xtensa.h (xtensa_make_property_section): New prototype.
209 2016-06-24 John Baldwin <jhb@FreeBSD.org>
211 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
212 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
213 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
214 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
216 2016-06-23 Graham Markall <graham.markall@embecosm.com>
218 * opcode/arc.h: Make insn_class_t alphabetical again.
220 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
222 * elf/dlx.h: Wrap in extern C.
223 * elf/xtensa.h: Likewise.
224 * opcode/arc.h: Likewise.
226 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
228 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
231 2016-06-21 Graham Markall <graham.markall@embecosm.com>
233 * opcode/arc.h: Add nps400 extension and instruction
235 Remove ARC_OPCODE_NPS400
236 * elf/arc.h: Remove E_ARC_MACH_NPS400
238 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
240 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
241 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
242 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
243 SPARC_OPCODE_ARCH_V9M.
245 2016-06-14 John Baldwin <jhb@FreeBSD.org>
247 * opcode/msp430-decode.h (MSP430_Size): Remove.
248 (Msp430_Opcode_Decoded): Change type of size to int.
250 2016-06-11 Alan Modra <amodra@gmail.com>
252 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
254 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
256 * opcode/sparc.h: Add missing documentation for hyperprivileged
257 registers in rd (%) and rs1 ($).
259 2016-06-07 Alan Modra <amodra@gmail.com>
261 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
262 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
263 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
264 PPC_APUINFO_VLE: Define.
266 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
268 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
270 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
272 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
274 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
275 (struct arc_long_opcode): New structure.
276 (arc_long_opcodes): Declare.
277 (arc_num_long_opcodes): Declare.
279 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
281 * elf/mips.h: Add extern "C".
282 * elf/sh.h: Likewise.
283 * opcode/d10v.h: Likewise.
284 * opcode/d30v.h: Likewise.
285 * opcode/ia64.h: Likewise.
286 * opcode/mips.h: Likewise.
287 * opcode/ppc.h: Likewise.
288 * opcode/sparc.h: Likewise.
289 * opcode/tic6x.h: Likewise.
290 * opcode/v850.h: Likewise.
292 2016-05-28 Alan Modra <amodra@gmail.com>
294 * bfdlink.h (struct bfd_link_callbacks): Update comments.
295 Return void from multiple_definition, multiple_common,
296 add_to_set, constructor, warning, undefined_symbol,
297 reloc_overflow, reloc_dangerous and unattached_reloc.
299 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
301 * opcode/metag.h: wrap declarations in extern "C".
303 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
305 * opcode/arc.h (insn_subclass_t): Add COND.
306 (flag_class_t): Add F_CLASS_EXTEND.
308 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
310 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
312 (struct arc_flag_class): Renamed attribute class to flag_class.
314 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
316 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
319 2016-04-29 Tom Tromey <tom@tromey.com>
321 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
322 DW_LANG_Rust_old>: New constants.
324 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
326 * elf/mips.h (AFL_ASE_DSPR3): New macro.
327 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
328 * opcode/mips.h (ASE_DSPR3): New macro.
330 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
331 Nick Clifton <nickc@redhat.com>
333 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
335 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
336 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
337 (ARM_SYM_BRANCH_TYPE): Replace by ...
338 (ARM_GET_SYM_BRANCH_TYPE): This and ...
339 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
340 BFD_ASSERT is defined or not.
342 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
344 * elf/arm.h (Tag_DSP_extension): Define.
346 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
348 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
350 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
352 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
353 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
354 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
355 for the high core bits.
357 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
359 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
360 (ARC_SYNTAX_NOP): Likewsie.
361 (ARC_OP1_MUST_BE_IMM): Update defined value.
362 (ARC_OP1_IMM_IMPLIED): Likewise.
363 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
365 2016-04-28 Nick Clifton <nickc@redhat.com>
368 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
370 2016-04-27 Alan Modra <amodra@gmail.com>
372 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
375 2016-04-21 Nick Clifton <nickc@redhat.com>
377 * bfdlink.h: Add prototype for bfd_link_check_relocs.
379 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
381 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
383 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
385 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
387 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
389 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
391 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
393 * opcode/arc.h (insn_class_t): Add NET and ACL class.
395 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
397 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
398 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
400 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
402 * opcode/arc.h (flag_class_t): Update.
403 (ARC_OPCODE_NONE): Define.
404 (ARC_OPCODE_ARCALL): Likewise.
405 (ARC_OPCODE_ARCFPX): Likewise.
406 (ARC_REGISTER_READONLY): Likewise.
407 (ARC_REGISTER_WRITEONLY): Likewise.
408 (ARC_REGISTER_NOSHORT_CUT): Likewise.
409 (arc_aux_reg): Add cpu.
411 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
413 * opcode/arc.h (arc_num_opcodes): Remove.
414 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
415 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
416 (ARC_SUFFIX_FLAG): Define.
417 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
418 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
419 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
420 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
421 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
422 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
423 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
424 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
425 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
426 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
428 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
430 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
432 (arc_aux_reg): Add new field.
434 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
436 * opcode/arc-func.h (replace_bits24): Changed.
437 (replace_bits24_be): Created.
439 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
441 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
442 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
443 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
444 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
445 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
446 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
447 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
448 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
449 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
450 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
451 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
452 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
453 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
454 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
456 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
458 * opcode/i960.h: Add const qualifiers.
459 * opcode/tic4x.h (struct tic4x_inst): Likewise.
461 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
463 * opcodes/arc.h (insn_class_t): Add BITOP type.
465 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
467 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
470 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
472 * elf/arc.h (E_ARC_MACH_NPS400): Define.
473 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
475 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
477 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
479 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
481 * elf/arc.h (EF_ARC_MACH): Delete.
482 (EF_ARC_MACH_MSK): Remove out of date comment.
484 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
486 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
488 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
491 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
493 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
494 Andrew Burgess <andrew.burgess@embecosm.com>
496 * elf/arc-reloc.def: Add a call to ME within the formula for each
497 relocation that requires middle-endian correction.
499 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
501 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
502 * opcode/h8300.h (struct h8_opcode): Likewise.
503 * opcode/hppa.h (struct pa_opcode): Likewise.
504 * opcode/msp430.h: Likewise.
505 * opcode/spu.h (struct spu_opcode): Likewise.
506 * opcode/tic30.h (struct _register): Likewise.
507 * opcode/tic4x.h (struct tic4x_register): Likewise.
508 (struct tic4x_cond): Likewise.
509 (struct tic4x_indirect): Likewise.
510 (struct tic4x_inst): Likewise.
511 * opcode/visium.h (struct reg_entry): Likewise.
513 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
515 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
516 (ARM_CPU_HAS_FEATURE): Add comment.
518 2016-03-03 Than McIntosh <thanm@google.com>
520 * plugin-api.h: Add new hooks to the plugin transfer vector to
521 to support querying section alignment and section size.
522 (ld_plugin_get_input_section_alignment): New hook.
523 (ld_plugin_get_input_section_size): New hook.
524 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
525 and LDPT_GET_INPUT_SECTION_SIZE.
526 (ld_plugin_tv): Add tv_get_input_section_alignment and
527 tv_get_input_section_size.
529 2016-03-03 Evgenii Stepanov <eugenis@google.com>
531 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
533 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
536 * bfdlink.h (bfd_link_elf_stt_common): New enum.
537 (bfd_link_info): Add elf_stt_common.
539 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
544 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
546 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
547 Jiong Wang <jiong.wang@arm.com>
549 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
551 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
552 Janek van Oirschot <jvanoirs@synopsys.com>
554 * opcode/arc.h (arc_opcode arc_relax_opcodes)
555 (arc_num_relax_opcodes): Declare.
557 2016-02-09 Nick Clifton <nickc@redhat.com>
559 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
560 * opcode/nds32.h (nds32_r45map): Likewise.
561 (nds32_r54map): Likewise.
562 * opcode/visium.h (gen_reg_table): Likewise.
563 (fp_reg_table, cc_table, opcode_table): Likewise.
565 2016-02-09 Alan Modra <amodra@gmail.com>
568 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
570 2016-02-04 Nick Clifton <nickc@redhat.com>
573 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
574 (RRUX): Synthesise using case 2 rather than 7.
576 2016-01-19 John Baldwin <jhb@FreeBSD.org>
578 * elf/common.h (NT_FREEBSD_THRMISC): Define.
579 (NT_FREEBSD_PROCSTAT_PROC): Define.
580 (NT_FREEBSD_PROCSTAT_FILES): Define.
581 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
582 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
583 (NT_FREEBSD_PROCSTAT_UMASK): Define.
584 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
585 (NT_FREEBSD_PROCSTAT_OSREL): Define.
586 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
587 (NT_FREEBSD_PROCSTAT_AUXV): Define.
589 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
590 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
592 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
593 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
594 (ARC_TLS_LE_32): Fixed formula.
595 (ARC_TLS_GD_LD): Use new special function.
596 * opcode/arc-func.h: Changed all the replacement
597 functions to clear the patching bits before doing an or it with the value
600 2016-01-18 Nick Clifton <nickc@redhat.com>
603 * coff/internal.h (internal_syment): Use int to hold section
605 (N_UNDEF): Cast to int not short.
611 2016-01-11 Nick Clifton <nickc@redhat.com>
613 Import this change from GCC mainline:
615 2016-01-07 Mike Frysinger <vapier@gentoo.org>
617 * longlong.h: Change !__SHMEDIA__ to
618 (!defined (__SHMEDIA__) || !__SHMEDIA__).
619 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
621 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
623 * opcode/mips.h: Add a summary of MIPS16 operand codes.
625 2016-01-05 Mike Frysinger <vapier@gentoo.org>
627 * libiberty.h (dupargv): Change arg to char * const *.
628 (writeargv, countargv): Likewise.
630 2016-01-01 Alan Modra <amodra@gmail.com>
632 Update year range in copyright notice of all files.
634 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
635 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
636 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
637 som/ChangeLog-1015, and vms/ChangeLog-1015
639 Copyright (C) 2016 Free Software Foundation, Inc.
641 Copying and distribution of this file, with or without modification,
642 are permitted in any medium without royalty provided the copyright
643 notice and this notice are preserved.
649 version-control: never