include: new header ctf.h: file format description
[deliverable/binutils-gdb.git] / include / ChangeLog
1 2019-05-28 Nick Alcock <nick.alcock@oracle.com>
2
3 * ctf.h: New file.
4
5 2019-05-24 Szabolcs Nagy <szabolcs.nagy@arm.com>
6
7 * elf/aarch64.h (DT_AARCH64_VARIANT_PCS): Define.
8 (STO_AARCH64_VARIANT_PCS): Define.
9
10 2019-05-24 Alan Modra <amodra@gmail.com>
11
12 * elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC),
13 (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30),
14 (R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34),
15 (R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
16 (R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
17 (R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
18 (R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
19 (R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
20 (R_PPC64_D28, R_PPC64_PCREL28): Define.
21
22 2019-05-24 Peter Bergner <bergner@linux.ibm.com>
23 Alan Modra <amodra@gmail.com>
24
25 * dis-asm.h (WIDE_OUTPUT): Define.
26 * opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare.
27 (PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX),
28 (PPC_PREFIX_P, PPC_PREFIX_SEG): Define.
29
30 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
31
32 * elf/bpf.h: New file.
33
34 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
35
36 * elf/arm.h (Tag_MVE_arch): Define new enum value.
37 * opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
38
39 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
40
41 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
42 operand.
43
44 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
45
46 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
47 iclass.
48
49 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
50
51 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
52
53 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
54
55 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
56 iclass.
57
58 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
59
60 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
61 operand.
62 (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
63
64 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
65
66 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
67
68 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
69
70 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
71
72 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
73
74 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
75
76 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
77
78 * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
79
80 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
81
82 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
83
84 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
85
86 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
87
88 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
89
90 * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
91
92 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
93
94 * opcode/aarch64.h (AARCH64_FEATURE_SVE2
95 AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
96 AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
97 feature macros.
98
99 2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
100 Faraz Shahbazker <fshahbazker@wavecomp.com>
101
102 * opcode/mips.h (ASE_EVA_R6): New macro.
103 (M_LLWPE_AB, M_SCWPE_AB): New enum values.
104
105 2019-05-01 Sudakshina Das <sudi.das@arm.com>
106
107 * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
108 (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
109
110 2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
111 Faraz Shahbazker <fshahbazker@wavecomp.com>
112
113 * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
114 (M_SCWP_AB, M_SCDP_AB): Likewise.
115
116 2019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
117
118 * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
119
120 2019-04-15 Sudakshina Das <sudi.das@arm.com>
121
122 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
123
124 2019-04-15 Sudakshina Das <sudi.das@arm.com>
125
126 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
127
128 2019-04-15 Sudakshina Das <sudi.das@arm.com>
129
130 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
131
132 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
133
134 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
135 (MAX_TAG_CPU_ARCH): Set value to above macro.
136 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
137 (ARM_AEXT_V8_1M_MAIN): Likewise.
138 (ARM_AEXT2_V8_1M_MAIN): Likewise.
139 (ARM_ARCH_V8_1M_MAIN): Likewise.
140
141 2019-04-11 Sudakshina Das <sudi.das@arm.com>
142
143 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
144
145 2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
146
147 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
148
149 2019-04-07 Alan Modra <amodra@gmail.com>
150
151 Merge from gcc.
152 2019-04-03 Vineet Gupta <vgupta@synopsys.com>
153 PR89877
154 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
155 (sub_ddmmss): Likewise.
156
157 2019-04-06 H.J. Lu <hongjiu.lu@intel.com>
158
159 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
160
161 2019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
162
163 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
164 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
165 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
166 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
167 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
168 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
169 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
170 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
171
172 2019-03-28 Alan Modra <amodra@gmail.com>
173
174 PR 24390
175 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
176
177 2019-03-25 Tamar Christina <tamar.christina@arm.com>
178
179 * dis-asm.h (struct disassemble_info): Add stop_offset.
180
181 2019-03-13 Sudakshina Das <sudi.das@arm.com>
182
183 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
184
185 2019-03-13 Sudakshina Das <sudi.das@arm.com>
186 Szabolcs Nagy <szabolcs.nagy@arm.com>
187
188 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
189
190 2019-03-13 Sudakshina Das <sudi.das@arm.com>
191
192 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
193 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
194 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
195
196 2019-02-20 Alan Hayward <alan.hayward@arm.com>
197
198 * elf/common.h (NT_ARM_PAC_MASK): Add define.
199
200 2019-02-15 Saagar Jha <saagar@saagarjha.com>
201
202 * mach-o/loader.h: Use new OS names in comments.
203
204 2019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
205
206 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
207 (splay_tree_delete_value_fn): Likewise.
208
209 2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
210
211 * opcode/s390.h (enum s390_opcode_cpu_val): Add
212 S390_OPCODE_ARCH13.
213
214 2019-01-25 Sudakshina Das <sudi.das@arm.com>
215 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
216
217 * opcode/aarch64.h (enum aarch64_opnd): Remove
218 AARCH64_OPND_ADDR_SIMPLE_2.
219 (enum aarch64_insn_class): Remove ldstgv_indexed.
220
221 2019-01-22 Tom Tromey <tom@tromey.com>
222
223 * coff/ecoff.h: Include coff/sym.h.
224
225 2018-06-24 Nick Clifton <nickc@redhat.com>
226
227 2.32 branch created.
228
229 2019-01-16 Kito Cheng <kito@andestech.com>
230
231 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
232 (Tag_RISCV_arch): Likewise.
233 (Tag_RISCV_priv_spec): Likewise.
234 (Tag_RISCV_priv_spec_minor): Likewise.
235 (Tag_RISCV_priv_spec_revision): Likewise.
236 (Tag_RISCV_unaligned_access): Likewise.
237 (Tag_RISCV_stack_align): Likewise.
238
239 2019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
240
241 * dis-asm.h: include <string.h>
242
243 2019-01-10 Nick Clifton <nickc@redhat.com>
244
245 * Merge from GCC:
246 2018-12-22 Jason Merrill <jason@redhat.com>
247
248 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
249 ARM, HP, and EDG demangling styles.
250
251 2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
252
253 Merge from GCC:
254 PR other/16615
255
256 * libiberty.h: Mechanically replace "can not" with "cannot".
257 * plugin-api.h: Likewise.
258
259 2018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
260
261 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
262 (E_FLAG_RX_V3): New RXv3 type.
263 * opcode/rx.h (RX_Size): Add double size.
264 (RX_Operand_Type): Add double FPU registers.
265 (RX_Opcode_ID): Add new instuctions.
266
267 2019-01-01 Alan Modra <amodra@gmail.com>
268
269 Update year range in copyright notice of all files.
270
271 For older changes see ChangeLog-2018
272 \f
273 Copyright (C) 2019 Free Software Foundation, Inc.
274
275 Copying and distribution of this file, with or without modification,
276 are permitted in any medium without royalty provided the copyright
277 notice and this notice are preserved.
278
279 Local Variables:
280 mode: change-log
281 left-margin: 8
282 fill-column: 74
283 version-control: never
284 End:
This page took 0.037446 seconds and 5 git commands to generate.