include/ChangeLog-2018

   1 2018-12-28  Alan Modra  <amodra@gmail.com>
   2
   3         PR 24028
   4         * opcode/ppc.h (PPC_INT_FMT): Delete.
   5
   6 2018-12-14  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         PR ld/23900
   9         * elf/common.h (PT_GNU_PROPERTY): New.
  10         (GNU_PROPERTY_X86_UINT32_VALID): Removed.
  11
  12 2018-12-11  Nick Clifton  <nickc@redhat.com>
  13
  14         PR 88409
  15         * demangle.h (DEMANGLE_RECURSION_LIMIT): Increase to 2048.
  16
  17 2018-12-07  H.J. Lu  <hongjiu.lu@intel.com>
  18
  19         * bfdlink.h (bfd_link_info): Add has_map_file.
  20
  21 2018-12-07  Nick Clifton  <nickc@redhat.com>
  22
  23         * demangle.h (DMGL_NO_RECURSE_LIMIT): Define.
  24         (DEMANGLE_RECURSION_LIMIT): Define
  25
  26 2018-12-06  Alan Modra  <amodra@gmail.com>
  27
  28         * opcode/ppc.h (E_OPCODE_MASK, E_LI_MASK, E_LI_INSN): Define.
  29
  30 2018-12-06  Andrew Burgess  <andrew.burgess@embecosm.com>
  31
  32         * dis-asm.h (riscv_symbol_is_valid): Declare.
  33         * opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define.
  34         (RISCV_FAKE_LABEL_CHAR): Define.
  35
  36 2018-12-03  Kito Cheng  <kito@andestech.com>
  37
  38         * opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to
  39         unsigned.
  40
  41 2018-11-27  Jim Wilson  <jimw@sifive.com>
  42
  43         * opcode/riscv.h (OP_MASK_CFUNCT6, OP_SH_CFUNCT6): New.
  44         (OP_MASK_CFUNCT2, OP_SH_CFUNCT2): New.
  45
  46 2018-11-13  Thomas Preud'homme  <thomas.preudhomme@arm.com>
  47
  48         * opcode/arm.h (ARM_AEXT_V6M_ONLY): Merge into its use in ARM_AEXT_V6M.
  49         (ARM_ARCH_V6M_ONLY): Remove.
  50         (ARM_EXT_V1, ARM_EXT_V2, ARM_EXT_V2S, ARM_EXT_V3, ARM_EXT_V3M,
  51         ARM_EXT_V4, ARM_EXT_V4T, ARM_EXT_V5, ARM_EXT_V5T, ARM_EXT_V5ExP,
  52         ARM_EXT_V5E, ARM_EXT_V5J, ARM_EXT_V6, ARM_EXT_V6K, ARM_EXT_V8,
  53         ARM_EXT_V6T2, ARM_EXT_DIV, ARM_EXT_V5E_NOTM, ARM_EXT_V6_NOTM,
  54         ARM_EXT_V7, ARM_EXT_V7A, ARM_EXT_V7R, ARM_EXT_V7M, ARM_EXT_V6M,
  55         ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR, ARM_EXT_V6_DSP, ARM_EXT_MP,
  56         ARM_EXT_SEC, ARM_EXT_OS, ARM_EXT_ADIV, ARM_EXT_VIRT, ARM_EXT2_PAN,
  57         ARM_EXT2_V8_2A, ARM_EXT2_V8M, ARM_EXT2_ATOMICS, ARM_EXT2_V6T2_V8M,
  58         ARM_EXT2_FP16_INST, ARM_EXT2_V8M_MAIN, ARM_EXT2_RAS, ARM_EXT2_V8_3A,
  59         ARM_EXT2_V8A, ARM_EXT2_V8_4A, ARM_EXT2_FP16_FML, ARM_EXT2_V8_5A,
  60         ARM_EXT2_SB, ARM_EXT2_PREDRES, ARM_CEXT_XSCALE, ARM_CEXT_MAVERICK,
  61         ARM_CEXT_IWMMXT, ARM_CEXT_IWMMXT2, FPU_ENDIAN_PURE, FPU_ENDIAN_BIG,
  62         FPU_FPA_EXT_V1, FPU_FPA_EXT_V2, FPU_MAVERICK, FPU_VFP_EXT_V1xD,
  63         FPU_VFP_EXT_V1, FPU_VFP_EXT_V2, FPU_VFP_EXT_V3xD, FPU_VFP_EXT_V3,
  64         FPU_NEON_EXT_V1, FPU_VFP_EXT_D32, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
  65         FPU_VFP_EXT_FMA, FPU_VFP_EXT_ARMV8, FPU_NEON_EXT_ARMV8,
  66         FPU_CRYPTO_EXT_ARMV8, CRC_EXT_ARMV8, FPU_VFP_EXT_ARMV8xD,
  67         FPU_NEON_EXT_RDMA, FPU_NEON_EXT_DOTPROD, ARM_AEXT_V1, ARM_AEXT_V2,
  68         ARM_AEXT_V2S, ARM_AEXT_V3, ARM_AEXT_V3M, ARM_AEXT_V4xM, ARM_AEXT_V4,
  69         ARM_AEXT_V4TxM, ARM_AEXT_V4T, ARM_AEXT_V5xM, ARM_AEXT_V5,
  70         ARM_AEXT_V5TxM, ARM_AEXT_V5T, ARM_AEXT_V5TExP, ARM_AEXT_V5TE,
  71         ARM_AEXT_V5TEJ, ARM_AEXT_V6, ARM_AEXT_V6K, ARM_AEXT_V6Z, ARM_AEXT_V6KZ,
  72         ARM_AEXT_V6T2, ARM_AEXT_V6KT2, ARM_AEXT_V6ZT2, ARM_AEXT_V6KZT2,
  73         ARM_AEXT_V7_ARM, ARM_AEXT_V7A, ARM_AEXT_V7VE, ARM_AEXT_V7R,
  74         ARM_AEXT_NOTM, ARM_AEXT_V6M_ONLY, ARM_AEXT_V6M, ARM_AEXT_V6SM,
  75         ARM_AEXT_V7M, ARM_AEXT_V7, ARM_AEXT_V7EM, ARM_AEXT_V8A, ARM_AEXT2_V8A,
  76         ARM_AEXT2_V8_1A, ARM_AEXT2_V8_2A, ARM_AEXT2_V8_3A, ARM_AEXT2_V8_4A,
  77         ARM_AEXT2_V8_5A, ARM_AEXT_V8M_BASE, ARM_AEXT_V8M_MAIN,
  78         ARM_AEXT_V8M_MAIN_DSP, ARM_AEXT2_V8M, ARM_AEXT2_V8M_BASE,
  79         ARM_AEXT2_V8M_MAIN, ARM_AEXT2_V8M_MAIN_DSP, ARM_AEXT_V8R,
  80         ARM_AEXT2_V8R, FPU_VFP_V1xD, FPU_VFP_V1, FPU_VFP_V2, FPU_VFP_V3D16,
  81         FPU_VFP_V3, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4, FPU_VFP_V4_SP_D16,
  82         FPU_VFP_V5D16, FPU_VFP_ARMV8, FPU_NEON_ARMV8, FPU_CRYPTO_ARMV8,
  83         FPU_VFP_HARD, FPU_FPA, FPU_ARCH_VFP, FPU_ARCH_FPE, FPU_ARCH_FPA,
  84         FPU_ARCH_VFP_V1xD, FPU_ARCH_VFP_V1, FPU_ARCH_VFP_V2,
  85         FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_FP16,
  86         FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_NEON_V1, FPU_ARCH_VFP_V3_PLUS_NEON_V1,
  87         FPU_ARCH_NEON_FP16, FPU_ARCH_VFP_HARD, FPU_ARCH_VFP_V4,
  88         FPU_ARCH_VFP_V4D16, FPU_ARCH_VFP_V4_SP_D16, FPU_ARCH_VFP_V5D16,
  89         FPU_ARCH_VFP_V5_SP_D16, FPU_ARCH_NEON_VFP_V4, FPU_ARCH_VFP_ARMV8,
  90         FPU_ARCH_NEON_VFP_ARMV8, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
  91         FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_DOTPROD, ARCH_CRC_ARMV8,
  92         FPU_ARCH_NEON_VFP_ARMV8_1, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1,
  93         FPU_ARCH_DOTPROD_NEON_VFP_ARMV8, ARM_ARCH_V1, ARM_ARCH_V2,
  94         ARM_ARCH_V2S, ARM_ARCH_V3, ARM_ARCH_V3M, ARM_ARCH_V4xM, ARM_ARCH_V4,
  95         ARM_ARCH_V4TxM, ARM_ARCH_V4T, ARM_ARCH_V5xM, ARM_ARCH_V5,
  96         ARM_ARCH_V5TxM, ARM_ARCH_V5T, ARM_ARCH_V5TExP, ARM_ARCH_V5TE,
  97         ARM_ARCH_V5TEJ, ARM_ARCH_V6, ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6KZ,
  98         ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, ARM_ARCH_V6KZT2,
  99         ARM_ARCH_V6M, ARM_ARCH_V6SM, ARM_ARCH_V7, ARM_ARCH_V7A, ARM_ARCH_V7VE,
 100         ARM_ARCH_V7R, ARM_ARCH_V7M, ARM_ARCH_V7EM, ARM_ARCH_V8A,
 101         ARM_ARCH_V8A_CRC, ARM_ARCH_V8_1A, ARM_ARCH_V8_2A, ARM_ARCH_V8_3A,
 102         ARM_ARCH_V8_4A, ARM_ARCH_V8_5A, ARM_ARCH_V8M_BASE, ARM_ARCH_V8M_MAIN,
 103         ARM_ARCH_V8M_MAIN_DSP, ARM_ARCH_V8R): Reindent.
 104
 105 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 106
 107         * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMPLE_2.
 108         (aarch64_insn_class): Add ldstgv_indexed.
 109
 110 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 111
 112         * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM11
 113         and AARCH64_OPND_ADDR_SIMM13.
 114         (aarch64_opnd_qualifier): Add new AARCH64_OPND_QLF_imm_tag.
 115
 116 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 117
 118         * opcode/aarch64.h (aarch64_opnd): Add
 119         AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
 120
 121 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 122
 123         * opcode/aarch64.h (AARCH64_FEATURE_MEMTAG): New.
 124
 125 2018-11-07  Roman Bolshakov <r.bolshakov@yadro.com>
 126             Saagar Jha  <saagar@saagarjha.com>
 127
 128         * mach-o/external.h (mach_o_nversion_min_command_external): Rename
 129         reserved to sdk.
 130         (mach_o_note_command_external): New.
 131         (mach_o_build_version_command_external): New.
 132         * mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
 133         (BFD_MACH_O_LC_NOTE): Define.
 134
 135 2018-11-06  Romain Margheriti  <lilrom13@gmail.com>
 136
 137         PR 23742
 138         * mach-o/loader.h: Add BFD_MACH_O_LC_BUILD_VERSION.
 139
 140 2018-11-06  Sudakshina Das  <sudi.das@arm.com>
 141
 142         * opcode/arm.h (ARM_ARCH_V8_5A): Move ARM_EXT2_PREDRES and
 143         ARM_EXT2_SB to ...
 144         (ARM_AEXT2_V8_5A): Here.
 145
 146 2018-10-26  John Baldwin  <jhb@FreeBSD.org>
 147
 148         * elf/common.h (AT_FREEBSD_HWCAP2): Define.
 149
 150 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 151
 152         * opcode/aarch64.h (AARCH64_FEATURE_SSBS): New.
 153         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SSBS by default.
 154
 155 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 156
 157         * opcode/aarch64.h (AARCH64_FEATURE_SCXTNUM): New.
 158         (AARCH64_FEATURE_ID_PFR2): New.
 159         (AARCH64_ARCH_V8_5): Add both by default.
 160
 161 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 162
 163         * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
 164         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
 165         (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
 166         (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
 167         define HINT #imm values.
 168         (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
 169
 170 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 171
 172         * opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
 173
 174 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 175
 176         * opcode/aarch64.h (AARCH64_FEATURE_CVADP): New.
 177
 178 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 179
 180         * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
 181         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
 182         (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
 183         (aarch64_sys_regs_sr): Declare new table.
 184
 185 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 186
 187         * opcode/aarch64.h (AARCH64_FEATURE_SB): New.
 188         (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
 189
 190 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 191
 192         * opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
 193         (AARCH64_FEATURE_FRINTTS): New.
 194         (AARCH64_ARCH_V8_5): Add both by default.
 195
 196 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 197
 198         * opcode/aarch64.h (AARCH64_FEATURE_V8_5): New.
 199         (AARCH64_ARCH_V8_5): New.
 200
 201 2018-10-08  Alan Modra  <amodra@gmail.com>
 202
 203         * bfdlink.h (struct bfd_link_info): Add load_phdrs field.
 204
 205 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 206
 207         * opcode/arm.h (ARM_EXT2_PREDRES): New.
 208         (ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
 209
 210 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 211
 212         * opcode/arm.h (ARM_EXT2_SB): New.
 213         (ARM_ARCH_V8_5A): Add ARM_EXT2_SB by default.
 214
 215 2018-10-05  Sudakshina Das  <sudi.das@arm.com>
 216
 217         * opcode/arm.h (ARM_EXT2_V8_5A): New.
 218         (ARM_AEXT2_V8_5A, ARM_ARCH_V8_5A): New.
 219
 220 2018-10-05  Richard Henderson  <rth@twiddle.net>
 221
 222         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21,
 223         R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21,
 224         R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13,
 225         R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13,
 226         R_OR1K_SLO13, R_OR1K_PLTA26.
 227
 228 2018-10-05  Richard Henderson  <rth@twiddle.net>
 229
 230         * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_AHI16,
 231         R_OR1K_GOTOFF_AHI16, R_OR1K_TLS_IE_AHI16, R_OR1K_TLS_LE_AHI16,
 232         R_OR1K_SLO16, R_OR1K_GOTOFF_SLO16, R_OR1K_TLS_LE_SLO16.
 233
 234 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 235
 236         * opcode/aarch64.h (aarch64_inst): Remove.
 237         (enum err_type): Add ERR_VFI.
 238         (aarch64_is_destructive_by_operands): New.
 239         (init_insn_sequence): New.
 240         (aarch64_decode_insn): Remove param name.
 241
 242 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 243
 244         * opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
 245         more arguments.
 246
 247 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 248
 249         * opcode/aarch64.h (enum err_type): New.
 250         (aarch64_decode_insn): Use it.
 251
 252 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 253
 254         * opcode/aarch64.h (struct aarch64_instr_sequence): New.
 255         (aarch64_opcode_encode): Use it.
 256
 257 2018-10-03  Tamar Christina  <tamar.christina@arm.com>
 258
 259         * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
 260         extend flags field size.
 261         (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
 262
 263 2018-10-03  John Darrington <john@darrington.wattle.id.au>
 264
 265         * dis-asm.h (print_insn_s12z): New declaration.
 266
 267 2018-10-02  Palmer Dabbelt  <palmer@sifive.com>
 268
 269         * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
 270         (MASK_FENCE_TSO): Likewise.
 271
 272 2018-10-01  Cupertino Miranda <cmiranda@synopsys.com>
 273
 274         * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
 275
 276 2018-09-21  H.J. Lu  <hongjiu.lu@intel.com>
 277
 278         PR binutils/23694
 279         * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
 280         include zero size sections at start of PT_NOTE segment.
 281
 282 2018-09-20  Nelson Chu <nelson.chu1990@gmail.com>
 283
 284         * elf/nds32.h: Remove the unused target features.
 285         * dis-asm.h (disassemble_init_nds32): Declared.
 286         * elf/nds32.h (E_NDS32_NULL): Removed.
 287         (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
 288         * opcode/nds32.h: Ident.
 289         (N32_SUB6, INSN_LW): New macros.
 290         (enum n32_opcodes): Updated.
 291         * elf/nds32.h: Doc fixes.
 292         * elf/nds32.h: Add R_NDS32_LSI.
 293         * elf/nds32.h: Add new relocations for TLS.
 294
 295 2018-09-20  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
 296
 297         * elf/common.h (AT_SUN_HWCAP): Rename to ...
 298         (AT_SUN_CAP_HW1): ... this.  Retain old name for backward
 299         compatibility.
 300         (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
 301         (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
 302
 303 2018-09-05  Simon Marchi  <simon.marchi@ericsson.com>
 304
 305         * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
 306
 307 2018-08-31  Alan Modra  <amodra@gmail.com>
 308
 309         * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
 310         (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
 311         (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
 312         (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
 313
 314 2018-08-30  Kito Cheng  <kito@andestech.com>
 315
 316         * opcode/riscv.h (MAX_SUBSET_NUM): New.
 317         (riscv_opcode): Add xlen_requirement field and change type of
 318         subset.
 319
 320 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 321
 322         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
 323         * opcode/mips.h (CPU_XXX): New CPU_GS264E.
 324
 325 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 326
 327         * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
 328         * opcode/mips.h (CPU_XXX): New CPU_GS464E.
 329
 330 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 331
 332         * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
 333         E_MIPS_MACH_GS464.
 334         (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
 335         * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
 336         (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
 337         * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
 338
 339 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 340
 341         * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
 342         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
 343         * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
 344
 345 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 346
 347          * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
 348          (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
 349          * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
 350
 351 2018-08-29  Chenghua Xu  <paul.hua.gm@gmail.com>
 352
 353         * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
 354         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
 355         * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
 356
 357 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 358
 359         * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
 360         (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
 361         (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
 362         (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
 363         (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
 364         (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
 365         (GNU_PROPERTY_X86_UINT32_AND_LO): New.
 366         (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
 367         (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
 368         (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
 369         (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
 370         (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
 371         (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
 372         (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
 373         (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
 374         (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
 375         (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
 376         (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
 377         (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
 378         (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
 379         (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
 380         (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
 381         (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
 382         (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
 383         (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
 384         (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
 385         (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
 386         (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
 387         (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
 388         (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
 389         (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
 390         (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
 391         (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
 392         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
 393         (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
 394         (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
 395         (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
 396         (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
 397         (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
 398         (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
 399         (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
 400         (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
 401         (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
 402         (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
 403         (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
 404         (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
 405         (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
 406         (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
 407         (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
 408         (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
 409         (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New.  Defined to
 410         (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
 411         (GNU_PROPERTY_X86_ISA_1_USED): Defined to
 412         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
 413         (GNU_PROPERTY_X86_FEATURE_2_USED): New.  Defined to
 414         (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
 415
 416 2018-08-24  H.J. Lu  <hongjiu.lu@intel.com>
 417
 418         * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
 419
 420 2018-08-21  John Darrington  <john@darrington.wattle.id.au>
 421
 422         * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
 423
 424 2018-08-21  Alan Modra  <amodra@gmail.com>
 425
 426         * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
 427         Mention use of "extract" function to provide default value.
 428         (PPC_OPERAND_OPTIONAL_VALUE): Delete.
 429         (ppc_optional_operand_value): Rewrite to use extract function.
 430
 431 2018-08-18  John Darrington  <john@darrington.wattle.id.au>
 432
 433         * opcode/s12z.h: New file.
 434
 435 2018-08-09  Richard Earnshaw  <rearnsha@arm.com>
 436
 437         * elf/arm.h: Updated comments for e_flags definitions.
 438
 439 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 440
 441         * elf/arc.h (Tag_ARC_ATR_version): New tag.
 442
 443 2018-08-06  Claudiu Zissulescu  <claziss@synopsys.com>
 444
 445         * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
 446
 447 2018-08-01  Richard Earnshaw  <rearnsha@arm.com>
 448
 449         Copy over from GCC
 450         2018-07-26  Martin Liska  <mliska@suse.cz>
 451
 452         PR lto/86548
 453         * libiberty.h (make_temp_file_with_prefix): New function.
 454
 455 2018-07-30  Jim Wilson  <jimw@sifive.com>
 456
 457         * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
 458         (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
 459         (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
 460
 461 2018-07-30  Andrew Jenner  <andrew@codesourcery.com>
 462
 463         * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
 464         * elf/csky.h: New file.
 465
 466 2018-07-27  Chenghua Xu  <paul.hua.gm@gmail.com>
 467             Maciej W. Rozycki  <macro@linux-mips.org>
 468
 469         * elf/mips.h (AFL_ASE_MASK): Correct typo.
 470
 471 2018-07-26  Alex Chadwick  <Alex.Chadwick@cl.cam.ac.uk>
 472
 473         * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
 474
 475 2018-07-26  Alan Modra  <amodra@gmail.com>
 476
 477         * elf/ppc64.h: Specify byte offset to local entry for values
 478         of two to six in STO_PPC64_LOCAL_MASK.  Clarify r2 return
 479         value for such functions when entering via global entry point.
 480         Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
 481
 482 2018-07-24  Alan Modra  <amodra@gmail.com>
 483
 484         PR 23430
 485         * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
 486
 487 2018-07-20  Chenghua Xu  <paul.hua.gm@gmail.com>
 488             Maciej W. Rozycki  <macro@mips.com>
 489
 490         * elf/mips.h (AFL_ASE_MMI): New macro.
 491         (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
 492         * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
 493
 494 2018-07-17  Maciej W. Rozycki  <macro@mips.com>
 495
 496         * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
 497
 498 2018-07-06  Alan Modra  <amodra@gmail.com>
 499
 500         * diagnostics.h: Comment on macro usage.
 501
 502 2018-07-05  Simon Marchi  <simon.marchi@polymtl.ca>
 503
 504         * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
 505         Define for clang.
 506
 507 2018-07-02  Maciej W. Rozycki  <macro@mips.com>
 508
 509         PR tdep/8282
 510         * dis-asm.h (disasm_option_arg_t): New typedef.
 511         (disasm_options_and_args_t): Likewise.
 512         (disasm_options_t): Add `arg' member, document members.
 513         (disassembler_options_mips): New prototype.
 514         (disassembler_options_arm, disassembler_options_powerpc)
 515         (disassembler_options_s390): Update prototypes.
 516
 517 2018-06-29  Tamar Christina  <tamar.christina@arm.com>
 518
 519         PR binutils/23192
 520         *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
 521
 522 2018-06-26  Alan Modra  <amodra@gmail.com>
 523
 524         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
 525
 526 2018-06-24  Nick Clifton  <nickc@redhat.com>
 527
 528         2.31 branch created.
 529
 530 2018-06-21  Alan Hayward  <alan.hayward@arm.com>
 531
 532         * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
 533         for non SHT_NOBITS.
 534
 535 2018-06-19  Simon Marchi  <simon.marchi@ericsson.com>
 536
 537         Sync with GCC
 538
 539         2018-05-24  Tom Rix  <trix@juniper.net>
 540
 541         * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
 542
 543         2017-11-20  Kito Cheng  <kito.cheng@gmail.com>
 544
 545         * longlong.h [__riscv] (__umulsidi3): Define.
 546         [__riscv] (umul_ppmm): Likewise.
 547         [__riscv] (__muluw3): Likewise.
 548
 549 2018-06-14  Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 550
 551         * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
 552         (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
 553         * opcode/mips.h: Document "+\" operand format.
 554         (ASE_GINV): New macro.
 555
 556 2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
 557             Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
 558
 559         * elf/mips.h (AFL_ASE_CRC): New macro.
 560         (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
 561         * opcode/mips.h (ASE_CRC): New macro.
 562         * opcode/mips.h (ASE_CRC64): Likewise.
 563
 564 2018-06-04  Max Filippov  <jcmvbkbc@gmail.com>
 565
 566         * elf/xtensa.h (xtensa_read_table_entries)
 567         (xtensa_compute_fill_extra_space): New declarations.
 568
 569 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 570
 571         * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
 572         define for GCC.
 573
 574 2018-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 575
 576         * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
 577         (DIAGNOSTIC_STRINGIFY): Likewise.
 578         (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
 579         (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
 580         (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
 581         (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
 582         (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
 583         (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
 584
 585 2018-06-01  H.J. Lu  <hongjiu.lu@intel.com>
 586
 587         * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
 588
 589 2018-05-28  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 590
 591         * splay-tree.h (splay_tree_compare_strings,
 592         splay_tree_delete_pointers): Declare new utility functions.
 593
 594 2018-05-21  Peter Bergner  <bergner@vnet.ibm.com.com>
 595
 596         * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
 597
 598 2018-05-18  Kito Cheng  <kito.cheng@gmail.com>
 599
 600         * elf/riscv.h (EF_RISCV_RVE): New define.
 601
 602 2018-05-18  John Darrington  <john@darrington.wattle.id.au>
 603
 604         * elf/s12z.h: New header.
 605
 606 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 607
 608         PR binutils/21446
 609         * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
 610
 611 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 612
 613         PR binutils/21446
 614         * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
 615         (aarch64_print_operand): Support notes.
 616
 617 2018-05-15  Tamar Christina  <tamar.christina@arm.com>
 618
 619         PR binutils/21446
 620         * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
 621         (aarch64_decode_insn): Accept error struct.
 622
 623 2018-05-15  Francois H. Theron  <francois.theron@netronome.com>
 624
 625         * opcode/nfp.h: Use uint64_t instead of bfd_vma.
 626
 627 2018-05-10  John Darrington  <john@darrington.wattle.id.au>
 628
 629         * elf/common.h (EM_S12Z): New macro.
 630
 631 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 632
 633         * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
 634         Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
 635         (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
 636         MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
 637
 638 2018-05-08  Jim Wilson  <jimw@sifive.com>
 639
 640         * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
 641         (MATCH_C_SRAI64, MASK_C_SRAI64): New.
 642         (MATCH_C_SLLI64, MASK_C_SLLI64): New.
 643
 644 2018-05-07  Peter Bergner  <bergner@vnet.ibm.com.com>
 645
 646         * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
 647         (vle_num_opcodes): Likewise.
 648         (spe2_num_opcodes): Likewise.
 649
 650 2018-05-04  Alan Modra  <amodra@gmail.com>
 651
 652         * ansidecl.h: Import from gcc.
 653         * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
 654         to s_name.
 655         (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
 656
 657 2018-04-30  Francois H. Theron <francois.theron@netronome.com>
 658
 659         * dis-asm.h: Added print_nfp_disassembler_options prototype.
 660         * elf/common.h: Added EM_NFP, officially assigned. See Google Group
 661         Generic System V Application Binary Interface.
 662         * elf/nfp.h: New, for NFP support.
 663         * opcode/nfp.h: New, for NFP support.
 664
 665 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 666         Mickaël Guêné  <mickael.guene@st.com>
 667
 668         * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
 669         R_ARM_TLS_IE32_FDPIC.
 670
 671 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 672         Mickaël Guêné  <mickael.guene@st.com>
 673
 674         * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
 675         (R_ARM_FUNCDESC)
 676         (R_ARM_FUNCDESC_VALUE): Define new relocations.
 677
 678 2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
 679         Mickaël Guêné  <mickael.guene@st.com>
 680
 681         * elf/arm.h (EF_ARM_FDPIC): New.
 682
 683 2018-04-18  Alan Modra  <amodra@gmail.com>
 684
 685         * coff/mipspe.h: Delete.
 686
 687 2018-04-18  Alan Modra  <amodra@gmail.com>
 688
 689         * aout/dynix3.h: Delete.
 690
 691 2018-04-17 Andrew Sadek  <andrew.sadek.se@gmail.com>
 692
 693         Microblaze Target: PIC data text relative
 694
 695         * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
 696         * elf/microblaze.h (Add 3 new relocations):
 697         R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
 698         and R_MICROBLAZE_TEXTREL_32_LO for relax function.
 699
 700 2018-04-17  Alan Modra  <amodra@gmail.com>
 701
 702         * elf/i370.h: Revert removal.
 703         * elf/i860.h: Likewise.
 704         * elf/i960.h: Likewise.
 705
 706 2018-04-16  Alan Modra  <amodra@gmail.com>
 707
 708         * coff/sparc.h: Delete.
 709
 710 2018-04-16  Alan Modra  <amodra@gmail.com>
 711
 712         * aout/host.h: Remove m68k-aout and m68k-coff support.
 713         * aout/hp300hpux.h: Delete.
 714         * coff/apollo.h: Delete.
 715         * coff/aux-coff.h: Delete.
 716         * coff/m68k.h: Delete.
 717
 718 2018-04-16  Alan Modra  <amodra@gmail.com>
 719
 720         * dis-asm.h: Remove sh5 and sh64 support.
 721
 722 2018-04-16  Alan Modra  <amodra@gmail.com>
 723
 724         * coff/internal.h: Remove w65 support.
 725         * coff/w65.h: Delete.
 726
 727 2018-04-16  Alan Modra  <amodra@gmail.com>
 728
 729         * coff/we32k.h: Delete.
 730
 731 2018-04-16  Alan Modra  <amodra@gmail.com>
 732
 733         * coff/internal.h: Remove m88k support.
 734         * coff/m88k.h: Delete.
 735         * opcode/m88k.h: Delete.
 736
 737 2018-04-16  Alan Modra  <amodra@gmail.com>
 738
 739         * elf/i370.h: Delete.
 740         * opcode/i370.h: Delete.
 741
 742 2018-04-16  Alan Modra  <amodra@gmail.com>
 743
 744         * coff/h8500.h: Delete.
 745         * coff/internal.h: Remove h8500 support.
 746
 747 2018-04-16  Alan Modra  <amodra@gmail.com>
 748
 749         * coff/h8300.h: Delete.
 750
 751 2018-04-16  Alan Modra  <amodra@gmail.com>
 752
 753         * ieee.h: Delete.
 754
 755 2018-04-16  Alan Modra  <amodra@gmail.com>
 756
 757         * aout/host.h: Remove newsos3 support.
 758
 759 2018-04-16  Alan Modra  <amodra@gmail.com>
 760
 761         * nlm/ChangeLog-9315: Delete.
 762         * nlm/alpha-ext.h: Delete.
 763         * nlm/common.h: Delete.
 764         * nlm/external.h: Delete.
 765         * nlm/i386-ext.h: Delete.
 766         * nlm/internal.h: Delete.
 767         * nlm/ppc-ext.h: Delete.
 768         * nlm/sparc32-ext.h: Delete.
 769
 770 2018-04-16  Alan Modra  <amodra@gmail.com>
 771
 772         * opcode/tahoe.h: Delete.
 773
 774 2018-04-11  Alan Modra  <amodra@gmail.com>
 775
 776         * aout/adobe.h: Delete.
 777         * aout/reloc.h: Delete.
 778         * coff/i860.h: Delete.
 779         * coff/i960.h: Delete.
 780         * elf/i860.h: Delete.
 781         * elf/i960.h: Delete.
 782         * opcode/i860.h: Delete.
 783         * opcode/i960.h: Delete.
 784         * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
 785         * aout/ar.h (ARMAGB): Remove.
 786         * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
 787         union internal_auxent): Remove i960 support.
 788
 789 2018-04-09  Alan Modra  <amodra@gmail.com>
 790
 791         * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
 792         * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
 793
 794 2018-03-28  Renlin Li  <renlin.li@arm.com>
 795
 796         PR ld/22970
 797         * elf/aarch64.h: Add relocation number for
 798         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
 799         R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
 800         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
 801         R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
 802         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
 803         R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
 804         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
 805         R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
 806
 807 2018-03-28  Nick Clifton  <nickc@redhat.com>
 808
 809         PR 22988
 810         * opcode/aarch64.h (enum aarch64_opnd): Add
 811         AARCH64_OPND_SVE_ADDR_R.
 812
 813 2018-03-21  H.J. Lu  <hongjiu.lu@intel.com>
 814
 815         * elf/common.h (DF_1_KMOD): New.
 816         (DF_1_WEAKFILTER): Likewise.
 817         (DF_1_NOCOMMON): Likewise.
 818
 819 2018-03-14  Kito Cheng  <kito.cheng@gmail.com>
 820
 821         * opcode/riscv.h (OP_MASK_FUNCT3): New.
 822         (OP_SH_FUNCT3): Likewise.
 823         (OP_MASK_FUNCT7): Likewise.
 824         (OP_SH_FUNCT7): Likewise.
 825         (OP_MASK_OP2): Likewise.
 826         (OP_SH_OP2): Likewise.
 827         (OP_MASK_CFUNCT4): Likewise.
 828         (OP_SH_CFUNCT4): Likewise.
 829         (OP_MASK_CFUNCT3): Likewise.
 830         (OP_SH_CFUNCT3): Likewise.
 831         (riscv_insn_types): Likewise.
 832
 833 2018-03-13  Nick Clifton  <nickc@redhat.com>
 834
 835         PR 22113
 836         * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
 837         field.
 838
 839 2018-03-08  H.J. Lu  <hongjiu.lu@intel.com>
 840
 841         * opcode/i386 (OLDGCC_COMPAT): Removed.
 842
 843 2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 844
 845         * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
 846
 847 2018-02-20  Maciej W. Rozycki  <macro@mips.com>
 848
 849         * opcode/mips.h: Remove `M' operand code.
 850
 851 2018-02-12  Zebediah Figura  <z.figura12@gmail.com>
 852
 853         * coff/msdos.h: New header.
 854         * coff/pe.h: Move common defines to msdos.h.
 855         * coff/powerpc.h: Likewise.
 856
 857 2018-01-13  Nick Clifton  <nickc@redhat.com>
 858
 859         2.30 branch created.
 860
 861 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
 862
 863         PR ld/22393
 864         * bfdlink.h (bfd_link_info): Add separate_code.
 865
 866 2018-01-04  Jim Wilson  <jimw@sifive.com>
 867
 868         * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL.  Rename
 869         DECLARE_CSR entry.  Add alias to map sbadaddr to CSR_STVAL.
 870         (CSR_MBADADDR): Rename to CSR_MTVAL.  Rename DECLARE_CSR entry.
 871         Add alias to map mbadaddr to CSR_MTVAL.
 872
 873 2018-01-03  Alan Modra  <amodra@gmail.com>
 874
 875         Update year range in copyright notice of all files.
 876
 877 For older changes see ChangeLog-2017
 878 \f
 879 Copyright (C) 2018 Free Software Foundation, Inc.
 880
 881 Copying and distribution of this file, with or without modification,
 882 are permitted in any medium without royalty provided the copyright
 883 notice and this notice are preserved.
 884
 885 Local Variables:
 886 mode: change-log
 887 left-margin: 8
 888 fill-column: 74
 889 version-control: never
 890 End: