include/elf/mips.h

   1 /* MIPS ELF support for BFD.
   2    Copyright (C) 1993-2018 Free Software Foundation, Inc.
   3
   4    By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
   5    information in the System V Application Binary Interface, MIPS
   6    Processor Supplement.
   7
   8    This file is part of BFD, the Binary File Descriptor library.
   9
  10    This program is free software; you can redistribute it and/or modify
  11    it under the terms of the GNU General Public License as published by
  12    the Free Software Foundation; either version 3 of the License, or
  13    (at your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful,
  16    but WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18    GNU General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  23    MA 02110-1301, USA.  */
  24
  25 /* This file holds definitions specific to the MIPS ELF ABI.  Note
  26    that most of this is not actually implemented by BFD.  */
  27
  28 #ifndef _ELF_MIPS_H
  29 #define _ELF_MIPS_H
  30
  31 #include "elf/reloc-macros.h"
  32
  33 #ifdef __cplusplus
  34 extern "C" {
  35 #endif
  36
  37 /* Relocation types.  */
  38 START_RELOC_NUMBERS (elf_mips_reloc_type)
  39   RELOC_NUMBER (R_MIPS_NONE, 0)
  40   RELOC_NUMBER (R_MIPS_16, 1)
  41   RELOC_NUMBER (R_MIPS_32, 2)           /* In Elf 64: alias R_MIPS_ADD */
  42   RELOC_NUMBER (R_MIPS_REL32, 3)        /* In Elf 64: alias R_MIPS_REL */
  43   RELOC_NUMBER (R_MIPS_26, 4)
  44   RELOC_NUMBER (R_MIPS_HI16, 5)
  45   RELOC_NUMBER (R_MIPS_LO16, 6)
  46   RELOC_NUMBER (R_MIPS_GPREL16, 7)      /* In Elf 64: alias R_MIPS_GPREL */
  47   RELOC_NUMBER (R_MIPS_LITERAL, 8)
  48   RELOC_NUMBER (R_MIPS_GOT16, 9)        /* In Elf 64: alias R_MIPS_GOT */
  49   RELOC_NUMBER (R_MIPS_PC16, 10)
  50   RELOC_NUMBER (R_MIPS_CALL16, 11)      /* In Elf 64: alias R_MIPS_CALL */
  51   RELOC_NUMBER (R_MIPS_GPREL32, 12)
  52   /* The remaining relocs are defined on Irix, although they are not
  53      in the MIPS ELF ABI.  */
  54   RELOC_NUMBER (R_MIPS_UNUSED1, 13)
  55   RELOC_NUMBER (R_MIPS_UNUSED2, 14)
  56   RELOC_NUMBER (R_MIPS_UNUSED3, 15)
  57   RELOC_NUMBER (R_MIPS_SHIFT5, 16)
  58   RELOC_NUMBER (R_MIPS_SHIFT6, 17)
  59   RELOC_NUMBER (R_MIPS_64, 18)
  60   RELOC_NUMBER (R_MIPS_GOT_DISP, 19)
  61   RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)
  62   RELOC_NUMBER (R_MIPS_GOT_OFST, 21)
  63   RELOC_NUMBER (R_MIPS_GOT_HI16, 22)
  64   RELOC_NUMBER (R_MIPS_GOT_LO16, 23)
  65   RELOC_NUMBER (R_MIPS_SUB, 24)
  66   RELOC_NUMBER (R_MIPS_INSERT_A, 25)
  67   RELOC_NUMBER (R_MIPS_INSERT_B, 26)
  68   RELOC_NUMBER (R_MIPS_DELETE, 27)
  69   RELOC_NUMBER (R_MIPS_HIGHER, 28)
  70   RELOC_NUMBER (R_MIPS_HIGHEST, 29)
  71   RELOC_NUMBER (R_MIPS_CALL_HI16, 30)
  72   RELOC_NUMBER (R_MIPS_CALL_LO16, 31)
  73   RELOC_NUMBER (R_MIPS_SCN_DISP, 32)
  74   RELOC_NUMBER (R_MIPS_REL16, 33)
  75   RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)
  76   RELOC_NUMBER (R_MIPS_PJUMP, 35)
  77   RELOC_NUMBER (R_MIPS_RELGOT, 36)
  78   RELOC_NUMBER (R_MIPS_JALR, 37)
  79   /* TLS relocations.  */
  80   RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38)
  81   RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39)
  82   RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40)
  83   RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41)
  84   RELOC_NUMBER (R_MIPS_TLS_GD, 42)
  85   RELOC_NUMBER (R_MIPS_TLS_LDM, 43)
  86   RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44)
  87   RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45)
  88   RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46)
  89   RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47)
  90   RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48)
  91   RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49)
  92   RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50)
  93   RELOC_NUMBER (R_MIPS_GLOB_DAT, 51)
  94   /* Space to grow */
  95   RELOC_NUMBER (R_MIPS_PC21_S2, 60)
  96   RELOC_NUMBER (R_MIPS_PC26_S2, 61)
  97   RELOC_NUMBER (R_MIPS_PC18_S3, 62)
  98   RELOC_NUMBER (R_MIPS_PC19_S2, 63)
  99   RELOC_NUMBER (R_MIPS_PCHI16, 64)
 100   RELOC_NUMBER (R_MIPS_PCLO16, 65)
 101   FAKE_RELOC (R_MIPS_max, 66)
 102   /* These relocs are used for the mips16.  */
 103   FAKE_RELOC (R_MIPS16_min, 100)
 104   RELOC_NUMBER (R_MIPS16_26, 100)
 105   RELOC_NUMBER (R_MIPS16_GPREL, 101)
 106   RELOC_NUMBER (R_MIPS16_GOT16, 102)
 107   RELOC_NUMBER (R_MIPS16_CALL16, 103)
 108   RELOC_NUMBER (R_MIPS16_HI16, 104)
 109   RELOC_NUMBER (R_MIPS16_LO16, 105)
 110   RELOC_NUMBER (R_MIPS16_TLS_GD, 106)
 111   RELOC_NUMBER (R_MIPS16_TLS_LDM, 107)
 112   RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108)
 113   RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109)
 114   RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110)
 115   RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111)
 116   RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112)
 117   RELOC_NUMBER (R_MIPS16_PC16_S1, 113)
 118   FAKE_RELOC (R_MIPS16_max, 114)
 119   /* These relocations are specific to VxWorks.  */
 120   RELOC_NUMBER (R_MIPS_COPY, 126)
 121   RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
 122
 123   /* These relocations are specific to microMIPS.  */
 124   FAKE_RELOC (R_MICROMIPS_min, 130)
 125   RELOC_NUMBER (R_MICROMIPS_26_S1, 133)
 126   RELOC_NUMBER (R_MICROMIPS_HI16, 134)
 127   RELOC_NUMBER (R_MICROMIPS_LO16, 135)
 128   RELOC_NUMBER (R_MICROMIPS_GPREL16, 136)       /* In Elf 64:
 129                                                    alias R_MICROMIPS_GPREL */
 130   RELOC_NUMBER (R_MICROMIPS_LITERAL, 137)
 131   RELOC_NUMBER (R_MICROMIPS_GOT16, 138)         /* In Elf 64:
 132                                                    alias R_MICROMIPS_GOT */
 133   RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139)
 134   RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140)
 135   RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141)
 136   RELOC_NUMBER (R_MICROMIPS_CALL16, 142)        /* In Elf 64:
 137                                                    alias R_MICROMIPS_CALL */
 138   RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145)
 139   RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146)
 140   RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147)
 141   RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148)
 142   RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149)
 143   RELOC_NUMBER (R_MICROMIPS_SUB, 150)
 144   RELOC_NUMBER (R_MICROMIPS_HIGHER, 151)
 145   RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152)
 146   RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153)
 147   RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154)
 148   RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155)
 149   RELOC_NUMBER (R_MICROMIPS_JALR, 156)
 150   RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157)
 151   /* TLS relocations.  */
 152   RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162)
 153   RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163)
 154   RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164)
 155   RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165)
 156   RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166)
 157   RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169)
 158   RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170)
 159   /* microMIPS GP- and PC-relative relocations. */
 160   RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172)
 161   RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173)
 162   FAKE_RELOC (R_MICROMIPS_max, 174)
 163
 164   /* This was a GNU extension used by embedded-PIC.  It was co-opted by
 165      mips-linux for exception-handling data.  GCC stopped using it in
 166      May, 2004, then started using it again for compact unwind tables.  */
 167   RELOC_NUMBER (R_MIPS_PC32, 248)
 168   RELOC_NUMBER (R_MIPS_EH, 249)
 169   /* FIXME: this relocation is used internally by gas.  */
 170   RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250)
 171   /* These are GNU extensions to enable C++ vtable garbage collection.  */
 172   RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)
 173   RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)
 174 END_RELOC_NUMBERS (R_MIPS_maxext)
 175
 176 /* Processor specific flags for the ELF header e_flags field.  */
 177
 178 /* At least one .noreorder directive appears in the source.  */
 179 #define EF_MIPS_NOREORDER       0x00000001
 180
 181 /* File contains position independent code.  */
 182 #define EF_MIPS_PIC             0x00000002
 183
 184 /* Code in file uses the standard calling sequence for calling
 185    position independent code.  */
 186 #define EF_MIPS_CPIC            0x00000004
 187
 188 /* ???  Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.  */
 189 #define EF_MIPS_XGOT            0x00000008
 190
 191 /* Code in file uses UCODE (obsolete) */
 192 #define EF_MIPS_UCODE           0x00000010
 193
 194 /* Code in file uses new ABI (-n32 on Irix 6).  */
 195 #define EF_MIPS_ABI2            0x00000020
 196
 197 /* Process the .MIPS.options section first by ld */
 198 #define EF_MIPS_OPTIONS_FIRST   0x00000080
 199
 200 /* Indicates code compiled for a 64-bit machine in 32-bit mode
 201    (regs are 32-bits wide).  */
 202 #define EF_MIPS_32BITMODE       0x00000100
 203
 204 /* 32-bit machine but FP registers are 64 bit (-mfp64).  */
 205 #define EF_MIPS_FP64            0x00000200
 206
 207 /* Code in file uses the IEEE 754-2008 NaN encoding convention.  */
 208 #define EF_MIPS_NAN2008         0x00000400
 209
 210 /* Architectural Extensions used by this file */
 211 #define EF_MIPS_ARCH_ASE        0x0f000000
 212
 213 /* Use MDMX multimedia extensions */
 214 #define EF_MIPS_ARCH_ASE_MDMX   0x08000000
 215
 216 /* Use MIPS-16 ISA extensions */
 217 #define EF_MIPS_ARCH_ASE_M16    0x04000000
 218
 219 /* Use MICROMIPS ISA extensions.  */
 220 #define EF_MIPS_ARCH_ASE_MICROMIPS      0x02000000
 221
 222 /* Four bit MIPS architecture field.  */
 223 #define EF_MIPS_ARCH            0xf0000000
 224
 225 /* -mips1 code.  */
 226 #define E_MIPS_ARCH_1           0x00000000
 227
 228 /* -mips2 code.  */
 229 #define E_MIPS_ARCH_2           0x10000000
 230
 231 /* -mips3 code.  */
 232 #define E_MIPS_ARCH_3           0x20000000
 233
 234 /* -mips4 code.  */
 235 #define E_MIPS_ARCH_4           0x30000000
 236
 237 /* -mips5 code.  */
 238 #define E_MIPS_ARCH_5           0x40000000
 239
 240 /* -mips32 code.  */
 241 #define E_MIPS_ARCH_32          0x50000000
 242
 243 /* -mips64 code.  */
 244 #define E_MIPS_ARCH_64          0x60000000
 245
 246 /* -mips32r2 code.  */
 247 #define E_MIPS_ARCH_32R2        0x70000000
 248
 249 /* -mips64r2 code.  */
 250 #define E_MIPS_ARCH_64R2        0x80000000
 251
 252 /* -mips32r6 code.  */
 253 #define E_MIPS_ARCH_32R6        0x90000000
 254
 255 /* -mips64r6 code.  */
 256 #define E_MIPS_ARCH_64R6        0xa0000000
 257
 258 /* The ABI of the file.  Also see EF_MIPS_ABI2 above. */
 259 #define EF_MIPS_ABI             0x0000F000
 260
 261 /* The original o32 abi. */
 262 #define E_MIPS_ABI_O32          0x00001000
 263
 264 /* O32 extended to work on 64 bit architectures */
 265 #define E_MIPS_ABI_O64          0x00002000
 266
 267 /* EABI in 32 bit mode */
 268 #define E_MIPS_ABI_EABI32       0x00003000
 269
 270 /* EABI in 64 bit mode */
 271 #define E_MIPS_ABI_EABI64       0x00004000
 272
 273
 274 /* Machine variant if we know it.  This field was invented at Cygnus,
 275    but it is hoped that other vendors will adopt it.  If some standard
 276    is developed, this code should be changed to follow it. */
 277
 278 #define EF_MIPS_MACH            0x00FF0000
 279
 280 /* Cygnus is choosing values between 80 and 9F;
 281    00 - 7F should be left for a future standard;
 282    the rest are open. */
 283
 284 #define E_MIPS_MACH_3900        0x00810000
 285 #define E_MIPS_MACH_4010        0x00820000
 286 #define E_MIPS_MACH_4100        0x00830000
 287 #define E_MIPS_MACH_4650        0x00850000
 288 #define E_MIPS_MACH_4120        0x00870000
 289 #define E_MIPS_MACH_4111        0x00880000
 290 #define E_MIPS_MACH_SB1         0x008a0000
 291 #define E_MIPS_MACH_OCTEON      0x008b0000
 292 #define E_MIPS_MACH_XLR         0x008c0000
 293 #define E_MIPS_MACH_OCTEON2     0x008d0000
 294 #define E_MIPS_MACH_OCTEON3     0x008e0000
 295 #define E_MIPS_MACH_5400        0x00910000
 296 #define E_MIPS_MACH_5900        0x00920000
 297 #define E_MIPS_MACH_IAMR2       0x00930000
 298 #define E_MIPS_MACH_5500        0x00980000
 299 #define E_MIPS_MACH_9000        0x00990000
 300 #define E_MIPS_MACH_LS2E        0x00A00000
 301 #define E_MIPS_MACH_LS2F        0x00A10000
 302 #define E_MIPS_MACH_GS464       0x00A20000
 303 #define E_MIPS_MACH_GS464E      0x00A30000
 304 \f
 305 /* Processor specific section indices.  These sections do not actually
 306    exist.  Symbols with a st_shndx field corresponding to one of these
 307    values have a special meaning.  */
 308
 309 /* Defined and allocated common symbol.  Value is virtual address.  If
 310    relocated, alignment must be preserved.  */
 311 #define SHN_MIPS_ACOMMON        SHN_LORESERVE
 312
 313 /* Defined and allocated text symbol.  Value is virtual address.
 314    Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
 315 #define SHN_MIPS_TEXT           (SHN_LORESERVE + 1)
 316
 317 /* Defined and allocated data symbol.  Value is virtual address.
 318    Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
 319 #define SHN_MIPS_DATA           (SHN_LORESERVE + 2)
 320
 321 /* Small common symbol.  */
 322 #define SHN_MIPS_SCOMMON        (SHN_LORESERVE + 3)
 323
 324 /* Small undefined symbol.  */
 325 #define SHN_MIPS_SUNDEFINED     (SHN_LORESERVE + 4)
 326 \f
 327 /* Processor specific section types.  */
 328
 329 /* Section contains the set of dynamic shared objects used when
 330    statically linking.  */
 331 #define SHT_MIPS_LIBLIST        0x70000000
 332
 333 /* I'm not sure what this is, but it's used on Irix 5.  */
 334 #define SHT_MIPS_MSYM           0x70000001
 335
 336 /* Section contains list of symbols whose definitions conflict with
 337    symbols defined in shared objects.  */
 338 #define SHT_MIPS_CONFLICT       0x70000002
 339
 340 /* Section contains the global pointer table.  */
 341 #define SHT_MIPS_GPTAB          0x70000003
 342
 343 /* Section contains microcode information.  The exact format is
 344    unspecified.  */
 345 #define SHT_MIPS_UCODE          0x70000004
 346
 347 /* Section contains some sort of debugging information.  The exact
 348    format is unspecified.  It's probably ECOFF symbols.  */
 349 #define SHT_MIPS_DEBUG          0x70000005
 350
 351 /* Section contains register usage information.  */
 352 #define SHT_MIPS_REGINFO        0x70000006
 353
 354 /* ??? */
 355 #define SHT_MIPS_PACKAGE        0x70000007
 356
 357 /* ??? */
 358 #define SHT_MIPS_PACKSYM        0x70000008
 359
 360 /* ??? */
 361 #define SHT_MIPS_RELD           0x70000009
 362
 363 /* Section contains interface information.  */
 364 #define SHT_MIPS_IFACE          0x7000000b
 365
 366 /* Section contains description of contents of another section.  */
 367 #define SHT_MIPS_CONTENT        0x7000000c
 368
 369 /* Section contains miscellaneous options.  */
 370 #define SHT_MIPS_OPTIONS        0x7000000d
 371
 372 /* ??? */
 373 #define SHT_MIPS_SHDR           0x70000010
 374
 375 /* ??? */
 376 #define SHT_MIPS_FDESC          0x70000011
 377
 378 /* ??? */
 379 #define SHT_MIPS_EXTSYM         0x70000012
 380
 381 /* ??? */
 382 #define SHT_MIPS_DENSE          0x70000013
 383
 384 /* ??? */
 385 #define SHT_MIPS_PDESC          0x70000014
 386
 387 /* ??? */
 388 #define SHT_MIPS_LOCSYM         0x70000015
 389
 390 /* ??? */
 391 #define SHT_MIPS_AUXSYM         0x70000016
 392
 393 /* ??? */
 394 #define SHT_MIPS_OPTSYM         0x70000017
 395
 396 /* ??? */
 397 #define SHT_MIPS_LOCSTR         0x70000018
 398
 399 /* ??? */
 400 #define SHT_MIPS_LINE           0x70000019
 401
 402 /* ??? */
 403 #define SHT_MIPS_RFDESC         0x7000001a
 404
 405 /* Delta C++: symbol table */
 406 #define SHT_MIPS_DELTASYM       0x7000001b
 407
 408 /* Delta C++: instance table */
 409 #define SHT_MIPS_DELTAINST      0x7000001c
 410
 411 /* Delta C++: class table */
 412 #define SHT_MIPS_DELTACLASS     0x7000001d
 413
 414 /* DWARF debugging section.  */
 415 #define SHT_MIPS_DWARF          0x7000001e
 416
 417 /* Delta C++: declarations */
 418 #define SHT_MIPS_DELTADECL      0x7000001f
 419
 420 /* List of libraries the binary depends on.  Includes a time stamp, version
 421    number.  */
 422 #define SHT_MIPS_SYMBOL_LIB     0x70000020
 423
 424 /* Events section.  */
 425 #define SHT_MIPS_EVENTS         0x70000021
 426
 427 /* ??? */
 428 #define SHT_MIPS_TRANSLATE      0x70000022
 429
 430 /* Special pixie sections */
 431 #define SHT_MIPS_PIXIE          0x70000023
 432
 433 /* Address translation table (for debug info) */
 434 #define SHT_MIPS_XLATE          0x70000024
 435
 436 /* SGI internal address translation table (for debug info) */
 437 #define SHT_MIPS_XLATE_DEBUG    0x70000025
 438
 439 /* Intermediate code */
 440 #define SHT_MIPS_WHIRL          0x70000026
 441
 442 /* C++ exception handling region info */
 443 #define SHT_MIPS_EH_REGION      0x70000027
 444
 445 /* Obsolete address translation table (for debug info) */
 446 #define SHT_MIPS_XLATE_OLD      0x70000028
 447
 448 /* Runtime procedure descriptor table exception information (ucode) ??? */
 449 #define SHT_MIPS_PDR_EXCEPTION  0x70000029
 450
 451 /* ABI related flags section.  */
 452 #define SHT_MIPS_ABIFLAGS       0x7000002a
 453
 454 /* A section of type SHT_MIPS_LIBLIST contains an array of the
 455    following structure.  The sh_link field is the section index of the
 456    string table.  The sh_info field is the number of entries in the
 457    section.  */
 458 typedef struct
 459 {
 460   /* String table index for name of shared object.  */
 461   unsigned long l_name;
 462   /* Time stamp.  */
 463   unsigned long l_time_stamp;
 464   /* Checksum of symbol names and common sizes.  */
 465   unsigned long l_checksum;
 466   /* String table index for version.  */
 467   unsigned long l_version;
 468   /* Flags.  */
 469   unsigned long l_flags;
 470 } Elf32_Lib;
 471
 472 /* The external version of Elf32_Lib.  */
 473 typedef struct
 474 {
 475   unsigned char l_name[4];
 476   unsigned char l_time_stamp[4];
 477   unsigned char l_checksum[4];
 478   unsigned char l_version[4];
 479   unsigned char l_flags[4];
 480 } Elf32_External_Lib;
 481
 482 /* The l_flags field of an Elf32_Lib structure may contain the
 483    following flags.  */
 484
 485 /* Require an exact match at runtime.  */
 486 #define LL_EXACT_MATCH          0x00000001
 487
 488 /* Ignore version incompatibilities at runtime.  */
 489 #define LL_IGNORE_INT_VER       0x00000002
 490
 491 /* Require matching minor version number.  */
 492 #define LL_REQUIRE_MINOR        0x00000004
 493
 494 /* ??? */
 495 #define LL_EXPORTS              0x00000008
 496
 497 /* Delay loading of this library until really needed.  */
 498 #define LL_DELAY_LOAD           0x00000010
 499
 500 /* ??? Delta C++ stuff ??? */
 501 #define LL_DELTA                0x00000020
 502
 503
 504 /* A section of type SHT_MIPS_CONFLICT is an array of indices into the
 505    .dynsym section.  Each element has the following type.  */
 506 typedef unsigned long Elf32_Conflict;
 507 typedef unsigned char Elf32_External_Conflict[4];
 508
 509 typedef unsigned long Elf64_Conflict;
 510 typedef unsigned char Elf64_External_Conflict[8];
 511
 512 /* A section of type SHT_MIPS_GPTAB contains information about how
 513    much GP space would be required for different -G arguments.  This
 514    information is only used so that the linker can provide informative
 515    suggestions as to the best -G value to use.  The sh_info field is
 516    the index of the section for which this information applies.  The
 517    contents of the section are an array of the following union.  The
 518    first element uses the gt_header field.  The remaining elements use
 519    the gt_entry field.  */
 520 typedef union
 521 {
 522   struct
 523     {
 524       /* -G value actually used for this object file.  */
 525       unsigned long gt_current_g_value;
 526       /* Unused.  */
 527       unsigned long gt_unused;
 528     } gt_header;
 529   struct
 530     {
 531       /* If this -G argument has been used...  */
 532       unsigned long gt_g_value;
 533       /* ...this many GP section bytes would be required.  */
 534       unsigned long gt_bytes;
 535     } gt_entry;
 536 } Elf32_gptab;
 537
 538 /* The external version of Elf32_gptab.  */
 539
 540 typedef union
 541 {
 542   struct
 543     {
 544       unsigned char gt_current_g_value[4];
 545       unsigned char gt_unused[4];
 546     } gt_header;
 547   struct
 548     {
 549       unsigned char gt_g_value[4];
 550       unsigned char gt_bytes[4];
 551     } gt_entry;
 552 } Elf32_External_gptab;
 553
 554 /* A section of type SHT_MIPS_REGINFO contains the following
 555    structure.  */
 556 typedef struct
 557 {
 558   /* Mask of general purpose registers used.  */
 559   unsigned long ri_gprmask;
 560   /* Mask of co-processor registers used.  */
 561   unsigned long ri_cprmask[4];
 562   /* GP register value for this object file.  */
 563   long ri_gp_value;
 564 } Elf32_RegInfo;
 565
 566 /* The external version of the Elf_RegInfo structure.  */
 567 typedef struct
 568 {
 569   unsigned char ri_gprmask[4];
 570   unsigned char ri_cprmask[4][4];
 571   unsigned char ri_gp_value[4];
 572 } Elf32_External_RegInfo;
 573
 574 /* MIPS ELF .reginfo swapping routines.  */
 575 extern void bfd_mips_elf32_swap_reginfo_in
 576   (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *);
 577 extern void bfd_mips_elf32_swap_reginfo_out
 578   (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *);
 579 \f
 580 /* Processor specific section flags.  */
 581
 582 /* This section must be in the global data area.  */
 583 #define SHF_MIPS_GPREL          0x10000000
 584
 585 /* This section should be merged.  */
 586 #define SHF_MIPS_MERGE          0x20000000
 587
 588 /* This section contains address data of size implied by section
 589    element size.  */
 590 #define SHF_MIPS_ADDR           0x40000000
 591
 592 /* This section contains string data.  */
 593 #define SHF_MIPS_STRING         0x80000000
 594
 595 /* This section may not be stripped.  */
 596 #define SHF_MIPS_NOSTRIP        0x08000000
 597
 598 /* This section is local to threads.  */
 599 #define SHF_MIPS_LOCAL          0x04000000
 600
 601 /* Linker should generate implicit weak names for this section.  */
 602 #define SHF_MIPS_NAMES          0x02000000
 603
 604 /* Section contais text/data which may be replicated in other sections.
 605    Linker should retain only one copy.  */
 606 #define SHF_MIPS_NODUPES        0x01000000
 607 \f
 608 /* Processor specific program header types.  */
 609
 610 /* Register usage information.  Identifies one .reginfo section.  */
 611 #define PT_MIPS_REGINFO         0x70000000
 612
 613 /* Runtime procedure table.  */
 614 #define PT_MIPS_RTPROC          0x70000001
 615
 616 /* .MIPS.options section.  */
 617 #define PT_MIPS_OPTIONS         0x70000002
 618
 619 /* Records ABI related flags.  */
 620 #define PT_MIPS_ABIFLAGS        0x70000003
 621 \f
 622 /* Processor specific dynamic array tags.  */
 623
 624 /* 32 bit version number for runtime linker interface.  */
 625 #define DT_MIPS_RLD_VERSION     0x70000001
 626
 627 /* Time stamp.  */
 628 #define DT_MIPS_TIME_STAMP      0x70000002
 629
 630 /* Checksum of external strings and common sizes.  */
 631 #define DT_MIPS_ICHECKSUM       0x70000003
 632
 633 /* Index of version string in string table.  */
 634 #define DT_MIPS_IVERSION        0x70000004
 635
 636 /* 32 bits of flags.  */
 637 #define DT_MIPS_FLAGS           0x70000005
 638
 639 /* Base address of the segment.  */
 640 #define DT_MIPS_BASE_ADDRESS    0x70000006
 641
 642 /* ??? */
 643 #define DT_MIPS_MSYM            0x70000007
 644
 645 /* Address of .conflict section.  */
 646 #define DT_MIPS_CONFLICT        0x70000008
 647
 648 /* Address of .liblist section.  */
 649 #define DT_MIPS_LIBLIST         0x70000009
 650
 651 /* Number of local global offset table entries.  */
 652 #define DT_MIPS_LOCAL_GOTNO     0x7000000a
 653
 654 /* Number of entries in the .conflict section.  */
 655 #define DT_MIPS_CONFLICTNO      0x7000000b
 656
 657 /* Number of entries in the .liblist section.  */
 658 #define DT_MIPS_LIBLISTNO       0x70000010
 659
 660 /* Number of entries in the .dynsym section.  */
 661 #define DT_MIPS_SYMTABNO        0x70000011
 662
 663 /* Index of first external dynamic symbol not referenced locally.  */
 664 #define DT_MIPS_UNREFEXTNO      0x70000012
 665
 666 /* Index of first dynamic symbol in global offset table.  */
 667 #define DT_MIPS_GOTSYM          0x70000013
 668
 669 /* Number of page table entries in global offset table.  */
 670 #define DT_MIPS_HIPAGENO        0x70000014
 671
 672 /* Address of run time loader map, used for debugging.  */
 673 #define DT_MIPS_RLD_MAP         0x70000016
 674
 675 /* Delta C++ class definition.  */
 676 #define DT_MIPS_DELTA_CLASS     0x70000017
 677
 678 /* Number of entries in DT_MIPS_DELTA_CLASS.  */
 679 #define DT_MIPS_DELTA_CLASS_NO  0x70000018
 680
 681 /* Delta C++ class instances.  */
 682 #define DT_MIPS_DELTA_INSTANCE  0x70000019
 683
 684 /* Number of entries in DT_MIPS_DELTA_INSTANCE.  */
 685 #define DT_MIPS_DELTA_INSTANCE_NO       0x7000001a
 686
 687 /* Delta relocations.  */
 688 #define DT_MIPS_DELTA_RELOC     0x7000001b
 689
 690 /* Number of entries in DT_MIPS_DELTA_RELOC.  */
 691 #define DT_MIPS_DELTA_RELOC_NO  0x7000001c
 692
 693 /* Delta symbols that Delta relocations refer to.  */
 694 #define DT_MIPS_DELTA_SYM       0x7000001d
 695
 696 /* Number of entries in DT_MIPS_DELTA_SYM.  */
 697 #define DT_MIPS_DELTA_SYM_NO    0x7000001e
 698
 699 /* Delta symbols that hold class declarations.  */
 700 #define DT_MIPS_DELTA_CLASSSYM  0x70000020
 701
 702 /* Number of entries in DT_MIPS_DELTA_CLASSSYM.  */
 703 #define DT_MIPS_DELTA_CLASSSYM_NO       0x70000021
 704
 705 /* Flags indicating information about C++ flavor.  */
 706 #define DT_MIPS_CXX_FLAGS       0x70000022
 707
 708 /* Pixie information (???).  */
 709 #define DT_MIPS_PIXIE_INIT      0x70000023
 710
 711 /* Address of .MIPS.symlib */
 712 #define DT_MIPS_SYMBOL_LIB      0x70000024
 713
 714 /* The GOT index of the first PTE for a segment */
 715 #define DT_MIPS_LOCALPAGE_GOTIDX        0x70000025
 716
 717 /* The GOT index of the first PTE for a local symbol */
 718 #define DT_MIPS_LOCAL_GOTIDX    0x70000026
 719
 720 /* The GOT index of the first PTE for a hidden symbol */
 721 #define DT_MIPS_HIDDEN_GOTIDX   0x70000027
 722
 723 /* The GOT index of the first PTE for a protected symbol */
 724 #define DT_MIPS_PROTECTED_GOTIDX        0x70000028
 725
 726 /* Address of `.MIPS.options'.  */
 727 #define DT_MIPS_OPTIONS         0x70000029
 728
 729 /* Address of `.interface'.  */
 730 #define DT_MIPS_INTERFACE       0x7000002a
 731
 732 /* ??? */
 733 #define DT_MIPS_DYNSTR_ALIGN    0x7000002b
 734
 735 /* Size of the .interface section.  */
 736 #define DT_MIPS_INTERFACE_SIZE  0x7000002c
 737
 738 /* Size of rld_text_resolve function stored in the GOT.  */
 739 #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR   0x7000002d
 740
 741 /* Default suffix of DSO to be added by rld on dlopen() calls.  */
 742 #define DT_MIPS_PERF_SUFFIX     0x7000002e
 743
 744 /* Size of compact relocation section (O32).  */
 745 #define DT_MIPS_COMPACT_SIZE    0x7000002f
 746
 747 /* GP value for auxiliary GOTs.  */
 748 #define DT_MIPS_GP_VALUE        0x70000030
 749
 750 /* Address of auxiliary .dynamic.  */
 751 #define DT_MIPS_AUX_DYNAMIC     0x70000031
 752
 753 /* Address of the base of the PLTGOT.  */
 754 #define DT_MIPS_PLTGOT         0x70000032
 755
 756 /* Points to the base of a writable PLT.  */
 757 #define DT_MIPS_RWPLT          0x70000034
 758
 759 /* Relative offset of run time loader map, used for debugging.  */
 760 #define DT_MIPS_RLD_MAP_REL    0x70000035
 761 \f
 762 /* Flags which may appear in a DT_MIPS_FLAGS entry.  */
 763
 764 /* No flags.  */
 765 #define RHF_NONE                0x00000000
 766
 767 /* Uses shortcut pointers.  */
 768 #define RHF_QUICKSTART          0x00000001
 769
 770 /* Hash size is not a power of two.  */
 771 #define RHF_NOTPOT              0x00000002
 772
 773 /* Ignore LD_LIBRARY_PATH.  */
 774 #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004
 775
 776 /* DSO address may not be relocated. */
 777 #define RHF_NO_MOVE             0x00000008
 778
 779 /* SGI specific features. */
 780 #define RHF_SGI_ONLY            0x00000010
 781
 782 /* Guarantee that .init will finish executing before any non-init
 783    code in DSO is called. */
 784 #define RHF_GUARANTEE_INIT         0x00000020
 785
 786 /* Contains Delta C++ code. */
 787 #define RHF_DELTA_C_PLUS_PLUS      0x00000040
 788
 789 /* Guarantee that .init will start executing before any non-init
 790    code in DSO is called. */
 791 #define RHF_GUARANTEE_START_INIT   0x00000080
 792
 793 /* Generated by pixie. */
 794 #define RHF_PIXIE                  0x00000100
 795
 796 /* Delay-load DSO by default. */
 797 #define RHF_DEFAULT_DELAY_LOAD     0x00000200
 798
 799 /* Object may be requickstarted */
 800 #define RHF_REQUICKSTART           0x00000400
 801
 802 /* Object has been requickstarted */
 803 #define RHF_REQUICKSTARTED         0x00000800
 804
 805 /* Generated by cord. */
 806 #define RHF_CORD                   0x00001000
 807
 808 /* Object contains no unresolved undef symbols. */
 809 #define RHF_NO_UNRES_UNDEF         0x00002000
 810
 811 /* Symbol table is in a safe order. */
 812 #define RHF_RLD_ORDER_SAFE         0x00004000
 813 \f
 814 /* Special values for the st_other field in the symbol table.  These
 815    are used in an Irix 5 dynamic symbol table.  */
 816
 817 #define STO_DEFAULT             STV_DEFAULT
 818 #define STO_INTERNAL            STV_INTERNAL
 819 #define STO_HIDDEN              STV_HIDDEN
 820 #define STO_PROTECTED           STV_PROTECTED
 821
 822 /* Two topmost bits denote the MIPS ISA for .text symbols:
 823    + 00 -- standard MIPS code,
 824    + 10 -- microMIPS code,
 825    + 11 -- MIPS16 code; requires the following two bits to be set too.
 826    Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.  See below
 827    for details.  */
 828 #define STO_MIPS_ISA            (3 << 6)
 829
 830 /* The mask spanning the rest of MIPS psABI flags.  At most one is expected
 831    to be set except for STO_MIPS16.  */
 832 #define STO_MIPS_FLAGS          (~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1)))
 833
 834 /* The MIPS psABI was updated in 2008 with support for PLTs and copy
 835    relocs.  There are therefore two types of nonzero SHN_UNDEF functions:
 836    PLT entries and traditional MIPS lazy binding stubs.  We mark the former
 837    with STO_MIPS_PLT to distinguish them from the latter.  */
 838 #define STO_MIPS_PLT            0x8
 839 #define ELF_ST_IS_MIPS_PLT(other)                                       \
 840   ((ELF_ST_IS_MIPS16 (other)                                            \
 841     ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS))                        \
 842     : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT)
 843 #define ELF_ST_SET_MIPS_PLT(other)                                      \
 844   ((ELF_ST_IS_MIPS16 (other)                                            \
 845     ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS))                        \
 846     : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT)
 847
 848 /* This value is used to mark PIC functions in an object that mixes
 849    PIC and non-PIC.  Note that this bit overlaps with STO_MIPS16,
 850    although MIPS16 symbols are never considered to be MIPS_PIC.  */
 851 #define STO_MIPS_PIC            0x20
 852 #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC)
 853 #define ELF_ST_SET_MIPS_PIC(other)                                      \
 854   ((ELF_ST_IS_MIPS16 (other)                                            \
 855     ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS))                        \
 856     : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC)
 857
 858 /* This value is used for a mips16 .text symbol.  */
 859 #define STO_MIPS16              0xf0
 860 #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16)
 861 #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16)
 862
 863 /* This value is used for a microMIPS .text symbol.  To distinguish from
 864    STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS.  The
 865    mask is STO_MIPS_ISA.  */
 866 #define STO_MICROMIPS           (2 << 6)
 867 #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS)
 868 #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS)
 869
 870 /* Whether code compression (either of the MIPS16 or the microMIPS ASEs)
 871    has been indicated for a .text symbol.  */
 872 #define ELF_ST_IS_COMPRESSED(other) \
 873   (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other))
 874
 875 /* This bit is used on Irix to indicate a symbol whose definition
 876    is optional - if, at final link time, it cannot be found, no
 877    error message should be produced.  */
 878 #define STO_OPTIONAL            (1 << 2)
 879 /* A macro to examine the STO_OPTIONAL bit.  */
 880 #define ELF_MIPS_IS_OPTIONAL(other)     ((other) & STO_OPTIONAL)
 881 \f
 882 /* The 64-bit MIPS ELF ABI uses an unusual reloc format.  Each
 883    relocation entry specifies up to three actual relocations, all at
 884    the same address.  The first relocation which required a symbol
 885    uses the symbol in the r_sym field.  The second relocation which
 886    requires a symbol uses the symbol in the r_ssym field.  If all
 887    three relocations require a symbol, the third one uses a zero
 888    value.  */
 889
 890 /* An entry in a 64 bit SHT_REL section.  */
 891
 892 typedef struct
 893 {
 894   /* Address of relocation.  */
 895   unsigned char r_offset[8];
 896   /* Symbol index.  */
 897   unsigned char r_sym[4];
 898   /* Special symbol.  */
 899   unsigned char r_ssym[1];
 900   /* Third relocation.  */
 901   unsigned char r_type3[1];
 902   /* Second relocation.  */
 903   unsigned char r_type2[1];
 904   /* First relocation.  */
 905   unsigned char r_type[1];
 906 } Elf64_Mips_External_Rel;
 907
 908 typedef struct
 909 {
 910   /* Address of relocation.  */
 911   bfd_vma r_offset;
 912   /* Symbol index.  */
 913   unsigned long r_sym;
 914   /* Special symbol.  */
 915   unsigned char r_ssym;
 916   /* Third relocation.  */
 917   unsigned char r_type3;
 918   /* Second relocation.  */
 919   unsigned char r_type2;
 920   /* First relocation.  */
 921   unsigned char r_type;
 922 } Elf64_Mips_Internal_Rel;
 923
 924 /* An entry in a 64 bit SHT_RELA section.  */
 925
 926 typedef struct
 927 {
 928   /* Address of relocation.  */
 929   unsigned char r_offset[8];
 930   /* Symbol index.  */
 931   unsigned char r_sym[4];
 932   /* Special symbol.  */
 933   unsigned char r_ssym[1];
 934   /* Third relocation.  */
 935   unsigned char r_type3[1];
 936   /* Second relocation.  */
 937   unsigned char r_type2[1];
 938   /* First relocation.  */
 939   unsigned char r_type[1];
 940   /* Addend.  */
 941   unsigned char r_addend[8];
 942 } Elf64_Mips_External_Rela;
 943
 944 typedef struct
 945 {
 946   /* Address of relocation.  */
 947   bfd_vma r_offset;
 948   /* Symbol index.  */
 949   unsigned long r_sym;
 950   /* Special symbol.  */
 951   unsigned char r_ssym;
 952   /* Third relocation.  */
 953   unsigned char r_type3;
 954   /* Second relocation.  */
 955   unsigned char r_type2;
 956   /* First relocation.  */
 957   unsigned char r_type;
 958   /* Addend.  */
 959   bfd_signed_vma r_addend;
 960 } Elf64_Mips_Internal_Rela;
 961
 962 /* MIPS ELF 64 relocation info access macros.  */
 963 #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
 964 #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
 965 #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
 966 #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
 967
 968 /* Values found in the r_ssym field of a relocation entry.  */
 969
 970 /* No relocation.  */
 971 #define RSS_UNDEF       0
 972
 973 /* Value of GP.  */
 974 #define RSS_GP          1
 975
 976 /* Value of GP in object being relocated.  */
 977 #define RSS_GP0         2
 978
 979 /* Address of location being relocated.  */
 980 #define RSS_LOC         3
 981 \f
 982 /* A SHT_MIPS_OPTIONS section contains a series of options, each of
 983    which starts with this header.  */
 984
 985 typedef struct
 986 {
 987   /* Type of option.  */
 988   unsigned char kind[1];
 989   /* Size of option descriptor, including header.  */
 990   unsigned char size[1];
 991   /* Section index of affected section, or 0 for global option.  */
 992   unsigned char section[2];
 993   /* Information specific to this kind of option.  */
 994   unsigned char info[4];
 995 } Elf_External_Options;
 996
 997 typedef struct
 998 {
 999   /* Type of option.  */
1000   unsigned char kind;
1001   /* Size of option descriptor, including header.  */
1002   unsigned char size;
1003   /* Section index of affected section, or 0 for global option.  */
1004   unsigned short section;
1005   /* Information specific to this kind of option.  */
1006   unsigned long info;
1007 } Elf_Internal_Options;
1008
1009 /* MIPS ELF option header swapping routines.  */
1010 extern void bfd_mips_elf_swap_options_in
1011   (bfd *, const Elf_External_Options *, Elf_Internal_Options *);
1012 extern void bfd_mips_elf_swap_options_out
1013   (bfd *, const Elf_Internal_Options *, Elf_External_Options *);
1014
1015 /* Values which may appear in the kind field of an Elf_Options
1016    structure.  */
1017
1018 /* Undefined.  */
1019 #define ODK_NULL        0
1020
1021 /* Register usage and GP value.  */
1022 #define ODK_REGINFO     1
1023
1024 /* Exception processing information.  */
1025 #define ODK_EXCEPTIONS  2
1026
1027 /* Section padding information.  */
1028 #define ODK_PAD         3
1029
1030 /* Hardware workarounds performed.  */
1031 #define ODK_HWPATCH     4
1032
1033 /* Fill value used by the linker.  */
1034 #define ODK_FILL        5
1035
1036 /* Reserved space for desktop tools.  */
1037 #define ODK_TAGS        6
1038
1039 /* Hardware workarounds, AND bits when merging.  */
1040 #define ODK_HWAND       7
1041
1042 /* Hardware workarounds, OR bits when merging.  */
1043 #define ODK_HWOR        8
1044
1045 /* GP group to use for text/data sections.  */
1046 #define ODK_GP_GROUP    9
1047
1048 /* ID information.  */
1049 #define ODK_IDENT       10
1050
1051 /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
1052    structure.  In the 64 bit ABI, it is the following structure.  The
1053    info field of the options header is not used.  */
1054
1055 typedef struct
1056 {
1057   /* Mask of general purpose registers used.  */
1058   unsigned char ri_gprmask[4];
1059   /* Padding.  */
1060   unsigned char ri_pad[4];
1061   /* Mask of co-processor registers used.  */
1062   unsigned char ri_cprmask[4][4];
1063   /* GP register value for this object file.  */
1064   unsigned char ri_gp_value[8];
1065 } Elf64_External_RegInfo;
1066
1067 typedef struct
1068 {
1069   /* Mask of general purpose registers used.  */
1070   unsigned long ri_gprmask;
1071   /* Padding.  */
1072   unsigned long ri_pad;
1073   /* Mask of co-processor registers used.  */
1074   unsigned long ri_cprmask[4];
1075   /* GP register value for this object file.  */
1076   bfd_vma ri_gp_value;
1077 } Elf64_Internal_RegInfo;
1078
1079 /* ABI Flags structure version 0.  */
1080
1081 typedef struct
1082 {
1083   /* Version of flags structure.  */
1084   unsigned char version[2];
1085   /* The level of the ISA: 1-5, 32, 64.  */
1086   unsigned char isa_level[1];
1087   /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
1088   unsigned char isa_rev[1];
1089   /* The size of general purpose registers.  */
1090   unsigned char gpr_size[1];
1091   /* The size of co-processor 1 registers.  */
1092   unsigned char cpr1_size[1];
1093   /* The size of co-processor 2 registers.  */
1094   unsigned char cpr2_size[1];
1095   /* The floating-point ABI.  */
1096   unsigned char fp_abi[1];
1097   /* Processor-specific extension.  */
1098   unsigned char isa_ext[4];
1099   /* Mask of ASEs used.  */
1100   unsigned char ases[4];
1101   /* Mask of general flags.  */
1102   unsigned char flags1[4];
1103   unsigned char flags2[4];
1104 } Elf_External_ABIFlags_v0;
1105
1106 typedef struct elf_internal_abiflags_v0
1107 {
1108   /* Version of flags structure.  */
1109   unsigned short version;
1110   /* The level of the ISA: 1-5, 32, 64.  */
1111   unsigned char isa_level;
1112   /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
1113   unsigned char isa_rev;
1114   /* The size of general purpose registers.  */
1115   unsigned char gpr_size;
1116   /* The size of co-processor 1 registers.  */
1117   unsigned char cpr1_size;
1118   /* The size of co-processor 2 registers.  */
1119   unsigned char cpr2_size;
1120   /* The floating-point ABI.  */
1121   unsigned char fp_abi;
1122   /* Processor-specific extension.  */
1123   unsigned long isa_ext;
1124   /* Mask of ASEs used.  */
1125   unsigned long ases;
1126   /* Mask of general flags.  */
1127   unsigned long flags1;
1128   unsigned long flags2;
1129 } Elf_Internal_ABIFlags_v0;
1130
1131 typedef struct
1132 {
1133   /* The hash value computed from the name of the corresponding
1134      dynamic symbol.  */
1135   unsigned char ms_hash_value[4];
1136   /* Contains both the dynamic relocation index and the symbol flags
1137      field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1138      to access the individual values.  The dynamic relocation index
1139      identifies the first entry in the .rel.dyn section that
1140      references the dynamic symbol corresponding to this msym entry.
1141      If the index is 0, no dynamic relocations are associated with the
1142      symbol.  The symbol flags field is reserved for future use.  */
1143   unsigned char ms_info[4];
1144 } Elf32_External_Msym;
1145
1146 typedef struct
1147 {
1148   /* The hash value computed from the name of the corresponding
1149      dynamic symbol.  */
1150   unsigned long ms_hash_value;
1151   /* Contains both the dynamic relocation index and the symbol flags
1152      field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1153      to access the individual values.  The dynamic relocation index
1154      identifies the first entry in the .rel.dyn section that
1155      references the dynamic symbol corresponding to this msym entry.
1156      If the index is 0, no dynamic relocations are associated with the
1157      symbol.  The symbol flags field is reserved for future use.  */
1158   unsigned long ms_info;
1159 } Elf32_Internal_Msym;
1160
1161 #define ELF32_MS_REL_INDEX(i) ((i) >> 8)
1162 #define ELF32_MS_FLAGS(i)     (i) & 0xff)
1163 #define ELF32_MS_INFO(r, f)   (((r) << 8) + ((f) & 0xff))
1164
1165 /* MIPS ELF reginfo swapping routines.  */
1166 extern void bfd_mips_elf64_swap_reginfo_in
1167   (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *);
1168 extern void bfd_mips_elf64_swap_reginfo_out
1169   (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *);
1170
1171 /* MIPS ELF flags swapping routines.  */
1172 extern void bfd_mips_elf_swap_abiflags_v0_in
1173   (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *);
1174 extern void bfd_mips_elf_swap_abiflags_v0_out
1175   (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *);
1176
1177 /* Masks for the info work of an ODK_EXCEPTIONS descriptor.  */
1178 #define OEX_FPU_MIN     0x1f    /* FPEs which must be enabled.  */
1179 #define OEX_FPU_MAX     0x1f00  /* FPEs which may be enabled.  */
1180 #define OEX_PAGE0       0x10000 /* Page zero must be mapped.  */
1181 #define OEX_SMM         0x20000 /* Force sequential memory mode.  */
1182 #define OEX_FPDBUG      0x40000 /* Force precise floating-point
1183                                    exceptions (debug mode).  */
1184 #define OEX_DISMISS     0x80000 /* Dismiss invalid address faults.  */
1185
1186 /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX.  */
1187 #define OEX_FPU_INVAL   0x10    /* Invalid operation exception.  */
1188 #define OEX_FPU_DIV0    0x08    /* Division by zero exception.  */
1189 #define OEX_FPU_OFLO    0x04    /* Overflow exception.  */
1190 #define OEX_FPU_UFLO    0x02    /* Underflow exception.  */
1191 #define OEX_FPU_INEX    0x01    /* Inexact exception.  */
1192
1193 /* Masks for the info word of an ODK_PAD descriptor.  */
1194 #define OPAD_PREFIX     0x01
1195 #define OPAD_POSTFIX    0x02
1196 #define OPAD_SYMBOL     0x04
1197
1198 /* Masks for the info word of an ODK_HWPATCH descriptor.  */
1199 #define OHW_R4KEOP      0x00000001      /* R4000 end-of-page patch.  */
1200 #define OHW_R8KPFETCH   0x00000002      /* May need R8000 prefetch patch.  */
1201 #define OHW_R5KEOP      0x00000004      /* R5000 end-of-page patch.  */
1202 #define OHW_R5KCVTL     0x00000008      /* R5000 cvt.[ds].l bug
1203                                            (clean == 1).  */
1204 #define OHW_R10KLDL     0x00000010      /* Needs R10K misaligned
1205                                            load patch. */
1206
1207 /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor.  */
1208 #define OGP_GROUP       0x0000ffff      /* GP group number.  */
1209 #define OGP_SELF        0xffff0000      /* Self-contained GP groups.  */
1210
1211 /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor.  */
1212 #define OHWA0_R4KEOP_CHECKED    0x00000001
1213 #define OHWA0_R4KEOP_CLEAN      0x00000002
1214
1215 /* Values for the xxx_size bytes of an ABI flags structure.  */
1216
1217 #define AFL_REG_NONE         0x00       /* No registers.  */
1218 #define AFL_REG_32           0x01       /* 32-bit registers.  */
1219 #define AFL_REG_64           0x02       /* 64-bit registers.  */
1220 #define AFL_REG_128          0x03       /* 128-bit registers.  */
1221
1222 /* Masks for the ases word of an ABI flags structure.  */
1223
1224 #define AFL_ASE_DSP          0x00000001 /* DSP ASE.  */
1225 #define AFL_ASE_DSPR2        0x00000002 /* DSP R2 ASE.  */
1226 #define AFL_ASE_EVA          0x00000004 /* Enhanced VA Scheme.  */
1227 #define AFL_ASE_MCU          0x00000008 /* MCU (MicroController) ASE.  */
1228 #define AFL_ASE_MDMX         0x00000010 /* MDMX ASE.  */
1229 #define AFL_ASE_MIPS3D       0x00000020 /* MIPS-3D ASE.  */
1230 #define AFL_ASE_MT           0x00000040 /* MT ASE.  */
1231 #define AFL_ASE_SMARTMIPS    0x00000080 /* SmartMIPS ASE.  */
1232 #define AFL_ASE_VIRT         0x00000100 /* VZ ASE.  */
1233 #define AFL_ASE_MSA          0x00000200 /* MSA ASE.  */
1234 #define AFL_ASE_MIPS16       0x00000400 /* MIPS16 ASE.  */
1235 #define AFL_ASE_MICROMIPS    0x00000800 /* MICROMIPS ASE.  */
1236 #define AFL_ASE_XPA          0x00001000 /* XPA ASE.  */
1237 #define AFL_ASE_DSPR3        0x00002000 /* DSP R3 ASE.  */
1238 #define AFL_ASE_MIPS16E2     0x00004000 /* MIPS16e2 ASE.  */
1239 #define AFL_ASE_CRC          0x00008000 /* CRC ASE.  */
1240 #define AFL_ASE_RESERVED1    0x00010000 /* Reserved by MIPS Tech for WIP.  */
1241 #define AFL_ASE_GINV         0x00020000 /* GINV ASE.  */
1242 #define AFL_ASE_LOONGSON_MMI 0x00040000 /* Loongson MMI ASE.  */
1243 #define AFL_ASE_LOONGSON_CAM 0x00080000 /* Loongson CAM ASE.  */
1244 #define AFL_ASE_LOONGSON_EXT 0x00100000 /* Loongson EXT instructions.  */
1245 #define AFL_ASE_LOONGSON_EXT2 0x00200000 /* Loongson EXT2 instructions.  */
1246 #define AFL_ASE_MASK         0x003effff /* All ASEs.  */
1247
1248 /* Values for the isa_ext word of an ABI flags structure.  */
1249
1250 #define AFL_EXT_XLR           1  /* RMI Xlr instruction.  */
1251 #define AFL_EXT_OCTEON2       2  /* Cavium Networks Octeon2.  */
1252 #define AFL_EXT_OCTEONP       3  /* Cavium Networks OcteonP.  */
1253 #define AFL_EXT_OCTEON        5  /* Cavium Networks Octeon.  */
1254 #define AFL_EXT_5900          6  /* MIPS R5900 instruction.  */
1255 #define AFL_EXT_4650          7  /* MIPS R4650 instruction.  */
1256 #define AFL_EXT_4010          8  /* LSI R4010 instruction.  */
1257 #define AFL_EXT_4100          9  /* NEC VR4100 instruction.  */
1258 #define AFL_EXT_3900         10  /* Toshiba R3900 instruction.  */
1259 #define AFL_EXT_10000        11  /* MIPS R10000 instruction.  */
1260 #define AFL_EXT_SB1          12  /* Broadcom SB-1 instruction.  */
1261 #define AFL_EXT_4111         13  /* NEC VR4111/VR4181 instruction.  */
1262 #define AFL_EXT_4120         14  /* NEC VR4120 instruction.  */
1263 #define AFL_EXT_5400         15  /* NEC VR5400 instruction.  */
1264 #define AFL_EXT_5500         16  /* NEC VR5500 instruction.  */
1265 #define AFL_EXT_LOONGSON_2E  17  /* ST Microelectronics Loongson 2E.  */
1266 #define AFL_EXT_LOONGSON_2F  18  /* ST Microelectronics Loongson 2F.  */
1267 #define AFL_EXT_OCTEON3      19  /* Cavium Networks Octeon3.  */
1268 #define AFL_EXT_INTERAPTIV_MR2 20  /* Imagination interAptiv MR2.  */
1269
1270 /* Masks for the flags1 word of an ABI flags structure.  */
1271 #define AFL_FLAGS1_ODDSPREG   1  /* Uses odd single-precision registers.  */
1272
1273 extern unsigned int bfd_mips_isa_ext (bfd *);
1274 \f
1275
1276 /* Object attribute tags.  */
1277 enum
1278 {
1279   /* 0-3 are generic.  */
1280
1281   /* Floating-point ABI used by this object file.  */
1282   Tag_GNU_MIPS_ABI_FP = 4,
1283
1284   /* MSA ABI used by this object file.  */
1285   Tag_GNU_MIPS_ABI_MSA = 8,
1286 };
1287
1288 /* Object attribute values.  */
1289 enum
1290 {
1291   /* Values defined for Tag_GNU_MIPS_ABI_FP.  */
1292
1293   /* Not tagged or not using any ABIs affected by the differences.  */
1294   Val_GNU_MIPS_ABI_FP_ANY = 0,
1295
1296   /* Using hard-float -mdouble-float.  */
1297   Val_GNU_MIPS_ABI_FP_DOUBLE = 1,
1298
1299   /* Using hard-float -msingle-float.  */
1300   Val_GNU_MIPS_ABI_FP_SINGLE = 2,
1301
1302   /* Using soft-float.  */
1303   Val_GNU_MIPS_ABI_FP_SOFT = 3,
1304
1305   /* Using -mips32r2 -mfp64.  */
1306   Val_GNU_MIPS_ABI_FP_OLD_64 = 4,
1307
1308   /* Using -mfpxx */
1309   Val_GNU_MIPS_ABI_FP_XX = 5,
1310
1311   /* Using -mips32r2 -mfp64.  */
1312   Val_GNU_MIPS_ABI_FP_64 = 6,
1313
1314   /* Using -mips32r2 -mfp64 -mno-odd-spreg.  */
1315   Val_GNU_MIPS_ABI_FP_64A = 7,
1316
1317   /* This is reserved for backward-compatibility with an earlier
1318      implementation of the MIPS NaN2008 functionality.  */
1319   Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
1320
1321   /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
1322
1323   /* Not tagged or not using any ABIs affected by the differences.  */
1324   Val_GNU_MIPS_ABI_MSA_ANY = 0,
1325
1326   /* Using 128-bit MSA.  */
1327   Val_GNU_MIPS_ABI_MSA_128 = 1,
1328 };
1329
1330 #ifdef __cplusplus
1331 }
1332 #endif
1333
1334 #endif /* _ELF_MIPS_H */