x86/hpet: Fix /dev/rtc breakage caused by RTC cleanup
[deliverable/linux.git] / include / linux / msi.h
1 #ifndef LINUX_MSI_H
2 #define LINUX_MSI_H
3
4 #include <linux/kobject.h>
5 #include <linux/list.h>
6
7 struct msi_msg {
8 u32 address_lo; /* low 32 bits of msi message address */
9 u32 address_hi; /* high 32 bits of msi message address */
10 u32 data; /* 16 bits of msi message data */
11 };
12
13 extern int pci_msi_ignore_mask;
14 /* Helper functions */
15 struct irq_data;
16 struct msi_desc;
17 struct pci_dev;
18 struct platform_msi_priv_data;
19 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
20 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
21
22 typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
23 struct msi_msg *msg);
24
25 /**
26 * platform_msi_desc - Platform device specific msi descriptor data
27 * @msi_priv_data: Pointer to platform private data
28 * @msi_index: The index of the MSI descriptor for multi MSI
29 */
30 struct platform_msi_desc {
31 struct platform_msi_priv_data *msi_priv_data;
32 u16 msi_index;
33 };
34
35 /**
36 * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data
37 * @msi_index: The index of the MSI descriptor
38 */
39 struct fsl_mc_msi_desc {
40 u16 msi_index;
41 };
42
43 /**
44 * struct msi_desc - Descriptor structure for MSI based interrupts
45 * @list: List head for management
46 * @irq: The base interrupt number
47 * @nvec_used: The number of vectors used
48 * @dev: Pointer to the device which uses this descriptor
49 * @msg: The last set MSI message cached for reuse
50 * @affinity: Optional pointer to a cpu affinity mask for this descriptor
51 *
52 * @masked: [PCI MSI/X] Mask bits
53 * @is_msix: [PCI MSI/X] True if MSI-X
54 * @multiple: [PCI MSI/X] log2 num of messages allocated
55 * @multi_cap: [PCI MSI/X] log2 num of messages supported
56 * @maskbit: [PCI MSI/X] Mask-Pending bit supported?
57 * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
58 * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
59 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
60 * @mask_pos: [PCI MSI] Mask register position
61 * @mask_base: [PCI MSI-X] Mask register base address
62 * @platform: [platform] Platform device specific msi descriptor data
63 */
64 struct msi_desc {
65 /* Shared device/bus type independent data */
66 struct list_head list;
67 unsigned int irq;
68 unsigned int nvec_used;
69 struct device *dev;
70 struct msi_msg msg;
71 const struct cpumask *affinity;
72
73 union {
74 /* PCI MSI/X specific data */
75 struct {
76 u32 masked;
77 struct {
78 __u8 is_msix : 1;
79 __u8 multiple : 3;
80 __u8 multi_cap : 3;
81 __u8 maskbit : 1;
82 __u8 is_64 : 1;
83 __u16 entry_nr;
84 unsigned default_irq;
85 } msi_attrib;
86 union {
87 u8 mask_pos;
88 void __iomem *mask_base;
89 };
90 };
91
92 /*
93 * Non PCI variants add their data structure here. New
94 * entries need to use a named structure. We want
95 * proper name spaces for this. The PCI part is
96 * anonymous for now as it would require an immediate
97 * tree wide cleanup.
98 */
99 struct platform_msi_desc platform;
100 struct fsl_mc_msi_desc fsl_mc;
101 };
102 };
103
104 /* Helpers to hide struct msi_desc implementation details */
105 #define msi_desc_to_dev(desc) ((desc)->dev)
106 #define dev_to_msi_list(dev) (&(dev)->msi_list)
107 #define first_msi_entry(dev) \
108 list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
109 #define for_each_msi_entry(desc, dev) \
110 list_for_each_entry((desc), dev_to_msi_list((dev)), list)
111
112 #ifdef CONFIG_PCI_MSI
113 #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
114 #define for_each_pci_msi_entry(desc, pdev) \
115 for_each_msi_entry((desc), &(pdev)->dev)
116
117 struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
118 void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
119 #else /* CONFIG_PCI_MSI */
120 static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
121 {
122 return NULL;
123 }
124 #endif /* CONFIG_PCI_MSI */
125
126 struct msi_desc *alloc_msi_entry(struct device *dev);
127 void free_msi_entry(struct msi_desc *entry);
128 void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
129 void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
130 void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
131
132 u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
133 u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
134 void pci_msi_mask_irq(struct irq_data *data);
135 void pci_msi_unmask_irq(struct irq_data *data);
136
137 /* Conversion helpers. Should be removed after merging */
138 static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
139 {
140 __pci_write_msi_msg(entry, msg);
141 }
142 static inline void write_msi_msg(int irq, struct msi_msg *msg)
143 {
144 pci_write_msi_msg(irq, msg);
145 }
146 static inline void mask_msi_irq(struct irq_data *data)
147 {
148 pci_msi_mask_irq(data);
149 }
150 static inline void unmask_msi_irq(struct irq_data *data)
151 {
152 pci_msi_unmask_irq(data);
153 }
154
155 /*
156 * The arch hooks to setup up msi irqs. Those functions are
157 * implemented as weak symbols so that they /can/ be overriden by
158 * architecture specific code if needed.
159 */
160 int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
161 void arch_teardown_msi_irq(unsigned int irq);
162 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
163 void arch_teardown_msi_irqs(struct pci_dev *dev);
164 void arch_restore_msi_irqs(struct pci_dev *dev);
165
166 void default_teardown_msi_irqs(struct pci_dev *dev);
167 void default_restore_msi_irqs(struct pci_dev *dev);
168
169 struct msi_controller {
170 struct module *owner;
171 struct device *dev;
172 struct device_node *of_node;
173 struct list_head list;
174
175 int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
176 struct msi_desc *desc);
177 int (*setup_irqs)(struct msi_controller *chip, struct pci_dev *dev,
178 int nvec, int type);
179 void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
180 };
181
182 #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
183
184 #include <linux/irqhandler.h>
185 #include <asm/msi.h>
186
187 struct irq_domain;
188 struct irq_domain_ops;
189 struct irq_chip;
190 struct device_node;
191 struct fwnode_handle;
192 struct msi_domain_info;
193
194 /**
195 * struct msi_domain_ops - MSI interrupt domain callbacks
196 * @get_hwirq: Retrieve the resulting hw irq number
197 * @msi_init: Domain specific init function for MSI interrupts
198 * @msi_free: Domain specific function to free a MSI interrupts
199 * @msi_check: Callback for verification of the domain/info/dev data
200 * @msi_prepare: Prepare the allocation of the interrupts in the domain
201 * @msi_finish: Optional callback to finalize the allocation
202 * @set_desc: Set the msi descriptor for an interrupt
203 * @handle_error: Optional error handler if the allocation fails
204 *
205 * @get_hwirq, @msi_init and @msi_free are callbacks used by
206 * msi_create_irq_domain() and related interfaces
207 *
208 * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
209 * are callbacks used by msi_domain_alloc_irqs() and related
210 * interfaces which are based on msi_desc.
211 */
212 struct msi_domain_ops {
213 irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
214 msi_alloc_info_t *arg);
215 int (*msi_init)(struct irq_domain *domain,
216 struct msi_domain_info *info,
217 unsigned int virq, irq_hw_number_t hwirq,
218 msi_alloc_info_t *arg);
219 void (*msi_free)(struct irq_domain *domain,
220 struct msi_domain_info *info,
221 unsigned int virq);
222 int (*msi_check)(struct irq_domain *domain,
223 struct msi_domain_info *info,
224 struct device *dev);
225 int (*msi_prepare)(struct irq_domain *domain,
226 struct device *dev, int nvec,
227 msi_alloc_info_t *arg);
228 void (*msi_finish)(msi_alloc_info_t *arg, int retval);
229 void (*set_desc)(msi_alloc_info_t *arg,
230 struct msi_desc *desc);
231 int (*handle_error)(struct irq_domain *domain,
232 struct msi_desc *desc, int error);
233 };
234
235 /**
236 * struct msi_domain_info - MSI interrupt domain data
237 * @flags: Flags to decribe features and capabilities
238 * @ops: The callback data structure
239 * @chip: Optional: associated interrupt chip
240 * @chip_data: Optional: associated interrupt chip data
241 * @handler: Optional: associated interrupt flow handler
242 * @handler_data: Optional: associated interrupt flow handler data
243 * @handler_name: Optional: associated interrupt flow handler name
244 * @data: Optional: domain specific data
245 */
246 struct msi_domain_info {
247 u32 flags;
248 struct msi_domain_ops *ops;
249 struct irq_chip *chip;
250 void *chip_data;
251 irq_flow_handler_t handler;
252 void *handler_data;
253 const char *handler_name;
254 void *data;
255 };
256
257 /* Flags for msi_domain_info */
258 enum {
259 /*
260 * Init non implemented ops callbacks with default MSI domain
261 * callbacks.
262 */
263 MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
264 /*
265 * Init non implemented chip callbacks with default MSI chip
266 * callbacks.
267 */
268 MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
269 /* Support multiple PCI MSI interrupts */
270 MSI_FLAG_MULTI_PCI_MSI = (1 << 2),
271 /* Support PCI MSIX interrupts */
272 MSI_FLAG_PCI_MSIX = (1 << 3),
273 };
274
275 int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
276 bool force);
277
278 struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
279 struct msi_domain_info *info,
280 struct irq_domain *parent);
281 int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
282 int nvec);
283 void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
284 struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
285
286 struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
287 struct msi_domain_info *info,
288 struct irq_domain *parent);
289 int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
290 irq_write_msi_msg_t write_msi_msg);
291 void platform_msi_domain_free_irqs(struct device *dev);
292
293 /* When an MSI domain is used as an intermediate domain */
294 int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
295 int nvec, msi_alloc_info_t *args);
296 int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
297 int virq, int nvec, msi_alloc_info_t *args);
298 struct irq_domain *
299 platform_msi_create_device_domain(struct device *dev,
300 unsigned int nvec,
301 irq_write_msi_msg_t write_msi_msg,
302 const struct irq_domain_ops *ops,
303 void *host_data);
304 int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
305 unsigned int nr_irqs);
306 void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
307 unsigned int nvec);
308 void *platform_msi_get_host_data(struct irq_domain *domain);
309 #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
310
311 #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
312 void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
313 struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
314 struct msi_domain_info *info,
315 struct irq_domain *parent);
316 int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
317 int nvec, int type);
318 void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev);
319 struct irq_domain *pci_msi_create_default_irq_domain(struct fwnode_handle *fwnode,
320 struct msi_domain_info *info, struct irq_domain *parent);
321
322 irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
323 struct msi_desc *desc);
324 int pci_msi_domain_check_cap(struct irq_domain *domain,
325 struct msi_domain_info *info, struct device *dev);
326 u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
327 struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
328 #else
329 static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
330 {
331 return NULL;
332 }
333 #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
334
335 #endif /* LINUX_MSI_H */
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