Add MIPS V and MIPS 64 machine numbers
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2000-12-01 Chris Demetriou <cgd@sibyte.com>
2
3 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
4 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
5 OP_*_SYSCALL definitions.
6 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
7 19 bit wait codes.
8 (MIPS operand specifier comments): Remove 'm', add 'U' and
9 'J', and update the meaning of 'B' so that it's more general.
10
11 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
12 INSN_ISA5): Renumber, redefine to mean the ISA at which the
13 instruction was added.
14 (INSN_ISA32): New constant.
15 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
16 Renumber to avoid new and/or renumbered INSN_* constants.
17 (INSN_MIPS32): Delete.
18 (ISA_UNKNOWN): New constant to indicate unknown ISA.
19 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
20 ISA_MIPS32): New constants, defined to be the mask of INSN_*
21 constants available at that ISA level.
22 (CPU_UNKNOWN): New constant to indicate unknown CPU.
23 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
24 define it with a unique value.
25 (OPCODE_IS_MEMBER): Update for new ISA membership-related
26 constant meanings.
27
28 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
29 definitions.
30
31 2000-10-20 Jakub Jelinek <jakub@redhat.com>
32
33 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
34 Note that '3' is used for siam operand.
35
36 2000-09-22 Jim Wilson <wilson@cygnus.com>
37
38 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
39
40 2000-09-13 Anders Norlander <anorland@acc.umu.se>
41
42 * mips.h: Use defines instead of hard-coded processor numbers.
43 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
44 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
45 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
46 CPU_4KC, CPU_4KM, CPU_4KP): Define..
47 (OPCODE_IS_MEMBER): Use new defines.
48 (OP_MASK_SEL, OP_SH_SEL): Define.
49 (OP_MASK_CODE20, OP_SH_CODE20): Define.
50 Add 'P' to used characters.
51 Use 'H' for coprocessor select field.
52 Use 'm' for 20 bit breakpoint code.
53 Document new arg characters and add to used characters.
54 (INSN_MIPS32): New define for MIPS32 extensions.
55 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
56
57 2000-09-05 Alan Modra <alan@linuxcare.com.au>
58
59 * hppa.h: Mention cz completer.
60
61 2000-08-16 Jim Wilson <wilson@cygnus.com>
62
63 * ia64.h (IA64_OPCODE_POSTINC): New.
64
65 2000-08-15 H.J. Lu <hjl@gnu.org>
66
67 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
68 IgnoreSize change.
69
70 2000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
71
72 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
73 Move related opcodes closer to each other.
74 Minor changes in comments, list undefined opcodes.
75
76 2000-07-26 Dave Brolley <brolley@redhat.com>
77
78 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
79
80 2000-07-20 Hans-Peter Nilsson <hp@axis.com>
81
82 cris.h: New file.
83
84 2000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
85
86 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
87 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
88 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
89 (AVR_ISA_M83): Define for ATmega83, ATmega85.
90 (espm): Remove, because ESPM removed in databook update.
91 (eicall, eijmp): Move to the end of opcode table.
92
93 2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
94
95 * m68hc11.h: New file for support of Motorola 68hc11.
96
97 Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
98
99 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
100
101 Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
102
103 * avr.h: New file with AVR opcodes.
104
105 Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
106
107 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
108
109 2000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
110
111 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
112
113 2000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
114
115 * i386.h: Use sl_FP, not sl_Suf for fild.
116
117 2000-05-16 Frank Ch. Eigler <fche@redhat.com>
118
119 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
120 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
121 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
122 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
123
124 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
125
126 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
127
128 2000-05-13 Alan Modra <alan@linuxcare.com.au>,
129 Alexander Sokolov <robocop@netlink.ru>
130
131 * i386.h (i386_optab): Add cpu_flags for all instructions.
132
133 2000-05-13 Alan Modra <alan@linuxcare.com.au>
134
135 From Gavin Romig-Koch <gavin@cygnus.com>
136 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
137
138 2000-05-04 Timothy Wall <twall@cygnus.com>
139
140 * tic54x.h: New.
141
142 2000-05-03 J.T. Conklin <jtc@redback.com>
143
144 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
145 (PPC_OPERAND_VR): New operand flag for vector registers.
146
147 2000-05-01 Kazu Hirata <kazu@hxi.com>
148
149 * h8300.h (EOP): Add missing initializer.
150
151 Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
152
153 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
154 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
155 New operand types l,y,&,fe,fE,fx added to support above forms.
156 (pa_opcodes): Replaced usage of 'x' as source/target for
157 floating point double-word loads/stores with 'fx'.
158
159 Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
160 David Mosberger <davidm@hpl.hp.com>
161 Timothy Wall <twall@cygnus.com>
162 Jim Wilson <wilson@cygnus.com>
163
164 * ia64.h: New file.
165
166 2000-03-27 Nick Clifton <nickc@cygnus.com>
167
168 * d30v.h (SHORT_A1): Fix value.
169 (SHORT_AR): Renumber so that it is at the end of the list of short
170 instructions, not the end of the list of long instructions.
171
172 2000-03-26 Alan Modra <alan@linuxcare.com>
173
174 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
175 problem isn't really specific to Unixware.
176 (OLDGCC_COMPAT): Define.
177 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
178 destination %st(0).
179 Fix lots of comments.
180
181 2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
182
183 * d30v.h:
184 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
185 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
186 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
187 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
188 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
189 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
190 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
191
192 2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
193
194 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
195 fistpd without suffix.
196
197 2000-02-24 Nick Clifton <nickc@cygnus.com>
198
199 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
200 'signed_overflow_ok_p'.
201 Delete prototypes for cgen_set_flags() and cgen_get_flags().
202
203 2000-02-24 Andrew Haley <aph@cygnus.com>
204
205 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
206 (CGEN_CPU_TABLE): flags: new field.
207 Add prototypes for new functions.
208
209 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
210
211 * i386.h: Add some more UNIXWARE_COMPAT comments.
212
213 2000-02-23 Linas Vepstas <linas@linas.org>
214
215 * i370.h: New file.
216
217 2000-02-22 Andrew Haley <aph@cygnus.com>
218
219 * mips.h: (OPCODE_IS_MEMBER): Add comment.
220
221 1999-12-30 Andrew Haley <aph@cygnus.com>
222
223 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
224 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
225 insns.
226
227 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
228
229 * i386.h: Qualify intel mode far call and jmp with x_Suf.
230
231 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
232
233 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
234 indirect jumps and calls. Add FF/3 call for intel mode.
235
236 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
237
238 * mn10300.h: Add new operand types. Add new instruction formats.
239
240 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
241
242 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
243 instruction.
244
245 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
246
247 * mips.h (INSN_ISA5): New.
248
249 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
250
251 * mips.h (OPCODE_IS_MEMBER): New.
252
253 1999-10-29 Nick Clifton <nickc@cygnus.com>
254
255 * d30v.h (SHORT_AR): Define.
256
257 1999-10-18 Michael Meissner <meissner@cygnus.com>
258
259 * alpha.h (alpha_num_opcodes): Convert to unsigned.
260 (alpha_num_operands): Ditto.
261
262 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
263
264 * hppa.h (pa_opcodes): Add load and store cache control to
265 instructions. Add ordered access load and store.
266
267 * hppa.h (pa_opcode): Add new entries for addb and addib.
268
269 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
270
271 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
272
273 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
274
275 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
276
277 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
278
279 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
280 and "be" using completer prefixes.
281
282 * hppa.h (pa_opcodes): Add initializers to silence compiler.
283
284 * hppa.h: Update comments about character usage.
285
286 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
287
288 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
289 up the new fstw & bve instructions.
290
291 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
292
293 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
294 instructions.
295
296 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
297
298 * hppa.h (pa_opcodes): Add long offset double word load/store
299 instructions.
300
301 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
302 stores.
303
304 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
305
306 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
307
308 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
309
310 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
311
312 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
313
314 * hppa.h (pa_opcodes): Add support for "b,l".
315
316 * hppa.h (pa_opcodes): Add support for "b,gate".
317
318 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
319
320 * hppa.h (pa_opcodes): Use 'fX' for first register operand
321 in xmpyu.
322
323 * hppa.h (pa_opcodes): Fix mask for probe and probei.
324
325 * hppa.h (pa_opcodes): Fix mask for depwi.
326
327 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
328
329 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
330 an explicit output argument.
331
332 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
333
334 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
335 Add a few PA2.0 loads and store variants.
336
337 1999-09-04 Steve Chamberlain <sac@pobox.com>
338
339 * pj.h: New file.
340
341 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
342
343 * i386.h (i386_regtab): Move %st to top of table, and split off
344 other fp reg entries.
345 (i386_float_regtab): To here.
346
347 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
348
349 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
350 by 'f'.
351
352 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
353 Add supporting args.
354
355 * hppa.h: Document new completers and args.
356 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
357 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
358 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
359 pmenb and pmdis.
360
361 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
362 hshr, hsub, mixh, mixw, permh.
363
364 * hppa.h (pa_opcodes): Change completers in instructions to
365 use 'c' prefix.
366
367 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
368 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
369
370 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
371 fnegabs to use 'I' instead of 'F'.
372
373 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
374
375 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
376 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
377 Alphabetically sort PIII insns.
378
379 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
380
381 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
382
383 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
384
385 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
386 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
387
388 * hppa.h: Document 64 bit condition completers.
389
390 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
391
392 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
393
394 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
395
396 * i386.h (i386_optab): Add DefaultSize modifier to all insns
397 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
398 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
399
400 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
401 Jeff Law <law@cygnus.com>
402
403 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
404
405 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
406
407 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
408 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
409
410 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
411
412 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
413
414 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
415
416 * hppa.h (struct pa_opcode): Add new field "flags".
417 (FLAGS_STRICT): Define.
418
419 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
420 Jeff Law <law@cygnus.com>
421
422 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
423
424 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
425
426 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
427
428 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
429 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
430 flag to fcomi and friends.
431
432 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
433
434 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
435 integer logical instructions.
436
437 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
438
439 * m68k.h: Document new formats `E', `G', `H' and new places `N',
440 `n', `o'.
441
442 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
443 and new places `m', `M', `h'.
444
445 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
446
447 * hppa.h (pa_opcodes): Add several processor specific system
448 instructions.
449
450 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
451
452 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
453 "addb", and "addib" to be used by the disassembler.
454
455 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
456
457 * i386.h (ReverseModrm): Remove all occurences.
458 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
459 movmskps, pextrw, pmovmskb, maskmovq.
460 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
461 ignore the data size prefix.
462
463 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
464 Mostly stolen from Doug Ledford <dledford@redhat.com>
465
466 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
467
468 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
469
470 1999-04-14 Doug Evans <devans@casey.cygnus.com>
471
472 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
473 (CGEN_ATTR_TYPE): Update.
474 (CGEN_ATTR_MASK): Number booleans starting at 0.
475 (CGEN_ATTR_VALUE): Update.
476 (CGEN_INSN_ATTR): Update.
477
478 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
479
480 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
481 instructions.
482
483 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
484
485 * hppa.h (bb, bvb): Tweak opcode/mask.
486
487
488 1999-03-22 Doug Evans <devans@casey.cygnus.com>
489
490 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
491 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
492 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
493 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
494 Delete member max_insn_size.
495 (enum cgen_cpu_open_arg): New enum.
496 (cpu_open): Update prototype.
497 (cpu_open_1): Declare.
498 (cgen_set_cpu): Delete.
499
500 1999-03-11 Doug Evans <devans@casey.cygnus.com>
501
502 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
503 (CGEN_OPERAND_NIL): New macro.
504 (CGEN_OPERAND): New member `type'.
505 (@arch@_cgen_operand_table): Delete decl.
506 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
507 (CGEN_OPERAND_TABLE): New struct.
508 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
509 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
510 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
511 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
512 {get,set}_{int,vma}_operand.
513 (@arch@_cgen_cpu_open): New arg `isa'.
514 (cgen_set_cpu): Ditto.
515
516 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
517
518 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
519
520 1999-02-25 Doug Evans <devans@casey.cygnus.com>
521
522 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
523 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
524 enum cgen_hw_type.
525 (CGEN_HW_TABLE): New struct.
526 (hw_table): Delete declaration.
527 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
528 to table entry to enum.
529 (CGEN_OPINST): Ditto.
530 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
531
532 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
533
534 * alpha.h (AXP_OPCODE_EV6): New.
535 (AXP_OPCODE_NOPAL): Include it.
536
537 1999-02-09 Doug Evans <devans@casey.cygnus.com>
538
539 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
540 All uses updated. New members int_insn_p, max_insn_size,
541 parse_operand,insert_operand,extract_operand,print_operand,
542 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
543 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
544 extract_handlers,print_handlers.
545 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
546 (CGEN_ATTR_BOOL_OFFSET): New macro.
547 (CGEN_ATTR_MASK): Subtract it to compute bit number.
548 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
549 (cgen_opcode_handler): Renamed from cgen_base.
550 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
551 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
552 all uses updated.
553 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
554 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
555 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
556 (CGEN_OPCODE,CGEN_IBASE): New types.
557 (CGEN_INSN): Rewrite.
558 (CGEN_{ASM,DIS}_HASH*): Delete.
559 (init_opcode_table,init_ibld_table): Declare.
560 (CGEN_INSN_ATTR): New type.
561
562 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
563
564 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
565 (x_FP, d_FP, dls_FP, sldx_FP): Define.
566 Change *Suf definitions to include x and d suffixes.
567 (movsx): Use w_Suf and b_Suf.
568 (movzx): Likewise.
569 (movs): Use bwld_Suf.
570 (fld): Change ordering. Use sld_FP.
571 (fild): Add Intel Syntax equivalent of fildq.
572 (fst): Use sld_FP.
573 (fist): Use sld_FP.
574 (fstp): Use sld_FP. Add x_FP version.
575 (fistp): LLongMem version for Intel Syntax.
576 (fcom, fcomp): Use sld_FP.
577 (fadd, fiadd, fsub): Use sld_FP.
578 (fsubr): Use sld_FP.
579 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
580
581 1999-01-27 Doug Evans <devans@casey.cygnus.com>
582
583 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
584 CGEN_MODE_UINT.
585
586 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
587
588 * hppa.h (bv): Fix mask.
589
590 1999-01-05 Doug Evans <devans@casey.cygnus.com>
591
592 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
593 (CGEN_ATTR): Use it.
594 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
595 (CGEN_ATTR_TABLE): New member dfault.
596
597 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
598
599 * mips.h (MIPS16_INSN_BRANCH): New.
600
601 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
602
603 The following is part of a change made by Edith Epstein
604 <eepstein@sophia.cygnus.com> as part of a project to merge in
605 changes by HP; HP did not create ChangeLog entries.
606
607 * hppa.h (completer_chars): list of chars to not put a space
608 after.
609
610 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
611
612 * i386.h (i386_optab): Permit w suffix on processor control and
613 status word instructions.
614
615 1998-11-30 Doug Evans <devans@casey.cygnus.com>
616
617 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
618 (struct cgen_keyword_entry): Ditto.
619 (struct cgen_operand): Ditto.
620 (CGEN_IFLD): New typedef, with associated access macros.
621 (CGEN_IFMT): New typedef, with associated access macros.
622 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
623 (CGEN_IVALUE): New typedef.
624 (struct cgen_insn): Delete const on syntax,attrs members.
625 `format' now points to format data. Type of `value' is now
626 CGEN_IVALUE.
627 (struct cgen_opcode_table): New member ifld_table.
628
629 1998-11-18 Doug Evans <devans@casey.cygnus.com>
630
631 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
632 (CGEN_OPERAND_INSTANCE): New member `attrs'.
633 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
634 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
635 (cgen_opcode_table): Update type of dis_hash fn.
636 (extract_operand): Update type of `insn_value' arg.
637
638 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
639
640 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
641
642 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
643
644 * mips.h (INSN_MULT): Added.
645
646 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
647
648 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
649
650 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
651
652 * cgen.h (CGEN_INSN_INT): New typedef.
653 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
654 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
655 (CGEN_INSN_BYTES_PTR): New typedef.
656 (CGEN_EXTRACT_INFO): New typedef.
657 (cgen_insert_fn,cgen_extract_fn): Update.
658 (cgen_opcode_table): New member `insn_endian'.
659 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
660 (insert_operand,extract_operand): Update.
661 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
662
663 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
664
665 * cgen.h (CGEN_ATTR_BOOLS): New macro.
666 (struct CGEN_HW_ENTRY): New member `attrs'.
667 (CGEN_HW_ATTR): New macro.
668 (struct CGEN_OPERAND_INSTANCE): New member `name'.
669 (CGEN_INSN_INVALID_P): New macro.
670
671 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
672
673 * hppa.h: Add "fid".
674
675 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
676
677 From Robert Andrew Dale <rob@nb.net>
678 * i386.h (i386_optab): Add AMD 3DNow! instructions.
679 (AMD_3DNOW_OPCODE): Define.
680
681 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
682
683 * d30v.h (EITHER_BUT_PREFER_MU): Define.
684
685 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
686
687 * cgen.h (cgen_insn): #if 0 out element `cdx'.
688
689 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
690
691 Move all global state data into opcode table struct, and treat
692 opcode table as something that is "opened/closed".
693 * cgen.h (CGEN_OPCODE_DESC): New type.
694 (all fns): New first arg of opcode table descriptor.
695 (cgen_set_parse_operand_fn): Add prototype.
696 (cgen_current_machine,cgen_current_endian): Delete.
697 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
698 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
699 dis_hash_table,dis_hash_table_entries.
700 (opcode_open,opcode_close): Add prototypes.
701
702 * cgen.h (cgen_insn): New element `cdx'.
703
704 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
705
706 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
707
708 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
709
710 * mn10300.h: Add "no_match_operands" field for instructions.
711 (MN10300_MAX_OPERANDS): Define.
712
713 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
714
715 * cgen.h (cgen_macro_insn_count): Declare.
716
717 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
718
719 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
720 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
721 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
722 set_{int,vma}_operand.
723
724 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
725
726 * mn10300.h: Add "machine" field for instructions.
727 (MN103, AM30): Define machine types.
728
729 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
730
731 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
732
733 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
734
735 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
736
737 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
738
739 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
740 and ud2b.
741 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
742 those that happen to be implemented on pentiums.
743
744 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
745
746 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
747 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
748 with Size16|IgnoreSize or Size32|IgnoreSize.
749
750 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
751
752 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
753 (REPE): Rename to REPE_PREFIX_OPCODE.
754 (i386_regtab_end): Remove.
755 (i386_prefixtab, i386_prefixtab_end): Remove.
756 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
757 of md_begin.
758 (MAX_OPCODE_SIZE): Define.
759 (i386_optab_end): Remove.
760 (sl_Suf): Define.
761 (sl_FP): Use sl_Suf.
762
763 * i386.h (i386_optab): Allow 16 bit displacement for `mov
764 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
765 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
766 data32, dword, and adword prefixes.
767 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
768 regs.
769
770 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
771
772 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
773
774 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
775 register operands, because this is a common idiom. Flag them with
776 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
777 fdivrp because gcc erroneously generates them. Also flag with a
778 warning.
779
780 * i386.h: Add suffix modifiers to most insns, and tighter operand
781 checks in some cases. Fix a number of UnixWare compatibility
782 issues with float insns. Merge some floating point opcodes, using
783 new FloatMF modifier.
784 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
785 consistency.
786
787 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
788 IgnoreDataSize where appropriate.
789
790 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
791
792 * i386.h: (one_byte_segment_defaults): Remove.
793 (two_byte_segment_defaults): Remove.
794 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
795
796 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
797
798 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
799 (cgen_hw_lookup_by_num): Declare.
800
801 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
802
803 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
804 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
805
806 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
807
808 * cgen.h (cgen_asm_init_parse): Delete.
809 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
810 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
811
812 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
813
814 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
815 (cgen_asm_finish_insn): Update prototype.
816 (cgen_insn): New members num, data.
817 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
818 dis_hash, dis_hash_table_size moved to ...
819 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
820 All uses updated. New members asm_hash_p, dis_hash_p.
821 (CGEN_MINSN_EXPANSION): New struct.
822 (cgen_expand_macro_insn): Declare.
823 (cgen_macro_insn_count): Declare.
824 (get_insn_operands): Update prototype.
825 (lookup_get_insn_operands): Declare.
826
827 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
828
829 * i386.h (i386_optab): Change iclrKludge and imulKludge to
830 regKludge. Add operands types for string instructions.
831
832 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
833
834 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
835 table.
836
837 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
838
839 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
840 for `gettext'.
841
842 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
843
844 * i386.h: Remove NoModrm flag from all insns: it's never checked.
845 Add IsString flag to string instructions.
846 (IS_STRING): Don't define.
847 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
848 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
849 (SS_PREFIX_OPCODE): Define.
850
851 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
852
853 * i386.h: Revert March 24 patch; no more LinearAddress.
854
855 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
856
857 * i386.h (i386_optab): Remove fwait (9b) from all floating point
858 instructions, and instead add FWait opcode modifier. Add short
859 form of fldenv and fstenv.
860 (FWAIT_OPCODE): Define.
861
862 * i386.h (i386_optab): Change second operand constraint of `mov
863 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
864 allow legal instructions such as `movl %gs,%esi'
865
866 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
867
868 * h8300.h: Various changes to fully bracket initializers.
869
870 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
871
872 * i386.h: Set LinearAddress for lidt and lgdt.
873
874 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
875
876 * cgen.h (CGEN_BOOL_ATTR): New macro.
877
878 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
879
880 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
881
882 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
883
884 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
885 (cgen_insn): Record syntax and format entries here, rather than
886 separately.
887
888 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
889
890 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
891
892 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
893
894 * cgen.h (cgen_insert_fn): Change type of result to const char *.
895 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
896 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
897
898 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
899
900 * cgen.h (lookup_insn): New argument alias_p.
901
902 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
903
904 Fix rac to accept only a0:
905 * d10v.h (OPERAND_ACC): Split into:
906 (OPERAND_ACC0, OPERAND_ACC1) .
907 (OPERAND_GPR): Define.
908
909 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
910
911 * cgen.h (CGEN_FIELDS): Define here.
912 (CGEN_HW_ENTRY): New member `type'.
913 (hw_list): Delete decl.
914 (enum cgen_mode): Declare.
915 (CGEN_OPERAND): New member `hw'.
916 (enum cgen_operand_instance_type): Declare.
917 (CGEN_OPERAND_INSTANCE): New type.
918 (CGEN_INSN): New member `operands'.
919 (CGEN_OPCODE_DATA): Make hw_list const.
920 (get_insn_operands,lookup_insn): Add prototypes for.
921
922 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
923
924 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
925 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
926 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
927 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
928
929 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
930
931 * cgen.h: Correct typo in comment end marker.
932
933 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
934
935 * tic30.h: New file.
936
937 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
938
939 * cgen.h: Add prototypes for cgen_save_fixups(),
940 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
941 of cgen_asm_finish_insn() to return a char *.
942
943 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
944
945 * cgen.h: Formatting changes to improve readability.
946
947 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
948
949 * cgen.h (*): Clean up pass over `struct foo' usage.
950 (CGEN_ATTR): Make unsigned char.
951 (CGEN_ATTR_TYPE): Update.
952 (CGEN_ATTR_{ENTRY,TABLE}): New types.
953 (cgen_base): Move member `attrs' to cgen_insn.
954 (CGEN_KEYWORD): New member `null_entry'.
955 (CGEN_{SYNTAX,FORMAT}): New types.
956 (cgen_insn): Format and syntax separated from each other.
957
958 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
959
960 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
961 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
962 flags_{used,set} long.
963 (d30v_operand): Make flags field long.
964
965 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
966
967 * m68k.h: Fix comment describing operand types.
968
969 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
970
971 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
972 everything else after down.
973
974 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
975
976 * d10v.h (OPERAND_FLAG): Split into:
977 (OPERAND_FFLAG, OPERAND_CFLAG) .
978
979 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
980
981 * mips.h (struct mips_opcode): Changed comments to reflect new
982 field usage.
983
984 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
985
986 * mips.h: Added to comments a quick-ref list of all assigned
987 operand type characters.
988 (OP_{MASK,SH}_PERFREG): New macros.
989
990 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
991
992 * sparc.h: Add '_' and '/' for v9a asr's.
993 Patch from David Miller <davem@vger.rutgers.edu>
994
995 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
996
997 * h8300.h: Bit ops with absolute addresses not in the 8 bit
998 area are not available in the base model (H8/300).
999
1000 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1001
1002 * m68k.h: Remove documentation of ` operand specifier.
1003
1004 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1005
1006 * m68k.h: Document q and v operand specifiers.
1007
1008 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1009
1010 * v850.h (struct v850_opcode): Add processors field.
1011 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1012 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1013 (PROCESSOR_V850EA): New bit constants.
1014
1015 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1016
1017 Merge changes from Martin Hunt:
1018
1019 * d30v.h: Allow up to 64 control registers. Add
1020 SHORT_A5S format.
1021
1022 * d30v.h (LONG_Db): New form for delayed branches.
1023
1024 * d30v.h: (LONG_Db): New form for repeati.
1025
1026 * d30v.h (SHORT_D2B): New form.
1027
1028 * d30v.h (SHORT_A2): New form.
1029
1030 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1031 registers are used. Needed for VLIW optimization.
1032
1033 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1034
1035 * cgen.h: Move assembler interface section
1036 up so cgen_parse_operand_result is defined for cgen_parse_address.
1037 (cgen_parse_address): Update prototype.
1038
1039 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1040
1041 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1042
1043 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1044
1045 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1046 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1047 <paubert@iram.es>.
1048
1049 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1050 <paubert@iram.es>.
1051
1052 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1053 <paubert@iram.es>.
1054
1055 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1056 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1057
1058 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1059
1060 * v850.h (V850_NOT_R0): New flag.
1061
1062 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1063
1064 * v850.h (struct v850_opcode): Remove flags field.
1065
1066 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1067
1068 * v850.h (struct v850_opcode): Add flags field.
1069 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1070 fields.
1071 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1072 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1073
1074 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1075
1076 * arc.h: New file.
1077
1078 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1079
1080 * sparc.h (sparc_opcodes): Declare as const.
1081
1082 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1083
1084 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1085 uses single or double precision floating point resources.
1086 (INSN_NO_ISA, INSN_ISA1): Define.
1087 (cpu specific INSN macros): Tweak into bitmasks outside the range
1088 of INSN_ISA field.
1089
1090 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1091
1092 * i386.h: Fix pand opcode.
1093
1094 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1095
1096 * mips.h: Widen INSN_ISA and move it to a more convenient
1097 bit position. Add INSN_3900.
1098
1099 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1100
1101 * mips.h (struct mips_opcode): added new field membership.
1102
1103 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1104
1105 * i386.h (movd): only Reg32 is allowed.
1106
1107 * i386.h: add fcomp and ud2. From Wayne Scott
1108 <wscott@ichips.intel.com>.
1109
1110 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1111
1112 * i386.h: Add MMX instructions.
1113
1114 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1115
1116 * i386.h: Remove W modifier from conditional move instructions.
1117
1118 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1119
1120 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1121 with no arguments to match that generated by the UnixWare
1122 assembler.
1123
1124 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1125
1126 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1127 (cgen_parse_operand_fn): Declare.
1128 (cgen_init_parse_operand): Declare.
1129 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1130 new argument `want'.
1131 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1132 (enum cgen_parse_operand_type): New enum.
1133
1134 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1135
1136 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1137
1138 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1139
1140 * cgen.h: New file.
1141
1142 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1143
1144 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1145 fdivrp.
1146
1147 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1148
1149 * v850.h (extract): Make unsigned.
1150
1151 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1152
1153 * i386.h: Add iclr.
1154
1155 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1156
1157 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1158 take a direction bit.
1159
1160 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1161
1162 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1163
1164 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1165
1166 * sparc.h: Include <ansidecl.h>. Update function declarations to
1167 use prototypes, and to use const when appropriate.
1168
1169 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1170
1171 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1172
1173 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1174
1175 * d10v.h: Change pre_defined_registers to
1176 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1177
1178 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1179
1180 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1181 Change mips_opcodes from const array to a pointer,
1182 and change bfd_mips_num_opcodes from const int to int,
1183 so that we can increase the size of the mips opcodes table
1184 dynamically.
1185
1186 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1187
1188 * d30v.h (FLAG_X): Remove unused flag.
1189
1190 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1191
1192 * d30v.h: New file.
1193
1194 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1195
1196 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1197 (PDS_VALUE): Macro to access value field of predefined symbols.
1198 (tic80_next_predefined_symbol): Add prototype.
1199
1200 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1201
1202 * tic80.h (tic80_symbol_to_value): Change prototype to match
1203 change in function, added class parameter.
1204
1205 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1206
1207 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1208 endmask fields, which are somewhat weird in that 0 and 32 are
1209 treated exactly the same.
1210
1211 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1212
1213 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1214 rather than a constant that is 2**X. Reorder them to put bits for
1215 operands that have symbolic names in the upper bits, so they can
1216 be packed into an int where the lower bits contain the value that
1217 corresponds to that symbolic name.
1218 (predefined_symbo): Add struct.
1219 (tic80_predefined_symbols): Declare array of translations.
1220 (tic80_num_predefined_symbols): Declare size of that array.
1221 (tic80_value_to_symbol): Declare function.
1222 (tic80_symbol_to_value): Declare function.
1223
1224 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1225
1226 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1227
1228 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1229
1230 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1231 be the destination register.
1232
1233 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1234
1235 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1236 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1237 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1238 that the opcode can have two vector instructions in a single
1239 32 bit word and we have to encode/decode both.
1240
1241 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1242
1243 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1244 TIC80_OPERAND_RELATIVE for PC relative.
1245 (TIC80_OPERAND_BASEREL): New flag bit for register
1246 base relative.
1247
1248 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1249
1250 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1251
1252 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1253
1254 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1255 ":s" modifier for scaling.
1256
1257 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1258
1259 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1260 (TIC80_OPERAND_M_LI): Ditto
1261
1262 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1263
1264 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1265 (TIC80_OPERAND_CC): New define for condition code operand.
1266 (TIC80_OPERAND_CR): New define for control register operand.
1267
1268 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1269
1270 * tic80.h (struct tic80_opcode): Name changed.
1271 (struct tic80_opcode): Remove format field.
1272 (struct tic80_operand): Add insertion and extraction functions.
1273 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1274 correct ones.
1275 (FMT_*): Ditto.
1276
1277 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1278
1279 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1280 type IV instruction offsets.
1281
1282 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1283
1284 * tic80.h: New file.
1285
1286 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1287
1288 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1289
1290 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1291
1292 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1293 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1294 * v850.h: Fix comment, v850_operand not powerpc_operand.
1295
1296 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1297
1298 * mn10200.h: Flesh out structures and definitions needed by
1299 the mn10200 assembler & disassembler.
1300
1301 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1302
1303 * mips.h: Add mips16 definitions.
1304
1305 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1306
1307 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1308
1309 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1310
1311 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1312 (MN10300_OPERAND_MEMADDR): Define.
1313
1314 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1315
1316 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1317
1318 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1319
1320 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1321
1322 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1323
1324 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1325
1326 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1327
1328 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1329
1330 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1331
1332 * alpha.h: Don't include "bfd.h"; private relocation types are now
1333 negative to minimize problems with shared libraries. Organize
1334 instruction subsets by AMASK extensions and PALcode
1335 implementation.
1336 (struct alpha_operand): Move flags slot for better packing.
1337
1338 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1339
1340 * v850.h (V850_OPERAND_RELAX): New operand flag.
1341
1342 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1343
1344 * mn10300.h (FMT_*): Move operand format definitions
1345 here.
1346
1347 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1348
1349 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1350
1351 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1352
1353 * mn10300.h (mn10300_opcode): Add "format" field.
1354 (MN10300_OPERAND_*): Define.
1355
1356 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1357
1358 * mn10x00.h: Delete.
1359 * mn10200.h, mn10300.h: New files.
1360
1361 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1362
1363 * mn10x00.h: New file.
1364
1365 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1366
1367 * v850.h: Add new flag to indicate this instruction uses a PC
1368 displacement.
1369
1370 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1371
1372 * h8300.h (stmac): Add missing instruction.
1373
1374 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1375
1376 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1377 field.
1378
1379 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1380
1381 * v850.h (V850_OPERAND_EP): Define.
1382
1383 * v850.h (v850_opcode): Add size field.
1384
1385 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1386
1387 * v850.h (v850_operands): Add insert and extract fields, pointers
1388 to functions used to handle unusual operand encoding.
1389 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1390 V850_OPERAND_SIGNED): Defined.
1391
1392 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1393
1394 * v850.h (v850_operands): Add flags field.
1395 (OPERAND_REG, OPERAND_NUM): Defined.
1396
1397 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1398
1399 * v850.h: New file.
1400
1401 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1402
1403 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1404 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1405 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1406 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1407 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1408 Defined.
1409
1410 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1411
1412 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1413 a 3 bit space id instead of a 2 bit space id.
1414
1415 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1416
1417 * d10v.h: Add some additional defines to support the
1418 assembler in determining which operations can be done in parallel.
1419
1420 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1421
1422 * h8300.h (SN): Define.
1423 (eepmov.b): Renamed from "eepmov"
1424 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1425 with them.
1426
1427 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1428
1429 * d10v.h (OPERAND_SHIFT): New operand flag.
1430
1431 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1432
1433 * d10v.h: Changes for divs, parallel-only instructions, and
1434 signed numbers.
1435
1436 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1437
1438 * d10v.h (pd_reg): Define. Putting the definition here allows
1439 the assembler and disassembler to share the same struct.
1440
1441 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1442
1443 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1444 Williams <steve@icarus.com>.
1445
1446 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1447
1448 * d10v.h: New file.
1449
1450 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1451
1452 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1453
1454 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1455
1456 * m68k.h (mcf5200): New macro.
1457 Document names of coldfire control registers.
1458
1459 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1460
1461 * h8300.h (SRC_IN_DST): Define.
1462
1463 * h8300.h (UNOP3): Mark the register operand in this insn
1464 as a source operand, not a destination operand.
1465 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1466 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1467 register operand with SRC_IN_DST.
1468
1469 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1470
1471 * alpha.h: New file.
1472
1473 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1474
1475 * rs6k.h: Remove obsolete file.
1476
1477 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1478
1479 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1480 fdivp, and fdivrp. Add ffreep.
1481
1482 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1483
1484 * h8300.h: Reorder various #defines for readability.
1485 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1486 (BITOP): Accept additional (unused) argument. All callers changed.
1487 (EBITOP): Likewise.
1488 (O_LAST): Bump.
1489 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1490
1491 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1492 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1493 (BITOP, EBITOP): Handle new H8/S addressing modes for
1494 bit insns.
1495 (UNOP3): Handle new shift/rotate insns on the H8/S.
1496 (insns using exr): New instructions.
1497 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1498
1499 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1500
1501 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1502 was incorrect.
1503
1504 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1505
1506 * h8300.h (START): Remove.
1507 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1508 and mov.l insns that can be relaxed.
1509
1510 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1511
1512 * i386.h: Remove Abs32 from lcall.
1513
1514 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1515
1516 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1517 (SLCPOP): New macro.
1518 Mark X,Y opcode letters as in use.
1519
1520 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1521
1522 * sparc.h (F_FLOAT, F_FBR): Define.
1523
1524 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1525
1526 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1527 from all insns.
1528 (ABS8SRC,ABS8DST): Add ABS8MEM.
1529 (add.l): Fix reg+reg variant.
1530 (eepmov.w): Renamed from eepmovw.
1531 (ldc,stc): Fix many cases.
1532
1533 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1534
1535 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1536
1537 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1538
1539 * sparc.h (O): Mark operand letter as in use.
1540
1541 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1542
1543 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1544 Mark operand letters uU as in use.
1545
1546 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1547
1548 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1549 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1550 (SPARC_OPCODE_SUPPORTED): New macro.
1551 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1552 (F_NOTV9): Delete.
1553
1554 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1555
1556 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1557 declaration consistent with return type in definition.
1558
1559 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1560
1561 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1562
1563 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1564
1565 * i386.h (i386_regtab): Add 80486 test registers.
1566
1567 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1568
1569 * i960.h (I_HX): Define.
1570 (i960_opcodes): Add HX instruction.
1571
1572 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1573
1574 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1575 and fclex.
1576
1577 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1578
1579 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1580 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1581 (bfd_* defines): Delete.
1582 (sparc_opcode_archs): Replaces architecture_pname.
1583 (sparc_opcode_lookup_arch): Declare.
1584 (NUMOPCODES): Delete.
1585
1586 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1587
1588 * sparc.h (enum sparc_architecture): Add v9a.
1589 (ARCHITECTURES_CONFLICT_P): Update.
1590
1591 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1592
1593 * i386.h: Added Pentium Pro instructions.
1594
1595 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1596
1597 * m68k.h: Document new 'W' operand place.
1598
1599 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1600
1601 * hppa.h: Add lci and syncdma instructions.
1602
1603 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1604
1605 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1606 instructions.
1607
1608 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1609
1610 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1611 assembler's -mcom and -many switches.
1612
1613 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1614
1615 * i386.h: Fix cmpxchg8b extension opcode description.
1616
1617 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1618
1619 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1620 and register cr4.
1621
1622 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1623
1624 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1625
1626 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1627
1628 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1629
1630 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1631
1632 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1633
1634 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1635
1636 * m68kmri.h: Remove.
1637
1638 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1639 declarations. Remove F_ALIAS and flag field of struct
1640 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1641 int. Make name and args fields of struct m68k_opcode const.
1642
1643 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1644
1645 * sparc.h (F_NOTV9): Define.
1646
1647 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1648
1649 * mips.h (INSN_4010): Define.
1650
1651 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1652
1653 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1654
1655 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1656 * m68k.h: Fix argument descriptions of coprocessor
1657 instructions to allow only alterable operands where appropriate.
1658 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1659 (m68k_opcode_aliases): Add more aliases.
1660
1661 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1662
1663 * m68k.h: Added explcitly short-sized conditional branches, and a
1664 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1665 svr4-based configurations.
1666
1667 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1668
1669 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1670 * i386.h: added missing Data16/Data32 flags to a few instructions.
1671
1672 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1673
1674 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1675 (OP_MASK_BCC, OP_SH_BCC): Define.
1676 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1677 (OP_MASK_CCC, OP_SH_CCC): Define.
1678 (INSN_READ_FPR_R): Define.
1679 (INSN_RFE): Delete.
1680
1681 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1682
1683 * m68k.h (enum m68k_architecture): Deleted.
1684 (struct m68k_opcode_alias): New type.
1685 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1686 matching constraints, values and flags. As a side effect of this,
1687 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1688 as I know were never used, now may need re-examining.
1689 (numopcodes): Now const.
1690 (m68k_opcode_aliases, numaliases): New variables.
1691 (endop): Deleted.
1692 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1693 m68k_opcode_aliases; update declaration of m68k_opcodes.
1694
1695 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1696
1697 * hppa.h (delay_type): Delete unused enumeration.
1698 (pa_opcode): Replace unused delayed field with an architecture
1699 field.
1700 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1701
1702 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1703
1704 * mips.h (INSN_ISA4): Define.
1705
1706 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1707
1708 * mips.h (M_DLA_AB, M_DLI): Define.
1709
1710 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1711
1712 * hppa.h (fstwx): Fix single-bit error.
1713
1714 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1715
1716 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1717
1718 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1719
1720 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1721 debug registers. From Charles Hannum (mycroft@netbsd.org).
1722
1723 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1724
1725 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1726 i386 support:
1727 * i386.h (MOV_AX_DISP32): New macro.
1728 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1729 of several call/return instructions.
1730 (ADDR_PREFIX_OPCODE): New macro.
1731
1732 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1733
1734 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1735
1736 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1737 it pointer to const char;
1738 (struct vot, field `name'): ditto.
1739
1740 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1741
1742 * vax.h: Supply and properly group all values in end sentinel.
1743
1744 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1745
1746 * mips.h (INSN_ISA, INSN_4650): Define.
1747
1748 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1749
1750 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1751 systems with a separate instruction and data cache, such as the
1752 29040, these instructions take an optional argument.
1753
1754 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1755
1756 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1757 INSN_TRAP.
1758
1759 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1760
1761 * mips.h (INSN_STORE_MEMORY): Define.
1762
1763 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1764
1765 * sparc.h: Document new operand type 'x'.
1766
1767 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1768
1769 * i960.h (I_CX2): New instruction category. It includes
1770 instructions available on Cx and Jx processors.
1771 (I_JX): New instruction category, for JX-only instructions.
1772 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1773 Jx-only instructions, in I_JX category.
1774
1775 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1776
1777 * ns32k.h (endop): Made pointer const too.
1778
1779 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1780
1781 * ns32k.h: Drop Q operand type as there is no correct use
1782 for it. Add I and Z operand types which allow better checking.
1783
1784 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1785
1786 * h8300.h (xor.l) :fix bit pattern.
1787 (L_2): New size of operand.
1788 (trapa): Use it.
1789
1790 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1791
1792 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1793
1794 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1795
1796 * sparc.h: Include v9 definitions.
1797
1798 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1799
1800 * m68k.h (m68060): Defined.
1801 (m68040up, mfloat, mmmu): Include it.
1802 (struct m68k_opcode): Widen `arch' field.
1803 (m68k_opcodes): Updated for M68060. Removed comments that were
1804 instructions commented out by "JF" years ago.
1805
1806 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1807
1808 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1809 add a one-bit `flags' field.
1810 (F_ALIAS): New macro.
1811
1812 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1813
1814 * h8300.h (dec, inc): Get encoding right.
1815
1816 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1817
1818 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1819 a flag instead.
1820 (PPC_OPERAND_SIGNED): Define.
1821 (PPC_OPERAND_SIGNOPT): Define.
1822
1823 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1824
1825 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1826 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1827
1828 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1829
1830 * i386.h: Reverse last change. It'll be handled in gas instead.
1831
1832 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1833
1834 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1835 slower on the 486 and used the implicit shift count despite the
1836 explicit operand. The one-operand form is still available to get
1837 the shorter form with the implicit shift count.
1838
1839 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1840
1841 * hppa.h: Fix typo in fstws arg string.
1842
1843 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1844
1845 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1846
1847 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1848
1849 * ppc.h (PPC_OPCODE_601): Define.
1850
1851 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1852
1853 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1854 (so we can determine valid completers for both addb and addb[tf].)
1855
1856 * hppa.h (xmpyu): No floating point format specifier for the
1857 xmpyu instruction.
1858
1859 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1860
1861 * ppc.h (PPC_OPERAND_NEXT): Define.
1862 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1863 (struct powerpc_macro): Define.
1864 (powerpc_macros, powerpc_num_macros): Declare.
1865
1866 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1867
1868 * ppc.h: New file. Header file for PowerPC opcode table.
1869
1870 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1871
1872 * hppa.h: More minor template fixes for sfu and copr (to allow
1873 for easier disassembly).
1874
1875 * hppa.h: Fix templates for all the sfu and copr instructions.
1876
1877 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1878
1879 * i386.h (push): Permit Imm16 operand too.
1880
1881 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1882
1883 * h8300.h (andc): Exists in base arch.
1884
1885 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1886
1887 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1888 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1889
1890 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1891
1892 * hppa.h: Add FP quadword store instructions.
1893
1894 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1895
1896 * mips.h: (M_J_A): Added.
1897 (M_LA): Removed.
1898
1899 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1900
1901 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1902 <mellon@pepper.ncd.com>.
1903
1904 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1905
1906 * hppa.h: Immediate field in probei instructions is unsigned,
1907 not low-sign extended.
1908
1909 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1910
1911 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1912
1913 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1914
1915 * i386.h: Add "fxch" without operand.
1916
1917 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1918
1919 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1920
1921 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1922
1923 * hppa.h: Add gfw and gfr to the opcode table.
1924
1925 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1926
1927 * m88k.h: extended to handle m88110.
1928
1929 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1930
1931 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1932 addresses.
1933
1934 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1935
1936 * i960.h (i960_opcodes): Properly bracket initializers.
1937
1938 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1939
1940 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1941
1942 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1943
1944 * m68k.h (two): Protect second argument with parentheses.
1945
1946 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1947
1948 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1949 Deleted old in/out instructions in "#if 0" section.
1950
1951 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1952
1953 * i386.h (i386_optab): Properly bracket initializers.
1954
1955 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1956
1957 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1958 Jeff Law, law@cs.utah.edu).
1959
1960 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1961
1962 * i386.h (lcall): Accept Imm32 operand also.
1963
1964 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1965
1966 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1967 (M_DABS): Added.
1968
1969 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1970
1971 * mips.h (INSN_*): Changed values. Removed unused definitions.
1972 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1973 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1974 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1975 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1976 (M_*): Added new values for r6000 and r4000 macros.
1977 (ANY_DELAY): Removed.
1978
1979 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1980
1981 * mips.h: Added M_LI_S and M_LI_SS.
1982
1983 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1984
1985 * h8300.h: Get some rare mov.bs correct.
1986
1987 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1988
1989 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1990 been included.
1991
1992 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1993
1994 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1995 jump instructions, for use in disassemblers.
1996
1997 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1998
1999 * m88k.h: Make bitfields just unsigned, not unsigned long or
2000 unsigned short.
2001
2002 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2003
2004 * hppa.h: New argument type 'y'. Use in various float instructions.
2005
2006 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2007
2008 * hppa.h (break): First immediate field is unsigned.
2009
2010 * hppa.h: Add rfir instruction.
2011
2012 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2013
2014 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2015
2016 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2017
2018 * mips.h: Reworked the hazard information somewhat, and fixed some
2019 bugs in the instruction hazard descriptions.
2020
2021 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2022
2023 * m88k.h: Corrected a couple of opcodes.
2024
2025 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2026
2027 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2028 new version includes instruction hazard information, but is
2029 otherwise reasonably similar.
2030
2031 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2032
2033 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2034
2035 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2036
2037 Patches from Jeff Law, law@cs.utah.edu:
2038 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2039 Make the tables be the same for the following instructions:
2040 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2041 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2042 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2043 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2044 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2045 "fcmp", and "ftest".
2046
2047 * hppa.h: Make new and old tables the same for "break", "mtctl",
2048 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2049 Fix typo in last patch. Collapse several #ifdefs into a
2050 single #ifdef.
2051
2052 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2053 of the comments up-to-date.
2054
2055 * hppa.h: Update "free list" of letters and update
2056 comments describing each letter's function.
2057
2058 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2059
2060 * h8300.h: checkpoint, includes H8/300-H opcodes.
2061
2062 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2063
2064 * Patches from Jeffrey Law <law@cs.utah.edu>.
2065 * hppa.h: Rework single precision FP
2066 instructions so that they correctly disassemble code
2067 PA1.1 code.
2068
2069 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2070
2071 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2072 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2073
2074 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2075
2076 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2077 gdb will define it for now.
2078
2079 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2080
2081 * sparc.h: Don't end enumerator list with comma.
2082
2083 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2084
2085 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2086 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2087 ("bc2t"): Correct typo.
2088 ("[ls]wc[023]"): Use T rather than t.
2089 ("c[0123]"): Define general coprocessor instructions.
2090
2091 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2092
2093 * m68k.h: Move split point for gcc compilation more towards
2094 middle.
2095
2096 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2097
2098 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2099 simply wrong, ics, rfi, & rfsvc were missing).
2100 Add "a" to opr_ext for "bb". Doc fix.
2101
2102 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2103
2104 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2105 * mips.h: Add casts, to suppress warnings about shifting too much.
2106 * m68k.h: Document the placement code '9'.
2107
2108 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2109
2110 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2111 allows callers to break up the large initialized struct full of
2112 opcodes into two half-sized ones. This permits GCC to compile
2113 this module, since it takes exponential space for initializers.
2114 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2115
2116 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2117
2118 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2119 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2120 initialized structs in it.
2121
2122 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2123
2124 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2125 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2126 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2127
2128 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2129
2130 * mips.h: document "i" and "j" operands correctly.
2131
2132 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2133
2134 * mips.h: Removed endianness dependency.
2135
2136 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2137
2138 * h8300.h: include info on number of cycles per instruction.
2139
2140 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2141
2142 * hppa.h: Move handy aliases to the front. Fix masks for extract
2143 and deposit instructions.
2144
2145 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2146
2147 * i386.h: accept shld and shrd both with and without the shift
2148 count argument, which is always %cl.
2149
2150 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2151
2152 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2153 (one_byte_segment_defaults, two_byte_segment_defaults,
2154 i386_prefixtab_end): Ditto.
2155
2156 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2157
2158 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2159 for operand 2; from John Carr, jfc@dsg.dec.com.
2160
2161 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2162
2163 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2164 always use 16-bit offsets. Makes calculated-size jump tables
2165 feasible.
2166
2167 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2168
2169 * i386.h: Fix one-operand forms of in* and out* patterns.
2170
2171 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2172
2173 * m68k.h: Added CPU32 support.
2174
2175 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2176
2177 * mips.h (break): Disassemble the argument. Patch from
2178 jonathan@cs.stanford.edu (Jonathan Stone).
2179
2180 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2181
2182 * m68k.h: merged Motorola and MIT syntax.
2183
2184 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2185
2186 * m68k.h (pmove): make the tests less strict, the 68k book is
2187 wrong.
2188
2189 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2190
2191 * m68k.h (m68ec030): Defined as alias for 68030.
2192 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2193 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2194 them. Tightened description of "fmovex" to distinguish it from
2195 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2196 up descriptions that claimed versions were available for chips not
2197 supporting them. Added "pmovefd".
2198
2199 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2200
2201 * m68k.h: fix where the . goes in divull
2202
2203 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2204
2205 * m68k.h: the cas2 instruction is supposed to be written with
2206 indirection on the last two operands, which can be either data or
2207 address registers. Added a new operand type 'r' which accepts
2208 either register type. Added new cases for cas2l and cas2w which
2209 use them. Corrected masks for cas2 which failed to recognize use
2210 of address register.
2211
2212 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2213
2214 * m68k.h: Merged in patches (mostly m68040-specific) from
2215 Colin Smith <colin@wrs.com>.
2216
2217 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2218 base). Also cleaned up duplicates, re-ordered instructions for
2219 the sake of dis-assembling (so aliases come after standard names).
2220 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2221
2222 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2223
2224 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2225 all missing .s
2226
2227 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2228
2229 * sparc.h: Moved tables to BFD library.
2230
2231 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2232
2233 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2234
2235 * h8300.h: Finish filling in all the holes in the opcode table,
2236 so that the Lucid C compiler can digest this as well...
2237
2238 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2239
2240 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2241 Fix opcodes on various sizes of fild/fist instructions
2242 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2243 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2244
2245 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2246
2247 * h8300.h: Fill in all the holes in the opcode table so that the
2248 losing HPUX C compiler can digest this...
2249
2250 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2251
2252 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2253 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2254
2255 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2256
2257 * sparc.h: Add new architecture variant sparclite; add its scan
2258 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2259
2260 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2261
2262 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2263 fy@lucid.com).
2264
2265 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2266
2267 * rs6k.h: New version from IBM (Metin).
2268
2269 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2270
2271 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2272 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2273
2274 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2275
2276 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2277
2278 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2279
2280 * m68k.h (one, two): Cast macro args to unsigned to suppress
2281 complaints from compiler and lint about integer overflow during
2282 shift.
2283
2284 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2285
2286 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2287
2288 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2289
2290 * mips.h: Make bitfield layout depend on the HOST compiler,
2291 not on the TARGET system.
2292
2293 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2294
2295 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2296 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2297 <TRANLE@INTELLICORP.COM>.
2298
2299 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2300
2301 * h8300.h: turned op_type enum into #define list
2302
2303 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2304
2305 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2306 similar instructions -- they've been renamed to "fitoq", etc.
2307 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2308 number of arguments.
2309 * h8300.h: Remove extra ; which produces compiler warning.
2310
2311 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2312
2313 * sparc.h: fix opcode for tsubcctv.
2314
2315 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2316
2317 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2318
2319 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2320
2321 * sparc.h (nop): Made the 'lose' field be even tighter,
2322 so only a standard 'nop' is disassembled as a nop.
2323
2324 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2325
2326 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2327 disassembled as a nop.
2328
2329 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2330
2331 * sparc.h: fix a typo.
2332
2333 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2334
2335 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2336 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2337 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2338
2339 \f
2340 Local Variables:
2341 version-control: never
2342 End:
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