* hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
2
3 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
4 an explicit output argument.
5
6 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
7
8 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
9 Add a few PA2.0 loads and store variants.
10
11 1999-09-04 Steve Chamberlain <sac@pobox.com>
12
13 * pj.h: New file.
14
15 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
16
17 * i386.h (i386_regtab): Move %st to top of table, and split off
18 other fp reg entries.
19 (i386_float_regtab): To here.
20
21 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
22
23 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
24 by 'f'.
25
26 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
27 Add supporting args.
28
29 * hppa.h: Document new completers and args.
30 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
31 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
32 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
33 pmenb and pmdis.
34
35 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
36 hshr, hsub, mixh, mixw, permh.
37
38 * hppa.h (pa_opcodes): Change completers in instructions to
39 use 'c' prefix.
40
41 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
42 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
43
44 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
45 fnegabs to use 'I' instead of 'F'.
46
47 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
48
49 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
50 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
51 Alphabetically sort PIII insns.
52
53 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
54
55 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
56
57 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
58
59 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
60 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
61
62 * hppa.h: Document 64 bit condition completers.
63
64 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
65
66 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
67
68 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
69
70 * i386.h (i386_optab): Add DefaultSize modifier to all insns
71 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
72 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
73
74 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
75 Jeff Law <law@cygnus.com>
76
77 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
78
79 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
80
81 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
82 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
83
84 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
85
86 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
87
88 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
89
90 * hppa.h (struct pa_opcode): Add new field "flags".
91 (FLAGS_STRICT): Define.
92
93 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
94 Jeff Law <law@cygnus.com>
95
96 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
97
98 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
99
100 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
101
102 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
103 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
104 flag to fcomi and friends.
105
106 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
107
108 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
109 integer logical instructions.
110
111 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
112
113 * m68k.h: Document new formats `E', `G', `H' and new places `N',
114 `n', `o'.
115
116 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
117 and new places `m', `M', `h'.
118
119 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
120
121 * hppa.h (pa_opcodes): Add several processor specific system
122 instructions.
123
124 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
125
126 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
127 "addb", and "addib" to be used by the disassembler.
128
129 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
130
131 * i386.h (ReverseModrm): Remove all occurences.
132 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
133 movmskps, pextrw, pmovmskb, maskmovq.
134 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
135 ignore the data size prefix.
136
137 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
138 Mostly stolen from Doug Ledford <dledford@redhat.com>
139
140 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
141
142 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
143
144 1999-04-14 Doug Evans <devans@casey.cygnus.com>
145
146 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
147 (CGEN_ATTR_TYPE): Update.
148 (CGEN_ATTR_MASK): Number booleans starting at 0.
149 (CGEN_ATTR_VALUE): Update.
150 (CGEN_INSN_ATTR): Update.
151
152 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
153
154 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
155 instructions.
156
157 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
158
159 * hppa.h (bb, bvb): Tweak opcode/mask.
160
161
162 1999-03-22 Doug Evans <devans@casey.cygnus.com>
163
164 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
165 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
166 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
167 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
168 Delete member max_insn_size.
169 (enum cgen_cpu_open_arg): New enum.
170 (cpu_open): Update prototype.
171 (cpu_open_1): Declare.
172 (cgen_set_cpu): Delete.
173
174 1999-03-11 Doug Evans <devans@casey.cygnus.com>
175
176 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
177 (CGEN_OPERAND_NIL): New macro.
178 (CGEN_OPERAND): New member `type'.
179 (@arch@_cgen_operand_table): Delete decl.
180 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
181 (CGEN_OPERAND_TABLE): New struct.
182 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
183 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
184 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
185 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
186 {get,set}_{int,vma}_operand.
187 (@arch@_cgen_cpu_open): New arg `isa'.
188 (cgen_set_cpu): Ditto.
189
190 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
191
192 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
193
194 1999-02-25 Doug Evans <devans@casey.cygnus.com>
195
196 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
197 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
198 enum cgen_hw_type.
199 (CGEN_HW_TABLE): New struct.
200 (hw_table): Delete declaration.
201 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
202 to table entry to enum.
203 (CGEN_OPINST): Ditto.
204 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
205
206 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
207
208 * alpha.h (AXP_OPCODE_EV6): New.
209 (AXP_OPCODE_NOPAL): Include it.
210
211 1999-02-09 Doug Evans <devans@casey.cygnus.com>
212
213 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
214 All uses updated. New members int_insn_p, max_insn_size,
215 parse_operand,insert_operand,extract_operand,print_operand,
216 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
217 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
218 extract_handlers,print_handlers.
219 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
220 (CGEN_ATTR_BOOL_OFFSET): New macro.
221 (CGEN_ATTR_MASK): Subtract it to compute bit number.
222 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
223 (cgen_opcode_handler): Renamed from cgen_base.
224 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
225 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
226 all uses updated.
227 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
228 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
229 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
230 (CGEN_OPCODE,CGEN_IBASE): New types.
231 (CGEN_INSN): Rewrite.
232 (CGEN_{ASM,DIS}_HASH*): Delete.
233 (init_opcode_table,init_ibld_table): Declare.
234 (CGEN_INSN_ATTR): New type.
235
236 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
237
238 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
239 (x_FP, d_FP, dls_FP, sldx_FP): Define.
240 Change *Suf definitions to include x and d suffixes.
241 (movsx): Use w_Suf and b_Suf.
242 (movzx): Likewise.
243 (movs): Use bwld_Suf.
244 (fld): Change ordering. Use sld_FP.
245 (fild): Add Intel Syntax equivalent of fildq.
246 (fst): Use sld_FP.
247 (fist): Use sld_FP.
248 (fstp): Use sld_FP. Add x_FP version.
249 (fistp): LLongMem version for Intel Syntax.
250 (fcom, fcomp): Use sld_FP.
251 (fadd, fiadd, fsub): Use sld_FP.
252 (fsubr): Use sld_FP.
253 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
254
255 1999-01-27 Doug Evans <devans@casey.cygnus.com>
256
257 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
258 CGEN_MODE_UINT.
259
260 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
261
262 * hppa.h (bv): Fix mask.
263
264 1999-01-05 Doug Evans <devans@casey.cygnus.com>
265
266 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
267 (CGEN_ATTR): Use it.
268 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
269 (CGEN_ATTR_TABLE): New member dfault.
270
271 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
272
273 * mips.h (MIPS16_INSN_BRANCH): New.
274
275 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
276
277 The following is part of a change made by Edith Epstein
278 <eepstein@sophia.cygnus.com> as part of a project to merge in
279 changes by HP; HP did not create ChangeLog entries.
280
281 * hppa.h (completer_chars): list of chars to not put a space
282 after.
283
284 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
285
286 * i386.h (i386_optab): Permit w suffix on processor control and
287 status word instructions.
288
289 1998-11-30 Doug Evans <devans@casey.cygnus.com>
290
291 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
292 (struct cgen_keyword_entry): Ditto.
293 (struct cgen_operand): Ditto.
294 (CGEN_IFLD): New typedef, with associated access macros.
295 (CGEN_IFMT): New typedef, with associated access macros.
296 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
297 (CGEN_IVALUE): New typedef.
298 (struct cgen_insn): Delete const on syntax,attrs members.
299 `format' now points to format data. Type of `value' is now
300 CGEN_IVALUE.
301 (struct cgen_opcode_table): New member ifld_table.
302
303 1998-11-18 Doug Evans <devans@casey.cygnus.com>
304
305 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
306 (CGEN_OPERAND_INSTANCE): New member `attrs'.
307 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
308 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
309 (cgen_opcode_table): Update type of dis_hash fn.
310 (extract_operand): Update type of `insn_value' arg.
311
312 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
313
314 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
315
316 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
317
318 * mips.h (INSN_MULT): Added.
319
320 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
321
322 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
323
324 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
325
326 * cgen.h (CGEN_INSN_INT): New typedef.
327 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
328 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
329 (CGEN_INSN_BYTES_PTR): New typedef.
330 (CGEN_EXTRACT_INFO): New typedef.
331 (cgen_insert_fn,cgen_extract_fn): Update.
332 (cgen_opcode_table): New member `insn_endian'.
333 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
334 (insert_operand,extract_operand): Update.
335 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
336
337 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
338
339 * cgen.h (CGEN_ATTR_BOOLS): New macro.
340 (struct CGEN_HW_ENTRY): New member `attrs'.
341 (CGEN_HW_ATTR): New macro.
342 (struct CGEN_OPERAND_INSTANCE): New member `name'.
343 (CGEN_INSN_INVALID_P): New macro.
344
345 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
346
347 * hppa.h: Add "fid".
348
349 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
350
351 From Robert Andrew Dale <rob@nb.net>
352 * i386.h (i386_optab): Add AMD 3DNow! instructions.
353 (AMD_3DNOW_OPCODE): Define.
354
355 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
356
357 * d30v.h (EITHER_BUT_PREFER_MU): Define.
358
359 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
360
361 * cgen.h (cgen_insn): #if 0 out element `cdx'.
362
363 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
364
365 Move all global state data into opcode table struct, and treat
366 opcode table as something that is "opened/closed".
367 * cgen.h (CGEN_OPCODE_DESC): New type.
368 (all fns): New first arg of opcode table descriptor.
369 (cgen_set_parse_operand_fn): Add prototype.
370 (cgen_current_machine,cgen_current_endian): Delete.
371 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
372 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
373 dis_hash_table,dis_hash_table_entries.
374 (opcode_open,opcode_close): Add prototypes.
375
376 * cgen.h (cgen_insn): New element `cdx'.
377
378 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
379
380 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
381
382 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
383
384 * mn10300.h: Add "no_match_operands" field for instructions.
385 (MN10300_MAX_OPERANDS): Define.
386
387 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
388
389 * cgen.h (cgen_macro_insn_count): Declare.
390
391 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
392
393 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
394 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
395 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
396 set_{int,vma}_operand.
397
398 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
399
400 * mn10300.h: Add "machine" field for instructions.
401 (MN103, AM30): Define machine types.
402
403 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
404
405 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
406
407 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
408
409 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
410
411 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
412
413 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
414 and ud2b.
415 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
416 those that happen to be implemented on pentiums.
417
418 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
419
420 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
421 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
422 with Size16|IgnoreSize or Size32|IgnoreSize.
423
424 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
425
426 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
427 (REPE): Rename to REPE_PREFIX_OPCODE.
428 (i386_regtab_end): Remove.
429 (i386_prefixtab, i386_prefixtab_end): Remove.
430 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
431 of md_begin.
432 (MAX_OPCODE_SIZE): Define.
433 (i386_optab_end): Remove.
434 (sl_Suf): Define.
435 (sl_FP): Use sl_Suf.
436
437 * i386.h (i386_optab): Allow 16 bit displacement for `mov
438 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
439 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
440 data32, dword, and adword prefixes.
441 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
442 regs.
443
444 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
445
446 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
447
448 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
449 register operands, because this is a common idiom. Flag them with
450 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
451 fdivrp because gcc erroneously generates them. Also flag with a
452 warning.
453
454 * i386.h: Add suffix modifiers to most insns, and tighter operand
455 checks in some cases. Fix a number of UnixWare compatibility
456 issues with float insns. Merge some floating point opcodes, using
457 new FloatMF modifier.
458 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
459 consistency.
460
461 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
462 IgnoreDataSize where appropriate.
463
464 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
465
466 * i386.h: (one_byte_segment_defaults): Remove.
467 (two_byte_segment_defaults): Remove.
468 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
469
470 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
471
472 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
473 (cgen_hw_lookup_by_num): Declare.
474
475 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
476
477 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
478 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
479
480 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
481
482 * cgen.h (cgen_asm_init_parse): Delete.
483 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
484 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
485
486 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
487
488 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
489 (cgen_asm_finish_insn): Update prototype.
490 (cgen_insn): New members num, data.
491 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
492 dis_hash, dis_hash_table_size moved to ...
493 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
494 All uses updated. New members asm_hash_p, dis_hash_p.
495 (CGEN_MINSN_EXPANSION): New struct.
496 (cgen_expand_macro_insn): Declare.
497 (cgen_macro_insn_count): Declare.
498 (get_insn_operands): Update prototype.
499 (lookup_get_insn_operands): Declare.
500
501 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
502
503 * i386.h (i386_optab): Change iclrKludge and imulKludge to
504 regKludge. Add operands types for string instructions.
505
506 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
507
508 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
509 table.
510
511 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
512
513 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
514 for `gettext'.
515
516 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
517
518 * i386.h: Remove NoModrm flag from all insns: it's never checked.
519 Add IsString flag to string instructions.
520 (IS_STRING): Don't define.
521 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
522 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
523 (SS_PREFIX_OPCODE): Define.
524
525 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
526
527 * i386.h: Revert March 24 patch; no more LinearAddress.
528
529 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
530
531 * i386.h (i386_optab): Remove fwait (9b) from all floating point
532 instructions, and instead add FWait opcode modifier. Add short
533 form of fldenv and fstenv.
534 (FWAIT_OPCODE): Define.
535
536 * i386.h (i386_optab): Change second operand constraint of `mov
537 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
538 allow legal instructions such as `movl %gs,%esi'
539
540 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
541
542 * h8300.h: Various changes to fully bracket initializers.
543
544 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
545
546 * i386.h: Set LinearAddress for lidt and lgdt.
547
548 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
549
550 * cgen.h (CGEN_BOOL_ATTR): New macro.
551
552 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
553
554 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
555
556 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
557
558 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
559 (cgen_insn): Record syntax and format entries here, rather than
560 separately.
561
562 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
563
564 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
565
566 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
567
568 * cgen.h (cgen_insert_fn): Change type of result to const char *.
569 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
570 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
571
572 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
573
574 * cgen.h (lookup_insn): New argument alias_p.
575
576 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
577
578 Fix rac to accept only a0:
579 * d10v.h (OPERAND_ACC): Split into:
580 (OPERAND_ACC0, OPERAND_ACC1) .
581 (OPERAND_GPR): Define.
582
583 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
584
585 * cgen.h (CGEN_FIELDS): Define here.
586 (CGEN_HW_ENTRY): New member `type'.
587 (hw_list): Delete decl.
588 (enum cgen_mode): Declare.
589 (CGEN_OPERAND): New member `hw'.
590 (enum cgen_operand_instance_type): Declare.
591 (CGEN_OPERAND_INSTANCE): New type.
592 (CGEN_INSN): New member `operands'.
593 (CGEN_OPCODE_DATA): Make hw_list const.
594 (get_insn_operands,lookup_insn): Add prototypes for.
595
596 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
597
598 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
599 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
600 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
601 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
602
603 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
604
605 * cgen.h: Correct typo in comment end marker.
606
607 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
608
609 * tic30.h: New file.
610
611 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
612
613 * cgen.h: Add prototypes for cgen_save_fixups(),
614 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
615 of cgen_asm_finish_insn() to return a char *.
616
617 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
618
619 * cgen.h: Formatting changes to improve readability.
620
621 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
622
623 * cgen.h (*): Clean up pass over `struct foo' usage.
624 (CGEN_ATTR): Make unsigned char.
625 (CGEN_ATTR_TYPE): Update.
626 (CGEN_ATTR_{ENTRY,TABLE}): New types.
627 (cgen_base): Move member `attrs' to cgen_insn.
628 (CGEN_KEYWORD): New member `null_entry'.
629 (CGEN_{SYNTAX,FORMAT}): New types.
630 (cgen_insn): Format and syntax separated from each other.
631
632 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
633
634 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
635 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
636 flags_{used,set} long.
637 (d30v_operand): Make flags field long.
638
639 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
640
641 * m68k.h: Fix comment describing operand types.
642
643 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
644
645 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
646 everything else after down.
647
648 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
649
650 * d10v.h (OPERAND_FLAG): Split into:
651 (OPERAND_FFLAG, OPERAND_CFLAG) .
652
653 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
654
655 * mips.h (struct mips_opcode): Changed comments to reflect new
656 field usage.
657
658 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
659
660 * mips.h: Added to comments a quick-ref list of all assigned
661 operand type characters.
662 (OP_{MASK,SH}_PERFREG): New macros.
663
664 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
665
666 * sparc.h: Add '_' and '/' for v9a asr's.
667 Patch from David Miller <davem@vger.rutgers.edu>
668
669 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
670
671 * h8300.h: Bit ops with absolute addresses not in the 8 bit
672 area are not available in the base model (H8/300).
673
674 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
675
676 * m68k.h: Remove documentation of ` operand specifier.
677
678 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
679
680 * m68k.h: Document q and v operand specifiers.
681
682 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
683
684 * v850.h (struct v850_opcode): Add processors field.
685 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
686 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
687 (PROCESSOR_V850EA): New bit constants.
688
689 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
690
691 Merge changes from Martin Hunt:
692
693 * d30v.h: Allow up to 64 control registers. Add
694 SHORT_A5S format.
695
696 * d30v.h (LONG_Db): New form for delayed branches.
697
698 * d30v.h: (LONG_Db): New form for repeati.
699
700 * d30v.h (SHORT_D2B): New form.
701
702 * d30v.h (SHORT_A2): New form.
703
704 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
705 registers are used. Needed for VLIW optimization.
706
707 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
708
709 * cgen.h: Move assembler interface section
710 up so cgen_parse_operand_result is defined for cgen_parse_address.
711 (cgen_parse_address): Update prototype.
712
713 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
714
715 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
716
717 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
718
719 * i386.h (two_byte_segment_defaults): Correct base register 5 in
720 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
721 <paubert@iram.es>.
722
723 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
724 <paubert@iram.es>.
725
726 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
727 <paubert@iram.es>.
728
729 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
730 (JUMP_ON_ECX_ZERO): Remove commented out macro.
731
732 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
733
734 * v850.h (V850_NOT_R0): New flag.
735
736 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
737
738 * v850.h (struct v850_opcode): Remove flags field.
739
740 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
741
742 * v850.h (struct v850_opcode): Add flags field.
743 (struct v850_operand): Extend meaning of 'bits' and 'shift'
744 fields.
745 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
746 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
747
748 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
749
750 * arc.h: New file.
751
752 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
753
754 * sparc.h (sparc_opcodes): Declare as const.
755
756 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
757
758 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
759 uses single or double precision floating point resources.
760 (INSN_NO_ISA, INSN_ISA1): Define.
761 (cpu specific INSN macros): Tweak into bitmasks outside the range
762 of INSN_ISA field.
763
764 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
765
766 * i386.h: Fix pand opcode.
767
768 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
769
770 * mips.h: Widen INSN_ISA and move it to a more convenient
771 bit position. Add INSN_3900.
772
773 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
774
775 * mips.h (struct mips_opcode): added new field membership.
776
777 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
778
779 * i386.h (movd): only Reg32 is allowed.
780
781 * i386.h: add fcomp and ud2. From Wayne Scott
782 <wscott@ichips.intel.com>.
783
784 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
785
786 * i386.h: Add MMX instructions.
787
788 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
789
790 * i386.h: Remove W modifier from conditional move instructions.
791
792 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
793
794 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
795 with no arguments to match that generated by the UnixWare
796 assembler.
797
798 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
799
800 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
801 (cgen_parse_operand_fn): Declare.
802 (cgen_init_parse_operand): Declare.
803 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
804 new argument `want'.
805 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
806 (enum cgen_parse_operand_type): New enum.
807
808 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
809
810 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
811
812 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
813
814 * cgen.h: New file.
815
816 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
817
818 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
819 fdivrp.
820
821 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
822
823 * v850.h (extract): Make unsigned.
824
825 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
826
827 * i386.h: Add iclr.
828
829 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
830
831 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
832 take a direction bit.
833
834 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
835
836 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
837
838 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
839
840 * sparc.h: Include <ansidecl.h>. Update function declarations to
841 use prototypes, and to use const when appropriate.
842
843 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
844
845 * mn10300.h (MN10300_OPERAND_RELAX): Define.
846
847 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
848
849 * d10v.h: Change pre_defined_registers to
850 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
851
852 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
853
854 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
855 Change mips_opcodes from const array to a pointer,
856 and change bfd_mips_num_opcodes from const int to int,
857 so that we can increase the size of the mips opcodes table
858 dynamically.
859
860 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
861
862 * d30v.h (FLAG_X): Remove unused flag.
863
864 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
865
866 * d30v.h: New file.
867
868 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
869
870 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
871 (PDS_VALUE): Macro to access value field of predefined symbols.
872 (tic80_next_predefined_symbol): Add prototype.
873
874 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
875
876 * tic80.h (tic80_symbol_to_value): Change prototype to match
877 change in function, added class parameter.
878
879 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
880
881 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
882 endmask fields, which are somewhat weird in that 0 and 32 are
883 treated exactly the same.
884
885 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
886
887 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
888 rather than a constant that is 2**X. Reorder them to put bits for
889 operands that have symbolic names in the upper bits, so they can
890 be packed into an int where the lower bits contain the value that
891 corresponds to that symbolic name.
892 (predefined_symbo): Add struct.
893 (tic80_predefined_symbols): Declare array of translations.
894 (tic80_num_predefined_symbols): Declare size of that array.
895 (tic80_value_to_symbol): Declare function.
896 (tic80_symbol_to_value): Declare function.
897
898 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
899
900 * mn10200.h (MN10200_OPERAND_RELAX): Define.
901
902 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
903
904 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
905 be the destination register.
906
907 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
908
909 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
910 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
911 (TIC80_VECTOR): Define a flag bit for the flags. This one means
912 that the opcode can have two vector instructions in a single
913 32 bit word and we have to encode/decode both.
914
915 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
916
917 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
918 TIC80_OPERAND_RELATIVE for PC relative.
919 (TIC80_OPERAND_BASEREL): New flag bit for register
920 base relative.
921
922 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
923
924 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
925
926 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
927
928 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
929 ":s" modifier for scaling.
930
931 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
932
933 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
934 (TIC80_OPERAND_M_LI): Ditto
935
936 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
937
938 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
939 (TIC80_OPERAND_CC): New define for condition code operand.
940 (TIC80_OPERAND_CR): New define for control register operand.
941
942 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
943
944 * tic80.h (struct tic80_opcode): Name changed.
945 (struct tic80_opcode): Remove format field.
946 (struct tic80_operand): Add insertion and extraction functions.
947 (TIC80_OPERAND_*): Remove old bogus values, start adding new
948 correct ones.
949 (FMT_*): Ditto.
950
951 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
952
953 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
954 type IV instruction offsets.
955
956 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
957
958 * tic80.h: New file.
959
960 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
961
962 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
963
964 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
965
966 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
967 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
968 * v850.h: Fix comment, v850_operand not powerpc_operand.
969
970 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
971
972 * mn10200.h: Flesh out structures and definitions needed by
973 the mn10200 assembler & disassembler.
974
975 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
976
977 * mips.h: Add mips16 definitions.
978
979 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
980
981 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
982
983 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
984
985 * mn10300.h (MN10300_OPERAND_PCREL): Define.
986 (MN10300_OPERAND_MEMADDR): Define.
987
988 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
989
990 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
991
992 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
993
994 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
995
996 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
997
998 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
999
1000 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1001
1002 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1003
1004 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1005
1006 * alpha.h: Don't include "bfd.h"; private relocation types are now
1007 negative to minimize problems with shared libraries. Organize
1008 instruction subsets by AMASK extensions and PALcode
1009 implementation.
1010 (struct alpha_operand): Move flags slot for better packing.
1011
1012 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1013
1014 * v850.h (V850_OPERAND_RELAX): New operand flag.
1015
1016 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1017
1018 * mn10300.h (FMT_*): Move operand format definitions
1019 here.
1020
1021 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1022
1023 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1024
1025 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1026
1027 * mn10300.h (mn10300_opcode): Add "format" field.
1028 (MN10300_OPERAND_*): Define.
1029
1030 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1031
1032 * mn10x00.h: Delete.
1033 * mn10200.h, mn10300.h: New files.
1034
1035 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1036
1037 * mn10x00.h: New file.
1038
1039 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1040
1041 * v850.h: Add new flag to indicate this instruction uses a PC
1042 displacement.
1043
1044 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1045
1046 * h8300.h (stmac): Add missing instruction.
1047
1048 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1049
1050 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1051 field.
1052
1053 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1054
1055 * v850.h (V850_OPERAND_EP): Define.
1056
1057 * v850.h (v850_opcode): Add size field.
1058
1059 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1060
1061 * v850.h (v850_operands): Add insert and extract fields, pointers
1062 to functions used to handle unusual operand encoding.
1063 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1064 V850_OPERAND_SIGNED): Defined.
1065
1066 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1067
1068 * v850.h (v850_operands): Add flags field.
1069 (OPERAND_REG, OPERAND_NUM): Defined.
1070
1071 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1072
1073 * v850.h: New file.
1074
1075 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1076
1077 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1078 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1079 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1080 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1081 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1082 Defined.
1083
1084 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1085
1086 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1087 a 3 bit space id instead of a 2 bit space id.
1088
1089 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1090
1091 * d10v.h: Add some additional defines to support the
1092 assembler in determining which operations can be done in parallel.
1093
1094 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1095
1096 * h8300.h (SN): Define.
1097 (eepmov.b): Renamed from "eepmov"
1098 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1099 with them.
1100
1101 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1102
1103 * d10v.h (OPERAND_SHIFT): New operand flag.
1104
1105 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1106
1107 * d10v.h: Changes for divs, parallel-only instructions, and
1108 signed numbers.
1109
1110 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1111
1112 * d10v.h (pd_reg): Define. Putting the definition here allows
1113 the assembler and disassembler to share the same struct.
1114
1115 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1116
1117 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1118 Williams <steve@icarus.com>.
1119
1120 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1121
1122 * d10v.h: New file.
1123
1124 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1125
1126 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1127
1128 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1129
1130 * m68k.h (mcf5200): New macro.
1131 Document names of coldfire control registers.
1132
1133 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1134
1135 * h8300.h (SRC_IN_DST): Define.
1136
1137 * h8300.h (UNOP3): Mark the register operand in this insn
1138 as a source operand, not a destination operand.
1139 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1140 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1141 register operand with SRC_IN_DST.
1142
1143 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1144
1145 * alpha.h: New file.
1146
1147 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1148
1149 * rs6k.h: Remove obsolete file.
1150
1151 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1152
1153 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1154 fdivp, and fdivrp. Add ffreep.
1155
1156 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1157
1158 * h8300.h: Reorder various #defines for readability.
1159 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1160 (BITOP): Accept additional (unused) argument. All callers changed.
1161 (EBITOP): Likewise.
1162 (O_LAST): Bump.
1163 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1164
1165 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1166 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1167 (BITOP, EBITOP): Handle new H8/S addressing modes for
1168 bit insns.
1169 (UNOP3): Handle new shift/rotate insns on the H8/S.
1170 (insns using exr): New instructions.
1171 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1172
1173 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1174
1175 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1176 was incorrect.
1177
1178 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1179
1180 * h8300.h (START): Remove.
1181 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1182 and mov.l insns that can be relaxed.
1183
1184 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1185
1186 * i386.h: Remove Abs32 from lcall.
1187
1188 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1189
1190 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1191 (SLCPOP): New macro.
1192 Mark X,Y opcode letters as in use.
1193
1194 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1195
1196 * sparc.h (F_FLOAT, F_FBR): Define.
1197
1198 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1199
1200 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1201 from all insns.
1202 (ABS8SRC,ABS8DST): Add ABS8MEM.
1203 (add.l): Fix reg+reg variant.
1204 (eepmov.w): Renamed from eepmovw.
1205 (ldc,stc): Fix many cases.
1206
1207 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1208
1209 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1210
1211 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1212
1213 * sparc.h (O): Mark operand letter as in use.
1214
1215 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1216
1217 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1218 Mark operand letters uU as in use.
1219
1220 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1221
1222 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1223 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1224 (SPARC_OPCODE_SUPPORTED): New macro.
1225 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1226 (F_NOTV9): Delete.
1227
1228 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1229
1230 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1231 declaration consistent with return type in definition.
1232
1233 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1234
1235 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1236
1237 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1238
1239 * i386.h (i386_regtab): Add 80486 test registers.
1240
1241 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1242
1243 * i960.h (I_HX): Define.
1244 (i960_opcodes): Add HX instruction.
1245
1246 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1247
1248 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1249 and fclex.
1250
1251 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1252
1253 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1254 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1255 (bfd_* defines): Delete.
1256 (sparc_opcode_archs): Replaces architecture_pname.
1257 (sparc_opcode_lookup_arch): Declare.
1258 (NUMOPCODES): Delete.
1259
1260 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1261
1262 * sparc.h (enum sparc_architecture): Add v9a.
1263 (ARCHITECTURES_CONFLICT_P): Update.
1264
1265 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1266
1267 * i386.h: Added Pentium Pro instructions.
1268
1269 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1270
1271 * m68k.h: Document new 'W' operand place.
1272
1273 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1274
1275 * hppa.h: Add lci and syncdma instructions.
1276
1277 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1278
1279 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1280 instructions.
1281
1282 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1283
1284 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1285 assembler's -mcom and -many switches.
1286
1287 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1288
1289 * i386.h: Fix cmpxchg8b extension opcode description.
1290
1291 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1292
1293 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1294 and register cr4.
1295
1296 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1297
1298 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1299
1300 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1301
1302 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1303
1304 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1305
1306 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1307
1308 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1309
1310 * m68kmri.h: Remove.
1311
1312 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1313 declarations. Remove F_ALIAS and flag field of struct
1314 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1315 int. Make name and args fields of struct m68k_opcode const.
1316
1317 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1318
1319 * sparc.h (F_NOTV9): Define.
1320
1321 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1322
1323 * mips.h (INSN_4010): Define.
1324
1325 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1326
1327 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1328
1329 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1330 * m68k.h: Fix argument descriptions of coprocessor
1331 instructions to allow only alterable operands where appropriate.
1332 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1333 (m68k_opcode_aliases): Add more aliases.
1334
1335 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1336
1337 * m68k.h: Added explcitly short-sized conditional branches, and a
1338 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1339 svr4-based configurations.
1340
1341 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1342
1343 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1344 * i386.h: added missing Data16/Data32 flags to a few instructions.
1345
1346 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1347
1348 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1349 (OP_MASK_BCC, OP_SH_BCC): Define.
1350 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1351 (OP_MASK_CCC, OP_SH_CCC): Define.
1352 (INSN_READ_FPR_R): Define.
1353 (INSN_RFE): Delete.
1354
1355 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1356
1357 * m68k.h (enum m68k_architecture): Deleted.
1358 (struct m68k_opcode_alias): New type.
1359 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1360 matching constraints, values and flags. As a side effect of this,
1361 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1362 as I know were never used, now may need re-examining.
1363 (numopcodes): Now const.
1364 (m68k_opcode_aliases, numaliases): New variables.
1365 (endop): Deleted.
1366 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1367 m68k_opcode_aliases; update declaration of m68k_opcodes.
1368
1369 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1370
1371 * hppa.h (delay_type): Delete unused enumeration.
1372 (pa_opcode): Replace unused delayed field with an architecture
1373 field.
1374 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1375
1376 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1377
1378 * mips.h (INSN_ISA4): Define.
1379
1380 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1381
1382 * mips.h (M_DLA_AB, M_DLI): Define.
1383
1384 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1385
1386 * hppa.h (fstwx): Fix single-bit error.
1387
1388 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1389
1390 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1391
1392 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1393
1394 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1395 debug registers. From Charles Hannum (mycroft@netbsd.org).
1396
1397 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1398
1399 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1400 i386 support:
1401 * i386.h (MOV_AX_DISP32): New macro.
1402 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1403 of several call/return instructions.
1404 (ADDR_PREFIX_OPCODE): New macro.
1405
1406 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1407
1408 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1409
1410 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1411 it pointer to const char;
1412 (struct vot, field `name'): ditto.
1413
1414 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1415
1416 * vax.h: Supply and properly group all values in end sentinel.
1417
1418 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1419
1420 * mips.h (INSN_ISA, INSN_4650): Define.
1421
1422 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1423
1424 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1425 systems with a separate instruction and data cache, such as the
1426 29040, these instructions take an optional argument.
1427
1428 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1429
1430 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1431 INSN_TRAP.
1432
1433 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1434
1435 * mips.h (INSN_STORE_MEMORY): Define.
1436
1437 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1438
1439 * sparc.h: Document new operand type 'x'.
1440
1441 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1442
1443 * i960.h (I_CX2): New instruction category. It includes
1444 instructions available on Cx and Jx processors.
1445 (I_JX): New instruction category, for JX-only instructions.
1446 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1447 Jx-only instructions, in I_JX category.
1448
1449 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1450
1451 * ns32k.h (endop): Made pointer const too.
1452
1453 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1454
1455 * ns32k.h: Drop Q operand type as there is no correct use
1456 for it. Add I and Z operand types which allow better checking.
1457
1458 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1459
1460 * h8300.h (xor.l) :fix bit pattern.
1461 (L_2): New size of operand.
1462 (trapa): Use it.
1463
1464 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1465
1466 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1467
1468 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1469
1470 * sparc.h: Include v9 definitions.
1471
1472 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1473
1474 * m68k.h (m68060): Defined.
1475 (m68040up, mfloat, mmmu): Include it.
1476 (struct m68k_opcode): Widen `arch' field.
1477 (m68k_opcodes): Updated for M68060. Removed comments that were
1478 instructions commented out by "JF" years ago.
1479
1480 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1481
1482 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1483 add a one-bit `flags' field.
1484 (F_ALIAS): New macro.
1485
1486 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1487
1488 * h8300.h (dec, inc): Get encoding right.
1489
1490 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1491
1492 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1493 a flag instead.
1494 (PPC_OPERAND_SIGNED): Define.
1495 (PPC_OPERAND_SIGNOPT): Define.
1496
1497 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1498
1499 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1500 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1501
1502 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1503
1504 * i386.h: Reverse last change. It'll be handled in gas instead.
1505
1506 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1507
1508 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1509 slower on the 486 and used the implicit shift count despite the
1510 explicit operand. The one-operand form is still available to get
1511 the shorter form with the implicit shift count.
1512
1513 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1514
1515 * hppa.h: Fix typo in fstws arg string.
1516
1517 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1518
1519 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1520
1521 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1522
1523 * ppc.h (PPC_OPCODE_601): Define.
1524
1525 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1526
1527 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1528 (so we can determine valid completers for both addb and addb[tf].)
1529
1530 * hppa.h (xmpyu): No floating point format specifier for the
1531 xmpyu instruction.
1532
1533 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1534
1535 * ppc.h (PPC_OPERAND_NEXT): Define.
1536 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1537 (struct powerpc_macro): Define.
1538 (powerpc_macros, powerpc_num_macros): Declare.
1539
1540 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1541
1542 * ppc.h: New file. Header file for PowerPC opcode table.
1543
1544 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1545
1546 * hppa.h: More minor template fixes for sfu and copr (to allow
1547 for easier disassembly).
1548
1549 * hppa.h: Fix templates for all the sfu and copr instructions.
1550
1551 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1552
1553 * i386.h (push): Permit Imm16 operand too.
1554
1555 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1556
1557 * h8300.h (andc): Exists in base arch.
1558
1559 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1560
1561 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1562 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1563
1564 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1565
1566 * hppa.h: Add FP quadword store instructions.
1567
1568 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1569
1570 * mips.h: (M_J_A): Added.
1571 (M_LA): Removed.
1572
1573 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1574
1575 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1576 <mellon@pepper.ncd.com>.
1577
1578 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1579
1580 * hppa.h: Immediate field in probei instructions is unsigned,
1581 not low-sign extended.
1582
1583 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1584
1585 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1586
1587 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1588
1589 * i386.h: Add "fxch" without operand.
1590
1591 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1592
1593 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1594
1595 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1596
1597 * hppa.h: Add gfw and gfr to the opcode table.
1598
1599 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1600
1601 * m88k.h: extended to handle m88110.
1602
1603 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1604
1605 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1606 addresses.
1607
1608 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1609
1610 * i960.h (i960_opcodes): Properly bracket initializers.
1611
1612 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1613
1614 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1615
1616 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1617
1618 * m68k.h (two): Protect second argument with parentheses.
1619
1620 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1621
1622 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1623 Deleted old in/out instructions in "#if 0" section.
1624
1625 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1626
1627 * i386.h (i386_optab): Properly bracket initializers.
1628
1629 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1630
1631 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1632 Jeff Law, law@cs.utah.edu).
1633
1634 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1635
1636 * i386.h (lcall): Accept Imm32 operand also.
1637
1638 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1639
1640 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1641 (M_DABS): Added.
1642
1643 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1644
1645 * mips.h (INSN_*): Changed values. Removed unused definitions.
1646 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1647 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1648 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1649 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1650 (M_*): Added new values for r6000 and r4000 macros.
1651 (ANY_DELAY): Removed.
1652
1653 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1654
1655 * mips.h: Added M_LI_S and M_LI_SS.
1656
1657 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1658
1659 * h8300.h: Get some rare mov.bs correct.
1660
1661 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1662
1663 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1664 been included.
1665
1666 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1667
1668 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1669 jump instructions, for use in disassemblers.
1670
1671 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1672
1673 * m88k.h: Make bitfields just unsigned, not unsigned long or
1674 unsigned short.
1675
1676 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1677
1678 * hppa.h: New argument type 'y'. Use in various float instructions.
1679
1680 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1681
1682 * hppa.h (break): First immediate field is unsigned.
1683
1684 * hppa.h: Add rfir instruction.
1685
1686 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1687
1688 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1689
1690 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1691
1692 * mips.h: Reworked the hazard information somewhat, and fixed some
1693 bugs in the instruction hazard descriptions.
1694
1695 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1696
1697 * m88k.h: Corrected a couple of opcodes.
1698
1699 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1700
1701 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1702 new version includes instruction hazard information, but is
1703 otherwise reasonably similar.
1704
1705 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1706
1707 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1708
1709 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1710
1711 Patches from Jeff Law, law@cs.utah.edu:
1712 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1713 Make the tables be the same for the following instructions:
1714 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1715 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1716 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1717 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1718 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1719 "fcmp", and "ftest".
1720
1721 * hppa.h: Make new and old tables the same for "break", "mtctl",
1722 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1723 Fix typo in last patch. Collapse several #ifdefs into a
1724 single #ifdef.
1725
1726 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1727 of the comments up-to-date.
1728
1729 * hppa.h: Update "free list" of letters and update
1730 comments describing each letter's function.
1731
1732 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1733
1734 * h8300.h: checkpoint, includes H8/300-H opcodes.
1735
1736 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1737
1738 * Patches from Jeffrey Law <law@cs.utah.edu>.
1739 * hppa.h: Rework single precision FP
1740 instructions so that they correctly disassemble code
1741 PA1.1 code.
1742
1743 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1744
1745 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1746 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1747
1748 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1749
1750 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1751 gdb will define it for now.
1752
1753 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1754
1755 * sparc.h: Don't end enumerator list with comma.
1756
1757 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1758
1759 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1760 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1761 ("bc2t"): Correct typo.
1762 ("[ls]wc[023]"): Use T rather than t.
1763 ("c[0123]"): Define general coprocessor instructions.
1764
1765 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1766
1767 * m68k.h: Move split point for gcc compilation more towards
1768 middle.
1769
1770 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1771
1772 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1773 simply wrong, ics, rfi, & rfsvc were missing).
1774 Add "a" to opr_ext for "bb". Doc fix.
1775
1776 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1777
1778 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1779 * mips.h: Add casts, to suppress warnings about shifting too much.
1780 * m68k.h: Document the placement code '9'.
1781
1782 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1783
1784 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1785 allows callers to break up the large initialized struct full of
1786 opcodes into two half-sized ones. This permits GCC to compile
1787 this module, since it takes exponential space for initializers.
1788 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1789
1790 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1791
1792 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1793 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1794 initialized structs in it.
1795
1796 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1797
1798 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1799 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1800 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1801
1802 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1803
1804 * mips.h: document "i" and "j" operands correctly.
1805
1806 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1807
1808 * mips.h: Removed endianness dependency.
1809
1810 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1811
1812 * h8300.h: include info on number of cycles per instruction.
1813
1814 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1815
1816 * hppa.h: Move handy aliases to the front. Fix masks for extract
1817 and deposit instructions.
1818
1819 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1820
1821 * i386.h: accept shld and shrd both with and without the shift
1822 count argument, which is always %cl.
1823
1824 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1825
1826 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1827 (one_byte_segment_defaults, two_byte_segment_defaults,
1828 i386_prefixtab_end): Ditto.
1829
1830 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1831
1832 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1833 for operand 2; from John Carr, jfc@dsg.dec.com.
1834
1835 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1836
1837 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1838 always use 16-bit offsets. Makes calculated-size jump tables
1839 feasible.
1840
1841 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1842
1843 * i386.h: Fix one-operand forms of in* and out* patterns.
1844
1845 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1846
1847 * m68k.h: Added CPU32 support.
1848
1849 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1850
1851 * mips.h (break): Disassemble the argument. Patch from
1852 jonathan@cs.stanford.edu (Jonathan Stone).
1853
1854 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1855
1856 * m68k.h: merged Motorola and MIT syntax.
1857
1858 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1859
1860 * m68k.h (pmove): make the tests less strict, the 68k book is
1861 wrong.
1862
1863 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1864
1865 * m68k.h (m68ec030): Defined as alias for 68030.
1866 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1867 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1868 them. Tightened description of "fmovex" to distinguish it from
1869 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1870 up descriptions that claimed versions were available for chips not
1871 supporting them. Added "pmovefd".
1872
1873 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1874
1875 * m68k.h: fix where the . goes in divull
1876
1877 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1878
1879 * m68k.h: the cas2 instruction is supposed to be written with
1880 indirection on the last two operands, which can be either data or
1881 address registers. Added a new operand type 'r' which accepts
1882 either register type. Added new cases for cas2l and cas2w which
1883 use them. Corrected masks for cas2 which failed to recognize use
1884 of address register.
1885
1886 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1887
1888 * m68k.h: Merged in patches (mostly m68040-specific) from
1889 Colin Smith <colin@wrs.com>.
1890
1891 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1892 base). Also cleaned up duplicates, re-ordered instructions for
1893 the sake of dis-assembling (so aliases come after standard names).
1894 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1895
1896 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1897
1898 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1899 all missing .s
1900
1901 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1902
1903 * sparc.h: Moved tables to BFD library.
1904
1905 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1906
1907 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1908
1909 * h8300.h: Finish filling in all the holes in the opcode table,
1910 so that the Lucid C compiler can digest this as well...
1911
1912 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1913
1914 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1915 Fix opcodes on various sizes of fild/fist instructions
1916 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1917 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1918
1919 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1920
1921 * h8300.h: Fill in all the holes in the opcode table so that the
1922 losing HPUX C compiler can digest this...
1923
1924 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1925
1926 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1927 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1928
1929 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1930
1931 * sparc.h: Add new architecture variant sparclite; add its scan
1932 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1933
1934 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
1935
1936 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1937 fy@lucid.com).
1938
1939 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
1940
1941 * rs6k.h: New version from IBM (Metin).
1942
1943 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
1944
1945 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1946 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
1947
1948 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1949
1950 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1951
1952 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
1953
1954 * m68k.h (one, two): Cast macro args to unsigned to suppress
1955 complaints from compiler and lint about integer overflow during
1956 shift.
1957
1958 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1959
1960 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1961
1962 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1963
1964 * mips.h: Make bitfield layout depend on the HOST compiler,
1965 not on the TARGET system.
1966
1967 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
1968
1969 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
1970 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
1971 <TRANLE@INTELLICORP.COM>.
1972
1973 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
1974
1975 * h8300.h: turned op_type enum into #define list
1976
1977 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
1978
1979 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
1980 similar instructions -- they've been renamed to "fitoq", etc.
1981 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
1982 number of arguments.
1983 * h8300.h: Remove extra ; which produces compiler warning.
1984
1985 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
1986
1987 * sparc.h: fix opcode for tsubcctv.
1988
1989 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
1990
1991 * sparc.h: fba and cba are now aliases for fb and cb respectively.
1992
1993 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
1994
1995 * sparc.h (nop): Made the 'lose' field be even tighter,
1996 so only a standard 'nop' is disassembled as a nop.
1997
1998 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
1999
2000 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2001 disassembled as a nop.
2002
2003 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2004
2005 * sparc.h: fix a typo.
2006
2007 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2008
2009 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2010 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2011 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2012
2013 \f
2014 Local Variables:
2015 version-control: never
2016 End:
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