* hppa.h (pa_opcodes): Add long offset double word load/store
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
2
3 * hppa.h (pa_opcodes): Add long offset double word load/store
4 instructions.
5
6 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
7 stores.
8
9 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
10
11 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
12
13 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
14
15 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
16
17 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
18
19 * hppa.h (pa_opcodes): Add support for "b,l".
20
21 * hppa.h (pa_opcodes): Add support for "b,gate".
22
23 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
24
25 * hppa.h (pa_opcodes): Use 'fX' for first register operand
26 in xmpyu.
27
28 * hppa.h (pa_opcodes): Fix mask for probe and probei.
29
30 * hppa.h (pa_opcodes): Fix mask for depwi.
31
32 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
33
34 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
35 an explicit output argument.
36
37 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
38
39 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
40 Add a few PA2.0 loads and store variants.
41
42 1999-09-04 Steve Chamberlain <sac@pobox.com>
43
44 * pj.h: New file.
45
46 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
47
48 * i386.h (i386_regtab): Move %st to top of table, and split off
49 other fp reg entries.
50 (i386_float_regtab): To here.
51
52 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
53
54 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
55 by 'f'.
56
57 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
58 Add supporting args.
59
60 * hppa.h: Document new completers and args.
61 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
62 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
63 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
64 pmenb and pmdis.
65
66 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
67 hshr, hsub, mixh, mixw, permh.
68
69 * hppa.h (pa_opcodes): Change completers in instructions to
70 use 'c' prefix.
71
72 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
73 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
74
75 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
76 fnegabs to use 'I' instead of 'F'.
77
78 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
79
80 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
81 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
82 Alphabetically sort PIII insns.
83
84 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
85
86 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
87
88 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
89
90 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
91 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
92
93 * hppa.h: Document 64 bit condition completers.
94
95 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
96
97 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
98
99 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
100
101 * i386.h (i386_optab): Add DefaultSize modifier to all insns
102 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
103 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
104
105 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
106 Jeff Law <law@cygnus.com>
107
108 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
109
110 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
111
112 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
113 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
114
115 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
116
117 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
118
119 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
120
121 * hppa.h (struct pa_opcode): Add new field "flags".
122 (FLAGS_STRICT): Define.
123
124 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
125 Jeff Law <law@cygnus.com>
126
127 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
128
129 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
130
131 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
132
133 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
134 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
135 flag to fcomi and friends.
136
137 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
138
139 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
140 integer logical instructions.
141
142 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
143
144 * m68k.h: Document new formats `E', `G', `H' and new places `N',
145 `n', `o'.
146
147 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
148 and new places `m', `M', `h'.
149
150 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
151
152 * hppa.h (pa_opcodes): Add several processor specific system
153 instructions.
154
155 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
156
157 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
158 "addb", and "addib" to be used by the disassembler.
159
160 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
161
162 * i386.h (ReverseModrm): Remove all occurences.
163 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
164 movmskps, pextrw, pmovmskb, maskmovq.
165 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
166 ignore the data size prefix.
167
168 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
169 Mostly stolen from Doug Ledford <dledford@redhat.com>
170
171 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
172
173 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
174
175 1999-04-14 Doug Evans <devans@casey.cygnus.com>
176
177 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
178 (CGEN_ATTR_TYPE): Update.
179 (CGEN_ATTR_MASK): Number booleans starting at 0.
180 (CGEN_ATTR_VALUE): Update.
181 (CGEN_INSN_ATTR): Update.
182
183 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
184
185 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
186 instructions.
187
188 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
189
190 * hppa.h (bb, bvb): Tweak opcode/mask.
191
192
193 1999-03-22 Doug Evans <devans@casey.cygnus.com>
194
195 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
196 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
197 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
198 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
199 Delete member max_insn_size.
200 (enum cgen_cpu_open_arg): New enum.
201 (cpu_open): Update prototype.
202 (cpu_open_1): Declare.
203 (cgen_set_cpu): Delete.
204
205 1999-03-11 Doug Evans <devans@casey.cygnus.com>
206
207 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
208 (CGEN_OPERAND_NIL): New macro.
209 (CGEN_OPERAND): New member `type'.
210 (@arch@_cgen_operand_table): Delete decl.
211 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
212 (CGEN_OPERAND_TABLE): New struct.
213 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
214 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
215 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
216 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
217 {get,set}_{int,vma}_operand.
218 (@arch@_cgen_cpu_open): New arg `isa'.
219 (cgen_set_cpu): Ditto.
220
221 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
222
223 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
224
225 1999-02-25 Doug Evans <devans@casey.cygnus.com>
226
227 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
228 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
229 enum cgen_hw_type.
230 (CGEN_HW_TABLE): New struct.
231 (hw_table): Delete declaration.
232 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
233 to table entry to enum.
234 (CGEN_OPINST): Ditto.
235 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
236
237 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
238
239 * alpha.h (AXP_OPCODE_EV6): New.
240 (AXP_OPCODE_NOPAL): Include it.
241
242 1999-02-09 Doug Evans <devans@casey.cygnus.com>
243
244 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
245 All uses updated. New members int_insn_p, max_insn_size,
246 parse_operand,insert_operand,extract_operand,print_operand,
247 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
248 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
249 extract_handlers,print_handlers.
250 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
251 (CGEN_ATTR_BOOL_OFFSET): New macro.
252 (CGEN_ATTR_MASK): Subtract it to compute bit number.
253 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
254 (cgen_opcode_handler): Renamed from cgen_base.
255 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
256 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
257 all uses updated.
258 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
259 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
260 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
261 (CGEN_OPCODE,CGEN_IBASE): New types.
262 (CGEN_INSN): Rewrite.
263 (CGEN_{ASM,DIS}_HASH*): Delete.
264 (init_opcode_table,init_ibld_table): Declare.
265 (CGEN_INSN_ATTR): New type.
266
267 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
268
269 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
270 (x_FP, d_FP, dls_FP, sldx_FP): Define.
271 Change *Suf definitions to include x and d suffixes.
272 (movsx): Use w_Suf and b_Suf.
273 (movzx): Likewise.
274 (movs): Use bwld_Suf.
275 (fld): Change ordering. Use sld_FP.
276 (fild): Add Intel Syntax equivalent of fildq.
277 (fst): Use sld_FP.
278 (fist): Use sld_FP.
279 (fstp): Use sld_FP. Add x_FP version.
280 (fistp): LLongMem version for Intel Syntax.
281 (fcom, fcomp): Use sld_FP.
282 (fadd, fiadd, fsub): Use sld_FP.
283 (fsubr): Use sld_FP.
284 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
285
286 1999-01-27 Doug Evans <devans@casey.cygnus.com>
287
288 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
289 CGEN_MODE_UINT.
290
291 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
292
293 * hppa.h (bv): Fix mask.
294
295 1999-01-05 Doug Evans <devans@casey.cygnus.com>
296
297 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
298 (CGEN_ATTR): Use it.
299 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
300 (CGEN_ATTR_TABLE): New member dfault.
301
302 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
303
304 * mips.h (MIPS16_INSN_BRANCH): New.
305
306 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
307
308 The following is part of a change made by Edith Epstein
309 <eepstein@sophia.cygnus.com> as part of a project to merge in
310 changes by HP; HP did not create ChangeLog entries.
311
312 * hppa.h (completer_chars): list of chars to not put a space
313 after.
314
315 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
316
317 * i386.h (i386_optab): Permit w suffix on processor control and
318 status word instructions.
319
320 1998-11-30 Doug Evans <devans@casey.cygnus.com>
321
322 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
323 (struct cgen_keyword_entry): Ditto.
324 (struct cgen_operand): Ditto.
325 (CGEN_IFLD): New typedef, with associated access macros.
326 (CGEN_IFMT): New typedef, with associated access macros.
327 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
328 (CGEN_IVALUE): New typedef.
329 (struct cgen_insn): Delete const on syntax,attrs members.
330 `format' now points to format data. Type of `value' is now
331 CGEN_IVALUE.
332 (struct cgen_opcode_table): New member ifld_table.
333
334 1998-11-18 Doug Evans <devans@casey.cygnus.com>
335
336 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
337 (CGEN_OPERAND_INSTANCE): New member `attrs'.
338 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
339 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
340 (cgen_opcode_table): Update type of dis_hash fn.
341 (extract_operand): Update type of `insn_value' arg.
342
343 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
344
345 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
346
347 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
348
349 * mips.h (INSN_MULT): Added.
350
351 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
352
353 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
354
355 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
356
357 * cgen.h (CGEN_INSN_INT): New typedef.
358 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
359 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
360 (CGEN_INSN_BYTES_PTR): New typedef.
361 (CGEN_EXTRACT_INFO): New typedef.
362 (cgen_insert_fn,cgen_extract_fn): Update.
363 (cgen_opcode_table): New member `insn_endian'.
364 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
365 (insert_operand,extract_operand): Update.
366 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
367
368 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
369
370 * cgen.h (CGEN_ATTR_BOOLS): New macro.
371 (struct CGEN_HW_ENTRY): New member `attrs'.
372 (CGEN_HW_ATTR): New macro.
373 (struct CGEN_OPERAND_INSTANCE): New member `name'.
374 (CGEN_INSN_INVALID_P): New macro.
375
376 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
377
378 * hppa.h: Add "fid".
379
380 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
381
382 From Robert Andrew Dale <rob@nb.net>
383 * i386.h (i386_optab): Add AMD 3DNow! instructions.
384 (AMD_3DNOW_OPCODE): Define.
385
386 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
387
388 * d30v.h (EITHER_BUT_PREFER_MU): Define.
389
390 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
391
392 * cgen.h (cgen_insn): #if 0 out element `cdx'.
393
394 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
395
396 Move all global state data into opcode table struct, and treat
397 opcode table as something that is "opened/closed".
398 * cgen.h (CGEN_OPCODE_DESC): New type.
399 (all fns): New first arg of opcode table descriptor.
400 (cgen_set_parse_operand_fn): Add prototype.
401 (cgen_current_machine,cgen_current_endian): Delete.
402 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
403 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
404 dis_hash_table,dis_hash_table_entries.
405 (opcode_open,opcode_close): Add prototypes.
406
407 * cgen.h (cgen_insn): New element `cdx'.
408
409 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
410
411 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
412
413 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
414
415 * mn10300.h: Add "no_match_operands" field for instructions.
416 (MN10300_MAX_OPERANDS): Define.
417
418 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
419
420 * cgen.h (cgen_macro_insn_count): Declare.
421
422 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
423
424 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
425 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
426 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
427 set_{int,vma}_operand.
428
429 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
430
431 * mn10300.h: Add "machine" field for instructions.
432 (MN103, AM30): Define machine types.
433
434 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
435
436 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
437
438 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
439
440 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
441
442 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
443
444 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
445 and ud2b.
446 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
447 those that happen to be implemented on pentiums.
448
449 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
450
451 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
452 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
453 with Size16|IgnoreSize or Size32|IgnoreSize.
454
455 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
456
457 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
458 (REPE): Rename to REPE_PREFIX_OPCODE.
459 (i386_regtab_end): Remove.
460 (i386_prefixtab, i386_prefixtab_end): Remove.
461 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
462 of md_begin.
463 (MAX_OPCODE_SIZE): Define.
464 (i386_optab_end): Remove.
465 (sl_Suf): Define.
466 (sl_FP): Use sl_Suf.
467
468 * i386.h (i386_optab): Allow 16 bit displacement for `mov
469 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
470 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
471 data32, dword, and adword prefixes.
472 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
473 regs.
474
475 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
476
477 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
478
479 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
480 register operands, because this is a common idiom. Flag them with
481 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
482 fdivrp because gcc erroneously generates them. Also flag with a
483 warning.
484
485 * i386.h: Add suffix modifiers to most insns, and tighter operand
486 checks in some cases. Fix a number of UnixWare compatibility
487 issues with float insns. Merge some floating point opcodes, using
488 new FloatMF modifier.
489 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
490 consistency.
491
492 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
493 IgnoreDataSize where appropriate.
494
495 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
496
497 * i386.h: (one_byte_segment_defaults): Remove.
498 (two_byte_segment_defaults): Remove.
499 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
500
501 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
502
503 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
504 (cgen_hw_lookup_by_num): Declare.
505
506 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
507
508 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
509 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
510
511 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
512
513 * cgen.h (cgen_asm_init_parse): Delete.
514 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
515 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
516
517 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
518
519 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
520 (cgen_asm_finish_insn): Update prototype.
521 (cgen_insn): New members num, data.
522 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
523 dis_hash, dis_hash_table_size moved to ...
524 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
525 All uses updated. New members asm_hash_p, dis_hash_p.
526 (CGEN_MINSN_EXPANSION): New struct.
527 (cgen_expand_macro_insn): Declare.
528 (cgen_macro_insn_count): Declare.
529 (get_insn_operands): Update prototype.
530 (lookup_get_insn_operands): Declare.
531
532 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
533
534 * i386.h (i386_optab): Change iclrKludge and imulKludge to
535 regKludge. Add operands types for string instructions.
536
537 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
538
539 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
540 table.
541
542 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
543
544 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
545 for `gettext'.
546
547 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
548
549 * i386.h: Remove NoModrm flag from all insns: it's never checked.
550 Add IsString flag to string instructions.
551 (IS_STRING): Don't define.
552 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
553 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
554 (SS_PREFIX_OPCODE): Define.
555
556 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
557
558 * i386.h: Revert March 24 patch; no more LinearAddress.
559
560 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
561
562 * i386.h (i386_optab): Remove fwait (9b) from all floating point
563 instructions, and instead add FWait opcode modifier. Add short
564 form of fldenv and fstenv.
565 (FWAIT_OPCODE): Define.
566
567 * i386.h (i386_optab): Change second operand constraint of `mov
568 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
569 allow legal instructions such as `movl %gs,%esi'
570
571 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
572
573 * h8300.h: Various changes to fully bracket initializers.
574
575 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
576
577 * i386.h: Set LinearAddress for lidt and lgdt.
578
579 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
580
581 * cgen.h (CGEN_BOOL_ATTR): New macro.
582
583 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
584
585 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
586
587 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
588
589 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
590 (cgen_insn): Record syntax and format entries here, rather than
591 separately.
592
593 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
594
595 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
596
597 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
598
599 * cgen.h (cgen_insert_fn): Change type of result to const char *.
600 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
601 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
602
603 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
604
605 * cgen.h (lookup_insn): New argument alias_p.
606
607 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
608
609 Fix rac to accept only a0:
610 * d10v.h (OPERAND_ACC): Split into:
611 (OPERAND_ACC0, OPERAND_ACC1) .
612 (OPERAND_GPR): Define.
613
614 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
615
616 * cgen.h (CGEN_FIELDS): Define here.
617 (CGEN_HW_ENTRY): New member `type'.
618 (hw_list): Delete decl.
619 (enum cgen_mode): Declare.
620 (CGEN_OPERAND): New member `hw'.
621 (enum cgen_operand_instance_type): Declare.
622 (CGEN_OPERAND_INSTANCE): New type.
623 (CGEN_INSN): New member `operands'.
624 (CGEN_OPCODE_DATA): Make hw_list const.
625 (get_insn_operands,lookup_insn): Add prototypes for.
626
627 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
628
629 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
630 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
631 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
632 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
633
634 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
635
636 * cgen.h: Correct typo in comment end marker.
637
638 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
639
640 * tic30.h: New file.
641
642 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
643
644 * cgen.h: Add prototypes for cgen_save_fixups(),
645 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
646 of cgen_asm_finish_insn() to return a char *.
647
648 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
649
650 * cgen.h: Formatting changes to improve readability.
651
652 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
653
654 * cgen.h (*): Clean up pass over `struct foo' usage.
655 (CGEN_ATTR): Make unsigned char.
656 (CGEN_ATTR_TYPE): Update.
657 (CGEN_ATTR_{ENTRY,TABLE}): New types.
658 (cgen_base): Move member `attrs' to cgen_insn.
659 (CGEN_KEYWORD): New member `null_entry'.
660 (CGEN_{SYNTAX,FORMAT}): New types.
661 (cgen_insn): Format and syntax separated from each other.
662
663 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
664
665 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
666 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
667 flags_{used,set} long.
668 (d30v_operand): Make flags field long.
669
670 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
671
672 * m68k.h: Fix comment describing operand types.
673
674 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
675
676 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
677 everything else after down.
678
679 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
680
681 * d10v.h (OPERAND_FLAG): Split into:
682 (OPERAND_FFLAG, OPERAND_CFLAG) .
683
684 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
685
686 * mips.h (struct mips_opcode): Changed comments to reflect new
687 field usage.
688
689 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
690
691 * mips.h: Added to comments a quick-ref list of all assigned
692 operand type characters.
693 (OP_{MASK,SH}_PERFREG): New macros.
694
695 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
696
697 * sparc.h: Add '_' and '/' for v9a asr's.
698 Patch from David Miller <davem@vger.rutgers.edu>
699
700 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
701
702 * h8300.h: Bit ops with absolute addresses not in the 8 bit
703 area are not available in the base model (H8/300).
704
705 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
706
707 * m68k.h: Remove documentation of ` operand specifier.
708
709 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
710
711 * m68k.h: Document q and v operand specifiers.
712
713 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
714
715 * v850.h (struct v850_opcode): Add processors field.
716 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
717 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
718 (PROCESSOR_V850EA): New bit constants.
719
720 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
721
722 Merge changes from Martin Hunt:
723
724 * d30v.h: Allow up to 64 control registers. Add
725 SHORT_A5S format.
726
727 * d30v.h (LONG_Db): New form for delayed branches.
728
729 * d30v.h: (LONG_Db): New form for repeati.
730
731 * d30v.h (SHORT_D2B): New form.
732
733 * d30v.h (SHORT_A2): New form.
734
735 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
736 registers are used. Needed for VLIW optimization.
737
738 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
739
740 * cgen.h: Move assembler interface section
741 up so cgen_parse_operand_result is defined for cgen_parse_address.
742 (cgen_parse_address): Update prototype.
743
744 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
745
746 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
747
748 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
749
750 * i386.h (two_byte_segment_defaults): Correct base register 5 in
751 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
752 <paubert@iram.es>.
753
754 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
755 <paubert@iram.es>.
756
757 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
758 <paubert@iram.es>.
759
760 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
761 (JUMP_ON_ECX_ZERO): Remove commented out macro.
762
763 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
764
765 * v850.h (V850_NOT_R0): New flag.
766
767 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
768
769 * v850.h (struct v850_opcode): Remove flags field.
770
771 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
772
773 * v850.h (struct v850_opcode): Add flags field.
774 (struct v850_operand): Extend meaning of 'bits' and 'shift'
775 fields.
776 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
777 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
778
779 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
780
781 * arc.h: New file.
782
783 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
784
785 * sparc.h (sparc_opcodes): Declare as const.
786
787 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
788
789 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
790 uses single or double precision floating point resources.
791 (INSN_NO_ISA, INSN_ISA1): Define.
792 (cpu specific INSN macros): Tweak into bitmasks outside the range
793 of INSN_ISA field.
794
795 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
796
797 * i386.h: Fix pand opcode.
798
799 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
800
801 * mips.h: Widen INSN_ISA and move it to a more convenient
802 bit position. Add INSN_3900.
803
804 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
805
806 * mips.h (struct mips_opcode): added new field membership.
807
808 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
809
810 * i386.h (movd): only Reg32 is allowed.
811
812 * i386.h: add fcomp and ud2. From Wayne Scott
813 <wscott@ichips.intel.com>.
814
815 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
816
817 * i386.h: Add MMX instructions.
818
819 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
820
821 * i386.h: Remove W modifier from conditional move instructions.
822
823 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
824
825 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
826 with no arguments to match that generated by the UnixWare
827 assembler.
828
829 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
830
831 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
832 (cgen_parse_operand_fn): Declare.
833 (cgen_init_parse_operand): Declare.
834 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
835 new argument `want'.
836 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
837 (enum cgen_parse_operand_type): New enum.
838
839 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
840
841 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
842
843 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
844
845 * cgen.h: New file.
846
847 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
848
849 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
850 fdivrp.
851
852 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
853
854 * v850.h (extract): Make unsigned.
855
856 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
857
858 * i386.h: Add iclr.
859
860 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
861
862 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
863 take a direction bit.
864
865 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
866
867 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
868
869 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
870
871 * sparc.h: Include <ansidecl.h>. Update function declarations to
872 use prototypes, and to use const when appropriate.
873
874 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
875
876 * mn10300.h (MN10300_OPERAND_RELAX): Define.
877
878 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
879
880 * d10v.h: Change pre_defined_registers to
881 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
882
883 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
884
885 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
886 Change mips_opcodes from const array to a pointer,
887 and change bfd_mips_num_opcodes from const int to int,
888 so that we can increase the size of the mips opcodes table
889 dynamically.
890
891 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
892
893 * d30v.h (FLAG_X): Remove unused flag.
894
895 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
896
897 * d30v.h: New file.
898
899 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
900
901 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
902 (PDS_VALUE): Macro to access value field of predefined symbols.
903 (tic80_next_predefined_symbol): Add prototype.
904
905 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
906
907 * tic80.h (tic80_symbol_to_value): Change prototype to match
908 change in function, added class parameter.
909
910 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
911
912 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
913 endmask fields, which are somewhat weird in that 0 and 32 are
914 treated exactly the same.
915
916 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
917
918 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
919 rather than a constant that is 2**X. Reorder them to put bits for
920 operands that have symbolic names in the upper bits, so they can
921 be packed into an int where the lower bits contain the value that
922 corresponds to that symbolic name.
923 (predefined_symbo): Add struct.
924 (tic80_predefined_symbols): Declare array of translations.
925 (tic80_num_predefined_symbols): Declare size of that array.
926 (tic80_value_to_symbol): Declare function.
927 (tic80_symbol_to_value): Declare function.
928
929 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
930
931 * mn10200.h (MN10200_OPERAND_RELAX): Define.
932
933 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
934
935 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
936 be the destination register.
937
938 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
939
940 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
941 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
942 (TIC80_VECTOR): Define a flag bit for the flags. This one means
943 that the opcode can have two vector instructions in a single
944 32 bit word and we have to encode/decode both.
945
946 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
947
948 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
949 TIC80_OPERAND_RELATIVE for PC relative.
950 (TIC80_OPERAND_BASEREL): New flag bit for register
951 base relative.
952
953 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
954
955 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
956
957 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
958
959 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
960 ":s" modifier for scaling.
961
962 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
963
964 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
965 (TIC80_OPERAND_M_LI): Ditto
966
967 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
968
969 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
970 (TIC80_OPERAND_CC): New define for condition code operand.
971 (TIC80_OPERAND_CR): New define for control register operand.
972
973 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
974
975 * tic80.h (struct tic80_opcode): Name changed.
976 (struct tic80_opcode): Remove format field.
977 (struct tic80_operand): Add insertion and extraction functions.
978 (TIC80_OPERAND_*): Remove old bogus values, start adding new
979 correct ones.
980 (FMT_*): Ditto.
981
982 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
983
984 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
985 type IV instruction offsets.
986
987 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
988
989 * tic80.h: New file.
990
991 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
992
993 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
994
995 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
996
997 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
998 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
999 * v850.h: Fix comment, v850_operand not powerpc_operand.
1000
1001 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1002
1003 * mn10200.h: Flesh out structures and definitions needed by
1004 the mn10200 assembler & disassembler.
1005
1006 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1007
1008 * mips.h: Add mips16 definitions.
1009
1010 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1011
1012 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1013
1014 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1015
1016 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1017 (MN10300_OPERAND_MEMADDR): Define.
1018
1019 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1020
1021 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1022
1023 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1024
1025 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1026
1027 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1028
1029 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1030
1031 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1032
1033 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1034
1035 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1036
1037 * alpha.h: Don't include "bfd.h"; private relocation types are now
1038 negative to minimize problems with shared libraries. Organize
1039 instruction subsets by AMASK extensions and PALcode
1040 implementation.
1041 (struct alpha_operand): Move flags slot for better packing.
1042
1043 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1044
1045 * v850.h (V850_OPERAND_RELAX): New operand flag.
1046
1047 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1048
1049 * mn10300.h (FMT_*): Move operand format definitions
1050 here.
1051
1052 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1053
1054 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1055
1056 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1057
1058 * mn10300.h (mn10300_opcode): Add "format" field.
1059 (MN10300_OPERAND_*): Define.
1060
1061 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1062
1063 * mn10x00.h: Delete.
1064 * mn10200.h, mn10300.h: New files.
1065
1066 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1067
1068 * mn10x00.h: New file.
1069
1070 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1071
1072 * v850.h: Add new flag to indicate this instruction uses a PC
1073 displacement.
1074
1075 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1076
1077 * h8300.h (stmac): Add missing instruction.
1078
1079 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1080
1081 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1082 field.
1083
1084 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1085
1086 * v850.h (V850_OPERAND_EP): Define.
1087
1088 * v850.h (v850_opcode): Add size field.
1089
1090 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1091
1092 * v850.h (v850_operands): Add insert and extract fields, pointers
1093 to functions used to handle unusual operand encoding.
1094 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1095 V850_OPERAND_SIGNED): Defined.
1096
1097 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1098
1099 * v850.h (v850_operands): Add flags field.
1100 (OPERAND_REG, OPERAND_NUM): Defined.
1101
1102 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1103
1104 * v850.h: New file.
1105
1106 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1107
1108 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1109 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1110 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1111 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1112 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1113 Defined.
1114
1115 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1116
1117 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1118 a 3 bit space id instead of a 2 bit space id.
1119
1120 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1121
1122 * d10v.h: Add some additional defines to support the
1123 assembler in determining which operations can be done in parallel.
1124
1125 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1126
1127 * h8300.h (SN): Define.
1128 (eepmov.b): Renamed from "eepmov"
1129 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1130 with them.
1131
1132 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1133
1134 * d10v.h (OPERAND_SHIFT): New operand flag.
1135
1136 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1137
1138 * d10v.h: Changes for divs, parallel-only instructions, and
1139 signed numbers.
1140
1141 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1142
1143 * d10v.h (pd_reg): Define. Putting the definition here allows
1144 the assembler and disassembler to share the same struct.
1145
1146 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1147
1148 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1149 Williams <steve@icarus.com>.
1150
1151 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1152
1153 * d10v.h: New file.
1154
1155 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1156
1157 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1158
1159 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1160
1161 * m68k.h (mcf5200): New macro.
1162 Document names of coldfire control registers.
1163
1164 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1165
1166 * h8300.h (SRC_IN_DST): Define.
1167
1168 * h8300.h (UNOP3): Mark the register operand in this insn
1169 as a source operand, not a destination operand.
1170 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1171 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1172 register operand with SRC_IN_DST.
1173
1174 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1175
1176 * alpha.h: New file.
1177
1178 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1179
1180 * rs6k.h: Remove obsolete file.
1181
1182 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1183
1184 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1185 fdivp, and fdivrp. Add ffreep.
1186
1187 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1188
1189 * h8300.h: Reorder various #defines for readability.
1190 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1191 (BITOP): Accept additional (unused) argument. All callers changed.
1192 (EBITOP): Likewise.
1193 (O_LAST): Bump.
1194 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1195
1196 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1197 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1198 (BITOP, EBITOP): Handle new H8/S addressing modes for
1199 bit insns.
1200 (UNOP3): Handle new shift/rotate insns on the H8/S.
1201 (insns using exr): New instructions.
1202 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1203
1204 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1205
1206 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1207 was incorrect.
1208
1209 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1210
1211 * h8300.h (START): Remove.
1212 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1213 and mov.l insns that can be relaxed.
1214
1215 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1216
1217 * i386.h: Remove Abs32 from lcall.
1218
1219 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1220
1221 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1222 (SLCPOP): New macro.
1223 Mark X,Y opcode letters as in use.
1224
1225 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1226
1227 * sparc.h (F_FLOAT, F_FBR): Define.
1228
1229 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1230
1231 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1232 from all insns.
1233 (ABS8SRC,ABS8DST): Add ABS8MEM.
1234 (add.l): Fix reg+reg variant.
1235 (eepmov.w): Renamed from eepmovw.
1236 (ldc,stc): Fix many cases.
1237
1238 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1239
1240 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1241
1242 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1243
1244 * sparc.h (O): Mark operand letter as in use.
1245
1246 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1247
1248 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1249 Mark operand letters uU as in use.
1250
1251 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1252
1253 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1254 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1255 (SPARC_OPCODE_SUPPORTED): New macro.
1256 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1257 (F_NOTV9): Delete.
1258
1259 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1260
1261 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1262 declaration consistent with return type in definition.
1263
1264 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1265
1266 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1267
1268 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1269
1270 * i386.h (i386_regtab): Add 80486 test registers.
1271
1272 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1273
1274 * i960.h (I_HX): Define.
1275 (i960_opcodes): Add HX instruction.
1276
1277 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1278
1279 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1280 and fclex.
1281
1282 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1283
1284 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1285 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1286 (bfd_* defines): Delete.
1287 (sparc_opcode_archs): Replaces architecture_pname.
1288 (sparc_opcode_lookup_arch): Declare.
1289 (NUMOPCODES): Delete.
1290
1291 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1292
1293 * sparc.h (enum sparc_architecture): Add v9a.
1294 (ARCHITECTURES_CONFLICT_P): Update.
1295
1296 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1297
1298 * i386.h: Added Pentium Pro instructions.
1299
1300 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1301
1302 * m68k.h: Document new 'W' operand place.
1303
1304 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1305
1306 * hppa.h: Add lci and syncdma instructions.
1307
1308 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1309
1310 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1311 instructions.
1312
1313 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1314
1315 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1316 assembler's -mcom and -many switches.
1317
1318 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1319
1320 * i386.h: Fix cmpxchg8b extension opcode description.
1321
1322 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1323
1324 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1325 and register cr4.
1326
1327 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1328
1329 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1330
1331 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1332
1333 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1334
1335 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1336
1337 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1338
1339 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1340
1341 * m68kmri.h: Remove.
1342
1343 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1344 declarations. Remove F_ALIAS and flag field of struct
1345 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1346 int. Make name and args fields of struct m68k_opcode const.
1347
1348 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1349
1350 * sparc.h (F_NOTV9): Define.
1351
1352 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1353
1354 * mips.h (INSN_4010): Define.
1355
1356 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1357
1358 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1359
1360 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1361 * m68k.h: Fix argument descriptions of coprocessor
1362 instructions to allow only alterable operands where appropriate.
1363 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1364 (m68k_opcode_aliases): Add more aliases.
1365
1366 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1367
1368 * m68k.h: Added explcitly short-sized conditional branches, and a
1369 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1370 svr4-based configurations.
1371
1372 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1373
1374 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1375 * i386.h: added missing Data16/Data32 flags to a few instructions.
1376
1377 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1378
1379 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1380 (OP_MASK_BCC, OP_SH_BCC): Define.
1381 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1382 (OP_MASK_CCC, OP_SH_CCC): Define.
1383 (INSN_READ_FPR_R): Define.
1384 (INSN_RFE): Delete.
1385
1386 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1387
1388 * m68k.h (enum m68k_architecture): Deleted.
1389 (struct m68k_opcode_alias): New type.
1390 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1391 matching constraints, values and flags. As a side effect of this,
1392 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1393 as I know were never used, now may need re-examining.
1394 (numopcodes): Now const.
1395 (m68k_opcode_aliases, numaliases): New variables.
1396 (endop): Deleted.
1397 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1398 m68k_opcode_aliases; update declaration of m68k_opcodes.
1399
1400 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1401
1402 * hppa.h (delay_type): Delete unused enumeration.
1403 (pa_opcode): Replace unused delayed field with an architecture
1404 field.
1405 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1406
1407 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1408
1409 * mips.h (INSN_ISA4): Define.
1410
1411 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1412
1413 * mips.h (M_DLA_AB, M_DLI): Define.
1414
1415 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1416
1417 * hppa.h (fstwx): Fix single-bit error.
1418
1419 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1420
1421 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1422
1423 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1424
1425 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1426 debug registers. From Charles Hannum (mycroft@netbsd.org).
1427
1428 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1429
1430 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1431 i386 support:
1432 * i386.h (MOV_AX_DISP32): New macro.
1433 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1434 of several call/return instructions.
1435 (ADDR_PREFIX_OPCODE): New macro.
1436
1437 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1438
1439 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1440
1441 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1442 it pointer to const char;
1443 (struct vot, field `name'): ditto.
1444
1445 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1446
1447 * vax.h: Supply and properly group all values in end sentinel.
1448
1449 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1450
1451 * mips.h (INSN_ISA, INSN_4650): Define.
1452
1453 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1454
1455 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1456 systems with a separate instruction and data cache, such as the
1457 29040, these instructions take an optional argument.
1458
1459 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1460
1461 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1462 INSN_TRAP.
1463
1464 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1465
1466 * mips.h (INSN_STORE_MEMORY): Define.
1467
1468 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1469
1470 * sparc.h: Document new operand type 'x'.
1471
1472 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1473
1474 * i960.h (I_CX2): New instruction category. It includes
1475 instructions available on Cx and Jx processors.
1476 (I_JX): New instruction category, for JX-only instructions.
1477 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1478 Jx-only instructions, in I_JX category.
1479
1480 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1481
1482 * ns32k.h (endop): Made pointer const too.
1483
1484 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1485
1486 * ns32k.h: Drop Q operand type as there is no correct use
1487 for it. Add I and Z operand types which allow better checking.
1488
1489 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1490
1491 * h8300.h (xor.l) :fix bit pattern.
1492 (L_2): New size of operand.
1493 (trapa): Use it.
1494
1495 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1496
1497 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1498
1499 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1500
1501 * sparc.h: Include v9 definitions.
1502
1503 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1504
1505 * m68k.h (m68060): Defined.
1506 (m68040up, mfloat, mmmu): Include it.
1507 (struct m68k_opcode): Widen `arch' field.
1508 (m68k_opcodes): Updated for M68060. Removed comments that were
1509 instructions commented out by "JF" years ago.
1510
1511 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1512
1513 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1514 add a one-bit `flags' field.
1515 (F_ALIAS): New macro.
1516
1517 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1518
1519 * h8300.h (dec, inc): Get encoding right.
1520
1521 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1522
1523 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1524 a flag instead.
1525 (PPC_OPERAND_SIGNED): Define.
1526 (PPC_OPERAND_SIGNOPT): Define.
1527
1528 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1529
1530 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1531 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1532
1533 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1534
1535 * i386.h: Reverse last change. It'll be handled in gas instead.
1536
1537 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1538
1539 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1540 slower on the 486 and used the implicit shift count despite the
1541 explicit operand. The one-operand form is still available to get
1542 the shorter form with the implicit shift count.
1543
1544 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1545
1546 * hppa.h: Fix typo in fstws arg string.
1547
1548 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1549
1550 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1551
1552 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1553
1554 * ppc.h (PPC_OPCODE_601): Define.
1555
1556 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1557
1558 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1559 (so we can determine valid completers for both addb and addb[tf].)
1560
1561 * hppa.h (xmpyu): No floating point format specifier for the
1562 xmpyu instruction.
1563
1564 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1565
1566 * ppc.h (PPC_OPERAND_NEXT): Define.
1567 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1568 (struct powerpc_macro): Define.
1569 (powerpc_macros, powerpc_num_macros): Declare.
1570
1571 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1572
1573 * ppc.h: New file. Header file for PowerPC opcode table.
1574
1575 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1576
1577 * hppa.h: More minor template fixes for sfu and copr (to allow
1578 for easier disassembly).
1579
1580 * hppa.h: Fix templates for all the sfu and copr instructions.
1581
1582 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1583
1584 * i386.h (push): Permit Imm16 operand too.
1585
1586 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1587
1588 * h8300.h (andc): Exists in base arch.
1589
1590 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1591
1592 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1593 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1594
1595 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1596
1597 * hppa.h: Add FP quadword store instructions.
1598
1599 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1600
1601 * mips.h: (M_J_A): Added.
1602 (M_LA): Removed.
1603
1604 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1605
1606 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1607 <mellon@pepper.ncd.com>.
1608
1609 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1610
1611 * hppa.h: Immediate field in probei instructions is unsigned,
1612 not low-sign extended.
1613
1614 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1615
1616 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1617
1618 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1619
1620 * i386.h: Add "fxch" without operand.
1621
1622 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1623
1624 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1625
1626 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1627
1628 * hppa.h: Add gfw and gfr to the opcode table.
1629
1630 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1631
1632 * m88k.h: extended to handle m88110.
1633
1634 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1635
1636 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1637 addresses.
1638
1639 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1640
1641 * i960.h (i960_opcodes): Properly bracket initializers.
1642
1643 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1644
1645 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1646
1647 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1648
1649 * m68k.h (two): Protect second argument with parentheses.
1650
1651 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1652
1653 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1654 Deleted old in/out instructions in "#if 0" section.
1655
1656 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1657
1658 * i386.h (i386_optab): Properly bracket initializers.
1659
1660 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1661
1662 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1663 Jeff Law, law@cs.utah.edu).
1664
1665 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1666
1667 * i386.h (lcall): Accept Imm32 operand also.
1668
1669 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1670
1671 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1672 (M_DABS): Added.
1673
1674 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1675
1676 * mips.h (INSN_*): Changed values. Removed unused definitions.
1677 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1678 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1679 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1680 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1681 (M_*): Added new values for r6000 and r4000 macros.
1682 (ANY_DELAY): Removed.
1683
1684 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1685
1686 * mips.h: Added M_LI_S and M_LI_SS.
1687
1688 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1689
1690 * h8300.h: Get some rare mov.bs correct.
1691
1692 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1693
1694 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1695 been included.
1696
1697 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1698
1699 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1700 jump instructions, for use in disassemblers.
1701
1702 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1703
1704 * m88k.h: Make bitfields just unsigned, not unsigned long or
1705 unsigned short.
1706
1707 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1708
1709 * hppa.h: New argument type 'y'. Use in various float instructions.
1710
1711 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1712
1713 * hppa.h (break): First immediate field is unsigned.
1714
1715 * hppa.h: Add rfir instruction.
1716
1717 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1718
1719 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1720
1721 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1722
1723 * mips.h: Reworked the hazard information somewhat, and fixed some
1724 bugs in the instruction hazard descriptions.
1725
1726 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1727
1728 * m88k.h: Corrected a couple of opcodes.
1729
1730 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1731
1732 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1733 new version includes instruction hazard information, but is
1734 otherwise reasonably similar.
1735
1736 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1737
1738 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1739
1740 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1741
1742 Patches from Jeff Law, law@cs.utah.edu:
1743 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1744 Make the tables be the same for the following instructions:
1745 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1746 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1747 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1748 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1749 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1750 "fcmp", and "ftest".
1751
1752 * hppa.h: Make new and old tables the same for "break", "mtctl",
1753 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1754 Fix typo in last patch. Collapse several #ifdefs into a
1755 single #ifdef.
1756
1757 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1758 of the comments up-to-date.
1759
1760 * hppa.h: Update "free list" of letters and update
1761 comments describing each letter's function.
1762
1763 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1764
1765 * h8300.h: checkpoint, includes H8/300-H opcodes.
1766
1767 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1768
1769 * Patches from Jeffrey Law <law@cs.utah.edu>.
1770 * hppa.h: Rework single precision FP
1771 instructions so that they correctly disassemble code
1772 PA1.1 code.
1773
1774 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1775
1776 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1777 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1778
1779 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1780
1781 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1782 gdb will define it for now.
1783
1784 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1785
1786 * sparc.h: Don't end enumerator list with comma.
1787
1788 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1789
1790 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1791 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1792 ("bc2t"): Correct typo.
1793 ("[ls]wc[023]"): Use T rather than t.
1794 ("c[0123]"): Define general coprocessor instructions.
1795
1796 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1797
1798 * m68k.h: Move split point for gcc compilation more towards
1799 middle.
1800
1801 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1802
1803 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1804 simply wrong, ics, rfi, & rfsvc were missing).
1805 Add "a" to opr_ext for "bb". Doc fix.
1806
1807 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1808
1809 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1810 * mips.h: Add casts, to suppress warnings about shifting too much.
1811 * m68k.h: Document the placement code '9'.
1812
1813 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1814
1815 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1816 allows callers to break up the large initialized struct full of
1817 opcodes into two half-sized ones. This permits GCC to compile
1818 this module, since it takes exponential space for initializers.
1819 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1820
1821 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1822
1823 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1824 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1825 initialized structs in it.
1826
1827 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1828
1829 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1830 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1831 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1832
1833 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1834
1835 * mips.h: document "i" and "j" operands correctly.
1836
1837 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1838
1839 * mips.h: Removed endianness dependency.
1840
1841 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1842
1843 * h8300.h: include info on number of cycles per instruction.
1844
1845 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1846
1847 * hppa.h: Move handy aliases to the front. Fix masks for extract
1848 and deposit instructions.
1849
1850 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1851
1852 * i386.h: accept shld and shrd both with and without the shift
1853 count argument, which is always %cl.
1854
1855 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1856
1857 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1858 (one_byte_segment_defaults, two_byte_segment_defaults,
1859 i386_prefixtab_end): Ditto.
1860
1861 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1862
1863 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1864 for operand 2; from John Carr, jfc@dsg.dec.com.
1865
1866 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1867
1868 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1869 always use 16-bit offsets. Makes calculated-size jump tables
1870 feasible.
1871
1872 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1873
1874 * i386.h: Fix one-operand forms of in* and out* patterns.
1875
1876 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1877
1878 * m68k.h: Added CPU32 support.
1879
1880 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1881
1882 * mips.h (break): Disassemble the argument. Patch from
1883 jonathan@cs.stanford.edu (Jonathan Stone).
1884
1885 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1886
1887 * m68k.h: merged Motorola and MIT syntax.
1888
1889 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1890
1891 * m68k.h (pmove): make the tests less strict, the 68k book is
1892 wrong.
1893
1894 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1895
1896 * m68k.h (m68ec030): Defined as alias for 68030.
1897 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1898 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1899 them. Tightened description of "fmovex" to distinguish it from
1900 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1901 up descriptions that claimed versions were available for chips not
1902 supporting them. Added "pmovefd".
1903
1904 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1905
1906 * m68k.h: fix where the . goes in divull
1907
1908 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1909
1910 * m68k.h: the cas2 instruction is supposed to be written with
1911 indirection on the last two operands, which can be either data or
1912 address registers. Added a new operand type 'r' which accepts
1913 either register type. Added new cases for cas2l and cas2w which
1914 use them. Corrected masks for cas2 which failed to recognize use
1915 of address register.
1916
1917 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1918
1919 * m68k.h: Merged in patches (mostly m68040-specific) from
1920 Colin Smith <colin@wrs.com>.
1921
1922 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1923 base). Also cleaned up duplicates, re-ordered instructions for
1924 the sake of dis-assembling (so aliases come after standard names).
1925 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1926
1927 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1928
1929 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1930 all missing .s
1931
1932 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1933
1934 * sparc.h: Moved tables to BFD library.
1935
1936 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1937
1938 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1939
1940 * h8300.h: Finish filling in all the holes in the opcode table,
1941 so that the Lucid C compiler can digest this as well...
1942
1943 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1944
1945 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1946 Fix opcodes on various sizes of fild/fist instructions
1947 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1948 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1949
1950 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1951
1952 * h8300.h: Fill in all the holes in the opcode table so that the
1953 losing HPUX C compiler can digest this...
1954
1955 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1956
1957 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1958 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1959
1960 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1961
1962 * sparc.h: Add new architecture variant sparclite; add its scan
1963 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1964
1965 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
1966
1967 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1968 fy@lucid.com).
1969
1970 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
1971
1972 * rs6k.h: New version from IBM (Metin).
1973
1974 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
1975
1976 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1977 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
1978
1979 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1980
1981 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1982
1983 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
1984
1985 * m68k.h (one, two): Cast macro args to unsigned to suppress
1986 complaints from compiler and lint about integer overflow during
1987 shift.
1988
1989 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1990
1991 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1992
1993 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1994
1995 * mips.h: Make bitfield layout depend on the HOST compiler,
1996 not on the TARGET system.
1997
1998 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
1999
2000 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2001 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2002 <TRANLE@INTELLICORP.COM>.
2003
2004 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2005
2006 * h8300.h: turned op_type enum into #define list
2007
2008 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2009
2010 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2011 similar instructions -- they've been renamed to "fitoq", etc.
2012 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2013 number of arguments.
2014 * h8300.h: Remove extra ; which produces compiler warning.
2015
2016 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2017
2018 * sparc.h: fix opcode for tsubcctv.
2019
2020 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2021
2022 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2023
2024 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2025
2026 * sparc.h (nop): Made the 'lose' field be even tighter,
2027 so only a standard 'nop' is disassembled as a nop.
2028
2029 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2030
2031 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2032 disassembled as a nop.
2033
2034 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2035
2036 * sparc.h: fix a typo.
2037
2038 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2039
2040 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2041 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2042 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2043
2044 \f
2045 Local Variables:
2046 version-control: never
2047 End:
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