This commit was generated by cvs2svn to track changes on a CVS vendor
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 1999-12-30 Andrew Haley <aph@cygnus.com>
2
3 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg.
4
5 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
6
7 * i386.h: Qualify intel mode far call and jmp with x_Suf.
8
9 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
10
11 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
12 indirect jumps and calls. Add FF/3 call for intel mode.
13
14 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
15
16 * mn10300.h: Add new operand types. Add new instruction formats.
17
18 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
19
20 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
21 instruction.
22
23 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
24
25 * mips.h (INSN_ISA5): New.
26
27 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
28
29 * mips.h (OPCODE_IS_MEMBER): New.
30
31 1999-10-29 Nick Clifton <nickc@cygnus.com>
32
33 * d30v.h (SHORT_AR): Define.
34
35 1999-10-18 Michael Meissner <meissner@cygnus.com>
36
37 * alpha.h (alpha_num_opcodes): Convert to unsigned.
38 (alpha_num_operands): Ditto.
39
40 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
41
42 * hppa.h (pa_opcodes): Add load and store cache control to
43 instructions. Add ordered access load and store.
44
45 * hppa.h (pa_opcode): Add new entries for addb and addib.
46
47 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
48
49 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
50
51 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
52
53 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
54
55 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
56
57 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
58 and "be" using completer prefixes.
59
60 * hppa.h (pa_opcodes): Add initializers to silence compiler.
61
62 * hppa.h: Update comments about character usage.
63
64 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
65
66 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
67 up the new fstw & bve instructions.
68
69 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
70
71 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
72 instructions.
73
74 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
75
76 * hppa.h (pa_opcodes): Add long offset double word load/store
77 instructions.
78
79 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
80 stores.
81
82 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
83
84 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
85
86 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
87
88 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
89
90 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
91
92 * hppa.h (pa_opcodes): Add support for "b,l".
93
94 * hppa.h (pa_opcodes): Add support for "b,gate".
95
96 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
97
98 * hppa.h (pa_opcodes): Use 'fX' for first register operand
99 in xmpyu.
100
101 * hppa.h (pa_opcodes): Fix mask for probe and probei.
102
103 * hppa.h (pa_opcodes): Fix mask for depwi.
104
105 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
106
107 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
108 an explicit output argument.
109
110 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
111
112 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
113 Add a few PA2.0 loads and store variants.
114
115 1999-09-04 Steve Chamberlain <sac@pobox.com>
116
117 * pj.h: New file.
118
119 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
120
121 * i386.h (i386_regtab): Move %st to top of table, and split off
122 other fp reg entries.
123 (i386_float_regtab): To here.
124
125 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
126
127 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
128 by 'f'.
129
130 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
131 Add supporting args.
132
133 * hppa.h: Document new completers and args.
134 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
135 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
136 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
137 pmenb and pmdis.
138
139 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
140 hshr, hsub, mixh, mixw, permh.
141
142 * hppa.h (pa_opcodes): Change completers in instructions to
143 use 'c' prefix.
144
145 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
146 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
147
148 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
149 fnegabs to use 'I' instead of 'F'.
150
151 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
152
153 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
154 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
155 Alphabetically sort PIII insns.
156
157 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
158
159 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
160
161 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
162
163 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
164 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
165
166 * hppa.h: Document 64 bit condition completers.
167
168 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
169
170 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
171
172 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
173
174 * i386.h (i386_optab): Add DefaultSize modifier to all insns
175 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
176 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
177
178 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
179 Jeff Law <law@cygnus.com>
180
181 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
182
183 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
184
185 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
186 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
187
188 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
189
190 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
191
192 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
193
194 * hppa.h (struct pa_opcode): Add new field "flags".
195 (FLAGS_STRICT): Define.
196
197 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
198 Jeff Law <law@cygnus.com>
199
200 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
201
202 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
203
204 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
205
206 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
207 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
208 flag to fcomi and friends.
209
210 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
211
212 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
213 integer logical instructions.
214
215 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
216
217 * m68k.h: Document new formats `E', `G', `H' and new places `N',
218 `n', `o'.
219
220 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
221 and new places `m', `M', `h'.
222
223 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
224
225 * hppa.h (pa_opcodes): Add several processor specific system
226 instructions.
227
228 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
229
230 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
231 "addb", and "addib" to be used by the disassembler.
232
233 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
234
235 * i386.h (ReverseModrm): Remove all occurences.
236 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
237 movmskps, pextrw, pmovmskb, maskmovq.
238 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
239 ignore the data size prefix.
240
241 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
242 Mostly stolen from Doug Ledford <dledford@redhat.com>
243
244 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
245
246 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
247
248 1999-04-14 Doug Evans <devans@casey.cygnus.com>
249
250 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
251 (CGEN_ATTR_TYPE): Update.
252 (CGEN_ATTR_MASK): Number booleans starting at 0.
253 (CGEN_ATTR_VALUE): Update.
254 (CGEN_INSN_ATTR): Update.
255
256 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
257
258 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
259 instructions.
260
261 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
262
263 * hppa.h (bb, bvb): Tweak opcode/mask.
264
265
266 1999-03-22 Doug Evans <devans@casey.cygnus.com>
267
268 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
269 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
270 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
271 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
272 Delete member max_insn_size.
273 (enum cgen_cpu_open_arg): New enum.
274 (cpu_open): Update prototype.
275 (cpu_open_1): Declare.
276 (cgen_set_cpu): Delete.
277
278 1999-03-11 Doug Evans <devans@casey.cygnus.com>
279
280 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
281 (CGEN_OPERAND_NIL): New macro.
282 (CGEN_OPERAND): New member `type'.
283 (@arch@_cgen_operand_table): Delete decl.
284 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
285 (CGEN_OPERAND_TABLE): New struct.
286 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
287 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
288 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
289 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
290 {get,set}_{int,vma}_operand.
291 (@arch@_cgen_cpu_open): New arg `isa'.
292 (cgen_set_cpu): Ditto.
293
294 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
295
296 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
297
298 1999-02-25 Doug Evans <devans@casey.cygnus.com>
299
300 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
301 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
302 enum cgen_hw_type.
303 (CGEN_HW_TABLE): New struct.
304 (hw_table): Delete declaration.
305 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
306 to table entry to enum.
307 (CGEN_OPINST): Ditto.
308 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
309
310 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
311
312 * alpha.h (AXP_OPCODE_EV6): New.
313 (AXP_OPCODE_NOPAL): Include it.
314
315 1999-02-09 Doug Evans <devans@casey.cygnus.com>
316
317 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
318 All uses updated. New members int_insn_p, max_insn_size,
319 parse_operand,insert_operand,extract_operand,print_operand,
320 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
321 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
322 extract_handlers,print_handlers.
323 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
324 (CGEN_ATTR_BOOL_OFFSET): New macro.
325 (CGEN_ATTR_MASK): Subtract it to compute bit number.
326 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
327 (cgen_opcode_handler): Renamed from cgen_base.
328 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
329 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
330 all uses updated.
331 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
332 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
333 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
334 (CGEN_OPCODE,CGEN_IBASE): New types.
335 (CGEN_INSN): Rewrite.
336 (CGEN_{ASM,DIS}_HASH*): Delete.
337 (init_opcode_table,init_ibld_table): Declare.
338 (CGEN_INSN_ATTR): New type.
339
340 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
341
342 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
343 (x_FP, d_FP, dls_FP, sldx_FP): Define.
344 Change *Suf definitions to include x and d suffixes.
345 (movsx): Use w_Suf and b_Suf.
346 (movzx): Likewise.
347 (movs): Use bwld_Suf.
348 (fld): Change ordering. Use sld_FP.
349 (fild): Add Intel Syntax equivalent of fildq.
350 (fst): Use sld_FP.
351 (fist): Use sld_FP.
352 (fstp): Use sld_FP. Add x_FP version.
353 (fistp): LLongMem version for Intel Syntax.
354 (fcom, fcomp): Use sld_FP.
355 (fadd, fiadd, fsub): Use sld_FP.
356 (fsubr): Use sld_FP.
357 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
358
359 1999-01-27 Doug Evans <devans@casey.cygnus.com>
360
361 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
362 CGEN_MODE_UINT.
363
364 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
365
366 * hppa.h (bv): Fix mask.
367
368 1999-01-05 Doug Evans <devans@casey.cygnus.com>
369
370 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
371 (CGEN_ATTR): Use it.
372 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
373 (CGEN_ATTR_TABLE): New member dfault.
374
375 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
376
377 * mips.h (MIPS16_INSN_BRANCH): New.
378
379 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
380
381 The following is part of a change made by Edith Epstein
382 <eepstein@sophia.cygnus.com> as part of a project to merge in
383 changes by HP; HP did not create ChangeLog entries.
384
385 * hppa.h (completer_chars): list of chars to not put a space
386 after.
387
388 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
389
390 * i386.h (i386_optab): Permit w suffix on processor control and
391 status word instructions.
392
393 1998-11-30 Doug Evans <devans@casey.cygnus.com>
394
395 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
396 (struct cgen_keyword_entry): Ditto.
397 (struct cgen_operand): Ditto.
398 (CGEN_IFLD): New typedef, with associated access macros.
399 (CGEN_IFMT): New typedef, with associated access macros.
400 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
401 (CGEN_IVALUE): New typedef.
402 (struct cgen_insn): Delete const on syntax,attrs members.
403 `format' now points to format data. Type of `value' is now
404 CGEN_IVALUE.
405 (struct cgen_opcode_table): New member ifld_table.
406
407 1998-11-18 Doug Evans <devans@casey.cygnus.com>
408
409 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
410 (CGEN_OPERAND_INSTANCE): New member `attrs'.
411 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
412 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
413 (cgen_opcode_table): Update type of dis_hash fn.
414 (extract_operand): Update type of `insn_value' arg.
415
416 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
417
418 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
419
420 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
421
422 * mips.h (INSN_MULT): Added.
423
424 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
425
426 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
427
428 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
429
430 * cgen.h (CGEN_INSN_INT): New typedef.
431 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
432 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
433 (CGEN_INSN_BYTES_PTR): New typedef.
434 (CGEN_EXTRACT_INFO): New typedef.
435 (cgen_insert_fn,cgen_extract_fn): Update.
436 (cgen_opcode_table): New member `insn_endian'.
437 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
438 (insert_operand,extract_operand): Update.
439 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
440
441 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
442
443 * cgen.h (CGEN_ATTR_BOOLS): New macro.
444 (struct CGEN_HW_ENTRY): New member `attrs'.
445 (CGEN_HW_ATTR): New macro.
446 (struct CGEN_OPERAND_INSTANCE): New member `name'.
447 (CGEN_INSN_INVALID_P): New macro.
448
449 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
450
451 * hppa.h: Add "fid".
452
453 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
454
455 From Robert Andrew Dale <rob@nb.net>
456 * i386.h (i386_optab): Add AMD 3DNow! instructions.
457 (AMD_3DNOW_OPCODE): Define.
458
459 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
460
461 * d30v.h (EITHER_BUT_PREFER_MU): Define.
462
463 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
464
465 * cgen.h (cgen_insn): #if 0 out element `cdx'.
466
467 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
468
469 Move all global state data into opcode table struct, and treat
470 opcode table as something that is "opened/closed".
471 * cgen.h (CGEN_OPCODE_DESC): New type.
472 (all fns): New first arg of opcode table descriptor.
473 (cgen_set_parse_operand_fn): Add prototype.
474 (cgen_current_machine,cgen_current_endian): Delete.
475 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
476 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
477 dis_hash_table,dis_hash_table_entries.
478 (opcode_open,opcode_close): Add prototypes.
479
480 * cgen.h (cgen_insn): New element `cdx'.
481
482 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
483
484 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
485
486 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
487
488 * mn10300.h: Add "no_match_operands" field for instructions.
489 (MN10300_MAX_OPERANDS): Define.
490
491 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
492
493 * cgen.h (cgen_macro_insn_count): Declare.
494
495 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
496
497 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
498 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
499 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
500 set_{int,vma}_operand.
501
502 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
503
504 * mn10300.h: Add "machine" field for instructions.
505 (MN103, AM30): Define machine types.
506
507 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
508
509 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
510
511 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
512
513 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
514
515 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
516
517 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
518 and ud2b.
519 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
520 those that happen to be implemented on pentiums.
521
522 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
523
524 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
525 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
526 with Size16|IgnoreSize or Size32|IgnoreSize.
527
528 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
529
530 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
531 (REPE): Rename to REPE_PREFIX_OPCODE.
532 (i386_regtab_end): Remove.
533 (i386_prefixtab, i386_prefixtab_end): Remove.
534 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
535 of md_begin.
536 (MAX_OPCODE_SIZE): Define.
537 (i386_optab_end): Remove.
538 (sl_Suf): Define.
539 (sl_FP): Use sl_Suf.
540
541 * i386.h (i386_optab): Allow 16 bit displacement for `mov
542 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
543 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
544 data32, dword, and adword prefixes.
545 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
546 regs.
547
548 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
549
550 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
551
552 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
553 register operands, because this is a common idiom. Flag them with
554 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
555 fdivrp because gcc erroneously generates them. Also flag with a
556 warning.
557
558 * i386.h: Add suffix modifiers to most insns, and tighter operand
559 checks in some cases. Fix a number of UnixWare compatibility
560 issues with float insns. Merge some floating point opcodes, using
561 new FloatMF modifier.
562 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
563 consistency.
564
565 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
566 IgnoreDataSize where appropriate.
567
568 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
569
570 * i386.h: (one_byte_segment_defaults): Remove.
571 (two_byte_segment_defaults): Remove.
572 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
573
574 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
575
576 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
577 (cgen_hw_lookup_by_num): Declare.
578
579 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
580
581 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
582 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
583
584 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
585
586 * cgen.h (cgen_asm_init_parse): Delete.
587 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
588 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
589
590 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
591
592 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
593 (cgen_asm_finish_insn): Update prototype.
594 (cgen_insn): New members num, data.
595 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
596 dis_hash, dis_hash_table_size moved to ...
597 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
598 All uses updated. New members asm_hash_p, dis_hash_p.
599 (CGEN_MINSN_EXPANSION): New struct.
600 (cgen_expand_macro_insn): Declare.
601 (cgen_macro_insn_count): Declare.
602 (get_insn_operands): Update prototype.
603 (lookup_get_insn_operands): Declare.
604
605 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
606
607 * i386.h (i386_optab): Change iclrKludge and imulKludge to
608 regKludge. Add operands types for string instructions.
609
610 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
611
612 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
613 table.
614
615 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
616
617 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
618 for `gettext'.
619
620 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
621
622 * i386.h: Remove NoModrm flag from all insns: it's never checked.
623 Add IsString flag to string instructions.
624 (IS_STRING): Don't define.
625 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
626 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
627 (SS_PREFIX_OPCODE): Define.
628
629 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
630
631 * i386.h: Revert March 24 patch; no more LinearAddress.
632
633 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
634
635 * i386.h (i386_optab): Remove fwait (9b) from all floating point
636 instructions, and instead add FWait opcode modifier. Add short
637 form of fldenv and fstenv.
638 (FWAIT_OPCODE): Define.
639
640 * i386.h (i386_optab): Change second operand constraint of `mov
641 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
642 allow legal instructions such as `movl %gs,%esi'
643
644 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
645
646 * h8300.h: Various changes to fully bracket initializers.
647
648 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
649
650 * i386.h: Set LinearAddress for lidt and lgdt.
651
652 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
653
654 * cgen.h (CGEN_BOOL_ATTR): New macro.
655
656 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
657
658 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
659
660 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
661
662 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
663 (cgen_insn): Record syntax and format entries here, rather than
664 separately.
665
666 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
667
668 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
669
670 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
671
672 * cgen.h (cgen_insert_fn): Change type of result to const char *.
673 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
674 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
675
676 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
677
678 * cgen.h (lookup_insn): New argument alias_p.
679
680 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
681
682 Fix rac to accept only a0:
683 * d10v.h (OPERAND_ACC): Split into:
684 (OPERAND_ACC0, OPERAND_ACC1) .
685 (OPERAND_GPR): Define.
686
687 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
688
689 * cgen.h (CGEN_FIELDS): Define here.
690 (CGEN_HW_ENTRY): New member `type'.
691 (hw_list): Delete decl.
692 (enum cgen_mode): Declare.
693 (CGEN_OPERAND): New member `hw'.
694 (enum cgen_operand_instance_type): Declare.
695 (CGEN_OPERAND_INSTANCE): New type.
696 (CGEN_INSN): New member `operands'.
697 (CGEN_OPCODE_DATA): Make hw_list const.
698 (get_insn_operands,lookup_insn): Add prototypes for.
699
700 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
701
702 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
703 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
704 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
705 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
706
707 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
708
709 * cgen.h: Correct typo in comment end marker.
710
711 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
712
713 * tic30.h: New file.
714
715 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
716
717 * cgen.h: Add prototypes for cgen_save_fixups(),
718 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
719 of cgen_asm_finish_insn() to return a char *.
720
721 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
722
723 * cgen.h: Formatting changes to improve readability.
724
725 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
726
727 * cgen.h (*): Clean up pass over `struct foo' usage.
728 (CGEN_ATTR): Make unsigned char.
729 (CGEN_ATTR_TYPE): Update.
730 (CGEN_ATTR_{ENTRY,TABLE}): New types.
731 (cgen_base): Move member `attrs' to cgen_insn.
732 (CGEN_KEYWORD): New member `null_entry'.
733 (CGEN_{SYNTAX,FORMAT}): New types.
734 (cgen_insn): Format and syntax separated from each other.
735
736 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
737
738 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
739 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
740 flags_{used,set} long.
741 (d30v_operand): Make flags field long.
742
743 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
744
745 * m68k.h: Fix comment describing operand types.
746
747 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
748
749 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
750 everything else after down.
751
752 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
753
754 * d10v.h (OPERAND_FLAG): Split into:
755 (OPERAND_FFLAG, OPERAND_CFLAG) .
756
757 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
758
759 * mips.h (struct mips_opcode): Changed comments to reflect new
760 field usage.
761
762 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
763
764 * mips.h: Added to comments a quick-ref list of all assigned
765 operand type characters.
766 (OP_{MASK,SH}_PERFREG): New macros.
767
768 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
769
770 * sparc.h: Add '_' and '/' for v9a asr's.
771 Patch from David Miller <davem@vger.rutgers.edu>
772
773 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
774
775 * h8300.h: Bit ops with absolute addresses not in the 8 bit
776 area are not available in the base model (H8/300).
777
778 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
779
780 * m68k.h: Remove documentation of ` operand specifier.
781
782 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
783
784 * m68k.h: Document q and v operand specifiers.
785
786 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
787
788 * v850.h (struct v850_opcode): Add processors field.
789 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
790 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
791 (PROCESSOR_V850EA): New bit constants.
792
793 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
794
795 Merge changes from Martin Hunt:
796
797 * d30v.h: Allow up to 64 control registers. Add
798 SHORT_A5S format.
799
800 * d30v.h (LONG_Db): New form for delayed branches.
801
802 * d30v.h: (LONG_Db): New form for repeati.
803
804 * d30v.h (SHORT_D2B): New form.
805
806 * d30v.h (SHORT_A2): New form.
807
808 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
809 registers are used. Needed for VLIW optimization.
810
811 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
812
813 * cgen.h: Move assembler interface section
814 up so cgen_parse_operand_result is defined for cgen_parse_address.
815 (cgen_parse_address): Update prototype.
816
817 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
818
819 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
820
821 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
822
823 * i386.h (two_byte_segment_defaults): Correct base register 5 in
824 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
825 <paubert@iram.es>.
826
827 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
828 <paubert@iram.es>.
829
830 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
831 <paubert@iram.es>.
832
833 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
834 (JUMP_ON_ECX_ZERO): Remove commented out macro.
835
836 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
837
838 * v850.h (V850_NOT_R0): New flag.
839
840 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
841
842 * v850.h (struct v850_opcode): Remove flags field.
843
844 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
845
846 * v850.h (struct v850_opcode): Add flags field.
847 (struct v850_operand): Extend meaning of 'bits' and 'shift'
848 fields.
849 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
850 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
851
852 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
853
854 * arc.h: New file.
855
856 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
857
858 * sparc.h (sparc_opcodes): Declare as const.
859
860 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
861
862 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
863 uses single or double precision floating point resources.
864 (INSN_NO_ISA, INSN_ISA1): Define.
865 (cpu specific INSN macros): Tweak into bitmasks outside the range
866 of INSN_ISA field.
867
868 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
869
870 * i386.h: Fix pand opcode.
871
872 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
873
874 * mips.h: Widen INSN_ISA and move it to a more convenient
875 bit position. Add INSN_3900.
876
877 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
878
879 * mips.h (struct mips_opcode): added new field membership.
880
881 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
882
883 * i386.h (movd): only Reg32 is allowed.
884
885 * i386.h: add fcomp and ud2. From Wayne Scott
886 <wscott@ichips.intel.com>.
887
888 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
889
890 * i386.h: Add MMX instructions.
891
892 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
893
894 * i386.h: Remove W modifier from conditional move instructions.
895
896 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
897
898 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
899 with no arguments to match that generated by the UnixWare
900 assembler.
901
902 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
903
904 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
905 (cgen_parse_operand_fn): Declare.
906 (cgen_init_parse_operand): Declare.
907 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
908 new argument `want'.
909 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
910 (enum cgen_parse_operand_type): New enum.
911
912 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
913
914 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
915
916 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
917
918 * cgen.h: New file.
919
920 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
921
922 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
923 fdivrp.
924
925 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
926
927 * v850.h (extract): Make unsigned.
928
929 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
930
931 * i386.h: Add iclr.
932
933 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
934
935 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
936 take a direction bit.
937
938 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
939
940 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
941
942 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
943
944 * sparc.h: Include <ansidecl.h>. Update function declarations to
945 use prototypes, and to use const when appropriate.
946
947 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
948
949 * mn10300.h (MN10300_OPERAND_RELAX): Define.
950
951 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
952
953 * d10v.h: Change pre_defined_registers to
954 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
955
956 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
957
958 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
959 Change mips_opcodes from const array to a pointer,
960 and change bfd_mips_num_opcodes from const int to int,
961 so that we can increase the size of the mips opcodes table
962 dynamically.
963
964 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
965
966 * d30v.h (FLAG_X): Remove unused flag.
967
968 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
969
970 * d30v.h: New file.
971
972 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
973
974 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
975 (PDS_VALUE): Macro to access value field of predefined symbols.
976 (tic80_next_predefined_symbol): Add prototype.
977
978 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
979
980 * tic80.h (tic80_symbol_to_value): Change prototype to match
981 change in function, added class parameter.
982
983 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
984
985 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
986 endmask fields, which are somewhat weird in that 0 and 32 are
987 treated exactly the same.
988
989 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
990
991 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
992 rather than a constant that is 2**X. Reorder them to put bits for
993 operands that have symbolic names in the upper bits, so they can
994 be packed into an int where the lower bits contain the value that
995 corresponds to that symbolic name.
996 (predefined_symbo): Add struct.
997 (tic80_predefined_symbols): Declare array of translations.
998 (tic80_num_predefined_symbols): Declare size of that array.
999 (tic80_value_to_symbol): Declare function.
1000 (tic80_symbol_to_value): Declare function.
1001
1002 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1003
1004 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1005
1006 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1007
1008 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1009 be the destination register.
1010
1011 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1012
1013 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1014 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1015 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1016 that the opcode can have two vector instructions in a single
1017 32 bit word and we have to encode/decode both.
1018
1019 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1020
1021 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1022 TIC80_OPERAND_RELATIVE for PC relative.
1023 (TIC80_OPERAND_BASEREL): New flag bit for register
1024 base relative.
1025
1026 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1027
1028 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1029
1030 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1031
1032 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1033 ":s" modifier for scaling.
1034
1035 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1036
1037 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1038 (TIC80_OPERAND_M_LI): Ditto
1039
1040 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1041
1042 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1043 (TIC80_OPERAND_CC): New define for condition code operand.
1044 (TIC80_OPERAND_CR): New define for control register operand.
1045
1046 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1047
1048 * tic80.h (struct tic80_opcode): Name changed.
1049 (struct tic80_opcode): Remove format field.
1050 (struct tic80_operand): Add insertion and extraction functions.
1051 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1052 correct ones.
1053 (FMT_*): Ditto.
1054
1055 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1056
1057 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1058 type IV instruction offsets.
1059
1060 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1061
1062 * tic80.h: New file.
1063
1064 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1065
1066 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1067
1068 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1069
1070 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1071 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1072 * v850.h: Fix comment, v850_operand not powerpc_operand.
1073
1074 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1075
1076 * mn10200.h: Flesh out structures and definitions needed by
1077 the mn10200 assembler & disassembler.
1078
1079 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1080
1081 * mips.h: Add mips16 definitions.
1082
1083 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1084
1085 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1086
1087 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1088
1089 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1090 (MN10300_OPERAND_MEMADDR): Define.
1091
1092 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1093
1094 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1095
1096 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1097
1098 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1099
1100 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1101
1102 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1103
1104 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1105
1106 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1107
1108 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1109
1110 * alpha.h: Don't include "bfd.h"; private relocation types are now
1111 negative to minimize problems with shared libraries. Organize
1112 instruction subsets by AMASK extensions and PALcode
1113 implementation.
1114 (struct alpha_operand): Move flags slot for better packing.
1115
1116 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1117
1118 * v850.h (V850_OPERAND_RELAX): New operand flag.
1119
1120 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1121
1122 * mn10300.h (FMT_*): Move operand format definitions
1123 here.
1124
1125 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1126
1127 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1128
1129 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1130
1131 * mn10300.h (mn10300_opcode): Add "format" field.
1132 (MN10300_OPERAND_*): Define.
1133
1134 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1135
1136 * mn10x00.h: Delete.
1137 * mn10200.h, mn10300.h: New files.
1138
1139 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1140
1141 * mn10x00.h: New file.
1142
1143 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1144
1145 * v850.h: Add new flag to indicate this instruction uses a PC
1146 displacement.
1147
1148 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1149
1150 * h8300.h (stmac): Add missing instruction.
1151
1152 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1153
1154 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1155 field.
1156
1157 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1158
1159 * v850.h (V850_OPERAND_EP): Define.
1160
1161 * v850.h (v850_opcode): Add size field.
1162
1163 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1164
1165 * v850.h (v850_operands): Add insert and extract fields, pointers
1166 to functions used to handle unusual operand encoding.
1167 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1168 V850_OPERAND_SIGNED): Defined.
1169
1170 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1171
1172 * v850.h (v850_operands): Add flags field.
1173 (OPERAND_REG, OPERAND_NUM): Defined.
1174
1175 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1176
1177 * v850.h: New file.
1178
1179 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1180
1181 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1182 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1183 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1184 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1185 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1186 Defined.
1187
1188 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1189
1190 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1191 a 3 bit space id instead of a 2 bit space id.
1192
1193 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1194
1195 * d10v.h: Add some additional defines to support the
1196 assembler in determining which operations can be done in parallel.
1197
1198 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1199
1200 * h8300.h (SN): Define.
1201 (eepmov.b): Renamed from "eepmov"
1202 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1203 with them.
1204
1205 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1206
1207 * d10v.h (OPERAND_SHIFT): New operand flag.
1208
1209 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1210
1211 * d10v.h: Changes for divs, parallel-only instructions, and
1212 signed numbers.
1213
1214 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1215
1216 * d10v.h (pd_reg): Define. Putting the definition here allows
1217 the assembler and disassembler to share the same struct.
1218
1219 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1220
1221 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1222 Williams <steve@icarus.com>.
1223
1224 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1225
1226 * d10v.h: New file.
1227
1228 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1229
1230 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1231
1232 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1233
1234 * m68k.h (mcf5200): New macro.
1235 Document names of coldfire control registers.
1236
1237 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1238
1239 * h8300.h (SRC_IN_DST): Define.
1240
1241 * h8300.h (UNOP3): Mark the register operand in this insn
1242 as a source operand, not a destination operand.
1243 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1244 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1245 register operand with SRC_IN_DST.
1246
1247 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1248
1249 * alpha.h: New file.
1250
1251 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1252
1253 * rs6k.h: Remove obsolete file.
1254
1255 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1256
1257 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1258 fdivp, and fdivrp. Add ffreep.
1259
1260 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1261
1262 * h8300.h: Reorder various #defines for readability.
1263 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1264 (BITOP): Accept additional (unused) argument. All callers changed.
1265 (EBITOP): Likewise.
1266 (O_LAST): Bump.
1267 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1268
1269 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1270 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1271 (BITOP, EBITOP): Handle new H8/S addressing modes for
1272 bit insns.
1273 (UNOP3): Handle new shift/rotate insns on the H8/S.
1274 (insns using exr): New instructions.
1275 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1276
1277 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1278
1279 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1280 was incorrect.
1281
1282 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1283
1284 * h8300.h (START): Remove.
1285 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1286 and mov.l insns that can be relaxed.
1287
1288 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1289
1290 * i386.h: Remove Abs32 from lcall.
1291
1292 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1293
1294 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1295 (SLCPOP): New macro.
1296 Mark X,Y opcode letters as in use.
1297
1298 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1299
1300 * sparc.h (F_FLOAT, F_FBR): Define.
1301
1302 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1303
1304 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1305 from all insns.
1306 (ABS8SRC,ABS8DST): Add ABS8MEM.
1307 (add.l): Fix reg+reg variant.
1308 (eepmov.w): Renamed from eepmovw.
1309 (ldc,stc): Fix many cases.
1310
1311 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1312
1313 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1314
1315 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1316
1317 * sparc.h (O): Mark operand letter as in use.
1318
1319 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1320
1321 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1322 Mark operand letters uU as in use.
1323
1324 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1325
1326 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1327 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1328 (SPARC_OPCODE_SUPPORTED): New macro.
1329 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1330 (F_NOTV9): Delete.
1331
1332 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1333
1334 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1335 declaration consistent with return type in definition.
1336
1337 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1338
1339 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1340
1341 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1342
1343 * i386.h (i386_regtab): Add 80486 test registers.
1344
1345 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1346
1347 * i960.h (I_HX): Define.
1348 (i960_opcodes): Add HX instruction.
1349
1350 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1351
1352 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1353 and fclex.
1354
1355 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1356
1357 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1358 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1359 (bfd_* defines): Delete.
1360 (sparc_opcode_archs): Replaces architecture_pname.
1361 (sparc_opcode_lookup_arch): Declare.
1362 (NUMOPCODES): Delete.
1363
1364 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1365
1366 * sparc.h (enum sparc_architecture): Add v9a.
1367 (ARCHITECTURES_CONFLICT_P): Update.
1368
1369 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1370
1371 * i386.h: Added Pentium Pro instructions.
1372
1373 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1374
1375 * m68k.h: Document new 'W' operand place.
1376
1377 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1378
1379 * hppa.h: Add lci and syncdma instructions.
1380
1381 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1382
1383 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1384 instructions.
1385
1386 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1387
1388 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1389 assembler's -mcom and -many switches.
1390
1391 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1392
1393 * i386.h: Fix cmpxchg8b extension opcode description.
1394
1395 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1396
1397 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1398 and register cr4.
1399
1400 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1401
1402 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1403
1404 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1405
1406 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1407
1408 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1409
1410 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1411
1412 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1413
1414 * m68kmri.h: Remove.
1415
1416 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1417 declarations. Remove F_ALIAS and flag field of struct
1418 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1419 int. Make name and args fields of struct m68k_opcode const.
1420
1421 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1422
1423 * sparc.h (F_NOTV9): Define.
1424
1425 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1426
1427 * mips.h (INSN_4010): Define.
1428
1429 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1430
1431 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1432
1433 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1434 * m68k.h: Fix argument descriptions of coprocessor
1435 instructions to allow only alterable operands where appropriate.
1436 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1437 (m68k_opcode_aliases): Add more aliases.
1438
1439 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1440
1441 * m68k.h: Added explcitly short-sized conditional branches, and a
1442 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1443 svr4-based configurations.
1444
1445 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1446
1447 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1448 * i386.h: added missing Data16/Data32 flags to a few instructions.
1449
1450 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1451
1452 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1453 (OP_MASK_BCC, OP_SH_BCC): Define.
1454 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1455 (OP_MASK_CCC, OP_SH_CCC): Define.
1456 (INSN_READ_FPR_R): Define.
1457 (INSN_RFE): Delete.
1458
1459 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1460
1461 * m68k.h (enum m68k_architecture): Deleted.
1462 (struct m68k_opcode_alias): New type.
1463 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1464 matching constraints, values and flags. As a side effect of this,
1465 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1466 as I know were never used, now may need re-examining.
1467 (numopcodes): Now const.
1468 (m68k_opcode_aliases, numaliases): New variables.
1469 (endop): Deleted.
1470 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1471 m68k_opcode_aliases; update declaration of m68k_opcodes.
1472
1473 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1474
1475 * hppa.h (delay_type): Delete unused enumeration.
1476 (pa_opcode): Replace unused delayed field with an architecture
1477 field.
1478 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1479
1480 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1481
1482 * mips.h (INSN_ISA4): Define.
1483
1484 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1485
1486 * mips.h (M_DLA_AB, M_DLI): Define.
1487
1488 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1489
1490 * hppa.h (fstwx): Fix single-bit error.
1491
1492 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1493
1494 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1495
1496 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1497
1498 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1499 debug registers. From Charles Hannum (mycroft@netbsd.org).
1500
1501 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1502
1503 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1504 i386 support:
1505 * i386.h (MOV_AX_DISP32): New macro.
1506 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1507 of several call/return instructions.
1508 (ADDR_PREFIX_OPCODE): New macro.
1509
1510 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1511
1512 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1513
1514 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1515 it pointer to const char;
1516 (struct vot, field `name'): ditto.
1517
1518 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1519
1520 * vax.h: Supply and properly group all values in end sentinel.
1521
1522 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1523
1524 * mips.h (INSN_ISA, INSN_4650): Define.
1525
1526 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1527
1528 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1529 systems with a separate instruction and data cache, such as the
1530 29040, these instructions take an optional argument.
1531
1532 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1533
1534 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1535 INSN_TRAP.
1536
1537 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1538
1539 * mips.h (INSN_STORE_MEMORY): Define.
1540
1541 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1542
1543 * sparc.h: Document new operand type 'x'.
1544
1545 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1546
1547 * i960.h (I_CX2): New instruction category. It includes
1548 instructions available on Cx and Jx processors.
1549 (I_JX): New instruction category, for JX-only instructions.
1550 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1551 Jx-only instructions, in I_JX category.
1552
1553 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1554
1555 * ns32k.h (endop): Made pointer const too.
1556
1557 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1558
1559 * ns32k.h: Drop Q operand type as there is no correct use
1560 for it. Add I and Z operand types which allow better checking.
1561
1562 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1563
1564 * h8300.h (xor.l) :fix bit pattern.
1565 (L_2): New size of operand.
1566 (trapa): Use it.
1567
1568 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1569
1570 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1571
1572 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1573
1574 * sparc.h: Include v9 definitions.
1575
1576 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1577
1578 * m68k.h (m68060): Defined.
1579 (m68040up, mfloat, mmmu): Include it.
1580 (struct m68k_opcode): Widen `arch' field.
1581 (m68k_opcodes): Updated for M68060. Removed comments that were
1582 instructions commented out by "JF" years ago.
1583
1584 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1585
1586 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1587 add a one-bit `flags' field.
1588 (F_ALIAS): New macro.
1589
1590 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1591
1592 * h8300.h (dec, inc): Get encoding right.
1593
1594 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1595
1596 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1597 a flag instead.
1598 (PPC_OPERAND_SIGNED): Define.
1599 (PPC_OPERAND_SIGNOPT): Define.
1600
1601 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1602
1603 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1604 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1605
1606 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1607
1608 * i386.h: Reverse last change. It'll be handled in gas instead.
1609
1610 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1611
1612 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1613 slower on the 486 and used the implicit shift count despite the
1614 explicit operand. The one-operand form is still available to get
1615 the shorter form with the implicit shift count.
1616
1617 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1618
1619 * hppa.h: Fix typo in fstws arg string.
1620
1621 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1622
1623 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1624
1625 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1626
1627 * ppc.h (PPC_OPCODE_601): Define.
1628
1629 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1630
1631 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1632 (so we can determine valid completers for both addb and addb[tf].)
1633
1634 * hppa.h (xmpyu): No floating point format specifier for the
1635 xmpyu instruction.
1636
1637 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1638
1639 * ppc.h (PPC_OPERAND_NEXT): Define.
1640 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1641 (struct powerpc_macro): Define.
1642 (powerpc_macros, powerpc_num_macros): Declare.
1643
1644 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1645
1646 * ppc.h: New file. Header file for PowerPC opcode table.
1647
1648 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1649
1650 * hppa.h: More minor template fixes for sfu and copr (to allow
1651 for easier disassembly).
1652
1653 * hppa.h: Fix templates for all the sfu and copr instructions.
1654
1655 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1656
1657 * i386.h (push): Permit Imm16 operand too.
1658
1659 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1660
1661 * h8300.h (andc): Exists in base arch.
1662
1663 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1664
1665 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1666 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1667
1668 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1669
1670 * hppa.h: Add FP quadword store instructions.
1671
1672 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1673
1674 * mips.h: (M_J_A): Added.
1675 (M_LA): Removed.
1676
1677 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1678
1679 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1680 <mellon@pepper.ncd.com>.
1681
1682 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1683
1684 * hppa.h: Immediate field in probei instructions is unsigned,
1685 not low-sign extended.
1686
1687 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1688
1689 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1690
1691 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1692
1693 * i386.h: Add "fxch" without operand.
1694
1695 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1696
1697 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1698
1699 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1700
1701 * hppa.h: Add gfw and gfr to the opcode table.
1702
1703 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1704
1705 * m88k.h: extended to handle m88110.
1706
1707 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1708
1709 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1710 addresses.
1711
1712 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1713
1714 * i960.h (i960_opcodes): Properly bracket initializers.
1715
1716 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1717
1718 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1719
1720 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1721
1722 * m68k.h (two): Protect second argument with parentheses.
1723
1724 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1725
1726 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1727 Deleted old in/out instructions in "#if 0" section.
1728
1729 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1730
1731 * i386.h (i386_optab): Properly bracket initializers.
1732
1733 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1734
1735 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1736 Jeff Law, law@cs.utah.edu).
1737
1738 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1739
1740 * i386.h (lcall): Accept Imm32 operand also.
1741
1742 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1743
1744 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1745 (M_DABS): Added.
1746
1747 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1748
1749 * mips.h (INSN_*): Changed values. Removed unused definitions.
1750 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1751 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1752 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1753 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1754 (M_*): Added new values for r6000 and r4000 macros.
1755 (ANY_DELAY): Removed.
1756
1757 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1758
1759 * mips.h: Added M_LI_S and M_LI_SS.
1760
1761 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1762
1763 * h8300.h: Get some rare mov.bs correct.
1764
1765 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1766
1767 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1768 been included.
1769
1770 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1771
1772 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1773 jump instructions, for use in disassemblers.
1774
1775 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1776
1777 * m88k.h: Make bitfields just unsigned, not unsigned long or
1778 unsigned short.
1779
1780 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1781
1782 * hppa.h: New argument type 'y'. Use in various float instructions.
1783
1784 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1785
1786 * hppa.h (break): First immediate field is unsigned.
1787
1788 * hppa.h: Add rfir instruction.
1789
1790 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1791
1792 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1793
1794 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1795
1796 * mips.h: Reworked the hazard information somewhat, and fixed some
1797 bugs in the instruction hazard descriptions.
1798
1799 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1800
1801 * m88k.h: Corrected a couple of opcodes.
1802
1803 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1804
1805 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1806 new version includes instruction hazard information, but is
1807 otherwise reasonably similar.
1808
1809 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1810
1811 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1812
1813 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1814
1815 Patches from Jeff Law, law@cs.utah.edu:
1816 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1817 Make the tables be the same for the following instructions:
1818 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1819 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1820 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1821 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1822 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1823 "fcmp", and "ftest".
1824
1825 * hppa.h: Make new and old tables the same for "break", "mtctl",
1826 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1827 Fix typo in last patch. Collapse several #ifdefs into a
1828 single #ifdef.
1829
1830 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1831 of the comments up-to-date.
1832
1833 * hppa.h: Update "free list" of letters and update
1834 comments describing each letter's function.
1835
1836 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1837
1838 * h8300.h: checkpoint, includes H8/300-H opcodes.
1839
1840 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1841
1842 * Patches from Jeffrey Law <law@cs.utah.edu>.
1843 * hppa.h: Rework single precision FP
1844 instructions so that they correctly disassemble code
1845 PA1.1 code.
1846
1847 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1848
1849 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1850 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1851
1852 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1853
1854 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1855 gdb will define it for now.
1856
1857 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1858
1859 * sparc.h: Don't end enumerator list with comma.
1860
1861 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1862
1863 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1864 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1865 ("bc2t"): Correct typo.
1866 ("[ls]wc[023]"): Use T rather than t.
1867 ("c[0123]"): Define general coprocessor instructions.
1868
1869 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1870
1871 * m68k.h: Move split point for gcc compilation more towards
1872 middle.
1873
1874 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1875
1876 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1877 simply wrong, ics, rfi, & rfsvc were missing).
1878 Add "a" to opr_ext for "bb". Doc fix.
1879
1880 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1881
1882 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1883 * mips.h: Add casts, to suppress warnings about shifting too much.
1884 * m68k.h: Document the placement code '9'.
1885
1886 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1887
1888 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1889 allows callers to break up the large initialized struct full of
1890 opcodes into two half-sized ones. This permits GCC to compile
1891 this module, since it takes exponential space for initializers.
1892 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1893
1894 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1895
1896 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1897 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1898 initialized structs in it.
1899
1900 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1901
1902 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1903 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1904 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1905
1906 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1907
1908 * mips.h: document "i" and "j" operands correctly.
1909
1910 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1911
1912 * mips.h: Removed endianness dependency.
1913
1914 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1915
1916 * h8300.h: include info on number of cycles per instruction.
1917
1918 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1919
1920 * hppa.h: Move handy aliases to the front. Fix masks for extract
1921 and deposit instructions.
1922
1923 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1924
1925 * i386.h: accept shld and shrd both with and without the shift
1926 count argument, which is always %cl.
1927
1928 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1929
1930 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1931 (one_byte_segment_defaults, two_byte_segment_defaults,
1932 i386_prefixtab_end): Ditto.
1933
1934 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1935
1936 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1937 for operand 2; from John Carr, jfc@dsg.dec.com.
1938
1939 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1940
1941 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1942 always use 16-bit offsets. Makes calculated-size jump tables
1943 feasible.
1944
1945 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1946
1947 * i386.h: Fix one-operand forms of in* and out* patterns.
1948
1949 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1950
1951 * m68k.h: Added CPU32 support.
1952
1953 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1954
1955 * mips.h (break): Disassemble the argument. Patch from
1956 jonathan@cs.stanford.edu (Jonathan Stone).
1957
1958 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1959
1960 * m68k.h: merged Motorola and MIT syntax.
1961
1962 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1963
1964 * m68k.h (pmove): make the tests less strict, the 68k book is
1965 wrong.
1966
1967 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1968
1969 * m68k.h (m68ec030): Defined as alias for 68030.
1970 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1971 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1972 them. Tightened description of "fmovex" to distinguish it from
1973 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1974 up descriptions that claimed versions were available for chips not
1975 supporting them. Added "pmovefd".
1976
1977 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1978
1979 * m68k.h: fix where the . goes in divull
1980
1981 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1982
1983 * m68k.h: the cas2 instruction is supposed to be written with
1984 indirection on the last two operands, which can be either data or
1985 address registers. Added a new operand type 'r' which accepts
1986 either register type. Added new cases for cas2l and cas2w which
1987 use them. Corrected masks for cas2 which failed to recognize use
1988 of address register.
1989
1990 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1991
1992 * m68k.h: Merged in patches (mostly m68040-specific) from
1993 Colin Smith <colin@wrs.com>.
1994
1995 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1996 base). Also cleaned up duplicates, re-ordered instructions for
1997 the sake of dis-assembling (so aliases come after standard names).
1998 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1999
2000 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2001
2002 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2003 all missing .s
2004
2005 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2006
2007 * sparc.h: Moved tables to BFD library.
2008
2009 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2010
2011 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2012
2013 * h8300.h: Finish filling in all the holes in the opcode table,
2014 so that the Lucid C compiler can digest this as well...
2015
2016 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2017
2018 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2019 Fix opcodes on various sizes of fild/fist instructions
2020 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2021 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2022
2023 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2024
2025 * h8300.h: Fill in all the holes in the opcode table so that the
2026 losing HPUX C compiler can digest this...
2027
2028 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2029
2030 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2031 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2032
2033 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2034
2035 * sparc.h: Add new architecture variant sparclite; add its scan
2036 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2037
2038 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2039
2040 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2041 fy@lucid.com).
2042
2043 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2044
2045 * rs6k.h: New version from IBM (Metin).
2046
2047 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2048
2049 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2050 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2051
2052 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2053
2054 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2055
2056 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2057
2058 * m68k.h (one, two): Cast macro args to unsigned to suppress
2059 complaints from compiler and lint about integer overflow during
2060 shift.
2061
2062 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2063
2064 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2065
2066 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2067
2068 * mips.h: Make bitfield layout depend on the HOST compiler,
2069 not on the TARGET system.
2070
2071 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2072
2073 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2074 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2075 <TRANLE@INTELLICORP.COM>.
2076
2077 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2078
2079 * h8300.h: turned op_type enum into #define list
2080
2081 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2082
2083 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2084 similar instructions -- they've been renamed to "fitoq", etc.
2085 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2086 number of arguments.
2087 * h8300.h: Remove extra ; which produces compiler warning.
2088
2089 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2090
2091 * sparc.h: fix opcode for tsubcctv.
2092
2093 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2094
2095 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2096
2097 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2098
2099 * sparc.h (nop): Made the 'lose' field be even tighter,
2100 so only a standard 'nop' is disassembled as a nop.
2101
2102 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2103
2104 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2105 disassembled as a nop.
2106
2107 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2108
2109 * sparc.h: fix a typo.
2110
2111 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2112
2113 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2114 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2115 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2116
2117 \f
2118 Local Variables:
2119 version-control: never
2120 End:
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