* hppa.h: Document 64 bit condition completers.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
2
3 * hppa.h: Document 64 bit condition completers.
4
5 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
6
7 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
8
9 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
10
11 * i386.h (i386_optab): Add DefaultSize modifier to all insns
12 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
13 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
14
15 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
16 Jeff Law <law@cygnus.com>
17
18 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
19
20 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
21
22 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
23 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
24
25 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
26
27 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
28
29 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
30
31 * hppa.h (struct pa_opcode): Add new field "flags".
32 (FLAGS_STRICT): Define.
33
34 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
35 Jeff Law <law@cygnus.com>
36
37 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
38
39 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
40
41 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
42
43 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
44 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
45 flag to fcomi and friends.
46
47 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
48
49 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
50 integer logical instructions.
51
52 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
53
54 * m68k.h: Document new formats `E', `G', `H' and new places `N',
55 `n', `o'.
56
57 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
58 and new places `m', `M', `h'.
59
60 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
61
62 * hppa.h (pa_opcodes): Add several processor specific system
63 instructions.
64
65 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
66
67 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
68 "addb", and "addib" to be used by the disassembler.
69
70 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
71
72 * i386.h (ReverseModrm): Remove all occurences.
73 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
74 movmskps, pextrw, pmovmskb, maskmovq.
75 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
76 ignore the data size prefix.
77
78 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
79 Mostly stolen from Doug Ledford <dledford@redhat.com>
80
81 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
82
83 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
84
85 1999-04-14 Doug Evans <devans@casey.cygnus.com>
86
87 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
88 (CGEN_ATTR_TYPE): Update.
89 (CGEN_ATTR_MASK): Number booleans starting at 0.
90 (CGEN_ATTR_VALUE): Update.
91 (CGEN_INSN_ATTR): Update.
92
93 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
94
95 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
96 instructions.
97
98 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
99
100 * hppa.h (bb, bvb): Tweak opcode/mask.
101
102
103 1999-03-22 Doug Evans <devans@casey.cygnus.com>
104
105 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
106 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
107 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
108 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
109 Delete member max_insn_size.
110 (enum cgen_cpu_open_arg): New enum.
111 (cpu_open): Update prototype.
112 (cpu_open_1): Declare.
113 (cgen_set_cpu): Delete.
114
115 1999-03-11 Doug Evans <devans@casey.cygnus.com>
116
117 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
118 (CGEN_OPERAND_NIL): New macro.
119 (CGEN_OPERAND): New member `type'.
120 (@arch@_cgen_operand_table): Delete decl.
121 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
122 (CGEN_OPERAND_TABLE): New struct.
123 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
124 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
125 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
126 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
127 {get,set}_{int,vma}_operand.
128 (@arch@_cgen_cpu_open): New arg `isa'.
129 (cgen_set_cpu): Ditto.
130
131 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
132
133 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
134
135 1999-02-25 Doug Evans <devans@casey.cygnus.com>
136
137 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
138 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
139 enum cgen_hw_type.
140 (CGEN_HW_TABLE): New struct.
141 (hw_table): Delete declaration.
142 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
143 to table entry to enum.
144 (CGEN_OPINST): Ditto.
145 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
146
147 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
148
149 * alpha.h (AXP_OPCODE_EV6): New.
150 (AXP_OPCODE_NOPAL): Include it.
151
152 1999-02-09 Doug Evans <devans@casey.cygnus.com>
153
154 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
155 All uses updated. New members int_insn_p, max_insn_size,
156 parse_operand,insert_operand,extract_operand,print_operand,
157 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
158 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
159 extract_handlers,print_handlers.
160 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
161 (CGEN_ATTR_BOOL_OFFSET): New macro.
162 (CGEN_ATTR_MASK): Subtract it to compute bit number.
163 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
164 (cgen_opcode_handler): Renamed from cgen_base.
165 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
166 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
167 all uses updated.
168 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
169 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
170 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
171 (CGEN_OPCODE,CGEN_IBASE): New types.
172 (CGEN_INSN): Rewrite.
173 (CGEN_{ASM,DIS}_HASH*): Delete.
174 (init_opcode_table,init_ibld_table): Declare.
175 (CGEN_INSN_ATTR): New type.
176
177 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
178
179 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
180 (x_FP, d_FP, dls_FP, sldx_FP): Define.
181 Change *Suf definitions to include x and d suffixes.
182 (movsx): Use w_Suf and b_Suf.
183 (movzx): Likewise.
184 (movs): Use bwld_Suf.
185 (fld): Change ordering. Use sld_FP.
186 (fild): Add Intel Syntax equivalent of fildq.
187 (fst): Use sld_FP.
188 (fist): Use sld_FP.
189 (fstp): Use sld_FP. Add x_FP version.
190 (fistp): LLongMem version for Intel Syntax.
191 (fcom, fcomp): Use sld_FP.
192 (fadd, fiadd, fsub): Use sld_FP.
193 (fsubr): Use sld_FP.
194 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
195
196 1999-01-27 Doug Evans <devans@casey.cygnus.com>
197
198 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
199 CGEN_MODE_UINT.
200
201 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
202
203 * hppa.h (bv): Fix mask.
204
205 1999-01-05 Doug Evans <devans@casey.cygnus.com>
206
207 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
208 (CGEN_ATTR): Use it.
209 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
210 (CGEN_ATTR_TABLE): New member dfault.
211
212 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
213
214 * mips.h (MIPS16_INSN_BRANCH): New.
215
216 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
217
218 The following is part of a change made by Edith Epstein
219 <eepstein@sophia.cygnus.com> as part of a project to merge in
220 changes by HP; HP did not create ChangeLog entries.
221
222 * hppa.h (completer_chars): list of chars to not put a space
223 after.
224
225 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
226
227 * i386.h (i386_optab): Permit w suffix on processor control and
228 status word instructions.
229
230 1998-11-30 Doug Evans <devans@casey.cygnus.com>
231
232 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
233 (struct cgen_keyword_entry): Ditto.
234 (struct cgen_operand): Ditto.
235 (CGEN_IFLD): New typedef, with associated access macros.
236 (CGEN_IFMT): New typedef, with associated access macros.
237 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
238 (CGEN_IVALUE): New typedef.
239 (struct cgen_insn): Delete const on syntax,attrs members.
240 `format' now points to format data. Type of `value' is now
241 CGEN_IVALUE.
242 (struct cgen_opcode_table): New member ifld_table.
243
244 1998-11-18 Doug Evans <devans@casey.cygnus.com>
245
246 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
247 (CGEN_OPERAND_INSTANCE): New member `attrs'.
248 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
249 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
250 (cgen_opcode_table): Update type of dis_hash fn.
251 (extract_operand): Update type of `insn_value' arg.
252
253 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
254
255 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
256
257 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
258
259 * mips.h (INSN_MULT): Added.
260
261 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
262
263 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
264
265 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
266
267 * cgen.h (CGEN_INSN_INT): New typedef.
268 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
269 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
270 (CGEN_INSN_BYTES_PTR): New typedef.
271 (CGEN_EXTRACT_INFO): New typedef.
272 (cgen_insert_fn,cgen_extract_fn): Update.
273 (cgen_opcode_table): New member `insn_endian'.
274 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
275 (insert_operand,extract_operand): Update.
276 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
277
278 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
279
280 * cgen.h (CGEN_ATTR_BOOLS): New macro.
281 (struct CGEN_HW_ENTRY): New member `attrs'.
282 (CGEN_HW_ATTR): New macro.
283 (struct CGEN_OPERAND_INSTANCE): New member `name'.
284 (CGEN_INSN_INVALID_P): New macro.
285
286 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
287
288 * hppa.h: Add "fid".
289
290 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
291
292 From Robert Andrew Dale <rob@nb.net>
293 * i386.h (i386_optab): Add AMD 3DNow! instructions.
294 (AMD_3DNOW_OPCODE): Define.
295
296 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
297
298 * d30v.h (EITHER_BUT_PREFER_MU): Define.
299
300 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
301
302 * cgen.h (cgen_insn): #if 0 out element `cdx'.
303
304 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
305
306 Move all global state data into opcode table struct, and treat
307 opcode table as something that is "opened/closed".
308 * cgen.h (CGEN_OPCODE_DESC): New type.
309 (all fns): New first arg of opcode table descriptor.
310 (cgen_set_parse_operand_fn): Add prototype.
311 (cgen_current_machine,cgen_current_endian): Delete.
312 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
313 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
314 dis_hash_table,dis_hash_table_entries.
315 (opcode_open,opcode_close): Add prototypes.
316
317 * cgen.h (cgen_insn): New element `cdx'.
318
319 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
320
321 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
322
323 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
324
325 * mn10300.h: Add "no_match_operands" field for instructions.
326 (MN10300_MAX_OPERANDS): Define.
327
328 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
329
330 * cgen.h (cgen_macro_insn_count): Declare.
331
332 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
333
334 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
335 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
336 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
337 set_{int,vma}_operand.
338
339 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
340
341 * mn10300.h: Add "machine" field for instructions.
342 (MN103, AM30): Define machine types.
343
344 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
345
346 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
347
348 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
349
350 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
351
352 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
353
354 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
355 and ud2b.
356 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
357 those that happen to be implemented on pentiums.
358
359 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
360
361 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
362 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
363 with Size16|IgnoreSize or Size32|IgnoreSize.
364
365 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
366
367 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
368 (REPE): Rename to REPE_PREFIX_OPCODE.
369 (i386_regtab_end): Remove.
370 (i386_prefixtab, i386_prefixtab_end): Remove.
371 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
372 of md_begin.
373 (MAX_OPCODE_SIZE): Define.
374 (i386_optab_end): Remove.
375 (sl_Suf): Define.
376 (sl_FP): Use sl_Suf.
377
378 * i386.h (i386_optab): Allow 16 bit displacement for `mov
379 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
380 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
381 data32, dword, and adword prefixes.
382 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
383 regs.
384
385 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
386
387 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
388
389 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
390 register operands, because this is a common idiom. Flag them with
391 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
392 fdivrp because gcc erroneously generates them. Also flag with a
393 warning.
394
395 * i386.h: Add suffix modifiers to most insns, and tighter operand
396 checks in some cases. Fix a number of UnixWare compatibility
397 issues with float insns. Merge some floating point opcodes, using
398 new FloatMF modifier.
399 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
400 consistency.
401
402 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
403 IgnoreDataSize where appropriate.
404
405 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
406
407 * i386.h: (one_byte_segment_defaults): Remove.
408 (two_byte_segment_defaults): Remove.
409 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
410
411 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
412
413 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
414 (cgen_hw_lookup_by_num): Declare.
415
416 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
417
418 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
419 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
420
421 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
422
423 * cgen.h (cgen_asm_init_parse): Delete.
424 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
425 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
426
427 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
428
429 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
430 (cgen_asm_finish_insn): Update prototype.
431 (cgen_insn): New members num, data.
432 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
433 dis_hash, dis_hash_table_size moved to ...
434 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
435 All uses updated. New members asm_hash_p, dis_hash_p.
436 (CGEN_MINSN_EXPANSION): New struct.
437 (cgen_expand_macro_insn): Declare.
438 (cgen_macro_insn_count): Declare.
439 (get_insn_operands): Update prototype.
440 (lookup_get_insn_operands): Declare.
441
442 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
443
444 * i386.h (i386_optab): Change iclrKludge and imulKludge to
445 regKludge. Add operands types for string instructions.
446
447 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
448
449 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
450 table.
451
452 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
453
454 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
455 for `gettext'.
456
457 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
458
459 * i386.h: Remove NoModrm flag from all insns: it's never checked.
460 Add IsString flag to string instructions.
461 (IS_STRING): Don't define.
462 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
463 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
464 (SS_PREFIX_OPCODE): Define.
465
466 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
467
468 * i386.h: Revert March 24 patch; no more LinearAddress.
469
470 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
471
472 * i386.h (i386_optab): Remove fwait (9b) from all floating point
473 instructions, and instead add FWait opcode modifier. Add short
474 form of fldenv and fstenv.
475 (FWAIT_OPCODE): Define.
476
477 * i386.h (i386_optab): Change second operand constraint of `mov
478 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
479 allow legal instructions such as `movl %gs,%esi'
480
481 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
482
483 * h8300.h: Various changes to fully bracket initializers.
484
485 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
486
487 * i386.h: Set LinearAddress for lidt and lgdt.
488
489 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
490
491 * cgen.h (CGEN_BOOL_ATTR): New macro.
492
493 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
494
495 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
496
497 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
498
499 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
500 (cgen_insn): Record syntax and format entries here, rather than
501 separately.
502
503 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
504
505 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
506
507 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
508
509 * cgen.h (cgen_insert_fn): Change type of result to const char *.
510 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
511 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
512
513 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
514
515 * cgen.h (lookup_insn): New argument alias_p.
516
517 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
518
519 Fix rac to accept only a0:
520 * d10v.h (OPERAND_ACC): Split into:
521 (OPERAND_ACC0, OPERAND_ACC1) .
522 (OPERAND_GPR): Define.
523
524 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
525
526 * cgen.h (CGEN_FIELDS): Define here.
527 (CGEN_HW_ENTRY): New member `type'.
528 (hw_list): Delete decl.
529 (enum cgen_mode): Declare.
530 (CGEN_OPERAND): New member `hw'.
531 (enum cgen_operand_instance_type): Declare.
532 (CGEN_OPERAND_INSTANCE): New type.
533 (CGEN_INSN): New member `operands'.
534 (CGEN_OPCODE_DATA): Make hw_list const.
535 (get_insn_operands,lookup_insn): Add prototypes for.
536
537 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
538
539 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
540 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
541 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
542 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
543
544 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
545
546 * cgen.h: Correct typo in comment end marker.
547
548 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
549
550 * tic30.h: New file.
551
552 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
553
554 * cgen.h: Add prototypes for cgen_save_fixups(),
555 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
556 of cgen_asm_finish_insn() to return a char *.
557
558 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
559
560 * cgen.h: Formatting changes to improve readability.
561
562 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
563
564 * cgen.h (*): Clean up pass over `struct foo' usage.
565 (CGEN_ATTR): Make unsigned char.
566 (CGEN_ATTR_TYPE): Update.
567 (CGEN_ATTR_{ENTRY,TABLE}): New types.
568 (cgen_base): Move member `attrs' to cgen_insn.
569 (CGEN_KEYWORD): New member `null_entry'.
570 (CGEN_{SYNTAX,FORMAT}): New types.
571 (cgen_insn): Format and syntax separated from each other.
572
573 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
574
575 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
576 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
577 flags_{used,set} long.
578 (d30v_operand): Make flags field long.
579
580 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
581
582 * m68k.h: Fix comment describing operand types.
583
584 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
585
586 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
587 everything else after down.
588
589 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
590
591 * d10v.h (OPERAND_FLAG): Split into:
592 (OPERAND_FFLAG, OPERAND_CFLAG) .
593
594 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
595
596 * mips.h (struct mips_opcode): Changed comments to reflect new
597 field usage.
598
599 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
600
601 * mips.h: Added to comments a quick-ref list of all assigned
602 operand type characters.
603 (OP_{MASK,SH}_PERFREG): New macros.
604
605 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
606
607 * sparc.h: Add '_' and '/' for v9a asr's.
608 Patch from David Miller <davem@vger.rutgers.edu>
609
610 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
611
612 * h8300.h: Bit ops with absolute addresses not in the 8 bit
613 area are not available in the base model (H8/300).
614
615 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
616
617 * m68k.h: Remove documentation of ` operand specifier.
618
619 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
620
621 * m68k.h: Document q and v operand specifiers.
622
623 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
624
625 * v850.h (struct v850_opcode): Add processors field.
626 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
627 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
628 (PROCESSOR_V850EA): New bit constants.
629
630 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
631
632 Merge changes from Martin Hunt:
633
634 * d30v.h: Allow up to 64 control registers. Add
635 SHORT_A5S format.
636
637 * d30v.h (LONG_Db): New form for delayed branches.
638
639 * d30v.h: (LONG_Db): New form for repeati.
640
641 * d30v.h (SHORT_D2B): New form.
642
643 * d30v.h (SHORT_A2): New form.
644
645 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
646 registers are used. Needed for VLIW optimization.
647
648 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
649
650 * cgen.h: Move assembler interface section
651 up so cgen_parse_operand_result is defined for cgen_parse_address.
652 (cgen_parse_address): Update prototype.
653
654 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
655
656 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
657
658 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
659
660 * i386.h (two_byte_segment_defaults): Correct base register 5 in
661 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
662 <paubert@iram.es>.
663
664 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
665 <paubert@iram.es>.
666
667 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
668 <paubert@iram.es>.
669
670 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
671 (JUMP_ON_ECX_ZERO): Remove commented out macro.
672
673 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
674
675 * v850.h (V850_NOT_R0): New flag.
676
677 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
678
679 * v850.h (struct v850_opcode): Remove flags field.
680
681 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
682
683 * v850.h (struct v850_opcode): Add flags field.
684 (struct v850_operand): Extend meaning of 'bits' and 'shift'
685 fields.
686 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
687 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
688
689 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
690
691 * arc.h: New file.
692
693 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
694
695 * sparc.h (sparc_opcodes): Declare as const.
696
697 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
698
699 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
700 uses single or double precision floating point resources.
701 (INSN_NO_ISA, INSN_ISA1): Define.
702 (cpu specific INSN macros): Tweak into bitmasks outside the range
703 of INSN_ISA field.
704
705 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
706
707 * i386.h: Fix pand opcode.
708
709 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
710
711 * mips.h: Widen INSN_ISA and move it to a more convenient
712 bit position. Add INSN_3900.
713
714 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
715
716 * mips.h (struct mips_opcode): added new field membership.
717
718 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
719
720 * i386.h (movd): only Reg32 is allowed.
721
722 * i386.h: add fcomp and ud2. From Wayne Scott
723 <wscott@ichips.intel.com>.
724
725 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
726
727 * i386.h: Add MMX instructions.
728
729 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
730
731 * i386.h: Remove W modifier from conditional move instructions.
732
733 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
734
735 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
736 with no arguments to match that generated by the UnixWare
737 assembler.
738
739 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
740
741 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
742 (cgen_parse_operand_fn): Declare.
743 (cgen_init_parse_operand): Declare.
744 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
745 new argument `want'.
746 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
747 (enum cgen_parse_operand_type): New enum.
748
749 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
750
751 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
752
753 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
754
755 * cgen.h: New file.
756
757 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
758
759 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
760 fdivrp.
761
762 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
763
764 * v850.h (extract): Make unsigned.
765
766 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
767
768 * i386.h: Add iclr.
769
770 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
771
772 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
773 take a direction bit.
774
775 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
776
777 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
778
779 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
780
781 * sparc.h: Include <ansidecl.h>. Update function declarations to
782 use prototypes, and to use const when appropriate.
783
784 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
785
786 * mn10300.h (MN10300_OPERAND_RELAX): Define.
787
788 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
789
790 * d10v.h: Change pre_defined_registers to
791 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
792
793 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
794
795 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
796 Change mips_opcodes from const array to a pointer,
797 and change bfd_mips_num_opcodes from const int to int,
798 so that we can increase the size of the mips opcodes table
799 dynamically.
800
801 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
802
803 * d30v.h (FLAG_X): Remove unused flag.
804
805 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
806
807 * d30v.h: New file.
808
809 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
810
811 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
812 (PDS_VALUE): Macro to access value field of predefined symbols.
813 (tic80_next_predefined_symbol): Add prototype.
814
815 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
816
817 * tic80.h (tic80_symbol_to_value): Change prototype to match
818 change in function, added class parameter.
819
820 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
821
822 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
823 endmask fields, which are somewhat weird in that 0 and 32 are
824 treated exactly the same.
825
826 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
827
828 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
829 rather than a constant that is 2**X. Reorder them to put bits for
830 operands that have symbolic names in the upper bits, so they can
831 be packed into an int where the lower bits contain the value that
832 corresponds to that symbolic name.
833 (predefined_symbo): Add struct.
834 (tic80_predefined_symbols): Declare array of translations.
835 (tic80_num_predefined_symbols): Declare size of that array.
836 (tic80_value_to_symbol): Declare function.
837 (tic80_symbol_to_value): Declare function.
838
839 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
840
841 * mn10200.h (MN10200_OPERAND_RELAX): Define.
842
843 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
844
845 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
846 be the destination register.
847
848 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
849
850 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
851 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
852 (TIC80_VECTOR): Define a flag bit for the flags. This one means
853 that the opcode can have two vector instructions in a single
854 32 bit word and we have to encode/decode both.
855
856 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
857
858 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
859 TIC80_OPERAND_RELATIVE for PC relative.
860 (TIC80_OPERAND_BASEREL): New flag bit for register
861 base relative.
862
863 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
864
865 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
866
867 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
868
869 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
870 ":s" modifier for scaling.
871
872 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
873
874 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
875 (TIC80_OPERAND_M_LI): Ditto
876
877 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
878
879 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
880 (TIC80_OPERAND_CC): New define for condition code operand.
881 (TIC80_OPERAND_CR): New define for control register operand.
882
883 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
884
885 * tic80.h (struct tic80_opcode): Name changed.
886 (struct tic80_opcode): Remove format field.
887 (struct tic80_operand): Add insertion and extraction functions.
888 (TIC80_OPERAND_*): Remove old bogus values, start adding new
889 correct ones.
890 (FMT_*): Ditto.
891
892 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
893
894 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
895 type IV instruction offsets.
896
897 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
898
899 * tic80.h: New file.
900
901 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
902
903 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
904
905 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
906
907 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
908 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
909 * v850.h: Fix comment, v850_operand not powerpc_operand.
910
911 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
912
913 * mn10200.h: Flesh out structures and definitions needed by
914 the mn10200 assembler & disassembler.
915
916 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
917
918 * mips.h: Add mips16 definitions.
919
920 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
921
922 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
923
924 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
925
926 * mn10300.h (MN10300_OPERAND_PCREL): Define.
927 (MN10300_OPERAND_MEMADDR): Define.
928
929 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
930
931 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
932
933 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
934
935 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
936
937 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
938
939 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
940
941 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
942
943 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
944
945 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
946
947 * alpha.h: Don't include "bfd.h"; private relocation types are now
948 negative to minimize problems with shared libraries. Organize
949 instruction subsets by AMASK extensions and PALcode
950 implementation.
951 (struct alpha_operand): Move flags slot for better packing.
952
953 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
954
955 * v850.h (V850_OPERAND_RELAX): New operand flag.
956
957 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
958
959 * mn10300.h (FMT_*): Move operand format definitions
960 here.
961
962 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
963
964 * mn10300.h (MN10300_OPERAND_PAREN): Define.
965
966 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
967
968 * mn10300.h (mn10300_opcode): Add "format" field.
969 (MN10300_OPERAND_*): Define.
970
971 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
972
973 * mn10x00.h: Delete.
974 * mn10200.h, mn10300.h: New files.
975
976 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
977
978 * mn10x00.h: New file.
979
980 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
981
982 * v850.h: Add new flag to indicate this instruction uses a PC
983 displacement.
984
985 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
986
987 * h8300.h (stmac): Add missing instruction.
988
989 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
990
991 * v850.h (v850_opcode): Remove "size" field. Add "memop"
992 field.
993
994 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
995
996 * v850.h (V850_OPERAND_EP): Define.
997
998 * v850.h (v850_opcode): Add size field.
999
1000 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1001
1002 * v850.h (v850_operands): Add insert and extract fields, pointers
1003 to functions used to handle unusual operand encoding.
1004 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1005 V850_OPERAND_SIGNED): Defined.
1006
1007 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1008
1009 * v850.h (v850_operands): Add flags field.
1010 (OPERAND_REG, OPERAND_NUM): Defined.
1011
1012 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1013
1014 * v850.h: New file.
1015
1016 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1017
1018 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1019 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1020 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1021 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1022 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1023 Defined.
1024
1025 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1026
1027 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1028 a 3 bit space id instead of a 2 bit space id.
1029
1030 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1031
1032 * d10v.h: Add some additional defines to support the
1033 assembler in determining which operations can be done in parallel.
1034
1035 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1036
1037 * h8300.h (SN): Define.
1038 (eepmov.b): Renamed from "eepmov"
1039 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1040 with them.
1041
1042 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1043
1044 * d10v.h (OPERAND_SHIFT): New operand flag.
1045
1046 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1047
1048 * d10v.h: Changes for divs, parallel-only instructions, and
1049 signed numbers.
1050
1051 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1052
1053 * d10v.h (pd_reg): Define. Putting the definition here allows
1054 the assembler and disassembler to share the same struct.
1055
1056 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1057
1058 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1059 Williams <steve@icarus.com>.
1060
1061 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1062
1063 * d10v.h: New file.
1064
1065 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1066
1067 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1068
1069 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1070
1071 * m68k.h (mcf5200): New macro.
1072 Document names of coldfire control registers.
1073
1074 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1075
1076 * h8300.h (SRC_IN_DST): Define.
1077
1078 * h8300.h (UNOP3): Mark the register operand in this insn
1079 as a source operand, not a destination operand.
1080 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1081 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1082 register operand with SRC_IN_DST.
1083
1084 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1085
1086 * alpha.h: New file.
1087
1088 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1089
1090 * rs6k.h: Remove obsolete file.
1091
1092 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1093
1094 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1095 fdivp, and fdivrp. Add ffreep.
1096
1097 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1098
1099 * h8300.h: Reorder various #defines for readability.
1100 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1101 (BITOP): Accept additional (unused) argument. All callers changed.
1102 (EBITOP): Likewise.
1103 (O_LAST): Bump.
1104 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1105
1106 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1107 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1108 (BITOP, EBITOP): Handle new H8/S addressing modes for
1109 bit insns.
1110 (UNOP3): Handle new shift/rotate insns on the H8/S.
1111 (insns using exr): New instructions.
1112 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1113
1114 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1115
1116 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1117 was incorrect.
1118
1119 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1120
1121 * h8300.h (START): Remove.
1122 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1123 and mov.l insns that can be relaxed.
1124
1125 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1126
1127 * i386.h: Remove Abs32 from lcall.
1128
1129 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1130
1131 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1132 (SLCPOP): New macro.
1133 Mark X,Y opcode letters as in use.
1134
1135 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1136
1137 * sparc.h (F_FLOAT, F_FBR): Define.
1138
1139 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1140
1141 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1142 from all insns.
1143 (ABS8SRC,ABS8DST): Add ABS8MEM.
1144 (add.l): Fix reg+reg variant.
1145 (eepmov.w): Renamed from eepmovw.
1146 (ldc,stc): Fix many cases.
1147
1148 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1149
1150 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1151
1152 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1153
1154 * sparc.h (O): Mark operand letter as in use.
1155
1156 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1157
1158 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1159 Mark operand letters uU as in use.
1160
1161 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1162
1163 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1164 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1165 (SPARC_OPCODE_SUPPORTED): New macro.
1166 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1167 (F_NOTV9): Delete.
1168
1169 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1170
1171 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1172 declaration consistent with return type in definition.
1173
1174 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1175
1176 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1177
1178 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1179
1180 * i386.h (i386_regtab): Add 80486 test registers.
1181
1182 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1183
1184 * i960.h (I_HX): Define.
1185 (i960_opcodes): Add HX instruction.
1186
1187 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1188
1189 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1190 and fclex.
1191
1192 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1193
1194 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1195 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1196 (bfd_* defines): Delete.
1197 (sparc_opcode_archs): Replaces architecture_pname.
1198 (sparc_opcode_lookup_arch): Declare.
1199 (NUMOPCODES): Delete.
1200
1201 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1202
1203 * sparc.h (enum sparc_architecture): Add v9a.
1204 (ARCHITECTURES_CONFLICT_P): Update.
1205
1206 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1207
1208 * i386.h: Added Pentium Pro instructions.
1209
1210 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1211
1212 * m68k.h: Document new 'W' operand place.
1213
1214 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1215
1216 * hppa.h: Add lci and syncdma instructions.
1217
1218 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1219
1220 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1221 instructions.
1222
1223 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1224
1225 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1226 assembler's -mcom and -many switches.
1227
1228 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1229
1230 * i386.h: Fix cmpxchg8b extension opcode description.
1231
1232 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1233
1234 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1235 and register cr4.
1236
1237 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1238
1239 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1240
1241 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1242
1243 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1244
1245 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1246
1247 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1248
1249 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1250
1251 * m68kmri.h: Remove.
1252
1253 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1254 declarations. Remove F_ALIAS and flag field of struct
1255 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1256 int. Make name and args fields of struct m68k_opcode const.
1257
1258 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1259
1260 * sparc.h (F_NOTV9): Define.
1261
1262 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1263
1264 * mips.h (INSN_4010): Define.
1265
1266 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1267
1268 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1269
1270 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1271 * m68k.h: Fix argument descriptions of coprocessor
1272 instructions to allow only alterable operands where appropriate.
1273 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1274 (m68k_opcode_aliases): Add more aliases.
1275
1276 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1277
1278 * m68k.h: Added explcitly short-sized conditional branches, and a
1279 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1280 svr4-based configurations.
1281
1282 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1283
1284 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1285 * i386.h: added missing Data16/Data32 flags to a few instructions.
1286
1287 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1288
1289 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1290 (OP_MASK_BCC, OP_SH_BCC): Define.
1291 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1292 (OP_MASK_CCC, OP_SH_CCC): Define.
1293 (INSN_READ_FPR_R): Define.
1294 (INSN_RFE): Delete.
1295
1296 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1297
1298 * m68k.h (enum m68k_architecture): Deleted.
1299 (struct m68k_opcode_alias): New type.
1300 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1301 matching constraints, values and flags. As a side effect of this,
1302 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1303 as I know were never used, now may need re-examining.
1304 (numopcodes): Now const.
1305 (m68k_opcode_aliases, numaliases): New variables.
1306 (endop): Deleted.
1307 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1308 m68k_opcode_aliases; update declaration of m68k_opcodes.
1309
1310 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1311
1312 * hppa.h (delay_type): Delete unused enumeration.
1313 (pa_opcode): Replace unused delayed field with an architecture
1314 field.
1315 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1316
1317 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1318
1319 * mips.h (INSN_ISA4): Define.
1320
1321 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1322
1323 * mips.h (M_DLA_AB, M_DLI): Define.
1324
1325 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1326
1327 * hppa.h (fstwx): Fix single-bit error.
1328
1329 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1330
1331 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1332
1333 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1334
1335 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1336 debug registers. From Charles Hannum (mycroft@netbsd.org).
1337
1338 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1339
1340 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1341 i386 support:
1342 * i386.h (MOV_AX_DISP32): New macro.
1343 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1344 of several call/return instructions.
1345 (ADDR_PREFIX_OPCODE): New macro.
1346
1347 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1348
1349 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1350
1351 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1352 it pointer to const char;
1353 (struct vot, field `name'): ditto.
1354
1355 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1356
1357 * vax.h: Supply and properly group all values in end sentinel.
1358
1359 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1360
1361 * mips.h (INSN_ISA, INSN_4650): Define.
1362
1363 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1364
1365 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1366 systems with a separate instruction and data cache, such as the
1367 29040, these instructions take an optional argument.
1368
1369 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1370
1371 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1372 INSN_TRAP.
1373
1374 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1375
1376 * mips.h (INSN_STORE_MEMORY): Define.
1377
1378 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1379
1380 * sparc.h: Document new operand type 'x'.
1381
1382 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1383
1384 * i960.h (I_CX2): New instruction category. It includes
1385 instructions available on Cx and Jx processors.
1386 (I_JX): New instruction category, for JX-only instructions.
1387 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1388 Jx-only instructions, in I_JX category.
1389
1390 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1391
1392 * ns32k.h (endop): Made pointer const too.
1393
1394 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1395
1396 * ns32k.h: Drop Q operand type as there is no correct use
1397 for it. Add I and Z operand types which allow better checking.
1398
1399 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1400
1401 * h8300.h (xor.l) :fix bit pattern.
1402 (L_2): New size of operand.
1403 (trapa): Use it.
1404
1405 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1406
1407 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1408
1409 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1410
1411 * sparc.h: Include v9 definitions.
1412
1413 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1414
1415 * m68k.h (m68060): Defined.
1416 (m68040up, mfloat, mmmu): Include it.
1417 (struct m68k_opcode): Widen `arch' field.
1418 (m68k_opcodes): Updated for M68060. Removed comments that were
1419 instructions commented out by "JF" years ago.
1420
1421 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1422
1423 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1424 add a one-bit `flags' field.
1425 (F_ALIAS): New macro.
1426
1427 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1428
1429 * h8300.h (dec, inc): Get encoding right.
1430
1431 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1432
1433 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1434 a flag instead.
1435 (PPC_OPERAND_SIGNED): Define.
1436 (PPC_OPERAND_SIGNOPT): Define.
1437
1438 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1439
1440 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1441 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1442
1443 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1444
1445 * i386.h: Reverse last change. It'll be handled in gas instead.
1446
1447 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1448
1449 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1450 slower on the 486 and used the implicit shift count despite the
1451 explicit operand. The one-operand form is still available to get
1452 the shorter form with the implicit shift count.
1453
1454 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1455
1456 * hppa.h: Fix typo in fstws arg string.
1457
1458 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1459
1460 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1461
1462 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1463
1464 * ppc.h (PPC_OPCODE_601): Define.
1465
1466 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1467
1468 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1469 (so we can determine valid completers for both addb and addb[tf].)
1470
1471 * hppa.h (xmpyu): No floating point format specifier for the
1472 xmpyu instruction.
1473
1474 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1475
1476 * ppc.h (PPC_OPERAND_NEXT): Define.
1477 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1478 (struct powerpc_macro): Define.
1479 (powerpc_macros, powerpc_num_macros): Declare.
1480
1481 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1482
1483 * ppc.h: New file. Header file for PowerPC opcode table.
1484
1485 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1486
1487 * hppa.h: More minor template fixes for sfu and copr (to allow
1488 for easier disassembly).
1489
1490 * hppa.h: Fix templates for all the sfu and copr instructions.
1491
1492 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1493
1494 * i386.h (push): Permit Imm16 operand too.
1495
1496 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1497
1498 * h8300.h (andc): Exists in base arch.
1499
1500 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1501
1502 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1503 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1504
1505 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1506
1507 * hppa.h: Add FP quadword store instructions.
1508
1509 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1510
1511 * mips.h: (M_J_A): Added.
1512 (M_LA): Removed.
1513
1514 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1515
1516 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1517 <mellon@pepper.ncd.com>.
1518
1519 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1520
1521 * hppa.h: Immediate field in probei instructions is unsigned,
1522 not low-sign extended.
1523
1524 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1525
1526 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1527
1528 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1529
1530 * i386.h: Add "fxch" without operand.
1531
1532 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1533
1534 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1535
1536 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1537
1538 * hppa.h: Add gfw and gfr to the opcode table.
1539
1540 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1541
1542 * m88k.h: extended to handle m88110.
1543
1544 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1545
1546 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1547 addresses.
1548
1549 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1550
1551 * i960.h (i960_opcodes): Properly bracket initializers.
1552
1553 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1554
1555 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1556
1557 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1558
1559 * m68k.h (two): Protect second argument with parentheses.
1560
1561 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1562
1563 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1564 Deleted old in/out instructions in "#if 0" section.
1565
1566 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1567
1568 * i386.h (i386_optab): Properly bracket initializers.
1569
1570 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1571
1572 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1573 Jeff Law, law@cs.utah.edu).
1574
1575 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1576
1577 * i386.h (lcall): Accept Imm32 operand also.
1578
1579 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1580
1581 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1582 (M_DABS): Added.
1583
1584 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1585
1586 * mips.h (INSN_*): Changed values. Removed unused definitions.
1587 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1588 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1589 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1590 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1591 (M_*): Added new values for r6000 and r4000 macros.
1592 (ANY_DELAY): Removed.
1593
1594 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1595
1596 * mips.h: Added M_LI_S and M_LI_SS.
1597
1598 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1599
1600 * h8300.h: Get some rare mov.bs correct.
1601
1602 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1603
1604 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1605 been included.
1606
1607 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1608
1609 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1610 jump instructions, for use in disassemblers.
1611
1612 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1613
1614 * m88k.h: Make bitfields just unsigned, not unsigned long or
1615 unsigned short.
1616
1617 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1618
1619 * hppa.h: New argument type 'y'. Use in various float instructions.
1620
1621 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1622
1623 * hppa.h (break): First immediate field is unsigned.
1624
1625 * hppa.h: Add rfir instruction.
1626
1627 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1628
1629 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1630
1631 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1632
1633 * mips.h: Reworked the hazard information somewhat, and fixed some
1634 bugs in the instruction hazard descriptions.
1635
1636 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1637
1638 * m88k.h: Corrected a couple of opcodes.
1639
1640 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1641
1642 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1643 new version includes instruction hazard information, but is
1644 otherwise reasonably similar.
1645
1646 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1647
1648 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1649
1650 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1651
1652 Patches from Jeff Law, law@cs.utah.edu:
1653 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1654 Make the tables be the same for the following instructions:
1655 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1656 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1657 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1658 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1659 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1660 "fcmp", and "ftest".
1661
1662 * hppa.h: Make new and old tables the same for "break", "mtctl",
1663 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1664 Fix typo in last patch. Collapse several #ifdefs into a
1665 single #ifdef.
1666
1667 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1668 of the comments up-to-date.
1669
1670 * hppa.h: Update "free list" of letters and update
1671 comments describing each letter's function.
1672
1673 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1674
1675 * h8300.h: checkpoint, includes H8/300-H opcodes.
1676
1677 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1678
1679 * Patches from Jeffrey Law <law@cs.utah.edu>.
1680 * hppa.h: Rework single precision FP
1681 instructions so that they correctly disassemble code
1682 PA1.1 code.
1683
1684 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1685
1686 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1687 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1688
1689 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1690
1691 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1692 gdb will define it for now.
1693
1694 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1695
1696 * sparc.h: Don't end enumerator list with comma.
1697
1698 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1699
1700 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1701 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1702 ("bc2t"): Correct typo.
1703 ("[ls]wc[023]"): Use T rather than t.
1704 ("c[0123]"): Define general coprocessor instructions.
1705
1706 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1707
1708 * m68k.h: Move split point for gcc compilation more towards
1709 middle.
1710
1711 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1712
1713 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1714 simply wrong, ics, rfi, & rfsvc were missing).
1715 Add "a" to opr_ext for "bb". Doc fix.
1716
1717 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1718
1719 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1720 * mips.h: Add casts, to suppress warnings about shifting too much.
1721 * m68k.h: Document the placement code '9'.
1722
1723 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1724
1725 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1726 allows callers to break up the large initialized struct full of
1727 opcodes into two half-sized ones. This permits GCC to compile
1728 this module, since it takes exponential space for initializers.
1729 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1730
1731 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1732
1733 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1734 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1735 initialized structs in it.
1736
1737 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1738
1739 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1740 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1741 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1742
1743 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1744
1745 * mips.h: document "i" and "j" operands correctly.
1746
1747 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1748
1749 * mips.h: Removed endianness dependency.
1750
1751 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1752
1753 * h8300.h: include info on number of cycles per instruction.
1754
1755 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1756
1757 * hppa.h: Move handy aliases to the front. Fix masks for extract
1758 and deposit instructions.
1759
1760 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1761
1762 * i386.h: accept shld and shrd both with and without the shift
1763 count argument, which is always %cl.
1764
1765 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1766
1767 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1768 (one_byte_segment_defaults, two_byte_segment_defaults,
1769 i386_prefixtab_end): Ditto.
1770
1771 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1772
1773 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1774 for operand 2; from John Carr, jfc@dsg.dec.com.
1775
1776 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1777
1778 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1779 always use 16-bit offsets. Makes calculated-size jump tables
1780 feasible.
1781
1782 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1783
1784 * i386.h: Fix one-operand forms of in* and out* patterns.
1785
1786 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1787
1788 * m68k.h: Added CPU32 support.
1789
1790 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1791
1792 * mips.h (break): Disassemble the argument. Patch from
1793 jonathan@cs.stanford.edu (Jonathan Stone).
1794
1795 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1796
1797 * m68k.h: merged Motorola and MIT syntax.
1798
1799 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1800
1801 * m68k.h (pmove): make the tests less strict, the 68k book is
1802 wrong.
1803
1804 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1805
1806 * m68k.h (m68ec030): Defined as alias for 68030.
1807 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1808 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1809 them. Tightened description of "fmovex" to distinguish it from
1810 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1811 up descriptions that claimed versions were available for chips not
1812 supporting them. Added "pmovefd".
1813
1814 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1815
1816 * m68k.h: fix where the . goes in divull
1817
1818 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1819
1820 * m68k.h: the cas2 instruction is supposed to be written with
1821 indirection on the last two operands, which can be either data or
1822 address registers. Added a new operand type 'r' which accepts
1823 either register type. Added new cases for cas2l and cas2w which
1824 use them. Corrected masks for cas2 which failed to recognize use
1825 of address register.
1826
1827 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1828
1829 * m68k.h: Merged in patches (mostly m68040-specific) from
1830 Colin Smith <colin@wrs.com>.
1831
1832 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1833 base). Also cleaned up duplicates, re-ordered instructions for
1834 the sake of dis-assembling (so aliases come after standard names).
1835 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1836
1837 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1838
1839 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1840 all missing .s
1841
1842 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1843
1844 * sparc.h: Moved tables to BFD library.
1845
1846 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1847
1848 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1849
1850 * h8300.h: Finish filling in all the holes in the opcode table,
1851 so that the Lucid C compiler can digest this as well...
1852
1853 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1854
1855 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1856 Fix opcodes on various sizes of fild/fist instructions
1857 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1858 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1859
1860 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1861
1862 * h8300.h: Fill in all the holes in the opcode table so that the
1863 losing HPUX C compiler can digest this...
1864
1865 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1866
1867 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1868 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1869
1870 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1871
1872 * sparc.h: Add new architecture variant sparclite; add its scan
1873 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1874
1875 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
1876
1877 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1878 fy@lucid.com).
1879
1880 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
1881
1882 * rs6k.h: New version from IBM (Metin).
1883
1884 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
1885
1886 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1887 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
1888
1889 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1890
1891 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1892
1893 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
1894
1895 * m68k.h (one, two): Cast macro args to unsigned to suppress
1896 complaints from compiler and lint about integer overflow during
1897 shift.
1898
1899 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1900
1901 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1902
1903 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1904
1905 * mips.h: Make bitfield layout depend on the HOST compiler,
1906 not on the TARGET system.
1907
1908 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
1909
1910 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
1911 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
1912 <TRANLE@INTELLICORP.COM>.
1913
1914 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
1915
1916 * h8300.h: turned op_type enum into #define list
1917
1918 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
1919
1920 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
1921 similar instructions -- they've been renamed to "fitoq", etc.
1922 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
1923 number of arguments.
1924 * h8300.h: Remove extra ; which produces compiler warning.
1925
1926 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
1927
1928 * sparc.h: fix opcode for tsubcctv.
1929
1930 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
1931
1932 * sparc.h: fba and cba are now aliases for fb and cb respectively.
1933
1934 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
1935
1936 * sparc.h (nop): Made the 'lose' field be even tighter,
1937 so only a standard 'nop' is disassembled as a nop.
1938
1939 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
1940
1941 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
1942 disassembled as a nop.
1943
1944 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
1945
1946 * sparc.h: fix a typo.
1947
1948 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
1949
1950 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
1951 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
1952 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
1953
1954 \f
1955 Local Variables:
1956 version-control: never
1957 End:
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