Forgot Changelog for last i386.h change.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
1 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
2
3 * i386.h: Add some more UNIXWARE_COMPAT comments.
4
5 2000-02-23 Linas Vepstas <linas@linas.org>
6
7 * i370.h: New file.
8
9 2000-02-22 Andrew Haley <aph@cygnus.com>
10
11 * mips.h: (OPCODE_IS_MEMBER): Add comment.
12
13 1999-12-30 Andrew Haley <aph@cygnus.com>
14
15 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
16 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
17 insns.
18
19 2000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
20
21 * i386.h: Qualify intel mode far call and jmp with x_Suf.
22
23 1999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
24
25 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
26 indirect jumps and calls. Add FF/3 call for intel mode.
27
28 Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
29
30 * mn10300.h: Add new operand types. Add new instruction formats.
31
32 Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
33
34 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
35 instruction.
36
37 1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
38
39 * mips.h (INSN_ISA5): New.
40
41 1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
42
43 * mips.h (OPCODE_IS_MEMBER): New.
44
45 1999-10-29 Nick Clifton <nickc@cygnus.com>
46
47 * d30v.h (SHORT_AR): Define.
48
49 1999-10-18 Michael Meissner <meissner@cygnus.com>
50
51 * alpha.h (alpha_num_opcodes): Convert to unsigned.
52 (alpha_num_operands): Ditto.
53
54 Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
55
56 * hppa.h (pa_opcodes): Add load and store cache control to
57 instructions. Add ordered access load and store.
58
59 * hppa.h (pa_opcode): Add new entries for addb and addib.
60
61 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
62
63 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
64
65 Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
66
67 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
68
69 Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
70
71 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
72 and "be" using completer prefixes.
73
74 * hppa.h (pa_opcodes): Add initializers to silence compiler.
75
76 * hppa.h: Update comments about character usage.
77
78 Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
79
80 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
81 up the new fstw & bve instructions.
82
83 Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
84
85 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
86 instructions.
87
88 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
89
90 * hppa.h (pa_opcodes): Add long offset double word load/store
91 instructions.
92
93 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
94 stores.
95
96 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
97
98 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
99
100 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
101
102 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
103
104 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
105
106 * hppa.h (pa_opcodes): Add support for "b,l".
107
108 * hppa.h (pa_opcodes): Add support for "b,gate".
109
110 Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
111
112 * hppa.h (pa_opcodes): Use 'fX' for first register operand
113 in xmpyu.
114
115 * hppa.h (pa_opcodes): Fix mask for probe and probei.
116
117 * hppa.h (pa_opcodes): Fix mask for depwi.
118
119 Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
120
121 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
122 an explicit output argument.
123
124 Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
125
126 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
127 Add a few PA2.0 loads and store variants.
128
129 1999-09-04 Steve Chamberlain <sac@pobox.com>
130
131 * pj.h: New file.
132
133 1999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
134
135 * i386.h (i386_regtab): Move %st to top of table, and split off
136 other fp reg entries.
137 (i386_float_regtab): To here.
138
139 Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
140
141 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
142 by 'f'.
143
144 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
145 Add supporting args.
146
147 * hppa.h: Document new completers and args.
148 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
149 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
150 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
151 pmenb and pmdis.
152
153 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
154 hshr, hsub, mixh, mixw, permh.
155
156 * hppa.h (pa_opcodes): Change completers in instructions to
157 use 'c' prefix.
158
159 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
160 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
161
162 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
163 fnegabs to use 'I' instead of 'F'.
164
165 1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
166
167 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
168 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
169 Alphabetically sort PIII insns.
170
171 Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
172
173 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
174
175 Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
176
177 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
178 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
179
180 * hppa.h: Document 64 bit condition completers.
181
182 Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
183
184 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
185
186 1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
187
188 * i386.h (i386_optab): Add DefaultSize modifier to all insns
189 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
190 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
191
192 Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
193 Jeff Law <law@cygnus.com>
194
195 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
196
197 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
198
199 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
200 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
201
202 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
203
204 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
205
206 Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
207
208 * hppa.h (struct pa_opcode): Add new field "flags".
209 (FLAGS_STRICT): Define.
210
211 Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
212 Jeff Law <law@cygnus.com>
213
214 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
215
216 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
217
218 1999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
219
220 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
221 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
222 flag to fcomi and friends.
223
224 Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
225
226 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
227 integer logical instructions.
228
229 1999-05-28 Linus Nordberg <linus.nordberg@canit.se>
230
231 * m68k.h: Document new formats `E', `G', `H' and new places `N',
232 `n', `o'.
233
234 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
235 and new places `m', `M', `h'.
236
237 Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
238
239 * hppa.h (pa_opcodes): Add several processor specific system
240 instructions.
241
242 Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
243
244 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
245 "addb", and "addib" to be used by the disassembler.
246
247 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
248
249 * i386.h (ReverseModrm): Remove all occurences.
250 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
251 movmskps, pextrw, pmovmskb, maskmovq.
252 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
253 ignore the data size prefix.
254
255 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
256 Mostly stolen from Doug Ledford <dledford@redhat.com>
257
258 Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
259
260 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
261
262 1999-04-14 Doug Evans <devans@casey.cygnus.com>
263
264 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
265 (CGEN_ATTR_TYPE): Update.
266 (CGEN_ATTR_MASK): Number booleans starting at 0.
267 (CGEN_ATTR_VALUE): Update.
268 (CGEN_INSN_ATTR): Update.
269
270 Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
271
272 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
273 instructions.
274
275 Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
276
277 * hppa.h (bb, bvb): Tweak opcode/mask.
278
279
280 1999-03-22 Doug Evans <devans@casey.cygnus.com>
281
282 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
283 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
284 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
285 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
286 Delete member max_insn_size.
287 (enum cgen_cpu_open_arg): New enum.
288 (cpu_open): Update prototype.
289 (cpu_open_1): Declare.
290 (cgen_set_cpu): Delete.
291
292 1999-03-11 Doug Evans <devans@casey.cygnus.com>
293
294 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
295 (CGEN_OPERAND_NIL): New macro.
296 (CGEN_OPERAND): New member `type'.
297 (@arch@_cgen_operand_table): Delete decl.
298 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
299 (CGEN_OPERAND_TABLE): New struct.
300 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
301 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
302 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
303 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
304 {get,set}_{int,vma}_operand.
305 (@arch@_cgen_cpu_open): New arg `isa'.
306 (cgen_set_cpu): Ditto.
307
308 Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
309
310 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
311
312 1999-02-25 Doug Evans <devans@casey.cygnus.com>
313
314 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
315 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
316 enum cgen_hw_type.
317 (CGEN_HW_TABLE): New struct.
318 (hw_table): Delete declaration.
319 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
320 to table entry to enum.
321 (CGEN_OPINST): Ditto.
322 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
323
324 Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
325
326 * alpha.h (AXP_OPCODE_EV6): New.
327 (AXP_OPCODE_NOPAL): Include it.
328
329 1999-02-09 Doug Evans <devans@casey.cygnus.com>
330
331 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
332 All uses updated. New members int_insn_p, max_insn_size,
333 parse_operand,insert_operand,extract_operand,print_operand,
334 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
335 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
336 extract_handlers,print_handlers.
337 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
338 (CGEN_ATTR_BOOL_OFFSET): New macro.
339 (CGEN_ATTR_MASK): Subtract it to compute bit number.
340 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
341 (cgen_opcode_handler): Renamed from cgen_base.
342 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
343 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
344 all uses updated.
345 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
346 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
347 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
348 (CGEN_OPCODE,CGEN_IBASE): New types.
349 (CGEN_INSN): Rewrite.
350 (CGEN_{ASM,DIS}_HASH*): Delete.
351 (init_opcode_table,init_ibld_table): Declare.
352 (CGEN_INSN_ATTR): New type.
353
354 Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
355
356 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
357 (x_FP, d_FP, dls_FP, sldx_FP): Define.
358 Change *Suf definitions to include x and d suffixes.
359 (movsx): Use w_Suf and b_Suf.
360 (movzx): Likewise.
361 (movs): Use bwld_Suf.
362 (fld): Change ordering. Use sld_FP.
363 (fild): Add Intel Syntax equivalent of fildq.
364 (fst): Use sld_FP.
365 (fist): Use sld_FP.
366 (fstp): Use sld_FP. Add x_FP version.
367 (fistp): LLongMem version for Intel Syntax.
368 (fcom, fcomp): Use sld_FP.
369 (fadd, fiadd, fsub): Use sld_FP.
370 (fsubr): Use sld_FP.
371 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
372
373 1999-01-27 Doug Evans <devans@casey.cygnus.com>
374
375 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
376 CGEN_MODE_UINT.
377
378 Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
379
380 * hppa.h (bv): Fix mask.
381
382 1999-01-05 Doug Evans <devans@casey.cygnus.com>
383
384 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
385 (CGEN_ATTR): Use it.
386 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
387 (CGEN_ATTR_TABLE): New member dfault.
388
389 1998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
390
391 * mips.h (MIPS16_INSN_BRANCH): New.
392
393 Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
394
395 The following is part of a change made by Edith Epstein
396 <eepstein@sophia.cygnus.com> as part of a project to merge in
397 changes by HP; HP did not create ChangeLog entries.
398
399 * hppa.h (completer_chars): list of chars to not put a space
400 after.
401
402 Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
403
404 * i386.h (i386_optab): Permit w suffix on processor control and
405 status word instructions.
406
407 1998-11-30 Doug Evans <devans@casey.cygnus.com>
408
409 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
410 (struct cgen_keyword_entry): Ditto.
411 (struct cgen_operand): Ditto.
412 (CGEN_IFLD): New typedef, with associated access macros.
413 (CGEN_IFMT): New typedef, with associated access macros.
414 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
415 (CGEN_IVALUE): New typedef.
416 (struct cgen_insn): Delete const on syntax,attrs members.
417 `format' now points to format data. Type of `value' is now
418 CGEN_IVALUE.
419 (struct cgen_opcode_table): New member ifld_table.
420
421 1998-11-18 Doug Evans <devans@casey.cygnus.com>
422
423 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
424 (CGEN_OPERAND_INSTANCE): New member `attrs'.
425 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
426 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
427 (cgen_opcode_table): Update type of dis_hash fn.
428 (extract_operand): Update type of `insn_value' arg.
429
430 Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
431
432 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
433
434 Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
435
436 * mips.h (INSN_MULT): Added.
437
438 Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
439
440 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
441
442 Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
443
444 * cgen.h (CGEN_INSN_INT): New typedef.
445 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
446 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
447 (CGEN_INSN_BYTES_PTR): New typedef.
448 (CGEN_EXTRACT_INFO): New typedef.
449 (cgen_insert_fn,cgen_extract_fn): Update.
450 (cgen_opcode_table): New member `insn_endian'.
451 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
452 (insert_operand,extract_operand): Update.
453 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
454
455 Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
456
457 * cgen.h (CGEN_ATTR_BOOLS): New macro.
458 (struct CGEN_HW_ENTRY): New member `attrs'.
459 (CGEN_HW_ATTR): New macro.
460 (struct CGEN_OPERAND_INSTANCE): New member `name'.
461 (CGEN_INSN_INVALID_P): New macro.
462
463 Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
464
465 * hppa.h: Add "fid".
466
467 Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
468
469 From Robert Andrew Dale <rob@nb.net>
470 * i386.h (i386_optab): Add AMD 3DNow! instructions.
471 (AMD_3DNOW_OPCODE): Define.
472
473 Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
474
475 * d30v.h (EITHER_BUT_PREFER_MU): Define.
476
477 Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
478
479 * cgen.h (cgen_insn): #if 0 out element `cdx'.
480
481 Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
482
483 Move all global state data into opcode table struct, and treat
484 opcode table as something that is "opened/closed".
485 * cgen.h (CGEN_OPCODE_DESC): New type.
486 (all fns): New first arg of opcode table descriptor.
487 (cgen_set_parse_operand_fn): Add prototype.
488 (cgen_current_machine,cgen_current_endian): Delete.
489 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
490 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
491 dis_hash_table,dis_hash_table_entries.
492 (opcode_open,opcode_close): Add prototypes.
493
494 * cgen.h (cgen_insn): New element `cdx'.
495
496 Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
497
498 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
499
500 Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
501
502 * mn10300.h: Add "no_match_operands" field for instructions.
503 (MN10300_MAX_OPERANDS): Define.
504
505 Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
506
507 * cgen.h (cgen_macro_insn_count): Declare.
508
509 Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
510
511 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
512 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
513 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
514 set_{int,vma}_operand.
515
516 Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
517
518 * mn10300.h: Add "machine" field for instructions.
519 (MN103, AM30): Define machine types.
520
521 Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
522
523 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
524
525 1998-06-18 Ulrich Drepper <drepper@cygnus.com>
526
527 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
528
529 Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
530
531 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
532 and ud2b.
533 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
534 those that happen to be implemented on pentiums.
535
536 Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
537
538 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
539 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
540 with Size16|IgnoreSize or Size32|IgnoreSize.
541
542 Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
543
544 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
545 (REPE): Rename to REPE_PREFIX_OPCODE.
546 (i386_regtab_end): Remove.
547 (i386_prefixtab, i386_prefixtab_end): Remove.
548 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
549 of md_begin.
550 (MAX_OPCODE_SIZE): Define.
551 (i386_optab_end): Remove.
552 (sl_Suf): Define.
553 (sl_FP): Use sl_Suf.
554
555 * i386.h (i386_optab): Allow 16 bit displacement for `mov
556 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
557 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
558 data32, dword, and adword prefixes.
559 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
560 regs.
561
562 Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
563
564 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
565
566 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
567 register operands, because this is a common idiom. Flag them with
568 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
569 fdivrp because gcc erroneously generates them. Also flag with a
570 warning.
571
572 * i386.h: Add suffix modifiers to most insns, and tighter operand
573 checks in some cases. Fix a number of UnixWare compatibility
574 issues with float insns. Merge some floating point opcodes, using
575 new FloatMF modifier.
576 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
577 consistency.
578
579 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
580 IgnoreDataSize where appropriate.
581
582 Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
583
584 * i386.h: (one_byte_segment_defaults): Remove.
585 (two_byte_segment_defaults): Remove.
586 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
587
588 Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
589
590 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
591 (cgen_hw_lookup_by_num): Declare.
592
593 Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
594
595 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
596 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
597
598 Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
599
600 * cgen.h (cgen_asm_init_parse): Delete.
601 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
602 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
603
604 Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
605
606 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
607 (cgen_asm_finish_insn): Update prototype.
608 (cgen_insn): New members num, data.
609 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
610 dis_hash, dis_hash_table_size moved to ...
611 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
612 All uses updated. New members asm_hash_p, dis_hash_p.
613 (CGEN_MINSN_EXPANSION): New struct.
614 (cgen_expand_macro_insn): Declare.
615 (cgen_macro_insn_count): Declare.
616 (get_insn_operands): Update prototype.
617 (lookup_get_insn_operands): Declare.
618
619 Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
620
621 * i386.h (i386_optab): Change iclrKludge and imulKludge to
622 regKludge. Add operands types for string instructions.
623
624 Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
625
626 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
627 table.
628
629 Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
630
631 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
632 for `gettext'.
633
634 Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
635
636 * i386.h: Remove NoModrm flag from all insns: it's never checked.
637 Add IsString flag to string instructions.
638 (IS_STRING): Don't define.
639 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
640 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
641 (SS_PREFIX_OPCODE): Define.
642
643 Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
644
645 * i386.h: Revert March 24 patch; no more LinearAddress.
646
647 Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
648
649 * i386.h (i386_optab): Remove fwait (9b) from all floating point
650 instructions, and instead add FWait opcode modifier. Add short
651 form of fldenv and fstenv.
652 (FWAIT_OPCODE): Define.
653
654 * i386.h (i386_optab): Change second operand constraint of `mov
655 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
656 allow legal instructions such as `movl %gs,%esi'
657
658 Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
659
660 * h8300.h: Various changes to fully bracket initializers.
661
662 Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
663
664 * i386.h: Set LinearAddress for lidt and lgdt.
665
666 Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
667
668 * cgen.h (CGEN_BOOL_ATTR): New macro.
669
670 Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
671
672 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
673
674 Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
675
676 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
677 (cgen_insn): Record syntax and format entries here, rather than
678 separately.
679
680 Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
681
682 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
683
684 Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
685
686 * cgen.h (cgen_insert_fn): Change type of result to const char *.
687 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
688 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
689
690 Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
691
692 * cgen.h (lookup_insn): New argument alias_p.
693
694 Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
695
696 Fix rac to accept only a0:
697 * d10v.h (OPERAND_ACC): Split into:
698 (OPERAND_ACC0, OPERAND_ACC1) .
699 (OPERAND_GPR): Define.
700
701 Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
702
703 * cgen.h (CGEN_FIELDS): Define here.
704 (CGEN_HW_ENTRY): New member `type'.
705 (hw_list): Delete decl.
706 (enum cgen_mode): Declare.
707 (CGEN_OPERAND): New member `hw'.
708 (enum cgen_operand_instance_type): Declare.
709 (CGEN_OPERAND_INSTANCE): New type.
710 (CGEN_INSN): New member `operands'.
711 (CGEN_OPCODE_DATA): Make hw_list const.
712 (get_insn_operands,lookup_insn): Add prototypes for.
713
714 Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
715
716 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
717 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
718 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
719 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
720
721 Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
722
723 * cgen.h: Correct typo in comment end marker.
724
725 Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
726
727 * tic30.h: New file.
728
729 Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
730
731 * cgen.h: Add prototypes for cgen_save_fixups(),
732 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
733 of cgen_asm_finish_insn() to return a char *.
734
735 Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
736
737 * cgen.h: Formatting changes to improve readability.
738
739 Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
740
741 * cgen.h (*): Clean up pass over `struct foo' usage.
742 (CGEN_ATTR): Make unsigned char.
743 (CGEN_ATTR_TYPE): Update.
744 (CGEN_ATTR_{ENTRY,TABLE}): New types.
745 (cgen_base): Move member `attrs' to cgen_insn.
746 (CGEN_KEYWORD): New member `null_entry'.
747 (CGEN_{SYNTAX,FORMAT}): New types.
748 (cgen_insn): Format and syntax separated from each other.
749
750 Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
751
752 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
753 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
754 flags_{used,set} long.
755 (d30v_operand): Make flags field long.
756
757 Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
758
759 * m68k.h: Fix comment describing operand types.
760
761 Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
762
763 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
764 everything else after down.
765
766 Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
767
768 * d10v.h (OPERAND_FLAG): Split into:
769 (OPERAND_FFLAG, OPERAND_CFLAG) .
770
771 Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
772
773 * mips.h (struct mips_opcode): Changed comments to reflect new
774 field usage.
775
776 Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
777
778 * mips.h: Added to comments a quick-ref list of all assigned
779 operand type characters.
780 (OP_{MASK,SH}_PERFREG): New macros.
781
782 Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
783
784 * sparc.h: Add '_' and '/' for v9a asr's.
785 Patch from David Miller <davem@vger.rutgers.edu>
786
787 Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
788
789 * h8300.h: Bit ops with absolute addresses not in the 8 bit
790 area are not available in the base model (H8/300).
791
792 Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
793
794 * m68k.h: Remove documentation of ` operand specifier.
795
796 Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
797
798 * m68k.h: Document q and v operand specifiers.
799
800 Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
801
802 * v850.h (struct v850_opcode): Add processors field.
803 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
804 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
805 (PROCESSOR_V850EA): New bit constants.
806
807 Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
808
809 Merge changes from Martin Hunt:
810
811 * d30v.h: Allow up to 64 control registers. Add
812 SHORT_A5S format.
813
814 * d30v.h (LONG_Db): New form for delayed branches.
815
816 * d30v.h: (LONG_Db): New form for repeati.
817
818 * d30v.h (SHORT_D2B): New form.
819
820 * d30v.h (SHORT_A2): New form.
821
822 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
823 registers are used. Needed for VLIW optimization.
824
825 Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
826
827 * cgen.h: Move assembler interface section
828 up so cgen_parse_operand_result is defined for cgen_parse_address.
829 (cgen_parse_address): Update prototype.
830
831 Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
832
833 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
834
835 Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
836
837 * i386.h (two_byte_segment_defaults): Correct base register 5 in
838 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
839 <paubert@iram.es>.
840
841 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
842 <paubert@iram.es>.
843
844 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
845 <paubert@iram.es>.
846
847 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
848 (JUMP_ON_ECX_ZERO): Remove commented out macro.
849
850 Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
851
852 * v850.h (V850_NOT_R0): New flag.
853
854 Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
855
856 * v850.h (struct v850_opcode): Remove flags field.
857
858 Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
859
860 * v850.h (struct v850_opcode): Add flags field.
861 (struct v850_operand): Extend meaning of 'bits' and 'shift'
862 fields.
863 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
864 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
865
866 Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
867
868 * arc.h: New file.
869
870 Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
871
872 * sparc.h (sparc_opcodes): Declare as const.
873
874 Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
875
876 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
877 uses single or double precision floating point resources.
878 (INSN_NO_ISA, INSN_ISA1): Define.
879 (cpu specific INSN macros): Tweak into bitmasks outside the range
880 of INSN_ISA field.
881
882 Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
883
884 * i386.h: Fix pand opcode.
885
886 Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
887
888 * mips.h: Widen INSN_ISA and move it to a more convenient
889 bit position. Add INSN_3900.
890
891 Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
892
893 * mips.h (struct mips_opcode): added new field membership.
894
895 Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
896
897 * i386.h (movd): only Reg32 is allowed.
898
899 * i386.h: add fcomp and ud2. From Wayne Scott
900 <wscott@ichips.intel.com>.
901
902 Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
903
904 * i386.h: Add MMX instructions.
905
906 Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
907
908 * i386.h: Remove W modifier from conditional move instructions.
909
910 Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
911
912 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
913 with no arguments to match that generated by the UnixWare
914 assembler.
915
916 Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
917
918 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
919 (cgen_parse_operand_fn): Declare.
920 (cgen_init_parse_operand): Declare.
921 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
922 new argument `want'.
923 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
924 (enum cgen_parse_operand_type): New enum.
925
926 Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
927
928 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
929
930 Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
931
932 * cgen.h: New file.
933
934 Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
935
936 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
937 fdivrp.
938
939 Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
940
941 * v850.h (extract): Make unsigned.
942
943 Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
944
945 * i386.h: Add iclr.
946
947 Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
948
949 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
950 take a direction bit.
951
952 Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
953
954 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
955
956 Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
957
958 * sparc.h: Include <ansidecl.h>. Update function declarations to
959 use prototypes, and to use const when appropriate.
960
961 Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
962
963 * mn10300.h (MN10300_OPERAND_RELAX): Define.
964
965 Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
966
967 * d10v.h: Change pre_defined_registers to
968 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
969
970 Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
971
972 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
973 Change mips_opcodes from const array to a pointer,
974 and change bfd_mips_num_opcodes from const int to int,
975 so that we can increase the size of the mips opcodes table
976 dynamically.
977
978 Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
979
980 * d30v.h (FLAG_X): Remove unused flag.
981
982 Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
983
984 * d30v.h: New file.
985
986 Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
987
988 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
989 (PDS_VALUE): Macro to access value field of predefined symbols.
990 (tic80_next_predefined_symbol): Add prototype.
991
992 Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
993
994 * tic80.h (tic80_symbol_to_value): Change prototype to match
995 change in function, added class parameter.
996
997 Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
998
999 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1000 endmask fields, which are somewhat weird in that 0 and 32 are
1001 treated exactly the same.
1002
1003 Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1004
1005 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1006 rather than a constant that is 2**X. Reorder them to put bits for
1007 operands that have symbolic names in the upper bits, so they can
1008 be packed into an int where the lower bits contain the value that
1009 corresponds to that symbolic name.
1010 (predefined_symbo): Add struct.
1011 (tic80_predefined_symbols): Declare array of translations.
1012 (tic80_num_predefined_symbols): Declare size of that array.
1013 (tic80_value_to_symbol): Declare function.
1014 (tic80_symbol_to_value): Declare function.
1015
1016 Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1017
1018 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1019
1020 Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1021
1022 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1023 be the destination register.
1024
1025 Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1026
1027 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1028 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1029 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1030 that the opcode can have two vector instructions in a single
1031 32 bit word and we have to encode/decode both.
1032
1033 Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1034
1035 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1036 TIC80_OPERAND_RELATIVE for PC relative.
1037 (TIC80_OPERAND_BASEREL): New flag bit for register
1038 base relative.
1039
1040 Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1041
1042 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1043
1044 Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1045
1046 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1047 ":s" modifier for scaling.
1048
1049 Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1050
1051 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1052 (TIC80_OPERAND_M_LI): Ditto
1053
1054 Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1055
1056 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1057 (TIC80_OPERAND_CC): New define for condition code operand.
1058 (TIC80_OPERAND_CR): New define for control register operand.
1059
1060 Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1061
1062 * tic80.h (struct tic80_opcode): Name changed.
1063 (struct tic80_opcode): Remove format field.
1064 (struct tic80_operand): Add insertion and extraction functions.
1065 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1066 correct ones.
1067 (FMT_*): Ditto.
1068
1069 Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1070
1071 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1072 type IV instruction offsets.
1073
1074 Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1075
1076 * tic80.h: New file.
1077
1078 Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1079
1080 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1081
1082 Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1083
1084 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1085 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1086 * v850.h: Fix comment, v850_operand not powerpc_operand.
1087
1088 Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1089
1090 * mn10200.h: Flesh out structures and definitions needed by
1091 the mn10200 assembler & disassembler.
1092
1093 Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1094
1095 * mips.h: Add mips16 definitions.
1096
1097 Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1098
1099 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1100
1101 Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1102
1103 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1104 (MN10300_OPERAND_MEMADDR): Define.
1105
1106 Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1107
1108 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1109
1110 Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1111
1112 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1113
1114 Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1115
1116 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1117
1118 Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1119
1120 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1121
1122 Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1123
1124 * alpha.h: Don't include "bfd.h"; private relocation types are now
1125 negative to minimize problems with shared libraries. Organize
1126 instruction subsets by AMASK extensions and PALcode
1127 implementation.
1128 (struct alpha_operand): Move flags slot for better packing.
1129
1130 Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1131
1132 * v850.h (V850_OPERAND_RELAX): New operand flag.
1133
1134 Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1135
1136 * mn10300.h (FMT_*): Move operand format definitions
1137 here.
1138
1139 Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1140
1141 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1142
1143 Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1144
1145 * mn10300.h (mn10300_opcode): Add "format" field.
1146 (MN10300_OPERAND_*): Define.
1147
1148 Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1149
1150 * mn10x00.h: Delete.
1151 * mn10200.h, mn10300.h: New files.
1152
1153 Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1154
1155 * mn10x00.h: New file.
1156
1157 Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1158
1159 * v850.h: Add new flag to indicate this instruction uses a PC
1160 displacement.
1161
1162 Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1163
1164 * h8300.h (stmac): Add missing instruction.
1165
1166 Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1167
1168 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1169 field.
1170
1171 Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1172
1173 * v850.h (V850_OPERAND_EP): Define.
1174
1175 * v850.h (v850_opcode): Add size field.
1176
1177 Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1178
1179 * v850.h (v850_operands): Add insert and extract fields, pointers
1180 to functions used to handle unusual operand encoding.
1181 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1182 V850_OPERAND_SIGNED): Defined.
1183
1184 Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1185
1186 * v850.h (v850_operands): Add flags field.
1187 (OPERAND_REG, OPERAND_NUM): Defined.
1188
1189 Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1190
1191 * v850.h: New file.
1192
1193 Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1194
1195 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1196 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1197 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1198 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1199 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1200 Defined.
1201
1202 Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1203
1204 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1205 a 3 bit space id instead of a 2 bit space id.
1206
1207 Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1208
1209 * d10v.h: Add some additional defines to support the
1210 assembler in determining which operations can be done in parallel.
1211
1212 Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1213
1214 * h8300.h (SN): Define.
1215 (eepmov.b): Renamed from "eepmov"
1216 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1217 with them.
1218
1219 Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1220
1221 * d10v.h (OPERAND_SHIFT): New operand flag.
1222
1223 Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1224
1225 * d10v.h: Changes for divs, parallel-only instructions, and
1226 signed numbers.
1227
1228 Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1229
1230 * d10v.h (pd_reg): Define. Putting the definition here allows
1231 the assembler and disassembler to share the same struct.
1232
1233 Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1234
1235 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1236 Williams <steve@icarus.com>.
1237
1238 Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1239
1240 * d10v.h: New file.
1241
1242 Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1243
1244 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1245
1246 Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1247
1248 * m68k.h (mcf5200): New macro.
1249 Document names of coldfire control registers.
1250
1251 Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1252
1253 * h8300.h (SRC_IN_DST): Define.
1254
1255 * h8300.h (UNOP3): Mark the register operand in this insn
1256 as a source operand, not a destination operand.
1257 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1258 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1259 register operand with SRC_IN_DST.
1260
1261 Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1262
1263 * alpha.h: New file.
1264
1265 Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1266
1267 * rs6k.h: Remove obsolete file.
1268
1269 Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1270
1271 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1272 fdivp, and fdivrp. Add ffreep.
1273
1274 Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1275
1276 * h8300.h: Reorder various #defines for readability.
1277 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1278 (BITOP): Accept additional (unused) argument. All callers changed.
1279 (EBITOP): Likewise.
1280 (O_LAST): Bump.
1281 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1282
1283 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1284 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1285 (BITOP, EBITOP): Handle new H8/S addressing modes for
1286 bit insns.
1287 (UNOP3): Handle new shift/rotate insns on the H8/S.
1288 (insns using exr): New instructions.
1289 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1290
1291 Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1292
1293 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1294 was incorrect.
1295
1296 Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1297
1298 * h8300.h (START): Remove.
1299 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1300 and mov.l insns that can be relaxed.
1301
1302 Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1303
1304 * i386.h: Remove Abs32 from lcall.
1305
1306 Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1307
1308 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1309 (SLCPOP): New macro.
1310 Mark X,Y opcode letters as in use.
1311
1312 Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1313
1314 * sparc.h (F_FLOAT, F_FBR): Define.
1315
1316 Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1317
1318 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1319 from all insns.
1320 (ABS8SRC,ABS8DST): Add ABS8MEM.
1321 (add.l): Fix reg+reg variant.
1322 (eepmov.w): Renamed from eepmovw.
1323 (ldc,stc): Fix many cases.
1324
1325 Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1326
1327 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1328
1329 Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1330
1331 * sparc.h (O): Mark operand letter as in use.
1332
1333 Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1334
1335 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1336 Mark operand letters uU as in use.
1337
1338 Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1339
1340 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1341 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1342 (SPARC_OPCODE_SUPPORTED): New macro.
1343 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1344 (F_NOTV9): Delete.
1345
1346 Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1347
1348 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1349 declaration consistent with return type in definition.
1350
1351 Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1352
1353 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1354
1355 Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1356
1357 * i386.h (i386_regtab): Add 80486 test registers.
1358
1359 Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1360
1361 * i960.h (I_HX): Define.
1362 (i960_opcodes): Add HX instruction.
1363
1364 Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1365
1366 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1367 and fclex.
1368
1369 Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1370
1371 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1372 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1373 (bfd_* defines): Delete.
1374 (sparc_opcode_archs): Replaces architecture_pname.
1375 (sparc_opcode_lookup_arch): Declare.
1376 (NUMOPCODES): Delete.
1377
1378 Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1379
1380 * sparc.h (enum sparc_architecture): Add v9a.
1381 (ARCHITECTURES_CONFLICT_P): Update.
1382
1383 Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1384
1385 * i386.h: Added Pentium Pro instructions.
1386
1387 Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1388
1389 * m68k.h: Document new 'W' operand place.
1390
1391 Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1392
1393 * hppa.h: Add lci and syncdma instructions.
1394
1395 Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1396
1397 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1398 instructions.
1399
1400 Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1401
1402 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1403 assembler's -mcom and -many switches.
1404
1405 Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1406
1407 * i386.h: Fix cmpxchg8b extension opcode description.
1408
1409 Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1410
1411 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1412 and register cr4.
1413
1414 Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1415
1416 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1417
1418 Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1419
1420 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1421
1422 Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1423
1424 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1425
1426 Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1427
1428 * m68kmri.h: Remove.
1429
1430 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1431 declarations. Remove F_ALIAS and flag field of struct
1432 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1433 int. Make name and args fields of struct m68k_opcode const.
1434
1435 Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1436
1437 * sparc.h (F_NOTV9): Define.
1438
1439 Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1440
1441 * mips.h (INSN_4010): Define.
1442
1443 Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1444
1445 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1446
1447 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1448 * m68k.h: Fix argument descriptions of coprocessor
1449 instructions to allow only alterable operands where appropriate.
1450 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1451 (m68k_opcode_aliases): Add more aliases.
1452
1453 Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1454
1455 * m68k.h: Added explcitly short-sized conditional branches, and a
1456 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1457 svr4-based configurations.
1458
1459 Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1460
1461 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1462 * i386.h: added missing Data16/Data32 flags to a few instructions.
1463
1464 Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1465
1466 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1467 (OP_MASK_BCC, OP_SH_BCC): Define.
1468 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1469 (OP_MASK_CCC, OP_SH_CCC): Define.
1470 (INSN_READ_FPR_R): Define.
1471 (INSN_RFE): Delete.
1472
1473 Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1474
1475 * m68k.h (enum m68k_architecture): Deleted.
1476 (struct m68k_opcode_alias): New type.
1477 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1478 matching constraints, values and flags. As a side effect of this,
1479 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1480 as I know were never used, now may need re-examining.
1481 (numopcodes): Now const.
1482 (m68k_opcode_aliases, numaliases): New variables.
1483 (endop): Deleted.
1484 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1485 m68k_opcode_aliases; update declaration of m68k_opcodes.
1486
1487 Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1488
1489 * hppa.h (delay_type): Delete unused enumeration.
1490 (pa_opcode): Replace unused delayed field with an architecture
1491 field.
1492 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1493
1494 Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1495
1496 * mips.h (INSN_ISA4): Define.
1497
1498 Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1499
1500 * mips.h (M_DLA_AB, M_DLI): Define.
1501
1502 Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1503
1504 * hppa.h (fstwx): Fix single-bit error.
1505
1506 Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1507
1508 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1509
1510 Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1511
1512 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1513 debug registers. From Charles Hannum (mycroft@netbsd.org).
1514
1515 Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1516
1517 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1518 i386 support:
1519 * i386.h (MOV_AX_DISP32): New macro.
1520 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1521 of several call/return instructions.
1522 (ADDR_PREFIX_OPCODE): New macro.
1523
1524 Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1525
1526 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1527
1528 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1529 it pointer to const char;
1530 (struct vot, field `name'): ditto.
1531
1532 Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1533
1534 * vax.h: Supply and properly group all values in end sentinel.
1535
1536 Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1537
1538 * mips.h (INSN_ISA, INSN_4650): Define.
1539
1540 Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1541
1542 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1543 systems with a separate instruction and data cache, such as the
1544 29040, these instructions take an optional argument.
1545
1546 Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1547
1548 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1549 INSN_TRAP.
1550
1551 Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1552
1553 * mips.h (INSN_STORE_MEMORY): Define.
1554
1555 Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1556
1557 * sparc.h: Document new operand type 'x'.
1558
1559 Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1560
1561 * i960.h (I_CX2): New instruction category. It includes
1562 instructions available on Cx and Jx processors.
1563 (I_JX): New instruction category, for JX-only instructions.
1564 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1565 Jx-only instructions, in I_JX category.
1566
1567 Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1568
1569 * ns32k.h (endop): Made pointer const too.
1570
1571 Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1572
1573 * ns32k.h: Drop Q operand type as there is no correct use
1574 for it. Add I and Z operand types which allow better checking.
1575
1576 Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1577
1578 * h8300.h (xor.l) :fix bit pattern.
1579 (L_2): New size of operand.
1580 (trapa): Use it.
1581
1582 Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1583
1584 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1585
1586 Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1587
1588 * sparc.h: Include v9 definitions.
1589
1590 Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1591
1592 * m68k.h (m68060): Defined.
1593 (m68040up, mfloat, mmmu): Include it.
1594 (struct m68k_opcode): Widen `arch' field.
1595 (m68k_opcodes): Updated for M68060. Removed comments that were
1596 instructions commented out by "JF" years ago.
1597
1598 Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1599
1600 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1601 add a one-bit `flags' field.
1602 (F_ALIAS): New macro.
1603
1604 Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1605
1606 * h8300.h (dec, inc): Get encoding right.
1607
1608 Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1609
1610 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1611 a flag instead.
1612 (PPC_OPERAND_SIGNED): Define.
1613 (PPC_OPERAND_SIGNOPT): Define.
1614
1615 Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1616
1617 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1618 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1619
1620 Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1621
1622 * i386.h: Reverse last change. It'll be handled in gas instead.
1623
1624 Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1625
1626 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1627 slower on the 486 and used the implicit shift count despite the
1628 explicit operand. The one-operand form is still available to get
1629 the shorter form with the implicit shift count.
1630
1631 Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1632
1633 * hppa.h: Fix typo in fstws arg string.
1634
1635 Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1636
1637 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1638
1639 Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1640
1641 * ppc.h (PPC_OPCODE_601): Define.
1642
1643 Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1644
1645 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1646 (so we can determine valid completers for both addb and addb[tf].)
1647
1648 * hppa.h (xmpyu): No floating point format specifier for the
1649 xmpyu instruction.
1650
1651 Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1652
1653 * ppc.h (PPC_OPERAND_NEXT): Define.
1654 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1655 (struct powerpc_macro): Define.
1656 (powerpc_macros, powerpc_num_macros): Declare.
1657
1658 Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1659
1660 * ppc.h: New file. Header file for PowerPC opcode table.
1661
1662 Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1663
1664 * hppa.h: More minor template fixes for sfu and copr (to allow
1665 for easier disassembly).
1666
1667 * hppa.h: Fix templates for all the sfu and copr instructions.
1668
1669 Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1670
1671 * i386.h (push): Permit Imm16 operand too.
1672
1673 Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1674
1675 * h8300.h (andc): Exists in base arch.
1676
1677 Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1678
1679 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1680 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1681
1682 Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1683
1684 * hppa.h: Add FP quadword store instructions.
1685
1686 Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1687
1688 * mips.h: (M_J_A): Added.
1689 (M_LA): Removed.
1690
1691 Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1692
1693 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1694 <mellon@pepper.ncd.com>.
1695
1696 Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1697
1698 * hppa.h: Immediate field in probei instructions is unsigned,
1699 not low-sign extended.
1700
1701 Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1702
1703 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1704
1705 Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1706
1707 * i386.h: Add "fxch" without operand.
1708
1709 Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1710
1711 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1712
1713 Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1714
1715 * hppa.h: Add gfw and gfr to the opcode table.
1716
1717 Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1718
1719 * m88k.h: extended to handle m88110.
1720
1721 Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1722
1723 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1724 addresses.
1725
1726 Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1727
1728 * i960.h (i960_opcodes): Properly bracket initializers.
1729
1730 Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1731
1732 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1733
1734 Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1735
1736 * m68k.h (two): Protect second argument with parentheses.
1737
1738 Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1739
1740 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1741 Deleted old in/out instructions in "#if 0" section.
1742
1743 Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1744
1745 * i386.h (i386_optab): Properly bracket initializers.
1746
1747 Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1748
1749 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1750 Jeff Law, law@cs.utah.edu).
1751
1752 Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1753
1754 * i386.h (lcall): Accept Imm32 operand also.
1755
1756 Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1757
1758 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1759 (M_DABS): Added.
1760
1761 Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1762
1763 * mips.h (INSN_*): Changed values. Removed unused definitions.
1764 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1765 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1766 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1767 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1768 (M_*): Added new values for r6000 and r4000 macros.
1769 (ANY_DELAY): Removed.
1770
1771 Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1772
1773 * mips.h: Added M_LI_S and M_LI_SS.
1774
1775 Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1776
1777 * h8300.h: Get some rare mov.bs correct.
1778
1779 Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1780
1781 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1782 been included.
1783
1784 Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1785
1786 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1787 jump instructions, for use in disassemblers.
1788
1789 Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1790
1791 * m88k.h: Make bitfields just unsigned, not unsigned long or
1792 unsigned short.
1793
1794 Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1795
1796 * hppa.h: New argument type 'y'. Use in various float instructions.
1797
1798 Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1799
1800 * hppa.h (break): First immediate field is unsigned.
1801
1802 * hppa.h: Add rfir instruction.
1803
1804 Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1805
1806 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1807
1808 Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1809
1810 * mips.h: Reworked the hazard information somewhat, and fixed some
1811 bugs in the instruction hazard descriptions.
1812
1813 Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1814
1815 * m88k.h: Corrected a couple of opcodes.
1816
1817 Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1818
1819 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1820 new version includes instruction hazard information, but is
1821 otherwise reasonably similar.
1822
1823 Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1824
1825 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1826
1827 Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1828
1829 Patches from Jeff Law, law@cs.utah.edu:
1830 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1831 Make the tables be the same for the following instructions:
1832 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1833 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1834 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1835 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1836 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1837 "fcmp", and "ftest".
1838
1839 * hppa.h: Make new and old tables the same for "break", "mtctl",
1840 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1841 Fix typo in last patch. Collapse several #ifdefs into a
1842 single #ifdef.
1843
1844 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1845 of the comments up-to-date.
1846
1847 * hppa.h: Update "free list" of letters and update
1848 comments describing each letter's function.
1849
1850 Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1851
1852 * h8300.h: checkpoint, includes H8/300-H opcodes.
1853
1854 Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1855
1856 * Patches from Jeffrey Law <law@cs.utah.edu>.
1857 * hppa.h: Rework single precision FP
1858 instructions so that they correctly disassemble code
1859 PA1.1 code.
1860
1861 Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1862
1863 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1864 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1865
1866 Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1867
1868 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1869 gdb will define it for now.
1870
1871 Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1872
1873 * sparc.h: Don't end enumerator list with comma.
1874
1875 Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1876
1877 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1878 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1879 ("bc2t"): Correct typo.
1880 ("[ls]wc[023]"): Use T rather than t.
1881 ("c[0123]"): Define general coprocessor instructions.
1882
1883 Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1884
1885 * m68k.h: Move split point for gcc compilation more towards
1886 middle.
1887
1888 Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1889
1890 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1891 simply wrong, ics, rfi, & rfsvc were missing).
1892 Add "a" to opr_ext for "bb". Doc fix.
1893
1894 Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1895
1896 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1897 * mips.h: Add casts, to suppress warnings about shifting too much.
1898 * m68k.h: Document the placement code '9'.
1899
1900 Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1901
1902 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1903 allows callers to break up the large initialized struct full of
1904 opcodes into two half-sized ones. This permits GCC to compile
1905 this module, since it takes exponential space for initializers.
1906 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1907
1908 Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1909
1910 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1911 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1912 initialized structs in it.
1913
1914 Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1915
1916 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1917 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1918 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1919
1920 Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1921
1922 * mips.h: document "i" and "j" operands correctly.
1923
1924 Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1925
1926 * mips.h: Removed endianness dependency.
1927
1928 Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1929
1930 * h8300.h: include info on number of cycles per instruction.
1931
1932 Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1933
1934 * hppa.h: Move handy aliases to the front. Fix masks for extract
1935 and deposit instructions.
1936
1937 Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1938
1939 * i386.h: accept shld and shrd both with and without the shift
1940 count argument, which is always %cl.
1941
1942 Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1943
1944 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1945 (one_byte_segment_defaults, two_byte_segment_defaults,
1946 i386_prefixtab_end): Ditto.
1947
1948 Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1949
1950 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1951 for operand 2; from John Carr, jfc@dsg.dec.com.
1952
1953 Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1954
1955 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1956 always use 16-bit offsets. Makes calculated-size jump tables
1957 feasible.
1958
1959 Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1960
1961 * i386.h: Fix one-operand forms of in* and out* patterns.
1962
1963 Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1964
1965 * m68k.h: Added CPU32 support.
1966
1967 Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1968
1969 * mips.h (break): Disassemble the argument. Patch from
1970 jonathan@cs.stanford.edu (Jonathan Stone).
1971
1972 Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1973
1974 * m68k.h: merged Motorola and MIT syntax.
1975
1976 Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1977
1978 * m68k.h (pmove): make the tests less strict, the 68k book is
1979 wrong.
1980
1981 Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1982
1983 * m68k.h (m68ec030): Defined as alias for 68030.
1984 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1985 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1986 them. Tightened description of "fmovex" to distinguish it from
1987 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1988 up descriptions that claimed versions were available for chips not
1989 supporting them. Added "pmovefd".
1990
1991 Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1992
1993 * m68k.h: fix where the . goes in divull
1994
1995 Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1996
1997 * m68k.h: the cas2 instruction is supposed to be written with
1998 indirection on the last two operands, which can be either data or
1999 address registers. Added a new operand type 'r' which accepts
2000 either register type. Added new cases for cas2l and cas2w which
2001 use them. Corrected masks for cas2 which failed to recognize use
2002 of address register.
2003
2004 Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2005
2006 * m68k.h: Merged in patches (mostly m68040-specific) from
2007 Colin Smith <colin@wrs.com>.
2008
2009 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2010 base). Also cleaned up duplicates, re-ordered instructions for
2011 the sake of dis-assembling (so aliases come after standard names).
2012 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2013
2014 Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2015
2016 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2017 all missing .s
2018
2019 Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2020
2021 * sparc.h: Moved tables to BFD library.
2022
2023 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2024
2025 Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2026
2027 * h8300.h: Finish filling in all the holes in the opcode table,
2028 so that the Lucid C compiler can digest this as well...
2029
2030 Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2031
2032 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2033 Fix opcodes on various sizes of fild/fist instructions
2034 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2035 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2036
2037 Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2038
2039 * h8300.h: Fill in all the holes in the opcode table so that the
2040 losing HPUX C compiler can digest this...
2041
2042 Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2043
2044 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2045 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2046
2047 Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2048
2049 * sparc.h: Add new architecture variant sparclite; add its scan
2050 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2051
2052 Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2053
2054 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2055 fy@lucid.com).
2056
2057 Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2058
2059 * rs6k.h: New version from IBM (Metin).
2060
2061 Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2062
2063 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2064 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2065
2066 Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2067
2068 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2069
2070 Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2071
2072 * m68k.h (one, two): Cast macro args to unsigned to suppress
2073 complaints from compiler and lint about integer overflow during
2074 shift.
2075
2076 Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2077
2078 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2079
2080 Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2081
2082 * mips.h: Make bitfield layout depend on the HOST compiler,
2083 not on the TARGET system.
2084
2085 Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2086
2087 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2088 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2089 <TRANLE@INTELLICORP.COM>.
2090
2091 Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2092
2093 * h8300.h: turned op_type enum into #define list
2094
2095 Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2096
2097 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2098 similar instructions -- they've been renamed to "fitoq", etc.
2099 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2100 number of arguments.
2101 * h8300.h: Remove extra ; which produces compiler warning.
2102
2103 Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2104
2105 * sparc.h: fix opcode for tsubcctv.
2106
2107 Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2108
2109 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2110
2111 Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2112
2113 * sparc.h (nop): Made the 'lose' field be even tighter,
2114 so only a standard 'nop' is disassembled as a nop.
2115
2116 Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2117
2118 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2119 disassembled as a nop.
2120
2121 Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2122
2123 * sparc.h: fix a typo.
2124
2125 Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2126
2127 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2128 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2129 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2130
2131 \f
2132 Local Variables:
2133 version-control: never
2134 End:
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